Hardware resource access method and apparatus for embedded system, and server

Abstract

Provided in the embodiments of the present application are a hardware resource access method and apparatus for an embedded system, and a server. The method comprises: acquiring a target IO interface identifier corresponding to an IO hardware resource to be accessed, wherein the target IO interface identifier is used for identifying the position of a target IO interface, which is connected to the IO hardware resource to be accessed and is in an IO interface set of a preset type, in the IO interface set; on the basis of a base address of a target virtual address space and the target IO interface identifier, determining a target virtual address corresponding to the IO hardware resource to be accessed, wherein the target virtual address space is a virtual address space obtained by mapping to an object space physical addresses of IO hardware resources connected to the IO interface set; and executing an access operation on a target physical address corresponding to the target virtual address, so as to access a target IO hardware resource corresponding to the target physical address. The present embodiment solves the problem of a low hardware resource utilization rate in a hardware resource access method for an embedded system in the related art.

Description

Hardware resource access method, device and server for embedded system

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the Chinese patent application filed with the China Patent Office on February 28, 2024, with application number 2024102232007 and application name “Hardware Resource Access Method, Device and Server for Embedded System”, all contents of which are incorporated by reference into this application. Technical Field

[0003] The embodiments of the present application relate to the field of computers, and more specifically, to a method, device, and server for accessing hardware resources of an embedded system. Background Art

[0004] In related technologies, embedded operating systems can be introduced to manage and schedule processor hardware resources, thereby achieving efficient coordination of embedded processor hardware resources. To facilitate user access to processor hardware resources, some embedded operating systems can uniformly abstract hardware devices into device files. Accessing device files is equivalent to accessing processor hardware resources. Therefore, embedded operating systems can more conveniently access processor hardware resources.

[0005] However, embedded operating systems have their own unique characteristics, most notably the high frequency of access to I / O (Input / Output) hardware resources. In these high-frequency applications, abstracting hardware devices into device files simplifies access but also incurs significant system overhead, significantly reducing the utilization of the embedded processor's computing resources (i.e., the embedded system's hardware resources).

[0006] It can be seen that the hardware resource access method of the embedded system in the related art has the problem of low utilization rate of hardware resources.

[0007] Summary of the Invention

[0008] The embodiments of the present application provide a method, device, and server for accessing hardware resources of an embedded system, so as to at least solve the problem of low utilization of hardware resources in the hardware resource access method of the embedded system in the related art.

[0009] According to one embodiment of the present application, a method for accessing hardware resources of an embedded system is provided, comprising: obtaining a target IO interface identifier corresponding to an input / output IO hardware resource to be accessed, wherein the target IO interface identifier is used to identify the position of a target IO interface to which the IO hardware resource to be accessed is connected in an IO interface set of a preset type; determining a target virtual address corresponding to the IO hardware resource to be accessed based on a base address of a target virtual address space and the target IO interface identifier, wherein the target virtual address space is a virtual address space obtained by mapping the physical address of the IO hardware resource to which the IO interface set is connected to an object space; and performing an access operation on a target physical address corresponding to the target virtual address to access the target IO hardware resource corresponding to the target physical address.

[0010] According to another embodiment of the present application, a hardware resource access device for an embedded system is provided, comprising: an acquisition unit, configured to acquire a target IO interface identifier corresponding to an input / output IO hardware resource to be accessed, wherein the target IO interface identifier is used to identify a position of a target IO interface to which the IO hardware resource to be accessed is connected in an IO interface set of a preset type; a determination unit, configured to determine a target virtual address corresponding to the IO hardware resource to be accessed based on a base address of a target virtual address space and the target IO interface identifier, wherein the target virtual address space is a virtual address space obtained by mapping the physical address of the IO hardware resource to which the IO interface set is connected to an object space; and a first execution unit, configured to perform an access operation on a target physical address corresponding to the target virtual address to access the target IO hardware resource corresponding to the target physical address.

[0011] According to another embodiment of the present application, a server is also provided, which includes: a baseboard management controller, which is connected to the IO hardware resources through a preset type of input and output IO interface set, wherein the baseboard management controller is configured to execute the steps in any of the above method embodiments.

[0012] According to another embodiment of the present application, a computer non-volatile readable storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.

[0013] According to another embodiment of the present application, an electronic device is provided, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0014] Through the embodiment of the present application, when the target IO interface identifier corresponding to the IO hardware resource to be accessed is obtained, based on the base address of the target virtual address space and the target IO interface identifier, the target virtual address corresponding to the IO hardware resource to be accessed is determined, where the target virtual address space is the virtual address space obtained by mapping the physical address of the IO hardware resource connected to the IO interface set to the object space; an access operation is performed on the target physical address corresponding to the target virtual address to access the target IO hardware resource corresponding to the target physical address, thereby performing the corresponding hardware operation on the accessed target IO hardware resource. Here, the calling function interface of the device file accessing the IO hardware resource is abandoned, and the physical address of the IO hardware resource is mapped to the virtual address space of the user space (application layer user space). The application layer directly accesses the virtual address space of the mapped user space, and the access address is actually the physical address space of the IO hardware resource, thereby achieving access to the physical address of the IO hardware resource. Since the device file access method is not adopted, the system scheduling overhead can be effectively reduced, and the overall utilization rate of the processor core is improved, thereby solving the problem of low hardware resource utilization in the hardware resource access method of the embedded system in the related art. In addition, it can also greatly reduce the time overhead of accessing IO hardware resources, increase the access frequency, and improve the access performance, thereby achieving the effect of high-frequency access to IO hardware resources and improving the computing performance of the processor. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] FIG1 is a schematic diagram of a hardware environment of a method for accessing hardware resources of an embedded system according to an embodiment of the present application;

[0016] FIG2 is a flow chart of a method for accessing hardware resources of an embedded system according to an embodiment of the present application;

[0017] FIG3 is a schematic diagram of a method for accessing hardware resources of an embedded system according to an embodiment of the present application;

[0018] FIG4 is a schematic diagram of another method for accessing hardware resources of an embedded system according to an embodiment of the present application;

[0019] 5 is a structural block diagram of a hardware resource access device for an embedded system according to an embodiment of the present application;

[0020] FIG6 is a schematic structural diagram of an optional server according to an embodiment of the present application;

[0021] FIG7 is a schematic structural diagram of an optional BMC according to an embodiment of the present application;

[0022] FIG8 is a structural block diagram of a computer system of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0023] The embodiments of the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0024] It should be noted that the terms "first", "second", etc. in the description and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0025] The method embodiments provided in the embodiments of the present application can be executed in a server device or a similar computing device. Taking operation on a server device as an example, FIG1 is a hardware environment diagram of a hardware resource access method of an embedded system according to an embodiment of the present application. As shown in FIG1 , the server device may include one or more (only one is shown in FIG1 ) processors 102 (the processor 102 may include but is not limited to a microprocessor MCU (Microcontroller Unit, micro control unit) or a programmable logic device FPGA (Field Programmable Gate Array, field programmable gate array) and a processing device) and a memory 104 configured to store data, wherein the server device may also include a transmission device 106 and an input / output device 108 configured to have a communication function. It will be understood by those skilled in the art that the structure shown in FIG1 is only illustrative and does not limit the structure of the above-mentioned server device. For example, the server device may also include more or fewer components than those shown in FIG1 , or have a configuration different from that shown in FIG1 .

[0026] The memory 104 can be configured to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the hardware resource access method of the embedded system in the embodiment of the present application. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, implementing the above method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may include a memory remotely located relative to the processor 102, and these remote memories may be connected to a server device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0027] The transmission device 106 is configured to receive or transmit data via a network. Examples of such networks may include wireless networks provided by a communication provider of a server device. In one embodiment, the transmission device 106 includes a network interface controller (NIC), which can be connected to other network devices via a base station to enable communication with the Internet. In another embodiment, the transmission device 106 may be a radio frequency (RF) module configured to communicate with the Internet wirelessly.

[0028] Taking the method for accessing hardware resources of an embedded system in this embodiment as an example, FIG2 is a flow chart of a method for accessing hardware resources of an embedded system according to an embodiment of the present application. As shown in FIG2 , the flow includes the following steps:

[0029] Step S202 , obtaining a target IO interface identifier corresponding to the IO hardware resource to be accessed, wherein the target IO interface identifier is used to identify a position of the target IO interface to which the IO hardware resource to be accessed is connected in the IO interface set of a preset type.

[0030] The hardware resource access method of the embedded system in this embodiment can be applied to the scenario of accessing the hardware resources of the embedded system. Here, the embedded system is a special-purpose computer system that is completely embedded in the controlled device and designed for a specific application. One application example is an embedded processor. With the rapid development of cloud computing, artificial intelligence, big data, industrial Internet and 5G (5th Generation Mobile Communications Technology), embedded processors have become important computing units and their application scope is becoming more and more extensive.

[0031] In order to achieve efficient coordination of embedded processor hardware resources, an embedded operating system can be introduced to manage and schedule processor hardware resources. For example, the Linux system (full name GNU / Linux, a freely distributable Unix-like operating system) is a multi-user, multi-tasking operating system based on POSIX (Portable Operating System Interface) and Unix that supports multi-threading and multiple CPUs (Central Processing Unit, central processing unit, as the calculation and control core of the computer system, the CPU is the final execution unit for information processing and program running). It can run major Unix tool software, applications and network protocols, and is widely used in the embedded field. Therefore, Linux has become an optional operating system for embedded processors.

[0032] In the related art, in some embedded operating systems (for example, Linux systems), in order to facilitate users to use processor hardware resources, hardware devices are uniformly abstracted into device files. Access to device files is access to processor hardware resources, and embedded operating systems' access to processor hardware resources becomes simple. However, embedded operating systems have their own characteristics, among which high-frequency access to IO hardware resources is its most notable feature. In this high-frequency access application scenario, while abstracting hardware devices into device files simplifies access, it also brings some shortcomings, mainly including the following aspects: First, high-frequency access to device files will occupy a large amount of system overhead, and the utilization rate of embedded processor computing resources will be significantly reduced; second, occupying a large amount of system overhead will slow down access to IO hardware resources, reduce the frequency of high-frequency access, and reduce access performance.

[0033] In order to at least partially solve the above-mentioned problems, ensure the normal operation of various types of services in the embedded system, and at the same time improve the core utilization of the embedded processor, this embodiment provides a hardware resource access method for the embedded system from the embedded system level, abandoning the calling function interface of the device file to access the IO hardware resources, and instead mapping the physical address of the IO hardware resources to the virtual address space of the user space. The application layer directly accesses the mapped virtual address space of the user space, and the access address is actually the physical address space of the IO hardware resources, thereby achieving access to the physical address of the IO hardware resources. Since the device file access method is not used, the system scheduling overhead can be effectively reduced and the overall utilization of the processor core can be improved. In addition, the time overhead of IO hardware resource access can be greatly reduced, the access frequency of IO hardware resources can be increased, and the access performance can be improved, thereby achieving the effect of high-frequency access to IO hardware resources and improving the computing performance of the processor.

[0034] The server device may have a control component, such as a BMC (Baseboard Management Controller) or a similar component. The control component can manage the processor hardware resources by accessing the processor hardware resources. The control component can be connected to the IO hardware resources through a preset type of IO interface set to achieve IO access to the hardware resources. The preset type of IO interface is an IO interface allowed to be used between the control component and the processor hardware resources, such as GPIO (General-purpose input / output). The function of GPIO is similar to P0-P3 of 8051. Its pins can be freely controlled by the user through the program. The PIN pin (i.e., pin) can be used as a general input (GPI) or general output (GPO) or general input and output (GPIO). The IO hardware resources can be CPLD (Complex Programmable Logic Device, which is the abbreviation of Complex PLD, a logic element more complex than PLD).

[0035] Optionally, the IO access in this embodiment can be applied to scenarios where hardware resources are accessed at high frequency, for example, scenarios where IO hardware resources are accessed through GPIO simulating the JTAG protocol. Here, the JTAG protocol is an interface (Joint Test Action Group), an international standard test protocol (IEEE 1149.1 compatible), mainly used for internal chip testing, but not limited to this. For example, it can also be applied to scenarios where I2C (a simple, bidirectional two-wire synchronous serial bus protocol) and SGPIO (Serial General-Purpose Input / Output) are simulated through GPIO, or other processor hardware resources that require high-frequency access, such as ADC (Analog-to-Digital Converter, which is hardware logic or device configured to convert continuous signals in analog form into discrete signals in digital form).

[0036] It should be noted that, in order to facilitate the description of the hardware resource access method of the embedded system in this embodiment, in some examples of this embodiment, the application scenario of high-frequency access to IO hardware resources of the embedded Linux system (which can be implemented through function interface calls) is used as an example for explanation, but this should not cause undue limitation to the hardware resource access method of the embedded system in this embodiment. The hardware resource access method of the embedded system in this embodiment is also applicable to applications with high-frequency access to IO hardware resources of other embedded operating systems.

[0037] For example, after a server is powered on, in certain application scenarios, users may need to access specific I / O hardware resources through the out-of-band BMC to perform specified operations on them. The BMC can access these specific I / O hardware resources by simulating the JTAG protocol through GPIO. The JTAG protocol typically uses a 10MHz frequency and a 100ns period. In extreme cases, such as JTAG CLK (clock signal) clock simulation, the GPIO high-low level toggle (from 1 to 0 or vice versa) takes 100ns (10MHz corresponds to a 100ns period), requiring the BMC to access the GPIO at a high frequency.

[0038] In this embodiment, the control component can obtain a target IO interface identifier corresponding to the IO hardware resource to be accessed. The target IO interface identifier is used to identify the position of the target IO interface to which the IO hardware resource to be accessed is connected in a set of IO interfaces of a preset type. That is, the target IO interface corresponding to the IO hardware resource to be accessed can be the pin number of the target IO interface, such as the pin number of a GPIO. Exemplarily, the IO hardware resource to be accessed can be a CPLD.

[0039] Step S204, based on the base address of the target virtual address space and the target IO interface identifier, determine the target virtual address corresponding to the IO hardware resource to be accessed, wherein the target virtual address space is the virtual address space obtained by mapping the physical address of the IO hardware resource connected to the IO interface set to the object space.

[0040] In this embodiment, the calling function interface of the device file to access the IO hardware resources is abandoned, and it is modified to map the physical address of the IO hardware resources to the virtual address space of the user space. The application layer directly accesses the mapped virtual address space of the user space. The access address is actually the physical address space of the IO hardware resources, thereby realizing access to the physical address of the IO hardware resources, thereby achieving the effect of high-frequency access to the IO hardware resources of the embedded system.

[0041] For the IO hardware resources to be accessed, the target virtual address corresponding to the IO hardware resources to be accessed in the target virtual address space can be determined based on the target IO interface identifier. The target virtual address space here is the virtual address space obtained by mapping the physical address of the IO hardware resources connected to the IO interface set to the object space. The object space can be the application layer object space.

[0042] Optionally, in order to improve the convenience of virtual address determination, the base address of the target virtual address space can be set, and based on the base address of the target virtual address space and the target IO interface identifier, the target virtual address corresponding to the IO hardware resource to be accessed can be determined. For example, the offset corresponding to the target IO interface identifier can be first determined, and then the target virtual address corresponding to the IO hardware resource to be accessed can be determined based on the base address of the target virtual address space and the determined offset.

[0043] Step S206 : performing an access operation on the target physical address corresponding to the target virtual address to access the target IO hardware resource corresponding to the target physical address.

[0044] Based on the target virtual address, an access operation can be performed on the target physical address corresponding to the target virtual address, thereby accessing the target IO hardware resource corresponding to the target physical address. For the accessed target IO hardware resource, specific operations can be performed on it, such as FW (firmware) upgrade. Here, the application layer directly accesses the virtual address space of the mapped application layer user space. The access address is actually the physical address space of the IO hardware resource, achieving access to the physical address of the IO hardware resource.

[0045] In this embodiment, since the access to the physical address space of the IO hardware resources is implemented based on the virtual address (i.e., the physical address space after address mapping is directly accessed through address mapping), compared with the method of accessing IO hardware resources through device files, it can effectively reduce the system scheduling overhead, improve the overall utilization of the processor core, greatly reduce the time overhead of IO hardware resource access, increase the access frequency, and improve the access performance, so as to achieve the effect of high-frequency access to IO hardware resources and improve the computing performance of the processor.

[0046] It should be noted that through the above-mentioned address mapping method, the interface for the embedded system to access IO hardware resources shields the implementation details. Upper-level application developers do not need to pay attention to the implementation scheme for accessing IO hardware resources. This can ensure the neatness and uniformity of the code to a certain extent, thereby achieving modularity.

[0047] Through the above steps, by obtaining the target IO interface identifier corresponding to the IO hardware resource to be accessed, wherein the target IO interface identifier is used to identify the position of the target IO interface to which the IO hardware resource to be accessed is connected in the IO interface set of a preset type; based on the base address of the target virtual address space and the target IO interface identifier, determining the target virtual address corresponding to the IO hardware resource to be accessed, wherein the target virtual address space is the virtual address space obtained by mapping the physical address of the IO hardware resource connected to the IO interface set to the object space; performing an access operation on the target physical address corresponding to the target virtual address to access the target IO hardware resource corresponding to the target physical address, thereby solving the problem of low hardware resource utilization in the hardware resource access method of the embedded system in the related art and improving the utilization of the hardware resources.

[0048] In an exemplary embodiment, before obtaining the target IO interface identifier corresponding to the input / output IO hardware resource to be accessed, the method further includes:

[0049] S11, calling a physical address mapping initialization function to perform an initialization operation through the physical address mapping initialization function.

[0050] In order to map the physical address to the virtual address, it is necessary to first obtain the target virtual address space. The target virtual address space can be obtained by mapping the set of physical addresses of the IO hardware resources connected to the above-mentioned IO interface set into a virtual address space. To this end, a first interface function can be defined, that is, a physical address mapping initialization function. The physical address mapping initialization function is used to map the physical address of the IO hardware resource to the object space to initialize the mapping relationship between the physical address and the virtual address in the virtual address space. The first interface function can be a GPIO physical address mapping initialization function (analog_init_gpio_map). By calling the first interface function, the initialization operation can be performed through the first interface function.

[0051] Optionally, the initialization operation is used to map the set of physical addresses of the IO hardware resources connected to the above-mentioned IO interface set to a virtual address space, which may include the following steps: opening a specified device file, wherein the specified device file is a device file that abstracts the IO hardware resources connected to the IO interface set; mapping the set of physical addresses of the IO hardware resources connected to the IO interface set in the specified device file to a virtual address space to obtain a target virtual address space.

[0052] For example, when using the GPIO physical address mapping initialization function to perform initialization operations, you can first open the / dev / mem device file, and then map a virtual address space through the GPIO physical address map. The base address of this virtual address space is gpio_base_map. Access to this virtual address space can realize access to the GPIO physical address space, that is, access to the GPIO hardware resources.

[0053] According to this embodiment, the mapping relationship between the physical address and the virtual address in the virtual address space is initialized by using the defined physical address mapping initialization function, thereby improving the convenience of generating the virtual address space.

[0054] In an exemplary embodiment, after performing an access operation on the target physical address corresponding to the target virtual address, the method further includes:

[0055] S21, calling a physical address mapping exit function to perform a mapping exit operation through the called physical address mapping exit function.

[0056] In some scenarios, it is necessary to exit the mapped virtual address space to avoid wasting the virtual address space. To this end, a second interface function can be defined, namely, a physical address mapping exit function, which is used to remove the mapping relationship between the physical address and the virtual address in the virtual address space. The second interface function can be a GPIO physical address mapping exit function (analog_exit_gpio_map). By calling the second interface function, a mapping exit operation can be performed through the second interface function.

[0057] Optionally, the mapping exit operation is used to exit the virtual address space mapped to the physical address, which may include the following steps: performing a demapping operation on the target virtual address space, and closing a specified device file.

[0058] Through this embodiment, the mapping exit operation is performed through the physical address mapping exit function, which can remove the mapping relationship between the physical address and the virtual address in the virtual address space, thereby reducing the occupation of the hardware resources of the embedded system.

[0059] In one exemplary embodiment, performing an unmapping operation on a target virtual address space includes:

[0060] S31, performing a demapping operation on the target virtual address space according to the base address of the target virtual address space.

[0061] In this embodiment, to improve the convenience and comprehensiveness of executing a demapping operation on a virtual address space, a demapping operation can be performed on the virtual address space based on the base address of the virtual address space. Correspondingly, the input of the physical address mapping exit function can be the base address of the virtual address space. Correspondingly, the demapping operation can be performed on the target virtual address space in a manner that: the demapping operation is performed on the target virtual address space based on the base address of the target virtual address space.

[0062] For example, the GPIO physical address mapping exit function performs the opposite operation of the initialization function. First, it unmaps the gpio_base_map virtual address space and then closes the / dev / mem device file.

[0063] Through this embodiment, the demapping operation is performed on the virtual address space according to the base address of the virtual address space, which can improve the convenience and comprehensiveness of executing the demapping operation on the virtual address space.

[0064] In an exemplary embodiment, determining a target virtual address corresponding to an IO hardware resource to be accessed based on a base address of a target virtual address space and a target IO interface identifier includes:

[0065] S41, performing a sum operation on the base address of the target virtual address space and the quotient of the target IO interface identifier divided by a preset number to obtain a target starting address;

[0066] S42 , determining a target virtual address corresponding to the IO hardware resource to be accessed according to the target starting address and the remainder obtained by dividing the target IO interface identifier by a preset number.

[0067] In this embodiment, the physical addresses corresponding to the IO interfaces in the IO interface set are divided into physical address spaces according to a preset number. The physical address spaces corresponding to the IO interface set can be distributed in groups, and each physical address space corresponds to a preset number of bits, which can represent a preset number of IO interfaces. The physical address space where the target physical address corresponding to the target IO identifier is located is the target physical address space. In order to determine the starting address of the target physical address space mapped to the target virtual address space, a sum operation can be performed on the base address of the target virtual address space and the quotient of the target IO interface identifier divided by the preset number to obtain the target starting address.

[0068] The determined target starting address is the starting address of the target physical address space mapped to the target virtual address space. In order to determine the virtual address of the hardware resource, the target virtual address corresponding to the IO hardware resource to be accessed can be determined based on the target starting address and the remainder of the target IO interface identifier divided by a preset number.

[0069] For example, the physical address space corresponding to GPIO is generally distributed in groups, with each physical address space corresponding to a preset number of bits, which can represent a preset number of GPIOs. The virtual address space base address gpio_base_map after GPIO address mapping is used as the GPIO access base address. The relative address offset of the hardware resource corresponding to this GPIO pin is calculated using gpionumber. gpio_base_map + offset can be used to obtain the address space location of the IO hardware resource corresponding to gpionumber. Access operations in this address space can complete access to the IO hardware resource corresponding to gpionumber.

[0070] Here, the calculation formula for the hardware resource relative address offset corresponding to gpionumber is shown in formula (1): gpio_offset = gpionumber / preset number (1)

[0071] By using formula (1), the relative address or offset address of the hardware resource corresponding to the GPIO where gpionumber is located can be calculated.

[0072] To access the hardware resource corresponding to gpionumber, you can find the corresponding bit in this address space gpio_base_map+gpio_offset (i.e., the bit corresponding to gpionumber, gpio_bit_in_offset). The bit position calculation formula is shown in formula (2): gpio_bit_in_offset = gpionumber% preset number (2)

[0073] Through this embodiment, the starting address of the physical address space mapped to the virtual address space is determined based on the base address of the virtual address space and the interface identifier, and then the virtual address corresponding to the IO hardware resource to be accessed is determined, which can improve the efficiency of virtual address determination.

[0074] In an exemplary embodiment, determining a target virtual address corresponding to the IO hardware resource to be accessed according to the target starting address and the remainder of dividing the target IO interface identifier by a preset number includes:

[0075] S51 , performing a bitwise AND operation on a target starting address and a shift result obtained by left-shifting the remainder of dividing the target IO interface identifier by a preset number to obtain a target virtual address corresponding to the IO hardware resource to be accessed.

[0076] When determining the target virtual address corresponding to the to-be-accessed IO hardware resource, the remainder obtained by dividing the target IO interface identifier by a preset quantity can be shifted left by one bit, and the resulting shift result can be subjected to a bitwise AND operation with the target starting address, and the resulting result is the target virtual address corresponding to the to-be-accessed IO hardware resource.

[0077] For example, after obtaining the hardware resource offset address (gpio_offset) corresponding to the GPIO where gpionumber is located and the corresponding bit (gpio_bit_in_offset), the access to the hardware resource corresponding to the IO of gpionumber finally is: taking the value gValue at the address (gpio_base_map + gpio_offset) & (1 << gpio_bit_in_offset), where & is the bitwise AND operation.

[0078] Through this embodiment, the shift result obtained by shifting left by one bit the remainder obtained by dividing the interface identifier by a preset quantity is subjected to a bitwise AND operation with the starting address to determine the virtual address corresponding to the to-be-accessed IO hardware resource, which can improve the accuracy of virtual address determination.

[0079] In an exemplary embodiment, the above-mentioned preset quantity can be set as needed. For example, the preset quantity can be 32, that is, each physical space corresponds to 32 bits, used to represent 32 preset types of IO interfaces. Correspondingly, the target starting address can be obtained by performing a summation operation on the base address of the target virtual address space and the quotient obtained by dividing the target IO interface identifier by 32, and the target virtual address corresponding to the to-be-accessed IO hardware resource can be the result obtained by performing a bitwise AND operation on the shift result obtained by shifting left by one bit the remainder obtained by dividing the target IO interface identifier by 32 and the target starting address.

[0080] For example, the physical address space corresponding to GPIO is distributed in groups, each physical address space corresponds to 32 bits, which can represent 32 GPIOs, divided into four groups, with 8 GPIOs in each group. The calculation formula for the relative address or offset address of the hardware resource corresponding to the GPIO where gpionumber is located is gpio_offset = gpionumber / 32, and the calculation formula for the bit corresponding to gpionumber is: gpio_bit_in_offset = gpionumber % 32.

[0081] Through this embodiment, the physical address space corresponding to the IO interface set is distributed in groups, each physical address space corresponds to 32 bits, which can adapt to the representation form of the physical address (32 is 25), and improve the convenience of virtual address determination.

[0082] In an exemplary embodiment, obtaining a target IO interface identifier corresponding to an input / output IO hardware resource to be accessed includes:

[0083] S61, obtaining the target IO interface identifier passed in by calling a preset access function interface.

[0084] In order to improve the convenience of physical address access, an access interface can be preset, that is, a preset access function interface, which is used to access the physical address corresponding to the IO interface identified by the IO interface identifier passed in by the preset access function interface, so as to perform preset interface operations on the IO interface identified by the IO interface identifier passed in by the preset access function interface, for example, accessing the corresponding IO hardware resources.

[0085] Correspondingly, obtaining the target IO interface identifier corresponding to the input / output IO hardware resource to be accessed may be: obtaining the target IO interface identifier passed in by calling a preset access function interface. Here, there may be one or more preset access function interfaces, which may be configured based on the type of preset interface operation to be performed. In scenarios where there are multiple preset access function interfaces, different preset access function interfaces may be used to implement different functions, for example, setting an interface mode and specifying an operation corresponding to the set interface mode.

[0086] Through this embodiment, the access to the virtual address is achieved by passing the IO interface identifier corresponding to the IO hardware resource to be accessed into the preset access function interface, which can improve the convenience of virtual address access.

[0087] In an exemplary embodiment, obtaining the target IO interface identifier passed in by calling a preset access function interface includes:

[0088] S71: Obtain a target IO interface identifier passed in by calling a first access function interface.

[0089] In this embodiment, a first access function interface can be preset, and the first access function interface is used to access the physical address corresponding to the IO interface identified by the IO interface identifier passed in by the first access function interface, so as to set the IO interface identified by the IO interface identifier passed in by the first access function interface to input mode, and the value of the IO interface (Value, high or low, 1 or 0) can be obtained in the input mode. Correspondingly, obtaining the target IO interface identifier passed in by calling the preset access function interface can include: obtaining the target IO interface identifier passed in by calling the first access function interface.

[0090] For example, you can define a GPIO access function interface analog_gpio_set_input to set the GPIO to input mode.

[0091] Through this embodiment, by presetting an access function interface for setting the IO interface to the input mode, subsequent interface operations can be conveniently performed, thereby improving the convenience of information acquisition.

[0092] In an exemplary embodiment, obtaining the target IO interface identifier passed in by calling a preset access function interface includes:

[0093] S81, obtaining the target IO interface identifier passed in by calling the second access function interface.

[0094] In this embodiment, a second access function interface may be preset, and the second access function interface is used to access the physical address corresponding to the IO interface identified by the IO interface identifier passed in by the second access function interface, so as to obtain the interface value of the IO interface identified by the IO interface identifier passed in by the second access function interface. Correspondingly, obtaining the target IO interface identifier passed in by calling the preset access function interface may include: obtaining the target IO interface identifier passed in by calling the second access function interface.

[0095] For example, a GPIO access function interface analog_gpio_get_value may be defined to obtain the GPIO Value.

[0096] Through this embodiment, by presetting an access function interface for obtaining the value of the IO interface, the value of the IO interface can be easily obtained, thereby improving the convenience of information acquisition.

[0097] In an exemplary embodiment, obtaining the target IO interface identifier passed in by calling a preset access function interface includes:

[0098] S91: Acquire the target IO interface identifier passed in by calling the third access function interface.

[0099] In this embodiment, a third access function interface can be preset, and the third access function interface is used to access the physical address corresponding to the IO interface identified by the IO interface identifier passed in by the third access function interface, so as to set the IO interface identified by the IO interface identifier passed in by the third access function interface to output mode. The value of the IO interface can be set in output mode. Correspondingly, obtaining the target IO interface identifier passed in by calling the preset access function interface can include: obtaining the target IO interface identifier passed in by calling the third access function interface.

[0100] For example, you can define a GPIO access function interface analog_gpio_set_output to set the GPIO to output mode.

[0101] Through this embodiment, by presetting an access function interface for setting the IO interface to the output input mode, subsequent interface operations can be easily performed, thereby improving the convenience of information processing.

[0102] In an exemplary embodiment, a fourth access function interface and a fifth access function interface can be preset, the fourth access function interface being used to access the physical address corresponding to the IO interface identified by the IO interface identifier passed in by the fourth access function interface, so as to set the IO interface identified by the IO interface identifier passed in by the fourth access function interface to a first value, and the fifth access function interface being used to access the physical address corresponding to the IO interface identified by the IO interface identifier passed in by the fifth access function interface, so as to set the IO interface identified by the IO interface identifier passed in by the fifth access function interface to a second value, wherein the first value and the second value are different values.

[0103] For example, you can define the GPIO access function interfaces: analog_gpio_set_high and analog_gpio_set_low, which are used to set the GPIO Value to High (high level) in output mode and to set the GPIO Value to Low (low level) in output mode, respectively.

[0104] Here, the function parameters of the five aforementioned GPIO access function interfaces—analog_gpio_set_input, analog_gpio_get_value, analog_gpio_set_output, analog_gpio_set_high, and analog_gpio_set_low—can all be the aforementioned gpionumber, representing the corresponding GPIO pin number, as shown in Figure 3. For example, a gpionumber corresponds to the address space location of an IO hardware resource. Access operations within this address space allow access to the IO hardware resource corresponding to the gpionumber, including setting the GPIO mode to input or output, obtaining the GPIO value, and setting the GPIO value high / low (1 / 0). Here, the interface for embedded systems to access IO hardware resources is highly unified, making it more convenient for upper-level application developers to call and use it.

[0105] In this embodiment, the bus waveform signal of the clock bus may be generated by simulating at least part of the access function interface. Correspondingly, the method further includes:

[0106] S101, when the target IO interface is in output mode, loop the following steps to simulate the bus waveform signal of the specified frequency: call the fourth access function interface with the target IO interface identifier as an input parameter; sleep for the target duration; call the fifth access function interface with the target IO interface identifier as an input parameter; and sleep for the target duration again.

[0107] When the target IO interface is in output mode, in order to simulate the bus waveform signal of the specified frequency, the following steps are executed cyclically: the fourth access function interface is called with the target IO interface identifier as the input parameter to set the target IO interface to the first value; then, the target duration is hibernated, where the target duration is the cycle duration that matches the specified frequency, which can be half of a signal cycle of the bus waveform signal to be simulated; then, the fifth access function interface is called with the target IO interface identifier as the input parameter to set the target IO interface to the second value; finally, the target duration is hibernated again, as shown in Figure 4.

[0108] For example, when the BMC needs to access the GPIO at a high frequency, the above-mentioned GPIO function interfaces analog_gpio_set_high and analog_gpio_set_low can be called at a high frequency to implement a 10MHz frequency reversal of the GPIO high and low levels (i.e., by setting the GPIO High or Low to set the bus to 1 or 0), thereby achieving the effect of simulating the JTAG CLK clock bus.

[0109] When performing JTAG CLK clock simulation, the embedded Linux application can call the access function interfaces analog_gpio_set_output, analog_gpio_set_high, and analog_gpio_set_low. Calling analog_gpio_set_high and analog_gpio_set_low at a high frequency of 100ns achieves high-frequency inversion of the GPIO high and low levels (from 1 to 0 or from 0 to 1), simulating the generation of a 10MHz bus waveform signal for the JTAG CLK clock bus. The example program code is as follows:

[0110] According to this embodiment, the bus waveform signal of the clock bus is simulated and generated through a preset access function interface, which can improve the convenience of simulating the bus waveform signal of the clock bus.

[0111] In an exemplary embodiment, the target IO interface is a GPIO interface, the target IO interface identifier is a pin number of the target IO interface, and the target IO hardware resource is a complex programmable logic device.

[0112] Correspondingly, performing an access operation on the target physical address corresponding to the target virtual address to access the target IO hardware resource corresponding to the target physical address includes:

[0113] S111 , performing an access operation on a target physical address corresponding to a target virtual address, so as to access a complex programmable logic device corresponding to the target physical address and perform a firmware upgrade operation on the complex programmable logic device.

[0114] In this embodiment, after the server is powered on, an access operation can be performed on the target physical address corresponding to the target virtual address to access the complex programmable logic device corresponding to the target physical address, and accessing the complex programmable logic device corresponding to the target physical address can perform a firmware upgrade operation on the complex programmable logic device.

[0115] For example, when the server is powered on and a user needs to upgrade the CPLD firmware through the out-of-band BMC in a specific application scenario, the BMC simulates the JTAG protocol through GPIO to access the CPLD to perform the CPLD firmware upgrade operation.

[0116] According to this embodiment, the CPLD is accessed through GPIO simulating the JTAG protocol to perform the CPLD firmware upgrade operation, which can improve the efficiency of the CPLD firmware upgrade.

[0117] It should be noted that for the aforementioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that this application is not limited by the order of the actions described, because according to this application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are optional embodiments for implementing the scheme of this application, and the actions and modules involved are not necessarily required for this application.

[0118] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the embodiment of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a non-volatile readable storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for enabling a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the method of each embodiment of the present application.

[0119] According to an embodiment of the present application, a hardware resource access device for an embedded system is also provided, which is configured to implement the hardware resource access method for the embedded system provided in the above embodiment. The details that have been described will not be repeated here. As used below, the term "module" can implement software and / or a combination of hardware for a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and contemplated.

[0120] FIG5 is a structural block diagram of a hardware resource access device for an embedded system according to an embodiment of the present application. As shown in FIG5 , the device includes:

[0121] An acquiring unit 502 is configured to acquire a target IO interface identifier corresponding to the IO hardware resource to be accessed, wherein the target IO interface identifier is used to identify a position of the target IO interface to which the IO hardware resource to be accessed is connected in the IO interface set of a preset type;

[0122] The determining unit 504 is configured to determine a target virtual address corresponding to the IO hardware resource to be accessed based on a base address of a target virtual address space and a target IO interface identifier, wherein the target virtual address space is a virtual address space obtained by mapping a physical address of the IO hardware resource connected to the IO interface set to an object space;

[0123] The first execution unit 506 is configured to perform an access operation on a target physical address corresponding to the target virtual address, so as to access a target IO hardware resource corresponding to the target physical address.

[0124] Through the embodiments of the present application, by obtaining the target IO interface identifier corresponding to the IO hardware resource to be accessed, wherein the target IO interface identifier is used to identify the position of the target IO interface to which the IO hardware resource to be accessed is connected in the IO interface set of a preset type; based on the base address of the target virtual address space and the target IO interface identifier, the target virtual address corresponding to the IO hardware resource to be accessed is determined, wherein the target virtual address space is the virtual address space obtained by mapping the physical address of the IO hardware resource connected to the IO interface set to the object space; performing an access operation on the target physical address corresponding to the target virtual address to access the target IO hardware resource corresponding to the target physical address, thereby solving the problem of low hardware resource utilization in the hardware resource access method of the embedded system in the related art and improving the utilization of hardware resources.

[0125] Optionally, the above-mentioned device also includes: a first calling unit, which is configured to call the physical address mapping initialization function before obtaining the target IO interface identifier corresponding to the input and output IO hardware resource to be accessed, so as to perform the following initialization operation through the physical address mapping initialization function, wherein the physical address mapping initialization function is used to map the physical address of the IO hardware resource to the object space to initialize the mapping relationship between the physical address and the virtual address in the virtual address space; an opening unit, which is configured to open the specified device file, wherein the specified device file is a device file abstracted from the IO hardware resources connected to the IO interface set; a mapping unit, which is configured to map the set of physical addresses of the IO hardware resources connected to the IO interface set in the specified device file to a virtual address space to obtain the target virtual address space.

[0126] Optionally, the above-mentioned device also includes: a second calling unit, which is configured to call the physical address mapping exit function after performing an access operation on the target physical address corresponding to the target virtual address, so as to perform the following mapping exit operation through the physical address mapping exit function, wherein the physical address mapping exit function is used to remove the mapping relationship between the physical address and the virtual address in the virtual address space: perform a de-mapping operation on the target virtual address space, and close the specified device file.

[0127] Optionally, the second calling unit includes: a first execution module, configured to perform a demapping operation on the target virtual address space according to the base address of the target virtual address space.

[0128] Optionally, the determination unit includes: a second execution module, configured to perform a sum operation on the base address of the target virtual address space and the quotient of the target IO interface identifier divided by a preset number to obtain a target starting address, wherein the physical addresses corresponding to the IO interfaces in the IO interface set are divided into physical address spaces according to a preset number, the physical address space where the target physical address corresponding to the target IO identifier is located is the target physical address space, and the target starting address is the starting address mapped from the target physical address space to the target virtual address space; a determination module, configured to determine the target virtual address corresponding to the IO hardware resource to be accessed based on the target starting address and the remainder of the target IO interface identifier divided by a preset number.

[0129] Optionally, the determination module includes: a first execution submodule, which is configured to perform a bitwise AND operation on the shift result obtained by left-shifting the target IO interface identifier by one bit and the target starting address to obtain the target virtual address corresponding to the IO hardware resource to be accessed.

[0130] Optionally, the second execution module includes a second execution sub-module, and the first execution sub-module includes an execution sub-unit, wherein the second execution sub-module is configured to perform a sum operation on the base address of the target virtual address space and the quotient of the target IO interface identifier divided by 32 to obtain a target starting address, wherein each physical space corresponds to 32 bits, used to represent 32 preset types of IO interfaces; the execution sub-unit is configured to perform a bitwise AND operation on the shift result obtained by shifting the remainder obtained by dividing the target IO interface identifier by 32 by one bit left and the target starting address to obtain a target virtual address corresponding to the IO hardware resource to be accessed.

[0131] Optionally, the acquisition unit includes: an acquisition module, which is configured to obtain the target IO interface identifier passed in by calling a preset access function interface, wherein the preset access function interface is used to access the physical address corresponding to the IO interface identified by the IO interface identifier passed in by the preset access function interface, so as to perform a preset interface operation on the IO interface identified by the IO interface identifier passed in by the preset access function interface.

[0132] Optionally, the acquisition module includes: a first acquisition sub-module, which is configured to obtain the target IO interface identifier passed in by calling the first access function interface, wherein the first access function interface is used to access the physical address corresponding to the IO interface identified by the IO interface identifier passed in by the first access function interface, so as to set the IO interface identified by the IO interface identifier passed in by the first access function interface to input mode.

[0133] Optionally, the acquisition module includes: a second acquisition sub-module, which is configured to obtain the target IO interface identifier passed in by calling the second access function interface, wherein the second access function interface is used to access the physical address corresponding to the IO interface identified by the IO interface identifier passed in by the second access function interface, so as to obtain the interface value of the IO interface identified by the IO interface identifier passed in by the second access function interface.

[0134] Optionally, the acquisition module includes: a third acquisition sub-module, which is configured to obtain the target IO interface identifier passed in by calling the third access function interface, wherein the third access function interface is used to access the physical address corresponding to the IO interface identified by the IO interface identifier passed in by the third access function interface, so as to set the IO interface identified by the IO interface identifier passed in by the third access function interface to output mode.

[0135] Optionally, the above-mentioned device also includes: a second execution unit, which is configured to loop through the following steps when the target IO interface is in output mode to simulate a bus waveform signal of a specified frequency: calling a fourth access function interface with the target IO interface identifier as an input parameter, wherein the fourth access function interface is used to access the physical address corresponding to the IO interface identified by the IO interface identifier passed in by the fourth access function interface, so as to set the IO interface identified by the IO interface identifier passed in by the fourth access function interface to a first value; sleep target duration, wherein the target duration is a cycle duration that matches the specified frequency; calling a fifth access function interface with the target IO interface identifier as an input parameter, wherein the fifth access function interface is used to access the physical address corresponding to the IO interface identified by the IO interface identifier passed in by the fifth access function interface, so as to set the IO interface identified by the IO interface identifier passed in by the fifth access function interface to a second value, wherein the first value and the second value are different values; and re-sleep target duration.

[0136] Optionally, the target IO interface is a general input and output GPIO interface, the pin number of the target IO interface, and the target IO hardware resource is a complex programmable logic device; the first execution unit includes: a third execution module, which is configured to perform an access operation on the target physical address corresponding to the target virtual address, so as to access the complex programmable logic device corresponding to the target physical address to perform a firmware upgrade operation on the complex programmable logic device.

[0137] It should be noted that the above modules can be implemented through software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.

[0138] According to an embodiment of the present application, a server is also provided, which can be a server device in any of the aforementioned embodiments. As shown in Figure 6, the server may include a baseboard management controller, which is connected to the IO hardware resources through a preset type of IO interface set, wherein the baseboard management controller is configured to implement the steps in any of the aforementioned method embodiments.

[0139] According to an embodiment of the present application, a BMC is also provided. An example of the BMC can be shown in Figure 7. The BMC hardware can be divided into three parts: a SOC (System on Chip, also known as a system on chip) submodule, a BMC out-of-band submodule, and a BMC in-band submodule. The BMC can be configured to implement the steps of any of the above method embodiments.

[0140] According to an embodiment of the present application, a computer non-volatile readable storage medium is further provided, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when run.

[0141] In an exemplary embodiment, the above-mentioned computer non-volatile readable storage medium may include but is not limited to: a USB flash drive, a ROM (Read-Only Memory), a RAM (Random Access Memory), a mobile hard disk, a magnetic disk or an optical disk, and other media that can store computer programs.

[0142] According to an embodiment of the present application, a computer program product is provided, which includes a computer program / instructions, which include program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from the network via the communication portion 809, and / or installed from the removable medium 811. When the computer program is executed by the central processing unit 801, the various functions provided by the embodiments of the present application are performed. The serial numbers of the above embodiments of the present application are for descriptive purposes only and do not represent the advantages or disadvantages of the embodiments.

[0143] FIG8 schematically illustrates a block diagram of a computer system structure for implementing an electronic device according to an embodiment of the present application. As shown in FIG8 , a computer system 800 includes a central processing unit 801, which can perform various appropriate actions and processes according to a program stored in a read-only memory 802 or a program loaded from a storage unit 808 into a random access memory 803. Various programs and data required for system operation are also stored in the random access memory 803. The central processing unit 801, the read-only memory 802, and the random access memory 803 are connected to each other via a bus 804. An input / output interface 805 is also connected to the bus 804.

[0144] The following components are connected to the input / output interface 805: an input section 806 including a keyboard, a mouse, and the like; an output section 807 including devices such as a CRT (Cathode Ray Tube), an LCD (Liquid Crystal Display), and speakers; a storage section 808 including a hard disk; and a communication section 809 including a network interface card such as a local area network card or a modem. The communication section 809 performs communication processing via a network such as the Internet. A drive 810 is also connected to the input / output interface 805 as needed. Removable media 811, such as a magnetic disk, an optical disk, a magneto-optical disk, or a semiconductor memory, is installed in the drive 810 as needed, so that computer programs read therefrom can be installed into the storage section 808 as needed.

[0145] In particular, according to an embodiment of the present application, the processes described in the various method flow charts can be implemented as computer software programs. For example, an embodiment of the present application includes a computer program product comprising a computer program carried on a computer-readable medium, the computer program including program code for executing the methods shown in the flow charts. In such an embodiment, the computer program can be downloaded and installed from a network via the communication section 809, and / or installed from a removable medium 811. When the computer program is executed by the central processing unit 801, the various functions defined in the system of the present application are performed.

[0146] It should be noted that the computer system 800 of the electronic device shown in FIG8 is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0147] According to an embodiment of the present application, an electronic device is also provided, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any of the above method embodiments.

[0148] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the input / output resource pool, and the input / output device is connected to the input / output resource pool.

[0149] The examples in this embodiment can refer to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail here.

[0150] Obviously, those skilled in the art should understand that the various modules or steps of the above-mentioned embodiments of the present application can be implemented using a general-purpose computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented using program codes executable by the computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be performed in a different order than herein, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the embodiments of the present application are not limited to any specific combination of hardware and software.

[0151] The above are merely optional embodiments of the present application and are not intended to limit the embodiments of the present application. For those skilled in the art, the embodiments of the present application may be modified and varied in various ways. Any modifications, equivalent replacements, improvements, etc. made within the principles of the embodiments of the present application shall be included in the scope of protection of the embodiments of the present application.

Claims

1. A method for accessing hardware resources of an embedded system, characterized in that: include: Obtaining a target IO interface identifier corresponding to the input / output IO hardware resource to be accessed, wherein the target IO interface identifier is used to identify a position of the target IO interface to which the IO hardware resource to be accessed is connected in a set of IO interfaces of a preset type; Determining a target virtual address corresponding to the IO hardware resource to be accessed based on a base address of a target virtual address space and the target IO interface identifier, wherein the target virtual address space is a virtual address space obtained by mapping a physical address of the IO hardware resource connected to the IO interface set to an object space; An access operation is performed on a target physical address corresponding to the target virtual address to access a target IO hardware resource corresponding to the target physical address.

2. The method according to claim 1, characterized in that Before obtaining the target IO interface identifier corresponding to the input / output IO hardware resource to be accessed, the method further includes: A physical address mapping initialization function is called to perform the following initialization operations through the physical address mapping initialization function, wherein the physical address mapping initialization function is used to map the physical address of the IO hardware resource to the object space to initialize the mapping relationship between the physical address and the virtual address in the virtual address space: Opening a specified device file, wherein the specified device file is a device file abstracted from the IO hardware resources connected to the IO interface set; The set of physical addresses of the IO hardware resources connected to the IO interface set in the designated device file is mapped into a virtual address space to obtain the target virtual address space.

3. The method according to claim 2, characterized in that After performing the access operation on the target physical address corresponding to the target virtual address, the method further includes: Call the physical address mapping exit function to perform the following mapping exit operation through the physical address mapping exit function, wherein the physical address mapping exit function is used to remove the mapping relationship between the physical address and the virtual address in the virtual address space: perform a demapping operation on the target virtual address space, and close the specified device file.

4. The method according to claim 3, characterized in that The performing a demapping operation on the target virtual address space includes: The demapping operation is performed on the target virtual address space according to the base address of the target virtual address space.

5. The method according to claim 1, wherein The determining, based on the base address of the target virtual address space and the target IO interface identifier, a target virtual address corresponding to the IO hardware resource to be accessed includes: performing a sum operation on a base address of the target virtual address space and a quotient of the target IO interface identifier divided by a preset number to obtain a target starting address, wherein the physical addresses corresponding to the IO interfaces in the IO interface set are divided into physical address spaces according to the preset number, the physical address space where the target physical address corresponding to the target IO identifier is located is the target physical address space, and the target starting address is a starting address mapped from the target physical address space to the target virtual address space; The target virtual address corresponding to the IO hardware resource to be accessed is determined according to the target starting address and a remainder obtained by dividing the target IO interface identifier by a preset number.

6. The method according to claim 5, characterized in that The determining, according to the target starting address and the remainder of the target IO interface identifier divided by a preset number, the target virtual address corresponding to the IO hardware resource to be accessed includes: A bitwise AND operation is performed on a shift result obtained by left-shifting the remainder of dividing the target IO interface identifier by a preset number and the target starting address to obtain the target virtual address corresponding to the IO hardware resource to be accessed.

7. The method according to claim 6, characterized in that The performing a sum operation on the base address of the target virtual address space and the quotient of the target IO interface identifier divided by a preset number to obtain the target starting address includes: performing a sum operation on the base address of the target virtual address space and the quotient of the target IO interface identifier divided by 32 to obtain the target starting address, wherein each physical space corresponds to 32 bits, which are used to represent 32 IO interfaces of the preset type; The method further comprises: performing a bitwise AND operation on a shift result obtained by left-shifting the remainder of dividing the target IO interface identifier by a preset number and the target starting address to obtain the target virtual address corresponding to the IO hardware resource to be accessed, including: performing a bitwise AND operation on a shift result obtained by left-shifting the remainder of dividing the target IO interface identifier by 32 and the target starting address to obtain the target virtual address corresponding to the IO hardware resource to be accessed.

8. The method according to claim 1, characterized in that The determining, based on the base address of the target virtual address space and the target IO interface identifier, a target virtual address corresponding to the IO hardware resource to be accessed includes: Determine an offset corresponding to the target IO interface identifier; The target virtual address corresponding to the to-be-accessed IO hardware resource is determined based on the target virtual address space and the offset.

9. The method according to claim 1, characterized in that The step of obtaining a target IO interface identifier corresponding to the input / output IO hardware resource to be accessed includes: Obtain the target IO interface identifier passed in by calling a preset access function interface, wherein the preset access function interface is used to access the physical address corresponding to the IO interface identified by the IO interface identifier passed in by the preset access function interface, so as to perform a preset interface operation on the IO interface identified by the IO interface identifier passed in by the preset access function interface.

10. The method according to claim 9, characterized in that The acquiring of the target IO interface identifier passed in by calling a preset access function interface includes: Obtain the target IO interface identifier passed in by calling the first access function interface, wherein the first access function interface is used to access the physical address corresponding to the IO interface identified by the IO interface identifier passed in by the first access function interface, so as to set the IO interface identified by the IO interface identifier passed in by the first access function interface to input mode.

11. The method according to claim 9, characterized in that The acquiring of the target IO interface identifier passed in by calling a preset access function interface includes: Obtain the target IO interface identifier passed in by calling the second access function interface, wherein the second access function interface is used to access the physical address corresponding to the IO interface identified by the IO interface identifier passed in by the second access function interface, so as to obtain the interface value of the IO interface identified by the IO interface identifier passed in by the second access function interface.

12. The method according to claim 9, characterized in that The acquiring of the target IO interface identifier passed in by calling a preset access function interface includes: Obtain the target IO interface identifier passed in by calling the third access function interface, wherein the third access function interface is used to access the physical address corresponding to the IO interface identified by the IO interface identifier passed in by the third access function interface, so as to set the IO interface identified by the IO interface identifier passed in by the third access function interface to output mode.

13. The method according to claim 9, characterized in that Before obtaining the target IO interface identifier passed in by calling a preset access function interface, the method further includes: The preset access function interface is configured according to the operation type of the preset interface operation to be performed.

14. The method according to any one of claims 1 to 13, characterized in that The method further comprises: When the target IO interface is in output mode, the following steps are executed cyclically to simulate a bus waveform signal of a specified frequency: Calling a fourth access function interface using the target IO interface identifier as an input parameter, wherein the fourth access function interface is used to access a physical address corresponding to the IO interface identified by the IO interface identifier passed in by the fourth access function interface, so as to set the IO interface identified by the IO interface identifier passed in by the fourth access function interface to a first value; The target sleep duration is the duration of a cycle that matches the specified frequency. Calling a fifth access function interface using the target IO interface identifier as an input parameter, wherein the fifth access function interface is used to access a physical address corresponding to the IO interface identified by the IO interface identifier passed in by the fifth access function interface, so as to set the IO interface identified by the IO interface identifier passed in by the fifth access function interface to a second value, wherein the first value and the second value are different values; Resleep for the target duration.

15. The method according to any one of claims 1 to 13, characterized in that The target IO interface is a general purpose input and output (GPIO) interface, the target IO interface identifier is a pin number of the target IO interface, and the target IO hardware resource is a complex programmable logic device; The performing an access operation on the target physical address corresponding to the target virtual address to access the target IO hardware resource corresponding to the target physical address includes: An access operation is performed on the target physical address corresponding to the target virtual address to access the complex programmable logic device corresponding to the target physical address to perform a firmware upgrade operation on the complex programmable logic device.

16. A hardware resource access device for an embedded system, characterized in that: include: an acquiring unit configured to acquire a target IO interface identifier corresponding to an input / output (IO) hardware resource to be accessed, wherein the target IO interface identifier is used to identify a position of the target IO interface to which the IO hardware resource to be accessed is connected in a set of IO interfaces of a preset type. a determining unit configured to determine a target virtual address corresponding to the IO hardware resource to be accessed based on a base address of a target virtual address space and the target IO interface identifier, wherein the target virtual address space is a virtual address space obtained by mapping a physical address of the IO hardware resource connected to the IO interface set to an object space; The first execution unit is configured to perform an access operation on a target physical address corresponding to the target virtual address, so as to access a target IO hardware resource corresponding to the target physical address.

17. The device according to claim 16, characterized in that The device further comprises: a first calling unit configured to call a physical address mapping initialization function before obtaining a target IO interface identifier corresponding to an input / output (IO) hardware resource to be accessed, so as to perform the following initialization operation through the physical address mapping initialization function, wherein the physical address mapping initialization function is used to map a physical address of the IO hardware resource into an object space to initialize a mapping relationship between the physical address and a virtual address in a virtual address space; An opening unit is configured to open a specified device file, wherein the specified device file is a device file abstracted from the IO hardware resources connected to the IO interface set; The mapping unit is configured to map a set of physical addresses of IO hardware resources connected to the IO interface set in the specified device file into a virtual address space to obtain a target virtual address space.

18. A server, characterized in that: The server includes: a baseboard management controller, which is connected to IO hardware resources through a set of input and output IO interfaces of a preset type, wherein the baseboard management controller is configured to execute the method described in any one of claims 1 to 15.

19. A computer-readable non-volatile storage medium, characterized in that: The computer non-volatile readable storage medium stores a computer program, wherein the computer program implements the method according to any one of claims 1 to 15 when executed by a processor.

20. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the method according to any one of claims 1 to 15 is implemented.

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