Imaging device and camera system

Abstract

An imaging device according to the present invention includes a plurality of pixels and a drive circuit. The drive circuit selectively performs rolling shutter driving and global shutter driving on the plurality of pixels in each of a plurality of continuous frame periods F1, F12, and F2.

Description

Imaging device and camera system

[0001] The present disclosure relates to an imaging device and a camera system.

[0002] Charge-coupled device (CCD) image sensors and complementary metal oxide semiconductor (CMOS) image sensors are widely used as imaging devices in digital cameras and the like. These image sensors have photodiodes formed on a semiconductor substrate. Also proposed is a structure in which a photoelectric conversion layer is disposed above a semiconductor substrate instead of a photodiode. An imaging device having such a structure is sometimes called a stacked imaging device.

[0003] Furthermore, imaging devices typically use a rolling shutter method, in which exposure and signal charge readout are performed sequentially for each row of the pixel array. With the rolling shutter method, the timing of the start and end of exposure differs for each row of the pixel array. This can result in distorted images of fast-moving objects, or brightness differences within the image when using a flash. Given these circumstances, there is a growing demand for a global shutter function, in which exposure starts and ends at the same time for all pixels in the pixel array.

[0004] For example, Patent Document 1 discloses an imaging device including a plurality of unit pixel cells, each including a first electrode connected to a charge accumulation region, a second electrode connected to a voltage supply circuit, and a photoelectric conversion layer located between the first electrode and the second electrode. In the imaging device disclosed in Patent Document 1, the voltage supply circuit supplies a first voltage to the second electrode during an exposure period, and supplies a second voltage different from the first voltage to the second electrode during a non-exposure period, thereby realizing a global shutter function.

[0005] International Publication No. 2017 / 094229

[0006] Imaging devices are used in a variety of environments. The present disclosure provides an imaging device and the like that can capture high-quality images suited to the environment in which it is used.

[0007] An imaging device according to one aspect of the present disclosure includes a plurality of pixels and a drive circuit, and the drive circuit selectively performs rolling shutter drive and global shutter drive on the plurality of pixels during each of a plurality of consecutive frame periods.

[0008] A camera system according to one aspect of the present disclosure includes the imaging device described above.

[0009] According to the present disclosure, it is possible to provide an imaging device or the like that is capable of capturing high-quality images suited to the environment in which it is used.

[0010] FIG. 1 is a schematic diagram showing an exemplary circuit configuration of an imaging device according to Embodiment 1. FIG. 2 is a cross-sectional view schematically showing an exemplary device structure of a pixel according to Embodiment 1. FIG. 3 is a timing chart for explaining Operation Example 1 of the imaging device according to Embodiment 1. FIG. 4 is a timing chart for explaining a modification of Operation Example 1 of the imaging device according to Embodiment 1. FIG. 5 is a diagram for explaining an example of switching of shutter drive by a drive circuit based on the length of an exposure period. FIG. 6 is a timing chart for explaining Operation Example 2 of the imaging device according to Embodiment 1. FIG. 7 is a timing chart for explaining a modification of Operation Example 2 of the imaging device according to Embodiment 1. FIG. 8 is a timing chart for explaining Operation Example 3 of the imaging device according to Embodiment 1. FIG. 9 is a timing chart for explaining Operation Example 4 of the imaging device according to Embodiment 1. FIG. 10 is a timing chart for explaining a modification of Operation Example 4 of the imaging device according to Embodiment 1. FIG. 11 is a timing chart for explaining Operation Example 5 of the imaging device according to Embodiment 1. FIG. 12 is a block diagram showing an example of the configuration of a camera system according to Embodiment 2.

[0011] (How One Aspect of the Present Disclosure Was Achieved) Before specifically describing the embodiments of the present disclosure, the problems and the like that the inventors of the present invention have found will be described.

[0012] Imaging devices are used in a variety of environments. Various functions have been considered to capture high-quality images in accordance with the various imaging environments. For example, imaging devices that realize a global shutter function that starts and ends exposure at the same timing for all pixels in a pixel array have been proposed for capturing images of fast-moving objects as described above.

[0013] Furthermore, in an imaging environment where the brightness changes, exposure control for appropriately adjusting the exposure amount is important. In an imaging device, the exposure amount is adjusted, for example, by adjusting the length of the exposure period. The exposure and exposure amount in an imaging device correspond to the generation of a signal by exposure and the amount of the signal generated by exposure.

[0014] When an imaging device captures images using a global shutter system that realizes a global shutter function, signals corresponding to charges generated by photoelectric conversion stored in a charge accumulation region during an exposure period are read out during a non-exposure period. In such a case, since a non-exposure period exists within a given frame period, the exposure period cannot be extended to the same length as the frame period. Therefore, in an imaging device that captures images using the global shutter system, if the surroundings become dark during imaging, simply adjusting the length of the exposure period may not ensure sufficient exposure, and the image quality may not be able to be adequately adjusted.

[0015] In this way, the inventors of the present application focused on expanding the range in which image quality can be adjusted, such as by expanding the adjustment range of exposure amount, in order to capture high-quality images in response to changes in the environment in which the device is used.

[0016] Therefore, the present disclosure provides an imaging device, etc., that is capable of capturing high-quality images that suit the environment in which it is used, by expanding the range in which image quality can be adjusted in response to changes in the environment in which it is used.

[0017] (Summary of the Present Disclosure) As an overview of the present disclosure, examples of an imaging device and a camera system according to the present disclosure are described below.

[0018] For example, an imaging device according to a first aspect of the present disclosure includes a plurality of pixels and a drive circuit, and the drive circuit selectively performs rolling shutter drive and global shutter drive on the plurality of pixels during each of a plurality of consecutive frame periods.

[0019] As a result, in rolling shutter drive, the readout period for signal readout can overlap with the exposure period of pixels in other rows, allowing the length of the exposure period to be longer than in global shutter drive. Therefore, by selectively performing rolling shutter drive and global shutter drive, the adjustment range of the exposure period can be expanded. Furthermore, since rolling shutter drive and global shutter drive are selectively performed in each of multiple consecutive frame periods, the shutter drive is seamlessly switched, allowing the exposure amount to be adjusted in immediate response to changes in the environment in which the imaging device is used. Furthermore, when the exposure amount is sufficient, global shutter drive can be used to obtain an image in which the exposure timing of all pixels is synchronized. Therefore, the imaging device according to this aspect can capture high-quality images suited to the environment in which it is used by expanding the range in which image quality can be adjusted in response to changes in the environment in which it is used.

[0020] Also, for example, an imaging device according to a second aspect of the present disclosure is an imaging device according to the first aspect, wherein the drive circuit switches between performing rolling shutter drive and global shutter drive for the plurality of pixels based on the length of each exposure period of the plurality of frame periods.

[0021] This allows the drive circuit to select an appropriate shutter drive depending on the length of the exposure period.

[0022] Furthermore, for example, an imaging device according to a third aspect of the present disclosure is the imaging device according to the first or second aspect, wherein the drive circuit performs rolling shutter drive on the plurality of pixels during a frame period among the plurality of frame periods in which the length of the exposure period is within a first range, and performs global shutter drive on the plurality of pixels during a frame period among the plurality of frame periods in which the length of the exposure period is within a second range that is shorter than the first range.

[0023] As a result, the length of the exposure period that cannot be achieved when global shutter driving is performed can be achieved by rolling shutter driving, and the range in which the exposure amount can be adjusted can be widened.

[0024] Furthermore, for example, an imaging device according to a fourth aspect of the present disclosure is the imaging device according to the third aspect, wherein, during a frame period among the plurality of frame periods in which the length of the exposure period is within a third range between the first range and the second range, the drive circuit causes the plurality of pixels to perform the same shutter drive as in the frame period immediately preceding the frame period.

[0025] This reduces the frequency of switching between shutter drives, reduces the processing load of drive control, and suppresses changes in the quality of images generated during successive frame periods.

[0026] Furthermore, for example, an imaging device according to a fifth aspect of the present disclosure is an imaging device according to any one of the first to fourth aspects, in which the timing of the readout operation of the signals of the plurality of pixels relative to the start of the frame period is the same in each of the plurality of frame periods.

[0027] This eliminates the need to change the drive settings for the readout operation even when the shutter drive is switched, making it easier to control the drive of multiple pixels.In addition, the timing of image output from the imaging device is the same for each frame period, eliminating the need to change the settings for the image acquisition timing in subsequent processing.

[0028] Also, for example, an imaging device according to a sixth aspect of the present disclosure is an imaging device according to any one of the first to fifth aspects, wherein each of the plurality of pixels includes a photoelectric conversion layer that converts light into signal charges, a first electrode that collects the signal charges, and a second electrode that faces the first electrode via the photoelectric conversion layer.

[0029] This makes it possible to realize global shutter driving by controlling the potential difference between the first electrode and the second electrode.

[0030] Also, for example, an imaging device according to a seventh aspect of the present disclosure is the imaging device according to the sixth aspect, further comprising a voltage supply circuit connected to the second electrode, wherein the drive circuit causes the voltage supply circuit to supply a first voltage to the second electrode during an exposure period in a frame period in which global shutter driving is performed among the plurality of frame periods, and to supply a second voltage to the second electrode during a non-exposure period, and to supply the first voltage to the second electrode during a frame period in which rolling shutter driving is performed among the plurality of frame periods.

[0031] This makes it possible to realize global shutter driving by controlling the supply of the second voltage.

[0032] Furthermore, for example, an imaging device according to an eighth aspect of the present disclosure is the imaging device according to the seventh aspect, wherein the drive circuit causes the plurality of pixels to perform rolling shutter drive during a first frame period of the plurality of frame periods, causes the plurality of pixels to perform global shutter drive during a second frame period following the first frame period of the plurality of frame periods, and during the second frame period, while causing the voltage supply circuit to supply the first voltage to the second electrode, causes the voltage supply circuit to perform a signal read operation on the plurality of pixels after exposure that began during the first frame period, and then switches the voltage that the voltage supply circuit causes to supply to the second electrode from the first voltage to the second voltage, and causes the plurality of pixels to perform a reset operation while the voltage supplied to the second electrode is the second voltage.

[0033] As a result, since the first voltage is supplied to the second electrode during the signal readout operation in the second frame period, an image can be obtained in which the exposure periods of the plurality of pixels that started in the first frame period have the same length for each row, and therefore, even in the frame period in which the driving mode is switched from rolling shutter driving to global shutter driving, an image can be obtained in which the exposure periods of the plurality of pixels have the same length for each row, and smooth switching of the shutter driving can be achieved.

[0034] Furthermore, for example, an imaging device according to a ninth aspect of the present disclosure is the imaging device according to the seventh or eighth aspect, wherein the drive circuit causes the plurality of pixels to perform global shutter drive during a third frame period of the plurality of frame periods, causes the plurality of pixels to perform rolling shutter drive during a fourth frame period following the third frame period of the plurality of frame periods, and during the fourth frame period, causes the voltage supply circuit to supply the second voltage to the second electrode while causing the voltage supply circuit to perform a signal readout operation on the plurality of pixels after exposure during the exposure period in the third frame period, and then switches the voltage that the voltage supply circuit causes to supply to the second electrode from the second voltage to the first voltage.

[0035] As a result, since the second voltage is supplied to the second electrode during the signal readout operation in the fourth frame period, an image can be obtained in which the length of the exposure period of the plurality of pixels that started in the third frame period is the same for each row, and therefore, even in the frame period in which the global shutter drive is switched to the rolling shutter drive, an image can be obtained in which the length of the exposure period of the plurality of pixels is the same for each row, and smooth switching of the shutter drive can be realized.

[0036] Furthermore, for example, an imaging device according to a tenth aspect of the present disclosure is the imaging device according to any one of the seventh to ninth aspects, wherein the drive circuit causes the plurality of pixels to perform global shutter drive during a fifth frame period of the plurality of frame periods, causes the plurality of pixels to perform rolling shutter drive during a sixth frame period following the fifth frame period of the plurality of frame periods, causes the voltage supply circuit to supply the second voltage to the second electrode during the sixth frame period, causes the voltage supply circuit to perform a signal readout operation on the plurality of pixels after exposure during the exposure period in the fifth frame period, and then switches the voltage to be supplied to the second electrode by the voltage supply circuit from the second voltage to the first voltage, and causes the voltage supply circuit to alternately supply the first voltage and the second voltage to the second electrode during a period in which all of the plurality of pixels are exposed.

[0037] As a result, during the signal readout operation in the sixth frame period, the second voltage is supplied to the second electrode, thereby enabling an image to be obtained in which the length of the exposure period of the plurality of pixels that began in the fifth frame period is the same for each row. Therefore, even during the frame period in which global shutter driving is switched to rolling shutter driving, an image in which the length of the exposure period of the plurality of pixels is the same for each row can be obtained, enabling smooth switching of the shutter driving. Furthermore, by alternately supplying the first and second voltages to the second electrode during the sixth frame period, the sensitivity is adjusted, allowing the exposure amount to be reduced. Therefore, during the sixth frame period, the exposure amount can be reduced without shortening the length of the exposure period, thereby suppressing flicker, which can occur when capturing images using a flashing light source. Therefore, an image in which changes in exposure amount are suppressed between successive frame periods while suppressing flicker can be obtained.

[0038] Also, for example, an imaging device according to an eleventh aspect of the present disclosure is the imaging device according to any one of the sixth to tenth aspects, further comprising a voltage supply circuit connected to the second electrode, wherein the drive circuit causes the voltage supply circuit to alternately supply a first voltage and a second voltage to the second electrode during an exposure period in a frame period in which global shutter drive is performed among the plurality of frame periods, and to supply the second voltage to the second electrode during a non-exposure period.

[0039] When capturing an image of a light source that blinks during a single period in which the first voltage is supplied to the second electrode, if the timing of the blinking does not coincide with the timing of the supply of the first voltage, a flicker phenomenon occurs. In contrast, by alternately supplying the first voltage and the second voltage to the second electrode, the sensitivity is adjusted, making it possible to reduce the amount of exposure, and the timing of the supply of the first voltage is dispersed, allowing the blinking light source to be captured at multiple times, thereby suppressing the occurrence of a flicker phenomenon.

[0040] Furthermore, for example, an imaging device according to a twelfth aspect of the present disclosure is the imaging device according to the eleventh aspect, wherein the drive circuit selectively causes the voltage supply circuit to alternately supply the first voltage and the second voltage to the second electrode during an exposure period, and to continue supplying the first voltage to the second electrode during an exposure period, in each of two or more consecutive frame periods in which global shutter driving is performed among the plurality of frame periods.

[0041] This allows the imaging device to adjust the exposure amount while suppressing the occurrence of flicker without changing the shutter drive. Furthermore, by combining adjustment of the length of the exposure period with adjustment of the time during which the first voltage is supplied to the second electrode, more precise exposure control becomes possible.

[0042] Also, for example, an imaging device according to a thirteenth aspect of the present disclosure is an imaging device according to any one of the sixth to twelfth aspects, further comprising a voltage supply circuit connected to the second electrode, wherein the drive circuit causes the voltage supply circuit to alternately supply a first voltage and a second voltage to the second electrode during a frame period in which rolling shutter drive is performed among the plurality of frame periods, during a period in which all of the plurality of pixels are exposed.

[0043] When capturing an image of a light source that blinks during a single period in which the first voltage is supplied to the second electrode, if the timing of the blinking does not coincide with the timing of the supply of the first voltage, a flicker phenomenon occurs. In contrast, by alternately supplying the first voltage and the second voltage to the second electrode, the sensitivity is adjusted, making it possible to reduce the amount of exposure, and the timing of the supply of the first voltage is dispersed, allowing the blinking light source to be captured at multiple times, thereby suppressing the occurrence of a flicker phenomenon.

[0044] Furthermore, for example, an imaging device according to a fourteenth aspect of the present disclosure is the imaging device according to the thirteenth aspect, wherein the drive circuit selectively causes the voltage supply circuit to alternately supply the first voltage and the second voltage to the second electrode during a period in which all of the plurality of pixels are exposed, in each of two or more consecutive frame periods in which rolling shutter drive is performed among the plurality of frame periods, and to continue supplying the first voltage to the second electrode during a period in which all of the plurality of pixels are exposed.

[0045] This allows the imaging device to adjust the exposure amount while suppressing the occurrence of flicker without changing the shutter drive. Furthermore, by combining adjustment of the length of the exposure period with adjustment of the time during which the first voltage is supplied to the second electrode, more precise exposure control becomes possible.

[0046] Also, for example, a camera system according to a fifteenth aspect of the present disclosure includes the imaging device according to any one of the first to fourteenth aspects.

[0047] As a result, the camera system according to this aspect includes the imaging device described above, and is therefore able to capture high-quality images suited to the environment in which it is used.

[0048] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. Note that the embodiments described below are all comprehensive or specific examples. The numerical values, shapes, materials, components, component arrangements and connection forms, steps, and step orders shown in the following embodiments are merely examples and are not intended to limit the present disclosure. Various aspects described in this specification can be combined with each other unless a contradiction arises. Furthermore, among the components in the following embodiments, components not recited in independent claims are described as optional components. In the following description, components having substantially the same functions are denoted by common reference symbols, and their description may be omitted. Furthermore, to avoid overly complicated drawings, some elements may be omitted. Furthermore, each figure is a schematic diagram and is not necessarily a precise illustration.

[0049] Furthermore, in this specification, terms indicating relationships between elements, such as "equal," terms indicating the shapes of elements, such as "square" or "circle," and numerical ranges are not expressions that express only the strict meaning, but are expressions that also include a substantially equivalent range, for example, a difference of about a few percent.

[0050] First Embodiment An imaging device according to a first embodiment will be described below.

[0051] [Configuration] FIG. 1 is a schematic diagram showing an exemplary circuit configuration of an imaging device 100 according to the present embodiment.

[0052] As shown in Fig. 1, the imaging device 100 has a pixel array PA including a plurality of pixels 10 arranged two-dimensionally, peripheral circuits connected to each pixel 10, and a drive circuit 39. The peripheral circuits include, for example, a voltage supply circuit 32, a reset voltage source 34, a vertical scanning circuit 36, a column signal processing circuit 37, and a horizontal signal readout circuit 38. Fig. 1 schematically shows an example in which the pixels 10 are arranged in a matrix of two rows and two columns. The number and arrangement of the pixels 10 in the imaging device 100 are not limited to the example shown in Fig. 1.

[0053] Each pixel 10 has a photoelectric conversion unit 13 and a signal detection circuit 14. As will be described later with reference to the drawings, the photoelectric conversion unit 13 has a photoelectric conversion layer sandwiched between two opposing electrodes, and generates electric charges upon receiving incident light. The entire photoelectric conversion unit 13 does not need to be an independent element for each pixel 10, and for example, a portion of the photoelectric conversion unit 13 may span multiple pixels 10.

[0054] The signal detection circuit 14 is a circuit that detects signals based on charges generated by the photoelectric conversion unit 13. In the example shown in FIG. 1 , the signal detection circuit 14 includes a signal detection transistor 24 and an address transistor 26. The signal detection transistor 24 and the address transistor 26 are, for example, field effect transistors (FETs). Here, N-channel MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) are used as the signal detection transistor 24 and the address transistor 26. Each transistor, such as the signal detection transistor 24, the address transistor 26, and a reset transistor 28 (described later), has a control terminal, an input terminal, and an output terminal. The control terminal is, for example, a gate. The input terminal is one of the drain and the source, for example, the drain. The output terminal is the other of the drain and the source, for example, the source.

[0055] As shown schematically in FIG. 1 , the control terminal of the signal detection transistor 24 is electrically connected to the photoelectric conversion unit 13. Charges generated by the photoelectric conversion unit 13 are accumulated in a charge accumulation node 41 between the gate of the signal detection transistor 24 and the photoelectric conversion unit 13. Here, the charges are holes and electrons. The charge accumulation node 41 is also called a "floating diffusion node." The charge accumulation node 41 is at least a part of a charge accumulation region that accumulates the charges generated by the photoelectric conversion unit 13. The structure of the photoelectric conversion unit 13 will be described in detail later.

[0056] The photoelectric conversion unit 13 of each pixel 10 is further connected to a sensitivity control line 42. In the configuration illustrated in FIG. 1 , the sensitivity control line 42 is connected to a voltage supply circuit 32. The voltage supply circuit 32 is also referred to as a sensitivity control electrode supply circuit. The voltage supply circuit 32 is configured to be able to supply at least two types of voltage. During operation of the imaging device 100, the voltage supply circuit 32 supplies a predetermined voltage to the photoelectric conversion unit 13 via the sensitivity control line 42. The voltage supply circuit 32 is not limited to a specific power supply circuit, and may be a circuit that generates a predetermined voltage or a circuit that converts a voltage supplied from another power source to a predetermined voltage. As will be described in detail later, when the imaging device 100 performs global shutter driving, the voltage supplied from the voltage supply circuit 32 to the photoelectric conversion unit 13 is switched between multiple different voltages, thereby controlling the start and end of charge accumulation from the photoelectric conversion unit 13 to the charge accumulation node 41. An example of the operation of the imaging device 100 will be described later.

[0057] Each pixel 10 is connected to a power supply line 40 that supplies a power supply voltage VDD. As shown in Fig. 1 , an input terminal of a signal detection transistor 24 is connected to the power supply line 40. The power supply line 40 functions as a source follower power supply, so that the signal detection transistor 24 amplifies and outputs a signal corresponding to the charge generated by the photoelectric conversion unit 13.

[0058] An input terminal of an address transistor 26 is connected to an output terminal of the signal detection transistor 24. The output terminal of the address transistor 26 is connected to one of a plurality of vertical signal lines 47 arranged for each column of the pixel array PA. A control terminal of the address transistor 26 is connected to an address control line 46, and by controlling the potential of the address control line 46, the output of the signal detection transistor 24 can be selectively read out to the corresponding vertical signal line 47.

[0059] 1 , the address control lines 46 are connected to the vertical scanning circuit 36. The vertical scanning circuit 36 ​​is also called a "row scanning circuit." The vertical scanning circuit 36 ​​applies a predetermined voltage to the address control lines 46 to select a plurality of pixels 10 arranged in each row on a row-by-row basis. This reads out the signals from the selected pixels 10 and resets the potentials of the charge storage nodes 41 of the selected pixels 10 and the pixel electrodes, which will be described later.

[0060] The vertical signal lines 47 are main signal lines that transmit pixel signals from the pixel array PA to peripheral circuits. Column signal processing circuits 37 are connected to the vertical signal lines 47. The column signal processing circuits 37 are also called "row signal accumulation circuits." The column signal processing circuits 37 perform noise suppression signal processing, such as correlated double sampling, and analog-to-digital conversion (AD conversion). As shown in FIG. 1 , a column signal processing circuit 37 is provided corresponding to each column of pixels 10 in the pixel array PA. Horizontal signal readout circuits 38 are connected to these column signal processing circuits 37. The horizontal signal readout circuits 38 are also called "column scanning circuits." The horizontal signal readout circuits 38 sequentially read out signals from the multiple column signal processing circuits 37 to a horizontal common signal line 49.

[0061] 1, the pixel 10 has a reset transistor 28. The reset transistor 28 may be, for example, a field effect transistor, similar to the signal detection transistor 24 and the address transistor 26. Unless otherwise specified, the following describes an example in which an N-channel MOSFET is used as the reset transistor 28.

[0062] 1 , the reset transistor 28 is connected between a reset voltage line 44 that supplies a reset voltage Vr and the charge storage node 41. A control terminal of the reset transistor 28 is connected to a reset control line 48, and the potential of the charge storage node 41 can be reset to the reset voltage Vr by controlling the potential of the reset control line 48. In this example, the reset control line 48 is connected to the vertical scanning circuit 36. Therefore, by the vertical scanning circuit 36 ​​applying a predetermined voltage to the reset control line 48, it is possible to reset the plurality of pixels 10 arranged in each row on a row-by-row basis.

[0063] In this example, a reset voltage line 44 that supplies a reset voltage Vr to the reset transistor 28 is connected to the reset voltage source 34. The reset voltage source 34 is also referred to as a "reset voltage supply circuit." The reset voltage source 34 is not limited to a specific power supply circuit, as long as it has a configuration that allows it to supply a predetermined reset voltage Vr to the reset voltage line 44 during operation of the imaging device 100. Similarly to the voltage supply circuit 32 described above, the reset voltage source 34 is not limited to a specific power supply circuit. The voltage supply circuit 32 and the reset voltage source 34 may each be part of a single voltage supply circuit or may be separate, independent voltage supply circuits. One or both of the voltage supply circuit 32 and the reset voltage source 34 may be part of the vertical scanning circuit 36. Alternatively, the sensitivity control voltage from the voltage supply circuit 32 and / or the reset voltage Vr from the reset voltage source 34 may be supplied to each pixel 10 via the vertical scanning circuit 36.

[0064] It is also possible to use the power supply voltage VDD of the signal detection circuit 14 as the reset voltage Vr. In this case, a voltage supply circuit (not shown in FIG. 1 ) that supplies a power supply voltage to each pixel 10 and the reset voltage source 34 can be shared. Furthermore, since the power supply line 40 and the reset voltage line 44 can be shared, the wiring in the pixel array PA can be simplified. However, using different voltages for the reset voltage Vr and the power supply voltage VDD of the signal detection circuit 14 allows for more flexible control of the imaging device 100.

[0065] The drive circuit 39 controls the drive of the imaging device 100. The drive circuit 39 controls, for example, the voltage supply circuit 32 and the vertical scanning circuit 36 ​​to cause the plurality of pixels 10 to perform an electronic shutter operation, a signal readout operation, and a reset operation. The drive circuit 39 selectively causes the plurality of pixels 10 to perform rolling shutter drive or global shutter drive during each of a plurality of consecutive frame periods. Details of the drive control by the drive circuit 39 will be described later. The drive circuit 39 may further control the drive of at least one of the reset voltage source 34, the column signal processing circuit 37, and the horizontal signal readout circuit 38.

[0066] The drive circuit 39 may be realized by, for example, a microcontroller including one or more processors. The functions of the drive circuit 39 may be realized by a combination of a general-purpose processing circuit and software, or by hardware specialized for such processing.

[0067] Next, the cross-sectional structure of the pixel 10 of the imaging device 100 according to the present embodiment will be described.

[0068] 2 is a cross-sectional view schematically illustrating an exemplary device structure of a pixel 10 according to the present embodiment. In the configuration illustrated in FIG. 2, the signal detection transistor 24, address transistor 26, and reset transistor 28 described above are formed on a semiconductor substrate 20. The semiconductor substrate 20 is not limited to a substrate made entirely of semiconductor. The semiconductor substrate 20 may be an insulating substrate having a semiconductor layer provided on the surface on which the photosensitive region is formed. Here, an example will be described in which a P-type silicon (Si) substrate is used as the semiconductor substrate 20.

[0069] The semiconductor substrate 20 has impurity regions 26s, 24s, 24d, 28d, and 28s, and an element isolation region 20t for electrical isolation between the pixels 10. Here, the impurity regions 26s, 24s, 24d, 28d, and 28s are N-type regions. The element isolation region 20t is also provided between the impurity region 24d and the impurity region 28d. The element isolation region 20t is formed, for example, by implanting acceptor ions under predetermined implantation conditions.

[0070] The impurity regions 26s, 24s, 24d, 28d, and 28s are, for example, diffusion layers formed in the semiconductor substrate 20. As schematically shown in FIG. 2, the signal detection transistor 24 includes impurity regions 24s and 24d and a gate electrode 24g. The impurity region 24s functions as, for example, a source region of the signal detection transistor 24. The impurity region 24d functions as, for example, a drain region of the signal detection transistor 24. A channel region of the signal detection transistor 24 is formed between the impurity regions 24s and 24d.

[0071] Similarly, the address transistor 26 includes impurity regions 26s and 24s and a gate electrode 26g connected to an address control line 46 (see FIG. 1). In this example, the signal detection transistor 24 and the address transistor 26 are electrically connected to each other by sharing the impurity region 24s. The impurity region 26s functions as, for example, a source region of the address transistor 26. The impurity region 26s is connected to a vertical signal line 47 (see FIG. 1), not shown in FIG. 2.

[0072] The reset transistor 28 includes impurity regions 28d and 28s and a gate electrode 28g connected to a reset control line 48 (see FIG. 1). The impurity region 28s functions as, for example, a source region of the reset transistor 28. The impurity region 28s is connected to a reset voltage line 44 (see FIG. 1), not shown in FIG. 2. The impurity region 28d functions as, for example, a drain region of the reset transistor 28.

[0073] The gate electrodes 24g, 26g, and 28g are each formed using a conductive material, such as polysilicon that has been doped with impurities to make it conductive, but may also be a metal material.

[0074] An interlayer insulating layer 50 is disposed on the semiconductor substrate 20 so as to cover the signal detection transistor 24, the address transistor 26, and the reset transistor 28. The interlayer insulating layer 50 is formed of an insulating material such as silicon oxide. As shown in FIG. 2 , a wiring layer 56 may be disposed in the interlayer insulating layer 50. The wiring layer 56 is formed of a metal such as copper. The wiring layer 56 may include, for example, wiring such as the vertical signal line 47 described above. The number of insulating layers in the interlayer insulating layer 50 and the number of layers included in the wiring layer 56 disposed in the interlayer insulating layer 50 can be set arbitrarily and are not limited to the example shown in FIG. 2 .

[0075] The above-described photoelectric conversion unit 13 is disposed on the interlayer insulating layer 50. In other words, in this embodiment, a plurality of pixels 10 constituting a pixel array PA (see FIG. 1 ) are formed on a semiconductor substrate 20. The plurality of pixels 10 arranged two-dimensionally on the semiconductor substrate 20 form a photosensitive region (pixel region). The distance between two adjacent pixels 10 can be, for example, about 2 μm. The distance between two adjacent pixels 10 is also called the "pixel pitch."

[0076] The photoelectric conversion unit 13 includes a pixel electrode 11, a counter electrode 12, and a photoelectric conversion layer 15 disposed therebetween. The pixel electrode 11 is an example of a first electrode, and the counter electrode 12 is an example of a second electrode. In this example, the counter electrode 12 and the photoelectric conversion layer 15 are formed across multiple pixels 10. On the other hand, the pixel electrode 11 is provided for each pixel 10, and is spatially separated from the pixel electrodes 11 of adjacent pixels 10, thereby electrically separating them from the pixel electrodes 11 of the other pixels 10.

[0077] The photoelectric conversion layer 15 receives incident light and generates hole-electron pairs, which are pairs of electric charges. The charges generated in the photoelectric conversion layer 15 are used as signal charges. In other words, the photoelectric conversion layer 15 converts light into signal charges. The photoelectric conversion layer 15 is formed, for example, from an organic semiconductor material. The photoelectric conversion layer 15 includes, for example, a donor material and an acceptor material. The photoelectric conversion layer 15 may also be formed from an inorganic semiconductor material. The photoelectric conversion layer 15 may also have a stacked structure of multiple layers.

[0078] The counter electrode 12 is disposed opposite the pixel electrode 11 via the photoelectric conversion layer 15. The counter electrode 12 is, for example, a transparent electrode formed from a transparent conductive material. The counter electrode 12 is disposed on the light-incident side of the photoelectric conversion layer 15. Therefore, light transmitted through the counter electrode 12 is incident on the photoelectric conversion layer 15. Note that the light detected by the imaging device 100 is not limited to light within the wavelength range of visible light (e.g., 380 nm to 780 nm). In this specification, "transparent" means transmitting at least a portion of the light within the wavelength range to be detected, but does not necessarily mean transmitting light across the entire wavelength range of visible light. For convenience, the term "light" is used in this specification to refer to electromagnetic waves in general, including infrared and ultraviolet rays. The counter electrode 12 may be formed of, for example, ITO, IZO, AZO, FTO, SnO, etc. ２ , TiO ２ , ZnO ２ Transparent conducting oxides (TCOs) such as the above can be used.

[0079] The counter electrode 12 is connected to a sensitivity control line 42 that is connected to the voltage supply circuit 32 described with reference to FIG. 1 . Here, the counter electrode 12 is formed across a plurality of pixels 10. Therefore, a sensitivity control voltage of a desired magnitude can be applied collectively between a plurality of pixels 10 from the voltage supply circuit 32 via the sensitivity control line 42. Note that, as long as a sensitivity control voltage of a desired magnitude can be applied from the voltage supply circuit 32, the counter electrode 12 may be provided separately for each pixel 10. Similarly, the photoelectric conversion layer 15 may be provided separately for each pixel 10.

[0080] The voltage supply circuit 32 is connected to the counter electrode 12 and applies a voltage to the counter electrode 12 to create a potential difference between the pixel electrode 11 and the counter electrode 12. As will be described in detail later, when global shutter driving is performed, the voltage supply circuit 32 supplies different voltages to the counter electrode 12 during an exposure period and a non-exposure period. In this specification, the term "exposure period" refers to a period during which one of positive and negative charges generated by photoelectric conversion is accumulated in a charge accumulation region as a signal charge, and may also be referred to as a "charge accumulation period." In this specification, a period other than the exposure period during operation of the imaging device is referred to as a "non-exposure period." The "non-exposure period" is not limited to a period during which light is blocked from entering the photoelectric conversion unit 13, but may also include a period during which light is irradiated onto the photoelectric conversion unit 13. The "non-exposure period" also includes a period during which charge is unintentionally accumulated in the charge accumulation region due to the occurrence of parasitic sensitivity.

[0081] In global shutter driving, an electronic shutter operation is performed and an exposure period begins by switching the voltage supplied to the counter electrode 12 by the voltage supply circuit 32. On the other hand, in rolling shutter driving, an electronic shutter operation is performed and an exposure period begins by performing a reset operation of the pixel 10 while the voltage supply circuit 32 supplies a constant voltage to the counter electrode 12.

[0082] By controlling the potential of the counter electrode 12 relative to the potential of the pixel electrode 11, the pixel electrode 11 can collect either the hole or the electron charge of the hole-electron pairs generated in the photoelectric conversion layer 15 by photoelectric conversion. The charge collected by the pixel electrode 11 is accumulated in the charge accumulation region as signal charge. For example, when collecting holes as signal charge, the pixel electrode 11 can selectively collect the holes by setting the potential of the counter electrode 12 higher than that of the pixel electrode 11. Furthermore, when collecting electrons as signal charge, the pixel electrode 11 can selectively collect the electrons by setting the potential of the counter electrode 12 lower than that of the pixel electrode 11.

[0083] The pixel electrode 11 facing the counter electrode 12 collects, as a signal charge, one of the positive and negative charges generated by photoelectric conversion in the photoelectric conversion layer 15 by applying an appropriate potential difference between the counter electrode 12 and the pixel electrode 11 as described above. The pixel electrode 11 is formed from, for example, a metal such as aluminum or copper, a metal nitride, or polysilicon that has been doped with impurities to make it conductive.

[0084] The pixel electrode 11 may be a light-shielding electrode. For example, forming a 100 nm-thick TaN electrode as the pixel electrode 11 can achieve sufficient light-shielding properties. By using the pixel electrode 11 as a light-shielding electrode, it is possible to suppress the incidence of light passing through the photoelectric conversion layer 15 into the channel regions or impurity regions of transistors (in this example, at least one of the signal detection transistor 24, address transistor 26, and reset transistor 28) formed in the semiconductor substrate 20. A light-shielding film may be formed in the interlayer insulating layer 50 using the above-mentioned wiring layer 56. By suppressing the incidence of light into the channel regions of the transistors formed in the semiconductor substrate 20, it is possible to suppress shifts in transistor characteristics (e.g., fluctuations in threshold voltage). Furthermore, by suppressing the incidence of light into the impurity regions formed in the semiconductor substrate 20, it is possible to suppress the introduction of noise due to unintended photoelectric conversion in the impurity regions. In this way, suppressing the incidence of light into the semiconductor substrate 20 contributes to improving the reliability of the imaging device 100.

[0085] As shown in FIG. 2 , the pixel electrode 11 is connected to the gate electrode 24g of the signal detection transistor 24 via a plug 52, a wiring 53, and a contact plug 54. In other words, the gate of the signal detection transistor 24 is electrically connected to the pixel electrode 11. The plug 52 and the wiring 53 are formed of a metal such as copper. The plug 52, the wiring 53, and the contact plug 54 constitute at least a part of the charge storage node 41 (see FIG. 1 ) between the signal detection transistor 24 and the photoelectric conversion unit 13. The wiring 53 may be part of a wiring layer 56. The pixel electrode 11 is also connected to the impurity region 28d via the plug 52, the wiring 53, and a contact plug 55. In the configuration shown in FIG. 2 , the gate electrode 24g of the signal detection transistor 24, the plug 52, the wiring 53, the contact plugs 54 and 55, and the impurity region 28d, which is one of the source and drain regions of the reset transistor 28, function as a charge storage region that stores the charge collected by the pixel electrode 11.

[0086] As the signal charge is collected by the pixel electrode 11, a voltage corresponding to the amount of signal charge accumulated in the charge accumulation region is applied to the gate of the signal detection transistor 24. The signal detection transistor 24 amplifies this voltage. The voltage amplified by the signal detection transistor 24 is selectively read out as a signal voltage via the address transistor 26. The signal corresponding to the amount of signal charge accumulated during the exposure period is also referred to as a pixel signal.

[0087] [Operation of Imaging Device] Next, the operation of the imaging device 100 according to this embodiment will be described. The circuits of the multiple pixels 10 of the imaging device 100 are driven under the control of the drive circuit 39. The following describes the operation of the pixels 10 from row 0 to row n in the pixel array PA of the imaging device 100, where n is a natural number. Note that the rows 0 to n correspond to the order in which the readout operation, etc., described below, is performed on the pixels 10, and do not necessarily correspond to the actual row arrangement of the pixels 10 in the pixel array PA. The pixel array PA may also include pixels 10 other than the pixels 10 from row 0 to row n. The following describes the case in which holes are used as signal charges.

[0088] (1) Operation Example 1 First, a description will be given of Operation Example 1 of the imaging device 100. In Operation Example 1, an example of the operation of the imaging device 100 when switching from rolling shutter driving to global shutter driving during a plurality of consecutive frame periods will be described.

[0089] 3 is a timing chart for explaining a first operation example of the imaging device 100 according to the present embodiment. Fig. 3 shows the timing of the falling (or rising) edges of the vertical synchronization signal VD, the temporal change in the voltage applied to the counter electrode 12 of the photoelectric conversion unit 13, the driving of the entire plurality of pixels 10, and the reset operation, signal readout operation, and exposure operation for each row of the pixel array PA of the plurality of pixels 10. In Fig. 3, the further to the right the image, the more time passes.

[0090] "VD" in the top graph in FIG. 3 indicates the timing of the falling (or rising) edges of the vertical synchronization signal VD supplied to the imaging device 100. The imaging device 100 may generate the vertical synchronization signal. In the example shown in FIG. 3, one frame period is the period from the falling (or rising) edge of one vertical synchronization signal VD to the falling (or rising) edge of the next vertical synchronization signal VD. Therefore, in the example shown in FIG. 3, one frame period is the period from the start of a readout period C (described later) to just before the start of the next readout period C. Furthermore, the interval between the falling (or rising) edges of the vertical synchronization signal VD is the length T0 of one frame period. For example, one image is generated by the operation of the imaging device 100 during one frame period.

[0091] 3, the second graph from the top, "Counter Electrode Voltage," shows the change over time in the voltage applied to the counter electrode 12 from the voltage supply circuit 32 via the sensitivity control line 42. In the example shown in Fig. 3, the voltage supply circuit 32 switches the voltage applied to the counter electrode 12 between a first voltage VH and a second voltage VL.

[0092] The first voltage VH is a voltage that makes the potential of the counter electrode 12 sufficiently higher than that of the pixel electrode 11. As a result, in each pixel 10, holes, which are signal charges generated by photoelectric conversion in the photoelectric conversion layer 15, move to the pixel electrode 11 and are accumulated in the charge storage node 41. In other words, the first voltage VH is a voltage that, when supplied to the counter electrode 12, causes the pixel 10 to become sensitive. The difference between the first voltage VH and the reset voltage Vr is, for example, 5 V or more and 15 V or less.

[0093] The second voltage VL is a voltage that does not substantially cause the movement of signal charges in the photoelectric conversion unit 13. Specifically, the second voltage VL is a voltage that causes the potential difference between the pixel electrode 11 and the counter electrode 12 to be smaller than when the first voltage VH is supplied, for example, a voltage that causes the potential difference to be close to zero. As a result, even when light is incident on the photoelectric conversion unit 13, holes and electrons generated before being collected by the pixel electrode 11 recombine, the generated signal charge is not collected by the pixel electrode 11, and the amount of signal charge accumulated in the charge storage node 41 does not change. In other words, the second voltage VL is a voltage that does not substantially cause sensitivity in the pixel 10 when supplied to the counter electrode 12. The difference between the second voltage VL and the reset voltage Vr is, for example, 2 V or less.

[0094] The two sections at the bottom of Figure 3, "Pixel Driving" and "Operation of Each Row", respectively show the timing of driving the entire plurality of pixels 10 and the operation of each row of the pixel array PA of the plurality of pixels 10.

[0095] "Pixel driving" shows a reset period A in which a reset operation of a plurality of pixels 10 is performed sequentially row by row, an exposure period B in which each row of a plurality of pixels 10 is exposed to light, and a readout period C in which a readout operation of a plurality of pixels 10 is performed sequentially row by row.

[0096] The diagonal lines in "each row operation" indicate that the operation of the plurality of pixels 10 is performed sequentially row by row from row 0 to row n. Specifically, the dashed lines in "each row operation" indicate a reset operation, and the solid lines indicate a signal readout operation. The striped pattern in "each row operation" indicates that the exposure of the plurality of pixels 10 is performed.

[0097] In the reset operation, the reset transistor 28 is turned on in the pixel 10, and the potential of the charge storage node 41 is reset to the reset voltage Vr. After the reset of the potential of the charge storage node 41 is completed, the reset transistor 28 is turned off in the pixel 10, thereby completing the reset operation.

[0098] In the readout operation, first, in the pixel 10, the address transistor 26 is turned on, and the pixel signal output by the signal detection transistor 24 is read out to the vertical signal line 47. Next, in the pixel 10, the reset transistor 28 is turned on, the potential of the charge storage node 41 is reset to the reset voltage Vr, and a reset signal corresponding to the reset level is read out to the vertical signal line 47. Then, in the pixel 10, the address transistor 26 and the reset transistor 28 are turned off, and the readout operation is completed. The pixel signal and the reset signal are subjected to correlated double sampling processing, for example, in the column signal processing circuit 37, and the processed signal is AD converted. Note that in the readout operation, it is sufficient that at least the pixel signal is read out; resetting the potential of the charge storage node 41 and reading the reset signal are not necessarily performed.

[0099] 3 shows the operation of the imaging device 100 during a series of frame periods F1, F12, and F2. The series of frame periods F1, F12, and F2 are shown in this order. The drive circuit 39 performs rolling shutter drive on the multiple pixels 10 during frame period F1, and performs global shutter drive on the multiple pixels 10 during frame periods F12 and F2. In this operation example, frame period F1 is an example of a first frame period, and frame period F12 is an example of a second frame period following the first frame period.

[0100] Here, the frame period during which the drive circuit 39 performs global shutter drive on the plurality of pixels 10 is a frame period during which an electronic shutter operation is simultaneously performed on all pixels 10 in the pixel array PA, and an exposure period B is started. Also, the frame period during which the drive circuit 39 performs rolling shutter drive on the plurality of pixels 10 is a frame period during which an electronic shutter is sequentially performed for each row of the pixel array PA, and an exposure period B is sequentially started for each row.

[0101] Furthermore, in frame periods in which global shutter driving is performed, such as frame periods F12 and F2, the drive circuit 39 causes the voltage supply circuit 32 to supply a first voltage VH to the counter electrode 12 in the exposure period, and to supply a second voltage VL to the counter electrode 12 in the non-exposure period. Furthermore, in frame periods in which rolling shutter driving is performed, such as frame period F1, the drive circuit 39 causes the voltage supply circuit 32 to supply the first voltage VH to the counter electrode 12. Note that supplying a certain voltage for a certain period does not necessarily mean that a certain voltage is continuously supplied for a certain period, but rather that a voltage other than a certain voltage may also be supplied for a certain period.

[0102] 3, in frame period F1, first, the drive circuit 39 causes the voltage supply circuit 32 to supply the first voltage VH to the counter electrode 12, and then causes the readout operation to be performed on the plurality of pixels 10 after exposure that began in the immediately preceding frame period. In the example shown in FIG. 3, rolling shutter drive is also performed in the immediately preceding frame period, and exposure of the plurality of pixels 10 ends with the start of the sequential readout operation for each row.

[0103] Next, in the frame period F1, the drive circuit 39 causes the plurality of pixels 10 to perform a reset operation. As a result, an electronic shutter operation is performed sequentially for each row by rolling shutter drive, and exposure of the plurality of pixels 10 begins. In other words, an exposure period B begins sequentially for each row of the plurality of pixels 10. In the frame period F1, the drive circuit 39 causes the voltage supply circuit 32 to continue supplying the first voltage VH to the counter electrode 12.

[0104] In the example shown in Figure 3, there is an interval between the read operation and the reset operation in the frame period F1, but the interval between the read operation and the reset operation can be set arbitrarily, and the length TB1 of the exposure period B can be adjusted by adjusting the interval between the read operation and the reset operation.

[0105] Next, in frame period F12 following frame period F1, the drive circuit 39 first causes the voltage supply circuit 32 to supply the first voltage VH to the counter electrode 12, and then causes the drive circuit 39 to perform a readout operation on the plurality of pixels 10 after exposure that began in frame period F1. This results in an image obtained by exposure that began in frame period F1, in which rolling shutter driving was performed. During readout period C in frame period F12, because the first voltage VH is supplied to the counter electrode 12, exposure of the pixels 10 continues until the readout operation is performed for each row, and the lengths TB1 of the exposure periods B of the pixels 10 in all rows are equal.

[0106] In the frame period F12, after the readout operation for all rows of the pixels 10 is completed, the drive circuit 39 causes the voltage supply circuit 32 to switch the voltage supplied to the counter electrode 12 from the first voltage VH to the second voltage VL. Then, the drive circuit 39 causes the voltage supply circuit 32 to perform a reset operation on the pixels 10 while the voltage supplied to the counter electrode 12 is the second voltage VL. During the reset period A in the frame period F12, the second voltage VL is supplied to the counter electrode 12. Even if the reset operation for the pixels 10 is performed row by row, signal charge is not accumulated in the charge storage node 41 of the pixel 10 for which the reset operation has been completed during the reset operation of the pixels 10 in other rows, and the potential of the charge storage node 41 of the pixel 10 is maintained at the reset level. In the example shown in FIG. 3 , the reset period A starts immediately after the readout period C in the frame period F12, but there may be an interval between the readout period C and the reset period A.

[0107] Next, in frame period F12, the drive circuit 39 switches the voltage that the voltage supply circuit 32 supplies to the counter electrode 12 from the second voltage VL to the first voltage VH. This executes an electronic shutter operation using global shutter drive, and exposure of all of the pixels 10 begins simultaneously. Then, the drive circuit 39 switches the voltage that the voltage supply circuit 32 supplies to the counter electrode 12 from the first voltage VH to the second voltage VL. This ends exposure of all of the pixels 10 simultaneously. Therefore, the lengths TB12 of the exposure periods B of the pixels 10 in all rows that began in frame period F12 are equal.

[0108] Next, in frame period F2 following frame period F12, the drive circuit 39 first causes the voltage supply circuit 32 to supply the second voltage VL to the counter electrode 12, and then causes the drive circuit 39 to perform a readout operation on the plurality of pixels 10 after exposure that began in frame period F12. This results in an image resulting from the exposure that began in frame period F12, during which global shutter driving was performed. During readout period C in frame period F2, the second voltage VL is supplied to the counter electrode 12, and even though the readout operation is performed on the pixels 10 sequentially row by row, in pixels 10 for which the readout operation has not yet been completed, no signal charge is accumulated in the charge accumulation node 41 during the readout operation on the pixels 10 in other rows, and the amount of signal charge in the charge accumulation node 41 of the pixel 10 remains unchanged. In other words, the magnitude of the pixel signal also does not change.

[0109] In frame period F2, the drive circuit 39 causes all of the pixels 10 to perform a read operation, and then causes the voltage supply circuit 32 to supply the second voltage VL to the counter electrode 12, and then causes the pixels 10 to perform a reset operation. The operations in the reset period A and exposure period B in frame period F2 are the same as those in frame period F12. In the example shown in Figure 3, in frame period F2, the reset period A starts immediately after the read period C ends, but there may be an interval between the read period C and the reset period A.

[0110] Then, in the frame periods after the frame period F2, for example, the operation of the frame period F2 is repeated until the drive circuit 39 changes the drive control of the plurality of pixels 10.

[0111] Here, a description will be given of the length of each frame period in Operation Example 1. In the example shown in Fig. 3, the length T0 of one frame period is the same in each of the plurality of frame periods F1, F12, and F2.

[0112] In a frame period F1 in which rolling shutter driving is performed, the length TB1 of the exposure period B can be made at most the same length as the length T0 of one frame period by adjusting the interval between the readout operation and the reset operation. This is because, in the frame period F1 in which rolling shutter driving is performed, while the pixels 10 in one row are exposed, the readout operation and reset operation of the pixels 10 in another row may be performed, making it possible for the readout period C and reset period A to overlap with the exposure period B. Note that being the same length as the length T0 of one frame period means being substantially the same, and the time required for the reset operation and readout operation of the pixels 10 is considered to be zero because it is sufficiently short compared to the length T0 of one frame period.

[0113] On the other hand, in frame periods F12 and F2 in which global shutter driving is performed, the readout period C and the reset period A do not overlap with the exposure period B. Furthermore, the readout period C and the reset period A do not overlap with each other. Therefore, in frame periods F12 and F2 in which global shutter driving is performed, the lengths TB12 and TB2 of the exposure periods B are at most the time (T0 - TC - TA) obtained by subtracting the length TC of the readout period C and the length TA of the reset period A from the length T0 of one frame period. Therefore, the maximum values ​​of the lengths TB12 and TB2 of the exposure periods B that can be achieved in frame periods F12 and F2 in which global shutter driving is performed are smaller than the maximum value of the length TB1 of the exposure period B that can be achieved in frame period F1 in which rolling shutter driving is performed.

[0114] Therefore, as in Operation Example 1, by having the drive circuit 39 selectively perform rolling shutter driving and global shutter driving for the plurality of pixels 10 during each of a plurality of consecutive frame periods, the adjustment range of the length of the exposure period B can be expanded. This expands the range over which the exposure amount can be adjusted in the imaging device 100. Furthermore, since rolling shutter driving and global shutter driving are selectively performed during each of a plurality of consecutive frame periods, the shutter driving is seamlessly switched, allowing the exposure amount to be adjusted in immediate response to changes in the environment in which the imaging device 100 is used. Therefore, the imaging device 100 can expand the range over which the exposure amount can be adjusted in response to changes in the environment in which it is used. Furthermore, when the exposure amount is sufficient, global shutter driving can be used to obtain an image in which the exposure timing of all pixels 10 is synchronized. Therefore, the imaging device 100 has a wide range over which the image quality can be adjusted in response to changes in the environment in which it is used, allowing it to capture high-quality images suited to the environment in which it is used.

[0115] The drive circuit 39 switches between performing rolling shutter drive and global shutter drive on the multiple pixels 10, for example, based on the length of each exposure period B of multiple consecutive frame periods. This allows the drive circuit 39 to select appropriate shutter drive depending on the length of the exposure period B. At this time, the drive circuit 39 acquires a signal indicating the length of the exposure period B, for example, from a processing circuit internal or external to the image capture device 100. The drive circuit 39 may also acquire information indicating the luminance of an image captured by the image capture device 100 from a processing circuit internal or external to the image capture device 100, and determine the length of the exposure period B based on the luminance of the image.

[0116] For example, if the length of the exposure period B acquired or determined during the frame period F1 in which rolling shutter driving is performed is equal to or less than the time (T0-TC-TA) obtained by subtracting the length of the readout period C, TC, and the length of the reset period A, TA, from the length of one frame period, T0, the drive circuit 39 causes the plurality of pixels 10 to perform global shutter driving in the frame period F12 following the frame period F1, as shown in FIG. 3 . Also, if the length of the exposure period B acquired or determined during the frame period F1 in which rolling shutter driving is performed is longer than the time (T0-TC-TA) obtained by subtracting the length of the readout period C, TC, and the length of the reset period A, TA, from the length of one frame period, T0, the drive circuit 39 continues rolling shutter driving for the plurality of pixels 10 in the frame period following the frame period F1. In other words, the same operation as in the frame period F1 continues. The drive circuit 39 does not have to select shutter driving itself. For example, the drive circuit 39 may obtain a signal indicating the type of shutter drive and the length of the exposure period B from a processing circuit inside or outside the imaging device 100, and cause the multiple pixels 10 to perform the indicated shutter drive so that the length of the exposure period B is the indicated length.

[0117] The length TA of the reset period A is, for example, ⅓ or less of the length T0 of one frame period. The length TC of the readout period C is, for example, ⅓ or less of the length T0 of one frame period. The length TA of the reset period A is, for example, the same as the length TC of the readout period C. In the example shown in FIG. 3 , the lengths TB12 and TB2 of the exposure periods B in frame periods F12 and F2 are the same and are less than the length TB1 of the exposure period B in frame period F1.

[0118] In operation example 1, in frame period F12, first, the drive circuit 39 causes the voltage supply circuit 32 to supply a first voltage VH to the counter electrode 12, and then causes the readout operation to be performed on the plurality of pixels 10 after exposure that began in frame period F1. Next, the drive circuit 39 causes the voltage supply circuit 32 to switch the voltage supplied to the counter electrode 12 from the first voltage VH to a second voltage VL. Then, the drive circuit 39 causes the plurality of pixels 10 to perform a reset operation, with the voltage supplied to the counter electrode 12 at the second voltage VL. This allows an image to be obtained in which the length TB1 of the exposure period B of the plurality of pixels 10 that began in frame period F1 is the same for each row. If, in frame period F12, the second voltage VL is supplied to the counter electrode 12 during the readout period C, as in frame period F2, the exposure of all of the plurality of pixels 10 ends at the start of the readout period C. As a result, in the case of rolling shutter drive, exposure of the plurality of pixels 10 starts sequentially row by row, and the length of the exposure period changes for each row of the plurality of pixels 10. Therefore, in such a case, it is not possible to obtain an image in which the length of the exposure period B of the plurality of pixels 10 that starts in frame period F1 is the same for each row. Therefore, by performing the operation of Operation Example 1, it is possible to obtain an image in which the length of the exposure period B of the plurality of pixels 10 is the same for each row, even in a frame period in which switching from rolling shutter drive to global shutter drive is performed, and smooth switching of shutter drive can be realized.

[0119] Furthermore, in Operation Example 1, the timing of the readout operation of the multiple pixels 10 relative to the start of the frame period is the same for each of the multiple frame periods F1, F12, and F2. This eliminates the need to change the drive settings for the readout operation even when the shutter drive is switched, making it easier to control the drive of the multiple pixels 10. Furthermore, the timing of image output from the imaging device 100 is also the same for each frame period, eliminating the need to change the settings for the image acquisition timing in subsequent processing. In Operation Example 1, the start of the readout period C is the start of the frame period.

[0120] Next, a modified example of Operation Example 1 of the imaging device 100 will be described. FIG. 4 is a timing chart for explaining a modified example of Operation Example 1 of the imaging device 100 according to the present embodiment. Similar to FIG. 3, FIG. 4 illustrates "VD," "counter electrode voltage," "pixel drive," and "row operation." FIG. 4 also illustrates the operation of the imaging device 100 during a series of frame periods F1, F12, and F2a. The series of frame periods F1, F12, and F2a are sequential in this order. As shown in FIG. 4, in this modified example of Operation Example 1, the frame period F2 in Operation Example 1 is changed to the frame period F2a. Therefore, the same operation as in Operation Example 1 is performed up to the frame period F12. The drive circuit 39 performs global shutter drive on the multiple pixels 10 during the frame period F2a.

[0121] In a modified example of Operation Example 1, as shown in FIG. 4 , in a frame period F2a following the frame period F12, the drive circuit 39 first causes the voltage supply circuit 32 to supply the second voltage VL to the counter electrode 12, and then causes the readout operation to be performed on the plurality of pixels 10 after exposure that began in the frame period F12. Furthermore, the drive circuit 39 causes the reset operation to be performed on the pixels 10 in the row for which the readout operation has already been completed, before the readout operation for all the rows of the plurality of pixels 10 is completed. Therefore, in the frame period F2a, the readout period C and the reset period A at least partially overlap each other. It is not essential that the drive circuit 39 cause the reset operation to be performed on the plurality of pixels 10 in the frame period F2a; the reset period A may be omitted and the exposure period B may begin after the readout period C.

[0122] Next, in frame period F2a, the drive circuit 39 switches the voltage that the voltage supply circuit 32 supplies to the counter electrode 12 from the second voltage VL to the first voltage VH. This causes an electronic shutter operation by global shutter drive to be performed, and exposure of all of the multiple pixels 10 begins simultaneously. Then, the drive circuit 39 switches the voltage that the voltage supply circuit 32 supplies to the counter electrode 12 from the first voltage VH to the second voltage VL. This causes exposure of all of the multiple pixels 10 to end simultaneously.

[0123] In frame period F2a, the readout period C and the reset period A overlap, so the length TB2a of the exposure period B is longer than the lengths TB12 and TB2 of the exposure period B in frame period F12 and the above-mentioned frame period F2. Specifically, the length TB2a of the exposure period B is the length TB12 or TB2 of the exposure period B plus the time Tac during which the readout period C and the reset period A overlap. In frame period F2a, the length TB2a of the exposure period B can be adjusted by adjusting the time Tac during which the readout period C and the reset period A overlap.

[0124] In frame period F2a, the reset period A can be omitted by utilizing the readout of the reset signal in readout period C for the reset operation, and therefore the time Tac during which readout period C and reset period A overlap is at most the same length as the length TA of reset period A. Therefore, the length TB2a of exposure period B is at most the time (T0 - TC) obtained by subtracting the length TC of readout period C from the length T0 of one frame period. Therefore, in frame period F2a, the adjustment range of the length of exposure period B can be wider than in frame periods F12 and F2.

[0125] Next, an example of switching of shutter drive by the drive circuit 39 based on the length of the exposure period B will be described when rolling shutter drive and global shutter drive are selectively performed, as in the above-described Operation Example 1 and the modified example of Operation Example 1. FIG. 5 is a diagram for explaining an example of switching of shutter drive by the drive circuit 39 based on the length of the exposure period B. In FIG. 5, the length of the exposure period B increases toward the right. Also, in FIG. 5, arrows indicate the direction in which the length of the exposure period B is changed in successive frame periods, with left-pointing arrows indicating a case in which the length of the exposure period B is shortened compared to the previous frame period and right-pointing arrows indicating a case in which the length of the exposure period B is lengthened compared to the previous frame period. Also, in FIG. 5, the range of the solid arrows indicates that the drive circuit 39 causes rolling shutter (RS) drive for multiple pixels 10, and the range of the dashed-dotted arrows indicates that the drive circuit 39 causes global shutter (GS) drive for multiple pixels 10.

[0126] 5, the length of the exposure period B is divided into a first range R1, a second range R2 that is shorter than the first range R1, and a third range R3 that is between the first range R1 and the second range R2. The first range R1, the second range R2, and the third range R3 do not overlap with one another. The first range R1, the third range R3, and the second range R2 are consecutive in this order.

[0127] In the example shown in FIG. 5 , the first range R1 is longer than the first threshold Tth1 and shorter than the length T0 of one frame period. The first threshold Tth1 is, for example, the time (T0-TC) obtained by subtracting the length TC of the readout period C from the length T0 of one frame period. The second range R2 is a range equal to or less than the second threshold Tth2. The second threshold Tth2 is, for example, the time (T0-TC-TA) obtained by subtracting the length TC of the readout period C and the length TA of the reset period A from the length T0 of one frame period. The lower limit of the second range R2 is not particularly limited as long as it is greater than 0 and is a feasible length of the exposure period B. The third range R3 is longer than the second threshold Tth2 and shorter than the first threshold Tth1. The length TB1 of the exposure period B in the frame period F1 is, for example, within the first range R1 or the third range R3. The length TB2 of the exposure period B in the frame period F2 is, for example, within the second range R2. The length TB2a of the exposure period B in the frame period F2a is, for example, within the third range R3.

[0128] 5, the drive circuit 39 performs rolling shutter drive on the plurality of pixels 10 during a frame period in which the length of the exposure period B is within a first range R1, and performs global shutter drive on the plurality of pixels 10 during a frame period in which the length of the exposure period B is within a second range R2. As a result, the length of the exposure period B that cannot be achieved when global shutter drive is performed can be achieved by performing rolling shutter drive, and the range in which the exposure amount can be adjusted can be expanded.

[0129] Furthermore, during a frame period in which the length of the exposure period B is within the third range R3, the drive circuit 39 causes the pixels 10 to perform the same shutter drive as in the frame period immediately preceding the frame period in question. This reduces the frequency of shutter drive switching, reduces the processing load of drive control, and suppresses changes in the image quality of images generated during successive frame periods.

[0130] The drive circuit 39 determines the shutter drive to be performed on the plurality of pixels 10 based on, for example, the length of the exposure period B obtained or determined by the method described above.

[0131] The first threshold value Tth1 and the second threshold value Tth2 are merely examples and can be changed as appropriate within a feasible range. For example, at least one of the first threshold value Tth1 and the second threshold value Tth2 may be the time between the time (T0-TC) obtained by subtracting the length TC of the readout period C from the length T0 of one frame period and the time (T0-TC-TA) obtained by subtracting the length TC of the readout period C and the length TA of the reset period A from the length T0 of one frame period. Alternatively, the third range R3 may not exist, and the first range R1 and the second range R2 may be continuous. In other words, the first threshold value Tth1 may be equal to the second threshold value Tth2. In this case, the first threshold value Tth1 = the second threshold value Tth2 is set, for example, to a value greater than or equal to the time (T0-TC-TA) obtained by subtracting the length TC of the readout period C and the length TA of the reset period A from the length T0 of one frame period, and less than or equal to the time (T0-TC) obtained by subtracting the length TC of the readout period C from the length T0 of one frame period.

[0132] (2) Operation Example 2 Next, an operation example 2 of the imaging device 100 will be described. In the following description of Operation Example 2, differences from Operation Example 1 and the modified example of Operation Example 1 will be mainly described, and explanations of commonalities will be omitted or simplified. The same applies to Operation Example 3 and subsequent operation examples described later, and in the description of each operation example, differences from the previously described operation example will be mainly described, and explanations of commonalities will be omitted or simplified.

[0133] In operation example 2, an example of the operation of the imaging device 100 when electronic ND driving is performed, which activates an electrical ND (Neutral Density) filter to adjust the sensitivity of photoelectric conversion, during a frame period in which global shutter driving is performed will be described.

[0134] FIG. 6 is a timing chart for explaining a second operation example of the imaging device 100 according to the present embodiment. Similar to FIG. 3, FIG. 6 shows "VD," "counter electrode voltage," "pixel drive," and "each row operation." The dot pattern in "each row operation" indicates that electronic ND drive is being performed. FIG. 6 also shows the operation of the imaging device 100 during a series of frame periods F2, F2, and F3. The series of frame periods F2, F2, and F3 are sequential in this order. The drive circuit 39 causes a number of pixels 10 to perform global shutter drive during the frame periods F2, F2, and F3.

[0135] The drive circuit 39 performs global shutter drive on the plurality of pixels 10 in the frame period F3, and also performs electronic ND drive in the exposure period B. The operation in the frame period F3 is the same as the operation in the frame period F2, except that electronic ND drive is performed in the exposure period B.

[0136] In a frame period F3 in which electronic ND driving is performed in the exposure period B, the drive circuit 39 causes the voltage supply circuit 32 to alternately supply the first voltage VH and the second voltage VL to the counter electrode 12 in the exposure period B. That is, in the electronic ND driving, a pulsed voltage that alternates between the first voltage VH and the second voltage VL is applied to the counter electrode 12.

[0137] The drive circuit 39 can adjust the ND value, which is the sensitivity reduction factor, by adjusting the time TH1 during which the first voltage VH is supplied to the counter electrode 12 and the time TL1 during which the second voltage VL is supplied to the counter electrode 12 during the exposure period B. For example, an ND value of 4 means that the sensitivity is ¼ of the maximum sensitivity. In this case, the ND value is determined, for example, by the ratio between the effective exposure time and the longest possible exposure time. In the example shown in FIG. 6 , the effective exposure time is the integrated time TH1 during which the first voltage VH is supplied to the counter electrode 12 during the exposure period B. The longest possible exposure time is, for example, the length T0 of one frame period. Therefore, if the number of repetitions of the pulsed voltage is K, the ND value is calculated as T0 / (K×TH1).

[0138] During the exposure period B, the drive circuit 39 sets the duty ratio of a pulsed voltage, for example, in which the time TH1 and the time TL1 have the same length for each repetition, to a duty ratio corresponding to a predetermined ND value, and causes the voltage supply circuit 32 to supply the pulsed voltage to the counter electrode 12. Note that the time TH1 and the time TL1 may be different during each repetition. Furthermore, the electronic ND drive may be performed only during a portion of the exposure period B.

[0139] The length TB3 of the exposure period B in the frame period F3 is the same as the length TB2 of the exposure period B in the frame period F2. In the imaging device 100, the exposure amount can be adjusted by adjusting the length of the exposure period B. However, in the frame period F3, by performing electronic ND drive during the exposure period B, the exposure amount can be adjusted without shortening the length TB3 of the exposure period B, thereby achieving an effect equivalent to a reduction in sensitivity. This makes it possible to suppress the occurrence of flicker. Flicker is a phenomenon in which, when capturing light from a flashing light source, the light is sometimes captured and sometimes not. Therefore, even when the exposure amount is reduced, by not shortening the length TB2 of the exposure period B, the probability that the flashing light source is turned off during the exposure period B can be reduced, thereby suppressing the occurrence of flicker. The length TB3 of the exposure period B in the frame period F3 may be different from the length TB2 of the exposure period B in the frame period F2.

[0140] As described above, in Operation Example 2, in each of two or more frame periods F2, F2, and F3, the drive circuit 39 selectively supplies the first voltage VH and the second voltage VL alternately to the counter electrode 12 during the exposure period B, or continues to supply the first voltage VH to the counter electrode 12 during the exposure period B. This allows the imaging device 100 to adjust the exposure amount while suppressing the occurrence of flicker without changing the shutter drive. Furthermore, by combining adjustment of the length of the exposure period B with adjustment of the ND value in the electronic ND drive, more precise exposure control is possible.

[0141] The drive circuit 39 receives, for example, from a processing circuit inside or outside the imaging device 100, a signal instructing whether or not to perform electronic ND driving and a signal indicating the time TH1 during which the first voltage VH in the electronic ND driving is supplied to the counter electrode 12. The drive circuit 39 may also receive, from a processing circuit inside or outside the imaging device 100, information indicating the brightness of an image captured by the imaging device 100, and determine, based on the brightness of the image, whether or not to perform electronic ND driving and the time TH1 during which the first voltage VH in the electronic ND driving is supplied to the counter electrode 12. The time TH1 for performing the electronic ND driving may be the duty ratio of a pulsed voltage.

[0142] For example, if the drive circuit 39 acquires a signal instructing to perform electronic ND drive during frame period F2, or if it decides to perform electronic ND drive, then in frame period F3 following frame period F2, it causes electronic ND drive to be performed on multiple pixels 10 at time TH1 indicated by the acquired signal or at the determined time TH1.

[0143] Next, a modified example of the second operation example of the imaging device 100 will be described. FIG. 7 is a timing chart for explaining the modified example of the second operation example of the imaging device 100 according to the present embodiment. Similar to FIG. 3, FIG. 7 shows "VD," "counter electrode voltage," "pixel drive," and "row operation." FIG. 7 also shows the operation of the imaging device 100 during a series of frame periods F2a, F2a, and F3a. The series of frame periods F2a, F2a, and F3a are sequential in this order. The drive circuit 39 causes the multiple pixels 10 to perform global shutter drive during the frame periods F2a, F2a, and F3a.

[0144] The drive circuit 39 performs global shutter drive on the multiple pixels 10 during the frame period F3a, and also performs electronic ND drive during the exposure period B. The operation during the frame period F3a is the same as the operation during the frame period F2a, except that electronic ND drive is performed during the exposure period B. Since the electronic ND drive described above is performed during the exposure period B during the frame period F3a as well, it is possible to suppress the occurrence of flicker. The length TB3a of the exposure period B during the frame period F3a is the same as the length TB2a of the exposure period B during the frame period F2a. Note that the length TB3a of the exposure period B during the frame period F3a may be different from the length TB2a of the exposure period B during the frame period F2.

[0145] In the above, in frame periods F3 and F3a, the exposure period B in frame periods F2 and F2a, respectively, was replaced with the exposure period B in which electronic ND driving is performed, but the exposure period B in frame period F12 may also be replaced with the exposure period B in which electronic ND driving is performed.

[0146] (3) Operation Example 3 Next, a description will be given of Operation Example 3 of the imaging device 100. In Operation Example 3, an example of the operation of the imaging device 100 when electronic ND driving is performed during a frame period in which rolling shutter driving is performed will be described.

[0147] FIG. 8 is a timing chart for explaining an operation example 3 of the imaging device 100 according to this embodiment. Similar to FIG. 3, FIG. 8 shows "VD," "counter electrode voltage," "pixel drive," and "row operation." FIG. 8 also shows the operation of the imaging device 100 during a series of frame periods F1a, F1b, and F4. The series of frame periods F1a, F1b, and F4 are in this order. The driving circuit 39 performs rolling shutter driving on the plurality of pixels 10 during the frame periods F1a, F1b, and F4.

[0148] The operations in frame periods F1a and F1b are the same as those in frame period F1, except that the interval between the read operation and the reset operation is different.

[0149] In the frame period F1a, resetting the potential of the charge storage node 41 during the readout operation is also used as an electronic shutter operation by rolling shutter driving. Therefore, the readout period C and the reset period A are the same in duration. Furthermore, the length TB1a of the exposure period B in the frame period F1a is the same as the length T0 of one frame period.

[0150] In the frame period F1b, the reset period A and the exposure period B start immediately after the end of the readout period C. The length TB1b of the exposure period B in the frame period F1b is shorter than the length TB1a of the exposure period B in the frame period F1a. Note that in the frame period F1b, there may be an interval between the readout period C and the reset period A. Furthermore, the readout period C and the reset period A may at least partially overlap.

[0151] In frame period F4, the drive circuit 39 performs rolling shutter drive on the multiple pixels 10 and also performs electronic ND drive on the multiple pixels 10 in exposure period B. The operation in frame period F4 is the same as the operation in frame period F1b, except that electronic ND drive is performed in exposure period B. In frame period F4 in which electronic ND drive is performed in exposure period B, the drive circuit 39 causes the voltage supply circuit 32 to alternately supply a first voltage VH and a second voltage VL to the counter electrode 12 as electronic ND drive during period Bpwm in exposure period B when all of the multiple pixels 10 are exposed. Details of the electronic ND drive are the same as in Operation Example 2 described above. Note that electronic ND drive may be performed only during a portion of period Bpwm when all of the multiple pixels 10 are exposed.

[0152] The length TB4 of the exposure period B in the frame period F4 is the same as the length TB1b of the exposure period B in the frame period F1b. In the imaging device 100, by performing electronic ND drive during the exposure period B in the frame period F4, the sensitivity is adjusted without shortening the length TB4 of the exposure period B, and the amount of exposure can be reduced. This makes it possible to suppress the occurrence of flicker. Furthermore, because the sensitivity is adjusted during the period Bpwm in which all of the pixels 10 are exposed, it is possible to suppress differences in sensitivity between rows of the pixels 10. Note that the length TB4 of the exposure period B in the frame period F4 may be different from the length TB1b of the exposure period B in the frame period F1b.

[0153] Furthermore, electronic ND driving may be performed in a frame period in which the readout period C and the reset period A overlap. For example, the length TB1b of the exposure period B in the frame period F1b and the length TB4 of the exposure period B in the frame period F4 may be the same as the length TB1a of the exposure period B in the frame period F1a.

[0154] As described above, in Operation Example 3, in each of two or more frame periods F1a, F1b, and F4, the drive circuit 39 selectively supplies the counter electrode 12 with the first voltage VH and the second voltage VL alternately during the period Bpwm in which all of the pixels 10 are exposed, or continuously supplies the counter electrode 12 with the first voltage VH during the period Bpwm in which all of the pixels 10 are exposed. This allows the imaging device 100 to adjust the exposure amount while suppressing the occurrence of flicker without changing the shutter drive. Furthermore, by combining the adjustment of the length of the exposure period B with the adjustment of the ND value in the electronic ND drive, more precise exposure control is possible.

[0155] (4) Operation Example 4 Next, a description will be given of Operation Example 4 of the imaging device 100. In Operation Example 4, an example of the operation of the imaging device 100 when switching from global shutter driving to rolling shutter driving during a plurality of consecutive frame periods will be described.

[0156] FIG. 9 is a timing chart for explaining a fourth operation example of the imaging device 100 according to the present embodiment. Similar to FIG. 3 , FIG. 9 illustrates "VD," "counter electrode voltage," "pixel drive," and "row operation." FIG. 9 also illustrates the operation of the imaging device 100 during a series of frame periods F2, F21, and F1. The series of frame periods F2, F21, and F1 are in this order. The drive circuit 39 performs global shutter drive on the multiple pixels 10 during the frame period F2, and performs rolling shutter drive on the multiple pixels 10 during the frame periods F21 and F1. In this operation example, the frame period F2 is an example of a third frame period, and the frame period F21 is an example of a fourth frame period following the third frame period. The operations during the frame periods F2 and F1 are as described above.

[0157] 9 , in frame period F21 following frame period F2, first, the drive circuit 39 causes the voltage supply circuit 32 to supply the second voltage VL to the counter electrode 12, and then causes the drive circuit 39 to perform a readout operation on the plurality of pixels 10 that have been exposed during the exposure period B in frame period F2. This results in an image resulting from the exposure that began in frame period F2, in which global shutter driving was performed. During readout period C in frame period F21, the second voltage VL remains supplied to the counter electrode 12 as it was at the end of exposure period B in frame period F2, so no signal charge is accumulated in the charge accumulation node 41, and the amount of signal charge in the charge accumulation node 41 of each pixel 10 remains unchanged.

[0158] In frame period F21, the drive circuit 39 causes all of the pixels 10 to perform a read operation, and then, after a delay of time Td, causes the voltage supply circuit 32 to switch the voltage supplied to the counter electrode 12 from the second voltage VL to the first voltage VH. Then, while the voltage supplied to the counter electrode 12 is the first voltage VH, the drive circuit 39 causes the pixels 10 to perform a reset operation. This executes an electronic shutter operation using rolling shutter drive, and exposure of the pixels 10 begins sequentially, row by row. The operations in the reset period A and exposure period B in frame period F21 are the same as those in frame period F1.

[0159] The length TB21 of the exposure period B in the frame period F21 is the same as the length TB2 of the exposure period B in the frame period F2. Note that by adjusting the time Td, the length TB21 of the exposure period B in the frame period F21 may be different from the length TB2 of the exposure period B in the frame period F2.

[0160] In Operation Example 4, by performing the operation in frame period F21 following frame period F2, an image can be obtained in which the length of the exposure period B of the plurality of pixels 10 that started in frame period F2 is the same for each row. If the first voltage VH is supplied to the counter electrode 12 in frame period F21 during the readout period C, as in frame period F1, exposure continues for the pixels 10 until the readout operation is performed for each row. As a result, in the case of global shutter drive, exposure starts for all of the plurality of pixels 10 at the same time, and the length of the exposure period varies for each row of the plurality of pixels 10. Therefore, in such a case, an image in which the length of the exposure period B of the plurality of pixels 10 that started in frame period F2 is the same for each row cannot be obtained. Therefore, by performing the operation in Operation Example 4, an image in which the length of the exposure period B of the plurality of pixels 10 is the same for each row can be obtained, even in a frame period in which global shutter drive is switched to rolling shutter drive, and smooth switching of shutter drive can be realized.

[0161] Next, a modified example of the fourth operation example of the imaging device 100 will be described. FIG. 10 is a timing chart for explaining the modified example of the fourth operation example of the imaging device 100 according to the present embodiment. Similar to FIG. 3 , FIG. 10 illustrates "VD," "counter electrode voltage," "pixel drive," and "row operation." FIG. 10 also illustrates the operation of the imaging device 100 during a series of frame periods F2, F21a, and F1b. The series of frame periods F2, F21a, and F1b are sequential in this order. The drive circuit 39 performs global shutter drive on the multiple pixels 10 during the frame period F2, and performs rolling shutter drive on the multiple pixels 10 during the frame periods F21a and F1b. In this modified example of the operation example, the frame period F2 is an example of a third frame period, and the frame period F21a is an example of a fourth frame period following the third frame period. The operations during the frame periods F2 and F1b are as described above.

[0162] The operation in frame period F21a is the same as that in frame period F21, except that the reset period A starts immediately after the end of readout period C, a time Td later. That is, in the operation in frame period F21a, the reset period A starts immediately after the end of readout period C. The length TB21a of the exposure period B in frame period F21a is longer than the length TB2 of the exposure period in frame period F2. Furthermore, the length TB21a of the exposure period B in frame period F21a is the same as the length TB1b of the exposure period in frame period F1b. Note that the length TB21a of the exposure period B in frame period F21a may be different from the length TB1b of the exposure period in frame period F1b.

[0163] (5) Operation Example 5 Next, a description will be given of Operation Example 5 of the imaging device 100. In Operation Example 5, an example of the operation of the imaging device 100 when electronic ND driving is performed during a frame period in which global shutter driving is switched to rolling shutter driving will be described.

[0164] FIG. 11 is a timing chart for explaining a fifth operation example of the imaging device 100 according to the present embodiment. Similar to FIG. 3 , FIG. 11 illustrates "VD," "counter electrode voltage," "pixel drive," and "row operation." FIG. 11 also illustrates the operation of the imaging device 100 during a series of frame periods F2, F24, and F4. The series of frame periods F2, F24, and F4 are arranged in this order. The drive circuit 39 performs global shutter drive on the multiple pixels 10 during frame period F2, and performs rolling shutter drive on the multiple pixels 10 during frame periods F24 and F4. In this operation example, frame period F2 is an example of a fifth frame period, and frame period F24 is an example of a sixth frame period following the fifth frame period. The operations during frame periods F2 and F4 are as described above.

[0165] The drive circuit 39 performs rolling shutter drive on the plurality of pixels 10 in the frame period F24, and also performs electronic ND drive in the exposure period B. The operation in the frame period F24 is the same as the operation in the frame period F21a, except that electronic ND drive is performed in the exposure period B.

[0166] In frame period F24, the drive circuit 39 causes the voltage supply circuit 32 to supply the second voltage VL to the counter electrode 12, and causes the drive circuit 39 to perform a readout operation on the plurality of pixels 10 after exposure in the exposure period B in frame period F2. This provides an image resulting from exposure that began in frame period F2 when global shutter driving was performed.

[0167] Furthermore, in the frame period F24, the drive circuit 39 causes the voltage supply circuit 32 to alternately supply the first voltage VH and the second voltage VL to the counter electrode 12 as electronic ND drive during a period Bpwm in which all of the pixels 10 are exposed during the exposure period B. Details of the electronic ND drive are the same as those in the above-described Operation Example 2. Note that the electronic ND drive may be performed only during a part of the period Bpwm in which all of the pixels 10 are exposed.

[0168] The length TB24 of the exposure period B in the frame period F24 is longer than the length TB2 of the exposure period in the frame period F2. In the imaging device 100, by performing electronic ND drive during the exposure period B in the frame period F24, an effect equivalent to a reduction in sensitivity can be achieved without shortening the length TB24 of the exposure period B, and the exposure amount can be adjusted. Therefore, it is possible to suppress an increase in the exposure amount while making the length TB24 of the exposure period B longer than the length TB2. For example, the length of the exposure period B can be increased while maintaining approximately the same exposure amount, thereby suppressing the occurrence of flicker. Therefore, this is effective when it is desired to suppress the occurrence of flicker in a situation where an increase in the exposure amount is undesirable.

[0169] Furthermore, in Operation Example 5, by performing the operation in frame period F24 following frame period F2, it is possible to obtain an image in which the length of the exposure period B of the plurality of pixels 10 that started in frame period F2 is the same for each row, as in Operation Example 4. Therefore, by performing the operation in Operation Example 5, it is possible to obtain an image in which the length of the exposure period B of the plurality of pixels 10 is the same for each row, even in a frame in which global shutter driving has been switched to rolling shutter driving, and smooth switching of shutter driving can be realized.

[0170] (Embodiment 2) Next, a description will be given of embodiment 2. In embodiment 2, a camera system including an imaging device according to the present disclosure will be described.

[0171] FIG. 12 is a block diagram showing an example of the configuration of a camera system 400 according to this embodiment.

[0172] 12, camera system 400 according to this embodiment includes lens optical system 601, imaging device 602, system controller 603, and camera signal processing circuit 604. Camera system 400 may be, for example, a smartphone, a digital camera, a video camera, or an in-vehicle camera.

[0173] The lens optical system 601 focuses light onto an imaging surface of the imaging device 602. The lens optical system 601 may include, for example, a lens group including an autofocus lens and a zoom lens, and an aperture. As the imaging device 602, for example, the imaging device 100 according to the first embodiment described above is used.

[0174] The system controller 603 is a processing circuit that controls the entire camera system 400. The system controller 603 is, for example, a semiconductor integrated circuit, and a specific example is a CPU (Central Processing Unit).

[0175] The system controller 603 determines the driving conditions of the image capturing device 602, for example, based on an image output from the image capturing device 602. The driving conditions include, for example, at least one of the length of the exposure period B, the type of shutter drive, whether or not to perform electronic ND drive, and the ND value in electronic ND drive. For example, the system controller 603 determines driving conditions such that the exposure amount is reduced as the brightness of the image increases. The system controller 603 outputs the determined driving conditions to the drive circuit 39, for example. The drive circuit 39 controls the driving of the image capturing device 602 based on the output driving conditions.

[0176] The camera signal processing circuit 604 has a function of processing an output signal from the image capture device 602. The camera signal processing circuit 604 receives output data such as a differential digital signal from the image capture device 602 and performs processes such as gamma correction, color interpolation, spatial interpolation, and auto white balance. The camera signal processing circuit 604 is, for example, a DSP (Digital Signal Processor). The image capture device 602 and the camera signal processing circuit 604 may be implemented as a single semiconductor device. The semiconductor device may be, for example, a so-called SoC (System on a Chip). This configuration allows for further miniaturization of electronic devices that include the image capture device 602 as a part thereof.

[0177] While the imaging device and camera system according to the present disclosure have been described above based on the embodiments, the present disclosure is not limited to these embodiments. As long as they do not deviate from the gist of the present disclosure, various modifications conceivable by those skilled in the art to the embodiments, as well as other forms constructed by combining some of the components of the embodiments, are also included within the scope of the present disclosure.

[0178] For example, the order of consecutive frame periods described in each operation example of the above embodiment is merely an example. The operations in each frame period described in each operation example can be combined in any order as long as there is no contradiction. Furthermore, the imaging device 100 may not perform some of the operations in each frame period described in each operation example. For example, the imaging device 100 may not perform operations in frame periods in which electronic ND drive is performed, such as frame periods F3, F3a, F4, and F24. Furthermore, the imaging device 100 may not perform operations in frame periods in which rolling shutter drive and global shutter drive switch over, such as frame periods F12, F21, F21a, and F24. In this case, the drive circuit 39 may perform only one of rolling shutter drive and global shutter drive on the multiple pixels 10 in consecutive frame periods.

[0179] Furthermore, for example, in the above embodiment, the drive circuit 39, as the electronic ND drive, causes the voltage supply circuit 32 to alternately supply the first voltage VH and the second voltage VL to the counter electrode 12, but this is not limiting. For example, the drive circuit 39 may, as the electronic ND drive, cause the voltage supply circuit 32 to supply a voltage between the first voltage VH and the second voltage VL to the counter electrode 12. This also reduces the sensitivity compared to when the first voltage VH is supplied to the counter electrode 12, making it possible to adjust the sensitivity of photoelectric conversion.

[0180] In the above-described embodiment, the processing performed by a specific processing unit may be performed by another processing unit. The order of multiple processing operations may be changed, or multiple processing operations may be performed in parallel.

[0181] In the above-described embodiments, each component may be realized by executing a software program suitable for that component, or by a program execution unit such as a CPU or processor reading and executing a software program recorded on a recording medium such as a hard disk or semiconductor memory.

[0182] Furthermore, each component may be realized by hardware. Each component may be a circuit (or integrated circuit). These circuits may form a single circuit as a whole, or each may be a separate circuit. Furthermore, each of these circuits may be a general-purpose circuit or a dedicated circuit.

[0183] Furthermore, the general or specific aspects of the present disclosure may be realized as a system, an apparatus, a method, an integrated circuit, a computer program, or a computer-readable recording medium such as a CD-ROM, or as any combination of a system, an apparatus, a method, an integrated circuit, a computer program, and a recording medium.

[0184] For example, the present disclosure may be realized as an imaging device according to the above-described embodiment, as a control device that controls an imaging device, as a program that causes a computer to execute a driving method for an imaging device performed by a processing unit such as a driving circuit, or as a computer-readable non-transitory recording medium on which such a program is recorded.

[0185] Furthermore, the above-described embodiments can be modified, substituted, added, omitted, and the like in various ways within the scope of the claims or their equivalents.

[0186] The imaging device according to the present disclosure is useful, for example, in image sensors, digital cameras, etc. The imaging device according to the present disclosure can be used in medical cameras, robot cameras, security cameras, cameras mounted on vehicles, etc.

[0187] 10 Pixel 11 Pixel electrode 12 Counter electrode 13 Photoelectric conversion section 14 Signal detection circuit 15 Photoelectric conversion layer 20 Semiconductor substrate 20t Element isolation region 24 Signal detection transistor 24d, 24s, 26s, 28d, 28s Impurity region 24g, 26g, 28g Gate electrode 26 Address transistor 28 Reset transistor 32 Voltage supply circuit 34 Reset voltage source 36 Vertical scanning circuit 37 Column signal processing circuit 38 Horizontal signal readout circuit 39 Drive circuit 40 Power supply line 41 Charge storage node 42 Sensitivity control line 44 Reset voltage line 46 Address control line 47 Vertical signal line 48 Reset control line 49 Horizontal common signal line 50 Interlayer insulating layer 52 Plug 53 Wiring 54, 55 Contact plug 56 Wiring layer 100, 602 Imaging device 400 Camera system 601 Lens optical system 603 System controller 604 Camera signal processing circuit

Claims

1. An imaging device comprising: a plurality of pixels; and a drive circuit, wherein the drive circuit selectively performs rolling shutter drive and global shutter drive on the plurality of pixels during each of a plurality of consecutive frame periods.

2. The imaging device according to claim 1, wherein the drive circuit switches between rolling shutter drive and global shutter drive for the plurality of pixels based on the length of each exposure period of the plurality of frame periods.

3. The imaging device of claim 1, wherein the drive circuit performs rolling shutter drive on the plurality of pixels during a frame period among the plurality of frame periods in which the length of the exposure period is within a first range, and performs global shutter drive on the plurality of pixels during a frame period among the plurality of frame periods in which the length of the exposure period is within a second range that is shorter than the first range.

4. The imaging device according to claim 3, wherein, during a frame period among the plurality of frame periods in which the length of the exposure period is within a third range between the first range and the second range, the drive circuit causes the plurality of pixels to perform the same shutter drive as in the frame period immediately preceding the frame period.

5. The imaging device according to claim 1, wherein the timing of the readout operation of the signals from the plurality of pixels relative to the start of the frame period is the same in each of the plurality of frame periods.

6. An imaging device as described in claim 1, wherein each of the plurality of pixels includes: a photoelectric conversion layer that converts light into signal charges; a first electrode that collects the signal charges; and a second electrode that faces the first electrode via the photoelectric conversion layer.

7. The imaging device of claim 6, further comprising a voltage supply circuit connected to the second electrode, wherein the drive circuit causes the voltage supply circuit to: supply a first voltage to the second electrode during an exposure period in a frame period in which global shutter drive is performed among the plurality of frame periods, and supply a second voltage to the second electrode during a non-exposure period; and supply the first voltage to the second electrode during a frame period in which rolling shutter drive is performed among the plurality of frame periods.

8. The imaging device according to claim 7, wherein the drive circuit performs rolling shutter drive on the plurality of pixels during a first frame period of the plurality of frame periods, performs global shutter drive on the plurality of pixels during a second frame period following the first frame period of the plurality of frame periods, and during the second frame period, while causing the voltage supply circuit to supply the first voltage to the second electrode, performs a signal readout operation on the plurality of pixels after exposure that began during the first frame period, and then switches the voltage that the voltage supply circuit supplies to the second electrode from the first voltage to the second voltage, and performs a reset operation on the plurality of pixels while the voltage supplied to the second electrode is the second voltage.

9. The imaging device described in claim 7, wherein the drive circuit performs global shutter drive on the plurality of pixels during a third frame period of the plurality of frame periods, and performs rolling shutter drive on the plurality of pixels during a fourth frame period following the third frame period of the plurality of frame periods, and during the fourth frame period, while causing the voltage supply circuit to supply the second voltage to the second electrode, causes a signal readout operation to be performed on the plurality of pixels after exposure during the exposure period in the third frame period, and then switches the voltage that the voltage supply circuit causes to supply to the second electrode from the second voltage to the first voltage.

10. The imaging device described in claim 7, wherein the drive circuit: performs global shutter drive on the plurality of pixels during a fifth frame period of the plurality of frame periods; performs rolling shutter drive on the plurality of pixels during a sixth frame period following the fifth frame period of the plurality of frame periods; during the sixth frame period, while causing the voltage supply circuit to supply the second voltage to the second electrode, causes the voltage supply circuit to read out signals from the plurality of pixels after exposure during the exposure period in the fifth frame period, and then switches the voltage supplied to the second electrode by the voltage supply circuit from the second voltage to the first voltage, and causes the voltage supply circuit to alternately supply the first voltage and the second voltage to the second electrode during a period in which all of the plurality of pixels are exposed.

11. The imaging device of claim 6, further comprising a voltage supply circuit connected to the second electrode, wherein the drive circuit causes the voltage supply circuit to alternately supply a first voltage and a second voltage to the second electrode during an exposure period, and to supply the second voltage to the second electrode during a non-exposure period, in a frame period in which global shutter drive is performed among the plurality of frame periods.

12. The imaging device described in claim 11, wherein the drive circuit selectively causes the voltage supply circuit to alternately supply the first voltage and the second voltage to the second electrode during an exposure period, and to continue supplying the first voltage to the second electrode during an exposure period, in each of two or more consecutive frame periods in which global shutter driving is performed among the plurality of frame periods.

13. The imaging device of claim 6, further comprising a voltage supply circuit connected to the second electrode, wherein the drive circuit causes the voltage supply circuit to alternately supply a first voltage and a second voltage to the second electrode during a period in which all of the plurality of pixels are exposed during a frame period in which rolling shutter drive is performed among the plurality of frame periods.

14. The imaging device described in claim 13, wherein the drive circuit selectively causes the voltage supply circuit to alternately supply the first voltage and the second voltage to the second electrode during a period in which all of the plurality of pixels are exposed, in each of two or more consecutive frame periods in which rolling shutter drive is performed among the plurality of frame periods, and to continue supplying the first voltage to the second electrode during a period in which all of the plurality of pixels are exposed.

15. A camera system comprising an imaging device according to any one of claims 1 to 14.

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