Low noise amplifier

Abstract

This low-noise amplifier is provided with: a unit amplifier (5) disposed between an input terminal (1) and an output terminal (2) in a one-stage or multi-stage cascade connection configuration; and a unit amplifier (6) disposed between the input terminal (1) and the input terminal of the first-stage unit amplifier (5) in a one-stage or multi-stage cascade connection configuration. The unit amplifier (6) has a higher gain characteristic than the unit amplifier (5).

Description

low noise amplifier

[0001] The present invention relates to a low noise amplifier.

[0002] A low-noise amplifier is a circuit that amplifies weak signals without significantly increasing the noise level. The noise characteristics of a low-noise amplifier can be evaluated using the noise figure (NF). Low-noise amplifiers are important circuits that improve the communication speed and transmission distance of wireless communication systems and the sensitivity of sensing systems. A wideband, low-NF low-noise amplifier enables faster wireless communication and higher resolution in sensing systems.

[0003] Low-noise amplifiers are generally designed using transistors such as bipolar transistors and field-effect transistors. Low-noise amplifiers for frequencies above 100 GHz include those that use a source-grounded amplifier with low parasitic resistance or a cascode amplifier connected in series (Non-Patent Document 1). Also reported is a low-noise amplifier that uses a neutralization circuit to cancel the parasitic capacitance that degrades the amplifier's performance in frequencies above 100 GHz, thereby improving the gain and noise figure (Non-Patent Document 2).

[0004] The frequency band above 100 GHz is close to the maximum oscillation frequency (fmax) of a transistor. Therefore, there is a problem that the noise factor of the transistor itself increases as the frequency increases. In addition, the number of amplifier stages must be increased due to the decrease in transistor gain, which increases the power consumption of the entire low-noise amplifier. Furthermore, there is a problem that the flatness of the gain characteristics of the low-noise amplifier deteriorates due to the decrease in gain on the high-frequency side caused by the upper limit of transistor operation.

[0005] A. Gadallah, MHEissa, T. Mausolf, D. Kissinger, and A. Malignaggi, “A300-GHz Low-Noise Amplifier in 130-nm SiGe SG13G3 Technology”, in IEEE Microwave and Wireless Components Letters, vol. 32, no. 4, pp. 331-334, April 2022, doi:10.1109 / LMWC.2021.3128762B. Yun, D.-W. Park, HUMahmood, D. Kim and S.-G. Lee, “A D-Band High-Gain and Low-Power LNA in 65-nm CMOS by Adopting Simultaneous Noise- and Input-Matched Gmax-Core”, in IEEE Transactions on Microwave Theory and Techniques, vol.69, no.5, pp.2519-2530, May 2021, doi:10.1109 / TMTT.2021.3066972

[0006] The present invention has been made to solve the above problems, and has as its object to reduce the NF of the entire low noise amplifier.

[0007] The low-noise amplifier of the present invention comprises a first unit amplifier arranged in a one-stage or multi-stage cascade connection configuration between the input terminal and output terminal of the low-noise amplifier, and a second unit amplifier arranged in a one-stage or multi-stage cascade connection configuration between the input terminal of the low-noise amplifier and the input terminal of the first unit amplifier in the initial stage, wherein the second unit amplifier has higher gain characteristics than the first unit amplifier.

[0008] According to the present invention, the NF of the entire low noise amplifier can be reduced by making the characteristics of the second unit amplifier in the front stage and the first unit amplifier in the rear stage different.

[0009] FIG. 1 is a diagram showing the configuration of a low-noise amplifier according to a first embodiment of the present invention. FIG. 2 is a diagram showing the NF and power consumption of a unit amplifier according to the first embodiment of the present invention. FIG. 3 is a diagram showing the configuration of a unit amplifier according to a second embodiment of the present invention. FIG. 4 is a diagram showing the desired gain characteristics of a low-noise amplifier and the gain characteristics of a unit amplifier in the preceding stage. FIG. 5 is a diagram showing the desired gain characteristics of a low-noise amplifier and the gain characteristics of a unit amplifier in the succeeding stage. FIG. 6 is a diagram showing the results of a simulation of the gain of a design example according to a third embodiment of the present invention. FIG. 7 is a diagram showing the results of a simulation of the NF of a design example according to the third embodiment of the present invention. FIG. 8 is a diagram showing the configuration of a low-noise amplifier according to a fourth embodiment of the present invention.

[0010] [First Embodiment] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. Fig. 1 shows the configuration of a low-noise amplifier according to a first embodiment of the present invention. The low-noise amplifier comprises a 50 Ω receiving resistor R1 having one end connected to an input terminal 1 of the low-noise amplifier and the other end connected to ground, a 50 Ω sending resistor R2 having one end connected to an output terminal 2 of the low-noise amplifier and the other end connected to ground, an input matching circuit 3 that matches the impedance between the low-noise amplifier and a circuit in a preceding stage, an output matching circuit 4 that matches the impedance between the low-noise amplifier and a circuit in a succeeding stage, unit amplifiers 5 arranged in a cascade connection configuration of one or more stages between the output terminal of the input matching circuit 3 and the input terminal of the output matching circuit 4, and unit amplifiers 6 arranged in a cascade connection configuration of one or more stages between the output terminal of the input matching circuit 3 and the input terminal of the first-stage unit amplifier 5.

[0011] In this embodiment, the number of stages of unit amplifiers 6 is M, the number of stages of unit amplifiers 5 is P (M and P are integers equal to or greater than 1), and the total number of stages of unit amplifiers 5, 6 is N = M + P. Unit amplifiers 5, 6 are configured using bipolar transistors capable of amplifying signals of 100 GHz or higher. The specific configuration of unit amplifiers 5, 6 will be described later.

[0012] The unit amplifier 6 has higher gain characteristics than the unit amplifier 5. When the gain of the unit amplifier 6 is set high, according to the Friis formula, the NF of the entire low-noise amplifier is mainly determined by the NF of the first-stage unit amplifier 6. In other words, the unit amplifier 6 reduces the influence of the unit amplifier 5 on the NF of the entire low-noise amplifier. Generally, setting the gain high often results in a deterioration of the NF of the amplifier. However, in this embodiment, maximizing the gain of the unit amplifier 6 is effective in reducing the overall NF in a low-noise amplifier in which the unit amplifiers 5, 6 are cascaded. The role of the unit amplifier 5 is to achieve a wider bandwidth, improved linearity, and flattened gain frequency characteristics.

[0013] 2 is a diagram showing the NF and power consumption of the unit amplifiers 5 and 6. The left vertical axis of FIG. 2 is the NF of the unit amplifiers 5 and 6, the right vertical axis is the power consumption of the unit amplifiers 5 and 6, and the horizontal axis is the gain of the low-noise amplifier. w5 is the power consumption of the unit amplifier 5 in the P stage, and w6 is the power consumption of the unit amplifier 6 in the M stage. n5 Ｐ (The subscript P is the number of stages of the unit amplifier 5) is the NF of the P-stage unit amplifier 5, n6 Ｍ (The subscript M is the number of stages of the unit amplifier 6) is the NF of the M-stage unit amplifier 6. In the example of Fig. 2, the gain of the one-stage unit amplifier 5 is 1 dB, and the NF of the one-stage unit amplifier 5 is 8 dB. The gain of the one-stage unit amplifier 6 is 4 dB, and the NF of the one-stage unit amplifier 6 is 10 dB.

[0014] 2, it can be seen that, for example, to obtain a gain of 8 dB for the entire low-noise amplifier, eight unit amplifiers 5 and two unit amplifiers 6 are required. Since the NF of the entire low-noise amplifier is mainly determined by the NF of the unit amplifier 6, it can be seen that increasing the gain of the unit amplifier 6 is effective in reducing the NF of the low-noise amplifier.

[0015] As described above, in this embodiment, the NF of the entire low noise amplifier can be reduced by making the characteristics of the unit amplifier 6 in the front stage and the unit amplifier 5 in the rear stage different.

[0016] [Second embodiment] Next, a specific example of the unit amplifiers 5 and 6 of the first embodiment will be described. Fig. 3 is a diagram showing the configuration of the unit amplifiers 5 and 6. The unit amplifier 5 comprises a bipolar transistor Q1 having a base connected to the input terminal IN of the unit amplifier 5 and an emitter connected to ground, a capacitor C1 having one end connected to the collector of the transistor Q1 and the other end connected to the output terminal OUT of the unit amplifier 5, and a power supply voltage V ＣＥ and a bias circuit 11 connected to the base of the transistor Q1. The unit amplifier 6 has a similar configuration to the unit amplifier 5.

[0017] The neutralization circuit 10 is formed by connecting a transmission line TL1 and a capacitance C2 in series. The neutralization circuit 10 functions to cancel out the base-collector capacitance of the transistor Q1, which is a factor in reducing the gain of the unit amplifiers 5 and 6, by resonating with the neutralization circuit 10. In the configuration of FIG. 3, the equivalent inductance of the transmission line TL1 and the capacitance C2 works to cancel out the base-collector capacitance. Because the neutralization circuit 10 has positive feedback characteristics, it is desirable for it to operate close to fmax.

[0018] The bias circuit 11 includes a transmission line TL2 having one end connected to the base of the transistor Q1, a capacitor C3 having one end connected to the other end of the transmission line TL2 and the other end connected to ground, and a capacitor C4 having one end connected to the other end of the transmission line TL2 and the other end connected to a bias voltage V ＢＥ and a resistor R3 connected to the resistor R4. The bias circuit 11 for the unit amplifier 5 also serves as a matching circuit that matches the impedance between the unit amplifier 5 and the circuit in the preceding stage (the unit amplifier 5 or unit amplifier 6 in the preceding stage). The bias circuit 11 for the unit amplifier 6 also serves as a matching circuit that matches the impedance between the unit amplifier 6 and the circuit in the preceding stage (the unit amplifier 6 in the preceding stage or the input matching circuit 3).

[0019] In this embodiment, the base and collector of transistor Q1 are DC-insulated by capacitor C2 included in neutralization circuit 10, allowing the base and collector to be biased separately. As explained in the first embodiment, unit amplifiers 5 and 6 have different gain characteristics. The same transistor Q1 may be used in unit amplifiers 5 and 6. The difference in characteristics between unit amplifiers 5 and 6 can be achieved by the design of neutralization circuit 10.

[0020] With the above configuration, this embodiment can extract the maximum gain obtainable from a single transistor, which allows the number of unit amplifier stages to be reduced compared to conventional techniques, thereby reducing the power consumption of the entire low-noise amplifier.

[0021] [Third embodiment] In the first and second embodiments, the desired band of the low noise amplifier is entirely covered by the M-stage unit amplifier 6, thereby realizing a low NF over a wide band. However, the unit amplifier 6 operates in a frequency range close to the fmax of the transistor Q1. This reduces the gain on the high frequency side of the unit amplifier 6, degrading the flatness of the gain. ＬＮＡ represents the desired characteristic of the gain of the low noise amplifier, and g6 １ indicates the gain of the unit amplifier 6 in one stage. １ indicates the gain of the unit amplifier 5 in one stage.

[0022] In this embodiment, as shown in FIG. 5 , the gain peak of the P-stage unit amplifier 5 is set outside the desired band of the low-noise amplifier, thereby compensating for the degradation of the high-frequency gain of the unit amplifier 6. This allows for good flatness of the low-noise amplifier's gain over a wide band. Because a high-gain unit amplifier 6 exists in the preceding stage, the effect of the unit amplifier 5 on the NF of the entire low-noise amplifier is small. As a design guideline, for example, the center frequency of the band of the M-stage unit amplifier 6 may be set to 0.55 fmax to 0.65 fmax, and the center frequency of the band of the P-stage unit amplifier 5 may be set to 0.7 fmax to 0.75 fmax. Such gain characteristics can be achieved by designing the neutralization circuit 10, as described in the second embodiment.

[0023] The simulation results of the gain of the design example in this embodiment are shown in FIG. 6, and the simulation results of the NF of the design example are shown in FIG. Ｐ indicates the gain of the unit amplifier 5 of the P stage, and g6 Ｍ indicates the gain of the M-stage unit amplifier 6. Ｐ indicates the NF of the unit amplifier 5 of the P stage, and n6 Ｍ indicates the NF of the M-stage unit amplifier 6.

[0024] [Fourth Embodiment] In the third embodiment, the gain peak of the final-stage unit amplifier 5 is outside the desired band of the low-noise amplifier, which causes a problem of not being able to match the impedance of the output of the low-noise amplifier. Therefore, in this embodiment, as shown in Figure 8, one unit amplifier 6 having the same design as the M-stage unit amplifier 6 is added as the new final stage of the cascaded unit amplifiers 5 and 6. This solves the problem of not being able to match the impedance of the output of the low-noise amplifier.

[0025] Although the first to fourth embodiments show examples in which a bipolar transistor is used as the transistor Q1, a FET may also be used. In this case, the base, collector, and emitter in the above description may be replaced with the gate, drain, and source, respectively.

[0026] Some or all of the above embodiments may be described as, but are not limited to, the following supplementary notes.

[0027] (Supplementary Note 1) The low-noise amplifier of the present invention comprises a first unit amplifier arranged in a one-stage or multi-stage cascade connection configuration between the input terminal and output terminal of the low-noise amplifier, and a second unit amplifier arranged in a one-stage or multi-stage cascade connection configuration between the input terminal of the low-noise amplifier and the input terminal of the first unit amplifier in the first stage, the second unit amplifier having higher gain characteristics than the first unit amplifier.

[0028] (Supplementary Note 2) In the low-noise amplifier described in Supplementary Note 1, when the maximum oscillation frequency of the transistors used in the first and second unit amplifiers is fmax, the center frequency of the band of the second unit amplifier in a single-stage or multiple-stage cascade connection configuration is set to 0.55fmax to 0.65fmax, and the center frequency of the band of the first unit amplifier in a single-stage or multiple-stage cascade connection configuration is set to 0.7fmax to 0.75fmax.

[0029] (Supplementary Note 3) In the low-noise amplifier described in Supplementary Note 1, the second unit amplifier has a gain peak set within a desired band of the low-noise amplifier, and the first unit amplifier has a gain peak set on the higher frequency side than the desired band of the low-noise amplifier.

[0030] (Supplementary Note 4) The low noise amplifier according to Supplementary Note 3 further comprises one unit amplifier stage having the same design as the second unit amplifier stage as a new final stage of the cascaded first and second unit amplifier stages.

[0031] (Supplementary Note 5) In the low-noise amplifier described in Supplementary Note 1, each of the first and second unit amplifiers comprises a transistor having a base or gate connected to the input terminal of the unit amplifier and an emitter or source connected to ground, a first capacitor having one end connected to the collector or drain of the transistor and the other end connected to the output terminal of the unit amplifier, a neutralization circuit connected between the base or gate and the collector or drain of the transistor and further connected to a power supply voltage, and a bias circuit connected to the base or gate of the transistor, the neutralization circuit being a first transmission line and a second capacitor connected in series, and the bias circuit comprising a second transmission line having one end connected to the base or gate of the transistor, a third capacitor having one end connected to the other end of the second transmission line and the other end connected to ground, and a resistor having one end connected to the other end of the second transmission line and the other end connected to a bias voltage.

[0032] The present invention can be applied to techniques for amplifying signals.

[0033] 3...input matching circuit, 4...output matching circuit, 5, 6...unit amplifier, 10...neutralization circuit, 11...bias circuit, Q1...bipolar transistor, R1, R2, R3...resistors, C1 to C3...capacitors, TL1, TL2...transmission lines.

Claims

1. A low-noise amplifier comprising: a first unit amplifier arranged in a single-stage or multi-stage cascade connection configuration between the input terminal and output terminal of a low-noise amplifier; and a second unit amplifier arranged in a single-stage or multi-stage cascade connection configuration between the input terminal of the low-noise amplifier and the input terminal of the first unit amplifier in the initial stage, wherein the second unit amplifier has higher gain characteristics than the first unit amplifier.

2. A low noise amplifier according to claim 1, wherein, when the maximum oscillation frequency of the transistors used in said first and second unit amplifiers is fmax, the center frequency of the band of said second unit amplifier in a single-stage or multiple-stage cascade connection configuration is set to 0.55fmax to 0.65fmax, and the center frequency of the band of said first unit amplifier in a single-stage or multiple-stage cascade connection configuration is set to 0.7fmax to 0.75fmax.

3. A low noise amplifier according to claim 1, wherein the second unit amplifier has a gain peak set within the desired band of the low noise amplifier, and the first unit amplifier has a gain peak set on the higher frequency side of the desired band of the low noise amplifier.

4. A low noise amplifier according to claim 3, further comprising a unit amplifier having the same design as the second unit amplifier as a new final stage of the cascaded first and second unit amplifiers.

Images