Multi-modal error correction coding and decoding

Abstract

Invention relate to multi-modal error correction coding and decoding in communication systems. A transmitter device (100) applies concatenated coding wherein an input word to an inner encoder is obtained by combining an outer precoder codeword and uncoded information bits. Thus, a first stream of bits (SB1) is encoded into a first codeword (C1). A set of first bit segments (SBS1) and a set of second bit segments (SBS2) are mapped into a set of third bit segments (SBS3) comprising Ncw number of third bit segments (BS3). The set of first bit segments (SBS1) comprise segments of the first codeword (C1) while the set of second bit segments (SBS2) comprises segments a second stream of bits (SB2). Each third bit segment (BS3) is encoded into a second codeword (C2n) to form a transport block (TB) comprising N cw number of second codewords (C2 1, C2 2,...C2NCW). The transport block (TB) is modulated and transmitted.

Description

[0001]MULTI-MODAL ERROR CORRECTION CODING AND DECODING TECHNICAL FIELDExamples of the invention relate to multi-modal error correction coding and decoding in communication systems. Furthermore,examples of the invention also relate to corresponding methods and a computer program.BACKGROUND In the multi-modal eXtended Reality (XR) communications use case defined by the 3rdGeneration Partnership Project (3GPP), high-definition audio-video (AV) streams and haptic (H) information streams are transmitted in the same time-frequency resources. High definition AV streams – 4K or 8K video resolution, 60 frames per second (fps) frame rate – typically have bit rates between 30 and 90 Mbits / s and a reliability requirement of 99%. The typical duration of a 3GPP New Radio (NR) slot is 0.5 ms assuming 30 kHz subcarrier spacing.Moreover, assuming Time Division Duplex (TDD), only a fraction of slots is downlink (DL) slots. It means that there is an AVtransport block (TB) containing 30–90 kbits in each DL slot on average. H streams typically have a bit rate of 12 Mbits / s withreliability requirement of 99.999%. Following the same reasoning as for the AV stream, we obtain that there is on average a 12 kbits haptic TB in each DL slot. SUMMARY An objective of examples of the invention is to provide a solution which mitigates or solves the drawbacks and problems of conventional solutions. Another objective of examples of the invention is to provide differentiated error correction coding. The above and further objectives are solved by the subject matter of the independent claims. Further examples of the invention can be found in the dependent claims.According to a first aspect of the invention, the above mentioned and other objectives are achieved with a transmitter deviceconfigured to: encode a first stream of bits into a first codeword;segment the first codeword into a set of first bit segments comprising ^^^ number of first bit segments, where ^^^ is apositive integer; segment a second stream of bits into a set of second bit segments comprising ^^^number of second bit segments, where ^^^is a positive integer; map the set of first bit segments and the set of second bit segments into a set of third bit segments comprising ^^^number of third bit segments, where ^^^is a positive integer; encode each third bit segment into a second codeword to form a transport block comprising ^^^ number of secondcodewords; modulate the transport block into a communication signal; and transmit the communication signal.An advantage of the transmitter device according to the first aspect is that the first stream of bits is effectively encoded in twosteps using two encoders which enables higher reliability for the first stream of bits compared to the second stream of bits. Thisachieves an unequal error protection between the first and second stream of bits.In an implementation form of a transmitter device according to the first aspect, ^^^ ≥ ^^^.An advantage with this implementation form is that all the second bit segments can be accommodated in the transport block ofcomprising ^^^number of second codewords.In an implementation form of a transmitter device according to the first aspect, ^^^ ≥ ^^^ > 1.An advantage with this implementation form is that all the first bit segments are multiplexed with the second bit segments suchthat all the bits of the first stream of bits can enjoy a higher reliability after decoding.In an implementation form of a transmitter device according to the first aspect, the first codeword is a code codeword of an erasure protection code.An advantage with this implementation form is that the bit segments of the first stream of bits can be recovered even whendecoding of some of the ^^^codewords at the receiver device fails. In an implementation form of a transmitter device according to the first aspect, the erasure protection code is a single parity- check code. An advantage with this implementation form is that a low complexity encoding and decoding become feasible. In an implementation form of a transmitter device according to the first aspect, the erasure protection code is a Reed-Solomoncode over Galois field GF(^^), where ^ is any arbitrary prime number.An advantage with this implementation form is that flexible code rates can be obtained to enable unequal error protectionbetween the first and second stream of bits.In an implementation form of a transmitter device according to the first aspect, the first bit segments have a same bit lengthAn advantage with this implementation form is that it enables a low complexity mapping at the transmitter device and a lowcomplexity de-mapping at the receiver device. This also reduces the overhead in the signaling from the transmitter device tothe receiver device.In an implementation form of a transmitter device according to the first aspect, each third bit segment comprises a single first bit segment.An advantage with this implementation form is that it further reduces the complexity and enables a more convenientimplementation of the present solution.In an implementation form of a transmitter device according to the first aspect, each first bit segment is mapped onto a sameposition in each third bit segment.An advantage with this implementation form is that it simplifies the implementation of the present solution. In an implementation form of a transmitter device according to the first aspect, the same position is offset with an offset value^^^^ ≥ 0 in relation to a start position in the third bit segment.An advantage with this implementation form is that the offset can be set for all ^^^ codewords with a common signalingthereby reducing signaling overhead. In an implementation form of a transmitter device according to the first aspect, the encoding of each third bit segment into the ^^^number of second codewords comprises: encode each third bit segment using ^^^number of encoders.An advantage with this implementation form is that a composite transport block with a larger of number of bits can be obtained.In an implementation form of a transmitter device according to the first aspect, the transmitter device being configured to: attach a cyclic redundancy check, CRC, at each third bit segment before encoding the third bit segment.An advantage with this implementation form is that it enables error detection at the receiver device for robust transmission.In an implementation form of a transmitter device according to the first aspect, the ^^^number of encoders are arranged in parallel to each other.An advantage with this implementation form is that a lower latency encoding is enabled.In an implementation form of a transmitter device according to the first aspect, the first stream of bits is associated with a first error requirement and the second stream of bits is associated with a second error requirement, the first error requirement beinghigher than the second error requirement.An advantage with this implementation form is that it enables multi-modal communications with unequal error protectionrequirements. In an implementation form of a transmitter device according to the first aspect, the transmitter device being configured to: transmit a control signal indicating at least one of: that the transport block comprises the first stream of bits and the second stream of bits, a length ^^^^of a first bit segment, and an offset value ^^^^defining an offset of first bit segment in a third bit segment. An advantage with this implementation form is that it enables the receiver device to obtain the mapping of the bits in the composite transport block for the purpose of decoding.In an implementation form of a transmitter device according to the first aspect, the first stream of bits represents haptic dataand the second stream of bits represents audio-video data.An advantage with this implementation form is that it enables tactile internet applications.In an implementation form of a transmitter device according to the first aspect, each second codeword is a low-density parity check, LDPC, codeword.An advantage with this implementation form is that it could be used with legacy solutions including those enabled with 3GPPNR standard.According to a second aspect of the invention, the above mentioned and other objectives are achieved with a receiver deviceconfigured to:receive a communication signal comprising a modulated transport block, the modulated transport block comprising ^^^number of second codewords, where ^^^is a positive integer; decode each second codeword into a set of decoded third bit segments comprising ^^^ number of third bit segments;de-map the set of decoded third bit segments into a set of decoded first bit segments comprising ^^^number of first bit segments and a set of decoded second bit segments comprising ^^^number of second bit segments, where ^^^and ^^^are positive integers; concatenate the set of decoded first bit segments into a first codeword and decode the first codeword into a first streamof bits; and concatenate the set of decoded second bit segments into a second stream of bits.An advantage of the receiver device according to the second aspect is that it enables detection of two stream of bits with unequalreliability requirements. In an implementation form of a receiver device according to the second aspect, configured to: determine a CRC check for each decoded third bit segment to obtain a set of CRC checks; determine an acknowledgement / negative acknowledgement, ACK / NACK, outcome for the modulated transport block based on the set of CRC checks; and concatenate the set of decoded first bit segments into the first codeword when the ACK / NACK outcome is an ACK.An advantage with this implementation form is that with a low complexity CRC operation the receiver device prepares thedecoding of the first and second stream of bits.In an implementation form of a receiver device according to the second aspect, the ACK / NACK outcome is a NACK when anumber of negative CRC checks in the set of CRC checks is larger than a threshold value ^^, where ^^ > 1, else theACK / NACK outcome is an ACK.An advantage with this implementation form is that the receiver device can identify the possibility of error-free detection ofthe first stream of bits.In an implementation form of a receiver device according to the second aspect, the threshold value ^^is based on a coding property of the first code word.An advantage with this implementation form is that the receiver device can be configured for an optimal decoding performance.In an implementation form of a receiver device according to the second aspect, ^^^≥ ^^^. An advantage with this implementation form is that all the second bit segments can be accommodated in the transport block of comprising ^^^number of second codewords.In an implementation form of a receiver device according to the second aspect, ^^^ ≥ ^^^ > 1.An advantage with this implementation form is that all the first bit segments are multiplexed with the second bit segments such that all the bits of the first stream of bits can enjoy a higher reliability after decoding. In an implementation form of a receiver device according to the second aspect, the first codeword is a code codeword of an erasure-protection code. An advantage with this implementation form is that the bit segments of the first stream of bits can be recovered even when decoding of some of the ^^^codewords at the receiver device fails. In an implementation form of a receiver device according to the second aspect, the erasure-protection code is a single parity- check code.An advantage with this implementation form is that a low complexity encoding and decoding become feasible.In an implementation form of a receiver device according to the second aspect, the erasure-protection code is a Reed-Solomoncode over Galois field GF(^^), where ^ is any arbitrary prime number.An advantage with this implementation form is that flexible code rates can be obtained to enable unequal error protectionbetween the first and second stream of bits. In an implementation form of a receiver device according to the second aspect, the first bit segments have the same bit length An advantage with this implementation form is that it enables a low complexity mapping at the transmitter device and a lowcomplexity de-mapping at the receiver device. This also reduces the overhead in the signaling from the transmitter device tothe receiver device. In an implementation form of a receiver device according to the second aspect, each first bit segment is mapped onto a sameposition in each third bit segment.An advantage with this implementation form is that it simplifies the implementation of the present solution.In an implementation form of a receiver device according to the second aspect, the same position is offset with an offset value^^^^ ≥ 0 in relation to a start position in the third bit segment.An advantage with this implementation form is that the offset can be set for all ^^^codewords with a common signaling thereby reducing signaling overhead.In an implementation form of a receiver device according to the second aspect, the first stream of bits is associated with a firsterror requirement and the second stream of bits is associated with a second error requirement, the first error requirement beinghigher than the second error requirement. An advantage with this implementation form is that it enables multi-modal communications with unequal error protection requirements. In an implementation form of a receiver device according to the second aspect, configured to: receive a control signal indicating at least one of: that the transport block comprises the first stream of bits and thesecond stream of bits, a length ^^^^of a first bit segment, and an offset value ^^^^defining an offset of first bit segment in a third bit segment. An advantage with this implementation form is that it enables the receiver device to obtain the mapping of the bits in thecomposite transport block for the purpose of decoding.According to a third aspect of the invention, the above mentioned and other objectives are achieved with a method for a transmitter device, the method comprises: encoding a first stream of bits into a first codeword; segmenting the first codeword into a set of first bit segments comprising ^^^number of first bit segments, where ^^^is a positive integer; segmenting a second stream of bits into a set of second bit segments comprising ^^^number of second bit segments, where ^^^is a positive integer; mapping the set of first bit segments and the set of second bit segments into a set of third bit segments comprising ^^^number of third bit segments, where ^^^is a positive integer;encoding each third bit segment into a second codeword to form a transport block comprising ^^^number of second codewords; modulating the transport block into a communication signal; and transmitting the communication signal. The method according to the third aspect can be extended into implementation forms corresponding to the implementation forms of the transmitter device according to the first aspect. Hence, an implementation form of the method comprises the feature(s) of the corresponding implementation form of the transmitter device. The advantages of the methods according to the third aspect are the same as those for the corresponding implementation forms of the transmitter device according to the first aspect.According to a fourth aspect of the invention, the above mentioned and other objectives are achieved with a method for areceiver device, the method comprises: receiving a communication signal comprising a modulated transport block, the modulated transport block comprising ^^^number of second codewords, where ^^^is a positive integer; decoding each second codeword into a set of decoded third bit segments comprising ^^^ number of third bit segments;de-mapping the set of decoded third bit segments into a set of decoded first bit segments comprising ^^^number of first bit segments and a set of decoded second bit segments comprising ^^^number of second bit segments, where ^^^and ^^^are positive integers; concatenating the set of decoded first bit segments into a first codeword and decode the first codeword into a firststream of bits; and concatenating the set of decoded second bit segments into a second stream of bits. The method according to the fourth aspect can be extended into implementation forms corresponding to the implementation forms of the receiver device according to the second aspect. Hence, an implementation form of the method comprises thefeature(s) of the corresponding implementation form of the receiver device.The advantages of the methods according to the fourth aspect are the same as those for the corresponding implementation formsof the receiver device according to the second aspect. Examples of the invention also relate to a computer program, characterized in program code, which when run by at least oneprocessor causes the at least one processor to execute any method according to examples of the invention. Further, examplesof the invention also relate to a computer program product comprising a computer readable medium and the mentioned computer program, wherein the computer program is included in the computer readable medium, and may comprises one ormore from the group of: read-only memory (ROM), programmable ROM (PROM), erasable PROM (EPROM), flash memory,electrically erasable PROM (EpreferEPROM), hard disk drive, etc.Further applications and advantages of examples of the invention will be apparent from the following detailed description.BRIEF DESCRIPTION OF THE DRAWINGSThe appended drawings are intended to clarify and explain different examples of the invention, in which:^ Fig. 1 shows a transmitter device according to an example of the invention;^Fig. 2 shows a flow chart of a method for a transmitter device according to an example of the invention;^Fig. 3 shows a receiver device according to an example of the invention;^ Fig. 4 shows a flow chart of a method for a receiver device according to an example of the invention;^ Fig. 5 shows a communication system according to an example of the invention;^ Fig. 6 shows a block diagram of a transmitter device according to further examples of the invention;^Fig. 7 illustrates a composite transport block;^Fig. 8 shows a block diagram of a transmitter device according to further examples of the invention;^ Fig. 9 shows a block diagram of a receiver device according to further examples of the invention;^ Fig. 10 shows a block diagram of a receiver device according to further examples of the invention;^ Fig. 11 illustrates signaling aspects of examples of the invention; and^Fig. 12 and 13 show performance results of examples of the invention. An objective of the invention is to disclose a physical layer coding technique for multi-modal concurrent transmission with twoseparate data streams from a transmitter device to a receiver device such that the Block Error Rate (BLER) for one of thestreams is notably reduced compared to the BLER of one or more other concurrently transmitted data streams. It may be notedthat, here and in the subsequent sections, high reliability and low BLER are terms that may be used interchangeably. Towardthis end, NR physical layer LDPC coding transmission may be modified by disclosing a novel precoding TB with its associatedprocessing in a favorable manner. Thus, a novel solution is presented that works across the codewords and introduces newcomponents to enable higher reliability data transmissions. Further, multiple analytical results are derived and presented toshed light on the performance of the novel solution disclosed herein. Link-level simulation results also showcase the merits ofthe herein disclosed solution.Fig. 1 shows a transmitter device 100 according to an example of the invention. In the example shown in Fig. 1, the transmitterdevice 100 comprises a processor 102, a transceiver 104 and a memory 106. The processor 102 is coupled to the transceiver104 and the memory 106 by communication means 108 known in the art. The transmitter device 100 may be configured forwireless and / or wired communications in a communication system. The wireless communication capability may be provided with an antenna or antenna array 110 coupled to the transceiver 104, while the wired communication capability may be providedwith a wired communication interface 112 e.g., coupled to the transceiver 104.The processor 102 may be referred to as one or more general-purpose central processing units (CPUs), one or more digitalsignal processors (DSPs), one or more application-specific integrated circuits (ASICs), one or more field programmable gatearrays (FPGAs), one or more programmable logic devices, one or more discrete gates, one or more transistor logic devices, oneor more discrete hardware components, or one or more chipsets. The memory 106 may be a read-only memory, a randomaccess memory (RAM), or a non-volatile RAM (NVRAM). The transceiver 104 may be a transceiver circuit, a power controller,or an interface providing capability to communicate with other communication modules or communication devices, such as network nodes and network servers. The transceiver 104, memory 106 and / or processor 102 may be implemented in separatechipsets or may be implemented in a common chipset.That the transmitter device 100 is configured to perform certain actions can in this disclosure be understood to mean that thetransmitter device 100 comprises suitable means, such as e.g., the processor 102 and the transceiver 104, configured to performthe actions. According to examples of the invention the transmitter device 100 is configured to: encode a first stream of bits SB1 into a first codeword ^^; segment the first codeword ^^into a set of first bit segments SBS1 comprising ^^^number of first bit segmentsBS1, where ^^^ is a positive integer; segment a second stream of bits SB2 into a set of second bit segments SBS2 comprising^^^number of second bit segments BS2, where ^^^is a positive integer; map the set of first bit segments SBS1 and the set ofsecond bit segments SBS2 into a set of third bit segments SBS3 comprising ^^^ number of third bit segments BS3, where^^^is a positive integer; encode each third bit segment BS3 into a second codeword ^^^to form a TB comprising ^^^number of second codewords ^^^ , ^^^,…, ^^^^^; modulate the TB into a communication signal 510; and transmit the communication signal 510.Furthermore, in an example of the invention, the transmitter device 100 comprises a processor configured to: encode a firststream of bits SB1 into a first codeword ^^; segment the first codeword ^^into a set of first bit segments SBS1 comprising^^^ number of first bit segments BS1, where ^^^ is a positive integer; segment a second stream of bits SB2 into a set of secondbit segments SBS2 comprising ^^^number of second bit segments BS2, where ^^^is a positive integer; map the set of first bit segments SBS1 and the set of second bit segments SBS2 into a set of third bit segments SBS3 comprising ^^^number of third bit segments BS3, where ^^^is a positive integer; encode each third bit segment BS3 into a second codeword ^^^to form aTB comprising ^^^ number of second codewords ^^^ , ^^^,…, ^^^^^; and modulate the TB into a communication signal 510.The transmitter device 100 comprises a transceiver configured to: transmit the communication signal 510.Moreover, in yet another example of the invention, the transmitter device 100 for a communication system 500 comprises aprocessor and a memory having computer readable instructions stored thereon which, when executed by the processor, causethe processor to: encode a first stream of bits SB1 into a first codeword ^^; segment the first codeword ^^ into a set of first bitsegments SBS1 comprising ^^^number of first bit segments BS1, where ^^^is a positive integer; segment a second stream of communication signal 510; and transmit the communication signal 510.Fig. 2 shows a flow chart of a corresponding method 200 which may be executed in a transmitter device 100, such as the oneshown in Fig. 1. The method 200 comprises; encoding 202 a first stream of bits SB1 into a first codeword ^^; segmenting 204the first codeword ^^into a set of first bit segments SBS1 comprising ^^^number of first bit segments BS1, where ^^^is apositive integer; segmenting 206 a second stream of bits SB2 into a set of second bit segments SBS2 comprising ^^^ numberof second bit segments BS2, where ^^^is a positive integer; mapping 208 the set of first bit segments SBS1 and the set ofsecond bit segments SBS2 into a set of third bit segments SBS3 comprising ^^^ number of third bit segments BS3, where^^^is a positive integer; encoding 210 each third bit segment BS3 into a second codeword ^^^to form a TB comprising ^^^number of second codewords ^^^ , modulating 212 the transport block TB into a communication signal 510; and transmitting 214 the communication signal 510.Fig. 3 shows a receiver device 300 according to an example of the invention. In the example shown in Fig. 3, the receiverdevice 300 comprises a processor 302, a transceiver 304 and a memory 306. The processor 302 is coupled to the transceiver304 and the memory 306 by communication means 308 known in the art. The receiver device 300 may be configured forwireless and / or wired communications in a communication system. The wireless communication capability may be providedwith an antenna or antenna array 310 coupled to the transceiver 304, while the wired communication capability may be providedwith a wired communication interface 312 e.g., coupled to the transceiver 304. The processor 302 may be referred to as one or more general-purpose CPUs, one or more DSPs, one or more ASICs, one or more FPGAs, one or more programmable logic devices, one or more discrete gates, one or more transistor logic devices, one or more discrete hardware components, one or more chipsets. The memory 306 may be a read-only memory, a RAM, or aNVRAM. The transceiver 304 may be a transceiver circuit, a power controller, or an interface providing capability tocommunicate with other communication modules or communication devices. The transceiver 304, the memory 306 and / or theprocessor 302 may be implemented in separate chipsets or may be implemented in a common chipset.That the receiver device 300 is configured to perform certain actions can in this disclosure be understood to mean that thereceiver device 300 comprises suitable means, such as e.g., the processor 302 and the transceiver 304, configured to performthe actions.According to examples of the invention the receiver device 300 is configured to: receive a communication signal 510comprising a modulated TB, the modulated TB comprising ^^^number of second codewords ^^^ , ^^^isa positive integer; decode each second codeword ^^^ into a set of decoded third bit segments SBS3 comprising ^^^ number ofthird bit segments BS3; de-map the set of decoded third bit segments SBS3 into a set of decoded first bit segments SBS1comprising ^^^ number of first bit segments BS1 and a set of decoded second bit segments SBS2 comprising ^^^ number ofsecond bit segments BS2, where ^^^and ^^^are positive integers; concatenate the set of decoded first bit segments SBS1 intoa first codeword ^^ and decode the first codeword ^^ into a first stream of bits SB1; and concatenate the set of decoded secondbit segments SBS2 into a second stream of bits SB2. To concatenate the set of decoded first bit segments SBS1 into a first codeword ^^ may be understood as a joint de-mappingand de-multiplexing wherein the reverse operation at the transmitter device is mirrored to obtain the first codeword ^^. Further to concatenate the set of decoded second bit segments SBS2 into a second stream of bits SB2 may be understood as joint mapping and multiplexing of the bit segments. In examples of the invention, ^^^ ≥ ^^^ which means the number of codewords are larger or equal to that of the of second bitsegments BS2. In this way, one can accommodate at least on second bit segment per codeword and therefore provide transmitdiversity if needed for more robust transmissions.In yet further examples of the invention, ^^^ ≥ ^^^ > 1. By satisfying this condition, at least one first bit segment can beassociated or multiplexed together with one second bit segment. This enables for example the important cases, where one firstbit segment and one second bit segment are mapped in each codeword. Fig.5 shows a communication system 500 according to an example of the invention. The communication system 500 in thedisclosed example comprises a transmitter device 100 and a receiver device 300 configured to communicate and operate in thecommunication system 500. For simplicity, the shown communication system 500 only comprises one transmitter device 100 and one receiver device 300. However, the communication system 500 may comprise any number of transmitter device 100and any number of receiver device 300 without deviating from the scope of the invention.The transmitter device 100 may as shown in Fig.5 be a network access node such as a base station while the receiver device 300 is a client device such as a UE. However, the reverse case is also possible, i.e., the transmitter device 100 is a client device while the receiver device 300 is a network access node. In yet further examples, both the transmitter device 100 and receiver device 300 may be client devices e.g., in sidelink communications. Further details related to examples of the invention will now be described in a 3GPP 5G context. Thus, 3GPP 5G terminology, definitions, expressions and system architecture will be used. Hence, in the give examples each second codeword ^^^is a LDPC codeword according to examples of the invention. It is herein disclosed multi-modal concurrent transmission of multiple data streams with unequal BLER requirements by concatenated coding wherein the input word to an inner encoder is obtained by combining an outer precoder codeword anduncoded information bits. Thus, the first stream of bits SB1 may be associated with a first error requirement and the secondstream of bits SB2 may be associated with a second error requirement. The first error requirement is higher than the seconderror requirement according to examples of the invention. One such useful application is when the first stream of bits SB1represents H data and the second stream of bits SB2 represents AV data. The present solution enables enhanced concurrent transmission of H and AV data streams for tactile internet, as well as, more in general, for all those applications, beyond tactile internet, for which transmission of multiple streams with unequal BLERs is required.It is also possible to extend the present solution to cover multiple H streams, i.e., two or more H streams, with variable reliabilityrequirements, where different outer encoders are used for two or more H streams. The outer encoders might be from the sameclass but with different rates e.g., two or more R-S encoders.Fig. 6 shows a block diagram of a transmitter device 100 according to examples of the invention. The transmitter device 100in Fig. 6 illustrates the example of un-equal error protection (UEP) in which H data (i.e., first stream of bits SB1) is additionallyprotected compared to the rest of the transmitted data, i.e., AV data (i.e., second stream of bits SB2). The additional protectionis realized in a special manner wherein an erasure-protection code may be used. The reason for this choice is that a typicalcomposite TB is longer than the maximum NR message length that fits in a single LDPC codeword. Thus, the LDPC code hasalready exhausted its maximum length and therefore it is convenient to encode across the LPDC codewords in order to enjoy a higher diversity gain compared to single-codeword transmission. Hence, the first codeword ^^is a code codeword of an erasure protection code in examples of the invention.The transmitter device 100 in Fig. 6 has an outer encoder 124 and an inner encoder 120 where the inner encoder input is fedwith the output of the outer encoder. With reference to Fig. 6 the transmitter device 100 comprises an erasure protectionprecoder block 124 (i.e., the outer encoder) configured to receive a first bit stream SB1. Optionally a CRC attach block 122may attach CRC at the first bit stream SB1 before the erasure protection precoder block 124. The erasure protection precoderblock 124 encodes a H stream of bits so as to produce a precoded H (pH) stream of bits, i.e., an outer codeword also denoted afirst codeword ^^. The scope of the precoding is to make possible erasure recovery in the receiver device 300.The first codeword ^^ is sent to a segmentation block 126 where the first codeword ^^ is segmented into a number of segmentshaving similar lengths in examples of the invention. The number of segments is the same as or less than the number of LDPCcodewords ^^^, i.e., the inner codeword, but is larger than 1 in examples of the invention. After having obtained a set of second bit segments SBS2, the set of first bit segments SBS1 and the set of second bit segmentsSBS2 are mapped into a set of third bit segments SBS3 in the multiplexer 128, thus forming the composite TB comprising ^^^third bit segments BS3 where ^^^ is a positive integer. A CRC check on the entire composite TB may be attached in a TBlevel CRC attach block 130. The AV streams are packetized, such that the size of the set of second bit segments SBS2 depends on the coding rate used by the inner encoder and well as the transmission modulation order. This helps the receiver device 300 to detect if the composite TB is correctly detected at the receiver device 300. After the CRC attach block 130, the obtainedcomposite TB is segmented in a segmentation block 132 to provide the bit input to the inner encoders 120. Unlike conventionalconcatenation, the input of the inner encoder 120 in the present scheme is fed with a combination of an outer codeword, encodedH bits, and uncoded information AV bits. Having uncoded information bits in the input of the inner encoder 120 is a feature ofthe present coding scheme. It may also be noted that the transmitter device 100 in examples of the invention comprises ^^^ number of CRC attach blocks134 configured to attach a CRC at each third bit segment BS3 before encoding the third bit segment BS3 into a secondcodeword. The use of codeword-level CRC checks enables erasure detection within the inner TB decoder (i.e., the right CRCattach for each LDPC encoder). One may remove CRCs to decode the resulting concatenated code using, e.g., a conventionalBelief Propagation (BP) decoder based on the combined parity check matrix of an inner code and an outer code. The BP decoderhowever tends to equalize the error protection levels of all information bits. This goes to the advantage of the non-precodedinformation and to the detriment of the precoded information. Separating the decoding task into two separate stages – multipleparallel BP decoders, followed by erasure recovery – as shown in Fig. 9 maintains different protection levels for the precodedand non-precoded information. Fig.7 shows a composite TB according to examples of the invention. That the TB is a composite TB can mean that a transport block TB comprises the first stream of bits SB1 and the second stream of bits SB2. From the example in Fig.7 it may be notedthat each first bit segment BS1 may be mapped onto a same position in each third bit segment BS3. The notation same positionmay be understood such that an equal number of symbols / bits from a reference symbol / bit. Mentioned same position may alsobe offset with an offset value ^^^^≥ 0 in relation to a start position in the third bit segment BS3. The offset value ^^^^definesan offset of first bit segment BS1 in a third bit segment BS3. Further, a length ^^^^ of a first bit segment BS1 is also illustrated.Thus, in examples of the invention, the first bit segments BS1 have a same bit length ^^^^. Further, each third bit segment BS3 comprises a single first bit segment BS1. Before moving to the decoder description, we provide exemplary implementations of the erasure protection precoder (EPP).The purpose of erasure protection precoder, is to enable transmitted bits where some of the received bits are completely erased.That is, no information is available at the receiver device 300 about the decoded bits what so ever. Hence, the focus will be ona particular error correction codes that are tailored to erasure correction. Fig.8 shows a block diagram of a R-S EPP encoder of a transmitter device 100 according to examples of the invention. In a first precoding step, the R-S EPP encoder maps non-overlapping haptic packet segments of length ^^^^bits to R-S codewordsof length ^^^ symbols to be mapped to the alphabets of the size 2^in mapping blocks 142. Then using the R-S encoder blocks 144 the encoded symbols outputted from the R-S encoder blocks 144 are passed to a two-dimensional rectangular interleaver146. In a second precoding step, each R-S codeword is written to a row of the rectangular interleaver 146. In a third precodingstep, R-S encoded symbols are read out from each interleaver column of the rectangular interleaver 146 and mapped to pH segments within a composite TB as illustrated in Fig.8. The composite TB is then segmented, LDPC-encoded and transmittedas illustrated in Fig. 6 above. The black boxes represent CRC.At the receiver device 300, each LDPC decoding failure produces erasures in a corresponding column of the rectangular(de)interleaver. The deinterleaver uniformly distributes the erasures across the R-S codewords, thereby facilitating erasurerecovery. Fig. 9 therefore shows a block diagram of erasure-protection precoded receiver device 300 according to examples ofthe invention. The receiver device 300 comprises a segmentation block 320 configured to receive a composite TB and segmentthe composite TB into ^^^ received inner-encoded codewords. Each LDPC decoder 322 decodes a second codeword among^^^number of second codewords. Each decoded LDPC codeword has its CRC checked in the CRC check block 324 and,upon a failure, a block of erasures is delivered to the concatenation block 328 instead of the corrupted bits. By using theconcatenation block 328 and demultiplexing of the decoded codewords using the LDPC decoders 322, a received pH packetwith erasure is obtained, which is passed to the erasure recovery block 332. Erasure recovery succeeds if there are ^^ or lesserased segments, where ^^is the erasure recovery capability. The pH CRC check block 334 is optional, as the H-packet ACK / NACK (H-ACK / NACK) can be generated based on the codeword-level CRC checks: when there are ^^or less codeword-level CRC check failures a H-ACK signal is fed back to the transmitter device 100. Otherwise, a H-NACK signal is fed backto the transmitter device 100 via suitable control signalling. The final H-packet ACK / NACK (H-ACK / NACK) may be obtainedby an OR operation 326 where the output becomes NACK if any of the CRC checks among the codewords is not satisfied.Regarding the decoding latency, the block diagram of Fig. 9 seems to suggest that erasure recovery can be started only afterthe whole composite TB is LDPC-decoded and CRC-checked, thereby adding further delay for the H packet delivery comparedto AV packet. We show here that the above transmission scheme allows a more delay-efficient implementation wherein the H packet can be delivered earlier than the AV packet which is transmitted in the same TB. Fig. 10 therefore shows an exemplary composite TB decoder implementation of a receiver device 300 wherein the LDPC decoding iterations of all codewords are executed in parallel, and after each decoding iteration the codeword-level CRC is checked. The erasure recovery block 332 in Fig.9 corresponds to the blocks shown in Fig.10. Within the illustrated decoding pipeline, owing to the properties of MDS codes, erasure recovery can start as soon as ^^^out of the ^^^LDPC codewordshave been correctly decoded. Thus, erasure recovery can start – and even finish – earlier than completion of the LDPC decoding.The insight is based on the fact that, for a (^^^ , ^^^) MDS code, it is sufficient to receive a minimum of ^^^ symbols out of^^^ in order to be able to recover the information. Fig. 10 shows an example when the composite TB consists of ^^^ = 3LDPC codewords and wherein a (3,2) MDS code is used in the H precoder of the transmitting device 100. The codewords’LDPC decoding iterations proceed in parallel and codeword-level CRCs are checked after every iteration. Thus, note thehorizontal time axis in the bottom of Fig. 10. Only ^^^ = 2 successfully decoded segments are enough in order to recover thetransmitted H information. As soon as any two out of three codewords pass the codeword-level CRC checks, i.e., the 1st and3rdcodeword in Fig.10, erasure recovery is carried out and the H packet is delivered.Fig. 11 illustrates signalling aspects of examples of the invention. The transmitter device 100 is configured to transmit a controlsignal 520 indicating at least one of: that the transport block TB comprises the first stream of bits SB1 and the second stream of bits SB2, a length ^^^^of a first bit segment BS1, and / or an offset value ^^^^defining an offset of first bit segment BS1 in a third bit segment BS3.With reference to Fig. 11 the transmitter device 100, in this case a gNB, first transmits the control signal 520 to the receiverdevice 300, in this case a UE, at time instance T1. The control signal 520 may carry a Downlink Control Information (DCI)packet, e.g., in a Physical Downlink Control Channel (PDCCH) in the DL, that schedules a composite TB may have a specificformat and length so as to implicitly indicate that the scheduled TB is a so-called composite TB as previously discussed, or a bit in the DCI may indicate explicitly whether the scheduled TB is composite or not. The DCI may further indicate a length^^^ of H segment and offset ^^^ of the pH segments within each systematic bit word, where examples of ^^^ and ^^^ aredepicted in Fig. 7. After transmission of the control signal 520, the transmitter device 100 performs data transmission of thecommunication signal 510 comprising the modulated composite TB.The DCI can be configured using tables by constructing a set of length ^^^ and offset ^^^. For example, for four values of^^^ = {^^ , ^^ , ^^ , ^^} and ^^^ = {^^ , ^^, ^^ , ^^}, the control signalling can be communicated with 4 bits. By doing this, theamount of the overhead is confined. The receiver device 300 will receive the control signal 520 at time instance T2, and after decoding of the DCI derives information about content of the control signal 520. Thereafter, the receiver device 300 at time instance T4 will receive thetransmission 510 made by the transmitter device 100 at time instance T3. By using the information in the control signal 520,the receiver device 300 can obtain the mapping structure or configuration of the composite TB as e.g., illustrated in Fig. 7 toproperly decode the data transmission 510 from the transmitter device 100.In the following section analytical results are provided that show that the present solution enhances the reliability of TBtransmissions. Towards this end, we first analyse a conventional TB and then compare it with a composite TB according toexamples of the invention.In the following, consider a TB that consists of ^^^codewords, where each codeword is encoded and decoded independently.The value ^^^ is the number of LDPC encoders such that for the parallel transmission, without loss of generality ^^^,^ =^^^,^^ = ^^^ and for the conventional joint transmission similarly the value ^^^ is the number of LDPC encoders. Thus,the TB consists of ^^^ consecutive codewords. An objective is to be able to correctly retrieve all encoded bits in the^^^ codewords. Therefore, in order to receive the entire TB correctly, all the ^^^ codewords should be decoded correctly.In the following, let ^^ denote the BLER for a given LPDC codeword. That is, the average probability of error at the receiverdevice 300 when the decoder decodes one of the ^^^ codewords in the above TB. The following proposition gives the BLERof the TB (^^,^^) of ^^^ codewords, whose proof is given in Appendix I.Proposition IThe BLER of a conventional composite TB of ^^^ codewords is given by: That is, for a very small ^^, for each codeword the BLER of the TB linearly increases with the number of codewords.We next consider the present solution as illustrated with the example in Fig. 6 where the H bits also enjoy block-wise erasureprotection and wherein the H data packet is spread over multiple codewords but, prior to that, an erasure code is applied toprecode it so as to make recovery the data possible if, e.g., one of the decoded LDPC codewords is in error. It may be noted that when each codeword has the maximum length in the standard, further coding protection cannot be achieved for a given fixed error correction. One approach is to use an erasure-protection precoding to correct one erased LDPC codeword in the TB. To do this, one needsan additional error protection coding with rate (^^^ − 1) / ^^^ prior to the conventional error correction coding per codeword.Therefore, the received H packet will be in error if at least two codewords are in error.We next analytically show the merits of the additional erasure precoding according to examples of the invention. In thefollowing let ^^ denote the BLER for a given codeword. The following proposition gives the BLER of TB when at most oneerroneous codeword in the TB can be resolved at the decoder of the receiver device 300. Proposition II The BLERs of (^^^ − 1) / ^^^-rate precoded haptic (pH) and the audio-visual (AV) streams within a composite transportblock of ^^^ codewords, are respectively given by5 10≈ ^^^^^if ^^≪ 1 (2b)Based on the above, for a very small ^^ for each codeword, the BLER of the composite TB for the H bits quadratically increaseswith the number of the codewords but the impact of the codeword error probably ^^reduces quadratically to ^^^as well.15 Comparing the above two results in Eq. (1) and (2) we see that: 20 Therefore, for the cases that the first order approximation term is dominant the gain is notable. The spectral efficiency cost due to erasure precoding is contained by design. Thus, an unequal error protection wherein the H data is further protected isachievable. Assume that a communication system 500 is configured such that the BLER of AV stream is set to 0.1-1%. The precoding 25where one erasure can be corrected brings down the BLER of H stream to nearly ^^^,^^^^^^ ≈ ^^^^,^^^^^≈ 10^^to 10^^. Therefore, this approach enables a very elegant construction wherein, if one would like to transmit two types of data, e.g., H data and AVdata, we multiplex the AV data and precode the H data with one additional precoding stage using a high-rate erasure protectioncode. Thus, by construction, we simultaneously satisfy high and low BLER without changing the Modulation and Coding Scheme (MCS) or Channel Quality Indicator (CQI) feedback. This is very appealing from an implementation point of view.30 For block fading channel the BLER of a single codeword can be written as: ^(^^^)^ ^= ^^^^(4) where ^ is a constant that depends on the code rate and ^ is the Signal-to-Noise Ratio (SNR) exponent that indicates thediversity order and can be found using the characteristics of the channel. 35 For the composite TB of ^^^codewords, using Proposition I, the approximate BLER hence becomes: ^ ^ ^,^^ ≈ ^^^ ^^^^(5) Using the erasure precoded haptic transmission result in Proposition II, we have: That is, the diversity order becomes doubled. Here ^ is a constant that depends on the coding rate. If we adjust the coding ratesuch that the rate loss of erasure precoder is accounted for then ^ > ^. However, the impact of term ^^^^^ will be morepronounced at high SNR. In other words: To form a feeling consider the following: for ^ = 1, i.e., diversity order of one, = 1.25 which is nearly 1 dB back-off due torate increase, and let ^^^ = 6 and ^^^ = 20 dB, then That is, the error is nearly decreased by two orders of magnitude even considering the rate loss.Let the total number H and AV bits compromise ^^^ codewords, whose ^ of them are H and the other ^^^ − ^ are AV. Letassume that we have independent block fading channels over each codeword such that the BLER of a single codeword is given by: ^ ^^≈^^^^ Now using this, we can write the BLER of the following schemes.Conventional solution 1 with independent transmission:^^^^ ^^,^≈^^^^(10) Where the same code rate as the joint transmission is considered. Conventional solution 2 with joint transmission: ^^^^,^ = ^^^,^^^≈^^^^^^^^(12) Erasure-precoded joint transmission according to examples of the invention: ^^^,^^^^^≈^^^^^^^^ (14)where ^ > ^ that depends on the increased code rate due the precoding. By inspection we see that ^^^,^^^ performs worstamong all schemes but this loss is not critical since the system performance is determined mainly by H as it requires muchsmaller BLER. For any MCSs we can find ^ and ^, by which we can compare all schemes.To compare BLER behaviours of the above schemes, we utilize the formulas in Eq. (10) - (14). For the single codeword in Eq.(9), we set ^ = ^ = 1 without loss of generality (note that the role of ^ is the SNR shift). We consider a composite TB of^^^ = 6 LDPC codewords. Additionally, we assume that 1 / 3 of the data is H bits (i.e. ^ = 2). We further set ^ = 1.25 toaccount for the rate loss of the erasure precoder to compensate for the rate loss associated to the erasure precoder. Using theseparameters, we obtain the BLER performances of the schemes as a function of SNR, as depicted in Fig.12. We see from Fig. 12 that the erasure precoding notably enhances the performance at the cost of a slight decrease in the performance for AV data. Performance evaluations have been carried out with the assumptions given in Table 1. The slot duration is 1 millisecond.Conventional solution 1 is evaluated by transmitting one H TB and one AV TB in each slot; and Conventional solution 2 isevaluated by transmitting a combined TB in each slot, where multiplexing of H and AV data is done at upper layers. The currentsolution according to examples of the invention is evaluated by transmitting one composite TB in each slot. The modulation is64QAM. The decoder is a conventional Belief-Propagation LDPC decoder running up to 20 iterations.Table 1. Simulation parameters.Not Precoded PrecodedH data packet size [kbits] 12 12Erasure recovery capability 0 1Precoder rate 1 0.833333Precoded packet size [kbits] 12 14.4AV data packet size [kbits] 36 36LDPC payload A [kbits] 48 50.4LDPC output size CE [kbits] 64 64LDPC rate A / (CE) 0.750 0.788Number of LDPC code blocks C 6 6Fig. 13 shows performance evaluations with Rayleigh-distributed block fading, where each code block within a TB undergoesindependent Rayleigh fading. Fading is assumed perfectly known and compensated for in the receiver device. All the schemesin Fig. 13 have same aggregate (H + AV) spectral efficiency. As for independent transmission, the H and AV streams have thesame MCS. From Fig. 13 it may derived that the performance of the H stream is significantly improved. Additionally, the SNRloss of the AV stream is not notable. More interestingly the analytical results predicted the same behavior as illustrated in Fig.12.A network access node herein may also be denoted as a radio network access node, an access network access node, an accesspoint (AP), or a base station (BS), e.g., a radio base station (RBS), which in some networks may be referred to as transmitter,“gNB”, “gNodeB”, “eNB”, “eNodeB”, “NodeB” or “B node”, depending on the standard, technology and terminology used.The radio network access node may be of different classes or types such as e.g., macro eNodeB, home eNodeB or pico basestation, based on transmission power and thereby the cell size. The radio network access node may further be a station, which is any device that contains an IEEE 802.11-conformant media access control (MAC) and physical layer (PHY) interface to thewireless medium (WM). The radio network access node may be configured for communication in 3GPP related long termevolution (LTE), LTE-advanced, fifth generation (5G) wireless systems, such as new radio (NR) and their evolutions, as well as in IEEE related Wi-Fi, worldwide interoperability for microwave access (WiMAX) and their evolutions.A client device herein may be denoted as a user device, a user equipment (UE), a mobile station, an internet of things (IoT)device, a sensor device, a wireless terminal and / or a mobile terminal, and is enabled to communicate wirelessly in a wireless communication system, sometimes also referred to as a cellular radio system. The UEs may further be referred to as mobile telephones, cellular telephones, computer tablets or laptops with wireless capability. The UEs in this context may be, for example, portable, pocket-storable, hand-held, computer-comprised, or vehicle-mounted mobile devices, enabled to communicate voice and / or data, via a radio access network (RAN), with another communication entity, such as another receiveror a server. The UE may further be a station, which is any device that contains an IEEE 802.11-conformant MAC and PHYinterface to the WM. The UE may be configured for communication in 3GPP related LTE, LTE-advanced, 5G wireless systems,such as NR, and their evolutions, as well as in IEEE related Wi-Fi, WiMAX and their evolutions. Furthermore, any method according to examples of the invention may be implemented in a computer program, having code means, which when run by processing means causes the processing means to execute the steps of the method. The computer program is included in a computer readable medium of a computer program product. The computer readable medium may comprise essentially any memory, such as previously mentioned a ROM, a PROM, an EPROM, a flash memory, an EEPROM,or a hard disk drive.Moreover, it should be realized that the transmitter device and the receiver device comprise the necessary communicationcapabilities in the form of e.g., functions, means, units, elements, etc., for performing or implementing examples of the invention. Examples of other such means, units, elements and functions are: processors, memory, buffers, control logic, encoders, decoders, rate matchers, de-rate matchers, mapping units, multipliers, decision units, selecting units, switches, interleavers, de-interleavers, modulators, demodulators, inputs, outputs, antennas, amplifiers, receiver units, transmitter units, DSPs, TCM encoder, TCM decoder, power supply units, power feeders, communication interfaces, communication protocols, etc. which are suitably arranged together for performing the solution.Therefore, the processor(s) of the transmitter device and the receiver device may comprise, e.g., one or more instances of aCPU, a processing unit, a processing circuit, a processor, an ASIC, a microprocessor, or other processing logic that may interpret and execute instructions. The expression “processor” may thus represent a processing circuitry comprising a plurality of processing circuits, such as e.g., any, some or all of the ones mentioned above. The processing circuitry may further performdata processing functions for inputting, outputting, and processing of data comprising data buffering and device controlfunctions, such as call processing control, user interface control, or the like. Finally, it should be understood that the invention is not limited to the examples described above, but also relates to and incorporates all examples within the scope of the appended independent claims. Appendix I: BLER of Composite TB To have a correctly received composite block of ^^^codewords, all of them should be received correctly. Thus, we can write the correct probability of the corresponding composite TB as ^^^ = ^ ^^^^^^Since the errors are mutually independent among the codewords and since they all use the same MCS with the same block length we have ^^^= ^^. Thus ^^ = (^^)^^^Then the probability of error for the composite TB is given by: Assuming that ^^ ≪ 1, by using the approximation (1 + ^)^≈ ^^ for ^ ≪ 1. We have ^^,^^ ≈ ^^^^^Appendix II: BLER of ^ ^ - Rate Precoded Composite TBIn this scheme, one erasure will be corrected. That is, the error occurs at the receiver device if the number of incorrectly decodedcodewords are larger than 2. To have correct composite TB, we should have at the most one erasure. 5To compute the BLER, we start counting the error event from the first codeword. If the first codeword is in error then the onlyway to recover the TB is to receive other ^^^ − 1 codewords correctly. If we receive the first codeword correctly, then wecontinue repeating the same procedure for the second codewords and check the possibility of both correct or erroneous receptionof that and continue until the last codeword. This yields: 10 15 20 25 where ^^,^^has been derived in Eq. (1).

Claims

CLAIMS 1. A transmitter device (100) configured to: encode a first stream of bits (SB1) into a first codeword (^^); segment the first codeword (^^) into a set of first bit segments (SBS1) comprising ^^^number of first bit segments (BS1), where ^^^is a positive integer; segment a second stream of bits (SB2) into a set of second bit segments (SBS2) comprising ^^^number of second bitsegments (BS2), where ^^^ is a positive integer;map the set of first bit segments (SBS1) and the set of second bit segments (SBS2) into a set of third bit segments(SBS3) comprising ^^^number of third bit segments (BS3), where ^^^is a positive integer; encode each third bit segment (BS3) into a second codeword (^^^) to form a transport block (TB) comprising ^^^number of second codewords (^^^ , ^^^,…, ^^^^^); modulate the transport block (TB) into a communication signal (510); and transmit the communication signal (510).

2. The transmitter device (100) according to claim 1, wherein ^^^ ≥ ^^^.

3. The transmitter device (100) according to claim 2, wherein ^^^ ≥ ^^^ > 1.

4. The transmitter device (100) according to any one of the preceding claims, wherein the first codeword (^^) is a code codeword of an erasure protection code.

5. The transmitter device (100) according to claim 4, wherein the erasure protection code is a single parity-check code.

6. The transmitter device (100) according to claim 4, wherein the erasure protection code is a Reed-Solomon code over Galoisfield GF(^^), where ^ is any arbitrary prime number.

7. The transmitter device (100) according to any one of the preceding claims, wherein the first bit segments (BS1) have a same bit length ^^^^.

8. The transmitter device (100) according to any one of the preceding claims, wherein each third bit segment (BS3) comprises a single first bit segment (BS1).

9. The transmitter device (100) according to claim 8, wherein each first bit segment (BS1) is mapped onto a same position ineach third bit segment (BS3).

10. The transmitter device (100) according to claim 9, wherein the same position is offset with an offset value ^^^^ ≥ 0 inrelation to a start position in the third bit segment (BS3).

11. The transmitter device (100) according to any one of the preceding claims, wherein the encoding of each third bit segment (BS3) into the ^^^number of second codewords (^^^ , ^,…, ^^^^^) comprises: encode each third bit segment (BS3) using ^^^number of encoders (120).

12. The transmitter device (100) according to claim 11, configured to:attach a cyclic redundancy check, CRC, at each third bit segment (BS3) before encoding the third bit segment (BS3).

13. The transmitter device (100) according to any one of the preceding claims, wherein the first stream of bits (SB1) is associated with a first error requirement and the second stream of bits (SB2) is associated with a second error requirement, thefirst error requirement being higher than the second error requirement.

14. The transmitter device (100) according to any one of the preceding claims, configured to: transmit a control signal (520) indicating at least one of: that the transport block (TB) comprises the first stream of bits (SB1) and the second stream of bits (SB2), a length ^^^^of a first bit segment (BS1), and an offset value ^^^^defining anoffset of first bit segment (BS1) in a third bit segment (BS3).

16. The receiver device (300) according to claim 15, configured to: determine a CRC check for each decoded third bit segment (BS3) to obtain a set of CRC checks; determine an acknowledgement / negative acknowledgement, ACK / NACK, outcome for the modulated transport block (TB) based on the set of CRC checks; and concatenate the set of decoded first bit segments (SBS1) into the first codeword (^^) when the ACK / NACK outcome is an ACK.

17. The receiver device (300) according to claim 16, wherein the ACK / NACK outcome is a NACK when a number of negativeCRC checks in the set of CRC checks is larger than a threshold value ^^, where ^^ > 1, else the ACK / NACK outcome is anACK.

18. The receiver device (300) according to claim 17, wherein the threshold value ^^is based on a coding property of the firstcode word (^^).

19. The receiver device (300) according to any one of claims 15 to 18, wherein ^^^ ≥ ^^^.

20. The receiver device (300) according to claim 19, wherein ^^^≥ ^^^> 1.

21. The receiver device (300) according to any one of claims 15 to 20, wherein the first codeword (^^) is a code codeword ofan erasure-protection code.

22. The receiver device (300) according to claim 21, wherein the erasure-protection code is a single parity-check code.

23. The receiver device (300) according to claim 21, wherein the erasure-protection code is a Reed-Solomon code over Galoisfield GF(^^), where ^ is any arbitrary prime number.

24. The receiver device (300) according to any one of claims 15 to 23, wherein the first bit segments (BS1) have the same bit length ^^^^.

25. The receiver device (300) according to any one of claims 15 to 24, wherein each first bit segment (BS1) is mapped onto asame position in each third bit segment (BS3).

26. The receiver device (300) according to claim 25, wherein the same position is offset with an offset value ^^^^ ≥ 0 inrelation to a start position in the third bit segment (BS3).

27. The receiver device (300) according to any one of claims 15 to 26, wherein the first stream of bits (SB1) is associated witha first error requirement and the second stream of bits (SB2) is associated with a second error requirement, the first errorrequirement being higher than the second error requirement.

28. The receiver device (300) according to any one of claims 15 to 27, configured to: receive a control signal (520) indicating at least one of: that the transport block (TB) comprises the first stream of bits (SB1) and the second stream of bits (SB2), a length ^^^^of a first bit segment (BS1), and an offset value ^^^^defining an offset of first bit segment (BS1) in a third bit segment (BS3).

29. A method (200) for a transmitter device (100), the method (200) comprising: encoding (202) a first stream of bits (SB1) into a first codeword (^^);segmenting (204) the first codeword (^^) into a set of first bit segments (SBS1) comprising ^^^number of first bitsegments (BS1), where ^^^ is a positive integer;segmenting (206) a second stream of bits (SB2) into a set of second bit segments (SBS2) comprising ^^^number of second bit segments (BS2), where ^^^is a positive integer; mapping (208) the set of first bit segments (SBS1) and the set of second bit segments (SBS2) into a set of third bit segments (SBS3) comprising ^^^number of third bit segments (BS3), where ^^^is a positive integer; encoding (210) each third bit segment (BS3) into a second codeword (^^^) to form a transport block (TB) comprising ^^^number of second codewords (^^^ , ^^^,…, ^^^^^); modulating (212) the transport block (TB) into a communication signal (510); and transmitting (214) the communication signal (510).

30. A method (400) for a receiver device (300), the method (400) comprising: receiving (402) a communication signal (510) comprising a modulated transport block (TB), the modulated transport block (TB) comprising ^^^number of second codewords (^^^ , ^^,…, ^^^^^), where ^^^is a positive integer; decoding (404) each second codeword (^^^) into a set of decoded third bit segments (SBS3) comprising ^^^number of third bit segments (BS3); de-mapping (406) the set of decoded third bit segments (SBS3) into a set of decoded first bit segments (SBS1)comprising ^^^ number of first bit segments (BS1) and a set of decoded second bit segments (SBS2) comprising ^^^ numberof second bit segments (BS2), where ^^^ and ^^^ are positive integers;concatenating (408) the set of decoded first bit segments (SBS1) into a first codeword (^^) and decode the firstcodeword (^^) into a first stream of bits (SB1); andconcatenating (410) the set of decoded second bit segments (SBS2) into a second stream of bits (SB2).

31. A computer program with a program code for performing a method according to claim 29 or 30 when the computer programruns on a computer.

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