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101results about "Unequal/adaptive error protection" patented technology

Priority-based channel coding for control information

Systems, methods, and instrumentalities are disclosed for priority-based channel coding for control information. A wireless transmit / receive unit (WTRU) may sort control information associated with a first control information type into a first control information group and the control information associated with a second control information type into a second control information group, for example, based on respective priorities associated with the first and second control information types. The WTRU may group one or more bits of the first control information group into a first bit level control information group and a second bit level control information group based on priority. The WTRU may selectively apply a cyclic redundancy check (CRC) to the first control information group, the second control information group, the first bit level control information group, and / or the second bit level control information group.
Owner:INTERDIGITAL PATENT HOLDINGS INC

Hierarchical LDPC decoding method based on syndrome feedback self-adaption

The invention discloses a layered LDPC (Low Density Parity Check Code) decoding method based on syndrome feedback self-adaption, and aims to solve the problem of poor decoding performance caused by fixed correction factors and poor adaptability to different check matrixes and channel conditions in the existing LDPC decoding algorithm. The method comprises the following steps of: firstly, dividing rows of a check matrix into a plurality of independent layers by adopting a hierarchical scheduling architecture so as to accelerate propagation and convergence of decoding information; secondly, in each iteration process of hierarchical decoding, a self-adaptive mechanism based on syndrome feedback is used, and a core offset factor beta in an offset minimum sum algorithm is adjusted in real time; the mechanism intelligently increases or decreases the offset factor by diagnosing the current decoding state (i.e., the number of unsatisfied check equations) to help the decoding process jump out of local optimum and stably converge. A simulation result shows that compared with a traditional offset minimum sum algorithm, the decoding performance is effectively improved and the bit error rate is reduced on the premise that the complexity is not obviously increased, and particularly, the performance gain is obvious in a medium-high signal-to-noise ratio region, and the robustness is higher.
Owner:GUILIN UNIV OF ELECTRONIC TECH

Methods of joint source and channel coding for effective and semantic communication

Systems, methods, apparatuses, and computer program products for semantic communication involving joint source and channel coding (JSCC) over current communication networks. One method may include receiving, by a first network entity, from a second network entity, a multi-level bit error rate (BER) interface configuration comprising at least one BER based upon the request for a communication session; generating, by the first network entity, an application source encoder and decoder configured to encode and decode, respectively, a plurality of levels corresponding to the at least one BER; and training, by the first network entity, the application source encoder and decoder according to the BER.
Owner:NOKIA SOLUTIONS & NETWORKS OY

Techniques for applying systematic polar codes for joint source and channel coding (JSCC)

PendingUS20250343627A1Other decoding techniquesUnequal/adaptive error protectionTelecommunicationsJoint source and channel coding
Methods, systems, and devices for wireless communications are described. In some cases, a first wireless device may communicate, with a second wireless device, a control signal indicating a systematic polar code configuration, the systematic polar code configuration indicating for the first wireless device to perform systematic polar encoding on a first set of bits associated with a non-uniform bit distribution. As such, the first wireless device may apply a systematic polar code to the first set of bits to generate a systematic polar codeword based on the systematic polar code configuration. In such cases, the systematic polar codeword may include a set of parity bits and a set of systematic bits. Thus, the first wireless device may transmit at least the set of parity bits of the systematic polar code.
Owner:QUALCOMM INC

Method for carrying out a semantic communication and associated semantic communication system

The present invention concerns a method for carrying out a semantic communication within a semantic communication system (10) defining a semantic communication channel, the semantic communication system (10) comprising a sender (12) and a receiver (14) connected through a wireless channel (16), the method comprising the following phases: - semantic communication setting comprising determining multiple semantic functions to be embedded into a waveform; - semantic adaption of the waveform to embed the multiple semantic functions; - semantic transmission of the adapted waveform in a form of an electromagnetic signal.
Owner:COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES +3

Virtualized radio access point, vrap, and method of operating the same

The present invention relates to a virtualized radio access point, vRAP, as well as to a method of operating the same. With regard to enabling high-performing DU virtualization in order to maximize performance in cloud-based virtualized RANs, the vRAP comprises an encoder / decoder configured to encode / decode transport blocks, TBs, by using iterative codes such as turbo codes or LDPC codes that exchange extrinsic information in each decoding iteration; and a digital signal processor, DSP, pipeline configured to infer information about the decodability of the data of the TBs by exploiting the exchanged extrinsic information.
Owner:NEC CORP

Adaptive generalized concatenated codes for low power ECC with varying overhead

Methods, devices, and systems for controlling a storage system, including: a storage device configured to store a plurality of code words; and at least one processor configured to: obtain information bits; encode the information bits using a first code to obtain a first plurality of code words; encode the first plurality of code words using a second code to generate a second plurality of code words; update the first plurality of code words based on the second plurality of code words to generate an adaptive generalized concatenated code (A-GCC) code word; and store the A-GCC code word in the storage device, wherein each code word of the first plurality of code words is encoded using a different error protection level.
Owner:SAMSUNG ELECTRONICS CO LTD

Memory controller, memory system, and memory control method

According to one embodiment, a nonvolatile memory includes a plurality of memory areas and controller circuit including an error correction code encoder. The error correction code encoder encodes a first data to generate a first parity in a first operation and encodes a second data to generate a second parity in a second operation. The controller circuit writes the first data and the first parity into a first memory area among the plurality of memory areas and writes the second data and the second parity into a second memory area among the plurality of memory areas. The size of the second data is smaller than the size of the first data and the size of the second parity is equal to the size of the first parity.
Owner:KIOXIA CORP

Semiconductor memory device and method of controlling the same

PendingUS20250365021A1Data representation error detection/correctionUnequal/adaptive error protectionParallel computingComputer engineering
A semiconductor memory device includes a plurality of detecting code generators configured to generate a plurality of detecting codes to detect errors in a plurality of data items, respectively, a plurality of first correcting code generators configured to generate a plurality of first correcting codes to correct errors in a plurality of first data blocks, respectively, each of the first data blocks containing one of the data items and a corresponding detecting code, a second correcting code generators configured to generate a second correcting code to correct errors in a second data block, the second data block containing the first data blocks, and a semiconductor memory configured to nonvolatilely store the second data block, the first correcting codes, and the second correcting code.
Owner:KIOXIA CORP

Decoder correction from object-based context

Disclosed in some examples are methods, systems, and machine-readable media for utilizing contextual information to create decoding feedback information to improve decoder accuracy and / or performance. In some examples, the context information is from a layer of the network stack above a layer in which the decoder is located. The context information may be or based on information about previously received and decoded data and / or information about the sender to provide decoding feedback information to the decoder that is both used to correct previous decoding errors, as well as to inform the decoder about which of the plurality of decoding selections is more likely to be correct. This may improve decoding performance by reducing errors, and in some examples, reduce the complexity of selection and thus improve decoder efficiency by excluding certain decoding possibilities.
Owner:MICROSOFT TECHNOLOGY LICENSING LLC

Crc-polar coding with CRC length adapted to data priority

Methods, systems, and devices for wireless communications are described. Cyclic redundancy check (CRC) bits may be appended to a set of information bits on a per-group basis prior to encoding using an error correcting code. The amount of CRC bits appended to each group of information bits may be based on the priority of the group of information bits. For example, the priority may be based on the type of information conveyed by the group of information bits. For example, for a video stream, information bits conveying low frequency information may have a higher priority than information bits conveying high frequency information, as the low frequency bits may be more important to user perception / experience of the video. The transmitting device and the receiving device may negotiate the CRC configuration (e.g., the CRC bits pergroupand the locations of the groups) so that the receiving device can verify the information bits.
Owner:QUALCOMM INC

Polar code encoding method and apparatus

This application provides a polar code encoding method and an apparatus, to reduce implementation complexity of encoding while ensuring encoding performance. The method includes: determining a threshold based on a length N of a first reliability sequence and a length M of an encoded bit sequence, where N is a positive integer power of 2, and M is a positive integer; determining a first sub-sequence and a second sub-sequence based on a rate matching method of the encoded bit sequence and the first reliability sequence; determining, based on the threshold, the first sub-sequence, the second sub-sequence, the rate matching method of the encoded bit sequence, and the first reliability sequence, K information bits corresponding to the encoded bit sequence, where K is a positive integer less than M; and performing polar encoding to obtain the encoded bit sequence.
Owner:HUAWEI TECH CO LTD

Wireless transmission and reception of packetized audio data in combination with forward error correction

To provide methods for transmitting and receiving an audio stream.SOLUTION: For transmission, a method involves obtaining a frame of an audio signal, and determining a number of source blocks to divide the frame of the audio signal into and a number of parity blocks to generate for forward error correction. The number of source blocks and the number of parity blocks are determined based on characteristics of a wireless communication protocol to be used. The wireless communication protocol may be BLUETOOTH. The parity blocks are usable by a decoder to reconstruct one or more corrupted or missing source blocks and may be obtained by means of Reed-Solomon encoding.SELECTED DRAWING: Figure 1
Owner:DOLBY INTERNATIONAL AB

Memory controller, memory system, and memory control method

According to one embodiment, a nonvolatile memory includes a plurality of memory areas and controller circuit including an error correction code encoder. The error correction code encoder encodes a first data to generate a first parity in a first operation and encodes a second data to generate a second parity in a second operation. The controller circuit writes the first data and the first parity into a first memory area among the plurality of memory areas and writes the second data and the second parity into a second memory area among the plurality of memory areas. The size of the second data is smaller than the size of the first data and the size of the second parity is equal to the size of the first parity.
Owner:KIOXIA CORP

Wireless transmission and reception of packetized audio data in combination with forward error correction

Methods for transmitting and receiving an audio stream are provided. For transmission, the method involves obtaining a frame of an audio signal, determining a number of source blocks to divide the frame of the audio signal into and a number of parity blocks to generate for forward error correction, wherein the number of source blocks and the number of parity blocks are determined based on characteristics of a wireless communication protocol to be used. The wireless communication protocol may be BLUETOOTH. The parity blocks are usable by a decoder to reconstruct one or more corrupted or missing source blocks and may be obtained by means of Reed-Solomon encoding.
Owner:DOLBY INTERNATIONAL AB

Encoding method and apparatus for ethernet

This application discloses an Ethernet coding method and apparatus, to adapt to a scenario in which a higher transmission bit error rate is caused by a high bandwidth. The method includes: A transmit end encodes first to-be-encoded information by using a first forward error correction FEC codeword, to obtain first encoded data, where the first forward error correction FEC codeword is a Reed-Solomon forward error correction RS-FEC code; and the transmit end encodes the first encoded data by using a second FEC codeword, to obtain second encoded data, where a code length N and an information bit length K of the second FEC codeword satisfy the following formula: M1 ∗ NK≤M2 (I), where M1 is a throughput of the first encoded data, and M2 is a throughput of the second encoded data.
Owner:HUAWEI TECH CO LTD

Polar encoding with different probabilities for bits

Methods, systems, and devices for wireless communication are described. A receiving wireless communication device may receive a polar encoded signal including a first information bit and a second information bit associated with respective non-uniform probabilities of the information bits having respective values. To decode the information bits, the device may input the first information bit into a first function and the second information bit into a second function, where each function may involve the respective non-uniform probability. In some examples, a transmitting wireless communication device may encode the information bits using subchannels with a lower reliability than subchannels used to encode bits associated with uniform probability. Additionally, or alternatively, the transmitting wireless communication device may encode bits of an information packet using subchannels with different indexes or reliabilities.
Owner:QUALCOMM INC +4

Method for link transition in universal serial bus and system thereof

A method for link transition in a USB device includes transmitting a plurality of first RS-FEC blocks by a first transmitter (S502), receiving an UNBOND set by a receiver (S504), waking up a second transmitter by a LASM when the receiver receives the UNBOND set (S506), transmitting a training sequence by the second transmitter (S508), transmitting a specific pattern sequence by the second transmitter after finishing transmitting the training sequence (S510), determining whether a current RS-FEC block to be transmitted by the first transmitter is a DESKEW block (S512), stopping transmitting the specific pattern sequence if the current RS-FEC block is determined to be the DESKEW block (S514), and transmitting a plurality of second RS-FEC blocks by the first transmitter and the second transmitter (S516).
Owner:MEDIATEK INC

Transmitting device for performing an encoding process on an information bit sequence using a coding scheme selected from a coding scheme set

One coding method of a plurality of coding methods including at least a first coding method and a second coding method is selected, an information sequence is encoded by using the selected coding method, and an encoded sequence obtained by performing predetermined processing on the information sequence is modulated and transmitted. The first coding method is a coding method having a first coding rate, for generating a first encoded sequence by performing puncturing processing on a generated first codeword by using a first parity check matrix. The second coding method is a coding method having a second coding rate, for generating a second encoded sequence by performing puncturing processing on a generated second codeword by using a second parity check matrix that is different from the first parity check matrix, the second coding rate after the puncturing process being different from the first coding rate.
Owner:PANASONIC INTELLECTUAL PROPERTY CORP OF AMERICA

Semiconductor memory device and method of controlling the same

ActiveUS12413251B2Data representation error detection/correctionUnequal/adaptive error protectionParallel computingSemiconductor
A semiconductor memory device includes a plurality of detecting code generators configured to generate a plurality of detecting codes to detect errors in a plurality of data items, respectively, a plurality of first correcting code generators configured to generate a plurality of first correcting codes to correct errors in a plurality of first data blocks, respectively, each of the first data blocks containing one of the data items and a corresponding detecting code, a second correcting code generators configured to generate a second correcting code to correct errors in a second data block, the second data block containing the first data blocks, and a semiconductor memory configured to nonvolatilely store the second data block, the first correcting codes, and the second correcting code.
Owner:KIOXIA CORP

Polar Code Encoding Method and Apparatus

This application provides a polar code encoding method and an apparatus. The method includes: determining a threshold based on a length N of a first reliability sequence and a length M of an encoded bit sequence, where N is a positive integer power of 2, and M is a positive integer; determining a first sub-sequence and a second sub-sequence based on a rate matching method of the encoded bit sequence and the first reliability sequence; determining, based on the threshold, the first sub-sequence, the second sub-sequence, the rate matching method of the encoded bit sequence, and the first reliability sequence, K information bits corresponding to the encoded bit sequence, where K is a positive integer less than M; and performing polar encoding to obtain the encoded bit sequence.
Owner:HUAWEI TECH CO LTD

Lookahead priority collection to support priority elevation

A queuing requester for access to a memory system is provided. Transaction requests are received from two or more requestors for access to the memory system. Each transaction request includes an associated priority value. A request queue of the received transaction requests is formed in the queuing requester. Each transaction request includes an associated priority value. A highest priority value of all pending transaction requests within the request queue is determined. An elevated priority value is selected when the highest priority value is higher than the priority value of an oldest transaction request in the request queue; otherwise the priority value of the oldest transaction request is selected. The oldest transaction request in the request queue with the selected priority value is then provided to the memory system. An arbitration contest with other requesters for access to the memory system is performed using the selected priority value.
Owner:TEXAS INSTRUMENTS INC

Method for transmitting a message from a transmitting unit to a receiving unit

Method (100) for transmitting a message from a transmitting unit (10) to a receiving unit (20) via a communication channel, the method (100) comprising the following steps: - determining (110) a basis matrix representing a protograph; - determining (120) an LDPC code using the previously determined basis matrix and the MacKay-Neal code generation method; - coding (130) the message to be transmitted using the previously determined LDPC code; and - transmission (140) of the coded message from the transmitting unit (10) to the receiving unit (20); - wherein determining (110) the base matrix comprises: - defining (112) a value range for a target code rate, the value range being defined by a lower range value R1 and an upper range value R2; - Determine (114) of n BKBasis matrix candidates, where n BK ≥ 2; - Calculate (116) the quality for each of the n BK Basis matrix candidates for at least two code rates each within the previously defined value range; - Selecting (118) the basis matrix candidate with the highest quality from the n BK Base matrix candidates; and - Set the base matrix to the following value: B 1 / 2 = [ 3 3 0 1 1 0 0 1 | 3 0 0 0 2 1 0 0 3 0 1 0 2 0 0 1 ] .
Owner:DEUTSCHES ZENTRUM FÜR LUFT UND RAUMFAHRT E V

Method and system for channel state information feedback using sub-codebook based trellis coded quantization

Aspects of the disclosure provide for methods and systems for Sub-codebook based Trellis Coded Quantization for CSI Feedback. An aspect of the disclosure provides method executed by a receiver. The method includes receiving a signal from a transmitter, via a communication channel between the receiver and the transmitter. The method further includes estimating parameters associated with the channel based on the received signal. The method further includes obtaining phase information from the estimated parameters. The method further includes applying a trellis coded quantization (TCQ) scheme to the obtained phase information by mapping each sub-codebook index of a set of sub-codebook indices to output bits of each trellis branch making the distance between sub-codebooks maximally equal. The method further includes transmitting a channel state information (CSI) measurement feedback to the transmitter, the CSI measurement feedback based on the TCQ scheme and comprising one or more of: a beginning state, input bits to the TCQ scheme, and a sub-codebook index.
Owner:HUAWEI TECH CO LTD

Multi-modal error correction coding and decoding

Invention relate to multi-modal error correction coding and decoding in communication systems. A transmitter device (100) applies concatenated coding wherein an input word to an inner encoder is obtained by combining an outer precoder codeword and uncoded information bits. Thus, a first stream of bits (SB1) is encoded into a first codeword (C1). A set of first bit segments (SBS1) and a set of second bit segments (SBS2) are mapped into a set of third bit segments (SBS3) comprising Ncw number of third bit segments (BS3). The set of first bit segments (SBS1) comprise segments of the first codeword (C1) while the set of second bit segments (SBS2) comprises segments a second stream of bits (SB2). Each third bit segment (BS3) is encoded into a second codeword (C2n) to form a transport block (TB) comprising N cw number of second codewords (C2 1, C2 2,...C2NCW). The transport block (TB) is modulated and transmitted.
Owner:HUAWEI TECH CO LTD +1

Adapting forward error correction (FEC) or link parameters for improved post-FEC performance

Technologies for optimizing post-FEC bit error rate performance of a Forward Error Correction (FEC) system are described. A controller is coupled to an FEC circuit and a receiver circuit. The controller receives FEC symbol error data from at least the receiver circuit or the FEC circuit and determines, using the FEC symbol error data, a post-FEC correlated performance metric indicative of an estimated post-FEC BER of the FEC circuit. The controller adjusts, based on the post-FEC correlated performance metric, at least one of a FEC parameter of the FEC circuit or a link parameter of the receiver circuit to decrease the estimated post-FEC BER. This improves the post-FEC BER performance of the FEC circuit.
Owner:NVIDIA CORP