147results about "Unequal/adaptive error protection" patented technology

Apparatuses, systems, and methods for scalable 1-pass error correction code operations. A memory device includes an error correction code (ECC) circuit which generates a number of parity bits based on a plurality of data bits during a write operation. The number of parity bits may be selected based on a setting in a mode register. The data and parity are written to the memory array as part of a single access pass. The data may be written to a selected portion of the data column planes, while the parity is written to one or more column planes of the extra column plane or a non-selected portion of the data column planes.

Apparatuses, systems, and methods for scalable 1-pass error correction code operations. A memory device includes an error correction code (ECC) circuit which generates a number of parity bits based on a plurality of data bits during a write operation. The number of parity bits may be selected based on a setting in a mode register. The data and parity are written to the memory array as part of a single access pass. The data may be written to a selected portion of the data column planes, while the parity is written to one or more column planes of the extra column plane or a non-selected portion of the data column planes.

Systems, methods, and instrumentalities are disclosed for priority-based channel coding for control information. A wireless transmit / receive unit (WTRU) may sort control information associated with a first control information type into a first control information group and the control information associated with a second control information type into a second control information group, for example, based on respective priorities associated with the first and second control information types. The WTRU may group one or more bits of the first control information group into a first bit level control information group and a second bit level control information group based on priority. The WTRU may selectively apply a cyclic redundancy check (CRC) to the first control information group, the second control information group, the first bit level control information group, and / or the second bit level control information group.

The invention discloses a layered LDPC (Low Density Parity Check Code) decoding method based on syndrome feedback self-adaption, and aims to solve the problem of poor decoding performance caused by fixed correction factors and poor adaptability to different check matrixes and channel conditions in the existing LDPC decoding algorithm. The method comprises the following steps of: firstly, dividing rows of a check matrix into a plurality of independent layers by adopting a hierarchical scheduling architecture so as to accelerate propagation and convergence of decoding information; secondly, in each iteration process of hierarchical decoding, a self-adaptive mechanism based on syndrome feedback is used, and a core offset factor beta in an offset minimum sum algorithm is adjusted in real time; the mechanism intelligently increases or decreases the offset factor by diagnosing the current decoding state (i.e., the number of unsatisfied check equations) to help the decoding process jump out of local optimum and stably converge. A simulation result shows that compared with a traditional offset minimum sum algorithm, the decoding performance is effectively improved and the bit error rate is reduced on the premise that the complexity is not obviously increased, and particularly, the performance gain is obvious in a medium-high signal-to-noise ratio region, and the robustness is higher.

Systems, methods, apparatuses, and computer program products for semantic communication involving joint source and channel coding (JSCC) over current communication networks. One method may include receiving, by a first network entity, from a second network entity, a multi-level bit error rate (BER) interface configuration comprising at least one BER based upon the request for a communication session; generating, by the first network entity, an application source encoder and decoder configured to encode and decode, respectively, a plurality of levels corresponding to the at least one BER; and training, by the first network entity, the application source encoder and decoder according to the BER.

Methods, systems, and devices for wireless communications are described. In some cases, a first wireless device may communicate, with a second wireless device, a control signal indicating a systematic polar code configuration, the systematic polar code configuration indicating for the first wireless device to perform systematic polar encoding on a first set of bits associated with a non-uniform bit distribution. As such, the first wireless device may apply a systematic polar code to the first set of bits to generate a systematic polar codeword based on the systematic polar code configuration. In such cases, the systematic polar codeword may include a set of parity bits and a set of systematic bits. Thus, the first wireless device may transmit at least the set of parity bits of the systematic polar code.

Methods, systems, and devices for wireless communications are described. In polar coding, some bits channels have a higher reliability and other bit channels have a lower reliability. Data may be transmitted on some of the bit channels, and frozen values known to both the receiver and transmitter may be transmitted on the remaining bit channels. The performance of different polar code schemes (e.g., which bit channels are frozen) may depend on the decoder the receiving device uses. A receiving device (e.g., a user equipment for downlink transmissions) may indicate a decoder or polar decoding capability to the transmitting device (e.g., the network entity for downlink transmissions), and the transmitting device may select and indicate to the receiving device a polar coding scheme based on the indicated decoder or decoding capability. The transmitting device may transmit a communication to the receiving device encoded in accordance with the indicated polar coding scheme.

The invention discloses a flexible code rate compatible coding method based on a low-code-rate generalized LDPC (Low Density Parity Check) code, and belongs to the field of digital signal processing. The implementation method comprises the following steps: an original signal enters an information processing unit to output an original bit sequence, and the original bit sequence is sent to an LDPC coding unit; and the original information bits generate LDPC code words containing the original information bits and the check bits. The check bits and the information bits are subjected to a Hadamard encoding operation. And randomly deleting the coded 1-degree Hadamard variable nodes according to a preset code rate and channel conditions so as to realize flexible adjustment of the code rate. And performing parallel-to-serial operation on the punched low-bit-rate generalized LDPC code word to form a final coding bit sequence, namely realizing flexible code rate compatible coding of the low-bit-rate generalized LDPC code. According to the invention, flexible code rate compatibility can be realized, the degree of adaptation between the encoder and different channel environments is increased, the transmission efficiency and the channel adaptability are significantly improved, and the communication reliability under variable channel conditions is ensured.

Technologies for optimizing post-FEC bit error rate performance of a Forward Error Correction (FEC) system are described. A controller is coupled to an FEC circuit and a receiver circuit. The controller receives FEC symbol error data from the FEC circuit and determines, using the FEC symbol error data, a post-FEC correlated performance metric indicative of an estimated post-FEC BER of the FEC circuit. The controller adjusts, based on the post-FEC correlated performance metric, at least one of a FEC parameter of the FEC circuit or a link parameter of the receiver circuit to decrease the estimated post-FEC BER. This improves the post-FEC BER performance of the FEC circuit.

A method for adjustable error correction in a storage cluster is provided. The method includes determining health of a non-volatile memory of a non-volatile solid-state storage unit of each of a plurality of storage nodes in a storage cluster on a basis of per flash package, per flash die, per flash plane, per flash block, or per flash page. The determining is performed by the storage cluster. The plurality of storage nodes is housed within a chassis that couples the storage nodes as the storage cluster. The method includes adjusting erasure coding across the plurality of storage nodes based on the health of the non-volatile memory and distributing user data throughout the plurality of storage nodes through the erasure coding. The user data is accessible via the erasure coding from a remainder of the plurality of storage nodes if any of the plurality of storage nodes are unreachable.

The present invention concerns a method for carrying out a semantic communication within a semantic communication system (10) defining a semantic communication channel, the semantic communication system (10) comprising a sender (12) and a receiver (14) connected through a wireless channel (16), the method comprising the following phases: - semantic communication setting comprising determining multiple semantic functions to be embedded into a waveform; - semantic adaption of the waveform to embed the multiple semantic functions; - semantic transmission of the adapted waveform in a form of an electromagnetic signal.

The present invention relates to a virtualized radio access point, vRAP, as well as to a method of operating the same. With regard to enabling high-performing DU virtualization in order to maximize performance in cloud-based virtualized RANs, the vRAP comprises an encoder / decoder configured to encode / decode transport blocks, TBs, by using iterative codes such as turbo codes or LDPC codes that exchange extrinsic information in each decoding iteration; and a digital signal processor, DSP, pipeline configured to infer information about the decodability of the data of the TBs by exploiting the exchanged extrinsic information.

Methods, devices, and systems for controlling a storage system, including: a storage device configured to store a plurality of code words; and at least one processor configured to: obtain information bits; encode the information bits using a first code to obtain a first plurality of code words; encode the first plurality of code words using a second code to generate a second plurality of code words; update the first plurality of code words based on the second plurality of code words to generate an adaptive generalized concatenated code (A-GCC) code word; and store the A-GCC code word in the storage device, wherein each code word of the first plurality of code words is encoded using a different error protection level.

According to one embodiment, a nonvolatile memory includes a plurality of memory areas and controller circuit including an error correction code encoder. The error correction code encoder encodes a first data to generate a first parity in a first operation and encodes a second data to generate a second parity in a second operation. The controller circuit writes the first data and the first parity into a first memory area among the plurality of memory areas and writes the second data and the second parity into a second memory area among the plurality of memory areas. The size of the second data is smaller than the size of the first data and the size of the second parity is equal to the size of the first parity.

A semiconductor memory device includes a plurality of detecting code generators configured to generate a plurality of detecting codes to detect errors in a plurality of data items, respectively, a plurality of first correcting code generators configured to generate a plurality of first correcting codes to correct errors in a plurality of first data blocks, respectively, each of the first data blocks containing one of the data items and a corresponding detecting code, a second correcting code generators configured to generate a second correcting code to correct errors in a second data block, the second data block containing the first data blocks, and a semiconductor memory configured to nonvolatilely store the second data block, the first correcting codes, and the second correcting code.

A method and a device for wireless communication are described. The method comprising segmenting a payload (305) into a plurality of code blocks, generating, for each code block, a cyclic redundancy check, CRC, associating the CRC generated for each code block with each respective code block, performing low density parity check code, LDPCC, encoding of each code block and associated CRC to generate one or more codewords of a plurality of codewords and transmitting the codewords generated by performing the LDPCC encoding.

Disclosed in some examples are methods, systems, and machine-readable media for utilizing contextual information to create decoding feedback information to improve decoder accuracy and / or performance. In some examples, the context information is from a layer of the network stack above a layer in which the decoder is located. The context information may be or based on information about previously received and decoded data and / or information about the sender to provide decoding feedback information to the decoder that is both used to correct previous decoding errors, as well as to inform the decoder about which of the plurality of decoding selections is more likely to be correct. This may improve decoding performance by reducing errors, and in some examples, reduce the complexity of selection and thus improve decoder efficiency by excluding certain decoding possibilities.

After data to be written to a storage device, such as a solid state drive (SSD), is received from a host system, the received data is encoded using a first error correction code to generate first parity data. A temperature at which memory cells of the storage device will store the received data is determined. In response, a first portion of the received data is identified (e.g., data in memory storage that is error-prone at a predicted higher temperature that has been determined based on output from an artificial neural network using sensor(s) input). The first portion is encoded using a second error correction code to generate second parity data. The second error correction code has a higher error correction capability than the first error correction code. The encoded first portion, the first parity data, and the second parity data are stored in the memory cells.

Methods, systems, and devices for wireless communications are described. Cyclic redundancy check (CRC) bits may be appended to a set of information bits on a per-group basis prior to encoding using an error correcting code. The amount of CRC bits appended to each group of information bits may be based on the priority of the group of information bits. For example, the priority may be based on the type of information conveyed by the group of information bits. For example, for a video stream, information bits conveying low frequency information may have a higher priority than information bits conveying high frequency information, as the low frequency bits may be more important to user perception / experience of the video. The transmitting device and the receiving device may negotiate the CRC configuration (e.g., the CRC bits pergroupand the locations of the groups) so that the receiving device can verify the information bits.

This application provides a polar code encoding method and an apparatus, to reduce implementation complexity of encoding while ensuring encoding performance. The method includes: determining a threshold based on a length N of a first reliability sequence and a length M of an encoded bit sequence, where N is a positive integer power of 2, and M is a positive integer; determining a first sub-sequence and a second sub-sequence based on a rate matching method of the encoded bit sequence and the first reliability sequence; determining, based on the threshold, the first sub-sequence, the second sub-sequence, the rate matching method of the encoded bit sequence, and the first reliability sequence, K information bits corresponding to the encoded bit sequence, where K is a positive integer less than M; and performing polar encoding to obtain the encoded bit sequence.

A memory controller may receive memory data to be stored on a memory. A memory controller may receive metadata related to the memory data. The metadata may be selected from a predetermined list of metadata. A memory controller may identify an encoding polynomial of a plurality of polynomials that is associated with the metadata, each polynomial of the plurality of polynomials associated with different metadata from the predetermined list of metadata. A memory controller may generate a codeword using the encoding polynomial of the plurality of polynomials and the memory data.

To provide methods for transmitting and receiving an audio stream.SOLUTION: For transmission, a method involves obtaining a frame of an audio signal, and determining a number of source blocks to divide the frame of the audio signal into and a number of parity blocks to generate for forward error correction. The number of source blocks and the number of parity blocks are determined based on characteristics of a wireless communication protocol to be used. The wireless communication protocol may be BLUETOOTH. The parity blocks are usable by a decoder to reconstruct one or more corrupted or missing source blocks and may be obtained by means of Reed-Solomon encoding.SELECTED DRAWING: Figure 1

According to one embodiment, a nonvolatile memory includes a plurality of memory areas and controller circuit including an error correction code encoder. The error correction code encoder encodes a first data to generate a first parity in a first operation and encodes a second data to generate a second parity in a second operation. The controller circuit writes the first data and the first parity into a first memory area among the plurality of memory areas and writes the second data and the second parity into a second memory area among the plurality of memory areas. The size of the second data is smaller than the size of the first data and the size of the second parity is equal to the size of the first parity.

The invention relates to a method (100) for transmitting a message from a transmitting unit (10) to a receiving unit (20) via a communication channel, wherein the method (100) comprises the following steps - Determine (110) a basic matrix that represents a protograph; - Determining (120) an LDPC code using the previously determined base matrix and the MacKay-Neal code generation procedure; - Encoding (130) the message to be transmitted using the previously determined LDPC code; and - Transmission (140) of the coded message from the transmitting unit (10) to the receiving unit (20); - where determining (110) the basis matrix comprises the following steps: - Specifying (112) a range of values ​​for a desired code rate, wherein the range of values ​​is defined by a lower range value R1 and an upper range value R2; - Determining (114) of n BK Basic matrix candidates, where n BK ≥ 2 is; - Calculating (116) the quality for each of the n BK Basic matrix candidates and for at least two code rates within the previously defined range of values; and - Selecting (118) the best-fitting basic matrix candidate from the n BK Basic matrix candidates.

Methods for transmitting and receiving an audio stream are provided. For transmission, the method involves obtaining a frame of an audio signal, determining a number of source blocks to divide the frame of the audio signal into and a number of parity blocks to generate for forward error correction, wherein the number of source blocks and the number of parity blocks are determined based on characteristics of a wireless communication protocol to be used. The wireless communication protocol may be BLUETOOTH. The parity blocks are usable by a decoder to reconstruct one or more corrupted or missing source blocks and may be obtained by means of Reed-Solomon encoding.