Patents
Literature
Patsnap Eureka AI that helps you search prior art, draft patents, and assess FTO risks, powered by patent and scientific literature data.

52 results about "Error mitigation" patented technology

Learning noise models to perform quantum error mitigation on unstructured quantum circuits

A method, system, and computer program product for learning noise models to perform quantum error mitigation. Each target layer of a quantum circuit is divided into a set of sub-layers. Each of the sub-layers for each target layer of the quantum circuit is grouped into a reduced set of learning layers, which enables each sub-layer's noise model to be learned from fewer layers (learning layers). A learning layer refers to a layer that is used in combination with other learning layers to form the minimally complete layer set for learning all the layer components used in the quantum circuit. The noise models for each of the sub-layers are then learned on the reduced set of learning layers. Such learned noise models are combined to form a complete set of noise models for the target layers of the quantum circuit and used to perform quantum error mitigation on the quantum circuit.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION

Dynamic error resolution for hybrid quantum-classical computing environments using a hierarchical data structure

Systems and methods for dynamic error resolution in hybrid quantum-classical computing environments are disclosed. A system can obtain telemetry data corresponding to a processing job. The system can determine that an error resolution technique is to be applied to the quantum portion of the processing job. The system can select, for a quantum portion of the processing job, the error resolution technique from a plurality of error correction techniques and a plurality of error mitigation techniques. The system can update a hierarchical data structure representing the processing job as at least a set of nodes. The hierarchical data structure can be updated to include the error resolution technique in association with a respective node of the hierarchical data structure representing the quantum portion of the processing job.
Owner:QPIAI INDIA PTE LTD

Intelligent and automated system for solving computational problems using quantum computation

PendingUS20250378358A1Quantum computersMachine learningQuantum circuitComputational problem
One or more systems, devices, computer program products and / or computer-implemented methods of use provided herein relate to an intelligent and automated system to solve quantum computing related problems. The computer-implemented system can comprise a memory that can store computer-executable components. The computer-implemented system can further comprise a processor that can execute the computer-executable components stored in the memory, wherein the computer-executable components can comprise a recommendation component that can employ a machine learning model to generate, based on an input, a recommendation comprising a combination of entities comprising, one or more quantum circuits, one or more algorithms, one or more quantum hardware units, one or more error mitigation or error correction techniques, and one or more quantum procedures, to solve a defined problem comprised in the input.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION

Quantum error mitigation for probability distributions

PCT designated stageWO2026077813A1Quantum computersQuantum circuitError mitigation
One or more systems, devices, computer program products and / or computer-implemented methods for determining error mitigated probability distributions are provided. A system can comprise a memory that can store computer-executable components. The system can further comprise a processor that executes at least one of the computer executable components that can execute a plurality of shots of a quantum circuit to obtain noise probabilities of observables; obtain a probability distribution of the noise probabilities; determine, using the probability distribution, expectation values of the observables; perform error mitigation on the expectation values to obtain an error mitigated probability distribution; and transform the error mitigated expectation values into an error mitigated probability distribution.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION +1

Quantum error mitigation method, fitting parameter determination method and related device

The embodiment of the invention discloses a quantum error mitigation method, a fitting parameter determination method and a related device, and relates to the technical field of quantum computing. A conjugate circuit corresponding to an original quantum circuit is determined, and the overlap ratio of the conjugate circuit and the original quantum circuit is greater than or equal to 1 / 2; the conjugate circuit is easier to simulate on a classic computer, so that the simulation result of conjugation on the classic computer can be efficiently determined, and the fitting parameters of the conjugate circuit can be determined based on the simulation result of the conjugate circuit on the classic computer and the operation result of the conjugate circuit on the quantum chip. As the overlap ratio of the conjugate circuit and the original quantum circuit is high, the fitting parameter can also be used for correcting the operation result of the original quantum circuit.
Owner:ORIGIN QUANTUM COMPUTING TECH (HEFEI) CO LTD

Readout-error mitigation for quantum expectation

ActiveUS12499379B2Quantum computersScalar ValueComputational physics
Techniques for mitigating readout error for quantum expectation are presented. Calibration component applies first random Pauli gates to qubits at first output of first circuit prior to first readout measurements of the qubits. Estimation component applies second random Pauli gates to qubits at second output of second circuit prior to second readout measurements of the qubits, and generates an error-mitigated readout determination based on first random Pauli gates applied to qubits at first circuit output and second random Pauli gates applied to qubits at second circuit output. Calibration component determines calibration data based on first readout measurements. Estimation component determines estimation data based on second readout measurements. Estimation component determines normalization scalar value based on the calibration data, determines estimation scalar value based on the estimation data, and determines the error-mitigated readout determination associated with a circuit of interest based on the normalization scalar value and estimation scalar value.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION

Automated symmetry verification using algorithm-specific symmetries for error mitigation in quantum computations

PendingUS20260252945A1Quantum circuitEngineering
Aspects of the present disclosure relate generally to systems and methods for use in the implementation and / or operation of quantum information processing (QIP) systems, and more particularly, to the use of performing automated symmetry verification on a quantum circuit. An exemplary method includes obtaining a quantum circuit with a compiled quantum program corresponding to a defined quantum computation; determining types of gates implemented on the quantum circuit; tracking allowed output states of the quantum circuit from an initial state based on the determined type of gates implemented on the quantum circuit; and detecting an error in the quantum circuit by identifying a possible output state that does not correspond to the subset of allowed output states.
Owner:IONQ INC

Accuracy and efficiency of quantum error mitigation / correction techniques are improved by applying a gauge transformation

A method, system, and computer program product for improving accuracy and efficiency of quantum error mitigation / correction techniques. A model (e.g., noise model) of a quantum gate set (collection of quantum gates) that accounts for SPAM and gate errors is built by running learning circuits at different depths with different initial states and measurements to extract information about the quantum system. A gauge transformation is then applied to the quantum gate set to transform both the SPAM and gate errors together. A gauge transformation enables a different perspective of the quantum system while still preserving the underlying physics. A quantum error mitigation / correction technique is then tailored to avoid interpreting errors (e.g., SPAM, gate errors, etc.) inconsistently if treated individually using the transformed SPAM and gate errors thereby requiring fewer additional circuit runs for accurate estimations which significantly reduces the computational overhead associated with quantum error mitigation / correction.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION +1

Automatic error mitigation in database statements using alternate plans

Techniques for automatic error mitigation in database systems using alternate plans are provided. After receiving a database statement, an error is detected as a result of compiling the database statement. In response to detecting the error, one or more alternate plans that were used to process the database statement or another database statement that is similar to the database statement are identified. A particular alternate plan of the one or more alternate plans is selected. A result of the database statement is generated based on processing the particular alternate plan.
Owner:ORACLE INT CORP

Quantum computation support method, and information processing apparatus

To relax a quantum error in a quantum circuit using a non-Clifford gate.SOLUTION: The information processor 10 generates second quantum-bit circuits 3a, 3c,. by replacing the first two quantum-bit gates 4a to 7a in the first quantum-bit circuit 3 with a first equivalent circuit 7 including a second two quantum-bit gate 4b that performs a gate operation of phase-rotation by a first rotation angle. The information processor 10 replaces the first 2-qubit gates 3a to 3c in the first circuit 3 with a second equivalent circuit 8 including a third 2-qubit gate 8a that performs a gate operation of phase rotation of a second rotation angle to generate third circuits 5a, 5b,. The information processor 10 makes the quantum computer 1 execute the second quantum circuits 4a, 4b,. and the third quantum circuits 5a, 5b,., and outputs the average of the executed results as the executed result of the first quantum circuit 3.SELECTED DRAWING: Figure 1
Owner:FUJITSU LTD

Quantum error mitigation method based on clifford learning and related apparatus

PendingCN122334541AQuantum circuitHemt circuits
This application discloses a quantum error mitigation method and related apparatus based on Clifford learning. The method includes acquiring a raw quantum circuit used to calculate the Hamiltonian of the system. The Hamiltonian is expanded using the tensor product of multiple Pauli operators as a basis, with each basis corresponding to a weight. A training set is generated based on the raw quantum circuit, the multiple bases, and the weights corresponding to each base. The training set includes multiple training quantum circuits. Objective functions of the multiple bases are fitted based on the Clifford simulation results and real chip operation results of the training quantum circuits. Noise-free operation results of the raw quantum circuit are determined based on the real chip operation results and the objective functions of each base. By fitting the operation results under different bases separately, this application avoids the situation where the operation results of the training set cluster at 0, thereby reducing the noise in the quantum system to an acceptable order of magnitude.
Owner:ORIGIN QUANTUM COMPUTING TECH (HEFEI) CO LTD

Control system and method for hybrid HPC-QPU orchestration

PCT designated stageWO2026150286A1Performance computingOrchestration (computing)
Disclosed are a computer-implemented method and a computer-implemented system for orchestrating hybrid quantum-classical execution between high-performance computing (HPC) infrastructure and one or more quantum processors (QPU). An orchestration module breaks down a work flow into subtasks and, for each subtask, compiles multiresource HPC and QPU processing telemetrics, normalises same to a canonical vector and evaluates proposed plans under hard budget constraints (time, executions, cost and / or depth). The system automatically selects an execution resource (HPC or QPU) and, when executed in an QPU, applies tiered error mitigation and verifies the result using an acceptance gate. In the event of rejection, the system executes a deterministic recovery policy with retry, execution resource switching and / or backup routing to HPC. An auditable record of decisions and metrics is generated for traceability and feedback.
Owner:CARRANZA VILLALOBOS CARLOS MIGUEL

Load balancing for computer error analysis

PendingUS20260178437A1Non-redundant fault processingComputer errorsError mitigation
In some embodiments, a computer system includes an error manager configured to obtain a first error indication corresponding to a first error associated with a computing device, the first error indication comprising a first error reference code associated with the first error, assign the first error to a first problem analysis window, obtain a second error indication corresponding to a second error associated with the computing device, the second error indication comprising a second error reference code, different from the first error reference code, associated with the second error, assign, based on the second error reference code satisfying an error classification condition, the second error to a second problem analysis window, and perform an error mitigation operation associated with at least one of the first problem analysis window or the second problem analysis window.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION

Quantum computer capable of mitigating stretch factor error

Techniques are provided for quantum computer error mitigation. For example, one or more embodiments described herein can include a system that can include a memory that can store computer executable components. The system can also include a processor that is operatively coupled to the memory and that can execute the computer executable components stored in the memory. The computer executable components can include an error mitigation component that interpolates gate parameters associated with a target stretch factor from within a reference model that includes reference gate parameters for quantum gates calibrated at a plurality of reference stretch factors.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION

Validation and Optimization of Quantum Error Mitigation Workflows

Systems and techniques that facilitate scalable validation and optimization of quantum error mitigation computational workflows are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory that can execute the computer executable components stored in memory. The computer executable components can comprise an input component that receives a quantum error mitigation (QEM) configuration of a quantum circuit and a quantum execution backend; a quantum circuit conversion component that converts the quantum circuit into a classically simulable quantum circuit; a noise component that learns a simplified noise model of the quantum execution backend; and an evaluation component that validates or optimizes the QEM configuration over the classically simulable quantum circuit and the simplified noise model.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION

Quantum error mitigation for probability distributions

One or more systems, devices, computer program products and / or computer-implemented methods for determining error mitigated probability distributions are provided. A system can comprise a memory that can store computer-executable components. The system can further comprise a processor that executes at least one of the computer executable components that can execute a plurality of shots of a quantum circuit to obtain noise probabilities of observables; obtain a probability distribution of the noise probabilities; determine, using the probability distribution, expectation values of the observables; perform error mitigation on the expectation values to obtain an error mitigated probability distribution; and transform the error mitigated expectation values into an error mitigated probability distribution.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION

Quantum error mitigation method and device based on unitary gate design combined with Fouli channel Z mixed expression, and medium

PendingCN121581255AQuantum computersQuantum circuitMatrix expression
The invention provides a quantum error mitigation method based on unitary gate design combined with a Fouli channel Z mixed expression, and the method comprises the steps: carrying out the unitary gate design of a quantum gate in a quantum circuit, and then combining with the Fouli channel Z mixed expression to alleviate the quantum gate and a measurement error. According to the method, the unitary gate design is combined with the Z mixed expression of the Fouli channel, the quantum gate noise and the measurement noise can be relieved at the same time, any quantum gate noise can be equivalently converted into a depolarization channel through the unitary gate design, the limitation of a traditional method on the noise type is avoided, the application range is wider, and the method is easy to implement. The method can be effectively operated under a more generalized noise model; compared with zero-noise extrapolation and other methods, the method does not depend on a large number of noise amplification experiments and complex fitting, and parameter estimation can be completed only through a small amount of auxiliary measurement; the invention provides a more generalized noise channel mitigation scheme for the quantum error mitigation field.
Owner:NANJING UNIV OF POSTS & TELECOMM

Error mitigation methods and related apparatuses

This application discloses an error mitigation method and related apparatus, relating to the field of quantum computing technology. Upon detecting a first quantum computing task, at least one preset error correction method can be displayed for the user to select based on relevant information about the first quantum computing task. The user can then correct the running result of the quantum computing task according to the selected error correction method. This method allows for more flexible correction of quantum computing tasks by displaying at least one preset error correction method based on relevant information, and the user can also choose a suitable error correction method according to the actual scenario. This approach helps to more accurately correct the running result of the quantum computing task.
Owner:ORIGIN QUANTUM COMPUTING TECH (HEFEI) CO LTD

Implementing zero noise extrapolation without folding

One or more systems, devices, computer program products and / or computer-implemented methods of use provided herein relate to implementing zero noise extrapolation without folding. For example, according to an embodiment, a system is provided. The system can comprise a memory that can store computer-executable components. The system can further comprise a processor that can execute the computer-executable components stored in the memory, where the computer-executable components can comprise an estimation component that can estimate a level of noise of a circuit. The computer-executable components can further comprise a scheduling component that can generate a noise schedule for quantum error mitigation, based on the estimated level of noise. The computer-executable components can further comprise a generation component that can produce transpiled circuits for different noise targets in the generated noise schedule.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION

Heisenberg error mitigation

PendingUS20260252942A1Noise mappingTelecommunications
A system for mitigating errors in quantum computing by transforming observables within a Heisenberg picture that can comprise a memory that stores, and a processor that executes, the computer executable components can comprise a propagation component that propagates an inverse noise map through a quantum circuit. The computer executable components can further comprise an adjustment component that applies the inverse noise map to an observable to produce an adjusted observable operator.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION

Error alert coding for improved error mitigation

Error alarm coding for improved error mitigation is described. In one or more implementations, a system includes a processor configured to receive an encoded signal indicating a type of error detected in a memory, and output one or more mitigation commands for mitigating the type of error detected in the memory based on the encoded signal. In one or more implementations, a memory system includes a memory and a buffer. The buffer is configured to output an encoded signal indicating a type of error detected in the memory.
Owner:ADVANCED MICRO DEVICES INC

Generating optimal samples in quantum optimization algorithms

A method, system and computer program product for generating optimal samples in quantum optimization algorithms. A quantum error mitigation technique is used to generate samples of a resulting probability distribution from random quantum circuits. Examples of such quantum error mitigation techniques include probabilistic error cancellation (PEC) and zero noise extrapolation (ZNE). An objective (ƒ(x)) for every generated sample (|x) is then computed. A conditional value at risk (CVaR) at a particular level of the computed objective functions corresponding to an optimal sample in a quantum optimization algorithm, such as a variational quantum optimization algorithm, is then computed. In this manner, optimal samples in quantum optimization algorithms are generated using quantum error mitigation techniques, such as probabilistic error cancellation and zero noise extrapolation.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION

Self-pruning fractal computational architecture for high-performance computing on resource-constrained and noisy quantum hardware

PCT designated stageWO2026139942A1Computational scienceConcurrent computation
A computational architecture employing self-pruning fractal branch management for achieving supercomputer-class performance on standard hardware and noisy intermediate-scale quantum (NISQ) devices. Unlike conventional parallel computing systems requiring massive hardware resources or genetic algorithms requiring extensive population evolution, this invention utilizes hierarchical fractal doubles—modular computational units organized in self-similar tree structures—with real-time adaptive pruning eliminating non-promising solution branches based on geometric performance metrics computed via √2-scaled fractal analysis. Controlled perturbations (branch shaking) inject stochastic exploration preventing premature convergence while pruning maintains computational efficiency. The system achieves quantum-competitive performance on classical hardware through fractal interference patterns mimicking quantum superposition, and enables NISQ quantum computers to operate effectively despite hardware noise by pruning decoherence-corrupted branches before they contaminate computation. Core innovation: geometric pruning criterion comparing branch trajectory fractal dimension against optimal threshold, triggering instant elimination of branches exhibiting non-productive exploration patterns. Applications include neural architecture search, protein folding simulation, quantum system modeling, combinatorial optimization, and multi-agent coordination—all achieving 10-100× speedup versus conventional approaches while consuming 60-80% less energy through aggressive branch elimination. Technical advantages: (1) no training dataset required (deterministic pruning), (2) hardware-agnostic (runs on CPU / GPU / QPU), (3) noise-tolerant (quantum error mitigation via pruning), (4) energy-efficient (eliminates wasted computation), (5) scalable (fractal recursion to arbitrary depth).
Owner:MARECHAL THIERRY

GNSS time error detection and mitigation

PCT designated stageWO2026059596A3Satellite radio beaconingTime errorSatellite system
A method to detect time errors in a global navigation satellite system (GNSS) receiver can include determining a carrier-to-noise (CNo) delta between a CNo ratio of a first type of GNSS signal and a CNo ratio of a second type of GNSS signal. A time error may be detected based on the first CNo delta and a first threshold CNo delta, the time error indicating a use of an erroneous time uncertainty (TUNC) by the GNSS receiver. An error mitigation operation may be performed based on detecting the time error. The first type of GNSS signal may be selected based on determining that a first level of susceptibility to errors associated with the first type of GNSS signal is lower than a second level of susceptibility to errors associated with the second type of GNSS signal.
Owner:QUALCOMM INC

Multi-layered non-volatile memory with fault and error mitigation.

The present invention provides an apparatus, method, and storage system that offer proactive measures against the risk of potential defects in memory cells of word lines located at or near the boundaries of a hierarchy. [Solution] The device includes one or more control circuits configured to connect to a plurality of non-volatile memory cells in a NAND string coupled to a word line. A method by which the control circuit applies different programming schemes to different sets of word lines includes applying a first number of program pulses to a first set of word lines according to a first programming scheme and applying a second number of program pulses to a second set of word lines according to a second programming scheme. The second set of word lines includes one or more edge word lines or junction word lines, and the second number of program pulses is greater than the first number of program pulses.
Owner:SANDISK TECHNOLOGIES LLC

Error mitigation and handling in interconnected processing units

Systems and methods described herein provide for: generating a deterministic processing schedule assigning a plurality of computation operations among a plurality of functional units, wherein the plurality of functional units are arranged among a plurality of processing units; receiving, by a first processing unit of the plurality of processing units, a packet from a second processing unit of the plurality of processing units; detecting an error in the packet; identifying, based on the deterministic processing schedule, an identified context of a plurality of contexts, the identified context associated with the packet; and altering a value of one or more poison bits in a poison register to indicate that the identified context is poisoned.
Owner:GROQ INC

Approximate Quantum Compiling with Error Mitigation

A system comprises a memory that stores computer executable components, and a processor that executes the computer executable components stored in the memory, wherein the computer executable components comprise an approximating component that generates an approximating unitary from an original unitary, the approximating unitary based on a symmetry of the original unitary and omitting a selected operator of an exponentiated sum of operators comprised by the original unitary, and a checking component that directs operation of a check quantum circuit at a quantum computer, the check quantum circuit based on a quantum circuit output of an operation of the approximating unitary at the quantum computer, resulting in a determination of a violation of the symmetry.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION

GNSS time error detection and mitigation

PCT designated stageWO2026059596A2Satellite radio beaconingTime errorSatellite system
A method to detect time errors in a global navigation satellite system (GNSS) receiver can include determining a carrier-to-noise (CNo) delta between a CNo ratio of a first type of GNSS signal and a CNo ratio of a second type of GNSS signal. A time error may be detected based on the first CNo delta and a first threshold CNo delta, the time error indicating a use of an erroneous time uncertainty (TUNC) by the GNSS receiver. An error mitigation operation may be performed based on detecting the time error. The first type of GNSS signal may be selected based on determining that a first level of susceptibility to errors associated with the first type of GNSS signal is lower than a second level of susceptibility to errors associated with the second type of GNSS signal.
Owner:QUALCOMM INC

Methods and systems for multi-type probabilistic quantum error mitigation

A computer implemented method, for mitigating errors in a quantum circuit comprising at least one occurrence of a quantum logic operation G. The method includes computing a set of coefficients {cp}, associated with a set of basis operations ={Bp}, to obtain a quasi-probability decomposition G0≈ΣpcpBp on the set of basis operations . The quasi-probability decomposition is of a target version of the quantum logic operation G, denoted G0. The set of basis operations {Bp} forms a multi-type basis, constructed from the quantum logic operation G and elements of a set of mitigation operations . The decomposition is computed so as to reach a decomposition target, being based on at least one of a decomposition accuracy target, and a decomposition sampling overhead target. The method includes implementing the quasi-probability decomposition on the quantum processor.
Owner:QEDMA QUANTUM COMPUTING LTD

Virtual distillation for quantum error mitigation

Methods, systems and apparatus for determining an error-mitigated expectation value of a target observable with respect to a noisy quantum state. In one aspect a method includes obtaining multiple copies of the noisy quantum state; performing measurements on tensor products of M copies of the noisy quantum state to compute an expectation value of the target observable with respect to an entangled quantum state, wherein M?1 and eigenvalues corresponding to non-dominant eigenvectors of the noisy quantum state in the spectral decomposition of the entangled quantum state are suppressed exponentially in M; and using the computed expectation value of the target observable with respect to an entangled quantum state to determine the error-mitigated expectation value of the target observable with respect to the noisy quantum state.
Owner:GOOGLE LLC