Interconnection link control method and apparatus, nonvolatile readable storage medium and electronic device

Abstract

Provided in the embodiments of the present application are an interconnection link control method and apparatus, a nonvolatile readable storage medium and an electronic device. The method comprises: reading first device information of a target storage device from a specified configuration space of the target storage device, the target storage device being a storage device connected to a target processor on a server mainboard by means of a specified interconnection link, and the first device information being used for indicating the device type of the target storage device; when the target storage device being of a specified type is determined on the basis of the first device information, acquiring second device information of the target storage device, the second device information being used for indicating the specified interconnection link used for connecting the target storage device to the target processor; and enabling a volume management device (VMD) function of the target interconnection link indicated by the second device information, the VMD function being matched with the storage device of the specified type.

Description

Interconnection link control method and device, non-volatile readable storage medium and electronic device

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the Chinese patent application filed with the China Patent Office on March 29, 2024, with application number 202410376240.5 and application name “Control method and device for interconnected links, storage medium and electronic device”, all contents of which are incorporated by reference into this application. Technical Field

[0003] The embodiments of the present application relate to the field of computers, and in particular, to a method and device for controlling an interconnection link, a non-volatile readable storage medium, and an electronic device. Background Art

[0004] At present, the VMD (Virtual Machine Device) function of the interconnection link in the related art is turned off by default, and when using it, it is necessary to clarify which interconnection link of the processor is using a storage device of a specified type that matches the VMD function, and to turn on the VMD function of the corresponding interconnection link in advance, or to turn on the VMD function of the interconnection link through a tool after confirming the interconnection link where the storage device of the specified type is located. However, the above-mentioned method of setting the VMD function of the interconnection link is relatively time-consuming. Once the location of the storage device of the specified type on the server changes, the VMD function of the corresponding interconnection link needs to be reset, and it is not enough to automatically identify the interconnection link where the storage device of the specified type is located, and set the corresponding interconnection link to enable the VMD function. It can be seen that the control method of the interconnection link in the related art has the problem of taking a long time to set the VMD function of the interconnection link. Summary of the Invention

[0005] The embodiments of the present application provide a method and device for controlling an interconnection link, a non-volatile readable storage medium, and an electronic device, so as to at least solve the problem that the VMD function setting of the interconnection link in the control method of the interconnection link in the related art takes a long time.

[0006] According to one embodiment of the present application, a method for controlling an interconnection link is provided, which is applied to a server, wherein the server includes a server motherboard, and a processor on the server motherboard allows connection to a storage device of a specified type through a specified interconnection link, comprising: reading first device information of a target storage device from a specified configuration space of the target storage device, wherein the target storage device is a storage device connected to a target processor on the server motherboard through a specified interconnection link, and the first device information is used to indicate the device type of the target storage device; when it is determined that the target storage device is a storage device of a specified type based on the first device information, obtaining second device information of the target storage device, wherein the second device information is used to indicate the specified interconnection link used to connect the target storage device to the target processor; and setting a volume management device VMD function of the target interconnection link indicated by the second device information to an enabled state, wherein the VMD function matches the storage device of the specified type.

[0007] In some embodiments, the designated interconnection link is a peripheral device interconnection PCI link, the designated configuration space is a PCI configuration space, and the device connected to the processor on the server motherboard through the PCI link is a PCI device; reading the first device information of the target storage device from the designated configuration space of the target storage device includes: reading configuration information of a designated information type from the PCI configuration space of the target storage device to obtain the first device information, wherein the designated information type includes at least one of the following: type, subtype, and message type.

[0008] In some embodiments, the specified type of storage device is a non-volatile memory host controller interface specification NVME hard disk; after reading the first device information of the target storage device from the specified configuration space of the target storage device, the method also includes: matching the first device information with the hard disk information of the NVME hard disk according to the specified information type to determine whether the target storage device is an NVME hard disk.

[0009] In some embodiments, the designated interconnection link is a peripheral device interconnection PCI link, and the device connected to the processor on the server motherboard through the PCI link is a PCI device; when the target storage device is determined to be a storage device of a specified type based on the first device information, second device information of the target storage device is obtained, including: when the target storage device is determined to be a storage device of a specified type based on the first device information, a set of device numbers of the target storage device is obtained; and the PCI bus number of the target storage device and the PCI device number of the target storage device in the set of device numbers of the target storage device are determined as the second device information.

[0010] In some embodiments, when the target storage device is determined to be a storage device of a specified type based on the first device information, obtaining a set of device numbers for the target storage device includes: checking a set of device numbers for the target storage device in the PCI device driver of the target storage device, wherein the set of device numbers includes a segment number corresponding to the target storage device, a PCI bus number of the target storage device, a PCI device number of the target storage device, and a PCI function number of the target storage device.

[0011] In some embodiments, the designated interconnection link includes a peripheral device interconnection PCI link, the target interconnection link includes a first PCI bridge link, a target PCI bus, and a second PCI bridge link, the target processor is connected to the target PCI bus via the first PCI bridge link, the target storage device is connected to the target PCI bus via the second PCI bridge link, and the second device information includes a PCI bus number of the target storage device and a PCI device number of the target storage device; after obtaining the second device information of the target storage device, the method further includes: determining a processor slot number corresponding to the target storage device and a PCI bus port number corresponding to the target storage device based on the PCI bus number of the target storage device, wherein the processor slot number corresponding to the target storage device and the PCI bus port number corresponding to the target storage device are determined based on the PCI bus number of the target storage device. The corresponding processor slot number is used to indicate the target processor and the processor slot corresponding to the first PCI bridge link on the target processor, and the PCI bus port number corresponding to the target storage device is used to indicate the target PCI bus; based on the PCI device number of the target storage device, the bandwidth splitting information of the second PCI bridge link is determined, wherein the bandwidth splitting information of the second PCI bridge link is used to indicate the bandwidth split from the bandwidth of the target PCI bus to the second PCI bridge link, so as to indicate the position of the target storage device on the target PCI bus; wherein the target interconnection link is represented by the processor slot number corresponding to the target storage device, the PCI bus port number corresponding to the target storage device, and the bandwidth splitting information of the second PCI bridge link.

[0012] In some embodiments, the number range of the PCI bus number of a processor on the server motherboard is set based on the total number of processors on the server motherboard; the PCI device number is used to indicate the bandwidth type of the bandwidth of the PCI link corresponding to the server, and the PCI device numbers corresponding to different bandwidth types are at least partially different.

[0013] In some embodiments, when the total number of PCI bus numbers is 256 and the total number of processors on the server motherboard is 2, the number range of the PCI bus number of one processor is greater than or equal to 0H and less than 80H, and the number range of the PCI bus number of another processor is greater than or equal to 80H and less than or equal to 100H, where the number range is hexadecimal.

[0014] In some embodiments, the PCI device number is used to indicate the bandwidth type of the bandwidth of the PCI link corresponding to the server, and the PCI device numbers corresponding to different bandwidth types are at least partially different; the bandwidth of the PCI link is 16-bit bandwidth, and the 16-bit bandwidth is allowed to be split into 4 4-bit bandwidths or 2 8-bit bandwidths; when the PCI device numbers are 0, 1, 2, and 3, the bandwidth type of the bandwidth of the PCI link is 4 4-bit bandwidths; when the PCI device numbers are 0 and 2, the bandwidth type of the bandwidth of the PCI link is 2 8-bit bandwidths.

[0015] In some embodiments, the method further includes: when the server is powered on, sequentially enumerating devices connected to the processor on the server motherboard through designated interconnection links through a basic input and output system to identify a designated type of storage device among the enumerated devices, and setting the VMD function of the designated interconnection link corresponding to the identified designated type of storage device to an enabled state; when the VMD functions of the designated interconnection links corresponding to the identified designated type of storage device have all been set to an enabled state and the designated interconnection links corresponding to the designated type of storage device have not changed, controlling the basic input and output system to start normally and entering the server's operating system.

[0016] In some embodiments, after enumerating the devices connected to the processor on the server motherboard through the specified interconnection links in sequence through the basic input and output system, the method further includes: combining the setting values ​​of the VMD functions of all the specified interconnection links connected to the processor on the server motherboard into a variable of a specified number of bits to obtain a current variable; and determining whether the specified interconnection links corresponding to the storage devices of the specified type have not changed by comparing the current variable with the historical variable, wherein, if the server is not started for the first time, the historical variable is the variable of the specified number of bits formed by combining the setting values ​​of the VMD functions of all the specified interconnection links connected to the processor on the server motherboard when the server was last started. When the server is started for the first time, the historical variable is the default variable.

[0017] In some embodiments, a designated interconnect link connected to a processor on a server motherboard corresponds to a bit in a variable of a designated number of bits; combining the setting values ​​of the VMD functions of all designated interconnect links connected to the processor on the server motherboard into the variable of the designated number of bits to obtain a current variable includes: combining the setting values ​​of the VMD functions of the designated interconnect links connected to the processor on the server motherboard into the current variable in an order of the bits corresponding to the designated interconnect links in the variable of the designated number of bits.

[0018] In some embodiments, determining whether all designated interconnect links corresponding to storage devices of a specified type have not changed by comparing current variables with historical variables includes: when the current variables and historical variables are the same, determining that all designated interconnect links corresponding to storage devices of a specified type have not changed; and when the current variables and historical variables are different, determining that at least some of the designated interconnect links corresponding to storage devices of a specified type have changed.

[0019] In some embodiments, after enumerating devices connected to the processor on the server motherboard through the specified interconnection links in sequence through the basic input and output system, the method further includes: restarting the server when the VMD functions of the specified interconnection links corresponding to the identified storage devices of the specified type are all set to an enabled state and the specified interconnection links corresponding to the storage devices of the specified type have changed.

[0020] In some embodiments, before restarting the server, the method further includes: updating the historical variables to current variables, and saving the updated historical variables.

[0021] In some embodiments, when the VMD functions of the designated interconnection links corresponding to the identified storage devices of the specified type are all set to enabled states and the designated interconnection links corresponding to the storage devices of the specified type are changed, restarting the server includes: restarting the server when the VMD functions of the designated interconnection links corresponding to the identified storage devices of the specified type are all set to enabled states and the designated interconnection links corresponding to the storage devices of the specified type are newly added; or restarting the server when the VMD functions of the designated interconnection links corresponding to the identified storage devices of the specified type are all set to enabled states and the designated interconnection links corresponding to the storage devices of the specified type are removed.

[0022] According to another embodiment of the present application, a control device for an interconnection link is provided, which is applied to a server, wherein the server includes a server motherboard, and the processor on the server motherboard allows connection to a storage device of a specified type through a specified interconnection link. The control device includes: a reading unit, configured to read first device information of a target storage device from a specified configuration space of the target storage device, wherein the target storage device is a storage device connected to a target processor on the server motherboard through a specified interconnection link, and the first device information is used to indicate the device type of the target storage device; an acquisition unit, configured to acquire second device information of the target storage device when it is determined that the target storage device is a storage device of a specified type based on the first device information, wherein the second device information is used to indicate the specified interconnection link used to connect the target storage device to the target processor; and a setting unit, configured to set a volume management device VMD function of the target interconnection link indicated by the second device information to an enabled state, wherein the VMD function matches the storage device of the specified type.

[0023] According to another embodiment of the present application, a non-volatile readable storage medium is provided, in which a computer program is stored. The computer program is configured to execute the steps of any of the above method embodiments when running.

[0024] According to another embodiment of the present application, an electronic device is provided, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0025] According to another embodiment of the present application, a computer program product is provided, including a computer program, which implements the steps of any of the above method embodiments when executed by a processor.

[0026] Through the present application, a processor on a server motherboard is connected to a target storage device via an interconnection link, and a basic input and output system (BIOS) determines whether the target storage device is a storage device of a specified type based on first device information of the target storage device read from a specified configuration space of the target storage device. When it is determined that the target storage device is a storage device of the specified type, second device information for indicating a specified interconnection link used to connect the target storage device to the target processor is obtained, and a volume management device VMD function of the target interconnection link indicated by the second device information is enabled. By dynamically identifying the storage device of the specified type and turning on the VMD function of the target interconnection link where the storage device of the specified type is located, there is no need to manually set the VMD function of the interconnection link where the storage device of the specified type is located or to confirm the configuration of the storage device of the specified type, thereby meeting the need for dynamically setting the VMD function and solving the problem that the control method of the interconnection link in the related art consumes a long time in setting the VMD function of the interconnection link. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] FIG1 is a hardware structure block diagram of a server device of a method for controlling an interconnection link according to an embodiment of the present application;

[0028] FIG2 is a schematic flow chart of a method for controlling an interconnection link according to an embodiment of the present application;

[0029] FIG3 is a schematic diagram of a method for controlling an interconnection link according to an embodiment of the present application;

[0030] FIG4 is a schematic diagram of a server motherboard according to an embodiment of the present application;

[0031] FIG5 is a schematic flow chart of another method for controlling an interconnection link according to an embodiment of the present application;

[0032] FIG6 is a schematic flow chart of another method for controlling an interconnection link according to an embodiment of the present application;

[0033] FIG7 is a structural block diagram of a control device for an interconnection link provided in an embodiment of the present application. DETAILED DESCRIPTION

[0034] The embodiments of the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0035] It should be noted that the terms "first", "second", etc. in the description and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0036] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this application pertains. The terms used herein are for the purpose of describing the embodiments of this application only and are not intended to limit this application.

[0037] The method embodiments provided in the embodiments of the present application can be executed in a server device or a similar computing device. Taking operation on a server device as an example, FIG1 is a hardware structure block diagram of a server device of a control method for an interconnected link in an embodiment of the present application. As shown in FIG1 , the server device may include one or more (only one is shown in FIG1 ) processors 102 (the processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 configured to store data, wherein the above-mentioned server device may also include a transmission device 106 and an input / output device 108 configured to have a communication function. It will be understood by those skilled in the art that the structure shown in FIG1 is only for illustration and does not limit the structure of the above-mentioned server device. For example, the server device may also include more or fewer components than those shown in FIG1 , or have a configuration different from that shown in FIG1 .

[0038] The memory 104 can be configured to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the control method of the interconnection link in the embodiment of the present application. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, implementing the above-mentioned method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include a memory remotely located relative to the processor 102, and these remote memories may be connected to a server device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0039] The transmission device 106 is configured to receive or transmit data via a network. Optional examples of the aforementioned network may include a wireless network provided by a communication provider of the server device. In one embodiment, the transmission device 106 includes a NIC (Network Interface Controller) that can be connected to other network devices via a base station to communicate with the Internet. In another embodiment, the transmission device 106 may be an RF (Radio Frequency) module that is configured to communicate with the Internet wirelessly.

[0040] In this embodiment, a method for controlling an interconnection link is provided. FIG2 is a flow chart of a method for controlling an interconnection link according to an embodiment of the present application. As shown in FIG2 , the flow chart includes the following steps:

[0041] Step S202, read first device information of the target storage device from the specified configuration space of the target storage device, wherein the target storage device is a storage device connected to the target processor on the server motherboard through a specified interconnection link, and the first device information is used to indicate the device type of the target storage device.

[0042] The interconnection link control method of this embodiment can be applied to a scenario where a VMD function of controlling an interconnection link is used. The method can be applied to a server, where the server includes a server motherboard, and a processor on the server motherboard allows connection to a storage device of a specified type via a specified interconnection link.

[0043] The traditional VMD function is disabled by default and when used, it is necessary to clearly identify which interconnection link of the CPU (Central Processing Unit) uses a specified type of storage device and enable the corresponding VMD function in advance, or to use a tool to enable the VMD function under the specified interconnection link where the specified type of storage device is located. The above two methods of setting the VMD function are both time-consuming. Once the location of the specified type of storage device on the server changes, it needs to be reset and cannot intelligently identify the specified interconnection link where the specified type of storage device is located and set to enable the VMD function.

[0044] To at least partially address the above-mentioned problem, in this embodiment, by dynamically identifying a storage device of a specified type and enabling the VMD function of a specified interconnection link where the storage device of the specified type is located, there is no need for manual setting of the VMD function or confirmation of the configuration of the storage device of the specified type, thereby meeting the requirement of dynamically setting the VMD function of the specified interconnection link.

[0045] In this embodiment, the target storage device is a storage device connected to a target processor on a server motherboard via a designated interconnection link. The designated configuration space of the target storage device stores all information required for the target storage device to operate, such as the manufacturer, device identification, device function, resource requirements, processing capacity, etc. The first device information of the target storage device is read from the designated configuration space of the target storage device. The first device information is used to indicate the device type of the target storage device. Based on this, the first device information of the target storage device is read from the designated configuration space of the target storage device to determine the optional type of the target storage device, for example, to determine that the target storage device is a storage device of a designated type.

[0046] Step S204: When the target storage device is determined to be a storage device of a specified type according to the first device information, second device information of the target storage device is obtained, wherein the second device information is used to indicate a specified interconnection link used to connect the target storage device to the target processor.

[0047] Similar to the aforementioned embodiment, the target storage device is a storage device connected to the target processor on the server motherboard via a designated interconnection link. Based on this, when the target storage device is connected to the target processor via a designated interconnection link, the designated interconnection link used to connect the target storage device to the target processor can be determined based on the second device information of the target storage device.

[0048] Step S206: Setting the volume management device VMD function of the target interconnect link indicated by the second device information to an enabled state, wherein the VMD function matches a storage device of a specified type.

[0049] Here, the target interconnect link indicated by the second device information is the specified interconnect link used to connect the target storage device (storage device of the specified type) to the target processor. The VMD function matches the specified type of storage device. Enabling the VMD function on the target interconnect link can improve the efficiency of reading and writing data for the specified type of storage device and reduce latency. It can also support hot-plug functionality, reducing the reporting of error messages caused by hot-plug functionality. It can also support disk array backup functionality for the specified type of storage device and fault indicator functionality for the specified type of storage device.

[0050] Through the above steps, first device information of the target storage device is read from the specified configuration space of the target storage device, wherein the target storage device is a storage device connected to the target processor on the server motherboard through a specified interconnection link, and the first device information is used to indicate the device type of the target storage device; when the target storage device is determined to be a storage device of the specified type according to the first device information, second device information of the target storage device is obtained, wherein the second device information is used to indicate the specified interconnection link used to connect the target storage device to the target processor; and the volume management device VMD function of the target interconnection link indicated by the second device information is set to an enabled state, wherein the VMD function matches the specified type of storage device, thereby solving the problem that the control method of the interconnection link in the related art has a long time consumption in setting the VMD function of the interconnection link.

[0051] In an exemplary embodiment, the designated interconnect link is a peripheral component interconnect (PCI) link, the designated configuration space is a PCI configuration space, and a device connected to a processor on a server motherboard through the PCI link is a PCI device.

[0052] Reading first device information of the target storage device from a specified configuration space of the target storage device includes:

[0053] S11, reading configuration information of a specified information type from the PCI configuration space of the target storage device to obtain first device information, wherein the specified information type includes at least one of the following: type, subtype, and message type.

[0054] By reading the PCI configuration space of the current device for each PCI device, three types of information, namely, type, subtype and device message type, of the PCI configuration space of the current PCI device are judged simultaneously.

[0055] The PCI configuration space contains information such as the PCI device's vendor ID (Identity document), device ID, subsystem vendor ID, and subsystem ID. The vendor ID and device ID can determine the manufacturer and device type of the device, while the subsystem vendor ID and subsystem ID can determine the device's optional model and version, that is, determine the subtype of the PCI device. The device message type indicates the type of optional interaction message of the PCI device. For example, the device message type information in the PCI configuration space can be used to check whether the current PCI device supports the communication protocol corresponding to the specified type of storage device.

[0056] Through this embodiment, by simultaneously judging the type, subtype, and device message type of the PCI configuration space of the current PCI device, it can be determined whether the current PCI device is a storage device of a specified type, thereby improving the accuracy of the judgment of the PCI device.

[0057] In an exemplary embodiment, the specified type of storage device is a Non-Volatile Memory Host Controller Interface Specification Express (NVME) hard disk;

[0058] After reading the first device information of the target storage device from the designated configuration space of the target storage device, the method further includes:

[0059] S21: Match the first device information with the hard disk information of the NVME hard disk according to the specified information type to determine whether the target storage device is an NVME hard disk.

[0060] Similar to the above embodiment, the PCI configuration space of the PCI device is read through BIOS and the type, subtype, and device type are determined to confirm whether the current PCI device is an NVME hard disk device.

[0061] The type, subtype, and device message type of the PCI configuration space of the current PCI device are judged simultaneously. When the above information is consistent with the NVME hard disk, it is determined that the PCI device at this time is an NVME hard disk.

[0062] In an exemplary embodiment, the designated interconnect link is a peripheral device interconnection PCI link, and a device connected to a processor on a server motherboard via the PCI link is a PCI device;

[0063] When it is determined according to the first device information that the target storage device is a storage device of a specified type, obtaining second device information of the target storage device includes:

[0064] S31, when it is determined according to the first device information that the target storage device is a storage device of a specified type, obtaining a set of device numbers of the target storage device;

[0065] S32: Determine the PCI bus number of the target storage device and the PCI device number of the target storage device in the group of device numbers of the target storage device as second device information.

[0066] When it is determined that the current PCI device is a storage device of a specified type, a set of device numbers for the current PCI device can be obtained through the PCI protocol. Based on the PCI bus number (i.e., BUS number) in the set of device numbers of the PCI device and the PCI device number of the target storage device (i.e., DEV number, the first three letters of DEVICE), the specified interconnection link used to connect the current PCI device to the target processor, i.e., the target interconnection link, can be determined.

[0067] In an exemplary embodiment, when the target storage device is determined to be a storage device of a specified type according to the first device information, obtaining a set of device numbers of the target storage device includes:

[0068] S41, checking a set of device numbers of the target storage device in the PCI device driver of the target storage device, wherein the set of device numbers includes a segment number corresponding to the target storage device, a PCI bus number of the target storage device, a PCI device number of the target storage device, and a PCI function number of the target storage device.

[0069] A set of device numbers for the target storage device can correspond to the unique identifier "Seg:bus:dev:fun" of the PCI device. During startup, the PCI device driver checks the unique identifier "Seg:bus:dev:fun" of the PCI device to determine the segment number (i.e., segment number), PCI bus number (i.e., bus number), PCI device number (i.e., device number), and PCI function number (i.e., function number) corresponding to the PCI device. The PCI device driver is run as needed to obtain a set of device numbers corresponding to all currently connected storage devices of a specified type.

[0070] In an exemplary embodiment, the designated interconnect link includes a peripheral device interconnect PCI link, the target interconnect link includes a first PCI bridge link, a target PCI bus, and a second PCI bridge link, the target processor is connected to the target PCI bus via the first PCI bridge link, the target storage device is connected to the target PCI bus via the second PCI bridge link, and the second device information includes a PCI bus number of the target storage device and a PCI bus number of the target storage device;

[0071] After obtaining the second device information of the target storage device, the method further includes:

[0072] S51, determining a processor slot number corresponding to the target storage device and a PCI bus port number corresponding to the target storage device based on a PCI bus number of the target storage device, wherein the processor slot number corresponding to the target storage device is used to indicate the target processor and the processor slot corresponding to the first PCI bridge link on the target processor, and the PCI bus port number corresponding to the target storage device is used to indicate the target PCI bus;

[0073] S52: Determine bandwidth splitting information for the second PCI bridge link based on the PCI device number of the target storage device, wherein the bandwidth splitting information for the second PCI bridge link is used to indicate bandwidth split from the bandwidth of the target PCI bus to be allocated to the second PCI bridge link, so as to indicate a position of the target storage device on the target PCI bus.

[0074] The target interconnection link is represented by the processor slot number corresponding to the target storage device, the PCI bus port number corresponding to the target storage device, and the bandwidth splitting information of the second PCI bridge link.

[0075] 3 , the target interconnection link used to connect the target storage device to the target processor includes a first PCI bridge link, a target PCI bus, and a second PCI bridge link. The target processor is connected to the target PCI bus via the first PCI bridge link, and the target storage device is connected to the target PCI bus via the second PCI bridge link. The second device information includes the PCI bus number of the target storage device and the PCI device number of the target storage device.

[0076] For example, in this embodiment, the startup focuses on reading the BUS number of the NVME hard disk, and further obtains the CPU slot number, PCI bus port number and other information where the current NVME hard disk is located through the BUS number of the NVME hard disk. At the same time, the bandwidth splitting information of the PCI link is confirmed according to the Dev number of the NVME disk, so as to accurately locate the CPU slot number, PCI link number, and PCI link bandwidth splitting situation of the current NVME hard disk.

[0077] In an exemplary embodiment, the number range of the PCI bus number of a processor on the server motherboard is set based on the total number of processors on the server motherboard;

[0078] The PCI device number is used to indicate the bandwidth type of the bandwidth of the PCI link corresponding to the server, and the PCI device numbers corresponding to different bandwidth types are at least partially different.

[0079] For example, in this embodiment, the total number of buses in the server system is 256. When there are two processors on the server motherboard, the PCI bus number of one processor ranges from 0 to 80H (hexadecimal), and the PCI bus number of the other processor ranges from 80 to 100H (hexadecimal), that is, a bus number greater than 80H is CPU1, and a bus number less than 80H is CPU0.

[0080] The default PCI link width is 16 bits, which can be split into four 4-bit bandwidths or two 8-bit bandwidths. When the PCI device numbers are 0, 1, 2, and 3, the bandwidth is 4 bits, and when the PCI device numbers are 0 and 2, the bandwidth is 8 bits.

[0081] In an exemplary embodiment, the method further includes:

[0082] S61: When the server is powered on, devices connected to the processor on the server motherboard through a designated interconnection link are sequentially enumerated through a basic input / output system to identify a storage device of a designated type among the enumerated devices, and a VMD function of a designated interconnection link corresponding to the identified storage device of the designated type is set to an enabled state.

[0083] S62: When the VMD functions of the designated interconnection links corresponding to the identified storage devices of the designated type are all set to enabled states and the designated interconnection links corresponding to the storage devices of the designated type have not changed, control the basic input and output system to start normally and enter the operating system of the server.

[0084] For example, in this embodiment, when the server is powered on, the BIOS will obtain all PCI device information during PCI enumeration and identify and judge the PCI device. It uses three conditions, namely, the type, subtype, and device message type, of the PCI configuration space of each device to confirm the NVME hard disk identified during the startup process. After it is confirmed to be an NVME hard disk, the device number of the current NVME disk is obtained through the PCI protocol, and the VMD function of the current PCI link of the current NVME disk is enabled. The VMD function of the PCI link of all NVME hard disks in the current server is enabled. If the PCI link corresponding to the NVME hard disk does not change, the BIOS starts normally and enters the OS or shell or operating system.

[0085] In an exemplary embodiment, after sequentially enumerating, through a basic input / output system, devices connected to the processor on the server motherboard through designated interconnection links, the method further includes:

[0086] S71, combining the setting values ​​of the VMD functions of all designated interconnection links connected to the processor on the server motherboard into a variable of designated bits to obtain a current variable;

[0087] S72. Determine whether the specified interconnection links corresponding to the specified type of storage device have not changed by comparing the current variable with the historical variable. When the server is not started for the first time, the historical variable is a variable with a specified number of bits composed of the setting values ​​of the VMD functions of all specified interconnection links connected to the processor on the server motherboard when the server was last started. When the server is started for the first time, the historical variable is a default variable.

[0088] Similar to the aforementioned embodiment, the designated number of bits is consistent with the total number of PCI links mounted on all processors on the server motherboard.

[0089] For example, in this embodiment, the value set to enable VMD is combined into a 32-bit current variable B according to the rules, and the historical variable A is judged to be consistent with the current variable B. That is, it is determined whether the PCI links corresponding to the NVME hard disk have not changed. If variable B and variable A are consistent, it means that the current server is not started for the first time and the PCI link location information of the NVME hard disk has not changed; if variable B and variable A are inconsistent, it means that the current NVME hard disk location information has changed compared to the last startup (addition / removal / change of port).

[0090] When the server is powered on, the BIOS disables the VMD functions of all PCI links by default. If the server is not started for the first time, the historical variable is a variable of a specified number of bits composed of the setting values ​​of the VMD functions of all specified interconnected links connected to the processor on the server motherboard when the server was last started. If the server is started for the first time, the historical variable is the default variable, that is, the default variable corresponds to disabling the VMD functions of all PCI links.

[0091] In an exemplary embodiment, a given interconnect link connected to a processor on a server motherboard corresponds to a bit in a variable of a given number of bits;

[0092] Combine the VMD function setting values ​​of all specified interconnect links connected to the processors on the server motherboard into a variable with a specified number of bits to obtain the current variable, including:

[0093] S81 , combining the setting values ​​of the VMD functions of the designated interconnection links connected to the processor on the server mainboard into a current variable according to the order of the bits corresponding to the designated interconnection links in the variable of the designated number of bits.

[0094] For example, in this embodiment, assuming that all split PCI links have a 4-bit bandwidth and the total number of PCI links is 32, the corresponding 32 4-bit bandwidths result in a total PCI link bandwidth of 128. Assuming that each PCI bus has a default 16-bit bandwidth, there are a total of 8 (128 divided by 16) PCI buses. By reading the VMD setting value of each CPU's PCI link, the setting value is combined into a 32-bit current variable according to a fixed rule.

[0095] Here, the setting values ​​of the VMD function of the PCI link connected to the CPU on the server motherboard are combined into the current variable according to the order of the bits corresponding to the PCI link in the variable of the specified number of bits.

[0096] In an exemplary embodiment, determining whether all specified interconnection links corresponding to storage devices of a specified type have not changed by comparing current variables with historical variables includes:

[0097] S91, when the current variable and the historical variable are the same, determining that none of the designated interconnection links corresponding to the storage device of the designated type has changed;

[0098] S92: When the current variable and the historical variable are different, determine that a designated interconnection link corresponding to a storage device of a designated type is at least partially changed.

[0099] For example, in this embodiment, if the current variable B is consistent with the historical variable A, it means that the current is not the first startup and the PCI link location information where the NVME hard disk is located has not changed; if the current variable B is inconsistent with the historical variable A, it means that the current NVME hard disk location information has at least partially changed compared with the last startup, that is, there is a newly added, removed, or changed port Port, where Port can correspond to the NVME hard disk.

[0100] In an exemplary embodiment, after sequentially enumerating, through a basic input / output system, devices connected to the processor on the server motherboard through designated interconnection links, the method further includes:

[0101] S101 : restarting a server when it is identified that VMD functions of designated interconnection links corresponding to storage devices of designated types are all set to enabled states and the designated interconnection links corresponding to storage devices of designated types are changed.

[0102] For example, in this embodiment, when the VMD functions of the PCI links corresponding to the identified NVME hard disks are all set to enabled state and the PCI links corresponding to the NVME hard disks have changed, for example, when there are new, removed, or changed NVME hard disks, the server is restarted.

[0103] In an exemplary embodiment, before restarting the server, the method further includes:

[0104] S111, updating the historical variables to current variables, and saving the updated historical variables.

[0105] For example, in this embodiment, when the historical variable is A and the current variable is B, before restarting the server, the historical variable A is updated to the current variable B, and the updated historical variable B is saved.

[0106] As an exemplary embodiment of the present application, the control method of the interconnection link in the embodiment of the present application is explained by taking the specified type of storage device as an NVME hard disk as an example.

[0107] Regardless of server architecture, all tasks require storage on hard drives, and NVMe drives are the mainstream non-volatile memory (NVME) storage media. To improve the performance of NVMe drives, processor vendors have introduced VMD technology. Enabling this feature can boost NVMe drive performance by over 28%. VMD is a next-generation storage solution that allows direct control and management of NVMe SSDs (Solid State Drives) from the PCIe bus, eliminating the need for additional hardware adapters. It supports hot upgrades and replacements from the PCIe bus without shutting down the system, supports bootable RAID, and standardized LED management for faster SSD status identification. This versatility enables NVMe SSDs to deliver enterprise reliability, availability, and serviceability (RAS) features. Furthermore, NVMe SSDs offer faster response times, partly because they are closer to the PCIe bus on the processor. Online maintenance of these SSDs requires kernel interrupt processing. VMD allows these maintenance tasks to be completed online without kernel interrupt processing. VMD is a technology implemented on the root port of the Xeon Scalable processor that redirects NVMe SSD insertion and removal events from the PCIe bus to a storage-aware driver. Previously, these events had to be handled by a combination of the system BIOS and the operating system. VMD ensures smooth addition and removal of NVMe drives from the PCIe bus, thus ensuring uptime and serviceability.

[0108] The traditional VMD function is disabled by default, and when used, it is necessary to clearly identify which PCI link of the CPU uses the NVME hard drive and enable the corresponding VMD function in advance, or to use a tool to enable the VMD function under the PCI link where the NVME hard drive is located. The above two methods of setting the VMD function are both time-consuming. Once the NVME hard drive position of the server changes, it needs to be reset and is not smart enough to identify the PCI link where the NVME hard drive is located and enable the VMD function. This invention patent will focus on how to dynamically identify the NVME hard drive and enable the VMD function of the PCI link where the NVME hard drive is located, without the need for manual or confirmation of the NVME configuration to set the VMD function, thereby meeting the need for dynamic setting of the VMD function.

[0109] The embodiment of the present application proposes a control method for an interconnect link, which dynamically controls the setting of the VMD function of the interconnect link. When the server is started, the BIOS reads the VMD setting and combines it into a variable A and stores it. In the PCI enumeration part when the BIOS is started, the PCI configuration space of the PCI device is read and the type, subtype, and device type are determined to confirm whether it is an NVME hard disk device. The Seg number, BUS number, Dev number, and Fun number information of the NVME hard disk device are used to confirm the CPU slot to which the current NVME hard disk BUS number belongs and the position of the PCI bridge link. Then, the bandwidth splitting of the current PCI bridge link is confirmed by the Dev number and Fun number of the NVME hard disk to confirm the accurate position of the NVME device, and the VMD setting of the PCI link confirmed by the NVME is enabled. At the same time, it is checked with the VMD setting at BIOS startup or the last storage. If they are consistent, it means that no port is added / removed / changed at present, and the booting into the OS continues; if they are inconsistent, it means that a port is added / removed / changed at present. At the same time, the current VMD setting variable B is updated to variable A and the server is restarted. The above steps can be repeated. The VMD setting value of the PCI link is obtained at startup and combined into a variable A. In the PCI part, the BIOS confirms the activation of VMD by accurately locating the location information of NVME and combines it into a variable B. Variable B is checked with variable A to confirm whether they are consistent to confirm the activation of VMD. If they are inconsistent, the system restarts; if they are consistent, the system continues to boot.

[0110] In this embodiment, the NVME hard disk is mounted on the PCI link of the CPU. When the server is powered on, the BIOS defaults to turning off the VMD function of all PCI links. Optionally, the overall schematic diagram of the physical design of the server motherboard can be shown in Figure 4. The server motherboard includes two processors (CPU0, CPU1), a BIOS, an I2C (Inter-Integrated Circuit, a two-wire serial bus), a BMC (Baseboard Management Controller, a core component of server out-of-band management), and 6 NVME hard disks. A set of device numbers for each NVME device includes Seg: BUS: DEV: FUN number, where a BUS number greater than 80 is CPU1 and less than 80 is CPU0. The BUS number of the PCI bridge link is a fixed value. DEV is 0, 1, 2, or 3, which means 4-bit bandwidth; DEV is 0 or 2, which means 8-bit bandwidth. CPU0 and CPU1 are interconnected through UPI (Ultra Path Interconnect) / CCIX (Cache Coherent Interconnect for Accelerators) / GMIX (Gen-Z Memory Interconnect). CPU0 and BIOS are interconnected through SPI (Serial Peripheral Interface) / QSPI (Quad Serial Peripheral Interface) / ESPI (Enhanced Serial Peripheral Interface). CPU0 and BMC are interconnected through LPC (Low Pin Count) / SPI / ESPI.

[0111] In conjunction with Figure 5, the optional implementation process is as follows:

[0112] Step 1: Before the server starts for the first time, the BIOS will set a default value for the VMD of the PCI link, which is the default closed state or the state set at the last startup;

[0113] Step 2: When the server starts, the BIOS reads the VMD setting value of each CPU's PCI link, combines the setting value into a 32-bit variable A according to a fixed rule, and stores the variable A;

[0114] Step 3, during the BIOS startup process, in the PCI enumeration part, the PCI configuration space of the current device is read for each PCI device, and the type, subtype, and device message type of the PCI configuration space of the current PCI device are judged simultaneously. When the above information is consistent with the NVME device, the PCI device at this time is an NVME device. If it is not an NVME device, the PCI configuration space of the next PCI device is read;

[0115] Step 4: After confirming that the current PCI device is an NVME device, obtain the device number of the current NVME disk through the PCI protocol, including Seg:BUS:DEV:FUN number, and focus on reading the BUS number of the NVME hard disk. Through the BUS number of the NVME hard disk, further obtain the core key information such as the CPU slot number and PCI link port number where the current NVME hard disk is located;

[0116] Step 5: Confirm the bandwidth splitting information of the PCI link according to the Dev number and FUN number of the NVME disk, and accurately locate the accurate information of the PCI link bandwidth splitting situation where the current NVME hard disk is located;

[0117] Step 6: Repeat steps 4-5 to identify all NVME hard disk devices in the PCI devices.

[0118] Step 7: According to steps 4-6, confirm that the PCI link where the NVME hard disk is located and the VMD for PCI link bandwidth splitting are set to enabled, and set the PCI links where all identified NVME hard disks are located to a 32-bit variable B;

[0119] Step 8: Compare variable B stored in step 7 with the original variable A in step 1. If they are inconsistent, update the value of variable B to variable A and restart the server to enable VMD.

[0120] Step 9: If variable B is consistent with variable A, it means that this is not the first boot and the PCI link location information where the NVME hard disk is located has not changed (addition / removal / change of port);

[0121] Step 10: If variable B and variable A are inconsistent, it means that the current NVME hard disk location information has changed compared to the last startup (addition / removal / change of port). You need to update the current variable B to variable A and restart the server to ensure that the VMD function setting takes effect.

[0122] In conjunction with FIG6 , the execution entities corresponding to the steps shown in FIG5 may be as shown in FIG6 , and the control method of the interconnection link in the present application may be implemented collaboratively by the server, BIOS, and OS (Operating System).

[0123] Through the embodiment of the present application, the setting value of VMD is read when the server starts and combined into a 32-bit variable A. In the PCI enumeration part of the BIOS, the type, subtype, and device type of the PCI configuration space are read to confirm whether the current PCI device is an NVME hard disk. Then, the CPU slot where the current NVME hard disk is located and the PCI link information are accurately located by the SEG number, BUS number, DEV number, and FUN number of the NVME hard disk, and the VMD enabling function of the PCI link is set. After all PCI devices are enumerated, the PCI link of the enabled VMD is combined into a 32-bit variable B. The variables A and B are compared and tested. The actual setting of VMD is confirmed according to the test result and it is confirmed whether the server needs to be restarted. It is suitable for X86 architecture Intel server products in data centers, suitable for domestic data centers and the Internet industry, and can dynamically identify NVME hard disks and turn on the VMD function of the PCI link where the NVME hard disk is located. There is no need to manually set the VMD function or confirm the NVME configuration before setting the VMD function, thereby meeting the demand for dynamically setting the VMD function.

[0124] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the relevant technology, can be embodied in the form of a software product, which is stored in a non-volatile readable storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for enabling a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods of each embodiment of the present application.

[0125] According to another aspect of the embodiments of the present application, a control device for an interconnect link is also provided. This device is configured to implement the control method for the interconnect link provided in the above-mentioned embodiments. Details already described are omitted for clarity. As used below, the term "module" may refer to a combination of software and / or hardware that implements a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, implementation using hardware, or a combination of software and hardware, is also possible and contemplated.

[0126] FIG7 is a block diagram of a control device for an interconnection link provided in an embodiment of the present application, which is applied to a server. The server includes a server motherboard. A processor on the server motherboard allows connection to a storage device of a specified type via a specified interconnection link.

[0127] As shown in FIG7 , the device includes:

[0128] a reading unit 702 configured to read first device information of a target storage device from a specified configuration space of the target storage device, wherein the target storage device is a storage device connected to a target processor on a server motherboard via a specified interconnection link, and the first device information is used to indicate a device type of the target storage device;

[0129] an acquiring unit 704 configured to acquire second device information of the target storage device when the target storage device is determined to be a storage device of a specified type based on the first device information, wherein the second device information is used to indicate a specified interconnection link used to connect the target storage device to the target processor;

[0130] The setting unit 706 is configured to set the volume management device VMD function of the target interconnect link indicated by the second device information to an enabled state, wherein the VMD function matches a storage device of a specified type.

[0131] It should be noted that the reading unit 702 in this embodiment may be configured to execute the above step S202, the acquiring unit 704 in this embodiment may be configured to execute the above step S204, and the setting unit 706 in this embodiment may be configured to execute the above step S206.

[0132] Through the embodiments of the present application, first device information of the target storage device is read from the specified configuration space of the target storage device, wherein the target storage device is a storage device connected to the target processor on the server motherboard through a specified interconnection link, and the first device information is used to indicate the device type of the target storage device; when it is determined that the target storage device is a storage device of the specified type according to the first device information, second device information of the target storage device is obtained, wherein the second device information is used to indicate the specified interconnection link used to connect the target storage device to the target processor; and the volume management device VMD function of the target interconnection link indicated by the second device information is set to an enabled state, wherein the VMD function matches the specified type of storage device, thereby solving the problem that the control method of the interconnection link in the related art has a long time-consuming setting of the VMD function of the interconnection link.

[0133] In an exemplary embodiment, the interconnect link is designated as a peripheral device interconnect PCI link, the configuration space is designated as a PCI configuration space, and the device connected to the processor on the server motherboard via the PCI link is a PCI device;

[0134] The reading unit includes:

[0135] The reading module is configured to read configuration information of a specified information type from the PCI configuration space of the target storage device to obtain first device information, wherein the specified information type includes at least one of the following: type, subtype, and message type.

[0136] In an exemplary embodiment, the specified type of storage device is a Non-Volatile Memory Host Controller Interface Specification NVME hard disk;

[0137] The above device also includes:

[0138] The first execution unit is configured to match the first device information of the target storage device with the hard disk information of the NVME hard disk according to the specified information type after reading the first device information of the target storage device from the specified configuration space of the target storage device to determine whether the target storage device is an NVME hard disk.

[0139] In an exemplary embodiment, the designated interconnect link is a peripheral device interconnection PCI link, and a device connected to a processor on a server motherboard via the PCI link is a PCI device;

[0140] The acquisition unit includes:

[0141] an acquisition module configured to acquire a set of device numbers of the target storage device when it is determined that the target storage device is a storage device of a specified type according to the first device information;

[0142] The first determining module is configured to determine the PCI bus number of the target storage device and the PCI device number of the target storage device from a group of device numbers of the target storage device as the second device information.

[0143] In an exemplary embodiment, the acquisition module includes:

[0144] The viewing submodule is configured to view a set of device numbers of the target storage device in the PCI device driver of the target storage device, wherein the set of device numbers includes a segment number corresponding to the target storage device, a PCI bus number of the target storage device, a PCI device number of the target storage device, and a PCI function number of the target storage device.

[0145] In an exemplary embodiment, the designated interconnect link includes a peripheral device interconnect PCI link, the target interconnect link includes a first PCI bridge link, a target PCI bus, and a second PCI bridge link, the target processor is connected to the target PCI bus via the first PCI bridge link, the target storage device is connected to the target PCI bus via the second PCI bridge link, and the second device information includes a PCI bus number of the target storage device and a PCI device number of the target storage device;

[0146] The above device also includes:

[0147] a first determining unit configured to, after obtaining the second device information of the target storage device, determine a processor slot number corresponding to the target storage device and a PCI bus port number corresponding to the target storage device based on a PCI bus number of the target storage device, wherein the processor slot number corresponding to the target storage device is used to indicate a target processor and a processor slot on the target processor corresponding to the first PCI bridge link, and the PCI bus port number corresponding to the target storage device is used to indicate a target PCI bus;

[0148] a second determining unit, configured to determine bandwidth splitting information of a second PCI bridge link based on a PCI device number of the target storage device, wherein the bandwidth splitting information of the second PCI bridge link is used to indicate bandwidth split from the bandwidth of the target PCI bus to the second PCI bridge link, so as to indicate a position of the target storage device on the target PCI bus;

[0149] The target interconnection link is represented by the processor slot number corresponding to the target storage device, the PCI bus port number corresponding to the target storage device, and the bandwidth splitting information of the second PCI bridge link.

[0150] In an exemplary embodiment, the number range of the PCI bus number of a processor on the server motherboard is set based on the total number of processors on the server motherboard;

[0151] The PCI device number is used to indicate the bandwidth type of the bandwidth of the PCI link corresponding to the server, and the PCI device numbers corresponding to different bandwidth types are at least partially different.

[0152] In an exemplary embodiment, the apparatus further comprises:

[0153] The second execution unit is configured to, when the server is powered on, sequentially enumerate, through a basic input / output system, devices connected to the processor on the server motherboard through a specified interconnection link, identify a storage device of a specified type among the enumerated devices, and enable a VMD function of a specified interconnection link corresponding to the identified storage device of the specified type;

[0154] The third execution unit is configured to control the basic input and output system to start normally and enter the server's operating system when the VMD functions of the specified interconnection links corresponding to the identified specified type of storage devices are all set to an enabled state and the specified interconnection links corresponding to the specified type of storage devices have not changed.

[0155] In an exemplary embodiment, the apparatus further comprises:

[0156] a fourth execution unit configured to, after sequentially enumerating, through a basic input / output system, devices connected to the processor on the server motherboard via the specified interconnection links, combine setting values ​​of VMD functions of all specified interconnection links connected to the processor on the server motherboard into a variable of specified bits to obtain a current variable;

[0157] The third determination unit is configured to determine whether the specified interconnection links corresponding to the storage device of the specified type have not changed by comparing the current variable and the historical variable, wherein, when the server is not started for the first time, the historical variable is a variable of a specified number of bits composed of the setting values ​​of the VMD functions of all specified interconnection links connected to the processor on the server motherboard when the server was last started. When the server is started for the first time, the historical variable is a default variable.

[0158] In an exemplary embodiment, a given interconnect link connected to a processor on a server motherboard corresponds to a bit in a variable of a given number of bits;

[0159] The fourth execution unit includes:

[0160] The execution module is configured to combine the setting values ​​of the VMD functions of the specified interconnection links connected to the processor on the server motherboard into a current variable according to the order of the bits corresponding to the specified interconnection links in the variable with a specified number of bits.

[0161] In an exemplary embodiment, the third determining unit includes:

[0162] The second determining module is configured to determine that none of the designated interconnection links corresponding to the storage devices of the designated type have changed when the current variable and the historical variable are the same;

[0163] The third determining module is configured to determine that, when the current variable and the historical variable are different, a designated interconnection link corresponding to a storage device of a designated type is at least partially changed.

[0164] In an exemplary embodiment, the apparatus further comprises:

[0165] The restart unit is configured to, after sequentially enumerating, through a basic input / output system, devices connected to a processor on a server mainboard through designated interconnection links, restart the server if VMD functions of designated interconnection links corresponding to identified storage devices of designated types are all set to an enabled state and if the designated interconnection links corresponding to the storage devices of designated types are changed.

[0166] In an exemplary embodiment, the apparatus further comprises:

[0167] The fifth execution unit is configured to update the historical variables to current variables and save the updated historical variables before restarting the server.

[0168] It should be noted that the above modules can be implemented through software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.

[0169] An embodiment of the present application further provides a non-volatile readable storage medium, in which a computer program is stored. The computer program is configured to execute the steps of any of the above method embodiments when running.

[0170] In an exemplary embodiment, the above-mentioned non-volatile readable storage medium may include but is not limited to: a USB flash drive, a ROM (Read-Only Memory), a RAM (Random Access Memory), a mobile hard disk, a magnetic disk or an optical disk, and other non-volatile readable storage media that can store computer programs.

[0171] An embodiment of the present application further provides an electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0172] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0173] For optional examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementations, and this embodiment will not be described in detail here.

[0174] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps in any of the above method embodiments are implemented.

[0175] An embodiment of the present application further provides another computer program product, including a non-volatile readable storage medium, wherein the non-volatile readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of any of the above method embodiments are implemented.

[0176] An embodiment of the present application also provides a computer program, which includes computer instructions, which are stored in a non-volatile readable storage medium; a processor of a computer device reads the computer instructions from the non-volatile readable storage medium, and the processor executes the computer instructions, so that the computer device performs the steps in any of the above method embodiments.

[0177] Obviously, those skilled in the art should understand that the modules or steps of the present application described above can be implemented using a general-purpose computing device, they can be concentrated on a single computing device, or distributed across a network composed of multiple computing devices, they can be implemented using program code executable by the computing device, and thus, they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be performed in a different order than herein, or they can be fabricated into separate integrated circuit modules, or multiple modules or steps can be fabricated into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.

[0178] The above are merely optional embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may be subject to various modifications and variations. Any modifications, equivalent substitutions, improvements, etc. made within the principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A method for controlling an interconnection link, characterized in that: Applied to a server, the server comprising a server motherboard, wherein a processor on the server motherboard is allowed to be connected to a storage device of a specified type via a specified interconnection link; The method comprises: Reading first device information of the target storage device from a specified configuration space of the target storage device, wherein the target storage device is a storage device connected to a target processor on the server motherboard through one of the specified interconnection links, and the first device information is used to indicate a device type of the target storage device; When it is determined according to the first device information that the target storage device is a storage device of the specified type, obtaining second device information of the target storage device, wherein the second device information is used to indicate the specified interconnection link used by the target storage device to connect to the target processor; A volume management device (VMD) function of the target interconnect link indicated by the second device information is set to an enabled state, wherein the VMD function matches the storage device of the specified type.

2. The method according to claim 1, characterized in that The designated interconnection link is a peripheral device interconnection PCI link, the designated configuration space is a PCI configuration space, and the device connected to the processor on the server motherboard through the PCI link is a PCI device; The step of reading the first device information of the target storage device from the specified configuration space of the target storage device includes: Configuration information of a specified information type is read from the PCI configuration space of the target storage device to obtain the first device information, wherein the specified information type includes at least one of the following: type, subtype, and message type.

3. The method according to claim 2, characterized in that The storage device of the specified type is a non-volatile memory host controller interface specification NVME hard disk; After reading the first device information of the target storage device from the designated configuration space of the target storage device, the method further includes: The first device information is matched with the hard disk information of the NVME hard disk according to the specified information type to determine whether the target storage device is the NVME hard disk.

4. The method according to claim 1, wherein The designated interconnection link is a peripheral device interconnection PCI link, and the device connected to the processor on the server motherboard through the PCI link is a PCI device; The acquiring, when determining that the target storage device is a storage device of the specified type according to the first device information, second device information of the target storage device includes: When it is determined according to the first device information that the target storage device is a storage device of the specified type, obtaining a set of device numbers of the target storage device; The PCI bus number of the target storage device and the PCI device number of the target storage device in a group of device numbers of the target storage device are determined as the second device information.

5. The method according to claim 4, characterized in that The step of obtaining a set of device numbers of the target storage device when it is determined according to the first device information that the target storage device is a storage device of the specified type includes: Check the set of device numbers of the target storage device in the PCI device driver of the target storage device, wherein the set of device numbers includes a segment number corresponding to the target storage device, a PCI bus number of the target storage device, a PCI device number of the target storage device, and a PCI function number of the target storage device.

6. The method according to claim 1, characterized in that The designated interconnection link includes a peripheral device interconnection PCI link, the target interconnection link includes a first PCI bridge link, a target PCI bus, and a second PCI bridge link, the target processor is connected to the target PCI bus via the first PCI bridge link, the target storage device is connected to the target PCI bus via the second PCI bridge link, and the second device information includes a PCI bus number of the target storage device and a PCI device number of the target storage device; After obtaining the second device information of the target storage device, the method further includes: determining a processor slot number corresponding to the target storage device and a PCI bus port number corresponding to the target storage device based on the PCI bus number of the target storage device, wherein the processor slot number corresponding to the target storage device is used to indicate the target processor and the processor slot corresponding to the first PCI bridge link on the target processor, and the PCI bus port number corresponding to the target storage device is used to indicate the target PCI bus; determining bandwidth splitting information of the second PCI bridge link based on the PCI device number of the target storage device, wherein the bandwidth splitting information of the second PCI bridge link is used to indicate bandwidth split from the bandwidth of the target PCI bus to the second PCI bridge link, so as to indicate a position of the target storage device on the target PCI bus; The target interconnection link is represented by the processor slot number corresponding to the target storage device, the PCI bus port number corresponding to the target storage device, and bandwidth splitting information of the second PCI bridge link.

7. The method according to claim 6, characterized in that The number range of the PCI bus number of a processor on the server motherboard is set based on the total number of processors on the server motherboard; The PCI device number is used to indicate a bandwidth type of a bandwidth of a PCI link corresponding to the server, and the PCI device numbers corresponding to different bandwidth types are at least partially different.

8. The method according to claim 7, characterized in that When the total number of PCI bus numbers is 256 and the total number of processors on the server motherboard is 2, the number range of the PCI bus number of one processor is greater than or equal to 0H and less than 80H, and the number range of the PCI bus number of another processor is greater than or equal to 80H and less than or equal to 100H, where the number range is hexadecimal.

9. The method according to claim 7, characterized in that The PCI device number is used to indicate a bandwidth type of a bandwidth of a PCI link corresponding to the server, and the PCI device numbers corresponding to different bandwidth types are at least partially different; The bandwidth of the PCI link is 16 bits, and the 16 bits can be split into four 4-bit bandwidths or two 8-bit bandwidths; In the case where the PCI device number is 0, 1, 2, or 3, the bandwidth type of the bandwidth of the PCI link is the four 4-bit bandwidths; When the PCI device numbers are 0 and 2, the bandwidth type of the bandwidth of the PCI link is the two 8-bit bandwidths.

10. The method according to any one of claims 1 to 7, characterized in that The method further comprises: When the server is powered on, sequentially enumerate, through a basic input / output system, devices connected to the processor on the server motherboard through the designated interconnection link to identify the storage device of the designated type among the enumerated devices, and set the VMD function of the designated interconnection link corresponding to the identified storage device of the designated type to an enabled state; When the VMD functions of the designated interconnection links corresponding to the identified storage devices of the designated type are all set to an enabled state and the designated interconnection links corresponding to the storage devices of the designated type have not changed, the basic input and output system is controlled to start normally and the operating system of the server is entered.

11. The method according to claim 10, characterized in that After sequentially enumerating, through the basic input and output system, devices connected to the processor on the server motherboard through the designated interconnection link, the method further includes: Combining the setting values ​​of the VMD functions of all the specified interconnection links connected to the processor on the server motherboard into a variable of a specified number of bits to obtain a current variable; By comparing the current variable and the historical variable, it is determined whether the specified interconnection links corresponding to the storage device of the specified type have not changed. Specifically, if the server is not started for the first time, the historical variable is a variable with a specified number of bits formed by combining the setting values ​​of the VMD functions of all the specified interconnection links connected to the processor on the server motherboard when the server was last started. If the server is started for the first time, the historical variable is a default variable.

12. The method according to claim 11, characterized in that One of the specified interconnection links connected to the processor on the server motherboard corresponds to a bit in the variable of the specified number of bits; Combining the setting values ​​of the VMD functions of all the specified interconnection links connected to the processor on the server motherboard into a variable of a specified number of bits to obtain a current variable includes: The setting values ​​of the VMD functions of the designated interconnection links connected to the processor on the server motherboard are combined into the current variable according to the order of the bits corresponding to the designated interconnection links in the variable of the designated number of bits.

13. The method according to claim 11, characterized in that The determining whether the designated interconnection links corresponding to the storage devices of the designated type have not changed by comparing the current variable with the historical variable includes: When the current variable and the historical variable are the same, determining that none of the designated interconnection links corresponding to the storage device of the designated type has changed; When the current variable and the historical variable are different, it is determined that the designated interconnection link corresponding to the storage device of the designated type is at least partially changed.

14. The method according to claim 11, characterized in that After sequentially enumerating, through the basic input and output system, devices connected to the processor on the server motherboard through the designated interconnection link, the method further includes: When the VMD functions of the designated interconnection links corresponding to the identified storage devices of the designated type are all set to an enabled state and the designated interconnection links corresponding to the storage devices of the designated type are changed, the server is restarted.

15. The method according to claim 14, characterized in that Before restarting the server, the method further includes: The historical variables are updated to the current variables, and the updated historical variables are saved.

16. The method according to claim 14, characterized in that The step of restarting the server when the VMD functions of the designated interconnection links corresponding to the identified storage devices of the designated type are all set to enabled states and the designated interconnection links corresponding to the storage devices of the designated type are changed includes: restarting the server when the VMD functions of the designated interconnection links corresponding to the identified storage devices of the designated type are all set to enabled states and the designated interconnection links corresponding to the storage devices of the designated type are newly added; or When the VMD functions of the designated interconnection links corresponding to the identified storage devices of the designated type are all set to enabled states and the designated interconnection links corresponding to the storage devices of the designated type are removed, the server is restarted.

17. A control device for an interconnection link, characterized in that: Applied to a server, the server comprising a server motherboard, wherein a processor on the server motherboard is allowed to be connected to a storage device of a specified type via a specified interconnection link; The device comprises: a reading unit, configured to read first device information of the target storage device from a specified configuration space of the target storage device, wherein the target storage device is a storage device connected to the target processor on the server motherboard through one of the specified interconnection links, and the first device information is used to indicate a device type of the target storage device; an acquiring unit, configured to acquire second device information of the target storage device when it is determined that the target storage device is a storage device of the specified type according to the first device information, wherein the second device information is used to indicate the specified interconnection link used by the target storage device to connect to the target processor; The setting unit is configured to set a volume management device (VMD) function of the target interconnect link indicated by the second device information to an enabled state, wherein the VMD function matches the storage device of the specified type.

18. A non-volatile readable storage medium, characterized in that: The non-volatile readable storage medium stores a computer program, wherein the computer program implements the steps of the method according to any one of claims 1 to 16 when executed by a processor.

19. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 16 are implemented.

20. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 16 are implemented.

Images