Data migration method, access processing method, data migration system, and electronic device

Abstract

Embodiments of the present disclosure provide a data migration method, an access processing method, a data migration system, and an electronic device. The data migration method is applied to a switch, wherein the switch communicates with a plurality of memory devices in a memory pool on the basis of an interconnection protocol, and each memory device has a plurality of memory areas. When data migration needs to be performed on a first memory area in the memory pool, the switch sequentially migrates a plurality of data pages, which are obtained by dividing data in the first memory area according to pages, into an available second memory area, and one page bitmap determined for the first memory area can further be used during migration to record the migration states of the plurality of data pages. By using the present solution, the problem of widespread server failures caused by a memory problem can be effectively solved, page-level granularity is used during migration to migrate the data in the first memory area page by page, enabling continuous processing of server accesses to the first memory area throughout the migration process, thus reducing the performance impact on the server.

Description

[0001] TECHNICAL FIELD The present disclosure relates to the field of computer technology, and more particularly to a data migration method, an access processing method, a data migration system, and an electronic device. BACKGROUND The efficient pooled memory capabilities of interconnection protocols provide server memory expansion and sharing capabilities. In a typical server memory architecture based on interconnection protocols, multiple servers are connected to corresponding switches, which are also connected to multiple memory devices in the memory pool. Currently, in order to support dynamic allocation of arbitrary memory sizes, A Multiple Logical Device (MLD) memory device can be divided into several memory regions, and different memory regions can be assigned to different servers. Because an MLD memory device can be used simultaneously by multiple servers, compared to traditional single logical devices (SLDs), the server failure storm radius caused by memory issues is larger. In view of the above-mentioned problems mentioned in the background, the present disclosure provides a data migration method, access processing method, data migration system, electronic device, computer-readable storage medium, and computer program product that solve or at least partially solve these problems. In a first embodiment, the present disclosure provides a data migration method applied to a switch. The switch is communicatively connected to multiple memory devices in a memory pool based on an interconnection protocol, and each memory device has multiple memory regions. The method includes: in response to a migration request triggered for a first memory area in the memory pool, partitioning data in the first memory area by page to obtain multiple data pages; determining a page bitmap for the first memory area, wherein the page bitmap assigns a bit to each of the multiple data pages, the bit being used to record the migration status of the corresponding data page; and sequentially migrating the multiple data pages to a second memory area in the memory pool, and using the page bitmap to record the migration status of the multiple data pages during the migration process. In a second embodiment, the present disclosure provides another data migration method for use in a manager. The method includes: receiving memory error information sent by a first memory device; wherein the first memory device is one of multiple memory devices in a memory pool, each of the multiple memory devices having multiple memory regions; upon determining, based on the memory error information, that data migration is required for a first memory region in the first memory device, selecting an available second memory region from the memory pool; sending a migration request to a switch, requesting the switch to migrate data in the first memory region to the second memory region; and upon receiving a migration completion response from the switch, marking the first memory region as unreliable; wherein the switch is communicatively connected to the multiple memory devices based on an interconnection protocol; and the switch partitions the data in the first memory region into multiple data pages by page, sequentially migrates the multiple data pages to the second memory region, and during the migration process, records the migration status of the multiple data pages using a page bitmap corresponding to the first memory region. In a third embodiment, the present disclosure provides an access processing method applied to a switch.The method includes: when migrating data in a first memory region experiencing a memory error, upon receiving an access request from a first server for the first memory region, determining a target data page for the access request; the target data page is one of multiple data pages in the first memory region; obtaining a page bitmap corresponding to the first memory region; wherein the page bitmap records migration status information for the multiple data pages; determining the migration status of the target data page based on the migration status information recorded in the page bitmap; and performing adaptive forwarding processing on the access request based on the migration status of the target data page. The first memory region and the second memory region are memory regions in a memory pool, the memory pool includes multiple memory devices, each memory device having multiple memory regions; and the switch is communicatively connected to the multiple memory devices based on an interconnection protocol. In a fourth embodiment, the present disclosure provides a data migration system. The system includes: a memory pool comprising multiple memory devices, each memory device having multiple memory regions; a first memory device being one of the multiple memory devices; a manager configured to receive memory error information sent by the first memory device and, upon determining, based on the memory error information, that data migration is required for a first memory region in the first memory device, select an available second memory region from the memory pool; send a migration request to a switch requesting the switch to migrate data in the first memory region to an available second memory region; a switch connected to the manager and further communicating with each memory device in the memory pool based on an interconnection protocol, configured to: in response to the migration request, partition the data in the first memory region by page to obtain multiple data pages; determine a page bitmap for the first memory region, wherein the page bitmap assigns a bit to each of the multiple data pages, the bit being used to record the migration status of the corresponding data page; sequentially migrate the multiple data pages to the second memory region, and use the page bitmap to record the migration status of the multiple data pages during the migration process. In a fifth embodiment, the present disclosure provides an electronic device.The electronic device includes a memory and a processor, wherein the memory is configured to store a program; the processor, coupled to the memory, is configured to execute the program stored in the memory to implement the steps of each method embodiment provided herein. The electronic device is a switch based on an interconnection protocol or a manager connected to the switch. When the electronic device is the switch, the electronic device further includes a migration engine, and the processor and the migration engine collaborate to implement the steps of the method provided in the first or third embodiment. When the electronic device is the manager, the processor is configured to implement the steps of the method provided in the second embodiment. In a sixth embodiment, the present disclosure provides a computer-readable storage medium. The computer-readable storage medium stores a computer program. When executed by the processor, the computer program can implement the steps of each method embodiment provided herein. In a seventh embodiment, the present disclosure provides a computer program product. The computer program product includes a computer program. When executed by the processor, the computer program causes the processor to implement the steps of each method embodiment provided herein. In the technical solutions provided by the embodiments of the present disclosure, the switch communicates with multiple memory devices in a memory pool based on an interconnection protocol, and each memory device has multiple memory areas. When data migration is required within the first memory region in the memory pool (e.g., when a memory error occurs in the first memory region), the switch partitions the data in the first memory region by page and sequentially migrates the resulting data pages to an available second memory region. During the migration process, a page bitmap designated for the first memory region is used to record the migration status of the multiple data pages. This solution enables online data migration within one or more memory regions in the memory pool when errors occur in the interconnection protocol, effectively resolving widespread server failures caused by memory issues. Furthermore, during the migration process, data in the first memory area is migrated page by page at a page-level granularity, thereby enabling continued processing of the server's access to the first memory area during the migration process. Specifically, if an access request to the first memory area is received from the first server, the migration status of the target data page requested for access can be determined based on the migration status of multiple data pages in the first memory area recorded in the page bitmap of the first memory area. Adaptive forwarding processing can then be performed on the access request from the first server based on the migration status of the target data page. This solution does not prevent the server from continuing to access a certain memory area during the data migration process in the memory area, which is obviously beneficial for reducing the performance impact on the server.BRIEF DESCRIPTION OF THE DRAWINGS To more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, the following briefly describes the drawings used in the embodiments or the prior art descriptions. It should be apparent that the drawings described below represent some embodiments of the present disclosure. Persons skilled in the art can also derive other drawings based on these drawings without inventive effort. Figure 1 is a schematic diagram of the structure of a hardware system (data migration system) provided in an embodiment of the present disclosure; Figure 2 is an example of an address translation table provided in an embodiment of the present disclosure; Figure 3 is a schematic diagram of the workflow of a manager provided in an embodiment of the present disclosure; Figure 4 is a schematic diagram of the workflow of a replication engine included in a migration engine in a switch provided in an embodiment of the present disclosure; Figure 5 is a schematic diagram of the workflow of a switch processing a server access request provided in an embodiment of the present disclosure; Figure 6 is a schematic diagram of the workflow of an access request processing module included in a migration engine provided in an embodiment of the present disclosure processing a server access request; Figures 7 and 8 are schematic diagrams of the flow charts of a data migration method provided in an embodiment of the present disclosure; Figure 9 is a schematic diagram of the flow chart of an access processing method provided in an embodiment of the present disclosure; and Figure 10 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS: An interconnect protocol is an open protocol that supports connecting multiple servers and a memory pool composed of multiple memory devices, and allows different memory regions within the memory pool to be allocated to different services. This protocol provides server memory expansion and memory sharing. Taking the Compute Express Link (CXL) protocol as an example, a typical use case for the CXL protocol is a memory pool system. This memory pool system (see Figure 1) includes multiple hosts, a CXL switch, and a CXL memory pool containing multiple CXL memory devices. Multiple hosts are connected to the upstream ports of the CXL switch, while multiple CXL memory devices are connected to the downstream ports of the CXL switch. To support dynamic allocation of arbitrary memory sizes, the CXL protocol defines the concept of multiple logical devices (MLDs). Specifically, under the CXL protocol, the multiple CXL memory devices can all be MLD memory devices. An MLD memory device can be divided into multiple memory regions (or memory segments), and different memory regions can be allocated to different hosts (e.g., servers). However, in such a CXL protocol-based memory pool system, since an MLD memory device can be used by multiple hosts simultaneously, it will produce a larger host failure explosion radius than a traditional single logical device (SLD) in the event of a memory error.To address the aforementioned issues, the present disclosure provides an online memory data migration solution for a memory pool system based on an interconnection protocol (such as the CXL protocol). When an error (i.e., failure) occurs in a memory area within the memory pool, the data in that area is automatically migrated to another, error-free memory area within the memory pool. This reduces the likelihood of host (e.g., server) failures caused by memory issues and improves the performance metrics (e.g., RAS) of the extended memory (memory pool) to a level close to that of the host's local memory. RAS performance metrics include reliability, availability, and serviceability. For example, when a memory error (such as an ECC error) occurs in memory region a within a CXL-based memory pool (CXL memory pool), the memory device to which region a belongs reports the error to the Fabric Manager (FM). After the FM determines that region a meets specific unreliability criteria based on the received error information, it collaborates with a CXL-based switch (CXL switch) to initiate an online migration process to migrate the data in the unreliable region a (the source region) to a reliable region b (the destination region). During the migration process, the CXL switch continues to service host requests for region a (the source region) using a specific service method. The CXL switch stores an address translation table. Each entry in the table records the mapping between a host's physical address and the address information of the corresponding memory region in the memory pool. After the CXL switch completes the data migration in memory region a, it updates the address translation table entry associated with memory region a, replacing the address information for memory region a with the address information for memory region b. Furthermore, the fabric manager (FM) replaces the address information for memory region a in its locally stored memory allocation table with the address information for memory region b. The memory allocation table records the mapping between the host and the address information for the memory regions allocated by the fabric manager to the host. Consequently, future requests to memory region a will be routed to memory region b. When there are no pending requests for memory region a (i.e., requests are in progress), the fabric manager (FM) closes memory region a and marks it as unreliable to prevent future allocations.To help those skilled in the art better understand the disclosed solutions, the following will provide a clear and complete description of the technical solutions in the disclosed embodiments, with reference to the accompanying drawings. Some processes described in the specification, claims, and accompanying drawings of this disclosure include multiple operations that appear in a specific order. These operations may be executed out of the order in which they appear herein or in parallel. Operation numbers, such as 10K, 102, etc., are merely used to distinguish between different operations and do not represent any specific execution order. Furthermore, these processes may include more or fewer operations, and these operations may be executed sequentially or in parallel. It should be noted that terms such as "first" and "second" are used herein to distinguish between different messages, devices, modules, etc., and do not imply a specific order of precedence or precedence, nor do they limit "first" and "second" to different types. In this disclosure, the term "or / and" merely describes an association relationship between associated objects, indicating that three possible relationships exist. For example, "A or / and B" indicates that A can exist alone, A and B can exist simultaneously, or B can exist alone. The character " / " in this disclosure generally indicates that the associated objects are in an "or" relationship. It should also be noted that the terms "include," "comprise," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a product or system comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such product or system. Without further limitation, elements defined by the phrase "comprising a..." do not preclude the presence of other identical elements in the product or system comprising the elements. Furthermore, the following embodiments represent only some of the embodiments of this disclosure, and are not exhaustive. All other embodiments derived by those skilled in the art based on the embodiments of this disclosure without inventive effort are within the scope of protection of this disclosure. Before introducing the technical solutions provided by the various embodiments of the present disclosure, some terms involved in the present disclosure are first explained.

[0002] CXL is a new device interconnect technology standard that has been adopted by a growing number of manufacturers since its introduction and has become a unified standard interconnect protocol. Specifically, CXL, based on PICe Gen5+ (Peripheral Component Interconnect Express 5) technology, is a cache-coherent interconnect protocol for processors (CPUs), memory expansion, and accelerators. It consists of three sub-protocols: CXL.io, CXL Cache Protocol (CXL.cache), and CXL Memory Protocol (CXL.mem). o CXL.io is used for device discovery, configuration, register access, error reporting, host physical address lookup, and interrupts. CXL.cache is used to expand system cache, and CXL.mem is used to expand system memory. These three sub-protocols provide online read and write support for host access to peripheral memory and for peripheral devices to access host memory.

[0003] CXL Memory is a device that includes Double Data Rate Synchronous Dynamic Random Access Memory (DDR), a memory controller, and provides CXL interface and cache-level memory access capabilities.

[0004] A CXL switch is designed specifically for the CXL protocol, supporting communication between connected components and devices using the CXL protocol. A Fabric Manager (FM) is management software used to manage memory and device allocation, switch routing, and other system operational status.

[0005] A CXL Memory Pool is a memory system with multiple CXL memory devices connected to the downstream ports of a CXL switch and providing content expansion for multiple hosts. The hosts are connected to the upstream ports of the CXL switch and communicate with the Fabric Manager (FM) via Ethernet. The Fabric Manager (FM) is also connected to the upstream ports of the switch.

[0006] The RAS of a CXL memory pool refers to its reliability, availability, and serviceability. These three metrics can be used to evaluate system performance and ensure stable operation and rapid fault recovery. The Address Translation Table (ATT) records the mapping relationship between the host's physical address and the address information of the corresponding memory area in the memory pool. To facilitate understanding of the disclosed solution, the hardware system architecture underlying the disclosed method is first described. Figure 1 shows a schematic diagram of the hardware system (i.e., data migration system) provided by the disclosed solution. As shown in Figure 1, the hardware system includes a memory pool 30, a switch 20 based on an interconnection protocol, and a manager 40. The memory pool 30 contains multiple memory devices. Each memory device can be an MLD memory device, in which case each memory device has multiple memory areas. Each memory device is connected to a corresponding downstream port 24 of the switch 20. Specifically, each memory device is connected to the corresponding downstream port of the switch 20 based on an interconnection protocol. The interconnection protocol described in the context of the disclosed solution may be, but is not limited to, the CXL protocol. Figure 1 shows an example in which the interconnection protocol is the CXL protocol. In this case, the switch 20 is also referred to as a CXL switch, and the memory pool 30 is also referred to as a CXL memory pool. The manager 40 is the aforementioned fabric manager FM, which is connected to the corresponding upstream port 23 of the switch 20 via the Peripheral Component Interconnect Express (PCIe) bus. Furthermore, the hardware system also includes multiple servers 10 (servers), such as server 11 and server 12. These servers 10 are connected to the corresponding upstream ports 23 of the switch 20 via the CXL protocol. Furthermore, the servers 10 are connected to the manager 40 via conventional Ethernet. The manager 40 can allocate corresponding memory areas in the memory pool to each of the servers for use by the servers. Specifically, the first server is one of the multiple servers, and the manager 40 allocates a corresponding memory area in the memory pool to the first server in the following manner: 11) The first server communicates with the manager 40 via Ethernet and sends a memory request to the manager 40, requesting the manager 40 to allocate a memory area in the memory pool to the first server. The memory request includes the physical address of the first server (which is the starting physical address) and the requested memory size.

[0007] 12) After receiving the memory request from the first server, the manager 40 performs the following operations: First, based on the region information (e.g., reliability status, occupancy status, memory size, etc.) of each memory region in the memory pool, it selects an available memory region R from the memory pool that matches the requested memory size and serves as the target memory region to be allocated to the first server. Then, it establishes a mapping between the physical address of the first server and the address information of memory region R and adds the mapping to a locally stored memory region allocation table. Furthermore, it edits the address translation table in the switch 20, for example, via a PCIe interface, to add a new entry to the address translation table. This entry records the mapping between the physical address of the first server and the address information of memory region R. The address information of memory region R includes: [memory region] < the device identifier of the memory device D to which it belongs and an address offset, where the address offset points to memory region R in the memory device. Afterwards, the manager 40 sends a corresponding memory allocation success response message to the first server via Ethernet. The response message may include the address information of the memory region R allocated to the first server, notifying the first server that it can now access the corresponding memory region R in the memory pool. For details on how the manager 40 allocates corresponding memory regions in the memory pool to multiple servers other than the first server, please refer to the descriptions in 11) to 12) above and will not be repeated here. It should be noted that each entry in the address translation table, in addition to recording the mapping between the physical address of the corresponding server and the address information of the corresponding memory region, also records other information, such as the memory size (e.g., the memory size of the memory region, the memory size of the memory device to which the memory region belongs), the data migration status of the memory region, etc. In the address translation table, the data migration status of the memory region is initially set to "not being migrated". When the switch 20 performs data migration on the memory region, the data migration status of the memory region may be updated according to the data migration progress, for example, to "migrating in progress" or "migrated completed". Figure 2 shows an example of an address translation table. Based on the above, the manager 40 is configured to: in response to a memory request from a first server, select an adapted target memory area from all memory areas in the memory pool based on area information of the memory areas, and allocate the area to the first server; and, based on the target memory area allocated to the first server, add a first entry to the address translation table in the switch 20 to record a mapping relationship between the physical address of the first server, the address information of the target memory area allocated to the first server, and the data migration status of the target memory area.A response message containing the memory region allocation result is sent to the first server, allowing the first server to access the corresponding target memory region in the memory pool based on the response message. The switch 20 includes an address translation table containing multiple entries. Each entry records the mapping between the physical address of a server 10, the address information of a memory region, and the data migration status. The memory region in this entry is allocated to the server by the manager in response to a memory request from the server. Based on the region information of all memory regions in the memory pool, the manager selects a memory region from the memory pool that matches the memory request and allocates it to the server. The address information of a memory region includes the device identifier (e.g., device port ID) of the memory device to which the memory region belongs and an address offset, which points to the memory region. Continuing with the above description of the first server, after the memory allocation is complete, the first server can subsequently access the memory region R allocated to it by the manager 40. The specific access process can be as follows:

[0008] 21) The first server sends an access request (a read or write request) to the switch 20. The access address carried in the access request is within the address range of the memory area R originally allocated to it by the manager 40.

[0009] 22) After receiving the access request from the first server, the switch 20 searches the local address translation table for the address information of the memory region R corresponding to the first server, and then determines the device identifier and address offset of the corresponding memory device D based on the address information of the memory region R. Then, based on the device identifier and address offset of the memory device D, the switch 20 forwards the access request to the memory device D.

[0010] 23) In response to the received access request, the memory controller in memory device D will perform the corresponding read and write operations and return the results of the read and write operations to the first server via switch 20. Because the memory devices in the memory pool have multiple memory regions, different memory regions can be allocated to different servers. In other words, a single memory device in the memory pool can be used simultaneously by multiple servers. This results in a large server failure blast radius if a memory error occurs in the memory device. To address this issue, the present disclosure implements a solution for online data migration of memory regions in the memory pool through manager 40 and switch 20 when an error occurs in a memory region in the memory pool. During the migration process, user applications are completely unaware of the migration process, and migration requires no user application involvement. Therefore, migration implementation does not require any user application involvement, which offers certain benefits for relevant use cases. Specifically, when a memory error occurs in a memory region in the memory pool, the process for online data migration of the corresponding memory region implemented by manager 40 and switch 20 is as follows:

[0011] (1) Whenever a memory error occurs in a memory region in a memory pool, for example, a memory error occurs in a first memory region in the memory pool, where the first memory region is one of multiple memory regions included in a first memory device in the memory pool, the first memory device will send an interrupt request to the manager 40 via any interrupt mechanism included in PCIe, thereby reporting the memory error information in the first memory region to the manager 40 (specifically, the processor in the manager 40). PCIe interrupt mechanisms include Message Signaled Interrupt (MSI) and Message Signaled Interrupt-extended (MSI-X). The MSI interrupt mechanism supports up to 32 interrupt requests and requires consecutive interrupt vectors. The MSI-X interrupt mechanism supports more interrupt requests and does not require consecutive interrupt vectors. Furthermore, in response to the interrupt request sent by the first memory device, the manager 40 activates its interrupt service and begins processing memory error information for the first memory device. Specifically, the manager 40 determines whether the accumulated memory error information received from the first memory region meets a migration condition (i.e., a migration criterion). The migration condition is vendor-specific. For example, meeting the migration condition may include, but is not limited to: the error type being an uncorrectable error (e.g., a hard error caused by physical damage to the memory device itself), the number of consecutive memory errors reaching a set threshold, the duration of the memory errors reaching a set threshold, etc. Once the migration condition is determined to be met, it indicates that data migration is required for the first memory region. The manager 40 then initiates a migration process and, based on the memory size of the first memory region, selects an available second memory region from a memory pool that matches the memory size of the first memory region. After the selection is complete, the manager 40 sends a migration request (also known as a migration instruction) to the switch 20 (specifically, the migration engine in the switch), instructing the switch 20 to migrate the data in the first memory region to the second memory region in accordance with the migration request. The specific implementation of switch 20 migrating data in the first memory area in response to the migration request will be described in detail below and is not detailed here. The first memory area is also referred to as the old memory area or the source memory area, and the second memory area is also referred to as the new memory area or the destination memory area. Furthermore, upon receiving the migration completion response from switch 20, manager 40 updates its local memory allocation table to replace the address information of the first memory area with the address information of the second memory area. It also marks the first memory area as unreliable to prevent future allocations of the first memory area.FIG3 shows a schematic diagram of the workflow of the manager 40 in memory data migration.

[0012] (II) Switch 20: The switch 20 includes an address translation table 21 and a migration engine 22. For details about the address translation table 21, please refer to the relevant content in other embodiments of this disclosure. During the memory data migration process, the switch 20 plays an important role: the migration engine 22 in the switch 20 is responsible for migrating data from the old memory area to the new memory area. As shown in FIG1 , the migration engine 22 in the switch 20 includes a migration request queue 221, a replication engine 223, and a bitmap module 224. The migration request queue 221 is a first-in, first-out (FIFO) queue for storing migration requests received from the manager 40. When the corresponding migration request is completed, the migration request is removed from the migration request queue. The replication engine 223 is responsible for migrating data from the old memory area to the new memory area, where the migration method used may be replication. To minimize the impact on server performance, the data migration process is completed at the page level. Using this migration method, the page bitmap contained in the bitmap module 224 is used to record migrated pages (i.e., the data pages described below). Specifically, referring to the workflow diagram of the replication engine 223 shown in FIG4 , following the example memory manager 40 described in (I) above, a migration request req is stored in the migration request queue. This migration request req requests the migration of data from the first memory area to the second memory area. After initiating a new data migration process in response to this migration request req, the replication engine 223 performs the following steps: Step 1) Reset the page bitmap in the bitmap module 224 to an appropriate length based on the memory size of the first memory area (the old memory area requiring data migration). For example, the bitmap length (hereinafter referred to as "length") of the page bitmap after the reset is 20. It should be noted that the page bitmap is a bitmap. Its bitmap length reflects the number of bits contained in the page bitmap. Each bit typically uses 0 and 1 to record the two states of the corresponding target object. For example, if the target object is page data, 0 and 1 can be used to record the following two states of the page data: not migrated and migrated. Step 2) Sequentially copy multiple data pages in the first memory area to the second memory area (the destination area for data migration, i.e., the new memory area). The multiple data pages can be obtained by using memory paging technology to divide the data in the second memory area into a certain page size.When a data page is copied, the value of the corresponding bit in the page bitmap is set to a set value, such as 1, to indicate that the data page has been migrated and that access to the data page should be directed to the new memory area. After the copy engine 223 has copied all data pages in the first memory area, the migration engine 22 updates the corresponding entry in the local address translation table 21 of the switch 20, updating the address information of the first memory area recorded in this entry to the address information of the second memory area. Furthermore, the migration engine 22 sends a migration completion response message to the manager 40, prompting the manager 40 to initiate an update of the local memory allocation table, updating the address information of the first memory area recorded in the memory allocation table to the address information of the second memory area. Based on the above description of the manager 40 and the switch 20, the functions of the manager 40 and the switch 20 may respectively include the following: the manager 40 is configured to receive memory error information sent by the first memory device and, when determining, based on the memory error information, that data migration is required for a first memory area in the first memory device, select an available second memory area from a memory pool; send a migration request to the switch (specifically, send a migration request to a migration engine in the switch) based on area information of the second memory area; wherein the migration request is used to request migration of data in the first memory area to an available second memory area, and the first memory device is one of multiple memory devices in the memory pool; and the switch 20 is configured to: in response to the migration request, partition the data in the first memory area by page to obtain multiple data pages; determine a page bitmap for the first memory area, wherein the page bitmap assigns a bit to each of the multiple data pages, the bit being used to record the migration status of the corresponding data page; and migrate the multiple data pages to the second memory area in sequence, and use the page bitmap to record the migration status of the multiple data pages during the migration process. The switch 20 includes a migration engine 22 configured to execute operations related to migrating data from a first memory area to a second memory area. Specifically, the migration engine 22 includes a migration request queue 221 and a replication engine 223. The migration request queue 221 stores migration requests received by the migration engine from a manager.The replication engine 223 is configured to migrate data in the first memory area to the second memory area. Specifically, it is configured to: partition the data in the first memory area by page to obtain multiple data pages; determine a page bitmap for the first memory area; sequentially migrate the multiple data pages to the second memory area, and use the page bitmap to record the migration status of the multiple data pages during the migration process. The migration engine 22 also includes a bitmap module 224, which contains a page bitmap. Furthermore, when determining a page bitmap for the first memory area, the replication engine 223 is configured to: reset the page bitmap in the bitmap module 224 based on the memory size of the first memory area to obtain a reset page bitmap, where the reset page bitmap is the page bitmap determined for the first memory area. In addition to the aforementioned functions, the switch 20 also has another important function: during the memory data migration process, the switch 20 itself continues to process server access requests (read or write requests) to the old memory area. Figure 5 illustrates the workflow of switch 20 processing a server access request. As shown in Figure 5 , switch 20 receives an access request from a server, where the access address carried in the access request falls within the address range of the server's corresponding memory region. In response to the access request, switch 20 uses a locally stored address translation table to determine whether the server's corresponding memory region is currently undergoing data migration. If so, switch 20 forwards the access request to its migration engine 22 for processing. If not, switch 20 processes the access request normally (i.e., directly forwards the access request to the memory device associated with the server's corresponding memory region for processing). It should be noted that, in response to a server access request, the switch 20 can search the address translation table for a target entry associated with the server based on the server's physical address. The target entry records a mapping relationship between the server's physical address, the address information of the server's corresponding memory area, and the data migration status. Based on the mapping relationship recorded in the target entry, the data migration status of the server's corresponding memory area can be determined. If the data migration status is "Migrating", the server's corresponding memory area is in the data migration process. If the data migration status is "Not Migrating", the server's corresponding memory area is not in the data migration process. After receiving the access request forwarded by the switch 20, the migration engine 22 processes it using its access request processing module.Specifically, the migration engine 22 also includes an access request processing module 222, also known as a host (e.g., server) request processing program, which is configured to process server access requests where the memory area pointed to by the requested access address within the address range is in the process of data migration. Figure 6 illustrates a flow chart of the access request processing module processing server access requests. As shown in Figure 6, when the access request processing module receives an access request from a server forwarded by the switch 20, it first adapts the access request based on the migration status of the target data page pointed to by the requested access address. For example, if the target data has been migrated, the access request is directed to the new memory area where the migrated target data page is located. If the target data page is currently being migrated, the access request is directed to the new memory area after the migration is complete. If the target data page has not yet been migrated, the access request is directed to the old memory area where the target data page was originally located. It should be noted that the migration status of the target data page can be determined based on the data page migration status information recorded in the page bitmap corresponding to the address range of the access address (i.e., the page bitmap of the old memory area). For example, assuming that the i-th bit in the page bitmap is allocated for the target data page, if the value of the i-th bit is a set value (e.g., 1), then the target data page has completed migration. If the value of the bit immediately preceding the i-th bit (i.e., the i-1th bit) is set to the set value and the value of the i-th bit is 0, then the data page preceding the target data page has completed migration and the current target data page is in the process of being migrated. Otherwise, it indicates that the target data has not yet been migrated. Based on the above description in conjunction with FIG. 5 and FIG. 6 , if the first service is one of the multiple servers and its corresponding memory area is the first memory area, the switch 20 is further configured to: upon receiving an access request from the first server for the first memory area, determine whether the first memory area is in the process of data migration; if so, send the access request to its migration engine so that the migration engine processes the access request using its access request processing module; if not, forward the access request directly to the first memory device to which the first memory area belongs for processing.The access request processing module processes the received access request, including: upon receiving an access request from a first server to a first memory region, determining a target data page for access request, the target data page being one of multiple data pages in the first memory region; determining a migration status of the target data page based on migration status information of the multiple data pages recorded in the page bitmap corresponding to the first memory region; and performing adaptive processing on the access request based on the migration status of the target data page. The processing includes: forwarding the access request to a first memory device to which the first memory region belongs if the migration status of the target data page is not migrated; retaining the access request until the migration of the target data page is complete before forwarding the access request to a second memory device to which the second memory region belongs if the migration status of the target data page is complete; and forwarding the access request to a second memory device to which the second memory region belongs if the migration status of the target data page is complete. In summary, in the technical solution provided by the embodiments of the present disclosure, a switch is communicatively connected to multiple memory devices in a memory pool based on an interconnection protocol, each memory device having multiple memory regions. When a memory error occurs in the first memory region of a memory pool, the switch partitions the data in the first memory region by page and sequentially migrates the resulting data pages to an available second memory region. During the migration process, a page bitmap defined for the first memory region is used to record the migration status of the multiple data pages. This solution enables online data migration in interconnection protocol-based memory data scenarios when errors occur in one or more memory regions of a memory pool, helping to mitigate widespread server failures caused by memory issues. Furthermore, during the migration process, data in the first memory region is migrated page by page at a page-level granularity, enabling continued processing of server access to the first memory region during the migration process. Specifically, upon receiving an access request from the first server to the first memory region, the migration status of the target data page requested for access can be determined based on the migration status of multiple data pages in the first memory region recorded in the page bitmap of the first memory region. Adaptive forwarding processing can then be performed on the first server's access request based on the migration status of the target data page. This solution does not prevent the server from continuing to access a particular memory region during the data migration process, which significantly reduces the impact on server performance. This disclosure also provides several method embodiments applicable to the hardware system architecture provided above.Specifically, Figure 7 illustrates a flow chart of a data migration method provided by the present disclosure. This method is applied to the switch 20 shown in Figure 1 . The switch 20 is communicatively connected to multiple memory devices in a memory pool based on an interconnection protocol (e.g., the CXL protocol), each memory device having multiple memory areas. Furthermore, the switch 20 is also communicatively connected to a manager 40. As shown in Figure 7 , the data migration method includes the following steps:

[0013] S101. In response to a migration request triggered for a first memory area in the memory pool, divide data in the first memory area into pages to obtain multiple data pages.

[0014] S102. Determine a page bitmap for the first memory area, wherein a bit is allocated to each of the plurality of data pages in the page bitmap, and the bit is used to indicate a migration status of the corresponding data page.

[0015] S103: Migrate the multiple data pages sequentially to the second memory area in the memory pool, and use the page bitmap to record the migration status of the multiple data pages during the migration process. In S101 above, the migration request is sent by the manager when it determines that data migration is required in the first memory area. For example, when it determines that a memory error in the first memory area meets preset migration conditions, the manager sends a corresponding migration request to the switch. Therefore, before step S101, the following steps are further included:

[0016] S100: Receive a migration request from a manager. The migration request is sent by the manager to the switch when the manager determines that data migration is required for the first memory region experiencing a memory error, requesting the switch to migrate the data in the first memory region to an available second memory region. The manager communicates with multiple memory devices in a memory pool via Ethernet. The first memory region is one of multiple memory regions of the first memory device, and the first memory device is one of multiple memory devices. The migration request may be sent by the manager when the manager determines, based on memory error information received from the first memory device regarding the first memory region, that the first memory region meets preset migration conditions. For a detailed description of the manager sending the migration request to the switch, please refer to the relevant content in other embodiments of the present disclosure and will not be repeated here. In S101 above, paging technology may be used to partition the data in the first memory region using a specified page size as a unit to obtain multiple data pages of equal size. In one specific implementation, S102, "Determining a page bitmap for the first memory region," may include:

[0017] S1021. Obtaining area information (such as memory size, reliability status, etc.) of the first memory area

[0018] S1022: Determine a bitmap length reflecting the number of bits based on the memory size included in the area information of the first memory area;

[0019] S1023: Generate a page bitmap for the first memory area based on the bitmap length. For the specific implementation of S1021-S1023, please refer to the relevant content in other embodiments of this disclosure. In one specific implementation, the step of "recording the migration status of the multiple data pages using the page bitmap during the migration process" in 103 above may include:

[0020] S1031: When any one of the plurality of data pages has completed migration, set the value of a bit corresponding to the data page in the page bitmap to a set value, where the set value indicates that the migration of the data page has been completed. Furthermore, the method provided in this embodiment further includes:

[0021] S104: upon receiving an access request for the first memory area sent by the first server, determining whether the first memory area is in a data migration process;

[0022] S105. If yes, determine the migration status of the target data page in the first memory area requested for access based on the migration status information of the multiple data pages recorded in the page bitmap; and perform adaptive forwarding processing on the access request based on the migration status of the target data page.

[0023] S106: If not, forward the access request to the first memory device to which the first memory region belongs. In a specific achievable technical solution, the step of "determining whether the first memory region is in the data migration process" in S104 above may include:

[0024] S1041. Search, based on the physical address of the first server, a local address translation table for a first entry related to the first server, where the first entry records a mapping relationship between the physical address of the first server, address information of the first memory region, and data migration status; the address information includes a device identifier and an address offset of the first memory device, where the address offset points to the first memory region;

[0025] S1042: If the data migration status of the first memory area in the first entry is in the migrating state, determine that the first memory area is in the data migration process.

[0026] S1043: If the data migration status of the first memory region in the first entry is "not in progress," then it is determined that the first memory logical region is not in the data migration process. In S105 above, when the first memory region is in the data migration process, the switch 20 sends the received access request to the access request processing module in its migration engine for processing. That is, step S106 is performed by the access request processing module in the switch. The target data page is one of multiple data pages in the first memory region, which can be determined by the access request processing module based on the access address carried in the access request. The access address falls within the address range of the first memory region. Furthermore, in an achievable technical solution, the step of "performing adaptive forwarding processing on the access request based on the migration status of the target data page" in S105 includes: if the migration status of the target data page is "not migrated," forwarding the access request to the first memory device; if the migration status of the target data page is "migrating," retaining the access request and forwarding it to the second memory device belonging to the second memory region after the migration of the target data page is complete; and if the migration status of the target data page is "migrated," forwarding the access request to the second memory device. For detailed descriptions of the implementation of each of the above steps in this embodiment, please refer to the relevant content of other embodiments. Furthermore, in addition to the above steps, the method provided in the embodiments of the present disclosure may also include other steps. For details on these other steps and their specific implementation, please refer to the relevant content of other embodiments and will not be further described here. Figure 8 shows a flow diagram of another data migration method provided in the present disclosure, which is applied to the manager 40 shown in Figure 1, which is in communication with the switch 20. As shown in FIG7 , the data migration method includes the following steps:

[0027] S201. Receive memory error information sent by a first memory device; wherein the first memory device is one of multiple memory devices in a memory pool, and each of the multiple memory devices has multiple memory areas;

[0028] S202: When it is determined, based on the memory error information, that data migration needs to be performed on the first memory area in the first memory device, select an adaptive and available second memory area from the memory pool;

[0029] S203. Send a migration request to the switch to request the switch to migrate data in the first memory area to the second memory area.

[0030] S204: Upon receiving a migration completion response from the switch, mark the first memory region as unreliable; wherein the switch is communicatively connected to the multiple memory devices based on an interconnection protocol; and after partitioning the data in the first memory region into multiple data pages, the switch sequentially migrates the multiple data pages to the second memory region, and during the migration process, records the migration status of the multiple data pages using a page bitmap corresponding to the first memory region. For detailed implementation descriptions of the above steps in this embodiment, please refer to the relevant content of other embodiments. Furthermore, in addition to the above steps, the method provided in the embodiments of the present disclosure may also include other steps. For details on the other steps and their specific implementation descriptions, please refer to the relevant content of other embodiments and will not be repeated here. Figure 9 shows a schematic flow diagram of an access processing method provided in the present disclosure, which is applied to the switch 20 shown in Figure 1, more specifically, the access request processing module in the switch 20. The switch 20 is communicatively connected to multiple servers 10 based on an interconnection protocol (such as the CXL protocol). As shown in Figure 9, the access processing method includes the following steps:

[0031] S301. When receiving a request from a first server to access the first memory area during data migration (e.g., migration to an available second memory area) in a first memory area where a memory error occurs, determining a target data page for the access request; the target data page is one of multiple data pages in the first memory area.

[0032] S302. Obtain a page bitmap corresponding to the first memory area; wherein the page bitmap records migration status information of the multiple data pages;

[0033] S303. Determine the migration status of the target data page according to the migration status information recorded in the page bitmap.

[0034] S304. Perform adaptive forwarding processing on the access request based on the migration status of the target data page. The first memory area and the second memory area are memory areas in a memory pool. The memory pool includes multiple memory devices, each of which has multiple memory areas. The switch is communicatively connected to the multiple memory devices based on an interconnection protocol. For detailed descriptions of the above steps in this embodiment, please refer to the relevant content in other embodiments. Furthermore, in addition to the above steps, the method provided in this embodiment may also include other steps. For detailed descriptions of these other steps and their specific implementation, please refer to the relevant content in other embodiments and will not be further described here. Figure 10 shows a schematic structural diagram of an electronic device provided in this embodiment. As shown in Figure 10, the electronic device includes a memory 41 and a processor 42. The memory 41 can be implemented by any type of volatile or non-volatile memory device, or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk, or optical disk. Specifically, the memory 41 is used to store programs; the processor 42, coupled to the memory 41, is used to execute the programs stored in the memory to perform the steps or functions of the various methods provided in the various embodiments of the present disclosure. Furthermore, as shown in FIG10 , the electronic device also includes other components, such as a communication component 43, a power supply component 44, and an audio component 45. FIG10 schematically illustrates only some components and does not imply that the electronic device includes only the components shown in FIG10 . The electronic device is a switch 20 based on the interconnection protocol, as shown in FIG1 , or a manager 40 connected to the switch. When the electronic device is a switch, the electronic device further includes a migration engine. The processor and the migration engine collaborate to implement the steps of the data migration method provided in conjunction with FIG. 7 , or to implement the steps of the access processing method provided in conjunction with FIG. 9 For details on the specific structure of the migration engine, please refer to the relevant content in other embodiments of this disclosure. When the electronic device is a manager, the migration engine is used to implement the steps of the data migration method provided in conjunction with FIG. Based on the above, this disclosure further provides a switch that is communicatively connected to multiple memory devices in a memory pool based on an interconnection protocol, each memory device having multiple memory areas. As shown in conjunction with FIG. 1 and FIG. 10 , in one embodiment, the switch 20 includes a migration engine 22.The migration engine includes: a migration request queue 221 and a replication engine 223. The migration request queue 221 is configured to store migration requests received by the migration engine and sent by the manager, wherein the migration request is configured to request that data in a first memory area in a memory pool experiencing a memory error be migrated to an available second memory area. The replication engine 223, in response to the migration request, partitions the data in the first memory area by page to obtain multiple data pages. The replication engine 223 determines a page bitmap for the first memory area, wherein the page bitmap allocates a bit to each of the multiple data pages, the bit being configured to record the migration status of the corresponding data page. The replication engine 223 sequentially migrates the multiple data pages to the second memory area, and uses the page bitmap to record the migration status of the multiple data pages during the migration process. Furthermore, when determining a page bitmap for the first memory area, the replication engine 223 is configured to: determine a bitmap length reflecting the number of bits based on the memory size of the first memory area; and generate a page bitmap for the first memory area based on the bitmap length. Furthermore, the migration engine further includes: a bitmap module 224 having a page bitmap; and the replication engine 223, when generating a page bitmap for the first memory area based on the bitmap length, is specifically configured to: reset the page bitmap in the bitmap module based on the bitmap length to obtain the reset page bitmap; the reset page bitmap is the page bitmap generated for the first memory area. Furthermore, when using the page bitmap to record the migration status of the multiple data pages during the migration process, the replication engine 223 is specifically configured to: upon completion of migration of any one of the multiple data pages, set the value of the bit in the page bitmap corresponding to the data page to a set value, wherein the set value indicates that the migration of the data page has been completed. Furthermore, the switch further includes: a processor; and the migration engine further includes an access request processing module 222. The processor includes a determination module and a sending module. The determination module is configured to: upon receiving an access request sent by the first server to the first memory area, determine whether the first memory area is in a data migration process; and the sending module is configured to, if the first memory area is in a data migration process, send the access request to the access request processing module 222 in the migration process; if the first memory area is not in a data migration process, forward the access request to the first memory device to which the first memory area belongs.Furthermore, the access request processing module 222 is configured to, in response to the received access request, determine the migration status of a target data page in the first memory region requested for access based on the migration status information of the multiple data pages recorded in the page bitmap; and perform adaptive forwarding processing on the access request based on the migration status of the target data page. Furthermore, when the determination module is configured to determine whether the first memory region is in the data migration process, it is specifically configured to: search a local address translation table for a first entry related to the first server based on the physical address of the first server; the first entry records a mapping relationship between the physical address of the first server, address information of the first memory region, and the data migration status; the address information includes a device identifier and an address offset of the first memory device, and the address offset points to the first memory region; if the data migration status of the first memory region in the first entry is "migrating", then the first memory region is determined to be in the data migration process. If the data migration status of the first memory region in the first entry is "not migrating", then the first memory logical region is determined to be not in the data migration process. Furthermore, when configured to perform adaptive forwarding processing on the access request based on the migration status of the target data page, the access request processing module 222 is configured to: forward the access request to the first memory device if the migration status of the target data page is not migrated; retain the access request and forward it to the second memory device to which the second memory region belongs after the migration of the target data page is completed; and forward the access request to the second memory device if the migration status of the target data page is migration completed. For a detailed description of the implementation of the functions of each module in the switch provided in this embodiment, please refer to the relevant content of the hardware system embodiment provided in conjunction with FIG. 1 or the relevant content of the method embodiment provided in conjunction with FIG. 7 . In another embodiment, the switch includes a migration engine, which includes a replication engine 223 and the access request processing module 222. The replication engine 223 is configured to migrate data in the first memory region where a memory error has occurred.The access request processing module 222 is configured to: when receiving an access request from a first server to a first memory region during data migration by the replication engine 223 for the first memory region experiencing a memory error, determine a target data page for the access request; the target data page is one of multiple data pages in the first memory region; obtain a page bitmap corresponding to the first memory region; wherein the page bitmap records migration status information for the multiple data pages; determine the migration status of the target data page based on the migration status information recorded in the page bitmap; and perform adaptive forwarding processing on the access request based on the migration status of the target data page. The first memory region is a memory region in a memory pool; the memory pool includes multiple memory devices, each of which has multiple memory regions; and the switch is communicatively connected to the multiple memory devices based on an interconnection protocol. For a detailed description of the implementation of the functions of each module in the switch provided in this embodiment, please refer to the relevant content of the hardware system embodiment provided in conjunction with FIG. 1 or the relevant content of the method embodiment provided in conjunction with FIG. 7 of this disclosure. In addition, in addition to the modules given above, the switch may also include other modules. For the specific implementation of the other modules and corresponding functions, please refer to the relevant content in other embodiments of the present disclosure and will not be described in detail here. The present disclosure also provides a manager, wherein the manager is equipped with a data migration device, the data migration device comprising: a receiving module, a selecting module, a sending module, and a marking module; wherein the receiving module is configured to receive memory error information sent by a first memory device; wherein the first memory device is one of multiple memory devices in a memory pool, each of the multiple memory devices having multiple memory areas; wherein the selecting module is configured to, upon determining, based on the memory error information, that data migration is required for a first memory area in the first memory device, select an available second memory area from the memory pool; wherein the sending module is configured to send a migration request to a switch, requesting the switch to migrate data in the first memory area to the second memory area; wherein the marking module is configured to mark the first memory area as unreliable upon receiving a migration completion response from the switch; wherein the switch is communicatively connected to the multiple memory devices based on an interconnection protocol; and wherein the switch divides the data in the first memory area into multiple data pages by page, migrates the multiple data pages sequentially to the second memory area, and records the migration status of the multiple data pages using a page bitmap corresponding to the first memory area during the migration process.For detailed descriptions of the implementation of the functions of each module in the data migration device provided in this embodiment, please refer to the relevant content in other embodiments of this disclosure. Embodiments of this disclosure also provide a computer-readable storage medium storing a computer program. When executed by a computer, the computer program can implement the method steps provided in the above embodiments. Embodiments of this disclosure also provide a computer program product, including the computer program. When executed by a processor, the computer program causes the processor to implement the method steps or functions provided in the above embodiments. From the description of the above embodiments, those skilled in the art will clearly understand that each embodiment can be implemented using software plus a necessary general-purpose hardware platform, or of course, hardware. Based on this understanding, the essence of the above technical solution, or the portion that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a magnetic disk, or an optical disk, and includes instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or certain portions of the embodiments. Finally, it should be noted that the above embodiments are merely illustrative of the technical solutions of the present disclosure and are not intended to limit the present disclosure. Although the present disclosure has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they may modify the technical solutions described in the aforementioned embodiments or replace some of the technical features therein with equivalents. However, such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present disclosure.

Claims

Claims 1. A data migration method, applied to a switch, wherein the switch is communicatively connected to a plurality of memory devices in a memory pool based on an interconnection protocol, and one of the memory devices has a plurality of memory areas; the method comprising: In response to a migration request triggered for a first memory area in the memory pool, dividing data in the first memory area into pages to obtain a plurality of data pages; A page bitmap is determined for the first memory area, wherein the page bitmap allocates a bit to each of the multiple data pages, and the bit is used to record a migration status of the corresponding data page; the multiple data pages are sequentially migrated to a second memory area in the memory pool, and the migration status of the multiple data pages is recorded using the page bitmap during the migration process.

2. The method according to claim 1, wherein: Determining a page bitmap for the first memory area includes: determining a bitmap length reflecting the number of bits according to a memory size of the first memory area; and generating the page bitmap for the first memory area according to the bitmap length.

3. The method according to claim 1, wherein: Recording the migration status of the multiple data pages using the page bitmap during the migration process includes: when any one of the multiple data pages completes migration, setting the value of a bit corresponding to the any one of the multiple data pages in the page bitmap to a set value, wherein the set value indicates that the migration of the any one of the data pages has been completed.

4. The method according to any one of claims 1 to 3, wherein: Also includes: Upon receiving an access request for the first memory area sent by the first server, determining whether the first memory area is in a data migration process; If so, determining the migration status of the target data page in the first memory area requested to be accessed according to the migration status information of the multiple data pages recorded in the page bitmap; and performing adaptive forwarding processing on the access request according to the migration status of the target data page; If not, forward the access request to the first memory device to which the first memory area belongs.

5. The method according to claim 4, wherein: Determining whether the first memory area is in a data migration process includes: According to the physical address of the first server, a first entry related to the first server is searched in a local address translation table; the first entry records a mapping relationship between the physical address of the first server, address information of the first memory area, and a data migration status, the address information including a device identifier and an address offset of the first memory device, and the address offset pointing to the first memory area; if the data migration status of the first memory area in the first entry is "migrating", it is determined that the first memory area is in a data migration process; if the data migration status of the first memory area in the first entry is "not migrating", it is determined that the first memory logical area is not in a data migration process.

6. The method according to claim 4, wherein: According to the migration status of the target data page, adaptive forwarding processing is performed on the access request, including: if the migration status of the target data page is not migrated, forwarding the access request to the first memory device; if the migration status of the target data page is migrating, retaining the access request and forwarding the access request to the second memory device belonging to the second memory area after the migration of the target data page is completed; if the migration status of the target data page is completed migration, forwarding the access request to the second memory device.

7. The method according to any one of claims 1 to 3, wherein: Also includes: Receive the migration request sent by the manager; wherein the migration request is sent by the manager to the switch when determining that data migration is required for the first memory area where a memory error occurs, to request the switch to migrate data in the first memory area to the available second memory area.

8. A data migration method, applied to a manager, comprising: Receiving memory error information sent by a first memory device; wherein the first memory device is one of multiple memory devices in a memory pool, and each of the multiple memory devices has multiple memory areas; when determining, based on the memory error information, that data migration is required for a first memory area in the first memory device, selecting an available second memory area from the memory pool; sending a migration request to a switch to request the switch to migrate the data in the first memory area to the second memory area; Upon receiving a migration completion response fed back by the switch, marking the first memory area as unreliable; wherein the switch is communicatively connected to the multiple memory devices based on an interconnection protocol; and the switch divides the data in the first memory area into multiple data pages by page, migrates the multiple data pages sequentially to the second memory area, and records the migration status of the multiple data pages using a page bitmap corresponding to the first memory area during the migration process.

9. An access processing method, applied to a switch, comprising: When migrating data in a first memory area where a memory error occurs, upon receiving an access request from a first server to the first memory area, determining a target data page requested to be accessed; the target data page is one of multiple data pages in the first memory area; obtaining a page bitmap corresponding to the first memory area; wherein the page bitmap records migration status information of the multiple data pages; determining the migration status of the target data page based on the migration status information recorded in the page bitmap; and performing adaptive forwarding processing on the access request based on the migration status of the target data page; wherein the first memory area is a memory area in a memory pool, the memory pool includes multiple memory devices, and each memory device has multiple memory areas; and the switch is communicatively connected to the multiple memory devices based on an interconnection protocol.

10. A data migration system, comprising: A memory pool, which contains multiple memory devices, each of which has multiple memory areas; The first memory device is one of the plurality of memory devices; a manager, configured to receive memory error information sent by the first memory device, and select an available second memory area from the memory pool when determining, based on the memory error information, that data migration needs to be performed on the first memory area in the first memory device; sending a migration request to a switch to request the switch to migrate data in the first memory area to an available second memory area; the switch, connected to the manager and further communicating with each memory device in the memory pool based on an interconnection protocol, configured to: in response to the migration request, partition the data in the first memory area into pages to obtain a plurality of data pages; and determine a page bitmap for the first memory area, wherein the page bitmap assigns a bit to each of the plurality of data pages, the bit being used to record a migration status of the corresponding data page; The plurality of data pages are sequentially migrated to the second memory area, and during the migration process, the migration status of the plurality of data pages is recorded using the page bitmap.

11. The system according to claim 10, wherein: The system further includes: a plurality of servers, the plurality of servers communicating with the manager and also being communicatively connected to the switch based on an interconnection protocol; a first server being one of the plurality of servers; and the manager being further configured to respond to a memory application request from the first server, select an adapted target memory area from all memory areas in the memory pool based on area information of the memory areas and allocate the area to the first server; and send a response message containing a memory area allocation result to the first server, so that the first server can access the corresponding target memory area in the memory pool according to the response message.

12. The system according to claim 11, wherein: The target memory area is the first memory area; the switch is further configured to: during the data migration process in the first memory area, if an access request to the first memory area from the first server is received, determine a target data page requested to be accessed, the target data page being one of the multiple data pages; and determine a migration status of the target data page based on migration status information of the multiple data pages recorded in the page bitmap corresponding to the first memory area; According to the migration status of the target data page, adaptive forwarding processing is performed on the access request.

13. An electronic device, comprising: A memory and a processor; wherein the memory is used to store programs; the processor is coupled to the memory and is used to execute the programs stored in the memory, so as to implement the steps of the data migration method described in any one of claims 1 to 7 or claim 8, or to implement the steps of the access processing method described in claim 9; wherein the electronic device is a switch based on an interconnection protocol or a manager connected to the switch; when the electronic device is the switch, it further includes a migration engine, and the processor and the migration engine cooperate to implement the steps of the data migration method described in any one of claims 1 to 7, or to implement the steps of the access processing method described in claim 9; when the electronic device is the manager, it is used to implement the steps of the data migration method described in claim 8.

14. A computer-readable storage medium storing a computer program; when executed by a computer, the computer program can implement the steps of the data migration method according to any one of claims 1 to 7 or claim 8, or the steps of the access processing method according to claim 9.

15. A computer program product, comprising a computer program, which, when executed by a processor, enables the processor to implement the data migration method according to any one of claims 1 to 7 or claim 8. The steps in the method, or the steps used to implement the access processing method described in claim 9 above.

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