Evaluation system, semiconductor chip, control method, and program

Abstract

Provided is an evaluation system comprising: a first reception coil disposed in a first region and having a first self-inductance; a second reception coil disposed in the first region and having a second self-inductance different from the first self-inductance; and one or more processors. The one or more processors acquire a first evaluation value representing the quality of a first wireless signal received via a first inductive coupling between the first reception coil and a first transmission coil that is disposed in a second region different from the first region, and further acquire a second evaluation value representing the quality of a second wireless signal received via a second inductive coupling between the second reception coil and a second transmission coil that is disposed in the second region and is the same as or different from the first transmission coil.

Description

Evaluation system, semiconductor chip, control method, and program

[0001] The present invention relates to an evaluation system, a semiconductor chip, a control method, and a program.

[0002] A technology is known that detects changes in the relative positions of multiple semiconductor chips by performing wireless communication using coils between the semiconductor chips (Patent Document 1). By using the technology of Patent Document 1, it is possible to detect changes in the relative positions between two areas in which coils are arranged, such as two areas corresponding to two semiconductor chips.

[0003] International Publication No. 2024 / 053438

[0004] It would be beneficial to be able to make a more detailed determination of the positional relationship between two regions when the positional relationship between the two regions can change.

[0005] The present invention has been made in view of the above circumstances, and provides a technique for supporting more detailed determination of the positional relationship between two regions.

[0006] In order to solve the above problem, the present invention provides an evaluation system comprising: a first receiving coil arranged in a first area and having a first self-inductance; a second receiving coil arranged in the first area and having a second self-inductance different from the first self-inductance; and one or more processors, wherein the one or more processors obtain a first evaluation value representing the quality of a first wireless signal received via a first inductive coupling between a first transmitting coil arranged in a second area different from the first area and the first receiving coil; and obtain a second evaluation value representing the quality of a second wireless signal received via a second inductive coupling between a second transmitting coil arranged in the second area and the second receiving coil, the second transmitting coil being the same as or different from the first transmitting coil.

[0007] According to the present invention, it is possible to assist in making a more detailed determination regarding the positional relationship between two regions.

[0008] Other features and advantages of the present invention will become more apparent from the accompanying drawings and the following detailed description of the preferred embodiment of the present invention.

[0009] The accompanying drawings are incorporated into and constitute a part of the specification, illustrate embodiments of the present invention, and are used, together with the description thereof, to explain the principles of the present invention. A conceptual diagram of a communication system composed of multiple communication devices. A diagram showing another configuration example of a semiconductor chip 1. A diagram explaining coupling between a transmitting coil 30 and a receiving coil 40 using an equivalent circuit. A conceptual diagram of a bias voltage in a receiving coil 40. A diagram explaining wireless communication utilizing inductive coupling between coils. A diagram explaining wireless communication utilizing inductive coupling between coils. A diagram explaining wireless communication utilizing inductive coupling between coils. A diagram explaining wireless communication utilizing inductive coupling between coils. A diagram explaining wireless communication utilizing inductive coupling between coils. A diagram explaining wireless communication utilizing inductive coupling between coils. A diagram showing an example of a frame format used by the semiconductor chip 1 to transmit and receive data. A diagram showing an example of an evaluation frame format. A diagram showing an example of an evaluation frame format. A flowchart of an evaluation frame transmission process in the sensing process. A flowchart of an evaluation value acquisition process in the sensing process. A flowchart of a positional relationship determination process in the sensing process (when a single coil pair is used). A diagram showing an example of an evaluation system using a single coil pair. 1 is a diagram showing, in graph and table form, an example of the relationship between the distance Dx between semiconductor chips 1a and 1b and the BER. FIG. 2 is a diagram explaining the use of multiple thresholds for one evaluation value. FIG. 3 is a diagram showing an example of an evaluation system using a single coil pair. FIG. 4 is a diagram showing an example of an evaluation system using a single coil pair. Conceptual diagram of a communication system using a semiconductor chip including multiple transmitter coils and multiple receiver coils as a communication device. FIG. 4 is a diagram showing an example of a method for increasing the number of coil turns. FIG. 5 is a diagram showing an example of an evaluation system using multiple coil pairs. FIG. 6 is a diagram showing an example of an evaluation system using multiple coil pairs. Flowchart of a positional relationship determination process of the sensing process (when multiple coil pairs are used). FIG. 6 is a diagram showing an example of an evaluation system using multiple coil pairs. FIG. 7 is a diagram explaining modified examples related to the number and arrangement of coils in a semiconductor chip. FIG. 7 is a diagram showing an example of an evaluation system using multiple coil pairs. FIG. 8 is a diagram showing an example of an evaluation system using multiple coil pairs.A diagram showing an example of an evaluation system using a plurality of coil pairs. A diagram showing an example of an evaluation system using a plurality of coil pairs. A diagram showing an example of an evaluation system using a plurality of coil pairs. A diagram showing an example of an evaluation system using a plurality of coil pairs. A diagram showing an example of an evaluation system using a plurality of coil pairs. A diagram showing an example of a configuration of a measurement object 5 for a pressure detection system. A diagram showing an example of a configuration of a pressure detection system 6. A diagram showing a modified example of the pressure detection system 6.

[0010] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. Note that the following embodiments do not limit the invention according to the claims. Although multiple features are described in the embodiments, not all of these multiple features are necessarily essential to the invention, and multiple features may be combined arbitrarily. Furthermore, in the accompanying drawings, the same reference numerals are used to designate the same or similar components, and redundant explanations will be omitted.

[0011] [First embodiment] <Configuration of communication system> Fig. 1 is a conceptual diagram of a communication system configured with multiple communication devices. In the example of Fig. 1, the communication devices are semiconductor chips. Although Fig. 1 shows two semiconductor chips (semiconductor chips 1a and 1b), the number of semiconductor chips included in the communication system is not particularly limited, and the communication system may include three or more semiconductor chips.

[0012] In the following description, when it is not necessary to strictly distinguish between the individual semiconductor chips, the semiconductor chips included in the communication system will be collectively referred to as "semiconductor chip 1." In this case, the components of the semiconductor chip 1 shown in FIG. 1 will also be collectively referred to by their reference numerals, with the alphabet removed, such as "processor 10." This also applies to FIG. 2, which will be described later.

[0013] The semiconductor chip 1 includes a processor 10, a memory 20 provided within the processor 10, a transmitting coil 30, a receiving coil 40, a transmitting conversion circuit 50, and a receiving conversion circuit 60. The semiconductor chip 1 operates on power supplied from a power supply device (not shown).

[0014] The processor 10 is, for example, a CPU, and performs various processes by executing programs. The memory 20 stores the programs executed by the processor 10 and various information used by the processor.

[0015] In addition to the CPU, the processor 10 may include a logic circuit block configured to perform signal processing for a specific application. In this case, some or all of the processing described below as being performed by the processor 10 may be performed by the logic circuit block.

[0016] The transmitting conversion circuit 50 transmits data output from the processor 10 to the other semiconductor chip 1 through wireless communication that utilizes inductive coupling between the transmitting coil 30 and the receiving coil 40 of the other semiconductor chip 1. The receiving conversion circuit 60 receives data from the other semiconductor chip 1 through wireless communication that utilizes inductive coupling between the receiving coil 40 and the other semiconductor chip 1. Note that terms that may have the same meaning as "inductive coupling" include "near-field inductive coupling," "near-field magnetic coupling," "magnetic field coupling," "electromagnetic induction," and "magnetic field resonance."

[0017] In the example of Figure 1, the semiconductor chip 1 has a separate coil for transmission (transmission coil 30) and a coil for reception (reception coil 40), but as shown in Figure 2, a configuration in which one coil is used for both transmission and reception may be adopted.

[0018] In the communication system shown in Fig. 2, the semiconductor chip 1 includes a coil 35 that is used for both transmission and reception, instead of the transmitter coil 30 and the receiver coil 40. Also, the semiconductor chip 1 includes a converter circuit 55 that combines the functions of the transmitter conversion circuit 50 and the receiver conversion circuit 60, instead of the transmitter conversion circuit 50 and the receiver conversion circuit 60. When the semiconductor chip 1 in Fig. 2 transmits data, the converter circuit 55 and the coil 35 play the same roles as the transmitter conversion circuit 50 and the transmitter coil 30 of the semiconductor chip 1 in Fig. 1. When the semiconductor chip 1 in Fig. 2 receives data, the converter circuit 55 and the coil 35 play the same roles as the receiver conversion circuit 60 and the receiver coil 40 of the semiconductor chip 1 in Fig. 1.

[0019] In the following, unless otherwise specified, the semiconductor chip 1 will be described assuming that it has the configuration shown in Fig. 1. However, the following description also applies to the case where the semiconductor chip 1 has the configuration shown in Fig. 2. In this case, the following description of the transmitting conversion circuit 50 and the transmitting coil 30 corresponds to the description of the conversion circuit 55 and the coil 35 of the transmitting semiconductor chip 1. Furthermore, the following description of the receiving conversion circuit 60 and the receiving coil 40 corresponds to the description of the conversion circuit 55 and the coil 35 of the receiving semiconductor chip 1.

[0020] 3 is a diagram illustrating the coupling between the transmitter coil 30 and the receiver coil 40 using an equivalent circuit. The transmitter coil 30 is represented by an equivalent circuit including an inductor Ltx, two resistors Rtx, and a capacitor Ctx. The receiver coil 40 is represented by an equivalent circuit including an inductor Lrx, two resistors Rrx, and a capacitor Crx.

[0021] In the equivalent circuit of the receiving coil 40, a bias voltage V is applied to the midpoint of the inductor Lrx. B For example, as shown in Figure 4, a bias voltage V is applied to Port 2, which is the midpoint of a two-turn coil. B This is achieved by applying

[0022] The transmitter coil 30 of a specific semiconductor chip 1 couples with the receiver coil 40 of another nearby semiconductor chip 1. In addition, the transmitter coil 30 of a specific semiconductor chip 1 also couples with the receiver coil 40 of the same semiconductor chip 1. Therefore, for example, the transmitter coil 30a of the semiconductor chip 1a shown in Fig. 1 couples with the receiver coil 40b of the semiconductor chip 1b and also with the receiver coil 40a of the semiconductor chip 1a. The coupling between any transmitter coil 30 and receiver coil 40 can be expressed by the equivalent circuit of Fig. 3, but the coupling coefficient changes depending on the positional relationship (distance, angle, etc.) between the transmitter coil 30 and receiver coil 40.

[0023] In addition, when the semiconductor chip 1 has only one coil as shown in Figure 2, no coupling occurs between two coils within the same semiconductor chip, but coupling occurs between the coils of two adjacent semiconductor chips 1, as in the case of Figure 1.

[0024] In the communication system of FIG. 1, semiconductor chip 1a and semiconductor chip 1b are arranged close to each other so that the coils are coupled between semiconductor chip 1a and semiconductor chip 1b.

[0025] The memory 20 of the semiconductor chip 1 pre-stores identification information (ID) of each semiconductor chip 1 included in the communication system and information (coupling relationship information) indicating the coupling relationships between the semiconductor chips 1 in the communication system. Therefore, by referencing the coupling relationship information, the semiconductor chip 1 can identify other semiconductor chips 1 with which it can directly communicate by inductive coupling in the communication system. For example, in the communication system of Figure 1, the semiconductor chip 1a can identify the semiconductor chip 1b as another semiconductor chip 1 with which it can directly communicate with the semiconductor chip 1a by referencing the coupling relationship information stored in the memory 20a.

[0026] <Wireless communication utilizing inductive coupling between coils> Wireless communication utilizing inductive coupling between coils will be described using an example in which semiconductor chip 1a transmits data to semiconductor chip 1b in the communication system of Fig. 1. In this case, the transmitting conversion circuit 50 and the transmitting coil 30 in Fig. 3 correspond to the transmitting conversion circuit 50a and the transmitting coil 30a of semiconductor chip 1a, respectively. Furthermore, the receiving conversion circuit 60 and the receiving coil 40 in Fig. 3 correspond to the receiving conversion circuit 60b and the receiving coil 40b of semiconductor chip 1b, respectively.

[0027] The processor 10a outputs a bit string representing data to be transmitted as a digital signal (pulse string) represented by two voltage values, High and Low, to the transmitting conversion circuit 50a. The transmitting conversion circuit 50a performs waveform conversion processing, including voltage conversion and pulse waveform shaping, on the pulse string output from the processor 10a, to generate Txdata and In the following explanation, is sometimes written as "Txdata (bar)".

[0028] FIG. 5A is a diagram showing an example of Txdata, and FIG. 5B is a diagram showing an example of Txdata (bar). Txdata has the same pulse waveform as the pulse train output from the processor 10a. Txdata (bar) has a pulse waveform in which the High and Low levels of Txdata are inverted. In the following explanation, it is assumed that the High voltage in the pulse train output from the processor 10a and the High voltage in Txdata are both 1.2 V. However, the High voltage in the pulse train output from the processor 10a and the High voltage in Txdata may be different.

[0029] The transmitting-side conversion circuit 50a applies voltages corresponding to Txdata and Txdata (bar) to the transmitting coil 30a. In the example of FIG. 3, the transmitting-side conversion circuit 50a and the transmitting coil 30a are connected so that Txdata is applied to the upper port of the transmitting coil 30a and Txdata (bar) is applied to the lower port. When Txdata is High and Txdata (bar) is Low, the current Itx in the transmitting coil 30a flows from the upper side to the lower side of the inductor Ltx in FIG. 3. This current corresponds to the period in FIG. 5C when the value of Itx is 5.0 mA. On the other hand, when Txdata is Low and Txdata (bar) is High, the current Itx in the transmitting coil 30a flows from the lower side to the upper side of the inductor Ltx in FIG. 3. This current corresponds to the period in FIG. 5C when the value of Itx is −5.0 mA (the period when the polarity is reversed compared to when Txdata is High and Txdata (bar) is Low).

[0030] When the current Itx flows through the transmitter coil 30a, a voltage corresponding to the transition of the current Itx is induced in the receiver coil 40b. The polarity of the induced voltage differs depending on whether the transition of Txdata is from low to high or from high to low.

[0031] 5D and 5E are diagrams showing examples of the waveform of the voltage induced in the receiving coil 40b. Vrx1 shown in FIG. 5D is the voltage observed at the upper port of the receiving coil 40b, and Vrx2 shown in FIG. 5E is the voltage observed at the lower port of the receiving coil 40b. Vrx1 is the voltage induced in the receiving coil 40b by the bias voltage V B Vrx1 fluctuates in the positive direction with respect to the induced voltage corresponding to the rising edges of the waveform of the current Itx in the transmitting coil 30a, and in the negative direction with respect to the induced voltage corresponding to the falling edges of the waveform of the current Itx in the transmitting coil 30a. Vrx2 fluctuates in the opposite direction to Vrx1 according to the rising and falling edges of the waveform of the current Itx in the transmitting coil 30a. The amplitudes of Vrx1 and Vrx2 are proportional to the magnitude of the current Itx and the coupling coefficient between the transmitting coil 30a and the receiving coil 40b.

[0032] The voltages Vrx1 and Vrx2 of the receiving coil 40b are input to a receiving conversion circuit 60b. For example, a hysteresis comparator can be used as the receiving conversion circuit 60b. The receiving conversion circuit 60b generates a pulse train (Rxdata) represented by two values, High and Low, shown in FIG. 5F, based on the voltages Vrx1 and Vrx2. The pulse train generated by the receiving conversion circuit 60b has a waveform corresponding to the pulse train output by the processor 10a. The receiving conversion circuit 60b inputs the generated pulse train to the processor 10b. In this way, the processor 10b can obtain a pulse train (Rxdata) corresponding to the pulse train (transmitted signal) output by the processor 10a as a received signal received via the receiving conversion circuit 60b.

[0033] The processor 10b samples the pulse train input from the receiving conversion circuit 60b at a predetermined sampling frequency, thereby decoding it into a binary signal train (bit train) represented by 1 (High) or 0 (Low). In the example of Figures 5A to 5F, the sampling frequency is 1 GHz (hence, the sampling period is 1 nanosecond (ns)), and the bit train "01101" is obtained.

[0034] In this way, the semiconductor chip 1a and the semiconductor chip 1b can transmit and receive data via wireless communication that utilizes inductive coupling between the coils.

[0035] <Frame Format for Data Transmission and Reception> Frames having a predetermined format can be used for transmitting and receiving data between semiconductor chips 1. Fig. 6 is a diagram showing an example of a frame format used by the semiconductor chip 1 for transmitting and receiving data. In the example of Fig. 6, the frame has a format including a preamble signal, a frame control signal, a frame length signal, a destination ID signal, a source ID signal, a data signal, and a frame check signal.

[0036] The preamble signal is composed of a predetermined signal sequence (for example, a bit sequence of a specific pattern such as "101101") that indicates the presence of a frame. By detecting the presence of the preamble signal, the processor 10 of the semiconductor chip 1 can detect that another semiconductor chip 1 is transmitting a frame.

[0037] The frame control signal is a signal that indicates the type of frame. Frame types include "information frame," "control frame," "management frame," and "evaluation frame." The frame format following the frame control signal varies depending on the frame type. Figure 6 corresponds to the case where the frame type is an information frame.

[0038] The frame length signal is a control signal that includes information about the length of a frame.

[0039] The destination ID signal indicates the identification information (ID) of the frame's destination semiconductor chip 1. For example, the destination ID signal of a frame transmitted from semiconductor chip 1a to semiconductor chip 1b includes a bit string indicating the ID of semiconductor chip 1b.

[0040] The sender ID signal indicates the ID of the semiconductor chip 1 that transmits the frame. For example, the sender ID signal of a frame transmitted from the semiconductor chip 1a to the semiconductor chip 1b includes a bit string that indicates the ID of the semiconductor chip 1a.

[0041] A data signal is a signal that contains the actual data (information) to be transmitted, and may also contain a sequence number that indicates the order of the data signals.

[0042] The frame check signal is a signal used to check whether or not there are any errors in the received frame. For example, a cyclic redundancy check (CRC) code is used as the frame check signal. Upon receiving the frame check signal, the semiconductor chip 1 completes the reception of the frame.

[0043] <Evaluation System and Sensing Process> An evaluation system can be configured using the semiconductor chip 1 to acquire an evaluation value representing the quality of a wireless signal received via inductive coupling (the quality of wireless communication between the receiving semiconductor chip 1 and the transmitting semiconductor chip 1). In the evaluation system, the receiving semiconductor chip 1 can determine the positional relationship between the receiving semiconductor chip 1 and the transmitting semiconductor chip 1 based on the acquired evaluation value. The transmitting semiconductor chip 1 transmits a frame (hereinafter referred to as an "evaluation frame") including a wireless signal used to acquire the evaluation value. Hereinafter, the process in which the transmitting semiconductor chip 1 transmits the evaluation frame (evaluation frame transmission process), the process in which the receiving semiconductor chip 1 acquires the evaluation value (evaluation value acquisition process), and the process in which the receiving semiconductor chip 1 determines the positional relationship (positional relationship determination process) are collectively referred to as sensing processes.

[0044] 7A is a diagram showing an example of the format of an evaluation frame. The evaluation frame is similar to the information frame in FIG. 6, but the frame control signal sets the frame type to "evaluation frame." The evaluation frame also includes an evaluation signal (first signal portion) instead of a data signal.

[0045] The evaluation signal is a signal used by the semiconductor chip 1 to obtain an evaluation value of the wireless signal. For example, a value based on the number of bit errors in the received evaluation signal is obtained as the evaluation value. The evaluation value based on the number of bit errors may be the number of bit errors themselves, or a value calculated based on the number of bit errors, such as a bit error rate (BER) calculated by dividing the number of bit errors by the number of bits in the evaluation signal. Furthermore, a block error rate (BLER), a frame error rate (FER), a packet error rate (PER), and the like can also be used as evaluation values ​​based on the number of bit errors, as long as they are values ​​calculated based on the number of bit errors so as to serve as indicators of the number of bit errors in the evaluation signal. For example, when the evaluation value is the number of bit errors, the fewer the number of bit errors, the better the quality of the wireless signal is considered to be. Furthermore, when the evaluation value is the BER, the smaller the BER, the better the quality of the wireless signal is considered to be.

[0046] A predetermined signal sequence (e.g., a bit sequence of a specific pattern such as "11100111") is set in the evaluation signal. For example, the semiconductor chip 1 can detect the number of bit errors in the evaluation signal by comparing the known evaluation signal with the actually received evaluation signal, and obtain the evaluation value of the wireless signal.

[0047] As described above, the amplitudes of the voltages Vrx1 and Vrx2 input to the receiving conversion circuit 60 are proportional to the magnitude of the current Itx in the transmitting coil 30 and the coupling coefficient between the transmitting coil 30 and the receiving coil 40. When the amplitudes of Vrx1 and Vrx2 are small, the signal is more susceptible to noise and other factors, increasing the probability of bit errors occurring in the received signal. Therefore, the number of bit errors in the evaluation signal varies depending on the coupling coefficient. Furthermore, the coupling coefficient varies depending on the positional relationship (distance, angle, etc.) between the two coils. Consequently, the number of bit errors in the evaluation signal varies depending on the positional relationship (distance, angle, etc.) between the two coils. Therefore, the evaluation value not only represents the quality of the wireless signal but also serves as an index of the positional relationship between the two semiconductor chips 1. For this reason, the semiconductor chip 1 can determine the positional relationship between the two semiconductor chips 1 based on the evaluation value. For example, if the evaluation value exceeds a predetermined threshold, the semiconductor chip 1 can determine that the positional relationship between the two semiconductor chips 1 has deviated from the desired positional relationship.

[0048] The format of the evaluation frame is not limited to the format shown in Fig. 7A and may be, for example, the format shown in Fig. 7B. In this case, the semiconductor chip 1 can detect the number of bit errors in the preamble signal by comparing the known preamble signal with the actually received preamble signal, and obtain an evaluation value for the wireless signal. In the following, unless otherwise specified, the evaluation frame will be described as having the format shown in Fig. 7A.

[0049] In the above description, an evaluation value based on the number of bit errors has been described as an evaluation value representing the quality of a wireless signal. However, in this embodiment, the evaluation value is not limited to an evaluation value based on the number of bit errors. For example, similar to Patent Document 1, the voltage value of the wireless signal may be used as the evaluation value. More specifically, for example, the voltage value of the wireless signal received via inductive coupling (e.g., the amplitude of Vrx1 or Vrx2 shown in FIGS. 5A to 5F) may be used as the evaluation value.

[0050] In the following, the sensing process will be described using as an example a case where the semiconductor chip 1a transmits an evaluation frame to the semiconductor chip 1b in the communication system of FIG.

[0051] 8 is a flowchart of the evaluation frame transmission process of the sensing process. In S801, the processor 10a of the semiconductor chip 1a determines whether the timing to transmit the evaluation frame has arrived. The processor 10a repeats the determination process of S801 until the transmission timing arrives, and when the transmission timing arrives, the process proceeds to S802.

[0052] The transmission timing is set in advance, for example. For example, the transmission timing is set every 0.2 seconds, such as 0.2 seconds, 0.4 seconds, 0.6 seconds, and so on, from the start of the process (evaluation frame transmission process) in Fig. 8. In this case, the processor 10a transmits the evaluation frame every 0.2 seconds.

[0053] In S802, the processor 10a of the semiconductor chip 1a sets a predetermined bit string indicating the presence of a frame in the "preamble signal" of the evaluation frame in order to generate the evaluation frame (see FIG. 7A).

[0054] In S803, the processor 10a sets a bit string representing the "evaluation frame" in the "frame control signal" of the evaluation frame.

[0055] In S804, the processor 10a sets a bit string representing the frame length of the evaluation frame in the "frame length signal" of the evaluation frame.

[0056] In S805, the processor 10a sets a bit string representing the ID of the semiconductor chip 1b, which is the destination of the evaluation frame, in the "destination ID signal" of the evaluation frame.

[0057] In S806, the processor 10a sets a bit string representing the ID of the semiconductor chip 1a in the "source ID signal" of the evaluation frame.

[0058] In S807, the processor 10a sets a predetermined signal sequence (for example, a bit sequence of a specific pattern such as "11100111") in the "evaluation signal" of the evaluation frame.

[0059] In S808, the processor 10a sets a check bit string (for example, a CRC code generated from the bit string that constitutes the frame) in the "frame check signal" of the evaluation frame.

[0060] In S809, the processor 10a transmits an evaluation frame to the semiconductor chip 1b. Specifically, the processor 10a inputs a pulse sequence corresponding to the bit sequence of the evaluation frame to the transmitting conversion circuit 50a, thereby applying Txdata and Txdata (bar) to the transmitting coil 30a. This causes a voltage pattern corresponding to the bit sequence of the evaluation frame to be applied (input) to the transmitting coil 30a, thereby achieving wireless transmission of the evaluation frame. Thereafter, processing returns to S801, and the processor 10a waits for the timing of transmitting the next evaluation frame.

[0061] Next, the evaluation value acquisition process of the sensing process will be described with reference to FIG. 9 . In S901, the processor 10b of the semiconductor chip 1b determines whether a known preamble signal has been detected (i.e., whether the adjacent semiconductor chip 1a is transmitting a frame). Specifically, the processor 10b compares the bit string obtained by decoding the pulse string (Rxdata) supplied from the receiving conversion circuit 60b at a predetermined sampling frequency with the known preamble signal, and if the two match, determines that the known preamble signal has been detected. The processor 10b repeats the process of S901 until the preamble signal is detected. When the preamble signal is detected, the process proceeds to S902.

[0062] In S902, the processor 10b decodes the frame control signal following the preamble signal and determines whether the frame type is an evaluation frame. If the frame type is an evaluation frame, the process proceeds to S904; if not, the process proceeds to S903.

[0063] In S903, the processor 10b performs processing according to the type of the frame, and then the process returns to S901.

[0064] In S904, the processor 10b decodes the frame length signal and confirms the length of the frame.

[0065] In S905, the processor 10b decodes the destination ID signal and determines whether the frame is addressed to itself (whether the destination ID is the ID of the semiconductor chip 1b). If the frame is addressed to itself, the process proceeds to S906; if not, the process returns to S901.

[0066] In S906, the processor 10b decodes the sender ID signal and acquires the ID of the frame sender semiconductor chip 1. If the frame sender is the semiconductor chip 1a, the ID of the semiconductor chip 1a is acquired.

[0067] In S907, the processor 10b decodes the evaluation signal and obtains the decoded evaluation signal (received bit string).

[0068] In S908, the processor 10b acquires an evaluation value of the wireless signal based on the decoded evaluation signal. Specifically, the processor 10b compares the decoded evaluation signal (the received bit sequence) with a known evaluation signal (a known correct bit sequence) to detect (count) the number of bit errors in the evaluation signal and acquire an evaluation value based on the number of bit errors. In the following description, the evaluation value based on the number of bit errors is assumed to be a BER as an example. The processor 10b records the acquired evaluation value in the memory 20b. At that time, the processor 10b associates the reception time of the evaluation frame from which the evaluation value was acquired and the source ID of the evaluation frame with the evaluation value and records them. This allows information indicating time-series changes in the evaluation value corresponding to a specific source to be stored in the memory 20b.

[0069] In S909, the processor 10b decodes the frame check signal and determines whether the evaluation frame was received without error. Furthermore, the processor 10b may transmit an Acknowledgement (ACK) signal (if the frame check is OK) or a Negative ACK (NACK) signal (if the frame check is NG) to the semiconductor chip 1b depending on the determination result (frame check result). Then, the process returns to S901.

[0070] When the evaluation frame has the format shown in FIG. 7B , the processor 10a of the semiconductor chip 1a notifies the semiconductor chip 1b in advance of the transmission timing of the evaluation frame, for example, using an information frame. The processor 10b of the semiconductor chip 1b decodes the wireless signal transmitted at the known transmission timing, assuming that the wireless signal includes a preamble signal. The processor 10b then compares the decoded wireless signal with the known preamble signal to obtain an evaluation value of the wireless signal. This allows the processor 10b to obtain an evaluation value based on the preamble signal with the bit error, even if a bit error occurs in the preamble signal (i.e., the preamble signal is not detected correctly).

[0071] Next, the positional relationship determination process of the sensing process will be described with reference to Fig. 10. The positional relationship determination process of Fig. 10 is executed in parallel with the evaluation value acquisition process of Fig. 9. Therefore, evaluation values ​​are repeatedly acquired in parallel with the positional relationship determination process.

[0072] In S1001, the processor 10b of the semiconductor chip 1b determines whether a new evaluation value has been acquired by the evaluation value acquisition process. The processor 10b repeats the process of S1001 until a new evaluation value is acquired. When a new evaluation value is acquired, the process proceeds to S1002.

[0073] In S1002, the processor 10b determines the positional relationship based on the newly acquired evaluation value. For example, if the evaluation value (e.g., BER) exceeds a predetermined threshold (e.g., 0.1), the semiconductor chip 1b can determine that the positional relationship between the semiconductor chip 1b and the semiconductor chip 1a has deviated from the original desired positional relationship.

[0074] In S1003, the processor 10b performs processing related to the determination result regarding the positional relationship. The processing here is not particularly limited, but for example, the processor 10b may transmit the determination result to an external management device (not shown). In this case, the external management device can determine whether the positional relationship between the semiconductor chip 1b and the semiconductor chip 1a is the desired positional relationship based on the received determination result, and can issue a warning to the user as necessary. Then, the processing returns to S1001.

[0075] Here, an example of the determination of the positional relationship performed in S1002 will be described with reference to FIGS. 11 to 13. In the evaluation system shown in FIG. 11, semiconductor chips 1a and 1b are arranged on a measurement target 4, spaced a distance Dx apart in the horizontal direction (X-axis direction). In FIG. 11, some components of each semiconductor chip 1 (such as the processor 10) are not shown. Furthermore, each coil is shown schematically as a square, and the contact points between each coil and the transmitting conversion circuit 50 or the receiving conversion circuit 60 are not shown. This type of schematic illustration may be used as appropriate in any diagram including semiconductor chips, not just in FIG. 11.

[0076] The measurement target 4 is a material that expands and contracts in the X-axis direction, such as an iron rail or a steel frame. In this case, when the measurement target 4 expands and contracts in the X-axis direction due to factors such as temperature changes, the distance Dx changes accordingly. As described above, when the distance Dx changes, the coupling coefficient between the semiconductor chip 1a and the semiconductor chip 1b changes, and the number of bit errors in the evaluation signal changes. Therefore, the evaluation value based on the number of bit errors (e.g., BER) also changes.

[0077] 12 is a graph and a table showing an example of the relationship between the distance Dx between the semiconductor chips 1a and 1b and the BER. Information showing the relationship between the distance Dx and the BER can be obtained, for example, by conducting an experiment in advance to measure the BER at multiple distances.

[0078] As can be seen from FIG. 12, the BER changes significantly at a distance of around 450 μm. Therefore, the BER (1×10 －４ ) as a threshold value and stored in advance in the memory 20 of each semiconductor chip 1. In this case, in S1002 of FIG. 10, the processor 10b of the semiconductor chip 1b compares the BER (evaluation value) newly acquired by the evaluation value acquisition process (FIG. 9) with the threshold value (1×10 －４ ) it is possible to determine whether the distance Dx is greater than 450 μm. That is, as a determination regarding the positional relationship, it is possible to determine whether the distance Dx is greater than a specific distance (here, 450 μm).

[0079] Also, for example, it is assumed that the originally desirable positional relationship is such that Dx is less than 450 μm. In this case, the processor 10b determines whether the BER (evaluation value) is greater than the threshold value (1×10 －４ ) is exceeded, it can be determined that the positional relationship between the semiconductor chips 1a and 1b has shifted from the original desirable positional relationship.

[0080] 12, the change in distance Dx occurs in response to expansion and contraction of measurement object 4. Therefore, semiconductor chips 1a and 1b can serve as sensors that detect expansion and contraction of measurement object 4.

[0081] In the example of FIG. 12, the number of thresholds for BER is 1, but it may be 2 or more. In other words, the number of thresholds L may be any number as long as it is an integer of 1 or more. FIG. 13 is a diagram showing an example in which four thresholds are set for BER. In this example, the four thresholds are set to four BERs (1×10) corresponding to Dx=Dth1 (440 μm), Dth2 (445 μm), Dth3 (450 μm), and Dth4 (460 μm). －８ , 1 x 10 －５ , 1 x 10－４ , 1 x 10 －３ ) are stored in advance in the memory 20 of each semiconductor chip 1. In this case, the processor 10b can determine the positional relationship more accurately by determining where the BER is located in the five sections defined by the four threshold values.

[0082] 11, the semiconductor chips 1a and 1b are arranged in the X-axis direction on the measurement target 4. However, the sensing process can also be applied to the case where the semiconductor chips 1a and 1b are arranged (stacked) in the vertical direction (Z-axis direction).

[0083] For example, in the evaluation system shown in FIG. 14A, semiconductor chip 1a is placed on measurement target 4a, and semiconductor chip 1b is placed on measurement target 4b. In this example, the distance in the Z-axis direction between measurement targets 4a and 4b changes, and accordingly, the distance Dz in the Z-axis direction between semiconductor chips 1a and 1b changes. In this case, as shown in FIG. 14B, by obtaining information indicating the relationship between the distance Dz in the Z-axis direction and the BER through a prior measurement, a BER threshold value for the distance Dz can be determined and stored in memory 20 of each semiconductor chip 1. This makes it possible to perform a determination regarding the distance Dz as a determination regarding the positional relationship.

[0084] <Evaluation System Using Multiple Coil Pairs> As can be seen from FIGS. 12 and 14A-B, the evaluation value (BER) obtained based on the evaluation frame transmitted from one transmitter coil to one receiver coil changes rapidly near a specific chip-to-chip distance (near Dx = 450 μm in FIG. 12, and near Dz = 1500 μm in FIGS. 14A-B). Therefore, for example, in FIG. 12, it is possible to determine with relatively high accuracy whether two semiconductor chips 1 are separated by more than approximately 450 μm. On the other hand, in a distance range away from the specific chip-to-chip distance, the BER does not change significantly even if the chip-to-chip distance changes. Therefore, in a distance range away from the vicinity of Dx = 450 μm, it is difficult to determine the precise chip-to-chip distance even when multiple thresholds are used, as shown in FIG. 13. This is also true when using evaluation values ​​other than BER (e.g., voltage values).

[0085] Therefore, a configuration that enables more detailed determination of the positional relationship will be described below.

[0086] Fig. 15 is a conceptual diagram of a communication system that uses a semiconductor chip equipped with multiple transmitter coils and multiple receiver coils as a communication device. While Fig. 15 shows two semiconductor chips (semiconductor chips 100a and 100b), the number of semiconductor chips included in the communication system is not particularly limited, and three or more semiconductor chips may be included in the communication system. Furthermore, as in the case of Fig. 1, when it is not necessary to strictly distinguish between the individual semiconductor chips, the semiconductor chips included in the communication system of Fig. 15 are collectively referred to as "semiconductor chip 100." In this case, the individual components of the semiconductor chip 100 shown in Fig. 15 are also collectively referred to by their reference symbols, with the alphabet removed, such as "processor 110."

[0087] The semiconductor chip 100 includes two transmitter coils (transmit coils 131 and 132) and two receiver coils (receive coils 141 and 142). The semiconductor chip 100 also includes two transmitter conversion circuits (transmit conversion circuits 151 and 152) corresponding to the two transmitter coils, and two receiver conversion circuits (receive conversion circuits 161 and 162) corresponding to the two receiver coils. The configurations of the transmitter conversion circuits 151 and 152 are similar to those of the transmitter conversion circuit 50, and the configurations of the receiver conversion circuits 161 and 162 are similar to those of the receiver conversion circuit 60. The semiconductor chip 100 includes a processor 110 and a memory 120. The configuration of the processor 110 is similar to that of the processor 10, and the configuration of the memory 120 is similar to that of the memory 20. The semiconductor chip 100 operates on power supplied from a power supply device (not shown).

[0088] 15, the semiconductor chip 100 is provided with separate coils for transmission (transmission coils 131 and 132) and reception coils (reception coils 141 and 142). However, similar to the semiconductor chip 1 shown in FIG. 2, the semiconductor chip 100 may be provided with a coil that is used for both transmission and reception. For example, the semiconductor chip 100 may be provided with two coils that are used for both transmission and reception (a coil that serves as both the transmission coil 131 and the reception coil 141, and a coil that serves as both the transmission coil 132 and the reception coil 142).

[0089] 15, the transmitting coil 131 is approximately square (apart from deformation at the connection portion with the transmitting-side conversion circuit 151, the transmitting coil 131 can be said to be square). The transmitting coil 132 is also approximately square. However, the transmitting coils 131 and 132 have different side lengths, and therefore have different self-inductances. Similarly, the receiving coils 141 and 142 are approximately square, but have different side lengths, and therefore have different self-inductances. In this way, the semiconductor chip 100 has two transmitting coils with different self-inductances and two receiving coils with different self-inductances.

[0090] In this embodiment, each coil is not limited to being substantially square, but may be, for example, substantially rectangular or substantially circular.

[0091] Here, a parameter related to the length of one circumference of the coil, which affects the self-inductance of the coil, is referred to as "coil size." For example, for a substantially square coil, the length of one side can be defined as the coil size. Also, for a substantially circular coil, the diameter can be defined as the coil size. Therefore, it can be said that the self-inductance of the transmitter coils 131 and 132 differs due to the difference in coil size.

[0092] In this embodiment, the method of varying the self-inductance is not limited to varying the coil size. For example, instead of (or in addition to) the coil size, the number of turns of the coil may be varied to vary the self-inductance.

[0093] Fig. 16 is a diagram showing an example of a method for increasing the number of turns of a coil. As shown in Fig. 16, a coil having two or more turns can be formed by forming a concentric rectangular coil wiring pattern with different side lengths on a specific layer of a silicon die (the "upper layer" in Fig. 16). In Fig. 16, one of the coil ends is formed on a different layer (the "lower layer" in Fig. 16) so as not to intersect with the coil wiring pattern on the same layer.

[0094] In the communication system of Fig. 15, each coil is coupled to each of the other nearby coils. The coupling between any two coils can be explained by the equivalent circuit of Fig. 3, as in the case of the semiconductor chip 1. The two semiconductor chips 100 can perform wireless communication utilizing inductive coupling between the coils, as in the case of the two semiconductor chips 1 in Fig. 1.

[0095] The semiconductor chip 100 can also perform sensing processing. The sensing processing performed by the semiconductor chip 100 will be described below using the evaluation system shown in FIG.

[0096] In the evaluation system of Fig. 17A, the semiconductor chip 100a, which is the sender of the evaluation frame, is placed on the measurement target 4a, and the semiconductor chip 100b is placed on the measurement target 4b. As in the case of Fig. 14A, the distance in the Z-axis direction between the measurement targets 4a and 4b changes, and accordingly, the distance Dz in the Z-axis direction between the semiconductor chips 100a and 100b changes.

[0097] The semiconductor chip 100a performs the evaluation frame transmission process in the same manner as the semiconductor chip 1a. That is, the semiconductor chip 100a performs the same process as the process described as being performed by the semiconductor chip 1a in the flowchart of FIG.

[0098] However, unlike the semiconductor chip 1a, the semiconductor chip 100a includes two transmitting coils (transmitting coils 131a and 132a). Therefore, the semiconductor chip 100a transmits two evaluation frames (an evaluation frame transmitted using the transmitting coil 131a and an evaluation frame transmitted using the transmitting coil 132a). That is, the semiconductor chip 100a performs the process of FIG. 8 (evaluation frame transmission process) corresponding to the transmitting coil 131a and the process of FIG. 8 (evaluation frame transmission process) corresponding to the transmitting coil 132a.

[0099] When two evaluation frames are transmitted simultaneously, induced voltages corresponding to the two evaluation frames are simultaneously generated in the receiving coils 141b and 142b. In other words, a wireless communication collision occurs. Therefore, the semiconductor chip 100a transmits the two evaluation frames at different timings to prevent the occurrence of collisions. For example, the transmitting coil 131a is set to transmit at 0.4-second intervals, such as 0.2 seconds, 0.6 seconds, 1.0 seconds, and so on, from the start of the process (evaluation frame transmission process) shown in FIG. 8 . The transmitting coil 132a is set to transmit at 0.4-second intervals, 0.2 seconds apart from the transmitting coil 131a, such as 0.4 seconds, 0.8 seconds, 1.2 seconds, and so on, from the start of the process (evaluation frame transmission process) shown in FIG. 8 .

[0100] Furthermore, in order to notify the semiconductor chip 100b from which transmitting coil the evaluation frame has been transmitted, in S803 the processor 110a additionally sets a bit string representing the identification information (ID) of the transmitting coil in the "frame control signal" of the evaluation frame. Alternatively, the semiconductor chip 100a may use the ID of the transmitting coil as the transmitter ID. In this case, in S806 the processor 110a sets a bit string representing the ID of the transmitting coil in the "transmitter ID signal" of the evaluation frame. By referencing the transmitter coil ID included in the received evaluation frame, the semiconductor chip 100b can identify the transmitting coil (transmitting coil 131a or 132a) that transmitted the evaluation frame.

[0101] Next, the evaluation value acquisition process will be described. The semiconductor chip 100b can perform the evaluation value acquisition process in the same way as the semiconductor chip 1b. That is, the same process as that described as being performed by the semiconductor chip 1b in the flowchart of FIG. 9 is executed by the semiconductor chip 100b.

[0102] 17A , however, two receiver coils (receiver coils 141b and 142b) of the semiconductor chip 100b are coupled to one transmitter coil of the semiconductor chip 100a. Therefore, when an evaluation frame is transmitted via the transmitter coil 131a, a voltage is induced in both the receiver coils 141b and 142b. Therefore, the semiconductor chip 100b performs the process (evaluation value processing) of FIG. 9 corresponding to the receiver coil 141b and the process (evaluation value acquisition processing) of FIG. 9 corresponding to the receiver coil 142b in parallel. As a result, the semiconductor chip 100b receives the evaluation frame via the receiver coil 141b and the evaluation frame via the receiver coil 142b, and can acquire two evaluation values ​​corresponding to these two evaluation frames. Similarly, when an evaluation frame is transmitted via the transmitting coil 132a, the semiconductor chip 100b receives the evaluation frame via the receiving coil 141b and the evaluation frame via the receiving coil 142b, and obtains two evaluation values ​​corresponding to these two evaluation frames.

[0103] 17A, when one evaluation frame is transmitted, two evaluation values ​​are obtained. Therefore, when one evaluation frame is transmitted each from the transmitting coils 131a and 132a, the semiconductor chip 100b obtains a total of four evaluation values. Specifically, the semiconductor chip 100b obtains an evaluation value corresponding to the evaluation frame received via inductive coupling between the transmitting coil 131a and the receiving coil 141b (hereinafter referred to as "evaluation value 1-1"), an evaluation value corresponding to the evaluation frame received via inductive coupling between the transmitting coil 131a and the receiving coil 142b (hereinafter referred to as "evaluation value 1-2"), an evaluation value corresponding to the evaluation frame received via inductive coupling between the transmitting coil 132a and the receiving coil 141b (hereinafter referred to as "evaluation value 2-1"), and an evaluation value corresponding to the evaluation frame received via inductive coupling between the transmitting coil 132a and the receiving coil 142b (hereinafter referred to as "evaluation value 2-2").

[0104] In this way, the semiconductor chip 100b obtains four evaluation values ​​corresponding to the four coil pairs. Here, "coil pair" refers to a combination of a transmitter coil and a receiver coil that form an inductive coupling used to transmit and receive evaluation frames. Therefore, evaluation value 1-1 corresponds to the coil pair including the transmitter coil 131a and the receiver coil 141b (hereinafter referred to as "coil pair 1-1"); evaluation value 1-2 corresponds to the coil pair including the transmitter coil 131a and the receiver coil 142b (hereinafter referred to as "coil pair 1-2"); evaluation value 2-1 corresponds to the coil pair including the transmitter coil 132a and the receiver coil 141b (hereinafter referred to as "coil pair 2-1"); and evaluation value 2-2 corresponds to the coil pair including the transmitter coil 132a and the receiver coil 142b (hereinafter referred to as "coil pair 2-2").

[0105] As described above, the "frame control signal" or "transmitter ID signal" of the evaluation frame is set with a bit string representing the ID of the transmitting coil. Therefore, the processor 110b can determine which coil pair each evaluation value corresponds to based on the ID of the transmitting coil acquired by the processing of S902 or S906. Note that the semiconductor chip 100a may use an information frame to notify the semiconductor chip 100b in advance of the start timing of the evaluation frame transmission process and the transmission timing of the evaluation frame by each transmitting coil. In this case, even without using the ID of the transmitting coil, the semiconductor chip 100b can determine which transmitting coil transmitted the received evaluation frame and can determine which coil pair each evaluation value corresponds to.

[0106] As mentioned above, the receiver coils 141b and 142b have different self-inductances. Therefore, the evaluation values ​​1-1 and 1-2 corresponding to the coil pair 1-1 and the coil pair 1-2 are not necessarily the same. In particular, with respect to the positional relationship (distance Dz) between the semiconductor chips 100a and 100b, the positional relationship in which the evaluation value 1-1 changes abruptly differs from the positional relationship in which the evaluation value 1-2 changes abruptly. Similarly, the transmitter coils 131a and 132a have different self-inductances, so the positional relationship in which the evaluation value 1-1 changes abruptly differs from the positional relationship in which the evaluation value 2-1 changes abruptly. Furthermore, depending on the arrangement and self-inductance relationship of the four coils (the transmitter coils 131a and 132a, and the receiver coils 141b and 142b), the evaluation values ​​1-1, 1-2, 2-1, and 2-2 change abruptly in different positional relationships.

[0107] 17B is a graph showing an example of the relationship between the distance Dz between the semiconductor chips 100a and 100b and each evaluation value (BER). Information showing the relationship between the distance Dz and each evaluation value (BER) can be obtained, for example, by conducting an experiment in advance to measure BER at a plurality of distances. In this example, evaluation value 1-1 changes rapidly near Dz=870 μm, evaluation value 2-1 changes rapidly near Dz=1090 μm, evaluation value 1-2 changes rapidly near Dz=1260 μm, and evaluation value 2-2 changes rapidly near Dz=1490 μm. Furthermore, when Dz=870 μm, evaluation value 1-1 is 1×10 －４ When Dz=1090 μm, the evaluation value 2-1 is 1×10 －４ When Dz=1260 μm, the evaluation value 1-2 is 1×10 －４ When Dz=1490 μm, the evaluation value 2-2 is 1×10 －４ Therefore, 1 × 10 －４ It is conceivable that these values ​​may be stored in advance in the memory 120 of each semiconductor chip 100 as threshold values ​​for each evaluation value, and used for the positional relationship determination process.

[0108] Fig. 18 is a flowchart of the positional relationship determination process when multiple coil pairs are used. The positional relationship determination process in Fig. 18 is executed in parallel with the evaluation value acquisition process in Fig. 9. Therefore, in parallel with the positional relationship determination process, the acquisition of evaluation values ​​corresponding to each coil pair is repeatedly performed.

[0109] In S1801, the processor 110b of the semiconductor chip 100b determines whether multiple new evaluation values ​​corresponding to multiple coil pairs have been acquired. The "multiple coil pairs" here refer to the four coil pairs between the semiconductor chip 100a and the semiconductor chip 100b described above. Therefore, the "multiple new evaluation values" are the newly acquired evaluation values ​​1-1, 1-2, 2-1, and 2-2. The processor 110b repeats the process of S1801 until multiple new evaluation values ​​have been acquired. When new evaluation values ​​have been acquired, the process proceeds to S1802.

[0110] In S1802, the processor 110b performs a determination regarding the positional relationship based on the newly acquired multiple evaluation values. For example, as described with reference to FIG. －４ is used as the threshold, the processor 110b calculates each evaluation value by the threshold (1×10 －４ 17B), it is possible to determine which of the five ranges (Rng1 to Rng5) shown in FIG. 17B the distance Dz falls within. For example, if the evaluation value 1-1 exceeds the threshold value and the evaluation values ​​2-1, 1-2, and 2-2 do not exceed the threshold value, the processor 110b can determine that the distance Dz falls within the range of Rng2 (approximately 870 μm to approximately 1090 μm).

[0111] In this way, by using multiple evaluation values ​​corresponding to multiple coil pairs, it is possible to make more detailed judgments regarding positional relationships than when using an evaluation value corresponding to a single coil pair (for example, in the case of Figure 12 or Figures 14A-B).

[0112] Note that, in the above description, the determination is made using all four evaluation values ​​corresponding to the four coil pairs between the semiconductor chip 100a and the semiconductor chip 100b. However, the processor 110b does not necessarily need to use all evaluation values. By using at least two evaluation values ​​corresponding to at least two coil pairs, the processor 110b can make a more detailed determination of the positional relationship compared to when using an evaluation value corresponding to a single coil pair (e.g., the case of Figure 12 or Figures 14A-B). Furthermore, for example, when the semiconductor chip 100b first processes evaluation value 1-1 of the four evaluation values, if evaluation value 1-1 does not exceed the threshold, it is highly likely that the remaining three evaluation values ​​also do not exceed the threshold. Therefore, in this case, the semiconductor chip 100b can determine that the distance Dz is within Rng1 (a range smaller than approximately 870 μm) without using the remaining three evaluation values.

[0113] In addition, the explanation here is given assuming that one common threshold is used for the four evaluation values. However, the threshold does not necessarily have to be common to all evaluation values. For example, when an experiment was conducted in advance to measure BER at multiple distances, a BER of 1×10 －５ When the evaluation value 2-1 changes suddenly in the vicinity of the distance corresponding to －５ Alternatively, multiple thresholds may be used for one evaluation value, as in the case of FIG.

[0114] In S1803, the processor 110b performs processing related to the determination result regarding the positional relationship. The processing here is not particularly limited, but for example, the processor 110b may transmit the determination result to an external management device (not shown). In this case, the external management device can determine whether the positional relationship between the semiconductor chip 100b and the semiconductor chip 100a is the desired positional relationship based on the received determination result, and can issue a warning to the user as necessary. Then, processing returns to S1801.

[0115] In the above description, the evaluation frame received by the receiving coil 141b and used to obtain the evaluation value 1-1, and the evaluation frame received by the receiving coil 142b and used to obtain the evaluation value 1-2, correspond to the same evaluation frame transmitted from the transmitting coil 131a. However, the evaluation frame used to obtain the evaluation value 1-1 and the evaluation frame used to obtain the evaluation value 1-2 may correspond to different evaluation frames transmitted from the transmitting coil 131a. In this case, the processor 110a transmits, from the transmitting coil 131a, an evaluation frame for the receiving coil 141b and an evaluation frame for the receiving coil 142b at different transmission timings. The processor 110b obtains the evaluation value 1-1 based on the evaluation frame for the receiving coil 141b transmitted from the transmitting coil 131a, and obtains the evaluation value 1-2 based on the evaluation frame for the receiving coil 142b transmitted from the transmitting coil 131a. When an evaluation frame for the receiving coil 141b is transmitted from the transmitting coil 131a, an induced voltage is also generated in the receiving coil 142b, and therefore the processor 110b can receive an evaluation frame for the receiving coil 141b from the receiving coil 142b as well. However, the processor 110b does not use the evaluation frame for the receiving coil 141b received from the receiving coil 142b to obtain an evaluation value. Similarly, the processor 110b does not use the evaluation frame for the receiving coil 142b received from the receiving coil 141b to obtain an evaluation value.

[0116] Similarly to the above, the evaluation frame used to obtain the evaluation value 2-1 and the evaluation frame used to obtain the evaluation value 2-2 may correspond to different evaluation frames transmitted from the transmitting coil 132a.

[0117] <Modifications> Modification using one transmitter coil In the evaluation system of FIG. 17A, four coil pairs are configured using two transmitter coils and two receiver coils. However, if there are multiple receiver coils, only one transmitter coil may be used. For example, the evaluation system shown in FIG. 19A may be configured by replacing the semiconductor chip 100a with the semiconductor chip 1a in the evaluation system of FIG. 17A. In this case, the semiconductor chip 100b can obtain two evaluation values ​​corresponding to two coil pairs (a coil pair including the transmitter coil 30a and the receiver coil 141b, and a coil pair including the transmitter coil 30a and the receiver coil 142b). Then, the semiconductor chip 100b can determine the positional relationship between the semiconductor chip 1a and the semiconductor chip 100b based on these two evaluation values.

[0118] Variation using one receiver coil: Alternatively, if there are multiple transmitter coils, there may be only one receiver coil. For example, the evaluation system shown in FIG. 19B may be configured by replacing the semiconductor chip 100b with the semiconductor chip 1b in the evaluation system of FIG. 17A. In this case, the semiconductor chip 1b can obtain two evaluation values ​​corresponding to two coil pairs (a coil pair including the transmitter coil 131a and the receiver coil 40b, and a coil pair including the transmitter coil 132a and the receiver coil 40b). Then, the semiconductor chip 1b can determine the positional relationship between the semiconductor chip 100a and the semiconductor chip 1b based on these two evaluation values.

[0119] In the evaluation system shown in Fig. 19B, the processor 10b of the semiconductor chip 1b has the same functions as the processor 110b of the semiconductor chip 100b described above. Therefore, for example, the processor 10b performs the positional relationship determination process according to the flowchart of Fig. 18. Furthermore, not limited to the evaluation system of Fig. 19B, when the processor 10 of the semiconductor chip 1 performs the positional relationship determination process in an evaluation system in which multiple evaluation values ​​corresponding to multiple coil pairs are obtained, the processor 10 has the same functions as the processor 110 and performs the positional relationship determination process according to the flowchart of Fig. 18.

[0120] 15 includes two transmitter coils and two receiver coils. The two transmitter coils and two receiver coils of the semiconductor chip 100 are arranged so that their central axes coincide. However, a semiconductor chip including three or more transmitter coils and three or more receiver coils may be used, and the central axes of the coils may be different.

[0121] For example, the semiconductor chip 101 shown in FIG. 20 includes four transmitter coils and four receiver coils. The transmitter coils have different central axes, and the receiver coils have different central axes. Although not shown, the semiconductor chip 101, like the semiconductor chip 100, includes a processor 110, a memory 120, and a required number of transmitter conversion circuits and receiver conversion circuits. This also applies to various semiconductor chips (e.g., semiconductor chips 102a and 102b in FIG. 21) described later. For example, in the evaluation system of FIG. 17A, one or both of the semiconductor chips 100a and 100b may be replaced with the semiconductor chip 101.

[0122] Modification in which a coil pair with a small coupling coefficient is not used regardless of the positional relationship Consider a case in which semiconductor chips 102a and 102b are arranged as shown in Fig. 21. In Fig. 21, the distance Dx in the X-axis direction changes, as in Fig. 11.

[0123] Even when the distance Dx is relatively small, the transmitting coil 131a and the receiving coil 142b are relatively far apart, and therefore the coupling coefficient between the transmitting coil 131a and the receiving coil 142b is relatively small. Therefore, the evaluation value 1-2 corresponding to the coil pair including the transmitting coil 131a and the receiving coil 142b (i.e., coil pair 1-2) is relatively large regardless of the distance Dx, and does not undergo abrupt changes. Therefore, the evaluation value 1-2 is not very useful in determining the positional relationship. For the same reason, the evaluation value 2-1 corresponding to the coil pair including the transmitting coil 132a and the receiving coil 141b (i.e., coil pair 2-1) is not very useful in determining the positional relationship.

[0124] Therefore, the semiconductor chip 102b makes a determination regarding the positional relationship based on the evaluation values ​​1-1 and 2-2, without using the evaluation values ​​1-2 and 2-1. In this case, the semiconductor chip 102b does not need to perform evaluation value acquisition processing for the evaluation values ​​1-2 and 2-1.

[0125] Even in this case, if evaluation frames are transmitted from the transmitting coils 131a and 132a at the same time, there is a possibility that a wireless communication collision may occur. Therefore, similar to the case of Fig. 17A, the semiconductor chip 102a transmits the two evaluation frames at different timings.

[0126] Modification in which coils are distributed across multiple semiconductor chips In the evaluation system of Figure 17A, the two transmitter coils used to transmit evaluation frames are arranged on the same semiconductor chip 100a, and the two transmitter coils used to receive evaluation frames are arranged on the same semiconductor chip 100b. However, when multiple transmitter coils are used to transmit evaluation frames, the multiple transmitter coils may be distributed across two or more semiconductor chips. Similarly, when multiple receiver coils are used to transmit evaluation frames, the multiple receiver coils may be distributed across two or more semiconductor chips.

[0127] For example, consider a case where semiconductor chips 100a, 100b, 103, and 104 are arranged as shown in Fig. 22A. As shown in Fig. 22B, semiconductor chip 103 includes one receiving coil 142, and semiconductor chip 104 includes one receiving coil 141.

[0128] In the evaluation system of FIG. 22A , the semiconductor chip 100a transmits evaluation frames using transmitting coils 131a and 132a. The semiconductor chip 100b transmits evaluation frames using transmitting coils 131b and 132b. Therefore, the four transmitting coils used to transmit evaluation frames are distributed across the two semiconductor chips 100a and 100b. Furthermore, the semiconductor chip 103 receives evaluation frames from the semiconductor chip 100a using a receiving coil 142, and the semiconductor chip 104 receives evaluation frames from the semiconductor chip 100b using a receiving coil 141. Therefore, the two receiving coils used to receive evaluation frames are distributed across the two semiconductor chips 103 and 104.

[0129] 21 described above, the evaluation system of Fig. 22A does not use two coil pairs formed by each transmitter coil of the semiconductor chip 100a and the receiver coil 141 of the semiconductor chip 104. Similarly, two coil pairs formed by each transmitter coil of the semiconductor chip 100b and the receiver coil 142 of the semiconductor chip 103 are not used.

[0130] In order to prevent collisions in wireless communications, the semiconductor chips 100 a and 100 b control the four evaluation frames corresponding to the four transmitting coils to be transmitted at different timings. This control includes, for example, the semiconductor chips 100 a and 100 b using information frames to negotiate in advance the transmission timing of each evaluation frame.

[0131] The semiconductor chip 103 acquires two evaluation values ​​corresponding to two coil pairs formed by each transmitter coil of the semiconductor chip 100a and the receiver coil 142. Similarly, the semiconductor chip 104 acquires two evaluation values ​​corresponding to two coil pairs formed by each transmitter coil of the semiconductor chip 100b and the receiver coil 141. The semiconductor chip 103 also transmits the two acquired evaluation values ​​to the semiconductor chip 104 using an information frame. The semiconductor chip 104 determines the positional relationship between the semiconductor chips 100a and 100b and the semiconductor chips 103 and 104 based on four evaluation values ​​including the two evaluation values ​​acquired by the semiconductor chip 103 itself and the two evaluation values ​​received from the semiconductor chip 103.

[0132] Here, the four evaluation values ​​corresponding to the four coil pairs used in Fig. 22A change rapidly at different positional relationships (different distances Dz), as in the case of Fig. 17A. Therefore, for the same reasons as those explained with reference to Fig. 17B, the semiconductor chip 104 can make more detailed determinations regarding positional relationships than when an evaluation value corresponding to a single coil pair is used (for example, in the case of Fig. 12 or Figs. 14A-B).

[0133] The semiconductor chip 104 may transmit the two acquired evaluation values ​​to the semiconductor chip 103 using an information frame. In this case, the semiconductor chip 103 can make a determination regarding the positional relationship based on the four evaluation values.

[0134] Here, the sizes of the multiple semiconductor chips used in the evaluation system may be different. For example, consider a case where the size of one side of semiconductor chips 103 and 104 is half the size of one side of semiconductor chip 100. In this case, for example, semiconductor chips 100, 103, and 104 can be arranged as shown in FIG. 23.

[0135] 23 , the evaluation frame transmitted from the transmitting coil 131 of the semiconductor chip 100 is received by the receiving coil 142 of the semiconductor chip 103 and the receiving coil 141 of the semiconductor chip 104. Similarly, the evaluation frame transmitted from the transmitting coil 132 of the semiconductor chip 100 is received by the receiving coil 142 of the semiconductor chip 103 and the receiving coil 141 of the semiconductor chip 104. Therefore, in this evaluation system as well, four evaluation values ​​corresponding to the four coil pairs are obtained.

[0136] 17A illustrates a configuration in which multiple coils with different self-inductances are used to obtain multiple evaluation values ​​with different characteristics (multiple evaluation values ​​that change rapidly in different positional relationships). However, even when multiple coils with the same self-inductance are used, it is possible to obtain multiple evaluation values ​​that change rapidly in different positional relationships by devising the coil arrangement.

[0137] 24, semiconductor chips 1a to 1c are placed on measurement target 4a, and semiconductor chips 1d to 1f are placed on measurement target 4b. In this example, the distance in the Z-axis direction between measurement targets 4a and 4b changes, and accordingly, the distance Dz in the Z-axis direction between semiconductor chips 1a to 1c and semiconductor chips 1d to 1f changes.

[0138] Semiconductor chips 1a and 1d are arranged to face each other with a distance Ds1 offset in the X-axis direction, semiconductor chips 1b and 1e are arranged to face each other with a distance Ds2 offset in the X-axis direction, and semiconductor chips 1c and 1f are arranged to face each other with a distance Ds3 offset in the X-axis direction. Ds1 is larger than Ds2, and Ds2 is larger than Ds3.

[0139] The semiconductor chips 1a to 1c arranged on the measurement target 4a are the transmitters of the evaluation frame, and the semiconductor chips 1d to 1f arranged on the measurement target 4b are the receivers of the evaluation frame. Therefore, this evaluation system uses three transmitter coils (transmitter coils 30a, 30b, and 30c) and three receiver coils (receive coils 40d, 40e, and 40f). Three evaluation values ​​corresponding to the three coil pairs (the coil pair including the transmitter coil 30a and the receiver coil 40d, the coil pair including the transmitter coil 30b and the receiver coil 40e, and the coil pair including the transmitter coil 30c and the receiver coil 40f) are obtained.

[0140] Note that, for the same reasons as in the case of Fig. 21 described above, no coil pairs other than these three coil pairs are used in the evaluation system of Fig. 24. Also, as in the cases of Figs. 22A and 22B, in order to prevent collisions in wireless communications, the semiconductor chips 1a to 1c control the transmission of three evaluation frames corresponding to the three transmitting coils at different times.

[0141] In FIG. 24 , the three transmitter coils have the same self-inductance. The three receiver coils also have the same self-inductance. However, due to different misalignments (Ds1 to Ds3) of the semiconductor chips 1a to 1c, each transmitter coil also has a different misalignment in the X-axis direction relative to its corresponding receiver coil. Therefore, the three coil pairs have different mutual inductances. As a result, the three evaluation values ​​corresponding to the three coil pairs are not necessarily the same. Furthermore, with respect to the positional relationship between the semiconductor chips 1a to 1c and the semiconductor chips 1d to 1f, these three evaluation values ​​change rapidly in different positional relationships. Specifically, if Dz1 is the distance at which the evaluation value corresponding to the coil pair including the transmitter coil 30a and the receiver coil 40d changes rapidly, Dz2 is the distance at which the evaluation value corresponding to the coil pair including the transmitter coil 30b and the receiver coil 40e changes rapidly, and Dz3 is the distance at which the evaluation value corresponding to the coil pair including the transmitter coil 30c and the receiver coil 40f changes rapidly, then Dz1 < Dz2 < Dz3.

[0142] In this way, in the evaluation system of Figure 24, multiple evaluation values ​​that change rapidly at different positional relationships are obtained, and therefore, for reasons similar to those explained with reference to Figure 17B, detailed judgments regarding positional relationships can be made.

[0143] In the example of Fig. 24, three coil pairs are made to have different mutual inductances by utilizing misalignment between the transmitter coils in the X-axis direction. However, the method of forming multiple coil pairs with different mutual inductances is not limited to the configuration shown in Fig. 24.

[0144] For example, multiple coil pairs with different mutual inductances may be formed by varying the arrangement angles between the transmitting coils, as shown in Fig. 25. Here, similar to Fig. 24, semiconductor chips 1a to 1c are on the transmitting side of the evaluation frame, and semiconductor chips 1d to 1f are on the receiving side of the evaluation frame.

[0145] Semiconductor chips 1a to 1c are embedded in a measurement target 4c, which has a thickness. Semiconductor chip 1a is arranged at an angle Dp1 (0 degrees in the example of FIG. 25) with respect to the X axis, semiconductor chip 1b is arranged at an angle Dp2 with respect to the X axis, and semiconductor chip 1c is arranged at an angle Dp3 with respect to the X axis. Dp2 is larger than Dp1, and Dp3 is larger than Dp2. Semiconductor chips 1d to 1f are embedded in a measurement target 4d, which has a thickness. In this example, the distance in the Z axis direction between measurement targets 4c and 4d changes, and accordingly, the distance Dz in the Z axis direction between semiconductor chips 1a to 1c and semiconductor chips 1d to 1f changes.

[0146] In this way, because the semiconductor chips 1a to 1c are arranged at different angles relative to the X-axis, the three transmitting coils are also arranged at different angles relative to the X-axis, and the three coil pairs have different mutual inductances. As a result, as in the case of Figure 24, with respect to the positional relationship between the semiconductor chips 1a to 1c and the semiconductor chips 1d to 1f, the three evaluation values ​​corresponding to the three coil pairs change drastically in different positional relationships. Therefore, it is possible to make a detailed judgment regarding the positional relationship.

[0147] In the evaluation system of FIG. 24 , Ds1, Ds2, and Ds3 do not change even if Dz changes. Therefore, in principle, the three coil pairs have different mutual inductances regardless of the value of Dz. This is also true for the evaluation system of FIG. 25 . However, if multiple coil pairs have different mutual inductances in a certain positional relationship, it is possible to make a detailed judgment regarding the positional relationship based on multiple evaluation values ​​corresponding to the multiple coil pairs, even if multiple coil pairs have the same mutual inductance in other positional relationships.

[0148] 26A-B, for example, the semiconductor chip 1 is placed on the measurement target 4a, and the semiconductor chip 105 is placed on the measurement target 4b. The measurement target 4b is movable in the Y-axis direction, and the positional relationship (distance Dy) between the semiconductor chips 1 and 105 in the Y-axis direction changes in response to the movement of the measurement target 4b. The semiconductor chip 105 includes receiver coils 143 and 144 that have the same self-inductance. In this evaluation system, the semiconductor chip 105 acquires two evaluation values ​​corresponding to two coil pairs (a coil pair including the transmitter coil 30 and the receiver coil 143, and a coil pair including the transmitter coil 30 and the receiver coil 144).

[0149] 26A, the distance Dy is 0. In this state, the positional relationship between the transmitter coil 30 and the receiver coil 143 and the positional relationship between the transmitter coil 30 and the receiver coil 144 are substantially the same from the viewpoint of coupling between the coils. Therefore, the two coil pairs have substantially the same mutual inductance, and the two evaluation values ​​substantially match, except for accidental errors.

[0150] 26B, the receiving coil 143 is farther away from the transmitting coil 30 than the receiving coil 144. Therefore, in this state, the two coil pairs have different mutual inductances. That is, in the evaluation system of FIGS. 26A and 26B, at least when the semiconductor chips 1 and 105 are in the positional relationship shown in FIG. 26B, the two coil pairs have different mutual inductances.

[0151] As a result, when the measurement target 4b moves in the positive direction of the Y axis, the evaluation value corresponding to the coil pair including the transmitter coil 30 and receiver coil 143 changes rapidly before the evaluation value corresponding to the coil pair including the receiver coil 144. In other words, if the distance at which the evaluation value corresponding to the coil pair including the transmitter coil 30 and receiver coil 143 changes rapidly is Dy1 and the distance at which the evaluation value corresponding to the coil pair including the transmitter coil 30 and receiver coil 144 changes rapidly is Dy2, then Dy1<Dy2.

[0152] Therefore, in the evaluation system of FIGS. 26A-B, similarly to the cases of FIGS. 24 and 25, multiple evaluation values ​​that change rapidly in different positional relationships are obtained, and detailed judgments regarding the positional relationships can be made.

[0153] In the explanations of Figures 24 and 25, the three transmitter coils have the same self-inductance, and the three receiver coils have the same self-inductance. However, even in a configuration in which the transmitter coils are misaligned as in Figures 24 or 25, the self-inductances between the transmitter coils may be different, and the self-inductances between the receiver coils may also be different. Similarly, the self-inductances between the two receiver coils in Figures 26A and 26B may also be different. In other words, a technique for obtaining multiple evaluation values ​​with different characteristics by utilizing the difference in self-inductance between coils (such as Figure 17A) and a technique for obtaining multiple evaluation values ​​with different characteristics based on the coil arrangement (such as Figure 24) can be used together.

[0154] Modification in which the determination of the positional relationship is performed outside the evaluation system In the various examples of the evaluation system described above, the positional relationship determination process is performed based on multiple evaluation values ​​corresponding to multiple coil pairs. However, execution of the positional relationship determination process is not essential for each evaluation system. For example, after the evaluation system acquires multiple evaluation values ​​corresponding to multiple coil pairs, an external system may acquire the multiple evaluation values ​​from the evaluation system and perform a determination of the positional relationship.

[0155] 22A , for example, the semiconductor chip 103 acquires two evaluation values ​​corresponding to two coil pairs formed by each transmitter coil and receiver coil 142 of the semiconductor chip 100a, and records these two evaluation values ​​in the memory 120 of the semiconductor chip 103. Furthermore, the semiconductor chip 104 acquires two evaluation values ​​corresponding to two coil pairs formed by each transmitter coil and receiver coil 141 of the semiconductor chip 100b, and records these two evaluation values ​​in the memory 120 of the semiconductor chip 104. Thereafter, at any timing, a processor of an external system may access the memories 120 of the semiconductor chips 103 and 104 to acquire four evaluation values, and may make a determination regarding the positional relationship based on these four evaluation values.

[0156] Modifications Regarding the Number of Processors in a Semiconductor Chip In the various semiconductor chip examples described above, one semiconductor chip includes one processor. However, one processor may include multiple processors. For example, the semiconductor chip 100 may include a first processor corresponding to the transmitting coil 131 and the receiving coil 141, and a second processor corresponding to the transmitting coil 132 and the receiving coil 142. In this case, for example, in the evaluation system of FIG. 17A , the evaluation frame transmission process corresponding to the transmitting coil 131a is executed by the first processor of the semiconductor chip 100a, and the evaluation frame transmission process corresponding to the transmitting coil 132a is executed by the second processor of the semiconductor chip 100a. Similarly, the evaluation value acquisition process corresponding to the receiving coil 141b is executed by the first processor of the semiconductor chip 100b, and the evaluation value acquisition process corresponding to the receiving coil 142b is executed by the second processor of the semiconductor chip 100b. The positional relationship determination process may be executed by the first processor, the second processor, or a third processor different from the first and second processors. The third processor may be a processor included in the semiconductor chip 100b or a processor included in an external system.

[0157] Modifications regarding the number and arrangement of processors In the various examples of evaluation systems described above, the transmitter and receiver of the evaluation frame each include a processor. For example, the evaluation system of FIG. 17A includes a processor 110a on the transmitter side of the evaluation frame and a processor 110b on the receiver side of the evaluation frame. Furthermore, when multiple receiver coils are distributed across multiple semiconductor chips (semiconductor chips 103 and 104) as in FIG. 23, each semiconductor chip includes a processor. Therefore, the various evaluation systems described above include multiple processors.

[0158] However, it is also possible to configure the evaluation system so that one processor serves both as the transmitting side and the receiving side. Therefore, the evaluation system of this embodiment does not necessarily need to include multiple processors, and it is sufficient to include one or more processors.

[0159] 27 is a diagram showing an example of an evaluation system in which one processor serves as both a transmitter and a receiver. As shown in FIG. 27, receiver coils 141b and 142b are arranged in a first region 2701 on the measurement target 4, and transmitter coils 131a and 132a are arranged in a second region 2702 on the measurement target 4. The first region 2701 is, for example, an region on a first semiconductor chip arranged on the measurement target 4, and the second region 2702 is, for example, an region on a second semiconductor chip arranged on the measurement target 4. However, no processors are arranged in the first region 2701 or the second region 2702.

[0160] 27 , a processor 110 including a memory 120 is disposed in an area different from a first area 2701 and a second area 2702. The processor 110 is connected to the transmitting coils 131 a and 132 a and the receiving coils 141 b and 142 b via a transmitting transformation circuit or a receiving transformation circuit (not shown). Here, the functions of the transmitting transformation circuit and the receiving transformation circuit may be included within the processor 110.

[0161] 11 , the measurement target 4 expands and contracts in the X-axis direction due to factors such as temperature changes. When the measurement target 4 expands and contracts in the X-axis direction, the positional relationship (distance Dx) between the first region 2701 and the second region 2702 changes accordingly.

[0162] The processor 110 can perform an evaluation frame transmission process for each of the transmitting coils 131 a and 132 a, and can perform an evaluation value acquisition process for each of the receiving coils 141 b and 142 b. The processor 110 can also perform a positional relationship determination process based on the four evaluation values ​​corresponding to the four coil pairs acquired by the evaluation value acquisition process.

[0163] Modifications of the Transmission Direction of the Evaluation Frame In the various examples of the evaluation system described above, the positional relationship between the two regions where the coils are arranged changes. For example, in Fig. 27, the positional relationship (distance Dx) between the second region 2702 where the transmitter coils 131a and 132a are arranged and the first region 2701 where the receiver coils 141b and 142b are arranged changes. Also, in Fig. 24, the positional relationship (distance Dz) between the region where the transmitter coils 30a, 30b, and 30c are arranged and the region where the receiver coils 40a, 40b, and 40c are arranged changes.

[0164] Here, in the various examples of the evaluation systems described above, when multiple evaluation frames are transmitted from multiple transmitting coils, all evaluation frames are transmitted from one of two regions.

[0165] However, as shown in FIG. 28, for example, some evaluation frames may be transmitted in the opposite direction to other evaluation frames. In FIG. 28, semiconductor chips 1a to 1f are arranged in the same manner as in FIG. 24. However, unlike FIG. 24, in FIG. 28, for semiconductor chips 1c and 1f, evaluation frames are transmitted from semiconductor chip 1f to semiconductor chip 1c via inductive coupling between receiver coil 40c and transmitter coil 30f. In this case, three evaluation values ​​corresponding to the three coil pairs are acquired by semiconductor chips 1c, 1d, and 1e. Thereafter, a processor in an external system, for example, can acquire these three evaluation values ​​and make a determination regarding the positional relationship based on the acquired three evaluation values.

[0166] Summary of First Embodiment According to the above-described embodiment, multiple evaluation values ​​having different characteristics regarding the positional relationship between two regions (multiple evaluation values ​​that change rapidly depending on different positional relationships) are acquired, which makes it possible to assist in making a more detailed determination regarding the positional relationship between the two regions.

[0167] Second Embodiment In the second embodiment, a configuration of a pressure detection system using a semiconductor chip will be described. As the semiconductor chip for the pressure detection system, any of the various semiconductor chips described in the first embodiment can be used.

[0168] <Configuration Example of Pressure Detection System> Fig. 29 is a diagram showing a configuration example of a measurement target 5 for a pressure detection system. As shown in Fig. 29, a plurality of semiconductor chips are arranged on the XY plane (two-dimensional plane) of the measurement target 5. In the example of Fig. 29, each semiconductor chip arranged on the measurement target 5 is semiconductor chip 1. However, another semiconductor chip (for example, semiconductor chip 100) may be arranged on the measurement target 5. Furthermore, a plurality of types of semiconductor chips (for example, semiconductor chips 1 and 100) may be mixed.

[0169] 30 is a diagram showing an example of the configuration of a pressure detection system 6. The pressure detection system 6 includes two measurement targets 5, measurement targets 5a and 5b. The measurement targets 5a and 5b are arranged so that the surfaces on which the semiconductor chips 1 are arranged face each other. In this embodiment, the semiconductor chips 1 arranged on the measurement target 5a will be collectively referred to as semiconductor chips 1a, and the semiconductor chips 1 arranged on the measurement target 5b will be collectively referred to as semiconductor chips 1b.

[0170] <Example of Operation of Pressure Detection System> Each semiconductor chip 1a on the measurement target 5a communicates with the semiconductor chip 1b on the opposing measurement target 5b.

[0171] When pressure is applied from above to an arbitrary position on the measurement target 5a, the chip spacing between the semiconductor chips 1a and 1b, which are located in the area of ​​the XY plane where the pressure is strongest, becomes shorter, as shown in the lower part of Figure 30. As a result, the evaluation value of the wireless communication between the semiconductor chips 1a and 1b changes. In the following explanation, the BER is used as the evaluation value.

[0172] Furthermore, in areas on the XY plane where pressure is weak, the amount of reduction in the chip spacing between the semiconductor chips 1a and 1b is less than in areas where pressure is strong. Therefore, the change in BER differs between areas where pressure is strong and areas where pressure is weak. Furthermore, in areas on the XY plane where almost no pressure is applied, the chip spacing between the semiconductor chips 1a and 1b does not change, and therefore the BER does not change either.

[0173] Due to this phenomenon, the pressure detection system 6 can determine the chip spacing from the BER of communication between pairs of multiple semiconductor chips 1a and 1b arranged in a plane, thereby obtaining information on the pressure distribution in the XY plane on the pressure detection system 6. When the semiconductor chip 1b is the receiving side of the evaluation frame, the processor 10b of the semiconductor chip 1b determines the positional relationship (chip spacing) with the semiconductor chip 1a based on the acquired evaluation value.

[0174] One of the semiconductor chips 1b arranged in the pressure detection system 6 serves as a master and has a pressure measurement function.

[0175] The processor 10b of each of the other semiconductor chips 1b transmits the determined chip spacing to the master semiconductor chip 1b using an information frame. The processor 10b of the master semiconductor chip 1b aggregates the chip spacings transmitted from the other semiconductor chips 1b and measures the pressure distribution on the pressure detection system 6. The master semiconductor chip 1b stores the measured pressure distribution information in memory 20b.

[0176] When the semiconductor chip 100, for example, is used as the semiconductor chip of the pressure detection system 6, multiple evaluation values ​​corresponding to multiple coil pairs are obtained, so the chip spacing can be determined in more detail, thereby improving the accuracy of the pressure sensor.

[0177] <Modifications> Modifications of the pressure detection system are listed below. As shown in FIG. 31 , the pressure detection system 6 may be configured so that a material 7 is sandwiched between the measurement targets 5a and 5b. The semiconductor chips 1 on the measurement target 5 may be arranged at uneven intervals rather than at equal intervals. The semiconductor chips 1 may be arranged more densely in locations on the measurement target 5 where detailed pressure measurement is desired. Conversely, the semiconductor chips 1 may be arranged sparsely in locations on the measurement target 5 where rough pressure measurement is sufficient. More coils may be arranged in locations on the measurement target 5 where detailed pressure measurement is desired so that evaluation values ​​corresponding to more coil pairs are obtained. Conversely, fewer coils may be arranged in locations on the measurement target 5 where rough pressure measurement is sufficient so that evaluation values ​​corresponding to fewer coil pairs are obtained.

[0178] [Others] The specific configurations of the software (programs) and hardware that implement the various functions described in the above embodiments are not particularly limited. As long as it is technically possible, any software, any hardware, and any combination of any software and any hardware are included in the scope of the above embodiments.

[0179] The above-described embodiments disclose at least the inventions shown in the following items, but are not limited to these: [Item 1] An evaluation system comprising: a first receiving coil arranged in a first region and having a first self-inductance; a second receiving coil arranged in the first region and having a second self-inductance different from the first self-inductance; and one or more processors, wherein the one or more processors obtain a first evaluation value representing the quality of a first wireless signal received via a first inductive coupling between a first transmitting coil arranged in a second region different from the first region and the first receiving coil, and obtain a second evaluation value representing the quality of a second wireless signal received via a second inductive coupling between a second transmitting coil arranged in the second region and being the same as or different from the first transmitting coil and the second receiving coil. [Item 2] The evaluation system according to item 1, wherein the one or more processors make a determination regarding the positional relationship between the first region and the second region based on the first evaluation value and the second evaluation value. [Item 3] The evaluation system according to item 2, wherein the one or more processors make a determination regarding the positional relationship by comparing the first evaluation value with a first threshold and comparing the second evaluation value with a second threshold. [Item 4] The evaluation system according to item 3, wherein the one or more processors make a determination regarding the positional relationship by comparing the first evaluation value with a plurality of thresholds including the first threshold. [Item 5] The evaluation system according to item 1, wherein the second transmitting coil is a coil different from the first transmitting coil, a self-inductance of the second transmitting coil is different from a self-inductance of the first transmitting coil, and the one or more processors obtain a third evaluation value representing the quality of a third wireless signal received via a third inductive coupling between the first transmitting coil and the second receiving coil.[Item 6] The evaluation system according to item 5, wherein the one or more processors make a determination regarding a positional relationship between the first region and the second region based on the first evaluation value, the second evaluation value, and the third evaluation value. [Item 7] The evaluation system according to item 5 or 6, wherein the first wireless signal and the third wireless signal correspond to the same wireless signal transmitted from the first transmitting coil. [Item 8] The evaluation system according to any one of items 1 to 7, wherein the one or more processors include a first processor that obtains the first evaluation value and a second processor that obtains the second evaluation value, the second processor being different from the first processor. [Item 9] The evaluation system according to any one of items 1 to 8, further comprising a first semiconductor chip, and the first region is a region on the first semiconductor chip. [Item 10] The evaluation system according to item 9, further comprising: the first transmitting coil; and a second semiconductor chip different from the first semiconductor chip, wherein the second region is a region on the second semiconductor chip, and when the second transmitting coil is a coil different from the first transmitting coil, the evaluation system further comprises the second transmitting coil. [Item 11] The evaluation system according to any one of items 1 to 8, further comprising: a first semiconductor chip; and a third semiconductor chip different from the first semiconductor chip, wherein the first region includes a region on the first semiconductor chip and a region on the third semiconductor chip, the first receiving coil is arranged in the region on the first semiconductor chip within the first region, and the second receiving coil is arranged in the region on the third semiconductor chip within the first region. [Item 12] The evaluation system according to any one of items 1 to 9, further comprising the first transmitting coil, and when the second transmitting coil is a coil different from the first transmitting coil, the evaluation system further comprises the second transmitting coil.[Item 13] The evaluation system according to any one of items 1 to 12, wherein the first transmitting coil and the second transmitting coil are the same coil. [Item 14] The evaluation system according to item 13, wherein the first wireless signal and the second wireless signal correspond to the same wireless signal transmitted from the same transmitting coil. [Item 15] The evaluation system according to any one of items 1 to 14, wherein the first evaluation value is based on the number of bit errors in the first wireless signal, and the second evaluation value is based on the number of bit errors in the second wireless signal. [Item 16] A first semiconductor chip comprising: a first receiving coil having a first self-inductance; a second receiving coil having a second self-inductance different from the first self-inductance; and one or more processors, wherein the one or more processors obtain a first evaluation value representing the quality of a first wireless signal received via a first inductive coupling between a first transmitting coil and the first receiving coil provided in a second semiconductor chip different from the first semiconductor chip; and obtain a second evaluation value representing the quality of a second wireless signal received via a second inductive coupling between a second transmitting coil, which is the same as or different from the first transmitting coil, and the second receiving coil provided in the second semiconductor chip.[Item 17] A program to be executed by one or more processors of an evaluation system, the evaluation system comprising: a first receiving coil arranged in a first area and having a first self-inductance; and a second receiving coil arranged in the first area and having a second self-inductance different from the first self-inductance, the program, when executed by the one or more processors, causing the one or more processors to: acquire a first evaluation value representing quality of a first wireless signal received via a first inductive coupling between a first transmitting coil arranged in a second area different from the first area and the first receiving coil; and acquire a second evaluation value representing quality of a second wireless signal received via a second inductive coupling between a second transmitting coil arranged in the second area and the second receiving coil, the second transmitting coil being the same as or different from the first transmitting coil. [Item 18] A control method executed by an evaluation system, the evaluation system comprising: a first receiving coil arranged in a first area and having a first self-inductance; and a second receiving coil arranged in the first area and having a second self-inductance different from the first self-inductance; the control method comprising: acquiring a first evaluation value representing quality of a first wireless signal received via a first inductive coupling between a first transmitting coil arranged in a second area different from the first area and the first receiving coil; and acquiring a second evaluation value representing quality of a second wireless signal received via a second inductive coupling between a second transmitting coil arranged in the second area and the second receiving coil, the second transmitting coil being the same as or different from the first transmitting coil.[Item 19] An evaluation system comprising: a receiving coil arranged in a first area; a first transmitting coil arranged in a second area different from the first area and having a first self-inductance; a second transmitting coil arranged in the second area and having a second self-inductance different from the first self-inductance; and one or more processors, wherein the one or more processors: transmit a first wireless signal from the first transmitting coil via a first inductive coupling between the first transmitting coil and the receiving coil; obtain a first evaluation value representing a quality of the first wireless signal received via the first inductive coupling; transmit a second wireless signal from the second transmitting coil via a second inductive coupling between the second transmitting coil and the receiving coil; and obtain a second evaluation value representing a quality of the second wireless signal received via the second inductive coupling. [Item 20] A control method executed by an evaluation system, the evaluation system comprising: a receiving coil arranged in a first area; a first transmitting coil arranged in a second area different from the first area and having a first self-inductance; and a second transmitting coil arranged in the second area and having a second self-inductance different from the first self-inductance, the control method comprising: transmitting a first wireless signal from the first transmitting coil via a first inductive coupling between the first transmitting coil and the receiving coil; obtaining a first evaluation value representing a quality of the first wireless signal received via the first inductive coupling; transmitting a second wireless signal from the second transmitting coil via a second inductive coupling between the second transmitting coil and the receiving coil; and obtaining a second evaluation value representing a quality of the second wireless signal received via the second inductive coupling.[Item 21] A program to be executed by one or more processors of an evaluation system, the evaluation system comprising: a receiving coil arranged in a first area; a first transmitting coil arranged in a second area different from the first area and having a first self-inductance; and a second transmitting coil arranged in the second area and having a second self-inductance different from the first self-inductance, wherein when the program is executed by the one or more processors, the program causes the one or more processors to: transmit a first wireless signal from the first transmitting coil via a first inductive coupling between the first transmitting coil and the receiving coil; obtain a first evaluation value representing quality of the first wireless signal received via the first inductive coupling; transmit a second wireless signal from the second transmitting coil via a second inductive coupling between the second transmitting coil and the receiving coil; and obtain a second evaluation value representing quality of the second wireless signal received via the second inductive coupling.[Item 22] An evaluation system comprising: a first coil arranged in a first area; a second coil arranged in the first area and different from the first coil; a third coil arranged in a second area different from the first area; and one or more processors, wherein when a positional relationship between the first area and the second area is a predetermined positional relationship, a mutual inductance between the first coil and the third coil is different from a mutual inductance between the second coil and a fourth coil arranged in the second area, the fourth coil being the same coil as the third coil or a coil provided in the evaluation system separately from the third coil, the one or more processors transmitting a first wireless signal from the first coil or the third coil via a first inductive coupling between the first coil and the third coil, and obtaining a first evaluation value representing quality of the first wireless signal received via the first inductive coupling, an evaluation system including: transmitting a second wireless signal from the second coil or the fourth coil via a second inductive coupling between the second coil and the fourth coil; and obtaining a second evaluation value representing a quality of the second wireless signal received via the second inductive coupling.[Item 23] A control method executed by an evaluation system, the evaluation system comprising: a first coil arranged in a first area; a second coil arranged in the first area and different from the first coil; and a third coil arranged in a second area different from the first area, wherein when the first area and the second area have a predetermined positional relationship, a mutual inductance between the first coil and the third coil is different from a mutual inductance between the second coil and a fourth coil arranged in the second area, the fourth coil being the same coil as the third coil or a coil provided in the evaluation system separately from the third coil, the control method comprising: transmitting a first wireless signal from the first coil or the third coil via a first inductive coupling between the first coil and the third coil; and acquiring a first evaluation value representing quality of the first wireless signal received via the first inductive coupling. a second evaluation value representing a quality of the second wireless signal received via the second inductive coupling;[Item 24] A program to be executed by one or more processors of an evaluation system, wherein the evaluation system comprises: a first coil arranged in a first area; a second coil arranged in the first area and different from the first coil; and a third coil arranged in a second area different from the first area, wherein when a positional relationship between the first area and the second area is a predetermined positional relationship, a mutual inductance between the first coil and the third coil is different from a mutual inductance between the second coil and a fourth coil arranged in the second area, and the fourth coil is the same coil as the third coil or is a coil provided in the evaluation system separately from the third coil, and when the program is executed by the one or more processors, the program causes the one or more processors to: transmit a first wireless signal from the first coil or the third coil via a first inductive coupling between the first coil and the third coil; and obtain a first evaluation value representing the quality of the first wireless signal received via the first inductive coupling. transmitting a second wireless signal from the second coil or the fourth coil via a second inductive coupling between the second coil and the fourth coil; and obtaining a second evaluation value representing quality of the second wireless signal received via the second inductive coupling.

[0180] The invention is not limited to the above-described embodiment, and various modifications and variations are possible within the scope of the gist of the invention.

[0181] This application claims priority based on Japanese Patent Application No. 2024-065584, filed April 15, 2024, the entire contents of which are incorporated herein by reference.

[0182] 100... semiconductor chip, 110... processor, 120... memory, 131... transmitting coil, 132... transmitting coil, 141... receiving coil, 142... receiving coil, 151... transmitting side conversion circuit, 152... transmitting side conversion circuit, 161... receiving side conversion circuit, 162... receiving side conversion circuit

Claims

1. An evaluation system comprising: a first receiving coil arranged in a first area and having a first self-inductance; a second receiving coil arranged in the first area and having a second self-inductance different from the first self-inductance; and one or more processors, wherein the one or more processors obtain a first evaluation value representing the quality of a first wireless signal received via a first inductive coupling between a first transmitting coil arranged in a second area different from the first area and the first receiving coil; and obtain a second evaluation value representing the quality of a second wireless signal received via a second inductive coupling between a second transmitting coil arranged in the second area and the second receiving coil, the second transmitting coil being the same as or different from the first transmitting coil.

2. An evaluation system according to claim 1, wherein the one or more processors make a determination regarding a positional relationship between the first region and the second region based on the first evaluation value and the second evaluation value.

3. An evaluation system according to claim 2, wherein the one or more processors make a determination regarding the positional relationship by comparing the first evaluation value with a first threshold value and comparing the second evaluation value with a second threshold value.

4. An evaluation system according to claim 3, wherein the one or more processors make a determination regarding the positional relationship by comparing the first evaluation value with a plurality of thresholds including the first threshold.

5. An evaluation system according to claim 1, wherein the second transmitting coil is a coil different from the first transmitting coil, the self-inductance of the second transmitting coil is different from the self-inductance of the first transmitting coil, and the one or more processors obtain a third evaluation value representing the quality of a third wireless signal received via a third inductive coupling between the first transmitting coil and the second receiving coil.

6. An evaluation system according to claim 5, wherein the one or more processors make a determination regarding the positional relationship between the first region and the second region based on the first evaluation value, the second evaluation value, and the third evaluation value.

7. An evaluation system according to claim 5 or 6, wherein the first radio signal and the third radio signal correspond to the same radio signal transmitted from the first transmitting coil.

8. An evaluation system according to any one of claims 1 to 7, wherein the one or more processors include a first processor that acquires the first evaluation value, and a second processor different from the first processor that acquires the second evaluation value.

9. An evaluation system according to any one of claims 1 to 8, further comprising a first semiconductor chip, and the first region is a region on the first semiconductor chip.

10. An evaluation system according to claim 9, further comprising: the first transmitting coil; and a second semiconductor chip different from the first semiconductor chip, wherein the second region is a region on the second semiconductor chip, and when the second transmitting coil is a coil different from the first transmitting coil, the evaluation system further comprises the second transmitting coil.

11. An evaluation system according to any one of claims 1 to 8, further comprising: a first semiconductor chip; and a third semiconductor chip different from the first semiconductor chip, wherein the first region includes a region on the first semiconductor chip and a region on the third semiconductor chip, the first receiving coil is arranged in the region on the first semiconductor chip within the first region, and the second receiving coil is arranged in the region on the third semiconductor chip within the first region.

12. An evaluation system according to any one of claims 1 to 9, further comprising the first transmitting coil, and when the second transmitting coil is a coil different from the first transmitting coil, the evaluation system further comprises the second transmitting coil.

13. An evaluation system according to any one of claims 1 to 12, wherein the first transmitting coil and the second transmitting coil are the same coil.

14. An evaluation system according to claim 13, wherein the first radio signal and the second radio signal correspond to the same radio signal transmitted from the same transmitting coil.

15. An evaluation system according to any one of claims 1 to 14, wherein the first evaluation value is based on the number of bit errors in the first radio signal, and the second evaluation value is based on the number of bit errors in the second radio signal.

16. A first semiconductor chip comprising: a first receiving coil having a first self-inductance; a second receiving coil having a second self-inductance different from the first self-inductance; and one or more processors, wherein the one or more processors obtain a first evaluation value representing the quality of a first wireless signal received via a first inductive coupling between a first transmitting coil and the first receiving coil provided in a second semiconductor chip different from the first semiconductor chip; and obtain a second evaluation value representing the quality of a second wireless signal received via a second inductive coupling between a second transmitting coil, which may be the same as or different from the first transmitting coil, and the second receiving coil provided in the second semiconductor chip.

17. A program to be executed by one or more processors of an evaluation system, the evaluation system comprising: a first receiving coil arranged in a first area and having a first self-inductance; and a second receiving coil arranged in the first area and having a second self-inductance different from the first self-inductance, the program, when executed by the one or more processors, causing the one or more processors to: obtain a first evaluation value representing the quality of a first wireless signal received via a first inductive coupling between a first transmitting coil arranged in a second area different from the first area and the first receiving coil; and obtain a second evaluation value representing the quality of a second wireless signal received via a second inductive coupling between a second transmitting coil arranged in the second area and the second receiving coil, the second transmitting coil being the same as or different from the first transmitting coil.

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