Program instruction optimization method, apparatus and related product

Abstract

The present disclosure provides a program instruction optimization method, an apparatus and a related product. The method can comprise: acquiring a copy instruction and at least one target instruction in program code; and, if the copy instruction and the at least one target instruction satisfy a predetermined condition, replacing an associated variable in the target instruction on the basis of the copy instruction, and deleting the copy instruction. In the present disclosure, combining the copy instruction with the target instruction achieves the purpose of deleting the redundant copy instruction, thus optimizing the program code, so that the program code can normally run while the running performance of the program code is improved.

Description

Program instruction optimization methods, devices and related products Cross-references to related applications

[0001] This application claims priority to Chinese patent application filed on April 24, 2024, with application number 202410503920.9 and entitled "Program Instruction Optimization Method, Apparatus and Related Products". Technical Field

[0002] This disclosure relates to the field of computer technology, and in particular to a method, apparatus and related products for optimizing program instructions. Background Technology

[0003] In computer technology, computer devices typically include a processor and memory. The processor's processing efficiency is much higher than the memory's access speed, which means that the processor often has to wait for memory access data. This makes memory access operations increasingly a bottleneck for computer performance.

[0004] Generally, computer devices often have various memory access operations for data interaction, which result in a large number of copy instructions in application code. Memory access optimization of application code using compilers is an important optimization technique, but traditional compilers cannot eliminate copy instructions in specific scenarios. How to use compilers to eliminate copy instructions in application code is a problem worthy of attention. Summary of the Invention

[0005] Based on existing technology, this disclosure provides a program instruction optimization method. By executing this program instruction optimization method, the compiler can remove redundant copy instructions in the program code, thereby optimizing the program code.

[0006] This disclosure provides a method for optimizing program instructions. The method includes: obtaining a copy instruction and at least one target instruction from program code; wherein the copy instruction includes an associated variable and a replacement variable, and the target instruction contains the associated variable; if the copy instruction and the at least one target instruction satisfy a preset condition, then, according to the copy instruction, the associated variable in the target instruction is replaced, and the copy instruction is deleted.

[0007] The step of replacing the associated variable in the target instruction according to the copy instruction further includes: replacing the associated variable in the target instruction with the replacement variable in the copy instruction.

[0008] The preset conditions include the following: the copy instruction and the at least one target instruction have a dominant relationship in the control flow; the replacement variable of the copy instruction is active at the target instruction; and the variable of the copy instruction remains unchanged at both the copy instruction and the target instruction.

[0009] The method further includes: obtaining the required value that the variable in the copy instruction must reach at the copy instruction and the required value that the variable must reach at the target instruction; if the required value that the variable in the copy instruction must reach at the copy instruction is consistent with the required value that the variable in the target instruction must reach at the target instruction, then it is determined that the variable in the copy instruction remains unchanged at the copy instruction and the target instruction.

[0010] Wherein, the associated variable of the copy instruction is the destination operand of the copy instruction, and the replacement variable of the copy instruction is the source operand of the copy instruction.

[0011] The method further includes: if the program instruction is a usage instruction for the associated variable, then the program instruction is determined as the target instruction.

[0012] The method further includes: obtaining a set of aliases for the associated variables of the copy instruction and a range of values ​​for the associated variables by the copy instruction; if there is a program instruction that performs a read operation on the set of aliases for the associated variables, and the program instruction is within the range of values ​​for the associated variables by the copy instruction, then the program instruction is determined to be a usage instruction for the associated variables.

[0013] Wherein, the associated variable of the copy instruction is the source operand of the copy instruction, and the replacement variable of the copy instruction is the destination operand of the copy instruction.

[0014] The method further includes: if the program instruction is a value setting instruction for the associated variable, then the program instruction is determined as the target instruction.

[0015] The method further includes: obtaining the alias set of the associated variables of the copy instruction and the fixed value range of the associated variables for the copy instruction; if there is a program instruction that performs a write operation on the alias set of the associated variables, and the program instruction belongs to the variable reaching a fixed value at the copy instruction, then the program instruction is determined to be the fixed value instruction of the associated variables.

[0016] The preset condition further includes: there is no specified program instruction between the target instruction and the copy instruction; wherein the specified program instruction is the usage instruction of the destination operand of the copy instruction, and the specified program instruction subsequently governs the copy instruction.

[0017] This disclosure also provides a program instruction optimization apparatus, which includes a processor and a memory for storing computer programs or instructions. When the processor executes the computer program in the memory, it implements the above-described program instruction optimization method.

[0018] In another aspect, this disclosure provides a computer-readable storage medium for storing a computer program or instructions that, when executed by one or more processors, implement the program instruction optimization method described above.

[0019] In another aspect, this disclosure provides a computer program product comprising a computer program or instructions, which, when executed by a processor, implement the program instruction optimization method described above.

[0020] This disclosure provides a program instruction optimization method. When a preset condition is met between a copy instruction and a target instruction, the method replaces the associated variable in the target instruction with the copy instruction and deletes the copy instruction. By merging the copy instruction and the target instruction, the method achieves the purpose of deleting redundant copy instructions, thereby optimizing the program code and improving the program code's performance while ensuring that the program code can run normally. Attached Figure Description

[0021] Figure 1 is a schematic diagram of an application scenario of a program instruction optimization method according to an embodiment;

[0022] Figure 2 is a structural schematic diagram of an embodiment of the computing device in Figure 1;

[0023] Figure 3 is a schematic diagram of the control flow diagram of an embodiment;

[0024] Figure 4 is a flowchart illustrating a program instruction optimization method according to an embodiment;

[0025] Figure 5 is a flowchart illustrating a program instruction optimization method according to another embodiment;

[0026] Figure 6 is a flowchart illustrating another embodiment of a program instruction optimization method. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this disclosure.

[0028] The terminology used in the embodiments of this disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of this disclosure. The singular forms “a,” “the,” and “the” as used in the embodiments of this disclosure and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0029] It should be understood that the term "and / or" used in this document is merely a description of the same field in the related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0030] It should be understood that although terms such as first, second, third, etc., may be used to describe preset ranges in the embodiments of this disclosure, these preset ranges should not be limited to these terms. These terms are only used to distinguish preset ranges from one another. For example, without departing from the scope of the embodiments of this disclosure, a first preset range may also be referred to as a second preset range, and similarly, a second preset range may also be referred to as a first preset range.

[0031] Depending on the context, the word "if" as used here can be interpreted as "when," "when," "in response to determination," or "in response to detection." Similarly, depending on the context, the phrase "if determination" or "if detection (of the stated condition or event)" can be interpreted as "when determination," "in response to determination," "when detection (of the stated condition or event)," or "in response to detection (of the stated condition or event)."

[0032] To better understand the technical solutions of this disclosure, the application scenarios of the embodiments of this disclosure are described.

[0033] Figure 1 provides an exemplary application scenario of the technical solution disclosed herein. As shown in Figure 1, the computer system 100 may be a heterogeneous computer system including a computing device 110 and a processing device 130, wherein the computing device 110 and the processing device 130 have different instruction set architectures.

[0034] The computing device 110 is configured to execute user-specified operations to perform deep learning or machine learning computations. It can interact with the processing device 130 via the interface device 120 to jointly complete user-specified tasks (including but not limited to image recognition, speech recognition, etc.). These tasks can include various computations, including but not limited to scalar operations, vector operations, and matrix operations, to achieve the corresponding tasks.

[0035] The processing device 130, as a general-purpose processing device, performs basic controls including but not limited to data transfer, and starting and / or stopping the computing device. Depending on the implementation, the processing device 130 may be one or more types of processors, including but not limited to digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc., and their number can be determined according to actual needs. As mentioned above, for the purposes of this disclosure only, the computing device can be considered to have a single-core structure or a homogeneous multi-core structure. However, when the computing device 110 and the processing device 130 are considered together, they are considered to form a heterogeneous multi-core structure.

[0036] Interface device 120 is used to transmit data and control commands between computing device 110 and processing device 130. Optionally, interface device 120 can be PCIe. Storage device 140 is used to store data to be processed. It can be DDR (Double Data Rate) memory (DRAM, Dynamic Random Access Memory) and is used to store data of computing device 110 and / or processing device 130. Storage device 140 can be referred to as external storage resource of computing device 110.

[0037] Furthermore, the aforementioned computing device 110 can be a multi-core processor with multiple processor cores. Each processor core is used to implement various tensor computation operations such as vector operations and matrix operations. For example, each processor core may include a vector operation module and a matrix operation module to implement the corresponding operations. Further, the multiple processor cores of the computing device can form multiple clusters, and the multiple clusters can communicate with each other. As shown in Figure 2, four clusters 210 are exemplaryly shown in the figure, and the four clusters are labeled as cluster 1 to cluster 4 respectively. With the development of hardware, the clusters of the computing device of this disclosure can also include 8, 16, 64, or even more clusters. Each cluster 210 includes multiple processor cores 220 and one storage core 230. This disclosure does not limit the number of processor cores 220. The storage core 230 can be used to realize data interaction between multiple processor cores within the same cluster, and can also be used for data interaction between clusters or between a cluster and an external storage device (storage device 140 as shown in Figure 1). Furthermore, each processor core may also include a storage module for storing the data required for computation. The storage module inside the processor core can interact with external storage resources or with other processor cores on the computing device through the memory access module.

[0038] Optionally, a compiler may run on the processing device. The compiler can be implemented as a computer program that converts user-written source code into an executable file (such as a binary file) that can be executed by the computing device and processing device. This executable file may include memory access instructions. During actual computation, the driver can transfer the executable file corresponding to the computing device from the processing device to the computing device, enabling the computing device to perform the corresponding computational tasks.

[0039] When performing computational tasks using the aforementioned heterogeneous computer system, numerous data memory access operations will occur between the computing device 110 and the processing device 130, as well as between processor cores and clusters within the computing device, to facilitate data interaction between various components. These data memory access operations can be represented as corresponding copy instructions at the program code level. These copy instructions are compiled by a compiler to obtain corresponding memory access instructions executable on the computing device and the processing device. Given the large number of copy instructions, how to use a compiler to optimize and remove copy instructions from the program code to achieve memory access optimization in the computer system is a technical problem addressed in this disclosure.

[0040] To address the aforementioned technical problems, this disclosure provides a program instruction optimization method. This method can be applied to a compiler to remove copy instructions from program code, thereby improving the program code's performance on a computer system. The program code may include a series of program instructions, including but not limited to copy instructions and arithmetic instructions.

[0041] To facilitate understanding of the solution, some concepts that may be involved in the embodiments of this disclosure are explained below.

[0042] Operands are an important field in program instructions, used to indicate the data involved in the instruction. Based on their purpose within the instruction, operands can be divided into source operands and destination operands. Operands of a program instruction can be represented by the memory space of the corresponding data. In scenarios where the program instruction involves tensor data, the operands can be a storage space; for example, the operand of a program instruction can be a variable x, where x requires storage space [0, X], and X represents an unknown variable.

[0043] Data flow analysis: a technique for collecting the values ​​calculated by a computer program at different program points.

[0044] Aliases: If multiple variables may point to the same memory address space, then these variables are aliases to each other. In the case of variables that are tensors, if the storage space occupied by the variables overlaps, then these variables are aliases to each other. For example, if variable x1 points to storage space [0,31] and variable x2 points to storage space [0,64], then variable x1 and variable x2 are aliases to each other.

[0045] Live variable: For a variable x and a program instruction p, if a path in the control flow graph starting from p references the value of variable x at program instruction p, then variable x is said to be live at program instruction p; otherwise, variable x is said to be dead at program instruction p.

[0046] A fixed value: A fixed value for variable x is a statement that (may) assign a value to x. In the case where variable x is a tensor, the fixed value of variable x can be a statement that assigns a value to part or all of the tensor's storage space. For example, if variable x points to storage space [0,31], program instruction p1 assigns a value to storage space [0,15] of variable x, and program instruction p2 assigns a value to storage space [16,31] of variable x, then the fixed value of variable x can be program instruction p1 and program instruction p2.

[0047] Usage: Statements that perform operations on the variable x. For example, if the program instruction p is used to accumulate the variable x, then the usage of the variable x is the program instruction p.

[0048] Reaching a fixed value: If program instruction q may assign a value to variable x before program instruction p, and the possible fixed value of variable x assigned by program instruction q can reach program instruction p, then program instruction q is the fixed value reached at program instruction p.

[0049] Common assignment: If, during a single use of program instruction p, the assignment of variable x comes simultaneously from two program instructions q1 and q2, then program instructions q1 and q2 jointly assign a value to variable x at program instruction p. For example, if variable x is a tensor with a corresponding storage space of [0, 63], and program instruction q1 assigns a value to [0, 15] of this storage space, while program instruction q2 simultaneously assigns a value to [16, 32] of the same memory space, then program instructions q1 and q2 jointly assign a value to variable x at program instruction p. If program instructions q1 and q2 come from different control flows, then the different assignments of program instructions q1 and q2 to the same memory space are not considered a common assignment.

[0050] Must-define: If program instruction q assigns a value to variable x before program instruction p, and the value assigned to variable x by program instruction q will necessarily reach the value assigned to program instruction p, then program instruction q is a must-define at program instruction p. For example, the last instruction to assign a value to variable x before program instruction p is a must-define at program instruction p.

[0051] The range of values ​​assigned to variable x by program instruction p: This indicates the valid range of values ​​assigned to variable x by program instruction p.

[0052] Control flow graph: A directed graph used to describe the control flow within a program. A control flow graph consists of nodes and the relationships between them. Nodes can be basic blocks.

[0053] Basic block: A node in the control flow graph, which is a sequence of statements executed in the program in the most sequential manner. Each basic block has only one entry and one exit. Execution starts from its entry and ends at its exit.

[0054] Dominant node: In a control flow graph, if node X is a necessary path node to node Y, then node X is the dominant node of node Y.

[0055] Successor dominating node: In the control flow graph, if every path from node Y to the exit node passes through node X, then node X is the successor dominating node of node Y.

[0056] Figure 3 shows an exemplary control flow graph, where each node is a basic block. Taking node H as an example, the path starts at node A, then passes through node E. After node E, there is a branch that may lead to node F or node G. Regardless of whether node F or G is visited, the path ends at node H. A dominating node is a basic block that must be passed through to reach a specific basic block from the start of the control flow graph. To reach node H, it is necessary to pass through nodes A, E, and H itself; therefore, nodes A, E, and H are all dominating nodes of node H. A successor dominating node is a node passed through on every path from a node to the exit node. Taking node F as an example, there is a branch after node F, which may lead to node D or node H. Regardless of whether node D or H is visited, node M is passed through to reach the exit node from node F; therefore, node M is the successor dominating node of node F.

[0057] Optionally, the compiler can perform arrival value analysis and active variable analysis on the above program code based on the data flow to obtain the value information and active state information of tensors in each program instruction. Based on the value information and active state information of these tensors, the compiler can then determine whether to delete copy instructions in the program code. The variables in the program instructions can be defined as operands of the program instructions.

[0058] In scenarios where variables in program instructions are tensor data, since each variable points to a memory space, and the memory spaces of different variables may overlap, each variable may be assigned a value by multiple program instructions, making the analysis of variables reaching their assigned values ​​in program instructions complex. Furthermore, the memory space of some variables may be unknown at compile time, which also poses difficulties for analyzing the arrival of variables at their assigned values ​​in program instructions.

[0059] Based on this, the program instruction optimization method disclosed herein can obtain the control flow graph corresponding to the program code, and traverse each basic block in reverse order, calculate the fixed value information of each variable in each basic block, and traverse in a loop until the fixed value information of the variables in each basic block remains unchanged.

[0060] Specifically, during a single traversal, the compiler can traverse each program instruction within a basic block and process each instruction as follows to obtain the value and usage information of each variable (i.e., operand) at each program instruction:

[0061] 1) For the destination operand of each program instruction, i.e., the fixed value of each variable.

[0062] The compiler can determine that at a given program instruction, the variable must reach a fixed value, and by considering all possible program instructions that could assign a value to that variable, it can determine the value reached at that instruction. Specifically, at the given program instruction, the value reached can include all program instructions preceding that instruction that could assign a value to that variable. When the variable is a tensor, at the given program instruction, the value reached includes all program instructions preceding that instruction that could assign a value to part or all of the storage space corresponding to the tensor; that is, program instructions assigning values ​​to any subset or the entire storage space corresponding to the tensor.

[0063] 2) For the source operand of each program instruction, i.e., the use of each variable

[0064] For each variable used, the variable may have been valued by at least one preceding program instruction. For example, the variable may be valued jointly by two preceding program instructions. However, since each program instruction may only value a portion of the variable's storage space, embodiments of this disclosure can determine the active state of each variable at each program instruction. Specifically,

[0065] If a variable has already been assigned a value by a preceding program instruction, and at that instruction, the value of the variable is not completely overwritten (i.e., killed) by any subsequent program instruction's value—meaning the other program instructions assign a value to a subrange of the value assigned by the preceding instruction—then the preceding instruction's value is valid. In this case, the preceding instruction's value can be applied to that instruction, and thus, the preceding instruction's value can reach that instruction. The preceding instruction can be a program instruction executed before this instruction.

[0066] If a variable has already been assigned a value by a preceding program instruction, and that value was completely overridden (i.e., killed) by another program instruction before reaching this instruction—meaning the value assigned by another instruction is entirely contained within the value assigned by the preceding instruction—then the preceding instruction's value is invalid. In this case, the preceding instruction's value is inactive at this instruction's location, and its value cannot reach that instruction. Therefore, at this instruction's location, the preceding instruction is no longer the instruction assigning the value to that variable.

[0067] For example, at least one program instruction may assign a value to the same variable x multiple times. The multiple storage spaces involved in the same variable x can be represented as: MD1[0,31], MD2[0,15]; MD3[0,64]. Since the storage spaces of MD1, MD2, and MD3 overlap, when program instruction IN1 assigns a value to MD1, it may also assign values ​​to MD2 and MD3. Similarly, when program instruction IN3 assigns a value to MD2, it may also assign values ​​to MD1 and MD3. When program instruction IN2 uses MD1, it may also use MD2 and MD3. Specifically:

[0068] IN1: def; must def: MD1[0,31], may def: {MD2, MD3};

[0069] IN2: use: must use: MD1[0,31], may use: {MD2, MD3};

[0070] IN3: def; must def: MD2[0,15], may def: {MD1, MD3};

[0071] IN4: def; must def: MD3[0,64], may def: {MD1, MD2};

[0072] Among them, `must def` means that the variable must reach a specified value at the program instruction, and `may def` means that the variable will reach a specified value at the program instruction. `must use` means that the program instruction must use the variable, and `may use` means that the program instruction may use the variable.

[0073] At instruction IN1, the program sets a value for the storage space MD1 of variable x; the setting information at instruction IN1 is as follows:

[0074] The value that variable x reaches is {IN1}, and the value that variable x must reach is {IN1}; the program instruction IN1 sets the value range of variable x to {IN1}.

[0075] At program instruction IN2, the program instruction IN2 uses the storage space MD1 of variable x, and the fixed value information of MD1 exists, but MD1 is not overwritten by the fixed values ​​of other program instructions. Therefore, the fixed value information at program instruction IN2 can be recorded as follows:

[0076] The value that variable x reaches is {IN1}, and the value that variable x must reach is {IN1}; the program instruction IN1 sets the value range of variable x to {IN1, IN2}.

[0077] At instruction IN3: Instruction IN3 assigns a value to the storage space MD2 of variable x. Considering the list of all possible values ​​{MD1, MD3}, only MD1 has already been assigned a value, and the value assigned to MD2 by instruction IN3 coincides with the value assigned to MD1 by instruction IN1. That is, the partial value assigned to storage space MD1[0,15] by instruction IN1 has become invalid. However, since the value assigned to storage space MD1 by instruction IN1 has not completely become invalid, instruction IN1 at instruction IN3 is still the instruction for assigning a value to variable x. The value assignment information at instruction IN3 can be recorded as follows:

[0078] The value to be reached for variable x is {IN1, IN3}, and the value to be reached for variable x is {IN3}.

[0079] The program instruction IN1 sets the value range of variable x to {IN1, IN2, IN3}, and the program instruction IN3 sets the value range of variable x to {IN3}.

[0080] At program instruction IN4: Program instruction IN4 assigns a value to the storage space MD4 of variable x. At this time, consider the list of all possible values ​​{MD1, MD2}. MD1 has been assigned a value by program instruction IN1, and MD2 has been assigned a value by program instruction IN3. However, the value assigned to MD3 by program instruction IN4 completely covers the value assigned to MD1 by program instruction IN1 and the value assigned to MD2 by program instruction IN3.

[0081] This shows that MD1 and MD2 have been completely killed by the value assigned to MD3 by the program instruction IN4. Therefore, the values ​​assigned to variable x by program instruction IN1 (MD1) and by program instruction IN3 (MD2) are invalid. The values ​​assigned to variable x by program instructions IN1 and IN3 cannot reach program instruction IN4. The value information at program instruction IN4 can be recorded as follows:

[0082] The variable x has a set value of {IN4}, and the variable x must reach a set value of {IN4}; the program instruction IN1 sets the value range of variable x to {IN1, IN2, IN3}, the program instruction IN3 sets the value range of variable x to {IN3}, and the program instruction IN4 sets the value range of variable x to {IN4}.

[0083] Furthermore, at program instruction IN4, since the values ​​assigned to the storage space MD1 of variable x by program instruction IN1 and the values ​​assigned to the storage space MD2 of variable x by program instruction IN3 have both become invalid, the corresponding storage spaces MD1 and MD2 of variable x are no longer active.

[0084] Based on the aforementioned arrival-to-fixed-value analysis and active variable analysis of the program code, the program instruction optimization method disclosed herein can optimize copy instructions in the program code. Optionally, the compiler can determine the target instruction of the copy instruction based on the fixed-value information and usage information of each variable in the program instruction. Furthermore, the compiler can also modify the target instruction and delete the copy instruction when the copy instruction meets preset conditions. The aforementioned preset conditions can also be determined based on active variable analysis and the aforementioned arrival-to-fixed-value analysis. See below for details.

[0085] Figure 4 is a flowchart illustrating a program instruction optimization method according to an embodiment of this disclosure. As shown in Figure 4, a program instruction optimization method according to an embodiment of this disclosure may include:

[0086] S410: Obtain copy instructions and at least one target instruction from the program code.

[0087] The program code may include a series of program instructions, including but not limited to copy instructions and arithmetic instructions. In the method disclosed herein, the compiler can traverse multiple program instructions in the program code and obtain all copy instructions from them.

[0088] Each copy instruction is used to transfer data between storage spaces. A copy instruction may include a source operand and a destination operand. Optionally, the source operand and destination operand may be used to indicate the variables involved in the copy instruction. These variables may be tensor data such as vectors or matrices, and the source operand and destination operand are represented using the storage space of the corresponding tensor data.

[0089] Optionally, the source and destination operands have the same data type and the same tensor shape, but they can have different strides. The tensor shape describes the size of the tensor data. For example, if the tensor data is a two-dimensional matrix, its tensor shape can be represented as rows × columns. Optionally, the source operand can also be scalar data, such as immediate values.

[0090] The target instruction can be a copy instruction or an operation instruction in program code, and it can include a destination operand and at least one source operand. The destination operand and at least one source operand are used to represent the variables involved in the target instruction. These variables can be tensor data such as vectors or matrices, and the source operand and destination operand are represented using the storage space of the corresponding variables. Optionally, the source operand can also be scalar data, such as an immediate value.

[0091] The target instruction and the copy instruction can have a data dependency relationship. For example, the target instruction may be a use instruction or a value assignment instruction for an operand in the copy instruction. For ease of explanation, this disclosure refers to overlapping variables in the target instruction and the copy instruction as associated variables. The target instruction may be a value assignment instruction or a use instruction for an associated variable in the copy instruction. Specifically, if a program instruction needs to use the associated variable for related operations, that is, when the associated variable is a source operand of the program instruction, then the program instruction is a use instruction for the associated variable. If a program instruction is used to assign a value to the associated variable, that is, when the associated variable is a destination operand of the program instruction, then the program instruction is a value assignment instruction for the associated variable.

[0092] Optionally, the associated variable can be either the variable indicated by the source operand of the copy instruction or the variable indicated by the destination operand of the copy instruction. When the associated variable is the variable indicated by the source operand of the copy instruction, the variable indicated by the destination operand of the copy instruction can be denoted as the substitution variable.

[0093] Specifically, if the program instruction is a copy instruction that uses an associated variable, then that program instruction can be used as the target instruction. If the program instruction is a copy instruction that assigns a value to an associated variable, then that program instruction can be used as the target instruction. See below for details.

[0094] S420. If a preset condition is met between the copy instruction and at least one target instruction, then the associated variable in the target instruction is replaced according to the copy instruction, and the copy instruction is deleted.

[0095] The method disclosed herein replaces associated variables in the target instruction according to the copy instruction while ensuring the program code runs normally. After the target instruction is modified, the redundant copy instruction can be deleted, thereby optimizing memory access by reducing the number of copy instructions.

[0096] Optionally, if the copy instruction and the target instruction meet a preset condition, it means that deleting the copy instruction will not affect the normal operation of the program code. In this case, the associated variable in the target instruction can be replaced with the replacement variable of the copy instruction, and the copy instruction can be deleted.

[0097] For example, when the associated variable is the variable pointed to by the source operand of a copy instruction, the variable pointed to by the destination operand of the copy instruction can be denoted as the substitution variable. If a preset condition is met between the copy instruction and the target instruction, the compiler can replace the associated variable that is the destination operand in the target instruction with the substitution variable of the copy instruction, that is, replace the corresponding destination operand in the target instruction with the source operand of the copy instruction. Again, when the associated variable is the variable pointed to by the destination operand of a copy instruction, the variable pointed to by the source operand of the copy instruction can be denoted as the substitution variable. If a preset condition is met between the copy instruction and the target instruction, the compiler can replace the associated variable that is the source operand in the target instruction with the substitution variable of the copy instruction, that is, replace the corresponding source operand in the target instruction with the destination operand of the copy instruction.

[0098] Optionally, the preset conditions include the following:

[0099] (1) At least one target instruction and the copy instruction have a dominance relationship in the control flow. This dominance relationship can be that the copy instruction dominates the at least one target instruction, that is, in the control flow graph, the node where the copy instruction is located is the dominating node of all the target instructions; or, the copy instruction subsequently dominates the at least one target instruction, that is, in the control flow graph, the node where the copy instruction is located is the subsequent dominating node of all the target instructions.

[0100] (2) The substitution variable of the copy instruction is active at the target instruction, meaning the substitution variable of the copy instruction is active at the target instruction; the compiler can perform active variable analysis on the variables in the copy instruction and determine the active state of the substitution variable of the copy instruction at the target instruction. See above for the analysis of the active state of variables in compiler instructions.

[0101] If the compiler determines that the replacement variable of the copy instruction is inactive at the target instruction, it means that the value of the replacement variable of the copy instruction may have been modified by other program instructions. At this time, the compiler can determine that the copy instruction does not meet the preset conditions and cannot perform the replacement modification of the target instruction or delete the copy instruction, so as to avoid program code execution errors.

[0102] (3) Variables in a copy instruction remain unchanged at both the copy instruction and the target instruction. For example, if the target instruction is an instruction that uses a variable in a copy instruction, then it must satisfy the following: the replacement variable of the copy instruction has not been modified by other program instructions, and the associated variable in the copy instruction has not been modified by other program instructions. As another example, if the target instruction is an instruction that assigns a value to a variable in a copy instruction, then it must satisfy the following: the replacement variable of the copy instruction remains unchanged at both the copy instruction and the target instruction.

[0103] The compiler can perform reach-defined analysis to determine whether the variable specified by the copy instruction has changed at the copy instruction and the target instruction. If the compiler determines that the variable specified by the copy instruction has changed at the copy instruction and the target instruction, it means that the value of the variable specified by the copy instruction may have been modified by other program instructions. In this case, the compiler can determine that the copy instruction and the target instruction do not meet the preset conditions, and cannot replace or modify the target instruction or delete the copy instruction to avoid program code execution errors.

[0104] Optionally, the compiler can obtain the required reach values ​​at the copy instruction and the target instruction, thereby obtaining the required reach values ​​of each variable in the copy instruction at the copy instruction and the required reach values ​​of each variable in the copy instruction at the target instruction. Specifically, at the copy instruction, the required reach value of each variable can be the last program instruction that sets the value of the variable; at the target instruction, the required reach value of each variable can be the last program instruction that sets the value of the variable before the target instruction. The calculation methods for the required reach values ​​of each variable at the copy instruction and the target instruction can be found in the reach value analysis above. At the copy instruction, the required reach value of each variable can be the required reach value at the entry point of the copy instruction or the required reach value at the exit point of the copy instruction. The embodiments of this application can determine appropriate conditions according to the actual application scenario.

[0105] If the required values ​​of each variable in the copy instruction are the same as those in the target instruction, it means that the variable's value was not "killed" by other program instructions during the transfer between the copy and target instructions. Therefore, the compiler can determine that the variable remains unchanged between the copy and target instructions. Conversely, if the required values ​​of the variable in the copy instruction are different from those in the target instruction, it means that the variable has changed between the copy and target instructions. In this case, replacing the associated variable in the target instruction with the replacement variable in the copy instruction would cause an error in the target instruction's calculation. The compiler can then determine that the copy instruction does not meet the preset conditions and cannot be deleted.

[0106] Specifically, if at least one target instruction and the copy instruction have a dominant relationship in control flow, and the substitution variable of the copy instruction is active at the target instruction, and the variables of the copy instruction remain unchanged at both the copy instruction and the target instruction, then the compiler can determine that the copy instruction and the target instruction satisfy a preset condition. In this case, the compiler can modify the associated variable in the target instruction to the substitution variable of the copy instruction and delete redundant copy instructions. Thus, the method of this disclosure will not cause runtime errors in the program code after deleting copy instructions, and can optimize the memory access of the program code.

[0107] In one embodiment, the method of this application can implement a forward copy deletion process, that is, according to the execution order of program instructions, the copy instruction replaces the variables in the subsequent target instruction and deletes the copy instruction. Here, the associated variable of the copy instruction is the destination operand of the copy instruction, and the replacement variable of the copy instruction is the source operand of the copy instruction. The target instruction is the instruction that uses the destination operand in the copy instruction. In the embodiments of this disclosure, the compiler can determine the target instruction of the copy instruction based on the arrival setpoints of each program instruction, and when the copy instruction meets preset conditions, replace the use of the destination operand by the target instruction with the use of the source operand, thereby replacing the associated variable in the target instruction and deleting redundant copy instructions.

[0108] Specifically, the compiler can obtain the set of aliases for the destination operand of the copy instruction and the value range of the copy instruction for that destination operand. It then determines whether a program instruction is a usage instruction for the destination operand within the copy instruction by checking if at least one program instruction performs a read operation within the set of aliases for that destination operand, and if that program instruction falls within the value range of the copy instruction for that destination operand. The value range of the copy instruction for that destination operand indicates the valid range of the variable's value set by the copy instruction. Optionally, the compiler can obtain the storage space of the destination operand of the copy instruction and use the operands of other program instructions whose storage space overlaps with that destination operand as aliases for the destination operand of the copy instruction.

[0109] If there exists at least one program instruction that performs a read operation on the alias set of the destination operand, and at least one program instruction is within the value range of the copy instruction for the destination operand, then the at least one program instruction is determined to be a usage instruction for the associated variable in the copy instruction. Further, if the at least one program instruction is a usage instruction for the destination operand in the copy instruction, then the at least one program instruction is determined to be the target instruction.

[0110] Optionally, the preset conditions that the copy instruction and at least one target instruction must satisfy may include:

[0111] The copy instruction governs all target instructions;

[0112] The substitution variable of a copy instruction is active at at least one target instruction; specifically, the source operand of a copy instruction is active at all target instructions.

[0113] The substitution variable of the copy instruction remains unchanged at both the copy instruction and at least one destination instruction; specifically, the source operand of the copy instruction remains unchanged at all destination instructions and the copy instruction; that is, the required value of the source operand of the copy instruction at the copy instruction is consistent with the required value of its source operand at all destination instructions.

[0114] The associated variables of a copy instruction remain unchanged in the copy instruction and at least one target instruction; specifically, the destination operand of a copy instruction remains unchanged in all target instructions and the copy instruction; that is, the destination operand of a copy instruction must reach a set value of the copy instruction in all target instructions.

[0115] As shown in Figure 5, the method of this disclosure can be used to optimize program instructions by following these steps:

[0116] S510. Traverse the program code to obtain at least one copy instruction, wherein each copy instruction is used to complete the copy of tensor data with the same data type.

[0117] S520: Obtain all aliases of the destination operand in the copy instruction;

[0118] S530. Determine whether there exists at least one program instruction that performs a read operation on the alias set of the destination operand, and the at least one program instruction is within the value range of the copy instruction for the destination operand; if yes, determine that the at least one program instruction is a usage instruction for the destination operand in the copy instruction, and determine the at least one program instruction as the target instruction, and continue to execute step S540; if no, determine that the at least one program instruction is not a usage instruction for the destination operand in the copy instruction.

[0119] S540. Determine whether the at least one target instruction is dominated by a copy instruction; if yes, continue to execute step S550; if no, determine that the copy instruction and the target instruction do not meet the preset conditions and the copy instruction cannot be deleted.

[0120] S550. Determine whether the copy instruction is the only one whose destination operand must reach a set value at any target instruction. If yes, it means that there are no other program instructions between the copy instruction and all target instructions that set the destination operand of the copy instruction. The destination operand of the copy instruction remains unchanged at the copy instruction and all its target instructions. Continue to execute step S560. If no, it is determined that the copy instruction and the target instruction do not meet the preset conditions and the copy instruction cannot be deleted.

[0121] S560. Determine whether the source operand of the copy instruction is active at all target instructions. If yes, determine that the copy instruction and the target instruction meet the preset conditions and continue to execute step S570. If no, determine that the copy instruction and the target instruction do not meet the preset conditions and the copy instruction cannot be deleted.

[0122] S570. Determine whether the required set value of the source operand of the copy instruction at the copy instruction and the required set value at any target instruction are consistent. If yes, it means that there are no other program instructions between the copy instruction and all target instructions that set the source operand of the copy instruction, and the source operand of the copy instruction remains unchanged at the copy instruction and all target instructions. Continue to execute step S580. If no, it is determined that the copy instruction and the target instruction do not meet the preset conditions and the copy instruction cannot be deleted.

[0123] S580. Replace the use of the destination operand in the target instruction with the use of the source operand in the copy instruction, and delete the copy instruction. Repeat the above operation until all copy instructions have been optimized.

[0124] For example, program code may include the following program instructions:

[0125] IN1: A = alloc(x);

[0126] IN2: D = alloc(y);

[0127] IN3: def; A1 = B * C;

[0128] IN4: def; D = A1;

[0129] IN5: use; E = F + D.

[0130] In this instruction, IN1 allocates storage space for variable A, and the storage space x corresponding to variable A can be [0, 127]. Similarly, IN2 allocates storage space for variable D, and the storage space y corresponding to variable D can be [128, 256]. IN3 assigns the product of tensor data B and C to A, that is, IN3 assigns a value to variable A1. IN3 is the assignment instruction for variable A1, and the storage space corresponding to variable A1 can be a subset of the storage space corresponding to variable A. For example, variable A1 points to the storage space [0, 63]. IN4 is a copy instruction, which assigns the value of variable A1 to variable D. IN4 is the assignment instruction for variable D, and also the usage instruction for variable A1; where A1 is the source operand of the copy instruction (i.e., A1 is the replacement variable of the copy instruction), and D is the destination operand of the copy instruction (i.e., D is the associated variable of the copy instruction). IN5 is the usage instruction for variables D and F, and also the assignment instruction for variable E.

[0131] The compiler can obtain the setpoint information of each variable in the program instructions based on the setpoint analysis described above, and determine the setpoints that have been reached and must be reached at each program instruction. Specifically,

[0132] At program instruction IN3, the set value of variable A1 is {IN3}, and the set value of variable A1 must be {IN3}; the set value range of variable A1 for program instruction IN3 is {IN3}.

[0133] At program instruction IN4, since no other program instruction sets a value for variable A1 before program instruction IN3, the value corresponding to variable A1 must reach the set value {IN3} at program instruction IN4. The set value range of variable A1 set by program instruction IN3 is {IN3, IN4}.

[0134] At program instruction IN4, the value that variable D must reach is {IN4}. The range of values ​​that variable D must reach is {IN4}. Program instruction IN4 sets the value of variable D to {IN4}.

[0135] At program instruction IN5, since there are no other program instructions that affect variable D before IN5, the value corresponding to variable D must reach {IN4}. The value range of variable D for program instruction IN5 is {IN4, IN5}.

[0136] At program instruction IN5, since no other program instructions modify variable A1 before IN5, the value corresponding to variable A1 must reach the set value {IN3}. The set value range of variable A1 for program instruction IN3 is {IN3, IN4, IN5}.

[0137] The compiler can obtain the aliases for variables A1 and D in the copy instruction, denoted as {group-alias-A1} and {group-alias-D}, respectively. The alias for variable A1, {group-alias-A1}, can be written as {A, A1}. Then, based on these aliases for variables A1 and D, and the value information of various variables in the program code, the compiler can determine the data dependencies between program instructions, and thus determine the target instruction corresponding to the copy instruction.

[0138] Specifically, if the compiler determines that the program instruction's read operation on the copy instruction's {group-alias-D} is within the range of the copy instruction's value for the variable D, then the program instruction is recorded as the use instruction for variable D {use-D}, and this program instruction is identified as the target instruction. As shown in the code above, the program instruction IN5's read operation on the variable D is within the range {IN4, IN5} of the copy instruction IN4's value for variable D; therefore, the program instruction IN5 is recorded as the use instruction for variable D, and this program instruction IN5 is identified as the target instruction.

[0139] Furthermore, the compiler can determine whether the copy instruction and the target instruction satisfy preset conditions. Referring to the variable assignment information above, at copy instruction IN4, the required value for variable A1 is {IN3}; at program instruction IN5, the required value for variable A1 is also {IN3}, indicating that variable A1 remains unchanged at both copy instruction IN4 and target instruction IN5. Also, at both copy instruction IN4 and target instruction IN5, the required value for variable D is {IN4}, indicating that variable D remains unchanged at both copy instruction IN4 and target instruction IN5. Furthermore, variable A1 is not "killed" by the assignments of other program instructions between target instruction IN5 and copy instruction IN4, meaning variable A1 remains active at target instruction IN5. Simultaneously, in the control flow graph, copy instruction IN4 dominates target instruction IN5; therefore, the compiler can determine that the preset conditions are satisfied between copy instruction IN4 and target instruction IN5.

[0140] Furthermore, when the copy instruction and the target instruction meet the aforementioned preset conditions, the compiler can replace the variable D in the program instruction IN5, that is, replace the target instruction's use of the associated variable D with the use of the replacement variable A1, and delete the redundant copy instruction IN4.

[0141] The optimized program instructions can be represented as follows:

[0142] IN1: def; A = alloc(x);

[0143] IN2: def; D = alloc(y);

[0144] IN3: def; A1 = B * C;

[0145] IN4: use; E = F + A1.

[0146] For example, the program code includes the following program instructions:

[0147] IN1: A = alloc(x);

[0148] IN2: D = alloc(y);

[0149] IN3: def; A1 = B * C;

[0150] IN4: D = A1;

[0151] IN5:def; A2 = B + C;

[0152] IN6: use; E = F + D.

[0153] In this embodiment, program instruction IN1 allocates storage space for variable A, and the storage space x corresponding to variable A can be [0, 127]. Similarly, program instruction IN2 allocates storage space for variable D, and the storage space y corresponding to variable D can be [128, 256]. Program instruction IN3 assigns a value to variable A1. Program instruction IN3 is the assignment instruction for variable A1, and the storage space corresponding to variable A1 can be a subset of the storage space corresponding to variable A. For example, variable A1 points to the storage space [0, 63]. Program instruction IN6 is the usage instruction for variable D, and the copy instruction IN4 governs program instruction IN6. Unlike the above embodiment, program instruction IN5 is added after the copy instruction IN4. This program instruction IN5 is used to assign the sum of tensor data B and C to A2, that is, program instruction IN5 assigns a value to variable A2. Program instruction IN5 is the assignment instruction for variable A2, and the storage space corresponding to variable A2 can be [0, 128]. Since the value assigned to variable A2 by program instruction IN5 (value storage space [0,128]) partially overlaps with the value assigned to variable A1 by program instruction IN3 (value storage space [0,63]), the value assigned to variable A1 by program instruction IN3 is killed. Therefore, the value assigned to variable A1 by program instruction IN3 cannot reach the target instruction IN6, and variable A1 is no longer active at the target instruction IN6. At this point, the compiler can determine that the preset conditions between the copy instruction and the target instruction IN6 are not met, and the deletion of the copy instruction cannot be achieved.

[0154] In the above embodiments, the target instruction must be dominated by the copy instruction, but this condition is difficult to meet in some scenarios. Furthermore, in some scenarios, the replacement variable may not survive to the target instruction, which means that the above optimization method cannot achieve the deletion and optimization of the copy instruction. For example,

[0155] %0 = alloc()

[0156] scf.foreach_thread(%arg)in(...){

[0157] %1=subview%0[%arg][...][...]

[0158] copy%1<-%res

[0159] }

[0160] copy%2<-%0

[0161] Here, variable %0 points to a memory block, and variable %1 points to a portion of the memory space of variable %0, denoted as the sub-memory space. The copy instruction `copy%1<-%res` assigns the value of variable %res to variable %1. This copy instruction can be executed multiple times to complete the assignment of the value of variable %0. The copy instruction `copy%2<-%0` assigns the value of variable %0 to variable %2.

[0162] The optimization method described in the above embodiments is insufficient to optimize and delete copy instructions in the program code. Therefore, the program instruction optimization method of this disclosure can further determine the target instruction by searching for the value of the copy instruction, and when a preset condition is met between the copy instruction and the target instruction, modify the variable of the target instruction's value according to the copy instruction, and correspondingly delete redundant copy instructions.

[0163] Following the previous example, the program instruction optimization method of this disclosure embodiment can optimize the program instructions in the above program code. The optimized program code can be represented as follows:

[0164] %2 = alloc()

[0165] scf.foreach_thread(%arg)in(...){

[0166] %1=subview%2[%arg][...][...]

[0167] copy%1<-%res

[0168] }

[0169] In one embodiment, the method of this application can also implement a reverse copy deletion process, that is, according to the execution order of program instructions, the variables in the earlier target instruction are replaced according to the copy instruction, and the copy instructions after the target instruction are deleted. Here, the associated variable of the copy instruction is the source operand of the copy instruction, and the replacement variable of the copy instruction is the destination operand of the copy instruction. The target instruction is the instruction that sets the value of the source operand in the copy instruction. In the embodiments of this disclosure, when a preset condition is met between the copy instruction and the target instruction, the compiler can replace the set value of the destination operand of the copy instruction in the target instruction with the set value of the source operand of the copy instruction, thereby realizing the replacement of the associated variable in the target instruction and deleting redundant copy instructions.

[0170] Specifically, the compiler can obtain at least one program instruction used to perform a write operation on the alias set of the source operands in the copy instruction, and the arrival value of the source operands in the copy instruction at the copy instruction. If there exists at least one program instruction that performs a write operation on the alias set of the source operands in the copy instruction, and at least one program instruction belongs to the arrival value of the alias set of the source operands in the copy instruction at the copy instruction, then the program instruction is determined to be the value setting instruction of the source operands in the copy instruction, and the program instruction is identified as the target instruction. The compiler can obtain the storage space of the source operands of the copy instruction and use the operands of other program instructions whose storage space overlaps with that of the source operands as aliases of the source operands of the copy instruction.

[0171] In this embodiment of the application, the preset conditions that the copy instruction and the target instruction must satisfy may include:

[0172] The copy instruction is followed by all target instructions;

[0173] The substitution variable of a copy instruction is active at at least one target instruction; specifically, the destination operand of a copy instruction is active at all target instructions.

[0174] The substitution variable of a copy instruction remains unchanged at the copy instruction and at least one target instruction. Specifically, the destination operand of the copy instruction remains unchanged at both the copy instruction and all target instructions. That is, the required value for the destination operand at the entry point of the copy instruction is consistent with the required value at the target instruction. This indicates that no other program instruction between the target instruction and the copy instruction effectively assigns a value to the substitution variable. The required values ​​at the target instruction and at the entry point of the copy instruction can be empty sets.

[0175] There is no designated program instruction between at least one target instruction and the copy instruction, where the designated program instruction is the instruction that uses the destination operand of the copy instruction, and the copy instruction subsequently governs the designated program instruction. Specifically, there is no designated program instruction between the copy instruction and any of the target instructions, indicating that there are no other program instructions between all target instructions and the copy instruction that use the destination operand of the copy instruction.

[0176] As shown in Figure 6, the method of this disclosure can be used to optimize program instructions by following these steps:

[0177] S610. Traverse the program code to obtain at least one copy instruction. Each copy instruction is used to complete the copy of tensor data with the same data type.

[0178] S620: Obtain all aliases of the source operand in the copy instruction;

[0179] S630. Determine whether there exists at least one program instruction that performs a write operation on all aliases of the source operand, and whether the at least one program instruction is a setpoint for all aliases of the source operand at the copy instruction. If yes, determine that the at least one program instruction is a setpoint instruction for the source operand in the copy instruction, and determine the at least one program instruction as the target instruction, and continue to execute step S640. If no, determine that the program instruction is not a setpoint instruction for the source operand in the copy instruction.

[0180] S640. Determine whether at least one target instruction is dominated by a copy instruction; if yes, continue to step S650; if no, determine that the copy instruction and the target instruction do not meet the preset conditions and the copy instruction cannot be deleted.

[0181] S650. Determine whether the destination operand of the copy instruction is active at the target instruction. If yes, continue to step S660. If no, determine that the copy instruction and the target instruction do not meet the preset conditions and the copy instruction cannot be deleted.

[0182] S660. Determine whether the required set value of the source operand of the copy instruction at the entry point of the copy instruction is consistent with the required set value at the target instruction. If yes, it means that there are no other program instructions between the target instruction and the copy instruction to effectively set the value of the replacement variable, thus it can be determined that the source operand of the copy instruction is consistent at the copy instruction and the target instruction, and continue to execute step S670. If no, it is determined that the copy instruction and the target instruction do not meet the preset conditions, and the copy instruction cannot be deleted.

[0183] S670. Determine whether a specified program instruction exists between the copy instruction and the target instruction. If yes, determine that the copy instruction and the target instruction do not meet the preset conditions and the copy instruction cannot be deleted; otherwise, determine that the copy instruction and the target instruction meet the preset conditions and continue to execute step S680.

[0184] Specifically, the compiler can determine the existence of specified program instructions between the copy instruction and the target instruction when it determines that there is a use instruction for the destination operand in the copy instruction, and that the use instruction for the destination operand in the copy instruction is dominated by the successor of the copy instruction.

[0185] S680. Replace the fixed value of the source operand in the target instruction with the fixed value of the destination operand in the copy instruction, and delete the copy instruction. Repeat the above operation until all copy instructions have been optimized.

[0186] For example, program code may include the following program instructions:

[0187] IN1: D = alloc();

[0188] IN2: A = alloc();

[0189] IN3: def; A1 = B * C;

[0190] IN4: def; A2 = B+1;

[0191] IN5: D = A.

[0192] In this program instruction, IN1 allocates storage space for variable D, where the storage space for variable D can be [128, x], and x is an unknown. IN2 allocates storage space for variable A, where the storage space for variable A can be [0, 127]. IN3 assigns the product of tensor data B and C to A1, meaning IN3 assigns a value to variable A1. IN3 is a value assignment instruction for variable A1, and the storage space for variable A1 can be a subset of the storage space for variable A; for example, variable A1 points to the storage space [0, 63]. Similarly, IN4 assigns the sum of tensor data B and 1 to A2, meaning IN4 is a value assignment instruction for variable A2. The storage space for variable A2 can be a subset of the storage space for variable A; for example, variable A2 points to the storage space [64, 127]. The program instruction IN5 is a copy instruction used to assign the value of variable A to variable D. The copy instruction IN4 is the assignment instruction for variable D, and the copy instruction IN5 is the usage instruction for variable A. Here, A is the source operand of the copy instruction (i.e., A is the replacement variable of the copy instruction), and D is the destination operand of the copy instruction (i.e., D is the associated variable of the copy instruction).

[0193] The compiler can obtain the set values ​​of various variables in the program instructions. Specifically:

[0194] At program instruction IN3, the value that variable A1 must reach is {IN3}.

[0195] At program instruction IN4, the value that variable A2 must reach is {IN4}, the value that variable A2 reaches is {IN4}, and the value that variable A1 reaches is {IN3}.

[0196] At program instruction IN5, the value that variable D must reach is {IN5}, the value that variable D reaches is {IN5}, the value that variable A2 reaches is {IN4}, and the value that variable A1 reaches is {IN3}.

[0197] The compiler can obtain the aliases for variables A and D in the copy instruction, denoted as {group-alias-A} and {group-alias-D} respectively. {group-alias-A} can include {A, A1, A2}. Then, based on these aliases and the value information of each variable in the program code, the compiler can determine the data dependencies between program instructions and thus identify the target instruction corresponding to the copy instruction.

[0198] Specifically, if the compiler determines that a program instruction performs a write operation on {group-alias-A}, and that the program instruction is a finalized value of {group-alias-A} at the copy instruction, then the program instruction is recorded as the finalized value instruction {define-A} for variable A, and this finalized value instruction is identified as the target instruction. As shown in the code above, program instructions IN3 and IN4 perform a write operation on the variable {group-alias-A}, and at the copy instruction IN5, the finalized value of variable A1 is {IN3}, and the finalized value of variable A2 is {IN4}. Therefore, program instructions IN3 and IN4 are recorded as finalized value instructions for variable A, and these program instructions IN3 and IN4 are the target instructions.

[0199] Furthermore, the compiler can determine whether a preset condition is met between the copy instruction and at least one target instruction. Referring to the variable's value information above, at the entry point of the copy instruction IN5, the required value for variable D and the required value for variable D at all target instructions IN3 and IN4 are both empty sets, indicating that variable D remains unchanged at the entry point of the copy instruction and at all target instructions. Moreover, variable D is active at target instructions IN3 and IN4. Furthermore, there are no instructions that use variable D between any target instructions IN3 and IN4 and the copy instruction IN5, and these instructions subsequently dominate the copy instruction IN5; there are also no instructions that set the value of variable D between any target instructions IN3 and IN4 and the copy instruction IN5. Simultaneously, in the control flow graph, the copy instruction IN5 subsequently dominates target instructions IN3 and IN4. At this point, the compiler can determine that the preset condition is met between the copy instruction IN5 and the target instructions IN3 and IN4.

[0200] Furthermore, when the aforementioned preset conditions are met between the copy instruction and the target instruction, the compiler can replace the aliases A1 and A2 of variable A in the target instructions IN3 and IN4, that is, replace the fixed values ​​of variables A1 and A2 in the target instructions with the fixed values ​​of the replacement variable D, and delete the redundant copy instruction IN5.

[0201] The optimized program instructions can be represented as follows:

[0202] IN1: D = alloc();

[0203] IN2: A = alloc();

[0204] IN3: def; D1 = B*C;

[0205] IN4:def; D2 = B+1.

[0206] As can be seen from the above, the optimized program instruction IN2 re-sets the value of variable D.

[0207] For example, the program code includes the following program instructions:

[0208] IN1: D = alloc();

[0209] IN2: A = alloc();

[0210] IN3: def; A1 = B * C;

[0211] IN4: def; A2 = B+1;

[0212] IN5: use; E = DF;

[0213] IN6: D = A.

[0214] In this implementation, program instruction IN1 allocates storage space for variable D, where the storage space for variable D can be [128, x], and x is an unknown. Program instruction IN2 allocates storage space for variable A, where the storage space for variable A can be [0, 127]. Program instruction IN3 is the assignment instruction for variable A1, where the storage space for variable A1 can be a subset of the storage space for variable A, for example, variable A1 points to storage space [0, 63]. Program instruction IN4 is the assignment instruction for variable A2, where the storage space for variable A2 can be a subset of the storage space for variable A, for example, variable A2 points to storage space [64, 127]. Unlike the previous embodiment, program instruction IN5 is added before copy instruction IN6. Program instruction IN5 is the instruction for using variable D, and in the control flow graph, copy instruction IN6 is followed by program instruction IN5. In this case, the compiler can determine that there is a specified program instruction between copy instruction IN6 and target instructions IN3 and IN4, thus determining that the preset conditions between the copy instruction and the target instructions are not met, and the copy instruction cannot be deleted.

[0215] The method disclosed herein replaces the associated variables in the target instruction according to the copy instruction while ensuring the normal operation of the program code. After the modification of the target instruction is completed, the redundant copy instruction can be deleted, thereby optimizing memory access by reducing the copy instruction.

[0216] This disclosure also provides a program instruction optimization apparatus, including a processor and a memory. The memory stores computer programs or instructions. When the processor executes the computer program in the memory, it implements the program instruction optimization method as described in the above embodiments. Specific implementations of this program instruction optimization method can be found in the description above.

[0217] This disclosure also provides a computer program product comprising a computer program or instructions that, when executed by a processor, implement the program instruction optimization method as described in the above embodiments. Optionally, the computer program product may be a compiler. The compiler may run on a processor and is used to convert the above program code into hardware instructions executable by computer hardware.

[0218] This disclosure also provides a computer-readable storage medium for storing computer programs or instructions, wherein when the computer program in the computer-readable storage medium is executed by one or more processors, the program instruction optimization method as described in the above embodiments is implemented.

[0219] It should be clear that the working principle of the computer program product and the computer program stored in the storage medium is basically the same as the execution process of the method steps in the above embodiments, as can be seen in the description above.

[0220] The storage medium can be a computer-readable storage medium, such as ferromagnetic random access memory (FRAM), read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, magnetic surface memory, optical disc, or compact disk-read-only memory (CD-ROM); or it can be any device that includes one or any combination of the above-mentioned memories.

[0221] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0222] The embodiments described above are merely illustrative of several implementations of this disclosure, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this disclosure, and these all fall within the protection scope of this disclosure. Therefore, the protection scope of this patent should be determined by the appended claims.

Claims

1. A method for optimizing program instructions, characterized in that, The method includes: Obtain copy instructions and at least one target instruction from the program code; wherein the copy instructions include associated variables and substitution variables, and the target instruction contains the associated variables; If a preset condition is met between the copy instruction and the at least one target instruction, then the associated variable in the target instruction is replaced according to the copy instruction, and the copy instruction is deleted.

2. The method according to claim 1, characterized in that, The step of replacing the associated variable in the target instruction according to the copy instruction further includes: Replace the associated variable in the target instruction with the replacement variable in the copy instruction.

3. The method according to claim 1 or 2, characterized in that, The preset conditions include the following conditions: The copy instruction has a dominant relationship with the at least one target instruction in the control flow; The replacement variable of the copy instruction is active at the target instruction; The variables of the copy instruction remain unchanged at the copy instruction and the target instruction.

4. The method according to claim 3, characterized in that, The method further includes: Obtain the required fixed value that the variable in the copy instruction must reach at the copy instruction and the required fixed value that the variable in the target instruction must reach; If the variable at the copy instruction must reach a certain value and the variable at the target instruction must reach a certain value, then the variable of the copy instruction is determined to remain unchanged at both the copy instruction and the target instruction.

5. The method according to any one of claims 1-4, characterized in that, The associated variable of the copy instruction is the destination operand of the copy instruction, and the replacement variable of the copy instruction is the source operand of the copy instruction.

6. The method according to claim 5, characterized in that, The method further includes: If the program instruction is a usage instruction for the associated variable, then the program instruction is determined as the target instruction.

7. The method according to claim 6, characterized in that, The method further includes: Obtain the set of aliases for the associated variables of the copy instruction and the value range of the associated variables for the copy instruction; If there exists a program instruction that performs a read operation on the set of aliases of the associated variable, and the program instruction is within the value range of the copy instruction for the associated variable, then the program instruction is determined to be a usage instruction for the associated variable.

8. The method according to claim 3, characterized in that, The associated variable of the copy instruction is the source operand of the copy instruction, and the replacement variable of the copy instruction is the destination operand of the copy instruction.

9. The method according to claim 8, characterized in that, The method further includes: If the program instruction is a value setting instruction for the associated variable, then the program instruction is determined as the target instruction.

10. The method according to claim 9, characterized in that, The method further includes: Obtain the set of aliases for the associated variables of the copy instruction and the value range of the associated variables for the copy instruction; If there exists a program instruction that performs a write operation on the set of aliases of the associated variable, and the program instruction belongs to the variable reaching a set value at the copy instruction, then the program instruction is determined to be the set value instruction of the associated variable.

11. The method according to claim 8, characterized in that, The preset conditions also include: There is no designated program instruction between the target instruction and the copy instruction; wherein, the designated program instruction is the instruction for using the destination operand of the copy instruction, and the designated program instruction subsequently governs the copy instruction.

12. A program instruction optimization device, characterized in that, It includes a processor and a memory, the memory being used to store computer programs or instructions, and when the processor executes the computer program in the memory, it implements the program instruction optimization method as described in any one of claims 1-11.

13. A computer-readable storage medium, characterized in that, The computer-readable storage medium is used to store computer programs or instructions, which, when executed by one or more processors, implement the program instruction optimization method as described in any one of claims 1-11.

14. A computer program product, characterized in that, The computer program product includes a computer program or instructions, which, when executed by a processor, implement the program instruction optimization method as described in any one of claims 1-11.

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