Access request processing method and apparatus, and electronic device

Abstract

The present application relates to the technical field of computers. Provided are an access request processing method and apparatus, and an electronic device, which are used for solving the problem of user experience being degraded due to an existing optimization mode affecting the performance of an entire system. The method comprises: acquiring a plurality of access requests of a target program; on the basis of state information of the target program, adjusting the priority of at least one of the plurality of access requests, so as to obtain priority information of the plurality of access requests, wherein the state information comprises at least one of the following: system-level running state information, program-level running state information, or importance information; and sending the plurality of access requests and the priority information, wherein the priority information is used for indicating priorities for scheduling the plurality of access requests.

Description

Method, device and electronic equipment for processing access request

[0001] The present application claims priority to the Chinese patent application No. 202410726361.8, filed on June 5, 2024, and entitled "Method, device and electronic equipment for processing access request", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] The present application relates to the technical field of computer, and in particular to a method, device and electronic equipment for processing access request. BACKGROUND

[0003] The memory wall problem is a major performance bottleneck of an electronic computer system, that is, the speed of reading data from a memory system by a processor cannot match the speed of processing data by the processor, resulting in that the computing performance of the electronic computer system is limited. The existing technology usually adopts a method of improving the read / write performance of the memory system to alleviate the memory wall problem. In order to improve the read / write performance of the memory system, the access scheduling strategy of the memory system can be optimized. The core problem to be solved by the access scheduling strategy is: when the memory system receives multiple access requests in a short time window, what order should the memory system process the multiple access requests.

[0004] In a conventional optimization method, the optimization target of the access strategy can be summarized as: the total time consumed by the memory system to complete all memory access requests is the shortest, or the memory access requests completed by the memory system in a unit of time is the most, that is, the highest read / write bandwidth of the memory system is achieved. Although the optimization method can improve the read / write performance of the memory system, it will affect the performance of the entire system, thereby reducing the user experience. SUMMARY

[0005] The present application provides a method, device and electronic equipment for processing access request, which is used to solve the problem that the existing optimization method affects the performance of the entire system, resulting in reduced user experience.

[0006] To achieve the above object, the embodiments of the present application adopt the following technical solutions:

[0007] In a first aspect, a method for processing access request is provided. The method comprises: obtaining a plurality of access requests of a target program; adjusting a priority of at least one access request in the plurality of access requests according to state information of the target program to obtain priority information of the plurality of access requests; wherein the state information comprises at least one of the following: system-level running state information, program-level running state information, or importance information; and sending the plurality of access requests and the priority information, the priority information being used to indicate the priority of scheduling the plurality of access requests.

[0008] In the technical solution, after the target program triggers a plurality of access requests, the priority of the plurality of access requests can be adjusted according to one or more of the system-level running state information, the program-level running state information or the importance information of the target program, for example, the priority of one or more access requests is increased or the priority of one or more access requests is decreased, so that the memory resources can be allocated more effectively according to different characteristics of the program and different requirements for memory access, the scheduling order of the access requests is optimized from the perspective of the whole system, the performance of the whole system is improved without changing the scheduling strategy of the memory system, and the user experience is improved.

[0009] In any possible implementation manner of the first aspect, if the state information includes the system-level running state information, the system-level running state information is used to indicate that the target program is in foreground running or background running; and the priority of at least one access request in the plurality of access requests is adjusted according to the state information of the target program, including: if the target program is in foreground running, the priority of at least one access request in the plurality of access requests is increased; and if the target program is in background running, the priority of at least one access request in the plurality of access requests is decreased. The above possible implementation manner can increase the priority of the access request when the target program is in foreground running, and decrease the priority of the access request when the target program is in background running, so that the running speed and performance of the foreground running program can be improved, and the performance of the whole system and the user experience can be improved.

[0010] In any possible implementation manner of the first aspect, if the state information further includes the program-level running state information, the program-level running state information is used to indicate that the target program is front-end limited or back-end limited; and the priority of at least one access request in the plurality of access requests is increased, including: if the target program is front-end limited, the priority of at least one access request corresponding to instruction access in the plurality of access requests is increased; and if the target program is back-end limited, the priority of at least one access request corresponding to data access in the plurality of access requests is increased. The above possible implementation manner can set the priority of the access request of the target program differently according to the characteristics of the target program, so that the memory resources can be allocated more effectively, and the overall performance of the system can be improved.

[0011] In any possible implementation form of the first aspect, if the state information comprises the importance information, the adjusting the priority of the at least one of the plurality of access requests according to the state information of the target program comprises: increasing the priority of the at least one of the plurality of access requests if the importance information indicates that the importance of the target program is important. The above possible implementation form can adjust the priority of the access request of the target program according to the importance of the target program, and can further improve the access of the program with higher importance, thereby improving the user experience.

[0012] In any possible implementation form of the first aspect, the at least one access request is generated based on a user operation. The above possible implementation form can adjust the priority of the access request of the target program according to the indication of the user, and can further improve the user experience.

[0013] In any possible implementation form of the first aspect, the target program comprises a plurality of threads, and the plurality of access requests comprise access requests triggered by the plurality of threads; the at least one access request is an access request triggered by at least one thread of the plurality of threads. The above possible implementation form can adjust the plurality of access requests based on a more fine-grained thread level, and can set the priority of the access request of the plurality of threads differently according to the characteristics of the plurality of threads, thereby more effectively allocating memory resources and improving the overall performance of the system.

[0014] In a second aspect, an access request processing apparatus is provided, which comprises: an obtaining module configured to obtain a plurality of access requests of a target program; an adjusting module configured to adjust the priority of at least one of the plurality of access requests according to state information of the target program, to obtain priority information of the plurality of access requests; wherein the state information comprises at least one of the following: system-level running state information, program-level running state information, or importance information; and a sending module configured to send the plurality of access requests and the priority information, the priority information being used to indicate the priority of the plurality of access requests.

[0015] In any possible implementation form of the second aspect, if the state information comprises the system-level running state information, the system-level running state information is used to indicate that the target program is running in the foreground or in the background; the adjusting module is further configured to increase the priority of the at least one of the plurality of access requests if the target program is running in the foreground; and the adjusting module is further configured to decrease the priority of the at least one of the plurality of access requests if the target program is running in the background.

[0016] In a possible implementation form of the second aspect, if the state information further comprises the program-level running state information, the program-level running state information is used to indicate that the target program is front-end limited or back-end limited; the adjustment module is further configured to increase the priority of at least one access request corresponding to instruction access in the plurality of access requests if the target program is front-end limited; the adjustment module is further configured to increase the priority of at least one access request corresponding to data access in the plurality of access requests if the target program is back-end limited.

[0017] In a possible implementation form of the second aspect, if the state information comprises the importance information; the adjustment module is further configured to increase the priority of at least one access request in the plurality of access requests if the importance information is used to indicate that the importance of the target program is important.

[0018] In a possible implementation form of the second aspect, the at least one access request is generated based on a user operation.

[0019] In a possible implementation form of the second aspect, the target program comprises a plurality of threads, and the plurality of access requests comprise access requests triggered by the plurality of threads; the at least one access request is an access request triggered by at least one thread in the plurality of threads.

[0020] A third aspect provides an electronic device, which comprises a processor and a memory, the processor can be the access request processing apparatus provided in the second aspect or any possible implementation form of the second aspect, and the memory stores instructions, which, when executed by the processor, implement the access request processing method provided in the first aspect or any possible implementation form of the first aspect.

[0021] A fourth aspect provides a computer-readable storage medium, which stores a computer program or instructions, and when the computer program or instructions are executed, the access request processing method provided in the first aspect or any possible implementation form of the first aspect is implemented.

[0022] A fifth aspect provides a computer program product, which comprises a computer program (also referred to as code or instructions), and when the computer program is executed, the computer program causes a computer to execute the access request processing method provided in the first aspect or any possible implementation form of the first aspect.

[0023] It can be understood that the access request processing apparatus, the electronic device, the computer-readable storage medium and the computer program product provided in the above embodiments can achieve the beneficial effects corresponding to the access request processing method provided in the above embodiments, which will not be described herein. BRIEF DESCRIPTION OF DRAWINGS

[0024] Fig. 1 is a structural schematic diagram of an electronic device according to an embodiment of the present application;

[0025] Fig. 2 is a structural schematic diagram of a storage device according to an embodiment of the present application;

[0026] Fig. 3 is a structural schematic diagram of a processing device according to an embodiment of the present application;

[0027] Fig. 4 is a flowchart of a method for processing an access request according to an embodiment of the present application;

[0028] Fig. 5 is a flowchart of another method for processing an access request according to an embodiment of the present application;

[0029] Fig. 6 is a flowchart of still another method for processing an access request according to an embodiment of the present application;

[0030] Fig. 7 is a schematic diagram comparing the effect of a conventional processing scheme and the processing scheme according to an embodiment of the present application. DETAILED DESCRIPTION

[0031] The making and using of various embodiments are discussed in detail below. It should be appreciated that the specific embodiments discussed are merely illustrative of specific ways to make and use the application and this technology and do not limit the scope of the present application.

[0032] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art.

[0033] Circuits or other components can be described as or said to be "configured to" perform one or more tasks. In this context, "configured to" is used to mean that the circuit / component includes structure (e.g., circuitry) that performs the task(s) during operation. As such, the circuit / component can be referred to as being configured to perform the task(s) even when the task(s) are not currently being performed. In some contexts, a circuit / component can be described as being configured to perform a task even when the task is not currently being performed, and the task is not a controlling task of the circuit / component. For example, a processor can be said to be configured to execute a program task where the program is not currently being executed.

[0034] The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. In the present application, "at least one" means one or more, and "multiple" means two or two or more. The association relationship of the associated objects is described by "and / or", which means that there can be three kinds of relationships, for example, A and / or B can represent the following three cases: A exists alone, A and B exist together, and B exists alone, where A and B can be singular or plural. The character " / " generally represents an "or" relationship between the front and rear associated objects. "At least one of the following" or similar expressions means any combination of these items, including any combination of single item or multiple items. For example, at least one of a, b or c can represent: a, b, c, a and b, a and c, b and c, a, b and c; where a, b and c can be single or multiple.

[0035] The embodiments of the present application use "first" and "second" and the like to distinguish objects with similar names or functions or roles. Those skilled in the art can understand that "first" and "second" and the like do not limit the quantity and execution order. The word "coupled" is used to represent electrical connection, including direct connection through wires or connection terminals or indirect connection through other devices. Therefore, "coupled" should be regarded as a broad electronic communication connection.

[0036] It should be noted that in the present application, the words "exemplary" or "for example" are used to mean serving as an example, instance or illustration. Any embodiment or design solution described as "exemplary" or "for example" in the present application should not be interpreted as more preferred or more advantageous than other embodiments or design solutions. Rather, the use of "exemplary" or "for example" is intended to present the relevant concept in a specific manner.

[0037] Before introducing the embodiments of the present application, the application scenarios involved in the present application will be introduced and described first.

[0038] The memory wall problem is a major performance bottleneck of an electronic computer system, that is, the speed of reading data from the memory system by the processor cannot match the speed of processing data by the processor, resulting in that the computing performance of the electronic computer system is limited. The speed of reading data from the memory system by the processor is related to the time consumption of reading data from the memory system and the amount of concurrently read data. For example, the processor can be a central processing unit (CPU).

[0039] To alleviate the memory wall problem, one aspect is to improve the absolute performance of the memory system, and another aspect is to improve the read-write performance of the memory system. For improving the absolute performance of the memory system, the improvement can be achieved by improving the hardware architecture and manufacturing process. For example, a larger, faster and more hierarchical cache system is provided to improve the read-write speed of the memory, a more efficient cache replacement strategy is designed to improve the use efficiency of the cache system, or an advanced packaging technology (such as 3D stacking) is used to improve the capacity, read-write speed and bandwidth of the dynamic random access memory (DRAM). However, due to the cost, power consumption, heat dissipation, chip area and manufacturing process realizability, the improvement of the absolute performance of the memory system is limited. For improving the read-write performance of the memory system, the access scheduling strategy of the memory system can be optimized. The core problem to be solved by the access scheduling strategy is: when the memory system receives multiple access requests in a short time window, the memory system should process the multiple access requests in what order.

[0040] In the traditional optimization method, the optimization target of the access strategy can be summarized as: the total time consumed by the memory system to complete all memory access requests is the shortest, or the memory system completes the most memory access requests in a unit of time, that is, the highest read-write bandwidth of the memory system is achieved. However, since each memory access request has different priority / importance, the optimization target can maximize the read-write performance of the memory system, but does not consider the priority / importance of the memory access request, does not take the optimal performance of the entire system as the optimization target, and may affect the performance of the entire system (including the memory system and the CPU system) and the user experience.

[0041] In the related art, the priority / importance of the memory access request can be marked by a quality of service (QoS) value. For example, when the priority of each memory access request is marked by a QoS value, if the QoS value indicates that the priority of a certain memory access request is higher, the priority weight of the memory access request is greater, and the memory access request can be scheduled and processed in priority without considering other scheduling sequence influencing factors; if the QoS value indicates that the priority of a certain memory access request is lower, the priority weight of the memory access request is smaller, and the memory access request can need to wait until all other memory access requests are processed before being scheduled and processed, and the waiting time of the memory access request can be further extended if other memory access requests with higher priority are generated during the waiting process. It can be understood that in actual applications, when scheduling the memory access request, the scheduling strategy also needs to be considered, and the factors influencing the scheduling sequence are not limited to the size of the priority weight. The above example of the influence of the priority weight on the scheduling sequence does not limit the embodiments of the present application.

[0042] In this case, the optimization target of the access strategy can be further adjusted to be the shortest weighted total time consumed by the memory system to complete all memory access requests. The optimization manner can also be adjusted accordingly, that is, the scheduling sequence of the current memory access request and the received memory access requests is determined based on the current received memory access request and the QoS value thereof, the number of the received memory access requests and the corresponding QoS values. However, in the above scheme, the QoS value of each memory access request is fixed, and the running state of the program itself does not affect the priority of the memory access request, which can cause negative effects on the performance of the entire system and reduce the user experience. The scheme still does not take the performance of the entire system and the user experience as the optimization target.

[0043] In view of this, the embodiments of the present application provide an access request processing method for solving the problem that the existing optimization manner can affect the performance of the entire system and reduce the user experience. The method can be applied to various electronic devices with a processing device, which can be a CPU.

[0044] Optionally, the electronic device can include, but is not limited to, a mobile phone, a tablet computer, a notebook computer, a palm computer, a mobile internet device (MID), a camera, a wearable device (for example, a smart watch, a smart bracelet, a pedometer, etc.), a sound equipment, an audio and video player, a set-top box, a game machine, a printer, a mouse, a keyboard, a vehicle-mounted device (for example, a device on a vehicle such as a car, an airplane, a ship, a train, and a high-speed rail), a wireless terminal in virtual reality (VR), a wireless terminal in augmented reality (AR), a wireless terminal in industrial control, a smart home device (for example, a refrigerator, a television, an air conditioner, an electricity meter, etc.), a smart robot, a workshop device, a wireless terminal in self-driving, a wireless terminal in remote medical surgery, a wireless terminal in a smart grid, a wireless terminal in transportation safety, a wireless terminal in a smart city, or a wireless terminal in a smart home, a flight device (for example, a smart robot, a hot air balloon, a drone, an airplane), and the like.

[0045] The structure of the electronic device will be described below by taking the electronic device as a mobile phone as an example. As shown in FIG. 1, the electronic device can include radio frequency (RF) circuit 110, memory 120, input unit 130, display unit 140, sensor 150, audio circuit 160, processor 170, and power supply 180, and the like. Optionally, the processor 170 can be the processing apparatus in the above.

[0046] The RF circuit 110 can be used to transceive information, or receive or send a signal in a call process. In particular, after receiving the downlink information of a base station, the processor 170 processes it; in addition, the uplink data is sent to the base station. Generally, the RF circuit 110 includes, but is not limited to, an antenna, at least one amplifier, a transceiver, a coupler, a low noise amplifier (LNA), a duplexer, and the like. In addition, the RF circuit 110 can also communicate with a network and other devices through a wireless communication mode.

[0047] The memory 120 can be used to store data, software programs, and modules; and mainly includes a program storage area and a data storage area, wherein the program storage area can store an operating system and application programs required by at least one function, such as a sound playing function, an image playing function, etc.; and the data storage area can store data created according to the use of the electronic device, such as audio data, image data, a phone book, etc. In addition, the electronic device can include a high-speed random access memory, and can further include a non-volatile memory, for example, at least one magnetic disk storage device, a flash memory device, or other volatile solid-state memory device. In the embodiments of the present application, the memory 120 can be a storage device including a storage controller and a storage medium, and the storage controller can be an internal memory controller, and the storage medium can be a plurality of storage particles.

[0048] The input unit 130 can be used to receive inputted digital or character information, and to generate signal input related to the user settings and function control of the electronic device. Specifically, the input unit 130 can include a touch screen 131 and other input devices 132. The touch screen 131 can collect touch operations of a user thereon or adjacent thereto (such as operations of a user using a finger, a stylus, or any suitable object or accessory on or adjacent to the touch screen), and drive corresponding connection devices according to a pre-set program. Optionally, the other input devices 132 can include, but are not limited to, one or more of a physical keyboard, function keys (such as volume control keys, power on-off keys, etc.), a trackball, a mouse, a joystick, etc.

[0049] The display unit 140 can be used to display information input by a user or information provided to a user, and various menus of the electronic device, etc. In an example, the display unit 140 can include a display screen 141, which can be configured in the form of a liquid crystal display (LCD), an organic light-emitting diode (OLED), etc. Further, the touch screen 131 can cover the display screen 141, and when the touch screen 131 detects a touch operation thereon or adjacent thereto, transmits to the processor 170 to determine the type of the touch event, and then the processor 170 provides corresponding visual output on the display screen 141 according to the type of the touch event. Although in the figure, the touch screen 131 and the display screen 141 are implemented as two independent components to realize the input and output functions of the electronic device, in some embodiments, the touch screen 131 and the display screen 141 can be integrated to realize the input and output functions of the electronic device.

[0050] The sensor 150 can include one or more sensors for providing various aspects of state assessment for the electronic device. Among them, the sensor 150 can include a light sensor that can be used in imaging applications, i.e., as a component of a camera or a camera. In addition, the sensor 150 can also include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor, through which the acceleration / deceleration of the electronic device, the orientation, the open / close state, the relative positioning of components, or the temperature change of the electronic device, etc. can be detected.

[0051] The audio circuit 160, the speaker, and the microphone can provide an audio interface between the user and the electronic device. The audio circuit 160 can convert the received audio data into an electrical signal and transmit it to the speaker, which converts the electrical signal into a sound signal and outputs it. On the other hand, the microphone collects a sound signal and converts it into an electrical signal, which is received by the audio circuit 160 and converted into audio data, which is then output to the RF circuit 110 for transmission to, for example, another mobile phone, or to the memory 120 for further processing.

[0052] The processor 170 is the control center of the electronic device, connects all parts of the electronic device through various interfaces and lines, performs various functions of the electronic device and processes data by running or executing software programs and / or modules stored in the memory 120 and calling data stored in the memory 120, and thus monitors the entire electronic device. Optionally, the processor 170 can include one or more processing units, which can include but are not limited to a central processing unit (CPU), a network processing unit (NPU), a graphic processing unit (GPU), an image signal processor (ISP), a tensor processing unit (TPU), a data processing unit (DPU), a digital signal processor (DSP), a microcontroller or a microprocessor, etc. Further, the processor 170 can also include other hardware circuits or accelerators, such as an application specific integrated circuit (ASIC), a complex programmable logic device (CPLD) or other programmable logic device, a transistor logic device, a hardware component, or any combination thereof. Optionally, the processor 170 can also be a combination of computing functions, such as a combination of one or more microprocessors, a combination of a digital signal processor and a microprocessor, etc.

[0053] The electronic device can also include a power supply 180 (such as a battery) for powering various components. The power supply 180 can be logically connected to the processor 170 through a power management system, so as to realize functions such as management of charging, discharging and power consumption management through the power management system. Optionally, the power management system can support both fast charging technology and non-fast charging technology, and in actual application, the power management system can charge the battery in the power supply 180 through fast charging technology, or can charge the battery in the power supply 180 through non-fast charging technology.

[0054] Although not shown, the electronic device can further include a wireless fidelity (WiFi) module, a Bluetooth module, etc., which are not described herein again. Those skilled in the art can understand that the structure of the electronic device shown in FIG. 1 does not constitute a limitation on the electronic device, and can include more or fewer components than FIG. 1, or combine certain components, or different component arrangements.

[0055] FIG. 2 is a structural schematic diagram of a storage device according to an embodiment of the present application. Optionally, the storage device 200 can be the memory 120 in the electronic device. The storage device 200 includes a storage controller 210 and a storage medium 220 coupled to the storage controller 210. For example, the storage medium 220 can include storage grains 221 to 22n, where n is an integer greater than 1, and the plurality of storage grains can be arranged in an array.

[0056] For example, the storage device 200 can be a memory or a storage device with a memory. The memory can be a non-volatile memory or a volatile memory. For example, the memory can be any one of an embedded multimedia card (eMMC), a universal flash storage (UFS), a NAND flash, a non-flash (nor flash), a solid state drive (SSD), a SAS SSD, a SATA SSD, a non-volatile memory express (NVMe) SSD, a memory, a static random access memory (SRAM), a DRAM, or a disk, etc., which are not limited in the present application.

[0057] FIG. 3 is a structural schematic diagram of a processing device 300 according to an embodiment of the present application. The processing device 300 is used to process a plurality of access requests of a target program. The processing device 300 includes an obtaining module 301, an adjusting module 302, and a sending module 303. Optionally, the processing device 300 can be the processor 170 in the electronic device. As shown in FIG. 3, the processing device 300 can be deployed with an operating system, and the processing device 300 can communicate with a software performance monitoring module and a hardware performance monitoring module in the operating system. The software performance monitoring module is used to monitor and output system-level running state information of the target program, and the hardware performance monitoring module is used to monitor and output program-level running state information (program-specific features) of the target program.

[0058] The obtaining module 301 can be configured to obtain a plurality of access requests of a target program. Optionally, the obtaining module 301 can also be configured to collect state information of the target program, and provide the information to the adjusting module 302. The adjusting module 302 can be configured to adjust the priorities of the plurality of access requests according to the state information of the target program. The sending module 303 can be configured to send the corresponding priority information of the plurality of access requests after the adjustment to a storage controller 210 (for example, a memory controller) in the storage device 200.

[0059] Optionally, the target program can be any program running on the processing device 300, and the target program can be a system-level program or a user-level program. For example, the target program can be a browser program, an audio / video playing program, an instant messaging program, or a game program, etc., and the embodiments of the present application do not make a limitation in this regard.

[0060] FIG. 4 is a flowchart of an access request processing method according to an embodiment of the present application. The method can be applied to the processing device 300. The method includes the following steps.

[0061] S401: Obtain a plurality of access requests of a target program.

[0062] Optionally, the target program can be any program running on the processing device 300. For example, the target program can trigger a plurality of access requests, and the plurality of access requests can be in a state of waiting for scheduling.

[0063] Optionally, if the granularity is a program, the plurality of access requests can include a plurality of access requests triggered by the target program. Optionally, the target program can include a plurality of threads, each thread can trigger one or more access requests, and if the granularity is a thread, the plurality of access requests can include a plurality of access requests triggered by the plurality of threads.

[0064] For example, when obtaining the plurality of access requests of the target program, the priorities of the plurality of access requests can also be obtained at the same time, that is, the original priorities of the plurality of access requests can be obtained. The original priorities can be system-configured, or priorities corresponding to QoS values in the related art.

[0065] S402: Adjust the priority of at least one access request in the plurality of access requests according to state information of the target program, to obtain priority information of the plurality of access requests. The state information can include at least one of the following: system-level running state information, program-level running state information, or importance information.

[0066] The system-level running state information is used to indicate whether the target program is running in the foreground or in the background. In the embodiments of the present application, when the target program is running in the foreground, it means that the target program is a program currently used by the user, and when the target program is running in the background, it means that the target program is a program not currently used by the user.

[0067] In addition, the program-level running state information is used to indicate whether the target program is front-end limited or back-end limited. When the target program is front-end limited, it means that the instruction reading speed of the target program is limited, and faster instruction fetching is needed. When the target program is back-end limited, it means that the data reading speed of the target program is limited, and faster data fetching is needed. Optionally, if the granularity is a thread, when the target program includes multiple threads, the front-end limited threads in the multiple threads need faster instruction fetching, and the back-end limited threads in the multiple threads need faster data fetching.

[0068] For example, in the TMAM analysis method, when the proportion of the front-end stall cycles of the target program in the running period of the target program exceeds a first threshold, it can be determined that the target program is a front-end limited program; and when the proportion of the front-end stall cycles of the target program in the running period of the target program is lower than a second threshold, it can be determined that the target program is a front-end unlimited program. Similarly, when the proportion of the backend stall cycles of the target program in the running period of the target program exceeds a third threshold, it can be determined that the target program is a back-end limited program; and when the proportion of the backend stall cycles of the target program in the running period of the target program is lower than a fourth threshold, it can be determined that the target program is a back-end unlimited program. The first threshold is greater than the second threshold, and the third threshold is greater than the fourth threshold.

[0069] Further, the importance information is used to indicate that the importance of the target program is important. For example, the importance information can be directly input by a user or a compiler through an importance information interface. For example, the importance information can be 1-bit data, and "1" represents important and "0" represents unimportant. When the user considers that the importance of the target program is high, the target program can be identified as "1" through the importance information interface to indicate that the importance of the target program is important, and vice versa, the target program can be identified as an unimportant program. Alternatively, the importance information can be obtained by querying a white list. The white list can be deployed in an operating system. When the target program is identified in the white list, it indicates that the importance of the target program is important, and vice versa, the target program is an unimportant program.

[0070] It can be understood that in actual application, the system-level running state information can further include other information of the target program at the system level, the program-level running state information can further include other information of the target program at the program level, and the importance information can further include other information. The above examples of the system-level running state information, the program-level running state information and the importance information do not limit the embodiments of the present application.

[0071] Further, adjusting the priority of at least one of the plurality of access requests can include increasing the priority of one or more of the plurality of access requests, or decreasing the priority of one or more of the plurality of access requests.

[0072] In an example, when the priority of the plurality of access requests is adjusted at the granularity of a program, the adjustment object is all access requests triggered by the target program. For example, the priority of the access requests triggered by the target program can be increased or decreased according to the system-level running state information, the program-level running state information, or the importance information. The priority of the access requests triggered by the target program is increased or decreased at the same time.

[0073] In another example, when the priority of the plurality of access requests is adjusted at the granularity of a thread, the adjustment object is access requests triggered by one or more threads of the plurality of threads. For example, the priority of the access requests triggered by one or more threads can be increased or decreased according to the system-level running state information, the program-level running state information, or the importance information. The priority of the access requests triggered by the one thread is increased or decreased at the same time, and the priority of the access requests triggered by the plurality of threads can be increased or decreased.

[0074] In another example, the priority of the plurality of access requests is adjusted in granularity of access request. For example, the priority of one or more access requests can be increased or decreased according to the system level running state information, the program level running state information, or the importance information, and the priority of each access request in the plurality of access requests can be increased or decreased.

[0075] S403: sending the plurality of access requests and the priority information, the priority information being used to indicate the priority of scheduling the plurality of access requests.

[0076] In a possible example, if the priority of the plurality of access requests is all adjusted, the priority information includes the priority of the adjusted access request; if the priority of part of the plurality of access requests is adjusted, the priority information includes the priority of the adjusted access request and the original priority of the unadjusted access request. Optionally, the adjusted priority can be higher than the original priority of the access request, or lower than the original priority of the access request.

[0077] For example, after the priority of the one or more access requests is adjusted, the adjusted priority information and the plurality of access requests can be sent to the storage device 200 in the above embodiment, so that the storage controller 210 (such as a memory controller) in the storage device 200 schedules the plurality of access requests according to the adjusted priority information and the preset scheduling strategy of the memory controller.

[0078] In the embodiment of the present application, after the target program triggers a plurality of access requests, the priority of the plurality of access requests can be adjusted according to the system level running state information, the program level running state information, or the importance information of the target program, for example, the original priority of one or more access requests is increased or the original priority of one or more access requests is decreased, so that the memory resources can be more effectively allocated according to different characteristics of programs and different needs of memory access, the scheduling order of access requests is optimized from the perspective of the whole system, the performance of the whole system is improved without changing the scheduling strategy of the memory system, and the user experience is improved.

[0079] FIG. 5 shows a flowchart of another access request processing method. Optionally, when the state information includes the system level running state information, and the system level running state information indicates that the target program is running in the foreground, in combination with FIG. 4, the above step S402 further includes the following steps.

[0080] S4021: if the target program is running in the foreground, increasing the priority of at least one access request in the plurality of access requests.

[0081] Wherein, as described above, when the target program is running in the foreground, it means that the target program is being used by the user. At this time, if the priority of one or more of the plurality of access requests of the target program is increased, the access requests of the target program can be prioritized for scheduling and processing, saving the waiting time of the plurality of access requests before being scheduled and processed, and improving the user experience to a certain extent.

[0082] Optionally, when the number of the plurality of access requests is n, if the target program is running in the foreground, the priority of n access requests can be increased, and the priority of m access requests can also be increased. Wherein, m is less than n, and m and n are positive integers.

[0083] For example, when the priority of the n or m access requests is increased, the priority of the n or m access requests can be adjusted to the maximum to obtain the highest performance benefit and improve the user experience.

[0084] Further, if the state information further includes the program-level running state information, after step S4021, the method further includes:

[0085] S4021a: If the target program is front-end limited, the priority of at least one access request corresponding to instruction access in the plurality of access requests is increased.

[0086] S4021b: If the target program is back-end limited, the priority of at least one access request corresponding to data access in the plurality of access requests is increased.

[0087] Wherein, when the target program includes a plurality of threads, the plurality of access requests include access requests triggered by the plurality of threads, and the at least one access request is an access request triggered by at least one thread in the plurality of threads.

[0088] For example, if there is a front-end limited thread in the target program, the priority of an access request corresponding to instruction access in the plurality of access requests triggered by the front-end limited thread is increased. If there is a back-end limited thread in the target program, the priority of an access request corresponding to data access in the plurality of access requests triggered by the back-end limited thread is increased.

[0089] Similarly, if there is a front-end unlimited thread in the target program, the priority of an access request corresponding to instruction access in the plurality of access requests triggered by the front-end unlimited thread can also be reduced. If there is a back-end unlimited thread in the target program, the priority of an access request corresponding to data access in the plurality of access requests triggered by the back-end limited thread is reduced.

[0090] Further, when adjusting the access request of the front-end limited thread, the access request of the back-end limited thread, the access request of the front-end unlimited thread and the access request of the back-end unlimited thread, the QoS value of the plurality of access requests can be adjusted according to the matching relationship between the first threshold, the second threshold, the third threshold, the fourth threshold and the priority. For example, when the front-end stall cycle ratio of the front-end limited thread exceeds the first threshold, the QoS value of the instruction access request of the front-end limited thread can be increased to a first target value, when the front-end stall cycle ratio of the front-end unlimited thread is lower than the second threshold, the QoS value of the instruction access request of the front-end unlimited thread can be reduced to a second target value, when the back-end stall cycle ratio of the back-end limited thread exceeds the third threshold, the QoS value of the data access request of the back-end limited thread can be increased to a third target value, and when the back-end stall cycle ratio of the back-end unlimited thread is lower than the fourth threshold, the QoS value of the data access request of the back-end unlimited thread can be reduced to a fourth target value. The first threshold matches the first target value, the second threshold matches the second target value, the third threshold matches the third target value, and the fourth threshold matches the fourth target value.

[0091] In addition, if there is a thread generated by user operation in the target program (i.e. the user performs an operation on the target program, for example, the user clicks a button in the target program), the priority of the access request triggered by the thread can also be increased accordingly. For example, the priority of the access request triggered by the thread is adjusted to the maximum, the highest performance benefit can be obtained, and the user experience is improved.

[0092] In an example, when the state information includes the system-level running state information, and the system-level running state information indicates that the target program is running in the background, in combination with FIG. 4, the step S402 can further include the following steps.

[0093] S4022: The target program is running in the background, and the priority of at least one access request in the plurality of access requests is reduced.

[0094] Specifically, when the target program is running in the background, it means that the target program is not currently used by the user. At this time, if the priority of one or more access requests in the plurality of access requests of the target program is reduced, the access request of the target program will not be scheduled and processed preferentially, the occupation of memory resources is reduced, the purpose of saving part of the memory resources is achieved, and the waiting time of other access requests before being scheduled and processed is also reduced.

[0095] Optionally, when the number of the plurality of access requests is n, if the target program is running in the background, the priority of the n access requests can be reduced, and the priority of the m access requests can also be reduced. Wherein m is less than n, and m and n are positive integers.

[0096] For example, when the priority of the n or m access requests is reduced, the priority of the n or m access requests can be adjusted to the minimum to obtain the highest performance benefit.

[0097] Figure 6 shows a flowchart of another access request processing method. Optionally, when the state information includes the importance information, and the importance information indicates that the importance of the target program is important, in combination with Figure 4, the above step S402 further includes the following steps.

[0098] S4023: If the importance information is used to indicate that the importance of the target program is important, the priority of at least one access request in the plurality of access requests is increased.

[0099] Wherein, the at least one access request can be generated based on user operation.

[0100] Optionally, in the case where the importance information indicates that the importance of the target program is important, even if the target program is running in the background, the priority of one or more access requests in the plurality of access requests needs to be increased. For example, the priority of one or more access requests can be adjusted to the maximum to obtain the highest performance benefit and improve user experience.

[0101] Further, if the state information further includes the program-level running state information, after step S4023, the method further includes:

[0102] S4023a: If the target program is front-end limited, the priority of at least one access request corresponding to instruction access in the plurality of access requests is increased.

[0103] S4023b: If the target program is back-end limited, the priority of at least one access request corresponding to data access in the plurality of access requests is increased.

[0104] Wherein, when the target program includes a plurality of threads, the plurality of access requests include access requests triggered by the plurality of threads, and the at least one access request is an access request triggered by at least one thread in the plurality of threads.

[0105] For example, if there is a front-end limited thread in the target program, the priority of the instruction access corresponding access request in the plurality of access requests triggered by the front-end limited thread is increased. If there is a back-end limited thread in the target program, the priority of the data access corresponding access request in the plurality of access requests triggered by the back-end limited thread is increased.

[0106] Similarly, if there is a front-end unlimited thread in the target program, the priority of the instruction access corresponding access request in the plurality of access requests triggered by the front-end unlimited thread can also be decreased. If there is a back-end unlimited thread in the target program, the priority of the data access corresponding access request in the plurality of access requests triggered by the back-end limited thread is decreased.

[0107] In an example scenario, when a user uses a mobile phone in daily life, there are multiple scenarios of switching of mobile phone software (application, app). For example, after seeing an advertisement of a certain commodity on a certain sharing app, the user can switch to a shopping app to search for the commodity, and can also switch to an instant messaging app to share the commodity or a shopping app link of the commodity with a friend. When the app is switched, the app switched to the background will not immediately enter a hibernation state, and will still perform some operations (such as hibernation preparation operations) to generate access requests. If the access requests triggered by the foreground running app and the background running app have the same priority, switching to the background running app will affect the running speed and performance of the foreground running app. For the user, only the running speed and performance of the foreground running app will affect the user's use experience, and the user is not aware of or sensitive to the running speed and performance of the background running app. Based on this, by using the access request processing method provided in the embodiments of the present application, the priority of the access request of the foreground running app is increased, and the priority of the access request of the background running app is decreased, so that the running speed and performance of the foreground running app can be improved, and thus the performance of the entire system and the user's use experience can be improved.

[0108] In another scenario example, for example on a desktop computer or a mobile terminal, there is a multi-task concurrent use scenario. Different programs have different characteristics, and the access request to the memory system also has different needs. For example, a front-end limited program needs faster instruction retrieval, and a back-end limited program needs faster data retrieval. If all programs have homogeneous priority settings, there may be a case where the instruction access of the front-end limited program and the instruction access of the back-end limited program are waiting for scheduling processing at the same time, or the data access of the front-end limited program and the data access of the back-end limited program are waiting for scheduling processing at the same time. Based on this, by using the access request processing method provided in the embodiments of the present application, the priority of the access request corresponding to the instruction access of the front-end limited program is increased, so that the front-end limited program can read instructions in priority to the back-end limited program, to alleviate the front-end limited situation of the front-end limited program, and the priority of the access request corresponding to the data access of the back-end limited program is increased, so that the back-end limited program can read data in priority to the front-end limited program, to alleviate the back-end limited situation of the back-end limited program, so as to be able to set the priority of the access request of the target program differently according to the characteristics of the program itself, more effectively allocate memory resources, and improve the overall system performance.

[0109] Figure 7 illustrates a comparison diagram of the effects of the conventional processing scheme and the processing scheme of the embodiments of the present application. In the multi-task scenario of the mobile terminal (for example, simultaneously opening the live floating window of the video program and the live floating window of the shopping program), the time consumption of the instant messaging app cold start is taken as an example for illustration. As shown in Figure 7, when the conventional scheme is adopted, the time required for the instant messaging app cold start is mostly distributed between 1.8 seconds (s) and 2.1 s, and the time consumption of 1.9 s to 2.0 s accounts for more than 10%; when the scheme of the embodiments of the present application is adopted, the time required for the instant messaging app cold start is mostly distributed between 1.7 s and 2.0 s, and the time consumption of 1.7 s to 1.8 s accounts for more than 16%. Obviously, the scheme provided in the embodiments of the present application can reduce the cold start time of the instant messaging app, and when the access request is processed by using the scheme provided in the embodiments of the present application, the waiting time of the user can be reduced, thereby improving the user experience.

[0110] ​In another embodiment of the present application, an access request processing apparatus is also provided, the processing apparatus 300 comprises an obtaining module 301, an adjusting module 302 and a sending module 303, the processing apparatus 300 communicates with a software performance monitoring module and a hardware performance monitoring module in an operating system, and the processing apparatus 300 also communicates with the storage apparatus 200. The obtaining module 301 can be used to support the processing apparatus 300 to perform S401 in the method embodiments described above; the adjusting module 302 can be used to support the processing apparatus 300 to perform S402, S4021 to S4023 in the method embodiments described above; and the sending module 303 can be used to support the processing apparatus 300 to perform S403 in the method embodiments described above, which will not be repeated here in the embodiments of the present application.

[0111] The obtaining module 301 can comprise a detection code deployed in the operating system, which is used to determine whether the target program is running in the foreground or in the background according to the system-level running state information of the target program; the obtaining module 301 can also comprise a collection code deployed in the operating system, which is used to determine whether the target program is front-end limited or back-end limited based on the program-level running state information of the target program; the obtaining module 301 can also comprise an importance information interface, which is used to receive the importance information directly input by a user or a compiler and the like; and the obtaining module 301 can also comprise a white list deployed in the operating system, which is used to determine whether the importance of the target program is important or whether the target program is a non-important program according to the identification.

[0112] In addition, the adjusting module 302 can comprise a preset priority adjusting strategy. For example, the adjusting strategy can comprise increasing the access request priority of a program running in the foreground, decreasing the access request priority of a program running in the background, increasing the access request priority of a user operation, increasing the access request priority of instruction access of a front-end limited program, increasing the access request priority of data access of a back-end limited program, and the like.

[0113] Further, the sending module 303 can have different implementation forms on different systems. For example, on a chip developed by a certain communication company, the sending module 303 can be a specific system register; on an ARM chip, the sending module 303 can be implemented through a memory system resource partitioning and monitoring (MPAM) provided by ARM; and on an Intel chip, the sending module 303 can be implemented through a resource director technology (RDT) provided by Intel.

[0114] In another embodiment of the present application, an electronic device is also provided, which includes a processor and a memory having instructions stored therein that, when executed by the processor, cause the electronic device to perform the steps of the above method embodiments. The processor can be the access request processing apparatus 300 in the above embodiments, and the memory can be the storage apparatus 200 in the above embodiments.

[0115] It can be understood that all relevant contents of the steps involved in the above method embodiments can be cited in the embodiments of the access request processing apparatus 300 and the electronic device, which will not be described here again in the embodiments of the present application.

[0116] In several embodiments provided in the present application, it should be understood that the disclosed apparatus and method can be implemented by other means. For example, the apparatus embodiments described above are only schematic, for example, the division of the modules or units is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another apparatus, or some features can be ignored or not executed.

[0117] The units described as separate components can or can not be physically separate, and the components displayed as units can be one physical unit or a plurality of physical units, that is, can be located in one place, or can be distributed to a plurality of different places. Part or all of the units can be selected according to actual needs to achieve the purpose of the embodiments of the present application.

[0118] If the integrated units are implemented in the form of software function units and sold or used as independent products, they can be stored in a readable storage medium, which can include a U disk, a mobile hard disk, a read-only memory, a random access memory, a magnetic disk or an optical disk, and various storage medium that can store program codes. Based on such understanding, the technical solutions of the embodiments of the present application or the essential part or all or part of the technical solutions that make contributions to the prior art can be embodied in the form of a software product.

[0119] In another embodiment of the present application, a readable storage medium is also provided, which stores computer execution instructions, when the computer program or instructions are executed, an apparatus (which can be a single-chip microcomputer, a chip, etc.) or a processor performs the steps of the above method embodiments.

[0120] In yet another embodiment of the present application, a computer program product is also provided, which includes computer instructions stored in a readable storage medium; at least one processor of a device can read the computer instructions from the readable storage medium, and the at least one processor executes the computer instructions to make the device perform the steps in the above-mentioned method embodiments.

[0121] Finally, it should be noted that the above-mentioned is only a specific embodiment of the present application, but the protection scope of the present application is not limited thereto, any change or replacement within the technical scope disclosed in the present application should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. An access request processing method characterized by comprising: The method comprises: obtaining a plurality of access requests of a target program; adjusting a priority of at least one access request in the plurality of access requests according to state information of the target program to obtain priority information of the plurality of access requests; wherein the state information comprises at least one of the following: system-level running state information, program-level running state information, or importance information; sending the plurality of access requests and the priority information, the priority information being used to indicate a priority of scheduling the plurality of access requests.

2. The method of claim 1, wherein, If the state information comprises the system-level running state information, the system-level running state information is used to indicate that the target program is running in foreground or background; and the adjusting of the priority of at least one access request in the plurality of access requests according to the state information of the target program comprises: if the target program is running in foreground, increasing the priority of at least one access request in the plurality of access requests; if the target program is running in background, decreasing the priority of at least one access request in the plurality of access requests.

3. The method of claim 2, wherein, If the state information further comprises the program-level running state information, the program-level running state information is used to indicate that the target program is front-end limited or back-end limited; and the increasing of the priority of at least one access request in the plurality of access requests comprises: if the target program is front-end limited, increasing the priority of at least one access request corresponding to instruction access in the plurality of access requests; if the target program is back-end limited, increasing the priority of at least one access request corresponding to data access in the plurality of access requests.

4. The method according to any one of claims 1 to 3, characterized in that, If the state information comprises the importance information, the adjusting of the priority of at least one access request in the plurality of access requests according to the state information of the target program comprises: if the importance information is used to indicate that the importance of the target program is important, increasing the priority of at least one access request in the plurality of access requests.

5. The method according to any one of claims 2-4, characterized in that, The at least one access request is generated based on a user operation.

6. The method according to any one of claims 2-5, characterized in that, The target program comprises a plurality of threads, and the plurality of access requests comprise access requests triggered by the plurality of threads; and the at least one access request is an access request triggered by at least one thread in the plurality of threads.

7. An access request processing apparatus characterized by comprising: The device comprises: an obtaining module, configured to obtain a plurality of access requests of a target program; an adjusting module, configured to adjust a priority of at least one access request in the plurality of access requests according to state information of the target program to obtain priority information of the plurality of access requests; wherein the state information comprises at least one of the following: system-level running state information, program-level running state information, or importance information; a sending module, configured to send the plurality of access requests and the priority information, the priority information being used to indicate a priority of scheduling the plurality of access requests.

8. The apparatus of claim 7, wherein, If the state information comprises the system-level running state information, the system-level running state information is used to indicate that the target program is running in foreground or background. The adjusting module is further configured to, if the target program is running in foreground, increase the priority of at least one access request in the plurality of access requests. The adjusting module is further configured to decrease the priority of at least one access request in the plurality of access requests if the target program is running in the background.

9. The apparatus of claim 8, wherein, If the state information further comprises program-level running state information, the program-level running state information is used to indicate that the target program is front-end limited or back-end limited. The adjusting module is further configured to increase the priority of at least one access request corresponding to instruction access in the plurality of access requests if the target program is front-end limited. The adjusting module is further configured to increase the priority of at least one access request corresponding to data access in the plurality of access requests if the target program is back-end limited.

10. An electronic device, comprising: The electronic device comprises a processor and a memory, and the memory stores instructions. When the processor executes the instructions, the electronic device performs the access request processing method according to any one of claims 1-6.

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