Image processing system

Abstract

The present invention makes it possible to estimate a lower structure from an image of a semiconductor device having an upper structure and said lower structure using a charged particle beam device. This image processing system comprises a structure learning unit 210 that: accepts training data in the form of pairs of first training image data 201 containing information on an upper structure and second training image data 202 containing information on the upper structure and a lower structure, the first and second training image data being obtained by imaging a semiconductor device using the same field of view; and generates a learning model for estimating an image of an upper structure and an image of an lower structure. The structure learning unit comprises: a structure estimation unit that uses the learning model to estimate an image of an upper structure from the first training image data and an image of a second structure from the second training image data; an image synthesis unit that combines the image of the first structure and the image of the second structure to synthesize a pseudo-image of the second training image data; and an error reduction unit that adjusts parameters of the learning model to reduce error between pixel values in the pseudo-image and pixel values in an image from the second training image data.

Description

Image Processing System

[0001] The present invention relates to an image processing system.

[0002] Patent Publication 1 states that "a threshold value for separating each distribution is calculated from the histogram. Next, a grayscale threshold value is applied to each pixel in the image, and an exposure index is recognized for each pixel," and "edges may be detected from the image, and appearance features may be quantified for closed regions surrounded by the edges, and an exposure index for each closed region may be recognized from the appearance features."

[0003] JP 2016-145825 A

[0004] In Patent Document 1, the distribution of gray values ​​for each structure of a semiconductor device is separated using a threshold value. However, with the advancement of multilayering, semiconductor devices with complex three-dimensional structures have similar gray value distributions even for structures formed on different layers, making it difficult to separate the structures of each layer from an image. This will be explained using Figures 1A to 1D.

[0005] The image 101 shown in FIG. 1A is a schematic representation of an image of a semiconductor device captured with a scanning electron microscope (SEM). The background region 102 is a region where no structure exists or where signal electrons could not be collected by the SEM detector. The first structure region 103 is a region of a vertical (Y-axis) structure (referred to as the first structure). The second structure region 104 is a region of a horizontal (X-axis) structure (referred to as the second structure). The overlap region 105 is a region where the first structure and the second structure overlap. Note that, in this case, a semiconductor device is assumed in which the second structure exists below the first structure, and the first structure is sometimes referred to as the upper structure and the second structure as the lower structure. Consider the case of extracting an image of the lower second structure region from the image 101.

[0006] 1B shows a histogram 106 of the gray values ​​of the image 101. Distribution 107 is the gray value distribution of the background region 102, distribution 109 is the gray value distribution of the overlap region 105, and distribution 108, which is located between them, is the gray value distribution of the first structure region 103 or the second structure region 104, not the overlap region 105. From the histogram 106, it is considered possible to set thresholds for separating the structures: a threshold 110 for separating distributions 107 and 108, and a threshold 111 for separating distributions 108 and 109. However, because the gray values ​​of the first structure region 103 and the second structure region 104 are similar, they are included in the same distribution 108, making it difficult to obtain only the second structure region 104 by setting a threshold value to the histogram 106.

[0007] Furthermore, detecting structures using edges is not easy. A commonly used method for detecting edges is to identify the point where the differential is maximized as the edge. The edge to be detected may be located not only at the boundary between the background and the structure, but also at the boundary between two structures, making it difficult to extract the target structure. Figure 1C shows the image 101 shown in Figure 1A, in which the second structure region 104 extends to the left of the first structure region 103. Taking a horizontal derivative of image 101 reveals an edge 112, which is the boundary between the background region 102 and the second structure region 104. In contrast, image 121 shown in Figure 1D depicts an image of the same semiconductor device as image 101, but in the manufacturing process, the second structure terminates directly below the first structure. Taking a horizontal derivative of image 121 reveals that the boundary between the background region 122 and the first structure region 123 is the differential maximum point 126, which is recognized as an edge. However, the point that is actually desired to be acquired as an edge is point 127 on the vertical boundary of overlap region 125. When the structure position changes due to manufacturing errors in this way, it is difficult to acquire the second structure using edge detection that uses differentiation.

[0008] An image processing system according to one embodiment of the present invention is an image processing system that processes an image of a semiconductor device captured by a charged particle beam device, wherein the semiconductor device has a first structure and a second structure formed below the first structure, and the image processing system includes: a storage device that stores, as learning data, a set of first training image data including information about the first structure and second training image data including information about the first and second structures, both of which are captured by the charged particle beam device in the same field of view of the semiconductor device; and a structure learning unit that receives the first training image data and the second training image data and generates a learning model that estimates an image of the first structure and an image of the second structure, wherein the structure learning unit includes: a structure estimation unit that estimates, using the learning model, an image of the first structure from the first training image data and an image of the second structure from the second training image data; an image synthesis unit that synthesizes the image of the first structure and the image of the second structure estimated by the structure estimation unit to synthesize a pseudo image of the second training image data; and an error reduction unit that adjusts parameters of the learning model to reduce an error between pixel values ​​of the pseudo image and pixel values ​​of an image of the second training image data.

[0009] According to the present invention, the accuracy of inspection and measurement is improved by using an estimated structure. Other objects and novel features will become apparent from the description of this specification and the accompanying drawings.

[0010] 4A is a diagram explaining the problem to be solved by the invention. FIG. 4B is a diagram explaining the problem to be solved by the invention. FIG. 4C is a diagram explaining the problem to be solved by the invention. FIG. 4D is a diagram explaining the problem to be solved by the invention. FIG. 4E is a diagram explaining the problem to be solved by the invention. An example of the hardware configuration of an image processing system. An example of the hardware configuration of a control computer or a learning computer. A functional block diagram of an image processing system. A diagram showing how imaging is performed by a scanning electron microscope. A diagram showing examples of each structure of a semiconductor device. A schematic diagram of an image acquired for the semiconductor device shown in FIG. 4A. A functional block diagram of a structure learning unit. A functional block diagram of a structure estimation unit. A schematic diagram of a semiconductor device. A flowchart for creating a trained model. A flowchart for estimating an image of a second structure (substructure) using a trained model. An example of a GUI.

[0011] 2A shows an example of the hardware configuration of an image processing system according to this embodiment. The image processing system is, for example, a system that captures images of semiconductor devices using an SEM and inspects or measures the semiconductor devices using the acquired images. The image processing system 800 includes an imaging unit 801, a control computer 802, a learning computer 803, and an external storage device 804, and the computers 802 and 803 and the external storage device 804 are connected via a network 805 so as to be able to send and receive data.

[0012] The imaging unit 801, for example, is an SEM that irradiates a semiconductor device with a charged particle beam to acquire an image. This is not limited to an SEM, and the invention is widely applicable to charged particle beam devices that observe or inspect semiconductor devices using a charged particle beam, such as a transmission electron microscope (TEM), a scanning transmission electron microscope (STEM), or a focused ion beam device. The control computer 802 controls the imaging unit 801 to acquire an image and inspects or measures the semiconductor device based on the image. The image data acquired by the control computer 802 can also be stored in an external storage device 804. The learning computer 803 acquires images of the semiconductor device from the control computer 802 or the external storage device 804 and generates a trained model that estimates the structure of the semiconductor device. The control computer 802 estimates the structure of the semiconductor device from the image information using the trained model generated by the learning computer 803, thereby inspecting or measuring, for example, whether the semiconductor device is correctly formed according to the design structure.

[0013] The control computer 802 or the learning computer 803 includes, as shown in FIG. 2B , a processor (Central Processing Unit: CPU) 811, a memory 812, a storage device 813, an input interface (I / F) 814, an output I / F 815, a communication I / F 816, and a bus 817 as its main components. The processor 811 functions as a functional unit that provides predetermined functions by executing processes according to programs loaded into the memory 812. The storage device 813 stores data and programs used by the functional unit. The input I / F 814 is connected to input devices such as a keyboard, pointing device, and operation panel, and the output I / F 815 is connected to a display device. The communication I / F 816 enables communication with other computers and an external storage device 804 via a network 805. These are connected to each other via a bus 817 so that they can communicate with each other. Note that the control computer 802 or the learning computer 803 do not necessarily have to be separate pieces of hardware; the functions of the control computer 802 and the learning computer 803 may be realized by a single computer. The functions of the learning computer 803 may also be implemented by multiple computers. Furthermore, some or all of the functions of the control computer 802 and the learning computer 803 may be implemented as an application on the cloud.

[0014] In the following description, when describing processing by a program, the program, functional units, etc. may be described as the main focus, but the main focus of the hardware in these cases is a processor or a computer configured including the processor, etc. The computer executes processing according to the program loaded into memory using resources such as memory and communication interfaces as appropriate through the processor. While FIG. 2B shows an example of a CPU as the processor, a GPU (Graphical Processing Unit) or the like may also be used. Furthermore, processing to realize a function is not limited to software program processing, and can also be implemented using a dedicated circuit. Examples of the dedicated circuit that can be used include a field programmable gate array (FPGA) and an application specific integrated circuit (ASIC).

[0015] 2C shows a functional block diagram of the image processing system 800. The structure learning unit 210 inputs, as training data, a pair of a first detector training image 201 including information on a first structure (upper structure) of a semiconductor device and a second detector training image 202 including information on the first structure and a second structure (lower structure) located below it, and generates a trained model 212 that estimates an image of the second structure (lower structure). The structure estimation unit 211 uses the trained model 212 to estimate an image 223 of the second structure (lower structure) from a second detector image 222 of the semiconductor device to be inspected.

[0016] Model training (structure learning) by the structure learning unit 210 is performed before the control computer 802 inspects and measures the semiconductor device, and image estimation by the structure estimation unit 211 is performed when the control computer 802 inspects and measures the semiconductor device. It is conceivable that the structure learning unit 210, which is a functional unit, is implemented in the learning computer 803, and the structure estimation unit 211, which is also a functional unit, is implemented in the control computer 802, but this is not limited to this. Both the structure learning unit 210 and the structure estimation unit 211 may be implemented in the control computer 802, or both the structure learning unit 210 and the structure estimation unit 211 may be implemented in the learning computer 803. Furthermore, the pair of first detector training image 201 and second detector training image 202, which are training data, may use image data captured by the imaging unit 801 and stored in the external storage device 804, or may use image data stored in the storage device of the control computer 802.

[0017] 3 shows how a semiconductor device having a first structure (upper structure) 301 and a second structure (lower structure) 302 is imaged by a scanning electron microscope (image capturing unit 801). The image capturing unit 801 irradiates the semiconductor device with electrons 304 emitted from an electron source 303. The image capturing unit 801 includes an electron optical system that controls the irradiation state of the electrons 304 onto the semiconductor device, but this is not shown here.

[0018] The imaging unit 801 includes a first detector 306 and a second detector 309. The first detector 306 detects first signal electrons 305, which are mainly secondary electrons emitted by the interaction of electrons 304 with the surface of the semiconductor device. Therefore, the first detector image generated based on the signal intensity detected by the first detector 306 mainly reflects information about the first structure 301. On the other hand, the electrons 304 that enter the interior of the semiconductor device are scattered by the first structure 301 or the second structure 302 and are then emitted to the outside again. The second detector 309 detects second signal electrons, which are mainly backscattered electrons 307 from the first structure 301 and backscattered electrons 311 from the second structure 302. Therefore, the second detector image generated based on the signal intensity detected by the second detector 309 mainly reflects information about both the first structure 301 and the second structure 302.

[0019] The first detector learning image 201 and the second detector learning image 202 used in the structure learning unit 210 are not limited to images of actual semiconductor devices captured with a scanning electron microscope, but may also be images created using Monte Carlo simulation.

[0020] The images acquired by the imaging unit 801 shown in Fig. 3 will be described with reference to Figs. 4A and 4B. Fig. 4A shows top views of examples of the structure of a semiconductor device. The first structure 401 is a so-called line-and-space structure, and includes a first background portion 402 where no structure exists and a first structure portion 403 extending in the vertical direction (Y direction). In contrast, the second structure 411 includes a second background portion 414 where no structure exists and a second structure portion 415 extending in the horizontal direction (X direction).

[0021] 4B is a schematic diagram of an image acquired by the imaging unit 801 for a semiconductor device having the structure shown in FIG. 4A . A first detector image 421 based on a detection signal from the first detector 306 reflects the first structure 401 and includes a background region 422 corresponding to the first background portion 402 and a first structure region 423 corresponding to the first structure portion 403. On the other hand, a second detector image 431 based on a detection signal from the second detector 309 reflects the first structure 401 and the second structure 411 and includes a background region 432 corresponding to the common portion between the first background portion 402 and the second background portion 414, a first structure region 433 corresponding to the first structure portion 403, a second structure region 435 corresponding to the second structure portion 415, and an overlap region 436 corresponding to the overlapping portion of the first structure portion 403 and the second structure portion 415.

[0022] Since the first structure is formed on the second structure, it is inevitable that information about the first structure will be included in the signal electron information obtained by irradiating an electron beam onto a semiconductor device using an SEM. Furthermore, it is not possible to extract an image of the second structure by subtracting the first detector image 421 from the second detector image 431. This is because the pixel values ​​of the image change depending on the relative number of electrons collected by each detector.

[0023] 5 shows a functional block diagram of the structure learning unit 210. A pair of a first detector learning image 201 and a second detector learning image 202 that constitute the learning data input to the structure learning unit 210 is a pair of image data generated based on the signal intensity detected by the first detector 306 and the second detector 309, both of which are acquired by the imaging unit 801 for the same field of view on the semiconductor device. The structure learning unit 210 includes a preprocessing unit 501 that performs preprocessing to remove noise and the like from the first detector training image 201, a first structure estimation unit 502 that estimates a first structure (upper structure) from the preprocessed first detector training image, a preprocessing unit 511 that preprocesses the second detector training image 202, a second structure estimation unit 512 that estimates a second structure (lower structure) from the preprocessed second detector training image, an image synthesis unit 503 that synthesizes the estimated first structure image 203 and second structure image 204, and an error reduction unit 504 that controls learning (parameter adjustment of the learning model) in the first structure estimation unit 502 and the second structure estimation unit 512 so as to reduce the difference in pixel values ​​between the synthesized image 206 synthesized by the image synthesis unit 503 and the second detector training image 202. This makes it possible to estimate the first structure image 203 and the second structure image 204 such that the synthesized image 206 and the second detector training image 202 are similar.

[0024] The preprocessing units 501 and 511 respectively perform preprocessing such as contrast correction, noise removal, blur removal, and removal of regions unrelated to the structure on the first detector training image 201 or the second detector training image 202. For example, contrast correction includes gamma conversion of tone curves and histogram flattening. Methods for removing noise and blur include smoothing, low-pass filtering, high-pass filtering, and other denoising methods that use a trained model that has been trained in advance using deep learning. Methods for removing regions unrelated to the structure include Otsu's binarization, etc. However, the methods are not limited to those described above.

[0025] The first structure estimation unit 502 estimates the first structure image 203 from the first detector training image processed by the preprocessing unit 501. Estimation methods include deep learning methods such as convolutional neural networks and graph neural networks, and other machine learning methods. However, the method is not limited to the methods described above. The first structure image 203 is an image of the first structure (superstructure) estimated by the first structure estimation unit 502. When a machine learning method is used in the first structure estimation unit 502, there is a high possibility that the image will not sufficiently represent the first structure at the start of learning. However, as learning progresses, the image will become one that sufficiently represents the first structure.

[0026] The second structure estimation unit 512 estimates the second structure image 204 from the second detector training image processed by the preprocessing unit 511. Estimation methods include deep learning methods such as convolutional neural networks and graph neural networks, as well as other machine learning methods. However, the methods are not limited to those described above. Even if the first structure estimation unit 502 and the second structure estimation unit 512 use the same machine learning method, the model architecture, etc., do not need to be identical. The second structure image 204 is an image of the second structure (substructure) estimated by the second structure estimation unit 512. When the second structure estimation unit 512 uses a machine learning method, there is a high possibility that the image will not adequately represent the second structure at the start of learning. However, as learning progresses, the image will be designed to adequately represent the second structure. A method for monitoring whether learning in these structure learning units is progressing as intended will be described later.

[0027] Here, the first structure estimation unit 502 is applied to the first detector training image 201, and the second structure estimation unit 512 is applied to the second detector training image 202. However, the first detector training image 201 and the second detector training image 202 may be input to one structure estimation unit, and two images, an image 203 of the first structure and an image 204 of the second structure, may be output.

[0028] The image synthesis unit 503 synthesizes the estimated image 203 of the first structure and the image 204 of the second structure to generate a synthesized image 206 that is a pseudo image of the second detector training image. The synthesis method is not particularly limited, and may be, for example, a method of adding together pixel values ​​of the image 203 of the first structure and pixel values ​​of the image 204 of the second structure. In this case, the pixel values ​​of the image 203 of the first structure or the pixel values ​​of the image 204 of the second structure may be weighted.

[0029] The error reduction unit 504 controls learning (adjustment of parameters of the learning model) in the first structure estimation unit 502 and the second structure estimation unit 512 so as to reduce the difference in pixel values ​​between the composite image 206 and the second detector training image 202. For example, when machine learning is used in the first structure estimation unit 502 or the second structure estimation unit 512, the values ​​of the machine learning weight parameters of the first structure estimation unit 502 and the second structure estimation unit 512 are adjusted so as to reduce the difference calculated by the error reduction unit 504. Note that the image that the error reduction unit 504 compares with the composite image 206 may be the second detector training image preprocessed by the preprocessing unit 511.

[0030] 6 shows a block diagram of the structure estimation unit 211. The second detector image 222 input to the structure estimation unit 211 is an image generated based on the signal intensity detected by the second detector 309, which is obtained by the imaging unit 801 scanning an electron beam over a semiconductor device to be inspected and measured. The structure estimation unit 211 includes a preprocessing unit 601 that removes noise and the like from the second detector image 222, and a second structure estimation unit 602 that applies a trained model 212 to output an image 223 of the second structure from the second detector image preprocessed by the preprocessing unit 601. The trained model 212 is a machine learning parameter of the second structure estimation unit 512 in a state in which the structure learning unit 210 determines that the error between the second detector training image 202 and the composite image 206 has become sufficiently small.

[0031] The preprocessing unit 601 performs preprocessing such as contrast correction, noise removal, blur removal, and removal of regions unrelated to the structure on the second detector image 222, similar to the preprocessing unit 511. However, in order to obtain an image that shows the same tendency as the image input to the second structure estimation unit 512, the preprocessing unit 601 applies preprocessing similar to that applied by the preprocessing unit 511.

[0032] The second structure estimation unit 602 estimates an image 223 of the second structure from the second detector image processed by the preprocessing unit 601. However, to make the trained model 212 applicable, the second structure estimation unit 602 has the same network architecture as the second structure estimation unit 512.

[0033] As a result, the image processing system of this embodiment makes it possible to accurately estimate an image of the second structure of an inspection / measurement target from the second detector image by using a trained model trained using a first detector image containing information about the first structure (upper structure) of a semiconductor device and a second detector image containing information about the first structure (upper structure) and the second structure (lower structure). This method eliminates the need for a human to annotate the structure and create training data, which has the advantage of eliminating the burden of creating training data for machine learning.

[0034] Although the semiconductor device to be inspected and measured has been described as having two stacked layers, the image processing system of this embodiment can also be used for semiconductor devices having a multi-layer stacked structure. FIG. 7 shows a schematic diagram of a semiconductor device 701 having L layers (where L is an arbitrary integer satisfying 2 or more). The layers are defined by the patterns and materials to be formed. Range 702 indicates the range of structure included as information in the second detector image. In this example, the second detector image is an image based on signal electrons containing information from the first layer (top layer) to the Mth layer (any integer satisfying 2≦M≦L) of the semiconductor device. Range 703 indicates the range of structure included as information in the first detector image. In this example, the first detector image is an image based on signal electrons containing information from the first layer (top layer) to the Nth layer (any integer satisfying 1≦N<M) of the semiconductor device. Such an image can be obtained, for example, by detecting signal electrons, mainly backscattered electrons, emitted by irradiating the sample with electrons of different accelerating voltages, or by detecting backscattered electrons through energy discrimination and forming an image of backscattered electrons with different energies.

[0035] The schematic diagram of Fig. 7 generalizes the semiconductor device of Fig. 3, and in a device in which the 1st to Lth layers are stacked, the structure formed by the 1st to Nth layers can be made to correspond to the first structure, and the structure formed by the (N+1)th to Mth layers can be made to correspond to the second structure. Also, in the schematic diagram of Fig. 7, the structure of a semiconductor device when L=2, M=2, and N=1 can be said to be the structure of the semiconductor device of Fig. 3.

[0036] When L = 5 and M = 4, any of N = 1 to 3 can be selected. When N = 2, the first detector image contains structural information from the first to second layers, and the second detector image contains structural information from the first to fourth layers. However, the appearance differs depending on the layer structure and material. That is, if the second detector training image 202 contains structural information from the third to fourth layers, the second structure image 204 estimated by the second structure estimation unit 512 after training will contain information combining the structures of the third and fourth layers. On the other hand, if the second detector training image 202 contains only structural information from the third layer, the second structure image 204 will contain only structural information from the third layer, and if the second detector training image 202 contains only structural information from the fourth layer, the second structure image 204 will contain only structural information from the fourth layer.

[0037] FIG. 8 shows a flowchart for creating the trained model 212. To acquire training data, the control computer 802 controls the imaging unit 801 to capture first detector training images and second detector training images (S01). The captured images are then displayed on a display device for presentation to the user, who can confirm the training images (S02). It is preferable to select images with variations for the training data so as to be robust against manufacturing errors. For example, variations are introduced in the amount of misalignment between the first structure and the second structure, the presence and type of defects, etc.

[0038] After collecting the amount of training data required for model training, the training computer 803 performs preprocessing on each of the first-detector training images and the second-detector training images, such as contrast correction, noise removal, blur removal, and removal of regions unrelated to the structure (S03). Then, an image of the first structure is estimated from the preprocessed first-detector training images using the first model (S04), an image of the second structure is estimated from the preprocessed second-detector training images using the second model (S05), a pseudo second-detector training image is synthesized from the estimated first-structure image and second-structure image (S06), and parameters of the first model and the second model are adjusted so that the difference between the pixel values ​​of the second-detector training image and the pseudo second-detector training image is reduced (S07). The image of the first structure estimated by the first model and the image of the second structure estimated by the second model are images that do not fully represent the respective structures at the initial stage of training, but by repeatedly performing parameter adjustment using the training data, images displaying the respective structures are inferred.

[0039] Thereafter, the image of the first structure estimated by the first model is the intended image, and the image of the second structure estimated by the second model is the intended image, and the results are presented to the user for confirmation (S08). If the estimated image is not the intended image, training data is added, the model architecture is changed, and other adjustments such as changes to hyperparameters such as the optimization method, batch size, and learning rate are made, and training is performed again (S09). On the other hand, if the estimated image is the intended image, the model parameter adjustment is terminated, and the trained model of the second model is saved (S10).

[0040] 9 shows a flowchart for estimating an image of the second structure using the trained model 212. The control computer 802 controls the imaging unit 801 to capture a second detector image of the semiconductor device to be inspected or measured (S11). Next, the trained model saved in step S10 is selected (S12), and the selected trained model is applied to the model for estimating the image of the second structure (S13). To prevent a large change in the input image between learning and inference, the trained model whose parameters have been adjusted using an image that is the same as or similar to the image used in the inference stage is used in the inference stage.

[0041] Next, preprocessing is performed on the second detector image (S14). The content of this preprocessing is the same as that performed on the second detector image of the training data in step S05. This allows the image to have the same tendency as during training. After that, an image of the second structure is estimated from the preprocessed second detector image using the trained model (S15).

[0042] FIG. 10 shows an example of a GUI displayed on a display device during the confirmation of training images (S02) and the confirmation of estimation (S08). A display screen 901 includes a training image display section 902 and an estimated image display section 903. In step S02, training images used for model training are displayed in the training image display section 902. The training image display section 902 displays first-detector training images 911 and second-detector training images 912 acquired as training data. Alternatively, first-detector training images and second-detector training images that have been preprocessed may be displayed, or both. This display allows confirmation of whether the training images and preprocessed training images are captured as expected and whether images captured of unintended different semiconductor devices have been mixed in. Images that are inappropriate as training images are removed from the training image data. After the training images have been confirmed, model learning is initiated by pressing a start learning button 904.

[0043] After the learning is completed, an image estimated from the learning image is displayed on the estimated image display unit 903, and in step S08, the user evaluates the estimation result by comparing the two (S08). Here, an image 913 of a first structure and an image 914 of a second structure are displayed on the estimated image display unit 903. In this case, it can be confirmed that a first structure extending vertically and a second structure extending horizontally have been estimated from a first detector learning image 911 and a second detector learning image 912 in the learning image. Note that the estimated image display unit 903 may display not only an image at the end of learning, but also an image during learning or an image output during learning.

[0044] The present invention is not limited to the above-described embodiments and includes various modifications. For example, the above-described embodiments have been described in detail to clearly explain the present invention, and are not necessarily limited to those including all of the described configurations. Furthermore, it is possible to replace part of the configuration of one embodiment with the configuration of another embodiment, or to add the configuration of another embodiment to the configuration of one embodiment. Furthermore, it is possible to add, delete, or replace part of the configuration of each embodiment with other configurations. Furthermore, the above-described configurations, functions, processing units, processing means, etc. may be implemented in hardware, in part or in whole, by, for example, designing them as integrated circuits. Furthermore, the above-described configurations, functions, etc. may be implemented in software, by a processor interpreting and executing a program that realizes each function. Information such as programs, tables, and files that realize each function can be stored in memory, a recording device such as a hard disk or solid-state drive (SSD), or a recording medium such as a memory card or optical disc.

[0045] 101: Image, 102: Background region, 103: First structure region, 104: Second structure region, 105: Superimposed region, 106: Histogram, 107, 108, 109: Distribution, 110, 111: Threshold, 112: Edge, 121: Image, 122: Background region, 123: First structure region, 125: Superimposed region, 126: Maximum differential point, 127: Point, 201: First detector training image, 202: Second detector training image, 203: First structure image, 204: Second structure image, 206: Synthesized image, 210: structure learning unit, 211: structure estimation unit, 212: trained model, 222: second detector image, 223: image of second structure, 301: first structure, 302: second structure, 303: electron source, 304: electrons, 305: first signal electrons, 306: first detector, 307, 311: backscattered electrons, 309: second detector, 401: first structure, 402: first background portion, 403: first structure portion, 411: second structure, 414: second background portion, 415: second structure portion, 421: first detector Image, 422: background region, 423: first structure region, 431: second detector image, 432: background region, 433: first structure region, 435: second structure region, 436: superimposition region, 501, 511: pre-processing unit, 502: first structure estimation unit, 503: image synthesis unit, 504: error reduction unit, 512: second structure estimation unit, 601: pre-processing unit, 602: second structure estimation unit, 701: semiconductor device, 702, 703: range, 800: image processing system, 801: imaging unit, 802: control controller computer, 803: learning computer, 804: external storage device, 805: network, 811: processor, 812: memory, 813: storage device, 814: input I / F, 815: output I / F, 816: communication I / F, 817: bus, 901: display screen, 902: learning image display unit, 903: estimated image display unit, 904: learning start button, 911: first detector learning image, 912: second detector learning image, 913: image of first structure, 914: image of second structure.

Claims

1. An image processing system for processing images of a semiconductor device captured by a charged particle beam device, wherein the semiconductor device has a first structure and a second structure formed below the first structure, and the image processing system comprises: a storage device for storing, as training data, a set of first training image data including information on the first structure and second training image data including information on the first structure and the second structure, both of which are captured by the charged particle beam device in the same field of view of the semiconductor device; a structure learning unit that receives the first training image data and the second training image data and generates a training model for estimating an image of the first structure and an image of the second structure, the structure learning unit comprising: a structure estimation unit that uses the training model to estimate an image of the first structure from the first training image data and an image of the second structure from the second training image data; an image synthesis unit that synthesizes the image of the first structure and the image of the second structure estimated by the structure estimation unit to synthesize a pseudo image of the second training image data; and an error reduction unit that adjusts parameters of the learning model to reduce errors between pixel values ​​of the pseudo image and pixel values ​​of an image of the second training image data.

2. In claim 1, the structure estimation unit includes a first structure estimation unit that estimates an image of the first structure from the first training image data using a first learning model, and a second structure estimation unit that estimates an image of the second structure from the second training image data using a second learning model, and the error reduction unit adjusts parameters of the first learning model and the second learning model so as to reduce the error between the pixel values ​​of the pseudo image and the pixel values ​​of the image of the second training image data.

3. An image processing system as claimed in claim 2, which uses a trained model of the second structure estimation unit, whose parameters have been adjusted by the error reduction unit, to estimate an image of the second structure from image data containing information on the first structure and the second structure, captured by the charged particle beam device for the semiconductor device to be inspected or measured.

4. In claim 3, the structure estimation unit comprises a first pre-processing unit that pre-processes images of the first training image data to be input to the first structure estimation unit, and a second pre-processing unit that pre-processes images of the second training image data to be input to the second structure estimation unit, and an image processing system that uses the trained model to estimate an image of the second structure from an image of the image data of the semiconductor device to be inspected or measured that has been subjected to the same pre-processing as that performed by the second pre-processing unit.

5. An image processing system according to claim 1, wherein the image synthesis unit synthesizes the pseudo image by adding together pixel values ​​of the image of the first structure and pixel values ​​of the image of the second structure.

6. An image processing system according to claim 1, wherein the semiconductor device is a semiconductor device in which 1st to Lth layers (L is any integer equal to or greater than 2) are stacked from top to bottom, the first structure is a structure formed by 1st to Nth layers (N is any integer equal to or less than L), and the second structure is a structure formed by (N+1)th to Mth layers (M is any integer greater than N and equal to or less than L).

7. An image processing system according to claim 1, wherein the charged particle beam device comprises a first detector for detecting first signal electrons mainly consisting of secondary electrons and a second detector for detecting second signal electrons mainly consisting of backscattered electrons, and the first training image data is generated based on the signal intensity detected by the first detector, and the second training image data is generated based on the signal intensity detected by the second detector.

8. An image processing system for processing an image of a semiconductor device having a first structure and a second structure formed below the first structure, comprising: a charged particle beam device that acquires image data including information on the first structure and the second structure for the semiconductor device to be inspected or measured; and a structure estimation unit that uses a trained model to estimate an image of the second structure from the image data acquired by the charged particle beam device for the semiconductor device to be inspected or measured, wherein the trained model uses a set of first training image data including information on the first structure and second training image data including information on the first structure and the second structure, both of which are captured by the charged particle beam device in the same field of view for the semiconductor device; and estimates an image of the first structure from the first training image data using the first trained model, and an image of the second structure from the second training image data using the second trained model; An image processing system in which the second learning model is considered to have been trained by adjusting the parameters of the first learning model and the second learning model so as to reduce the error between the pixel values ​​of a pseudo image of the second learning image data, which is a combination of the estimated image of the first structure and the image of the second structure, and the pixel values ​​of the image of the second learning image data.

9. An image processing system according to claim 8, wherein the structure estimation unit comprises a pre-processing unit that performs pre-processing of the image of the image data, and parameters of the second learning model are adjusted using the second learning image data that has been subjected to the same pre-processing as that performed by the pre-processing unit.

10. An image processing system according to claim 8, wherein the semiconductor device is a semiconductor device in which 1st to Lth layers (L is any integer equal to or greater than 2) are stacked from top to bottom, the first structure is a structure formed by 1st to Nth layers (N is any integer equal to or less than L), and the second structure is a structure formed by (N+1)th to Mth layers (M is any integer greater than N and equal to or less than L).

11. An image processing system according to claim 8, wherein the charged particle beam device comprises a first detector for detecting first signal electrons mainly consisting of secondary electrons and a second detector for detecting second signal electrons mainly consisting of backscattered electrons, and the first training image data is generated based on the signal intensity detected by the first detector, and the image data and the second training image data are generated based on the signal intensity detected by the second detector.

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