Distributed radar transceiver system

By employing a reference signal generation unit and a signal synchronization unit in the distributed radar, each transceiver chip can autonomously generate a synchronized local oscillator signal, thus solving the problems of high loss and error in the prior art and achieving efficient radar signal processing and analysis.

WO2025255842A1PCT designated stage Publication Date: 2025-12-18TSINGHUA UNIVERSITY
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Patent Information

Application Number
PCT/CN2024/099409
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-06-14
Publication Date
2025-12-18

AI Technical Summary

Technical Problem

In distributed MIMO radar, existing technologies require the local oscillator signals of each transceiver to be distributed uniformly through a central station, resulting in high losses and high hardware costs. At the same time, there are system errors that affect the radar imaging quality.

Method used

Multiple identical reference signals are generated by a reference signal generation unit. Each transceiver chip autonomously generates its own local oscillator signal based on the corresponding reference signal and maintains synchronization through a signal synchronization unit to eliminate time, frequency and slope errors. The signal is processed using a phase-locked loop, frequency multiplier and power amplifier.

Benefits of technology

This enables the localized generation of the local oscillator signal, avoiding losses and errors during transmission, ensuring the correct acquisition and interpretation of radar signals, and improving radar imaging quality.

✦ Generated by Eureka AI based on patent content.

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Abstract

A distributed radar transceiver system, relating to the technical field of radars. The distributed radar transceiver system comprises: a reference signal generation unit, configured to generate a plurality of identical reference signals; and a plurality of transceiver chips, wherein the plurality of transceiver chips are in one-to-one correspondence to the plurality of reference signals, each transceiver chip among the plurality of transceiver chips is configured to generate a local oscillator signal on the basis of the corresponding reference signal, and the local oscillator signals generated by the transceiver chips are the same. The local oscillator signals are generated by the transceiver chips, eliminating reliance on centralized distribution from a central station and thereby avoiding losses and errors of the local oscillator signals generated during transmission. In addition, because reference signals received by the transceiver chips are identical, the local oscillator signals generated by the transceiver chips are identical, so that the transceiver chips can locally process echoes of radar signals sent by the transceiver chips.
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Description

A distributed radar transceiver system TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of radar, and in particular to a distributed radar transceiver system. BACKGROUND

[0002] In a distributed MIMO radar, in order to be able to localize processing of echoes of signals transmitted by another transceiver in one transceiver, it is necessary to keep the local oscillator signals of each transceiver synchronized.

[0003] In the related art, the local oscillator signals of each transceiver are generated by a central station and transmitted to each transceiver by a chain transmission method or an equal power distribution method. However, since the local oscillator signal frequency is high, this method will bring great line loss and very high hardware cost in the transmission process. In addition, due to the differences between each distribution channel, the local oscillator signal transmitted by the equal power distribution method may also have system errors, affecting the radar imaging quality.

[0004] SUMMARY

[0005] To overcome the problems in the related art, the present disclosure provides a distributed radar transceiver system.

[0006] According to a first aspect of an embodiment of the present disclosure, a distributed radar transceiver system is provided, comprising: a reference signal generation unit configured to generate a plurality of identical reference signals;

[0007] a plurality of transceiver chips corresponding one-to-one to the plurality of reference signals, each of the plurality of transceiver chips being configured to generate a local oscillator signal according to a corresponding reference signal, and the local oscillator signals generated by each of the plurality of transceiver chips being identical.

[0008] In some embodiments, the reference signal generation unit comprises:

[0009] a plurality of voltage-controlled crystal oscillators, each of the plurality of voltage-controlled crystal oscillators being configured to generate a reference signal;

[0010] at least one signal synchronization unit, an Nth signal synchronization unit of the at least one signal synchronization unit being configured to synchronize a reference signal generated by an Nth voltage-controlled crystal oscillator of the plurality of voltage-controlled crystal oscillators with a reference signal generated by an N+1th voltage-controlled crystal oscillator, where N is a positive integer.

[0011] In some embodiments, each of the at least one signal synchronization unit comprises, in sequence, a phase discriminator, a charge pump, and a low-pass filter.

[0012] The phase detector is configured to compare phases of two input reference signals, and generate an error signal showing a phase difference between the two input reference signals;

[0013] The charge pump is configured to convert the error signal into a control voltage, which is used to control a reference signal generated by a voltage-controlled crystal oscillator;

[0014] The low-pass filter is configured to filter out noise in the control voltage.

[0015] In some embodiments, an output terminal of an Nth voltage-controlled crystal oscillator in the plurality of voltage-controlled crystal oscillators and an output terminal of an (N+1)th voltage-controlled crystal oscillator are connected to a phase detector of an Nth signal synchronization unit in the at least one signal synchronization unit, an output terminal of a low-pass filter of the Nth signal synchronization unit is connected to an input terminal of the (N+1)th voltage-controlled crystal oscillator, so that a reference signal generated by the (N+1)th voltage-controlled crystal oscillator is consistent with a reference signal generated by the Nth voltage-controlled crystal oscillator, where N is a positive integer.

[0016] In some embodiments, each transceiver chip in the plurality of transceiver chips comprises a phase-locked loop, a local oscillator power divider, a signal transmitting unit, and a signal receiving unit.

[0017] The phase-locked loop is configured to generate a local oscillator signal according to a reference signal, the local oscillator power divider is configured to divide the local oscillator signal into two local oscillator signals, one of the two local oscillator signals is transmitted to the signal transmitting unit, and the other local oscillator signal is transmitted to the signal receiving unit.

[0018] In some embodiments, the signal transmitting unit comprises a transmitting-end frequency multiplier and a power amplifier.

[0019] The transmitting-end frequency multiplier is configured to increase a frequency of the local oscillator signal to a frequency of a radar signal for transmission.

[0020] The power amplifier is configured to amplify a transmission power of the local oscillator signal after the frequency increase.

[0021] In some embodiments, the signal transmitting unit further comprises a transmitting-end power divider, and the transmitting-end frequency multiplier comprises a primary transmitting-end frequency multiplier and a secondary transmitting-end frequency multiplier.

[0022] An input terminal of the primary transmitting-end frequency multiplier is configured to receive the local oscillator signal transmitted to the signal transmitting unit, an output terminal of the primary transmitting-end frequency multiplier is connected to an input terminal of the transmitting-end power divider, and the transmitting-end power divider comprises a plurality of output terminals, each of the output terminals of the transmitting-end power divider is sequentially connected with a secondary transmitting-end frequency multiplier and a power amplifier.

[0023] In some embodiments, the signal receiving unit comprises a receiving end frequency multiplier, a mixer and a low noise amplifier.

[0024] The receiving end frequency multiplier is configured to increase the frequency of the local oscillator signal to the frequency of the radar signal transmitted by the signal transmitting unit.

[0025] The low noise amplifier is configured to amplify the received echo signal.

[0026] The mixer is configured to mix the frequency-increased local oscillator signal output by the receiving end frequency multiplier with the echo signal amplified by the low noise amplifier to generate an intermediate frequency signal.

[0027] In some embodiments, the signal receiving unit further comprises a receiving end power divider, and the receiving end frequency multiplier comprises a primary receiving end frequency multiplier and a secondary receiving end frequency multiplier.

[0028] The input end of the primary receiving end frequency multiplier is configured to receive the local oscillator signal transmitted to the signal receiving unit, and the output end of the primary receiving end frequency multiplier is connected to the input end of the receiving end power divider. The receiving end power divider comprises a plurality of output ends, and each output end of the receiving end power divider is sequentially connected with a secondary receiving end frequency multiplier, a mixer and a low noise amplifier.

[0029] In some embodiments, the local oscillator signal generated by the phase-locked loop is a frequency-modulated continuous wave.

[0030] The technical solutions provided by the embodiments of the present disclosure can have the following beneficial effects:

[0031] The distributed radar transceiver system provided by the embodiments of the present disclosure comprises a reference signal generating unit and a plurality of transceiver chips. The reference signal generating unit is configured to generate a plurality of identical reference signals. The plurality of transceiver chips correspond to the plurality of reference signals one by one, and each transceiver chip in the plurality of transceiver chips is configured to generate a local oscillator signal according to the corresponding reference signal, and the local oscillator signal generated by each transceiver chip is identical. The local oscillator signal in the embodiments of the present disclosure is generated by each transceiver chip itself, and no longer depends on the unified distribution of the central station, thereby avoiding the loss and error generated in the transmission process of the local oscillator signal. Since the reference signals received by each transceiver chip are completely identical, the local oscillator signals generated by each transceiver chip are completely identical, so that each transceiver chip can locally process the echo of the radar signal emitted by each transceiver chip. BRIEF DESCRIPTION OF DRAWINGS

[0032] FIG. 1 shows a structure schematic diagram of a distributed radar transceiver system in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0033] The exemplary embodiments will be described in detail herein with reference to the attached drawings. The description of the exemplary embodiments is intended to apply to all alternative embodiments, as would be understood by persons skilled in the art. To that end, the following description is not intended to limit the exemplary embodiments to a particular application or applications in any way. On the contrary, the intention is to cover all possible combinations and modifications of the exemplary embodiments, as would be understood by persons skilled in the art. The description of the exemplary embodiments is intended to apply to all alternative embodiments, as would be understood by persons skilled in the art. To that end, the following description is not intended to limit the exemplary embodiments to a particular application or applications in any way. On the contrary, the intention is to cover all possible combinations and modifications of the exemplary embodiments, as would be understood by persons skilled in the art.

[0034] The terminology used in the present disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of the present disclosure. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0035] In addition, the terms "first", "second", etc. are used herein only to describe different instances, and cannot be construed to indicate or imply relative importance.

[0036] FIG. 1 shows a schematic diagram of a distributed radar transceiver system according to an embodiment of the present disclosure. As shown in FIG. 1, the distributed radar transceiver system includes a reference signal generation unit and a plurality of transceiver chips. The reference signal generation unit is configured to generate a plurality of identical reference signals. The plurality of transceiver chips correspond to the plurality of reference signals one-to-one. Each of the plurality of transceiver chips is configured to generate a local oscillator signal according to the reference signal corresponding thereto, and the local oscillator signals generated by each of the plurality of transceiver chips are identical.

[0037] In some embodiments, the reference signal generation unit includes a plurality of voltage controlled crystal oscillators (VCXOs) and at least one signal synchronization unit. Each of the plurality of VCXOs is configured to generate a reference signal. An Nth signal synchronization unit of the at least one signal synchronization unit is configured to synchronize the reference signal generated by an Nth VCXO of the plurality of VCXOs with the reference signal generated by an (N+1)th VCXO of the plurality of VCXOs, where N is a positive integer.

[0038] Please continue to refer to FIG. 1, which shows three VCXOs and two signal synchronization units. The signal synchronization unit 1 is configured to synchronize the reference signal generated by the VCXO 2 in real time to the reference signal generated by the VCXO 1, and the signal synchronization unit 2 is configured to synchronize the reference signal generated by the VCXO 3 to the reference signal generated by the VCXO 2. In this way, the reference signals generated by the VCXOs can be kept in real time synchronization in a chain manner.

[0039] It can be understood that the number of voltage-controlled crystal oscillators in the embodiments of the present disclosure is the same as the number of transceiver chips, thereby ensuring the one-to-one correspondence between the reference signals and the transceiver chips. Since each voltage-controlled crystal oscillator can independently generate a reference signal, and the reference signal generated by each voltage-controlled crystal oscillator is only transmitted to one transceiver chip, errors generated in the signal distribution process can be avoided. In addition, compared with the direct transmission of the local oscillator signal in the related art, since the frequency of the reference signal is much lower than that of the local oscillator signal, the transmission cost of the reference signal is lower, and the line loss is lower.

[0040] In some embodiments, each of the at least one signal synchronization unit comprises a phase-frequency detector (PFD), a charge pump (CP) and a low-pass filter (LPF) connected in sequence. The phase-frequency detector is used to compare the phases of the two input reference signals to generate an error signal; wherein the error signal is used to show the phase difference between the two input reference signals. The charge pump is used to convert the error signal into a control voltage; wherein the control voltage is used to control the reference signal generated by the voltage-controlled crystal oscillator. The low-pass filter is used to filter out the noise in the control voltage, so as to smooth the control process of the reference signal.

[0041] It can be understood that the implementation principle of the signal synchronization unit in the embodiments of the present disclosure is similar to that of the phase-locked loop, which is to compare the phase difference between the output signal (corresponding to the reference signal generated by the N+1th voltage-controlled crystal oscillator) and the reference signal (corresponding to the reference signal generated by the Nth voltage-controlled crystal oscillator), and convert it into a control voltage, so as to adjust the output signal to keep it synchronized with the reference signal.

[0042] Exemplarily, as shown in FIG. 1, the output end of the Nth voltage-controlled crystal oscillator in the plurality of voltage-controlled crystal oscillators and the output end of the N+1th voltage-controlled crystal oscillator are respectively connected to the phase-frequency detector of the Nth signal synchronization unit in the at least one signal synchronization unit, and the output end of the low-pass filter of the Nth signal synchronization unit is connected to the input end of the N+1th voltage-controlled crystal oscillator, so that the reference signal generated by the N+1th voltage-controlled crystal oscillator is consistent with the reference signal generated by the Nth voltage-controlled crystal oscillator, wherein N is a positive integer.

[0043] So far, the scheme provided by the embodiments of the present disclosure eliminates the time error, frequency error and slope error of each transceiver local oscillator signal, ensures the correct acquisition and analysis of the radar signal, and enables each transceiver to locally process the echo of any transceiver transmitted signal.

[0044] In some embodiments, each of the plurality of transceiver chips comprises a phase-locked loop (PLL), a local oscillator power divider, a signal transmitting unit, and a signal receiving unit. The phase-locked loop is configured to generate a local oscillator signal based on a reference signal, and the local oscillator power divider is configured to divide the local oscillator signal into two paths of local oscillator signals, one of which is transmitted to the signal transmitting unit, and the other of which is transmitted to the signal receiving unit.

[0045] That is, each reference signal generated by the reference signal generating unit is transmitted to the phase-locked loop of the transceiver chip corresponding thereto as a reference signal of a local oscillator signal, so that the phase-locked loop can output a stable local oscillator signal.

[0046] For example, for a frequency modulated continuous wave (FMCW) radar transceiver, the phase-locked loop can generate a stable FMCW based on a single-frequency reference signal. That is, the local oscillator signal generated by the phase-locked loop can be a FMCW.

[0047] In some embodiments, the signal transmitting unit can comprise a transmitting end frequency multiplier and a power amplifier. The transmitting end frequency multiplier is configured to raise the frequency of the local oscillator signal to the frequency of the radar signal for transmission. The power amplifier is configured to amplify the transmission power of the frequency-raised local oscillator signal to meet the power requirements of the radar signal transmission.

[0048] In some embodiments, the signal transmitting unit further comprises a transmitting end power divider, and the transmitting end frequency multiplier comprises a first transmitting end frequency multiplier and a second transmitting end frequency multiplier. The input end of the first transmitting end frequency multiplier is configured to receive the local oscillator signal transmitted to the signal transmitting unit, the output end of the first transmitting end frequency multiplier is connected to the input end of the transmitting end power divider, and the transmitting end power divider comprises a plurality of output ends, each of which is sequentially connected with a second transmitting end frequency multiplier and a power amplifier.

[0049] It can be understood that, by the arrangement of the transmitting end power divider, the local oscillator signal for transmission can be divided into multiple signals and distributed in multiple paths, thereby improving the aperture of the transceiver chip. It is worth noting that, due to the limited driving capability of a single frequency multiplier, the two-stage transmitting end frequency multiplier is arranged in the embodiments of the present disclosure, so that the signal passes through the first transmitting end frequency multiplier before being input to the transmitting end power divider, and each path of signal output by the power divider is connected to a separate second transmitting end frequency multiplier, so as to ensure that each path of signal output by the power divider can drive the corresponding power amplifier.

[0050] The first-stage transmitting end frequency multiplier and the second-stage transmitting end frequency multiplier can be the same frequency multiplier (for example, the frequency multiplier of 2 in FIG. 1) or different frequency multipliers. The terms "first-stage" and "second-stage" are used only to distinguish the positions of the transmitting end frequency multipliers, and are not used to limit the types of the frequency multipliers.

[0051] In some embodiments, the signal receiving unit includes a receiving end frequency multiplier, a mixer, and a low-noise amplifier. The receiving end frequency multiplier is configured to increase the frequency of the local oscillator signal to the frequency of the radar signal transmitted by the signal transmitting unit. The low-noise amplifier is configured to amplify the received echo signal. The mixer is configured to mix the local oscillator signal output by the receiving end frequency multiplier with the echo signal amplified by the low-noise amplifier to generate an intermediate frequency signal, which can be used for radar imaging, distance measurement, and other applications.

[0052] In some embodiments, the signal receiving unit further includes a receiving end power divider, and the receiving end frequency multiplier includes a first-stage receiving end frequency multiplier and a second-stage receiving end frequency multiplier. The input end of the first-stage receiving end frequency multiplier is configured to receive the local oscillator signal transmitted to the signal receiving unit. The output end of the first-stage receiving end frequency multiplier is connected to the input end of the receiving end power divider. The receiving end power divider includes a plurality of output ends. Each output end of the receiving end power divider is sequentially connected to a second-stage receiving end frequency multiplier, a mixer, and a low-noise amplifier. The output end of the second-stage receiving end frequency multiplier is connected to the local oscillator input end of the mixer. The output end of the low-noise amplifier is connected to the radio frequency input end of the mixer.

[0053] It can be understood that, similar to the signal transmitting unit, the signal receiving unit can divide the local oscillator signal transmitted to the mixer into multiple signals through the receiving end power divider to perform multi-channel signal receiving. Based on the same principle, since the driving capability of a single frequency multiplier is limited, the embodiments of the present disclosure provide two-stage receiving end frequency multipliers. The signal is first passed through the first-stage receiving end frequency multiplier before being input to the receiving end power divider. Each channel of the signal output by the power divider is connected to an independent second-stage receiving end frequency multiplier to ensure that each channel of the signal output by the power divider can drive the corresponding mixer.

[0054] The first-stage receiving end frequency multiplier and the second-stage receiving end frequency multiplier can be the same frequency multiplier (for example, the frequency multiplier of 2 in FIG. 1) or different frequency multipliers. The terms "first-stage" and "second-stage" are used only to distinguish the positions of the receiving end frequency multipliers, and are not used to limit the types of the frequency multipliers.

[0055] The embodiments of the present disclosure are described in detail above with reference to the accompanying drawings, but the present disclosure is not limited to the specific details in the above-described embodiments. Various simple modifications can be made to the technical solutions of the present disclosure within the scope of the technical concept of the present disclosure, and these simple modifications all belong to the protection scope of the present disclosure.

[0056] Furthermore, any combination of various embodiments of the present disclosure can be made, as long as it does not deviate from the idea of the present disclosure, and it should be considered as disclosed in the present disclosure.

Claims

1. A distributed radar transceiver system, characterized by The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device.

2. The distributed radar transceiver system of claim 1, wherein, The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device.

3. The distributed radar transceiver system of claim 2, wherein, The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device.

4. The distributed radar transceiver system of claim 3, wherein, The application relates to a transceiver chip and a transceiver device.

5. The distributed radar transceiver system of claim 1, wherein, The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device.

6. The distributed radar transceiver system of claim 5, wherein, The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device.

7. The distributed radar transceiver system of claim 6, wherein, The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device. The application relates to a transceiver chip and a transceiver device. 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The application relates to a transceiver chip and a transceiver device. The application relates to 8. The distributed radar transceiver system of claim 5, wherein, The signal receiving unit comprises a receiving end frequency doubler, a mixer and a low noise amplifier; The receiving end frequency doubler is used to increase the frequency of the local signal to the frequency of the radar signal transmitted by the signal transmitting unit; The low noise amplifier is used to amplify the received echo signal; The mixer is used to mix the frequency-increased local signal output by the receiving end frequency doubler with the echo signal amplified by the low noise amplifier to generate an intermediate frequency signal.

9. The distributed radar transceiver system of claim 8, wherein, The signal receiving unit further comprises a receiving end power divider, and the receiving end frequency doubler comprises a first receiving end frequency doubler and a second receiving end frequency doubler; The input end of the first receiving end frequency doubler is used to receive the local signal transmitted to the signal receiving unit, and the output end of the first receiving end frequency doubler is connected to the input end of the receiving end power divider; the receiving end power divider comprises a plurality of output ends, and each output end of the receiving end power divider is sequentially connected with a second receiving end frequency doubler, a mixer and a low noise amplifier.

10. The distributed radar transceiver system of claim 5, wherein, The local signal generated by the phase-locked loop is a frequency-modulated continuous wave.

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