A broadband signal analyzer and a method for compensating for in-band flatness.

Abstract

This invention provides a broadband signal analyzer, comprising: at least one superheterodyne frequency conversion receiving unit, at least one filtering unit, an ADC, a digital down-conversion and decimation filtering unit, an adaptive filtering unit, a data processing and display unit, and a scan controller, connected in sequence; the superheterodyne frequency conversion receiving unit includes: an attenuator, a mixer, and a local oscillator signal, the attenuator, mixer, and filtering unit being connected in sequence, the output terminal of the local oscillator signal being connected to the input terminal of the mixer, the input terminal of the local oscillator signal being connected to the output terminal of the scan controller, and the input terminal of the scan controller being connected to the output terminal of the ADC. This invention overcomes the problems of high filter order and excessive processing resource consumption caused by existing broadband signal in-band flatness compensation methods.

Description

Technical Field

[0001] This invention relates to the field of communication technology, specifically to a broadband signal analyzer and a method for compensating for in-band flatness. Background Technology

[0002] The rapid development of broadband radar, 5G communication, and other technologies places increasingly higher demands on the analysis bandwidth of signal analyzers. Applications such as broadband frequency-hopping signal testing and predistortion testing require signal analysis bandwidths reaching the GHz level in the millimeter-wave band. Ideally, devices possess perfect linearity, exhibiting no fluctuations within the frequency band for signals of any bandwidth. However, factors such as interstage impedance mismatch at the signal receiving front-end and gain imbalance in analog devices can degrade the in-band flatness of broadband systems, severely impacting the accuracy of measurement results. Therefore, in-band flatness compensation is necessary to improve technical specifications such as dynamic range and linearity.

[0003] Existing technical solutions, such as the "Ultra-wideband Adaptive Fluctuation Compensation Method and System" (CN201710047097.5), employ frequency domain sampling techniques to sweep the system's frequency response across the entire operating frequency range, obtaining in-band fluctuation data. When the target fluctuation compensation filter is a complex filter, the frequency points of the in-band fluctuation data are shifted to the baseband, and the in-band fluctuation data is inverted to obtain the frequency domain response within the complex filter's band. The target fluctuation compensation filter coefficients are then calculated based on the frequency domain response within the complex filter's band. When the target fluctuation compensation filter is a real filter, the frequency points of the in-band fluctuation data are shifted to the first Nyquist zone of the digital intermediate frequency (IF), and the in-band fluctuation data is inverted to obtain the frequency domain response within the real filter's band. The target fluctuation compensation filter coefficients are then calculated based on the frequency domain response within the real filter's band. The calculated target fluctuation compensation filter coefficients are then configured into the target fluctuation compensation filter. The required fluctuation compensation filter is obtained by processing the filter according to the type of the target fluctuation compensation filter in the system. The fluctuation in the system is then offset by adding a fluctuation compensation filter whose frequency domain response is opposite to the in-band fluctuation of the system, thereby improving the flatness of each carrier signal frequency band in the system.

[0004] The calculation of the target fluctuation compensation filter coefficients based on the frequency domain response within the complex filter band includes the following steps:

[0005] The time-domain signal is obtained by performing an inverse fast Fourier transform on the frequency domain response within the band of the complex filter.

[0006] Based on the preset filtering frequency band range, various window functions are used to extract the time domain signal, and the compensation effects of fluctuation compensation filters designed with different window functions are compared.

[0007] The coefficients of the fluctuation compensation filter with the best compensation effect are obtained as the coefficients of the target fluctuation compensation filter.

[0008] The step of calculating the target fluctuation compensation filter coefficients based on the frequency domain response within the real number filter band includes the following steps:

[0009] Based on the frequency domain response within the band of the real number filter, the corresponding real number filter is designed using the FIRPM function;

[0010] The coefficients of the real-number filter are obtained as the coefficients of the target fluctuation compensation filter.

[0011] The core of existing technologies is to obtain the frequency domain response of the signal by sampling the in-band spectrum at equal intervals, and then inverting the sampling to obtain the frequency domain response of the compensation filter, thereby canceling the in-band fluctuations. To accurately characterize the frequency domain response of the acquired signal within its band, dense sampling of the signal spectrum is required. As the signal bandwidth increases, the number of sampling points also increases, leading to a higher order of the compensation filter. Therefore, even with a low filter order, existing technologies still exhibit significant fluctuations in the in-band frequency response. To improve the flatness compensation accuracy, it is necessary to increase the order of the compensation filter. For example, when the signal analysis bandwidth reaches 1 GHz or even higher, the order of the compensation filter will exceed 200. Improving the in-band flatness of broadband signals requires increasing the order of the compensation filter, thus consuming significant hardware processing resources, increasing design difficulty and cost, and increasing system power consumption and complexity. Furthermore, existing technologies are limited by the inherent limitations of frequency domain sampling, resulting in a transition band between the passband and stopband, which exacerbates frequency response fluctuations and affects the in-band flatness compensation effect. Therefore, there is a need for a method that can solve the problem that existing technologies require excessively high filter orders, consume a large amount of hardware processing resources, and that the filter order and system complexity continue to increase with the increase of bandwidth. Summary of the Invention

[0012] The main objective of this invention is to provide a broadband signal analyzer and an in-band flatness compensation algorithm to solve the problems of high filter order and excessive processing resource consumption caused by using existing broadband signal in-band flatness compensation methods.

[0013] To achieve the above objectives, the present invention provides a broadband signal analyzer, comprising: at least one superheterodyne frequency conversion receiving unit, at least one filtering unit, an ADC, a digital down-conversion and decimation filtering unit, an adaptive filtering unit, a data processing and display unit, and a scan controller connected in sequence; the superheterodyne frequency conversion receiving unit includes: an attenuator, a mixer, and a local oscillator signal, the attenuator, the mixer, and the filtering unit being connected in sequence, the output terminal of the local oscillator signal being connected to the input terminal of the mixer, the input terminal of the local oscillator signal being connected to the output terminal of the scan controller, and the input terminal of the scan controller being connected to the output terminal of the ADC.

[0014] Furthermore, the filtering unit includes a first filtering unit and a second filtering unit. The first filtering unit includes a first intermediate frequency (IF) filter, and the second filtering unit includes a second IF filter and an anti-aliasing filter. The first superheterodyne frequency conversion receiving unit and the first IF filter constitute a first mixing unit, and the second superheterodyne frequency conversion receiving unit and the second filtering unit constitute a second mixing unit. The first-stage mixing unit and the second-stage mixing unit are connected sequentially to form a multi-stage mixing system. The output terminal of the anti-aliasing filter is connected to the input terminal of the ADC.

[0015] A method for compensating for in-band flatness includes the following steps:

[0016] S1, the signal source generates 501 multi-carrier signals with a bandwidth of 1GHz and an interval of 2MHz, which are input to the broadband signal analyzer through the radio frequency port;

[0017] S2, after receiving the signal, the broadband signal analyzer processes it through multi-stage mixing, ADC signal acquisition, digital down-conversion and decimation filtering units to obtain IQ signal data, saves the IQ signal and imports it into MATLAB software;

[0018] S3. Using MATLAB, 501 1GHz bandwidth signals with a 2MHz interval are generated as the desired signal d(n). The imported IQ signal data is used as the input signal x(n). Based on the adaptive filtering algorithm and the calculation method of the forgetting factor, a set of optimal filter coefficients of order N is obtained.

[0019] S4. Design a compensation filter with the same order as in step S3 in the FPGA of the broadband signal analyzer acquisition and processing board.

[0020] S5. The filter coefficients obtained in step S3 are configured into the compensation filter in S4 to complete the compensation of the flatness within the broadband signal band.

[0021] Further, step S3 includes:

[0022] Calculate the output signal y(n):

[0023] y(n)=w T(n-1)x(n), where w is the filter coefficient.

[0024] Calculate the estimated error signal e(n):

[0025] e(n) = d(n) - y(n)

[0026] Update the Kalman gain vector k(n):

[0027]

[0028] Update the inverse correlation matrix P(n):

[0029]

[0030] Update the filter tap weight vector w(n):

[0031] w(n)=w(n-1)+k(n)e * (n)

[0032] Repeat the above steps to obtain a set of optimal filter coefficients.

[0033] The forgetting factor λ is calculated as follows:

[0034]

[0035] λ min is the minimum forgetting factor set, r is the error threshold set, e(n) is the estimated error signal, and m controls the rate of change of the forgetting factor.

[0036] The technical solution of this invention has the following advantages:

[0037] (1) A time-domain adaptive filtering algorithm is proposed. By iteratively adjusting the coefficients of the filter, the waveform of the filtered time-domain signal gradually approaches the desired output. It is not necessary to obtain the frequency response of the compensation filter by densely sampling and inverting the frequency response of the acquired signal, which reduces the requirement for the filter order. At the same time, it can avoid the problem of large frequency response fluctuations in the transition band and improve the compensation effect.

[0038] (2) An adaptive filtering algorithm with a variable forgetting factor is proposed to reduce steady-state error and improve processing accuracy while accelerating the convergence speed.

[0039] (3) A broadband signal in-band flatness compensation method based on adaptive filtering is proposed. The signal source generates 501 1GHz bandwidth multicarrier signals with a spacing of 2MHz. The signals are input into a broadband signal analyzer through the radio frequency port. After processing by multi-stage mixing, ADC signal acquisition, digital down-conversion and decimation filtering unit, IQ signal data is obtained. The recursive least squares algorithm with variable forgetting factor is used to solve the problem and obtain a set of optimal filter coefficients of order N. The filter coefficients are configured into the compensation filter of the FPGA on the acquisition and processing board to realize the compensation of the in-band fluctuation of the system.

[0040] (4) The present invention can reduce the order of the 1GHz bandwidth signal compensation filter from more than 200 to less than 100, solving the problems of high filter order and excessive processing resources in the prior art. At the same time, it can make the in-band flatness better than ±2dB, reaching the current advanced level and improving the accuracy of broadband signal acquisition.

[0041] (5) This invention does not introduce a transition band at the boundary, thus avoiding fluctuations in the in-band frequency response. Therefore, the in-band flatness of broadband signals can be effectively improved by using low-order filters. Attached Figure Description

[0042] Figure 1 This is a schematic diagram of the structure of a broadband signal analyzer according to the present invention;

[0043] Figure 2 yes Figure 1 A schematic diagram of a multi-stage mixer structure for a broadband signal analyzer;

[0044] Figure 3 This is a schematic diagram of a method for compensating for flatness within a band according to the present invention.

[0045] The reference numerals in the above figures are as follows:

[0046] 11. Superheterodyne frequency converter receiving unit; 12. Filtering unit; 13. ADC; 14. Digital downconversion and decimation filtering unit; 15. Adaptive filtering unit; 16. Digital processing and display unit; 17. Scan controller. Detailed Implementation

[0047] It should be noted that in the description of this invention, terms such as "upper," "lower," "front," and "rear" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only used to facilitate the description of the structural relationship between the components of this invention and do not specifically mean that any component in this invention must have a specific orientation, be constructed and operated in a specific orientation, or be construed as a limitation of this invention.

[0048] Furthermore, the use of terms such as "first" and "second" in the invention is for descriptive purposes only and does not specifically refer to any order or sequence, nor is it intended to limit the invention. They are merely used to distinguish components or operations described using the same technical terms and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features.

[0049] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0050] The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings:

[0051] like Figure 1 A broadband signal analyzer is shown, comprising: a first superheterodyne frequency conversion receiving unit, a first filtering unit, a second superheterodyne frequency conversion receiving unit, a second filtering unit, an ADC 13, a digital down-conversion and decimation filtering unit 14, an adaptive filtering unit 15, a data processing and display unit, and a scan controller 17 connected in sequence; the superheterodyne frequency conversion receiving unit 11 includes: an attenuator, a mixer, and a local oscillator signal, the attenuator, the mixer, and the filtering unit 12 being connected in sequence, the output terminal of the local oscillator signal being connected to the input terminal of the mixer, the input terminal of the local oscillator signal being connected to the output terminal of the scan controller 17, and the input terminal of the scan controller 17 being connected to the output terminal of the ADC 13.

[0052] A broadband signal is input through the RF port. The superheterodyne frequency converter receiver 11 mixes the input signal with a frequency-tunable local oscillator signal to generate an intermediate frequency (IF) signal. The IF signal is then filtered by the filter unit 12 to remove the image frequency signal. The ADC 13 acquires the IF signal, realizing the conversion from analog to digital signal. Subsequently, according to the required analysis bandwidth and frequency resolution, it undergoes digital down-conversion and decimation filtering by the filter unit 14. The resulting baseband IQ signal data enters the adaptive filter unit 15 for in-band flatness compensation. The compensated data is then subjected to spectrum analysis and display. The scan controller 17 is used to control the tunable local oscillator signal.

[0053] Figure 1The data processing and display unit shown performs FFT processing on the compensated and filtered signal, and displays one or more measurement trajectories, such as statistical spectrum trajectory, maximum hold spectrum trajectory, minimum hold spectrum trajectory, or average processed spectrum trajectory, simultaneously in multiple display windows. The scan controller 17 controls the frequency switching of the tuning local oscillator and the dwell time of a certain tuning frequency point based on the signal characteristics.

[0054] Specifically, such as Figure 1 and Figure 2 As shown, the filtering unit includes a first filtering unit and a second filtering unit. The first filtering unit includes a first intermediate frequency (IF) filter, and the second filtering unit includes a second IF filter and an anti-aliasing filter. The first superheterodyne frequency conversion receiving unit and the first IF filter constitute a first mixing unit, and the second superheterodyne frequency conversion receiving unit and the second filtering unit constitute a second mixing unit. The first-stage mixing unit and the second-stage mixing unit are connected sequentially to form a multi-stage mixing system. The output terminal of the anti-aliasing filter is connected to the input terminal of the ADC.

[0055] Figure 1 The superheterodyne frequency conversion receiving unit 11 and filtering unit 12 shown can constitute a single-stage or multi-stage frequency conversion scheme. The filtering unit 12 may include multiple filtering units 12 cascaded together. These filtering units 12 may include filters on each stage of the intermediate frequency link and anti-aliasing filters at the front end of the ADC 13. The bandwidth of each stage of intermediate frequency filter is different, and the intermediate frequency filter closer to the RF input end has a larger bandwidth. Figure 2 This illustrates a two-stage frequency conversion technology using a superheterodyne frequency conversion receiving unit 11 and a filtering unit 12. Figure 2 The bandwidth of the first intermediate frequency filter is greater than that of the second intermediate frequency filter, and the bandwidth of the second intermediate frequency filter is greater than that of the anti-aliasing filter. The second intermediate frequency filter can also be combined with the anti-aliasing filter into a single filter unit 12.

[0056] Figure 1 The adaptive filtering unit 15 shown differs from existing frequency-domain compensation filtering techniques by employing a time-domain adaptive filtering algorithm. This algorithm iteratively adjusts the filter coefficients, gradually bringing the output signal closer to the desired signal, ultimately minimizing the estimation error and obtaining an optimal set of filter coefficients. These coefficients are then configured into the compensation filter on the FPGA of the acquisition and processing board. The adjustable parameters of the compensation filter enable compensation for system fluctuations and improve signal flatness within the signal band.

[0057] like Figure 1 , Figure 2 and Figure 3 The method for compensating for in-band flatness, as shown, includes the following steps:

[0058] S1, the signal source generates 501 multi-carrier signals with a bandwidth of 1GHz and an interval of 2MHz, which are input to the broadband signal analyzer through the radio frequency port;

[0059] S2, after receiving the signal, the broadband signal analyzer processes it through multi-stage mixing, ADC13 signal acquisition, digital down-conversion and decimation filter unit 14 to obtain IQ signal data, saves the IQ signal and imports it into MATLAB software.

[0060] S3. Using MATLAB, 501 1GHz bandwidth signals with a 2MHz interval are generated as the desired signal d(n). The imported IQ signal data is used as the input signal x(n). Based on the adaptive filtering algorithm and the calculation method of the forgetting factor, a set of optimal filter coefficients of order N is obtained.

[0061] S4. Design a compensation filter with the same order as in step S3 in the FPGA of the broadband signal analyzer acquisition and processing board.

[0062] S5. The filter coefficients obtained in step S3 are configured into the compensation filter in S4 to complete the compensation of the flatness within the broadband signal band.

[0063] like Figure 3 The in-band flatness compensation method shown is implemented through a time-domain adaptive filtering algorithm. This algorithm iteratively adjusts the filter coefficients in the time domain to reduce the estimation error signal between the output signal and the desired signal. When the estimation error signal reaches its minimum, the optimal compensation filter coefficients are obtained. The input signal x(n) is an IQ signal obtained by inputting a 1GHz bandwidth signal from a signal source into a broadband signal analyzer, followed by multi-stage mixing, ADC13 signal acquisition, digital down-conversion, and decimation filtering unit 14. The output signal y(n) is the convolution of the input signal x(n) and the compensation filter. The desired signal d(n) is a 1GHz bandwidth distortion-free signal generated digitally. The estimation error signal e(n) is the difference between the desired signal d(n) and the output signal y(n). The filter coefficients are iteratively updated based on the estimation error signal e(n) until the error reaches its minimum.

[0064] Specifically, Figure 3 The adaptive algorithm shown employs a recursive least squares algorithm with a variable forgetting factor. The computation steps of the traditional recursive least squares (RLS) algorithm are as follows:

[0065] Calculate the output signal y(n):

[0066] y(n)=w T (n-1)x(n), where w is the filter coefficient.

[0067] Calculate the prior estimation error signal e(n):

[0068] e(n) = d(n) - y(n)

[0069] Update the Kalman gain vector k(n):

[0070]

[0071] Update the inverse correlation matrix P(n):

[0072]

[0073] Update the filter tap weight vector w(n):

[0074] w(n)=w(n-1)+k(n)e * (n)

[0075] Repeat the above steps to obtain a set of optimal filter coefficients.

[0076] The forgetting factor λ is calculated as follows:

[0077]

[0078] λ min is the minimum forgetting factor set, r is the error threshold set, e(n) is the estimated error signal, and m controls the rate of change of the forgetting factor.

[0079] In the RLS algorithm, the forgetting factor λ affects the convergence speed and steady-state error. A small forgetting factor results in fast convergence but a large steady-state error; a large forgetting factor results in slow convergence but a small steady-state error. At the beginning of the iteration, the error is large, so the forgetting factor should be small to accelerate convergence. As the error decreases, the forgetting factor should be large to reduce the steady-state error. One in-band flatness compensation method of this invention sets an error threshold. When the estimated error signal output by the filter exceeds the error threshold, the forgetting factor tends to λ. min This accelerates the convergence speed; when the error threshold is less than 1, the forgetting factor approaches 1, reducing the steady-state error of the filter output.

[0080] The improved formula for the change in the forgetting factor is as follows:

[0081]

[0082] λ min is the minimum forgetting factor set, r is the error threshold set, e(n) is the estimated error signal, and m controls the rate of change of the forgetting factor. The forgetting factor can keep the error around the error threshold and change at a certain rate. The rate of change is controlled by m, which effectively mitigates the problem of poor tracking performance caused by the forgetting factor changing too quickly.

[0083] Compared with existing technologies, this invention eliminates the need for dense sampling and inversion of the acquired signal frequency response to obtain the compensation filter's frequency response. This significantly reduces the required filter order, lowering the order of the compensation filter for a 1GHz bandwidth signal from over 200 to below 100. This solves the problems of high filter order and excessive processing resource consumption in existing technologies. Simultaneously, it achieves in-band flatness better than ±2dB, reaching the current state-of-the-art level, improving broadband signal acquisition accuracy, and reducing the occupation of valuable hardware processing resources. Furthermore, this invention avoids the transition band frequency response fluctuation problem of existing technologies, thus improving the compensation effect for the in-band flatness of broadband signals.

[0084] Finally, it should be noted that the above description of the embodiments is only used to illustrate the technical solution of the present invention and is not intended to limit the present invention. The present invention is not limited to the above examples. Any changes, modifications, additions or substitutions made by those skilled in the art within the scope of the present invention should also fall within the protection scope of the present invention.

Claims

1. A method of compensating for in-band flatness, comprising: It comprises the following steps: S1, a signal source generates 501 1GHz bandwidth multi-carrier signals with 2MHz intervals, and inputs the wideband signal into a wideband signal analyzer through a radio frequency port; S2, after the wideband signal analyzer receives the signal, the IQ signal data is obtained through multi-stage mixing, ADC (13) signal acquisition, digital down conversion and extraction filtering unit (14) processing, the IQ signal is saved and imported into MATLAB software; S3, using MATLAB to generate 501 1GHz bandwidth signals with 2MHz intervals as expected signal d(n), using the imported IQ signal data as input signal x(n), according to the adaptive filtering algorithm and using the forgetting factor calculation method, a set of optimal filter coefficients with order N is obtained; S4, a compensation filter with the same order as step S3 is designed in the FPGA of the wideband signal analyzer acquisition processing board; S5, the filter coefficients obtained by step S3 are configured into the compensation filter of S4, so that the in-band flatness compensation of the wideband signal is completed; The step S3 comprises: Calculate the output signal y(n): wherein are filter coefficients; Calculate the estimation error signal e(n): Update the Kalman gain vector k(n): Update the inverse correlation matrix P(n): Update the filter tap weight vector w(n): Repeat the above steps to finally obtain a set of optimal filter coefficients; Wherein, the forgetting factor λ calculation method is as follows: λmin is the minimum forgetting factor, r is the error threshold, e(n) is the estimation error signal, and m controls the speed of forgetting factor change.

2. A wideband signal analyzer using the method of in-band flatness compensation of claim 1, wherein, It comprises: At least one superheterodyne frequency conversion receiving unit (11), at least one filter unit (12), ADC (13), digital down conversion and extraction filtering unit (14), adaptive filtering unit (15), data processing and display unit and scan controller (17) connected in sequence; the superheterodyne frequency conversion receiving unit (11) comprises: an attenuator, a mixer and a local oscillator signal, the attenuator, the mixer and the filter unit (12) are connected in sequence, the output end of the local oscillator signal is connected with the input end of the mixer, the input end of the local oscillator signal is connected with the output end of the scan controller (17), and the input end of the scan controller (17) is connected with the output end of the ADC (13).

3. A wideband signal analyzer according to claim 2, wherein, The filter unit (12) comprises: a first filter unit and a second filter unit, the first filter unit comprises a first intermediate frequency filter, and the second filter unit comprises: a second intermediate frequency filter and an anti-aliasing filter; The first superheterodyne frequency conversion receiving unit and the first intermediate frequency filter constitute a first mixing unit, the second superheterodyne frequency conversion receiving unit and the second filter unit constitute a second mixing unit, and the first-stage mixing unit and the second-stage mixing unit are connected in sequence to constitute multi-stage mixing, and the output end of the anti-aliasing filter is connected with the input end of the ADC.

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