Communication method and apparatus

Abstract

A communication method and apparatus. The method comprises: generating a secondary synchronization signal, wherein the secondary synchronization signal is a signal obtained on the basis of a first sequence, the modulation scheme of the secondary synchronization signal is π / 2-BPSK, and the waveform of the secondary synchronization signal is a single-carrier waveform; and sending the secondary synchronization signal. In the present application, the modulation scheme of a secondary synchronization signal obtained on the basis of a first sequence is π / 2-BPSK, and the waveform of the secondary synchronization signal is a single-carrier waveform. In this way, the PAPR performance of a secondary synchronization signal can be improved, thereby reducing the PAPR of the secondary synchronization signal, and thus extending the coverage range of the secondary synchronization signal.

Description

A communication method and apparatus

[0001] Cross-references to related applications

[0002] This application claims priority to Chinese Patent Application No. 202410817719.8, filed on June 21, 2024, entitled "A Communication Method and Apparatus", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of communication technology, and in particular to a communication method and apparatus. Background Technology

[0004] In wireless communication systems, network devices send synchronization signals to terminal devices via downlink synchronization channels. These synchronization signals include a primary synchronization signal (PSS) and a secondary synchronization signal (SSS). The PSS is used by the terminal device to obtain initial timing and frequency synchronization, as well as a portion of the cell identifier (ID). The SSS is used for further time and frequency synchronization by the terminal device, and for the remaining cell ID. Both the PSS and SSS carry partial information about the cell ID; in other words, the terminal device obtains the cell ID by detecting the PSS and SSS.

[0005] Currently, the peak-to-average power ratio (PAPR) of SSS transmitted by network devices is too high, which can easily cause the power amplifier of the network device to enter the nonlinear region. This results in nonlinear distortion of the signal after passing through the power amplifier, causing spectral spread and in-band signal distortion. To avoid the power amplifier of the network device entering the nonlinear region, the network device performs power back-off when transmitting SSS. This avoids nonlinear distortion, but it reduces the coverage performance of SSS, resulting in limited SSS coverage.

[0006] Therefore, improving the coverage performance of synchronization signals is an urgent problem to be solved. Summary of the Invention

[0007] This application provides a communication method and apparatus for improving signal coverage performance.

[0008] In a first aspect, this application provides a communication method applied to a network side. For example, the method may be applied to a network device or a component within the network device (e.g., a circuit, chip, or chip system); or, the method may be applied to a module or unit that performs some functions of the network device, such as a central unit (CU), a distributed unit (DU), or a radio unit (RU); or, the method may be applied to a device including the network device. For ease of description, the following example illustrates the method applied to a network device. The communication method includes: generating a secondary synchronization signal, which is a signal obtained based on a first sequence; the modulation scheme of the secondary synchronization signal is π / 2-BPSK; the waveform of the secondary synchronization signal is a single-carrier waveform; and transmitting the secondary synchronization signal.

[0009] In this application, the modulation method of the auxiliary synchronization signal obtained based on the first sequence is π / 2-BPSK, and the waveform of the auxiliary synchronization signal is a single-carrier waveform. In this way, the PAPR performance of the auxiliary synchronization signal can be improved by 4dB, which can reduce the PAPR of the auxiliary synchronization signal, increase the coverage range of the auxiliary synchronization signal, and improve the coverage performance of the auxiliary synchronization signal.

[0010] In one possible implementation, the auxiliary synchronization signal is obtained by modulating the first sequence with π / 2-BPSK, performing conversion precoding, frequency domain mapping, and N-point inverse fast Fourier transform. Alternatively, the auxiliary synchronization signal is obtained by performing conversion precoding, frequency domain mapping, and N-point inverse fast Fourier transform on the second sequence.

[0011] In one possible implementation, generating the auxiliary synchronization signal includes: modulating a first sequence using π / 2-BPSK to obtain a second sequence; precoding the second sequence to obtain a first frequency domain signal; mapping the first frequency domain signal onto L subcarriers and performing an N-point inverse Fast Fourier Transform to obtain the auxiliary synchronization signal, where L is an integer greater than 1. Alternatively, the second sequence can be obtained, precoded to obtain a first frequency domain signal, mapped onto L subcarriers, and performed an N-point inverse Fast Fourier Transform to obtain the auxiliary synchronization signal. Or, the first frequency domain signal can be obtained; mapped onto L subcarriers, and performed an N-point inverse Fast Fourier Transform to obtain the auxiliary synchronization signal. It is important to understand that the value of N is generally much larger than L.

[0012] This method can obtain a single-carrier waveform auxiliary synchronization signal, thereby reducing the PAPR of the auxiliary synchronization signal, increasing its coverage range, and improving its coverage performance.

[0013] In a possible implementation, the first sequence is determined according to the third sequence. The lengths of the first sequence and the third sequence are both L. The element d(m) of the third sequence and the element x(n) of the first sequence satisfy: x(n) = d(m), where m = (n + c) mod L, c is an integer, 0 ≤ n < L, 0 ≤ m < L; c is p × ID, the value range of ID is [0, K - 1], K is a positive integer, the ratio of p to L is greater than the first threshold, and p is a positive integer.

[0014] Through this solution, since the ratio of p to L is greater than the first threshold, the error tolerance rate for detecting the secondary synchronization signal at the receiving side can be increased, that is, it is more robust to the residual delay error of PSS detection, thereby improving the transmission performance of the secondary synchronization signal.

[0015] In a possible implementation, the first sequence is determined according to the fourth sequence and the fifth sequence. The lengths of the first sequence, the fourth sequence, and the fifth sequence are all L. The element e(k) of the fourth sequence, the element f(m) of the fifth sequence, and the element x(n) of the first sequence satisfy: x(n) = mod(e(k) + f(m), 2), where k = (n + c1) mod L, m = (n + c2) mod L, c1 and c2 are integers, 0 ≤ n < L, 0 ≤ m < L, 0 ≤ k < L;

[0016] where c1 is p1 × ID1, the value range of ID1 is [0, K1 - 1], K1 is a positive integer, c2 is p2 × ID2, the value range of ID2 is [0, K2 - 1], K1 and K2 are positive integers, the ratio of p1 to L is greater than the first threshold, the ratio of p2 to L is greater than the second threshold, and p1 and p2 are positive integers.

[0017] In this implementation, by increasing the cyclic shift interval, the influence of the residual error of the primary synchronization signal detection on the secondary synchronization signal can be reduced, and the detection success rate of the secondary synchronization signal can be increased.

[0018] In a possible implementation, the difference between p1 and p2 is less than the third threshold.

[0019] Through this method, it can be ensured to the greatest extent that the cyclic shifts of the fourth sequence and the fifth sequence are both greater than the ratio of the cyclic prefix CP to the OFDM symbol, improving the detection efficiency of the secondary synchronization signal.

[0020] In a possible implementation, the third threshold is less than or equal to 4.

[0021] In a possible implementation, the first threshold is the ratio of the cyclic prefix CP length of the secondary synchronization signal to the OFDM symbol length.

[0022] This scheme increases the fault tolerance of the receiver's detection of the secondary synchronization signal because the ratio of p to L and the ratio of p1 to L are greater than the ratio of CP length to OFDM symbol length, thereby improving the transmission performance of the secondary synchronization signal.

[0023] In one possible implementation, the first sequence is an m-sequence or a gold sequence.

[0024] Secondly, this application provides a communication method applied to a terminal side. For example, the method may be applied to a terminal device or a component within the terminal device (e.g., a circuit, chip, or chip system), or it may be applied to a larger device including the terminal device. For ease of description, the following example illustrates the method applied to a terminal device. The communication method includes: detecting a secondary synchronization signal from a network device; the secondary synchronization signal is a signal obtained based on a first sequence; the modulation scheme of the secondary synchronization signal is π / 2-BPSK; and the waveform of the secondary synchronization signal is a single-carrier waveform.

[0025] In one possible implementation, detecting the synchronization signal includes detecting the auxiliary synchronization signal using one of five methods: method one, method two, method three, method four, or method five. Method one includes acquiring a third sequence, and the terminal device detecting the auxiliary synchronization signal based on the third sequence. In method one, the third sequence can be stored in the terminal device, or the third sequence can be generated by the terminal device. The terminal device detecting the auxiliary synchronization signal based on the third sequence includes generating a first sequence based on the third sequence, determining a second sequence based on the first sequence, and performing correlation processing on the received auxiliary synchronization signal based on the second sequence, for example, performing correlation calculations on the second sequence and the received auxiliary synchronization signal to detect the synchronization signal.

[0026] Method 2 includes: acquiring a first sequence, and the terminal device detecting an auxiliary synchronization signal based on the first sequence;

[0027] In Method 2, the first sequence can be stored in the terminal device, or the first sequence can be generated by the terminal device. The terminal device detects the auxiliary synchronization signal based on the first sequence, including: determining a second sequence based on the first sequence, and performing correlation processing on the received auxiliary synchronization signal based on the second sequence, for example, performing correlation calculations on the second sequence and the received auxiliary synchronization signal to detect the synchronization signal.

[0028] Method 3 includes: acquiring the fourth and fifth sequences, and the terminal device detecting the auxiliary synchronization signal based on the fourth and fifth sequences;

[0029] In Method 3, the fourth sequence and the fifth sequence can be stored in the terminal device, or the fourth sequence and the fifth sequence can be generated by the terminal device. The terminal device detects the secondary synchronization signal based on the fourth sequence and the fifth sequence, including: generating a first sequence according to the fourth sequence and the fifth sequence, determining a second sequence according to the first sequence, and performing correlation processing on the received secondary synchronization signal according to the second sequence. For example, performing correlation calculation on the second sequence and the received secondary synchronization signal to detect the synchronization signal.

[0030] Method 4 includes: obtaining a second sequence, and the terminal device detects the secondary synchronization signal based on the second sequence;

[0031] In Method 4, the second sequence can be stored in the terminal device, or the second sequence can be generated by the terminal device. The terminal device detects the secondary synchronization signal based on the second sequence, including: performing correlation processing on the received secondary synchronization signal according to the second sequence. For example, performing correlation calculation on the second sequence and the received secondary synchronization signal to detect the synchronization signal.

[0032] Method 5 includes: the terminal device detects the secondary synchronization signal according to the sequences in the secondary synchronization sequence set, and the secondary synchronization sequence set includes at least one second sequence.

[0033] In Method 5, the secondary synchronization sequence set can be stored in the terminal device, or the secondary synchronization sequence set can also be generated by the terminal device. The terminal device detects the secondary synchronization signal according to the sequences in the secondary synchronization sequence set, including: when the terminal device detects the secondary synchronization signal, it can perform correlation processing on all the sequences in the secondary synchronization sequence set and the received secondary synchronization signal in turn to obtain a set of correlation values; one correlation value in the set of correlation values corresponds to one sequence in the secondary synchronization sequence set; determining the second sequence corresponding to the secondary synchronization signal according to the maximum correlation value in the set of correlation values.

[0034] In a possible implementation, the first sequence is determined according to a third sequence. The lengths of the first sequence and the third sequence are both L. The element d(m) of the third sequence and the element x(n) of the first sequence satisfy: x(n) = d(m), where m = (n + c) mod L, c is an integer, 0 ≤ n < L, 0 ≤ m < L; c is p×ID, the value range of ID is [0, K - 1], K is a positive integer, the ratio of p to L is greater than the first threshold, and p is a positive integer.

[0035] In one possible implementation, the first sequence is determined based on the fourth and fifth sequences. The lengths of the first, fourth, and fifth sequences are all L. The elements e(k) of the fourth sequence, f(m) of the fifth sequence, and x(n) of the first sequence satisfy: x(n) = mod(e(k) + f(m), 2), where k = (n + c1) mod L, m = (n + c2) mod L, c1 and c2 are integers, and 0 ≤ n. <L,0≤m<L,0≤k<L;

[0036] Where c1 is p1×ID1, ID1 takes values ​​in the range [0, K1-1], K1 is a positive integer, c2 is p2×ID2, ID2 takes values ​​in the range [0, K2-1], K1 and K2 are positive integers, the ratio of p1 to L is greater than the first threshold, the ratio of p2 to L is greater than the second threshold, and p1 and p2 are positive integers.

[0037] In one possible implementation, the difference between p1 and p2 is less than the third threshold.

[0038] In one possible implementation, the third threshold is less than or equal to 4.

[0039] In one possible implementation, the first threshold is the ratio of the cyclic prefix (CP) length of the secondary synchronization signal to the symbol length of the orthogonal frequency division multiplexing (OFDM).

[0040] In one possible implementation, the first sequence is an m-sequence or a gold sequence.

[0041] Thirdly, this application also provides a communication device capable of implementing any of the methods provided in any of the first to second aspects described above. This communication device can be implemented in hardware or by hardware executing corresponding software. The hardware or software includes one or more units or modules corresponding to the aforementioned functions.

[0042] In one possible implementation, the communication device includes a processor configured to support the communication device in performing corresponding functions of the network device or terminal device described above. The communication device may also include a memory coupled to the processor, which stores necessary program instructions and data for the communication device. Optionally, the communication device further includes interface circuitry for supporting communication between the communication device and devices such as terminal devices.

[0043] In one possible implementation, the communication device includes corresponding functional modules, each used to implement the steps in the above method. The functions can be implemented in hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the functions described above.

[0044] In one possible implementation, the communication device includes a processing unit and a communication unit, which can perform the corresponding functions in the above method examples, as described in the methods provided in any of the first or second aspects, and will not be repeated here.

[0045] Fourthly, a communication device is provided, including a processor and an interface circuit. The interface circuit is used to receive signals from other communication devices outside the communication device and transmit them to the processor, or to send signals from the processor to other communication devices outside the communication device. The processor implements the functional modules of the methods in any possible implementation of any of the first to second aspects through logic circuits or by executing computer programs or instructions. Optionally, the communication device further includes a memory for storing computer programs or instructions.

[0046] Fifthly, a computer-readable storage medium is provided that stores a computer program or instructions that, when executed by a processor or when run on a computer, cause the computer to implement the methods in any possible implementation of any of the first to second aspects.

[0047] In a sixth aspect, a computer program product storing instructions is provided, which, when read and executed by a computer, implements the method in any possible implementation of any of the first to second aspects described above.

[0048] In a seventh aspect, a circuit is provided for performing the methods in any possible implementation of any of the first to second aspects described above. The circuit may include chip circuitry. Optionally, the circuit may also be coupled to a memory.

[0049] Eighthly, a chip is provided, comprising a processor, which, when executing a computer program or instructions, implements the methods in any possible implementation of any of the first to second aspects described above. Optionally, the chip may further include a memory, and the chip may be composed of chips or may include chips and other discrete devices.

[0050] A ninth aspect provides a communication device including a processor that implements the methods in any possible implementation of any of the first to second aspects by means of logic circuits or by executing computer programs or instructions. Alternatively, the processor is configured to execute computer programs or instructions stored in a memory to implement the methods in any possible implementation of any of the first to second aspects.

[0051] In a tenth aspect, a communication apparatus is provided, comprising a unit or module for performing a method in any possible implementation of any of the first to second aspects described above.

[0052] Eleventhly, embodiments of this application also provide a communication system. The communication system includes: a network device for implementing the methods of the first aspect and any possible implementations thereof; and a terminal device for implementing the methods of the second aspect and any possible implementations thereof. Attached Figure Description

[0053] Figure 1 is a schematic diagram of a communication system provided in an embodiment of this application;

[0054] Figure 2 is a schematic diagram of two typical protocol stacks of the base station provided in the embodiments of this application;

[0055] Figure 3 shows a schematic diagram of a synchronization signal time-frequency resource;

[0056] Figure 4 is a flowchart illustrating a communication method provided in an embodiment of this application;

[0057] Figure 5 is a schematic diagram of a single-carrier waveform generation process provided in an embodiment of this application;

[0058] Figure 6 is a schematic diagram of signal filtering provided in an embodiment of this application;

[0059] Figure 7 is a schematic diagram of the communication device provided in an embodiment of this application;

[0060] Figure 8 is a schematic diagram of the structure of the communication device provided in the embodiment of this application. Detailed Implementation

[0061] The technical solutions of the embodiments of this application will be described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. The terms "first," "second," and corresponding terminology in this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. The methods and apparatus provided in the embodiments of this application are based on the same or similar technical concepts. Since the principles by which the methods and apparatus solve problems are similar, the implementation of the apparatus and methods can refer to each other, and repeated details will not be repeated.

[0062] The technical solutions provided in the embodiments of this application can be applied to communication systems related to the 3rd Generation Partnership Project (3GPP), such as Long Term Evolution (LTE) communication systems, 5th Generation (5G) mobile communication systems, or to future communication systems or other similar communication systems. Furthermore, the technical solutions provided in the embodiments of this application can be applied to cellular links, public land mobile networks (PLMNs), machine-to-machine (M2M) networks, Internet of Things (IoT) networks, or other networks. They can also be applied to links between devices, such as device-to-device (D2D) links. D2D links can also be called sidelinks, which are also referred to as secondary links or auxiliary links.

[0063] Please refer to Figure 1, which illustrates a communication system applicable to an embodiment of this application. The communication system includes a wireless access network 100 and a core network 200. Optionally, the communication system may also include the Internet (Figure 1 uses this as an example).

[0064] The wireless access network 100 may include at least one network device and at least one terminal device. For example, the wireless access network 100 includes two network devices, 110a and 110b, and terminal devices 120a to 120j. The network architecture shown in Figure 1 is only schematic; the number of terminal devices and / or network devices may be fewer or more. The communication system described in the embodiments of this application is for the purpose of more clearly illustrating the technical solutions of the embodiments of this application and does not constitute a limitation on the communication system to which the embodiments of this application are applicable. For example, the communication system may also include other devices, such as wireless relay devices and wireless backhaul devices, which are not shown in Figure 1. As those skilled in the art will know, with the evolution of network architecture, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems. When applying the technical solutions of the embodiments of this application to other communication systems, the devices, components, modules, etc. in the embodiments can be replaced with corresponding devices, components, modules in other communication systems without limitation.

[0065] In this embodiment, the network device refers to a radio access network (RAN) device. The RAN can be a 3GPP-related cellular system, such as a 5G / new radio (NR) mobile communication system, or a future-oriented evolution system (e.g., a 6G mobile communication system). The RAN can also be an open RAN (O-RAN or ORAN), a cloud radio access network (CRAN), or a virtualized RAN (vRAN), etc. The RAN can also be a communication system that integrates two or more of the above systems. The RAN device can also be referred to as a RAN node, RAN entity, or access node, etc.

[0066] In one possible scenario, a RAN node can be a base station, an evolved NodeB (eNodeB), an access point (AP), a transmission reception point (TRP), a next-generation NodeB (gNB), a next-generation base station in a 6G mobile communication system, or a base station in a future mobile communication system. A RAN node can also be a macro base station, a micro base station, an indoor station, a relay node, a donor / host node, or a radio controller. RAN nodes can also be servers, wearable devices, vehicles, or in-vehicle equipment. For example, in V2X technology, a RAN node can be a roadside unit (RSU).

[0067] In another possible scenario, the RAN node can be a module or unit that performs some of the functions of the base station; or multiple RAN nodes can cooperate to assist terminal equipment in achieving wireless access, with different RAN nodes performing some of the functions of the base station. For example, the RAN node can be a centralized unit (CU), a distributed unit (DU), or a radio unit (RU). The function of the CU can be implemented by a single entity or by different entities. For example, the function of the CU can be further divided, that is, the control plane and the user plane can be separated and implemented by different entities, namely the control plane CU entity (i.e., CU-control plane (CP) entity) and the user plane CU entity (i.e., CU-user plane (UP) entity). The CU-CP entity and the CU-UP entity can be coupled with the DU to jointly complete the function of the RAN node. The CU and DU can be set up separately or included in the same network element, such as in the baseband unit (BBU). Any of the units among the CU (or CU-CP, CU-UP), DU, and RU in this application can be implemented by software modules, hardware modules, or a combination of software modules and hardware modules.

[0068] In different systems, CU (or CU-CP and CU-UP), DU, or RU may have different names, but those skilled in the art will understand their meaning. For example, in an ORAN system, CU can also be called O-CU (open CU), DU can also be called O-DU, CU-CP can also be called O-CU-CP, CU-UP can also be called O-CU-UP, and RU can also be called O-RU. For ease of description, this application uses CU, CU-CP, CU-UP, DU, and RU as examples.

[0069] The CU and DU can be configured according to the protocol layer functions of the wireless network they implement: for example, the CU can be configured to implement the functions of the Packet Data Convergence Protocol (PDCP) layer and above (such as the Radio Resource Control (RRC) layer and / or the Service Data Adaptation Protocol (SDAP) layer); the DU can be configured to implement the functions of the protocol layers below the PDCP layer (such as the Radio Link Control (RLC) layer, the Media Access Control (MAC) layer, and / or the Physical (PHY) layer). For specific descriptions of the above protocol layers, please refer to the relevant 3GPP technical specifications or the technical specifications of other applicable communication protocols.

[0070] For example, please refer to Figure 2, which is a schematic diagram of two typical protocol stacks of a base station provided in the embodiments of this application. In base station (1), the base station is divided into CU and DU. CU is configured to implement the functions of protocol layers above PDCP (e.g., RRC layer and / or SDAP layer, etc.); DU is configured to implement the functions of protocol layers below PDCP (e.g., RLC layer, MAC layer, and / or PHY layer, etc.). CU and DU communicate with each other based on the F1 interface. In base station (2), the base station is divided into CU and DU. CU includes CU-CP and CU-UP. CU-CP is used to implement the control plane functions of CU, and CU-UP is used to implement the user plane functions of CU. CU-CP and CU-UP can communicate based on the E1 interface. CU-CP and DU communicate based on the F1 interface (also called F1-C) that supports the control plane. CU-UP and DU communicate based on the F1 interface (also called F1-U) that supports the user plane. CU-CP is configured to implement the control plane and RRC layer functions of the PDCP layer, and CU-UP is configured to implement the user plane and SDAP layer functions of the PDCP layer. DU is configured to implement the functions of protocol layers below the PDCP layer (such as RLC, MAC, and / or PHY layers).

[0071] The above division of the processing functions of CU and DU according to protocol layers is merely an example; other division methods are also possible, and this application does not limit this. For example, in one design, CU or DU can be further divided into processing functions with protocol layers. In one design, some functions of the RLC layer and the functions of the protocol layer above the RLC layer are located in the CU, while the remaining functions of the RLC layer and the functions of the protocol layer below the RLC layer are located in the DU.

[0072] In another possible design, the DU and RU collaborate to implement the PHY layer functionality, or, more specifically, a portion of the PHY layer functionality of the DU can be moved to the RU. A DU can be connected to one or more RUs. The functions of the DU and RU can be configured in various ways depending on the design. For example, the DU may be configured to implement baseband functions, and the RU may be configured to implement mid-RF functions. Alternatively, the DU may be configured to implement higher-level functions in the PHY layer, and the RU may be configured to implement lower-level functions in the PHY layer, or both lower-level and RF functions. Higher-level functions in the physical layer may include a portion of the physical layer's functionality closer to the MAC layer, while lower-level functions may include another portion of the physical layer's functionality closer to the mid-RF side. This application does not limit the specific functions of the DU and RU. The interface between the DU and RU can be referred to as a fronthaul interface.

[0073] In the embodiments of this application, the means for implementing the functions of the network device can be the network device itself, or it can be a means that supports the network device in implementing the functions, such as a chip system or a combination of devices or components that can implement the functions of the network device. This means can be installed in the network device. The embodiments of this application do not limit the specific technology or specific device form used in the network device.

[0074] In this application embodiment, anything capable of data communication with a base station can be considered a terminal device. Terminal devices are also called terminals, terminal equipment, user equipment (UE), mobile stations, or mobile terminals, etc. Terminal devices can be widely used in various scenarios. For example, terminal devices can be: mobile phones, computers, mobile internet devices (MID), wearable devices, virtual reality (VR) devices, augmented reality (AR) devices, stations (STA), robotic arms, cameras, robots, vehicles, drones, helicopters, airplanes, ships, or smart home devices (such as televisions, air conditioners, robot vacuums, speakers, set-top boxes), relays, customer premises equipment (CPE), etc.

[0075] Furthermore, in this embodiment, the terminal device can also be a terminal device in an IoT system, such as a water meter or electricity meter. IoT is an important component of future information technology development. Its main technical characteristic is connecting objects to networks through communication technology, thereby realizing an intelligent network that enables human-machine interconnection and object-to-object interconnection.

[0076] When the terminal device is applied to V2X, it can also be called a V2X device, such as a smart car, digital car, unmanned car, driverless car, pilotless car, autonomous car, pure electric vehicle, hybrid electric vehicle (HEV), range-extended electric vehicle (REEV), plug-in hybrid electric vehicle (PHEV), new energy vehicle, and roadside unit (RSU).

[0077] The various terminal devices described above, if located on a vehicle (e.g., placed / installed inside the vehicle), can all be considered in-vehicle terminal devices. In-vehicle terminal devices can be built into a vehicle's in-vehicle module, in-vehicle component, in-vehicle chip, or in-vehicle unit as one or more components or units. The vehicle can implement the methods of this application through the built-in in-vehicle module, in-vehicle component, in-vehicle chip, or in-vehicle unit. In-vehicle terminal devices can be vehicle equipment, in-vehicle modules, vehicles, on-board units (OBU), roadside units (RSU), in-vehicle systems (or in-vehicle transmitting units) (telematics boxes, T-boxes), chips, or systems on chips (SOCs), etc. These chips or SOCs can be installed in the vehicle, OBU, RSU, or T-box.

[0078] In the embodiments of this application, the device for implementing the functions of the terminal device can be the terminal device itself, or a device capable of supporting the terminal device in implementing the functions, such as a chip system or a combination of devices or components capable of implementing the functions of the terminal device. This device can be installed in the terminal device. The embodiments of this application do not limit the specific technology or specific device form used in the terminal device.

[0079] In this application embodiment, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0080] Network devices transmit a synchronous signal / physical broadcast channel block (SS / PBCH block or SSB) to terminal devices via the downlink synchronization channel. As shown in Figure 3, the SSB includes the PSS, SSS, and physical broadcast channel (PBCH). In the time domain, one SSB occupies four orthogonal frequency division multiplexing (OFDM) symbols (symbols 0 to 3). In the frequency domain, one SSB occupies 20 resource blocks (RBs), each RB containing 12 subcarriers, totaling 240 subcarriers numbered 0 to 239. The PSS is located on the middle 127 subcarriers of symbol 0, and the SSS is located on the middle 127 subcarriers of symbol 2. To protect the PSS and SSS, guard subcarriers are reserved on both sides of the PSS and SSS, as shown in the blank areas on both sides of the SSS in the figure. These guard subcarriers are not used to carry signals. PBCH occupies all subcarriers of symbols 1 and 3, as well as a portion of the remaining subcarriers of symbol 2, excluding those occupied by SSS.

[0081] The PSS (Physical System Sequence) is used by the terminal device to obtain initial timing and frequency synchronization and carries a portion of the cell identifier (ID). The SSS (Secondary System Sequence) is used to provide another portion of the cell identifier. The PBCH (Physical Branch Message Council) carries the critical system messages required for the UE to access the network. The terminal device can determine the physical cell identity (PCI) based on the SSS and PSS.

[0082] Among them, PCI is used to identify cells at the physical layer, and can also be called cell identifier. Terminal devices can identify cells through network identity 1 (NIC). ) and network identity 2, Determine the PCI. For example, It can be obtained from PSS. It can be obtained from SSS.

[0083] PSS uses m-sequence construction, and the specific sequence generation is shown in Formula 1 below:

[0084] SSS is constructed using the gold sequence as shown in Formula 2 below:

[0085] The community identification number can be calculated using the following formula 3:

[0086] in, The set of values ​​for is {0, 1, 2}. The set of values ​​for is {0, 1, 2, ..., 335}. Therefore, there are a total of 1008 = 3 * 336 cell identifiers. When the UE detects the downlink synchronization signal, it first performs a two-dimensional time-frequency search on the PSS. After the UE detects the PSS signal, it first performs frequency correction and then time synchronization. Since the PSS carries... There are three possible sequences in total, which the UE detects. Then, substitute it into the SSS detection, once It is confirmed that there are a total of 336 possible SSS sequences. The UE needs to use 336 different SSS sequences to perform cross-correlation detection on the SSS, and the SSS sequence corresponding to the maximum cross-correlation value is the SSS sequence actually sent by the network side.

[0087] Currently, SSS (Secondary Segment Detection) is generated using gold sequence / gold sequence, meaning the gold sequence is one type of sequence used to generate SSS. In the future, the frequency at which SSS is transmitted may increase, leading to greater path loss. To mitigate the impact of increased path loss, the transmission power of the SSS can be increased. However, increasing the transmission power of the SSS will result in an excessively high peak-to-average power ratio (PAPR), causing the power amplifier in the terminal equipment to enter the nonlinear region. This leads to nonlinear distortion of the SSS after passing through the power amplifier, resulting in a decrease in SSS detection performance. Therefore, power backoff is required, thus limiting SSS coverage.

[0088] To address the aforementioned technical problems, this application provides a method for sending SSS, which can improve SSS coverage.

[0089] The method will be introduced from the perspective of the interaction between the terminal device and the network device. Among them, the steps executed by the terminal device can also be implemented by components in the terminal device (such as a baseband chip, or other processing units or processors, etc.). The steps executed by the network device can also be implemented by components in the network device (such as a baseband chip, or other processing units or processors, etc.).

[0090] As shown in Figure 4, it is a schematic flowchart of a communication method provided by an embodiment of the present application. The method includes:

[0091] Step 401: The network device generates a secondary synchronization signal.

[0092] Among them, the secondary synchronization signal is a signal obtained based on the first sequence, and the first sequence can be called the secondary synchronization signal sequence. The secondary synchronization signal can be used to determine the physical cell identifier. For example, according to and the physical cell identifier can be determined, where the secondary synchronization signal can carry can be determined according to the primary synchronization signal. Another example is that only the secondary synchronization signal carries the physical cell identifier. The present application does not limit the specific manner in which the secondary synchronization signal carries the physical cell identifier.

[0093] In the present application, the first sequence can be an m-sequence or a gold sequence. If the first sequence is an m-sequence, the first sequence is determined according to the third sequence, and the lengths of the first sequence and the third sequence are both L. The element d(m) of the third sequence and the element x(n) of the first sequence satisfy: x(n)=d(m), where m=(n + c)mod L, c is an integer, 0≤n<L, 0≤m<L; c is p×ID, the value range of ID is [0, K - 1], K is a positive integer, and mod is the modulo operation. c can refer to the cyclic shift value, and p can refer to the cyclic shift interval, and p is a positive integer. For example, when K is 6, the length L of the first sequence is 127, and the value of p is 15, then the corresponding cyclic shift value c can be any value in {0, 15, 30, 45, 60, 75}; or when K is 2, the length L of the first sequence is 255, and the value of p is 125, then the corresponding cyclic shift value c can be any value in {0, 125}.

[0094] Among them, the value ranges of L and c, and the value range of ID can be preset or predefined. ID can be used to determine the physical cell identifier. For example, there is a mapping relationship between ID and the physical cell identifier, and this mapping relationship is preset. Another example is that there is a mapping relationship between this ID and which is preset, for example, this mapping relationship is a is an integer greater than 0. In the following description, It is called the first community identifier.

[0095] It should be understood that the first community identifier can also be the physical community identifier.

[0096] Optionally, p = floor(L / K), where floor rounds down; or p = ceil(L / K), where ceil rounds up; or p = round(L / K), where round rounds to the nearest integer. The value of p can also be preset or predefined.

[0097] In one possible implementation, the third sequence is an m-sequence. The third sequence can be a sequence from a set of sequences, which is preset and includes at least one sequence. In this implementation, the network device can determine the value of ID based on the first cell identifier, and determine c = p × ID based on the value of ID. The network device can select a sequence from the sequence set based on the first cell identifier and determine the first sequence based on the cyclic shift value c.

[0098] In one possible implementation, the third sequence can also be determined based on a predefined primitive polynomial. For example, the primitive polynomial for generating the third sequence is x. 7 +x+1, then the recursive formula corresponding to the primitive polynomial is s(t)=mod(s(t-6)+s(t-7),2). Assuming the initial value is [s(6),s(5),s(4),s(3),s(2),s(1),s(0)]=[0,0,0,0,0,0,1], then s(7)=mod(s(1)+s(0),2)=1. Continue recursively to obtain all the element values ​​of the third sequence.

[0099] It is important to understand that the third sequence can be a sequence in a set of sequences, where each sequence has a different recursive formula.

[0100] The above are just examples; this application does not limit how the third sequence is specifically determined.

[0101] In one possible implementation, the ratio of p to L is greater than a first threshold. For example, the first threshold is the ratio of the cyclic prefix (CP) length of the secondary synchronization signal to the OFDM symbol length. Since the ratio of p to L is greater than the ratio of the CP length to the OFDM symbol length, this increases the fault tolerance of the receiver in detecting the secondary synchronization signal, making it more robust to residual delay errors in PSS detection, thereby improving the transmission performance of the secondary synchronization signal.

[0102] For example, the cyclic shift interval of the first sequence is 1, and the cyclic shift value of the first sequence is c = 1. If the cyclic shift offset corresponding to the residual error of PSS detection is 1, then the receiver on the receiving side will misdetect the cyclic shift value of the first sequence as 2, resulting in detection failure. In this application, by increasing the cyclic shift interval, for example, the cyclic shift interval of the first sequence is p = 7, then the values of the cyclic shift value of the first sequence are 0, 7, 14, 21, etc. If the cyclic shift value of the first sequence is c = 7 and the cyclic shift offset corresponding to the residual error of PSS detection is 1, then the receiver on the receiving side will misdetect the cyclic shift value of the first sequence as 8. However, since there is no cyclic shift value of 8 in the first sequence, the receiving side considers the actual cyclic shift value to be the value closest to 8, that is, determines the cyclic shift value to be 7, thereby successfully detecting the secondary synchronization signal.

[0103] If the first sequence is a gold sequence, the first sequence is determined according to the fourth sequence and the fifth sequence. The lengths of the first sequence, the fourth sequence, and the fifth sequence are all L. The elements e(k) of the fourth sequence, the elements f(m) of the fifth sequence, and the elements x(n) of the first sequence satisfy: x(n) = mod(e(k) + f(m), 2), where k = (n + c1) mod L, m = (n + c2) mod L, c1 and c2 are integers, 0 ≤ n < L, 0 ≤ m < L, 0 ≤ k < L. The fourth sequence and the fifth sequence can be m sequences.

[0104] Among them, c1 is p1 × ID1, the value range of ID1 is [0, K1 - 1], K1 is a positive integer, c2 is p2 × ID2, the value range of ID2 is [0, K2 - 1], K1 and K2 are positive integers. c1 can refer to the cyclic shift value of the fourth sequence, p1 can refer to the cyclic shift interval of the fourth sequence; c2 can refer to the cyclic shift value of the fifth sequence, p2 can refer to the cyclic shift interval of the fifth sequence. p1 and p2 are integers greater than or equal to 0.

[0105] Among them, the value ranges of L, c1, c2, ID1, and ID2 can be preset or predefined. ID1 and ID2 can be used to determine the physical cell identifier. For example, there is a mapping relationship between ID1, ID2 and the physical cell identifier, and this mapping relationship is preset. For example, this mapping relationship is: the first cell identifier = K2 * ID1 + ID2 or the first cell identifier = K1 * ID2 + ID1.

[0106] Optionally, p1 = floor(L / K1), or p1 = ceil(L / K1); or p1 = round(L / K1). The value of p1 can also be preset or predefined. p2 = floor(L / K2), or p2 = ceil(L / K2); or p2 = round(L / K2). The value of p2 can also be preset or predefined. In this implementation, the above-mentioned values ​​of p1 and p2 can maximize the minimum interval between the two cyclic shift values, ensuring the lowest cross-correlation between sequences.

[0107] In one possible implementation, the ratio of p1 to L is greater than a first threshold, and the ratio of p2 to L is greater than a second threshold. For example, the first threshold is 1 / 10. The first threshold can be equal to the second threshold, or the absolute value of the difference between the first and second thresholds can be equal to a third threshold. In this implementation, by increasing the cyclic shift interval, the impact of residual errors in the detection of the primary synchronization signal on the secondary synchronization signal can be reduced, thereby increasing the success rate of the secondary synchronization signal detection.

[0108] In one possible implementation, the difference between p1 and p2 is less than a third threshold, or the absolute value of the difference between p1 and p2 is less than the third threshold. For example, the third threshold is less than or equal to 4. This method ensures that the cyclic shifts of the fourth and fifth sequences are as large as possible compared to the ratio of CP to OFDM symbols, thus improving the detection efficiency of the auxiliary synchronization signal.

[0109] For example, the cyclic shift intervals of the fourth and fifth sequences are both 1, and the cyclic shift values ​​of the fourth and fifth sequences are c1=1 and c2=5, respectively. If the cyclic shift offset corresponding to the residual error detected by PSS is 1, then the receiver on the receiving side will misdetect the cyclic shift values ​​of the fourth and fifth sequences as 2 and 6, respectively, resulting in detection failure. In this application, by increasing the cyclic shift interval, for example, the cyclic shift intervals of the fourth and fifth sequences are p1=7 and p2=7 respectively, the cyclic shift value of the fourth sequence can be 0, 7, 14, 21, etc., and the cyclic shift value of the fifth sequence can be 0, 7, 14, 21, etc. If the cyclic shift values ​​of the fourth and fifth sequences are c1=7 and c2=7 respectively, and the cyclic shift offset corresponding to the residual error of PSS detection is 1, then the receiver on the receiving side will misdetect the cyclic shift values ​​of the fourth and fifth sequences as 8 and 8 respectively. However, since there is no cyclic shift value of 8 in the fourth and fifth sequences, the receiving side considers the actual cyclic shift value to be the value closest to 8, that is, determines the cyclic shift value to be 7, thereby successfully detecting the auxiliary synchronization signal.

[0110] In this application, the determination of the fourth and fifth sequences is not limited. In one implementation, the fourth sequence can be a sequence from a first sequence set, which is preset and includes at least one sequence. Similarly, the fifth sequence can be a sequence from a second sequence set, which is preset and includes at least one sequence. In this implementation, the network device can determine the values ​​of ID1 and ID2 based on the physical cell identifier, and determine c1 = p1 × ID1 based on the value of ID1, and c2 = p2 × ID2 based on the value of ID2; the network device can select one sequence from the first sequence set as the fourth sequence based on the first cell identifier, and select one sequence from the second sequence set as the fifth sequence based on the first cell identifier; the network device can determine the first sequence based on the cyclic shift value c1, the fourth sequence, the cyclic shift value c2, and the fifth sequence.

[0111] In one implementation, the fourth sequence can also be determined based on the first primitive polynomial, which is a preset. The fifth sequence can also be determined based on the second primitive polynomial, which is a preset. For example, the recursive formula corresponding to the first primitive polynomial is e(k+7)=mod(e(k+4)+e(k),2), assuming the initial value is [e(6),e(5),e(4),e(3),e(2),e(1),e(0)]=[0,0,0,0,0,0,1]; the recursive formula corresponding to the second primitive polynomial is f(m+7)=mod(f(m+1)+e(m),2), assuming the initial value is [f(6),f(5),f(4),f(3),f(2),f(1),f(0)]=[0,0,0,0,0,0,1]. In this implementation, the network device can determine the fourth sequence based on the recursive formula corresponding to the first primitive polynomial and the initial value; and determine the fifth sequence based on the recursive formula corresponding to the second primitive polynomial. The specific process will not be elaborated here.

[0112] In this application, the modulation method of the auxiliary synchronization signal is π / 2-binary phase shift keying (BPSK); the waveform of the auxiliary synchronization signal is a single-carrier waveform. The specific method for determining the auxiliary synchronization signal based on the first sequence is not limited. In one implementation, the auxiliary synchronization signal is a signal obtained by modulating the first sequence with π / 2-BPSK, performing conversion precoding, frequency domain mapping, and N-point inverse fast Fourier transform.

[0113] For example, as shown in Figure 5, the process of determining the auxiliary synchronization signal based on the first sequence may include the following steps:

[0114] The second sequence is obtained by performing π / 2-BPSK modulation on the first sequence. The relationship between the elements s(n) of the second sequence and the elements x(n) of the first sequence can satisfy the following form:

[0115] The second sequence can be a phase sequence. A phase sequence is a sequence whose elements take values ​​from one of {1, -1, j, -j}, where j is an imaginary number. The multiplication complexity of correlation detection for a phase sequence is negligible, thus reducing the detection complexity of the second sequence.

[0116] Furthermore, the second sequence is pre-coded to obtain the first frequency domain signal. For example, the second sequence can be subjected to an L-point Discrete Fourier Transform (DFT) to obtain the first frequency domain signal {X(0), X(1), ..., X(L-1)}. L is the number of DFT points, s(i) is the element of the second sequence, and X(n) is the frequency domain signal after DFT.

[0117] Optionally, a frequency domain spectrum shaping (FDSS) filter can also be used to filter the first frequency domain signal, thereby further reducing the PAPR of the auxiliary synchronization signal. FDSS refers to windowing filtering of the frequency domain signal. For example, as shown in Figure 6, the first frequency domain signal is {X(0),X(1),…,X(L-1)}, and the filter coefficients are {W(0),W(1),…,W(L-1)}. The specific values ​​of the filter coefficients are determined according to the actual situation, and this application does not limit them. Windowing filtering means multiplying the frequency domain signal with the filter coefficients bit by bit. The filtered first frequency domain signal is {X(0)W(0),X(1)W(1),…,X(L-1)W(L-1)}. After FDSS filtering, the complementary cumulative distribution function (CCDF) corresponding to the PAPR of the auxiliary synchronization signal of the single-carrier waveform modulated by π / 2-BPSK is 10. -4 The value is 2-3 dB, which can reduce the PAPR of the auxiliary synchronization signal.

[0118] Furthermore, the first frequency domain signal (or the filtered first frequency domain signal) is mapped onto L subcarriers and subjected to an N-point inverse fast fourier transformation (IFFT) to obtain the auxiliary synchronization signal, such as the auxiliary synchronization signal. N is the number of sampling points for the IFFT. The waveform of the secondary synchronization signal obtained at this time is a single-carrier waveform. Here, N is an integer greater than L, and N can be determined based on the system bandwidth. It is important to understand that the value of N is generally much larger than L.

[0119] The above are just examples. Network devices can also acquire a second sequence, for example, by storing the second sequence in the network device. The network device can then convert and precode the second sequence to obtain a first frequency domain signal, and thereby generate a secondary synchronization signal based on the first frequency domain signal. Alternatively, the network device can acquire the first frequency domain signal, for example, by storing the first frequency domain signal in the network device, and thereby generate a secondary synchronization signal based on the first frequency domain signal.

[0120] In one implementation, if multiple antennas are used for transmission, the first frequency domain signal can be multiplied by a precoding matrix before subcarrier mapping. The precoding matrix is ​​preset or predefined.

[0121] Step 402: The network device sends a secondary synchronization signal.

[0122] Correspondingly, the terminal device receives the auxiliary synchronization signal from the network device.

[0123] In one implementation, the network device can also add a CP to the auxiliary synchronization signal and perform digital-to-analog conversion on the CP-added auxiliary synchronization signal to obtain an analog signal, which the network device then transmits via an antenna.

[0124] Step 403: The terminal device detects the auxiliary synchronization signal.

[0125] After receiving the secondary synchronization signal, the terminal device needs to perform correlation detection on the secondary synchronization signal to determine the first sequence.

[0126] During the detection of the secondary synchronization signal by the terminal device, correlation processing is performed on the secondary synchronization signal and at least one specific sequence to obtain the correlation value corresponding to each specific sequence. This correlation value can refer to the cross-correlation value. The specific sequence with the largest correlation value corresponds to the secondary synchronization signal. These specific sequences can be pre-stored in the terminal device or generated by the terminal device. The terminal device can store or generate multiple specific sequences.

[0127] This application does not limit how the correlation value between two sequences is specifically determined. For example, the cross-correlation value c between frequency domain sequences S1 and S2... max (S1,S2) satisfy:

[0128] After normalization, c max (S1,S2) satisfy:

[0129] The terminal device can determine the relevant value corresponding to each specific sequence according to the above formula; the specific process will not be elaborated here.

[0130] A specific sequence can be implemented in multiple ways, and the detection method for the auxiliary synchronization signal also varies depending on the implementation method. Several examples are given below. Based on the preceding description, several possible detection methods for the auxiliary synchronization signal are presented below.

[0131] Method 1: The specific sequence is the third sequence. The third sequence is obtained, and the terminal device detects the auxiliary synchronization signal based on the third sequence.

[0132] The terminal device stores at least one third sequence, and each third sequence corresponds to a different first cell identifier, for example, N. I ( D 1) The set of values ​​for is {0, 1, 2, ..., 335}, and the terminal device can store 336 third sequences. When detecting the auxiliary synchronization signal, the third sequence can be obtained from at least one of the third sequences.

[0133] The detection of auxiliary synchronization signals by the terminal device based on a third sequence includes: the terminal device performing correlation processing on the received auxiliary synchronization signals according to the third sequence to detect the auxiliary synchronization signals. For example, for each acquired third sequence, the terminal device can generate a first sequence based on each third sequence, and determine a second sequence based on the first sequence. The terminal device can generate multiple first sequences, thereby obtaining multiple second sequences. The terminal device performs correlation processing on the multiple second sequences with the auxiliary synchronization signal respectively to obtain a correlation value corresponding to each second sequence, wherein the correlation processing includes correlation calculation. The second sequence with the largest correlation value is the second sequence corresponding to the auxiliary synchronization signal, that is, the terminal device determines the second sequence with the largest correlation value as the auxiliary synchronization sequence corresponding to the auxiliary synchronization signal.

[0134] The terminal device can determine multiple third sequences based on the recursive formula and the initial value, but this application does not limit this.

[0135] Method 2: The specific sequence is the first sequence. The first sequence is obtained, and the terminal device detects the auxiliary synchronization signal based on the first sequence.

[0136] The terminal device stores multiple first sequences, and each first sequence corresponds to a different first cell identifier, for example, The set of values ​​for is {0, 1, 2, ..., 335}, and the terminal device can store 336 first sequences. When detecting the secondary synchronization signal, a first sequence can be obtained from at least one first sequence. Alternatively, at least one third sequence can be stored, and when detecting the secondary synchronization signal, a third sequence can be obtained from at least one third sequence, and a first sequence can be generated based on the third sequence. Alternatively, at least one fourth sequence and at least one fifth sequence can be stored, and when detecting the secondary synchronization signal, a fourth sequence can be obtained from at least one fourth sequence, a fifth sequence can be obtained from at least one fifth sequence, and a first sequence can be generated based on the fourth and fifth sequences.

[0137] The terminal device detects the auxiliary synchronization signal based on a first sequence, including: generating a second sequence based on the first sequence, and performing correlation processing on the received auxiliary synchronization signal based on the second sequence to detect the auxiliary synchronization signal. For example, for each acquired first sequence, the terminal device can generate a second sequence, obtaining multiple second sequences. The terminal device performs correlation processing on the multiple second sequences with the auxiliary synchronization signal respectively to obtain a correlation value corresponding to each second sequence. The second sequence with the largest correlation value is the second sequence corresponding to the auxiliary synchronization signal; that is, the terminal device determines the second sequence with the largest correlation value as the auxiliary synchronization sequence corresponding to the auxiliary synchronization signal.

[0138] Method 3: The specific sequences are the fourth and fifth sequences. The fourth and fifth sequences are obtained, and the terminal device detects the auxiliary synchronization signal based on the fourth and fifth sequences.

[0139] The terminal device stores at least one fourth sequence and at least one fifth sequence. When detecting the auxiliary synchronization signal, it can obtain the fourth sequence from at least one fourth sequence and the fifth sequence from at least one fifth sequence. Alternatively, the terminal device can determine at least one fourth sequence based on the recursive formula corresponding to the first primitive polynomial and the initial value, and determine at least one fifth sequence based on the recursive formula corresponding to the second primitive polynomial and the initial value. For details, please refer to the preceding description.

[0140] The terminal device detects the auxiliary synchronization signal based on a fourth sequence and a fifth sequence, including: the terminal device performs correlation processing on the received auxiliary synchronization signal according to the fourth sequence and the fifth sequence to detect the auxiliary synchronization signal. For example, a first sequence is generated for each acquired fourth sequence and each fifth sequence, and a second sequence is determined based on the first sequence. The terminal device can generate multiple first sequences, thereby obtaining multiple second sequences. The terminal device performs correlation processing on the multiple second sequences with the auxiliary synchronization signal respectively to obtain a correlation value corresponding to each second sequence. The second sequence with the largest correlation value is the second sequence corresponding to the auxiliary synchronization signal, that is, the terminal device determines the second sequence with the largest correlation value as the auxiliary synchronization sequence corresponding to the auxiliary synchronization signal.

[0141] The terminal device can also determine multiple fourth sequences based on the recursive formula and initial value corresponding to the first primitive polynomial, and multiple fifth sequences based on the recursive formula and initial value corresponding to the second primitive polynomial. For details, please refer to the previous description.

[0142] Method 4: The specific sequence is the second sequence. The second sequence is obtained, and the terminal device detects the auxiliary synchronization signal based on the second sequence.

[0143] The second sequence is generated based on the first sequence and can be stored locally. At least one second sequence can be stored; when detecting the secondary synchronization signal, the second sequence can be retrieved from the stored at least one second sequence. Alternatively, at least one first sequence can be stored; when detecting the secondary synchronization signal, a first sequence can be selected from the stored at least one first sequence, and a second sequence can be generated based on the selected first sequence. Alternatively, at least one third sequence can be stored; when detecting the secondary synchronization signal, a third sequence can be retrieved from the stored at least one third sequence, a first sequence can be generated based on the third sequence, and then a second sequence can be generated based on the first sequence. Alternatively, at least one fourth sequence and at least one fifth sequence can be stored; when detecting the secondary synchronization signal, a fourth sequence can be retrieved from the stored at least one fourth sequence, a fifth sequence can be retrieved from the stored at least one fifth sequence, a first sequence can be generated based on the fourth and fifth sequences, and then a second sequence can be generated based on the first sequence.

[0144] The terminal device detects the auxiliary synchronization signal based on the second sequence, including: the terminal device performing correlation processing on the received auxiliary synchronization signal according to the second sequence to detect the auxiliary synchronization signal. For example, the terminal device can obtain multiple second sequences. The terminal device performs correlation processing on the multiple second sequences with the auxiliary synchronization signal respectively to obtain a correlation value corresponding to each second sequence. The second sequence with the largest correlation value is the second sequence corresponding to the auxiliary synchronization signal, that is, the terminal device determines the second sequence with the largest correlation value as the auxiliary synchronization sequence corresponding to the auxiliary synchronization signal.

[0145] Method 5: The terminal device detects the auxiliary synchronization signal based on the sequence in the auxiliary synchronization sequence set.

[0146] The auxiliary synchronization sequence set includes at least one second sequence, which is a sequence obtained based on the first sequence. At least one auxiliary synchronization sequence set can be stored. When detecting an auxiliary synchronization signal, a sequence can be selected from the stored auxiliary synchronization sequence set for detection. Alternatively, at least one first sequence can be stored. When detecting an auxiliary synchronization signal, a first sequence can be selected from the stored at least one first sequence, and a second sequence can be generated based on the selected first sequence. Thus, by traversing the stored first sequences, at least one second sequence can be generated, obtaining the auxiliary synchronization sequence set. Alternatively, at least one fourth sequence and at least one fifth sequence can be stored. When detecting an auxiliary synchronization signal, a fourth sequence can be obtained from the at least one fourth sequence, a fifth sequence can be obtained from the at least one fifth sequence, a first sequence can be generated based on the fourth and fifth sequences, and then a second sequence can be generated based on the first sequence. Thus, by traversing the stored at least one fourth sequence and at least one fifth sequence, at least one second sequence can be generated, obtaining the auxiliary synchronization sequence set. Alternatively, at least one third sequence can be stored. When detecting an auxiliary synchronization signal, a third sequence can be obtained from the at least one third sequence, a first sequence can be generated based on the third sequence, and then a second sequence can be generated based on the first sequence. Thus, traversing at least one third sequence in the storage can generate at least one second sequence, obtaining a set of auxiliary synchronization sequences.

[0147] When a terminal device detects a secondary synchronization signal, it can sequentially perform correlation processing (e.g., taking an inner product) on all sequences in the secondary synchronization sequence set with the received secondary synchronization signal to obtain a set of correlation values. Each correlation value in the correlation value set corresponds to a sequence in the secondary synchronization sequence set. The secondary synchronization signal is then determined based on the maximum correlation value in the correlation value set. For example, the terminal device can determine the secondary synchronization sequence corresponding to the maximum correlation value in the correlation value set as the secondary synchronization sequence corresponding to the secondary synchronization signal; that is, the second sequence with the largest correlation value is the second sequence corresponding to this secondary synchronization signal.

[0148] The above are just examples. There may be other ways for the terminal device to detect the auxiliary synchronization signal, and this application does not limit this.

[0149] The terminal device can also determine the first cell identifier based on the second sequence with the largest correlation value (i.e., the second sequence corresponding to the auxiliary synchronization signal). The specific process will not be described in detail here.

[0150] The method provided in this application modulates the auxiliary synchronization signal obtained based on the first sequence as π / 2-BPSK, and the waveform of the auxiliary synchronization signal is a single-carrier waveform. The PAPR performance of the auxiliary synchronization signal can be improved by 4dB, which can reduce the PAPR of the auxiliary synchronization signal and improve the coverage of the auxiliary synchronization signal.

[0151] It is understood that, in order to achieve the functions in the above embodiments, the terminal device or network device includes hardware structures and / or software modules corresponding to perform each function. Those skilled in the art should readily recognize that, based on the units and method steps of the various examples described in conjunction with the embodiments disclosed in this application, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed by hardware or by computer software driving hardware depends on the specific application scenario and design constraints of the technical solution.

[0152] The following are schematic diagrams of possible communication devices provided in the embodiments of this application. These communication devices can be used to implement the functions of terminal devices or network devices in the above method embodiments, and thus can also achieve the beneficial effects of the above method embodiments.

[0153] In the case of using integrated units, FIG7 shows a possible exemplary block diagram of the communication device involved in the embodiments of this application. As shown in FIG7, the communication device 700 may include a processing unit 701 and a communication unit 702. The processing unit 701 is used to control and manage the operation of the communication device 700. The communication unit 702 is used to support communication between the communication device 700 and other devices. Optionally, the communication unit 702 may include a receiving unit and / or a transmitting unit, respectively used to perform receiving and transmitting operations. Optionally, the communication device 700 may also include a storage unit for storing the program code and / or data of the communication device 700. The communication unit may be referred to as an input / output unit, transceiver unit, etc., and the communication unit may be a transceiver; the processing unit may be a processor. When the communication device is a module (e.g., a chip) in a communication device, the communication unit may be an input / output interface, input / output circuit, or input / output pin, etc., and may also be referred to as an interface, communication interface, or interface circuit, etc.; the processing unit may be a processor, processing circuit, or logic circuit, etc. Specifically, the communication device may be the aforementioned network device, terminal, etc.

[0154] In one embodiment, the communication device 700 is used to implement the functions of a network device:

[0155] A processing unit is used to generate an auxiliary synchronization signal, which is a signal obtained based on a first sequence; the modulation method of the auxiliary synchronization signal is π / 2-BPSK; the waveform of the auxiliary synchronization signal is a single-carrier waveform; a communication unit is used to transmit the auxiliary synchronization signal.

[0156] In another embodiment, the communication device 700 is used to implement the functions of the terminal device:

[0157] A communication unit is used to receive an auxiliary synchronization signal; a processing unit is used to detect the auxiliary synchronization signal from a network device; the auxiliary synchronization signal is a signal obtained based on a first sequence; the modulation method of the auxiliary synchronization signal is π / 2-BPSK; the waveform of the auxiliary synchronization signal is a single-carrier waveform.

[0158] The processing unit and communication unit described above can also perform other functions. For more detailed descriptions, please refer directly to the relevant descriptions in the above method embodiments, which will not be repeated here.

[0159] It should be understood that the division of units in the above device is merely a logical functional division. In actual implementation, they can be fully or partially integrated into a single physical entity, or they can be physically separated. Furthermore, all units in the device can be implemented entirely through software calls from processing elements; all units can be implemented entirely in hardware; or some units can be implemented through software calls from processing elements, and others in hardware. For example, each unit can be a separate processing element, or it can be integrated into a chip within the device. Alternatively, it can be stored as a program in memory, called and executed by a processing element of the device. Moreover, these units can be fully or partially integrated together, or implemented independently. The processing element here can also be called a processor, which can be an integrated circuit with signal processing capabilities. In the implementation process, the operations or units described above can be implemented through integrated logic circuits in the processor element or through software calls from processing elements.

[0160] Figure 8 is a schematic block diagram of a communication device 800 provided in an embodiment of this application. The communication device 800 can be a terminal device or a network device as described in the above embodiments. For example, the communication device 800 can be the terminal device in Figure 1 or a chip (system) within a terminal device. In this embodiment, the chip system can be composed of chips or may include chips and other discrete devices. Specific functions can be found in the descriptions of the above method embodiments. As another example, the communication device 800 can be the network device in Figure 1 or a chip (system) within a network device. In this embodiment, the chip system can be composed of chips or may include chips and other discrete devices. Specific functions can be found in the descriptions of the above method embodiments.

[0161] The communication device 800 includes one or more processors 801, used to implement or support the communication device 800 in implementing the functions of the terminal device or network device in the methods provided in the embodiments of this application. For details, please refer to the detailed description in the method examples, which will not be repeated here. The processor 801 can also be called a processing unit or processing module, and can implement certain control functions. The processor 801 can be a general-purpose processor or a dedicated processor, etc. For example, it includes: a baseband processor, a central processing unit, an application processor, a modem processor, a graphics processor, an image signal processor, a digital signal processor, a video codec processor, a controller, a memory, and / or a neural network processor, etc. The baseband processor can be used to process communication protocols and communication data. The central processing unit can be used to control the communication device 800 (e.g., a network device or a terminal device), execute software programs and / or process data. Different processors can be independent devices or integrated into one or more processors, for example, integrated on one or more application-specific integrated circuits.

[0162] In one design, processor 801 may include program 803 (sometimes also referred to as code or instructions) that can be executed on processor 801 to cause communication device 800 to perform the methods described in the embodiments below. In yet another possible design, communication device 800 includes circuitry (not shown in FIG8) for implementing the functions of the terminal device or network device in the above embodiments.

[0163] In one design, the communication device 800 may include one or more memories 802 storing a program 804 (sometimes referred to as code or instructions), which can be run on the processor 801 to cause the communication device 800 to perform the methods described in the above method embodiments.

[0164] In one design, the processor 801 and / or memory 802 may include an artificial intelligence (AI) module for implementing AI-related functions. The AI ​​module may be implemented through software, hardware, or a combination of both. For example, the AI ​​module may include a RAN intelligent controller (RIC) module. The AI ​​module may be a near real-time RIC or a non-real-time RIC.

[0165] In one possible design, the processor 801 and / or memory 802 may also store data. The processor and memory may be configured separately or integrated together.

[0166] In one possible design, the communication device 800 may further include a transceiver 805 and / or an antenna 806. The processor 801, sometimes referred to as a processing unit, controls the communication device 800. The transceiver 805, sometimes referred to as a communication unit, transceiver, transceiver circuit, or transceiver, is used to implement the transmission and reception functions of the communication device 800 through the antenna 806.

[0167] In one possible design, the communication device 800 may further include one or more of the following components: a wireless communication module, an audio module, an external memory interface, internal memory, a universal serial bus (USB) interface, a power management module, an antenna, a speaker, a microphone, an input / output module, a sensor module, a motor, a camera, or a display screen, etc. It is understood that in some embodiments, the communication device 800 may include more or fewer components, or some components may be integrated, or some components may be separated. These components may be implemented in hardware, software, or a combination of software and hardware.

[0168] The communication device in the above embodiments can be a terminal device, a circuit, a chip applied in a terminal device, or other combined devices or components having the aforementioned terminal device. Alternatively, the communication device in the above embodiments can be a network device, a circuit, a chip applied in a network device, or other combined devices or components having the aforementioned network device. When the communication device is a terminal device or a network device, the transceiver module can be a transceiver, which may include an antenna and radio frequency circuits, etc., and the processing module can be a processor, such as a CPU. When the communication device is a chip system, the communication device can be an FPGA, a dedicated ASIC, a system-on-chip (SoC), a CPU, a network processor (NP), a DSP, a microcontroller unit (MCU), a programmable logic device (PLD), or other integrated chips. The processing module can be the processor of the chip system. The transceiver module or communication interface can be the input / output interface or interface circuit of the chip system. For example, the interface circuit can be a code / data read / write interface circuit. The interface circuit can be used to receive code instructions (the code instructions are stored in memory and can be read directly from memory or through other devices) and transmit them to the processor; the processor can then execute the code instructions to perform the methods described in the above method embodiments. Alternatively, the interface circuit can also be a signal transmission interface circuit between a communication processor and a transceiver.

[0169] This application also provides a communication system, which includes at least one terminal device and at least one network device. The terminal device is used to implement the functions related to the above-described communication method, and the network device is used to implement the functions related to the above-described communication method. This application also provides a computer-readable storage medium, including instructions that, when executed on a computer, cause the computer to perform the method executed by the terminal device or the network device in the above-described communication method.

[0170] This application also provides a computer program product, including computer program code, which, when executed, causes a computer to perform the method executed by the terminal device or network device in the above-described communication method.

[0171] This application provides a chip system including a processor and potentially a memory, for implementing the functions of a terminal device or network device in the aforementioned communication method. The chip system can be composed of chips or may include chips and other discrete components.

[0172] To achieve the functions of the aforementioned communication device, this application also provides a chip, including a processor, for supporting the communication device in implementing the functions involved in the terminal device or network device in the above method embodiments. In one possible design, the chip is connected to a memory or the chip includes a memory for storing necessary computer programs, instructions, and data for the communication device.

[0173] It should be understood that in the various embodiments of this application, the order of the above-mentioned processes does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0174] It should be noted that the structure shown in Figure 8 does not constitute a specific limitation on the terminal device or network device. For example, in other embodiments of this application, the terminal device or network device may include more or fewer components than shown in the figure, or combine some components, or split some components, or have different component arrangements. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.

[0175] It is understood that the processor in the embodiments of this application may be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. A general-purpose processor may be a microprocessor or any conventional processor.

[0176] The method steps in the embodiments of this application can be implemented in hardware or by a processor executing software instructions. The software instructions can consist of corresponding software modules, which can be stored in random access memory, flash memory, read-only memory, programmable read-only memory, erasable programmable read-only memory, electrically erasable programmable read-only memory, registers, hard disks, portable hard disks, CD-ROMs, or any other form of storage medium known in the art. An exemplary storage medium is coupled to a processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and storage medium can reside in an ASIC. Alternatively, the ASIC can reside in a base station or terminal. Of course, the processor and storage medium can also exist as discrete components in the base station or terminal.

[0177] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, the processes or functions described in the embodiments of this application are performed entirely or partially. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a network device, a user equipment, or other programmable device. The computer program or instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another. For example, the computer program or instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium, such as a floppy disk, hard disk, or magnetic tape; it can also be an optical medium, such as a digital video optical disc; or it can be a semiconductor medium, such as a solid-state drive. The computer-readable storage medium may be a volatile or non-volatile storage medium, or may include both types of storage media.

[0178] In the various embodiments of this application, unless otherwise specified or in case of logical conflict, the terminology and / or descriptions of different embodiments are consistent and can be referenced by each other. The technical features of different embodiments can be combined to form new embodiments according to their inherent logical relationship.

[0179] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, optical storage, etc.) containing computer-usable program code.

[0180] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to this application. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in one or more blocks of the flowchart illustrations and / or one or more blocks of the block diagrams.

[0181] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means that implement the functions specified in one or more flowcharts and / or one or more block diagrams.

[0182] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A communication method, characterized in that, include: A secondary synchronization signal is generated, which is a signal obtained based on the first sequence; the modulation method of the secondary synchronization signal is π / 2-BPSK; the waveform of the secondary synchronization signal is a single-carrier waveform. Send the auxiliary synchronization signal.

2. The method according to claim 1, characterized in that, The generation of the auxiliary synchronization signal includes: The first sequence is modulated with π / 2-BPSK to obtain the second sequence; The second sequence is converted and pre-encoded to obtain the first frequency domain signal; The first frequency domain signal is mapped onto L subcarriers and subjected to an N-point fast Fourier transform to obtain the auxiliary synchronization signal, where L is an integer greater than 1.

3. The method according to claim 1 or 2, characterized in that, The first sequence is determined based on the third sequence. Both the first sequence and the third sequence have a length of L. The element d(m) of the third sequence and the element x(n) of the first sequence satisfy: x(n) = d(m), where m = (n + c) mod L, c is an integer, and 0 ≤ n. <L,0≤m<L; c is p × ID, where ID ranges from [0, K-1] and K is a positive integer. The ratio of p to L is greater than the first threshold, where p is a positive integer.

4. The method according to claim 1 or 2, characterized in that, The first sequence is determined based on the fourth and fifth sequences. The lengths of the first, fourth, and fifth sequences are all L. The elements e(k) of the fourth sequence, f(m) of the fifth sequence, and x(n) of the first sequence satisfy: x(n) = mod(e(k) + f(m), 2), where k = (n + c1) mod L, m = (n + c2) mod L, c1 and c2 are integers, and 0 ≤ n. <L,0≤m<L,0≤k<L; Wherein, c1 is p1×ID1, ID1 has a value range of [0, K1-1], K1 is a positive integer, c2 is p2×ID2, ID2 has a value range of [0, K2-1], K1 and K2 are positive integers, the ratio of p1 to L is greater than a first threshold, the ratio of p2 to L is greater than a second threshold, and p1 and p2 are positive integers.

5. The method according to claim 4, characterized in that, The difference between p1 and p2 is less than the third threshold.

6. The method according to claim 5, characterized in that, The third threshold is less than or equal to 4.

7. The method according to any one of claims 3 to 6, characterized in that, The first threshold is the ratio of the cyclic prefix (CP) length of the auxiliary synchronization signal to the symbol length of the orthogonal frequency division multiplexing (OFDM).

8. The method according to any one of claims 1 to 7, characterized in that, The first sequence is an m-sequence or a gold sequence.

9. A communication method, characterized in that, include: The auxiliary synchronization signal from the network device is detected; the auxiliary synchronization signal is a signal obtained based on the first sequence; the modulation method of the auxiliary synchronization signal is π / 2-BPSK; the waveform of the auxiliary synchronization signal is a single-carrier waveform.

10. The method according to claim 9, characterized in that, The first sequence is determined based on the third sequence. Both the first sequence and the third sequence have a length of L. The element d(m) of the third sequence and the element x(n) of the first sequence satisfy: x(n) = d(m), where m = (n + c) mod L, c is an integer, and 0 ≤ n. <L,0≤m<L; c is p × ID, where ID ranges from [0, K-1] and K is a positive integer. The ratio of p to L is greater than the first threshold, where p is a positive integer.

11. The method according to claim 9, characterized in that, The first sequence is determined based on the fourth and fifth sequences. The lengths of the first, fourth, and fifth sequences are all L. The elements e(k) of the fourth sequence, f(m) of the fifth sequence, and x(n) of the first sequence satisfy: x(n) = mod(e(k) + f(m), 2), where k = (n + c1) mod L, m = (n + c2) mod L, c1 and c2 are integers, and 0 ≤ n. <L,0≤m<L,0≤k<L; Wherein, c1 is p1×ID1, ID1 has a value range of [0, K1-1], K1 is a positive integer, c2 is p2×ID2, ID2 has a value range of [0, K2-1], K1 and K2 are positive integers, the ratio of p1 to L is greater than a first threshold, the ratio of p2 to L is greater than a second threshold, and p1 and p2 are positive integers.

12. The method according to claim 11, characterized in that, The difference between p1 and p2 is less than the third threshold.

13. The method according to claim 12, characterized in that, The third threshold is less than or equal to 4.

14. The method according to any one of claims 10 to 13, characterized in that, The first threshold is the ratio of the cyclic prefix (CP) length of the auxiliary synchronization signal to the symbol length of the orthogonal frequency division multiplexing (OFDM).

15. The method according to any one of claims 9 to 14, characterized in that, The first sequence is an m-sequence or a gold sequence.

16. A communication device, characterized in that, include: A processing unit is used to generate an auxiliary synchronization signal, which is a signal obtained based on a first sequence; the modulation method of the auxiliary synchronization signal is π / 2-BPSK; and the waveform of the auxiliary synchronization signal is a single-carrier waveform. A communication unit is used to send the auxiliary synchronization signal.

17. A communication device, characterized in that, include: The processing unit is used to detect a secondary synchronization signal from a network device; the secondary synchronization signal is a signal obtained based on a first sequence; the modulation method of the secondary synchronization signal is π / 2-BPSK; and the waveform of the secondary synchronization signal is a single-carrier waveform.

18. A communication device, characterized in that, Includes a processor; the processor is configured to execute a computer program or instructions that cause the communication device to implement the method described in any one of claims 1 to 15.

19. A computer-readable storage medium, characterized in that, The computer contains a computer program or instructions that, when executed on a computer, cause the computer to perform the method as described in any one of claims 1 to 15.

20. A chip, characterized in that, The chip includes a processor coupled to a memory for executing a computer program or instructions stored in the memory, such that the chip implements the method of any one of claims 1 to 15.

21. A computer program product, characterized in that, When the computer reads and executes the computer program product, the method described in any one of claims 1 to 15 is performed.

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