Scheduling method, network device, scheduling apparatus, and storage medium

Abstract

Disclosed are a scheduling method, a network device, a scheduling apparatus, and a storage medium, relating to the technical field of communications. A specific implementation scheme is as follows: obtaining a sensing slot scheduling solution, wherein in the sensing slot scheduling solution, a channel resource of a sensing slot is scheduled by the sensing slot, and the sensing slot is a slot in which a sensing signal is present; and using the sensing slot scheduling solution to schedule a sensing slot in a target frame. Hence, to address the technical problems in the related art of DCI resource shortage and increased delay in cross-slot scheduling, the present disclosure allows a channel resource of a sensing slot to be scheduled by the sensing slot itself, so that DCI resource shortage can be effectively alleviated, and slots between scheduled DCIs can be shortened, thereby reducing scheduling delay.

Description

Scheduling method, network device, scheduling apparatus and storage medium

[0001] Cross-reference to Related Applications

[0002] The present disclosure claims priority to Chinese Patent Application No. 202410825858.5, filed on June 25, 2024, entitled "Scheduling method, network device, scheduling apparatus and storage medium", the entire contents of which are incorporated herein by reference. TECHNICAL FIELD

[0003] The present disclosure relates to the technical field of communication, in particular to a scheduling method, a network device, a scheduling apparatus and a storage medium. BACKGROUND

[0004] The rapid development of 5G (5th-Generation Mobile Communication Technology) technology, especially the proposal of 5G-A (5G Advanced, the next stage of 5G), has painted a new blueprint for the future of communication and perception integration. The technology of communication and perception integration, i.e., the integration of communication and perception, is to introduce radar-like perception capabilities on the basis of existing cellular mobile communication networks. This technology enables the network not only to transmit information, but also to monitor and track objects around it in real time.

[0005] In the technology of communication and perception integration, the perception signal needs to be transmitted back from the AAU (Active Antenna Unit) to the BBU (BaseBand Unit) through the front-haul interface, and then the BBU performs cross-slot scheduling on the time slot where the perception signal is located. However, cross-slot scheduling may cause problems such as DCI (Downlink Control Information) resource shortage and increased latency. For example, in a typical scenario of 2.5ms double-period frame structure, the first 7 perception symbols are transmitted in slot0 / 5, and the time slot where the perception signal is located, slot0 / 5, is scheduled by slot7 / 3. When the number of access terminals increases to a certain extent, the control resources on slot7 will be very scarce (slot7 allocates DCI in slot7 / 9 / 10 three time slots). At the same time, after cross-slot scheduling, the downlink resources on slot0 / 5 cannot be adjusted in time and need to wait until slot1 / 6 to make changes, resulting in increased latency. SUMMARY

[0006] The present disclosure provides a scheduling method, a network device, a scheduling apparatus and a storage medium.

[0007] According to an embodiment of the present disclosure, a scheduling method is provided, which is applied to a network device, and includes: obtaining a sensing time slot scheduling scheme, wherein channel resources of a sensing time slot in the sensing time slot scheduling scheme are scheduled by the sensing time slot, and the sensing time slot is a time slot in which a sensing signal exists; and scheduling the sensing time slot in a target frame by using the sensing time slot scheduling scheme.

[0008] In some embodiments, in the sensing time slot scheduling scheme, the sensing time slot includes a symbol in which the sensing signal is located, a symbol in which a physical downlink control channel (PDCCH) of the sensing time slot is located, and a symbol in which a physical downlink shared channel (PDSCH) of the sensing time slot is located, the symbol in which the PDCCH of the sensing time slot is located is any symbol after the symbol in which the sensing signal is located, the PDCCH of the sensing time slot carries downlink control information (DCI) of the sensing time slot, the DCI of the sensing time slot is used to indicate scheduling information of a target PDSCH of the sensing time slot, and the target PDSCH is a PDSCH after the PDCCH of the sensing time slot; wherein the scheduling information includes a resource allocation type, a start and length indicator value (SLIV) field, and a slot offset, the resource allocation type includes Type A and Type B, and the SLIV field is used to indicate a start position S and a length L of the PDSCH of the sensing time slot.

[0009] In some embodiments, in the sensing time slot scheduling scheme, the resource allocation type of the PDSCH of the sensing time slot is Type B, the start position S in the SLIV field is a symbol after the symbol in which the PDCCH of the sensing time slot is located, and the length L is determined based on a number of symbols after the symbol in which the PDCCH of the sensing time slot is located.

[0010] In some embodiments, in the sensing time slot scheduling scheme, a first preset number of symbols of the sensing time slot are the symbol in which the sensing signal is located, a first symbol after the symbol in which the sensing signal is located is the symbol in which the PDCCH of the sensing time slot is located, and a symbol after the symbol in which the PDCCH of the sensing time slot is located is the symbol in which the PDSCH of the sensing time slot is located.

[0011] In some embodiments, the scheduling of the sensing time slot in the target frame by using the sensing time slot scheduling scheme includes: obtaining a cross-slot scheduling scheme, wherein channel resources of the sensing time slot in the cross-slot scheduling scheme are scheduled by a normal time slot other than the sensing time slot, and the normal time slot is a time slot in which no sensing signal exists; and scheduling the sensing time slot in the target frame by using the cross-slot scheduling scheme or the sensing time slot scheduling scheme based on a preset sensing time slot scheduling mechanism.

[0012] In some embodiments, the sensing time slot scheduling mechanism includes a first sensing time slot scheduling mechanism and / or a second sensing time slot scheduling mechanism; the first sensing time slot scheduling mechanism is configured to schedule sensing time slots of terminals accessing a network using the cross-slot scheduling scheme when the number of terminals accessing the network does not exceed a preset threshold value, schedule sensing time slots of subsequent terminals accessing the network using the sensing time slot scheduling scheme when the number of terminals accessing the network reaches the preset threshold value, and switch the sensing time slot scheduling scheme to the cross-slot scheduling scheme when the number of terminals accessing the network is below the preset threshold value; the second sensing time slot scheduling mechanism is configured to schedule a sensing time slot of a terminal accessing the network using the sensing time slot scheduling scheme when a scheduling request is received from the terminal accessing the network, and start a timer, and switch the sensing time slot scheduling scheme to the cross-slot scheduling scheme when the timer expires.

[0013] In some embodiments, the first sensing time slot scheduling mechanism has a higher priority than the second sensing time slot scheduling mechanism, and the preset sensing time slot scheduling mechanism is configured to schedule sensing time slots in a target frame using the cross-slot scheduling scheme or the sensing time slot scheduling scheme, including: when preset conditions of the first sensing time slot scheduling mechanism and the second sensing time slot scheduling mechanism are both met but the scheduling schemes used are different, scheduling the sensing time slots in the target frame using the scheduling scheme used by the first sensing time slot scheduling mechanism.

[0014] In some embodiments, in the cross-slot scheduling scheme, the sensing time slot includes a symbol where a sensing signal is located and a symbol where a PDSCH of the sensing time slot is located, a symbol after the symbol where the sensing signal is located is the symbol where the PDSCH of the sensing time slot is located, and scheduling information of the PDSCH of the sensing time slot is indicated by DCI of the sensing time slot carried by a PDCCH of a normal time slot, wherein the PDCCH of the normal time slot also carries DCI of the normal time slot, and the DCI of the normal time slot is configured to indicate scheduling information of a PDSCH of the normal time slot after the PDCCH of the normal time slot.

[0015] In some embodiments, the target frame further includes a normal time slot, the normal time slot is a time slot where no sensing signal is present, and the method further includes: obtaining a normal time slot scheduling scheme, wherein channel resources of the normal time slot in the normal time slot scheduling scheme are scheduled by the normal time slot; and scheduling the normal time slot in the target frame using the normal time slot scheduling scheme.

[0016] According to an embodiment of another aspect of the present disclosure, a network device is provided, comprising a memory, a transceiver, and a processor: the memory is configured to store a computer program; the transceiver is configured to transceive data under the control of the processor; and the processor is configured to read the computer program in the memory and perform the following operations: obtaining a sensing time slot scheduling scheme, wherein channel resources of a sensing time slot in the sensing time slot scheduling scheme are scheduled by the sensing time slot, and the sensing time slot is a time slot in which a sensing signal exists; and scheduling the sensing time slot in a target frame by using the sensing time slot scheduling scheme.

[0017] In some embodiments, in the sensing time slot scheduling scheme, the sensing time slot includes a symbol in which the sensing signal is located, a symbol in which a physical downlink control channel (PDCCH) of the sensing time slot is located, and a symbol in which a physical downlink shared channel (PDSCH) of the sensing time slot is located, the symbol in which the PDCCH of the sensing time slot is located is any symbol after the symbol in which the sensing signal is located, the PDCCH of the sensing time slot carries downlink control information (DCI) of the sensing time slot, the DCI of the sensing time slot is used to indicate scheduling information of a target PDSCH of the sensing time slot, and the target PDSCH is a PDSCH after the PDCCH of the sensing time slot; wherein the scheduling information includes a resource allocation type, a start and length indicator value (SLIV) field, and a slot offset, the resource allocation type includes Type A and Type B, and the SLIV field is used to indicate a start position S and a length L of the PDSCH of the sensing time slot.

[0018] In some embodiments, in the sensing time slot scheduling scheme, the resource allocation type of the PDSCH of the sensing time slot is Type B, the start position S in the SLIV field is a symbol after the symbol in which the PDCCH of the sensing time slot is located, and the length L is determined based on a number of symbols after the symbol in which the PDCCH of the sensing time slot is located.

[0019] In some embodiments, in the sensing time slot scheduling scheme, a first preset number of symbols before the sensing time slot are the symbol in which the sensing signal is located, a first symbol after the symbol in which the sensing signal is located is the symbol in which the PDCCH of the sensing time slot is located, and a symbol after the symbol in which the PDCCH of the sensing time slot is located is the symbol in which the PDSCH of the sensing time slot is located.

[0020] In some embodiments, the processor is further configured to perform the following operations: obtaining a cross-time slot scheduling scheme, wherein channel resources of the sensing time slot in the cross-time slot scheduling scheme are scheduled by a normal time slot other than the sensing time slot, and the normal time slot is a time slot in which a sensing signal does not exist; and scheduling the sensing time slot in a target frame by using the cross-time slot scheduling scheme or the sensing time slot scheduling scheme based on a preset sensing time slot scheduling mechanism.

[0021] In some embodiments, the sensing time slot scheduling mechanism comprises a first sensing time slot scheduling mechanism and / or a second sensing time slot scheduling mechanism; the first sensing time slot scheduling mechanism is configured to schedule sensing time slots of terminals accessing the network by using the cross-slot scheduling scheme when the number of the terminals accessing the network does not exceed a preset threshold value, schedule sensing time slots of subsequent terminals accessing the network by using the sensing time slot scheduling scheme when the number of the terminals accessing the network reaches the preset threshold value, and convert the sensing time slot scheduling scheme to the cross-slot scheduling scheme when the number of the terminals accessing the network is lower than the preset threshold value; the second sensing time slot scheduling mechanism is configured to schedule a sensing time slot of a terminal accessing the network by using the sensing time slot scheduling scheme when a scheduling request sent by the terminal is received, and start a timer, so as to convert the sensing time slot scheduling scheme to the cross-slot scheduling scheme when the timer expires.

[0022] In some embodiments, the first sensing time slot scheduling mechanism has a higher priority than the second sensing time slot scheduling mechanism, and the processor is further configured to schedule a sensing time slot in a target frame by using a scheduling scheme adopted by the first sensing time slot scheduling mechanism when preset conditions of the first sensing time slot scheduling mechanism and the second sensing time slot scheduling mechanism are both met but the scheduling schemes adopted by the first sensing time slot scheduling mechanism and the second sensing time slot scheduling mechanism are different.

[0023] In some embodiments, in the cross-slot scheduling scheme, the sensing time slot comprises a symbol where a sensing signal is located and a symbol where a PDSCH of the sensing time slot is located, a symbol after the symbol where the sensing signal is located is the symbol where the PDSCH of the sensing time slot is located, and scheduling information of the PDSCH of the sensing time slot is indicated by DCI of the sensing time slot carried by a PDCCH of a normal time slot, wherein the PDCCH of the normal time slot also carries DCI of the normal time slot, and the DCI of the normal time slot is used to indicate scheduling information of a PDSCH of the normal time slot after the PDCCH of the normal time slot.

[0024] In some embodiments, the target frame further comprises a normal time slot, the normal time slot is a time slot where no sensing signal is located, and the processor is further configured to obtain a normal time slot scheduling scheme, wherein channel resources of the normal time slot in the normal time slot scheduling scheme are scheduled by the normal time slot, and schedule the normal time slot in the target frame by using the normal time slot scheduling scheme.

[0025] According to an embodiment of the present disclosure, a scheduling device is provided, which is applied to a network device, and the device comprises: a first obtaining unit configured to obtain a sensing time slot scheduling scheme, wherein channel resources of a sensing time slot in the sensing time slot scheduling scheme are scheduled by the sensing time slot, and the sensing time slot is a time slot in which a sensing signal exists; and a first scheduling unit configured to schedule the sensing time slot in a target frame by using the sensing time slot scheduling scheme.

[0026] According to an embodiment of the present disclosure, a processor readable storage medium is provided, which stores a computer program, and the computer program is used to make the processor execute the scheduling method in any of the above embodiments.

[0027] According to an embodiment of the present disclosure, a computer program product is provided, which comprises a computer program, and the computer program is used to implement the scheduling method in any of the above embodiments when executed by a processor.

[0028] The technical scheme of the present disclosure comprises the following steps: obtaining a sensing time slot scheduling scheme, wherein channel resources of a sensing time slot in the sensing time slot scheduling scheme are scheduled by the sensing time slot, and the sensing time slot is a time slot in which a sensing signal exists; and scheduling the sensing time slot in a target frame by using the sensing time slot scheduling scheme. Thus, in the present disclosure, the channel resources of the sensing time slot are scheduled by the sensing time slot itself, which can effectively alleviate the DCI resource shortage, reduce the time slots between the scheduling DCIs, and reduce the scheduling delay.

[0029] It should be understood that the content described in this part is not intended to identify key or important features of the embodiments of the present disclosure, nor is it used to limit the scope of the present disclosure. Other features of the present disclosure will become apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0030] The accompanying drawings are used to better understand the present scheme and do not limit the present disclosure. Among them:

[0031] FIG. 1 is a schematic diagram of a cross-time slot scheduling scheme in a typical 2.5ms double-period frame structure in the related art;

[0032] FIG. 2 is a schematic diagram of a normal time slot scheduling scheme in the related art;

[0033] FIG. 3 is a schematic diagram of a scheduling timing in the related art;

[0034] FIG. 4(a) and FIG. 4(b) are schematic diagrams of a cross-time slot scheduling delay in the related art;

[0035] FIG. 5 is a flowchart of a scheduling method provided by an embodiment of the present disclosure;

[0036] FIG. 6 is a schematic diagram of a sensing time slot scheduling scheme provided by an embodiment of the present disclosure;

[0037] FIG. 7 is a flowchart of a sensing time slot scheduling process provided by an embodiment of the present disclosure;

[0038] FIG. 8 is a flowchart of a normal time slot scheduling process provided by an embodiment of the present disclosure;

[0039] FIG. 9 is a schematic diagram of scheduling timing provided by an embodiment of the present disclosure;

[0040] FIG. 10(a) and FIG. 10(b) are schematic diagrams of scheduling delay provided by an embodiment of the present disclosure;

[0041] FIG. 11 is a schematic diagram of a structure of a network device provided by an embodiment of the present disclosure;

[0042] FIG. 12 is a schematic diagram of a structure of a scheduling apparatus provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0043] In the embodiments of the present disclosure, the term "and / or" describes the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the three cases of A alone, A and B together, and B alone. The character " / " generally represents that the associated objects before and after it are in an "or" relationship.

[0044] In the embodiments of the present disclosure, the term "a plurality of" means two or more, and other quantifiers are similar.

[0045] The technical solutions in the embodiments of the present disclosure will be described clearly and completely below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present disclosure.

[0046] In the related art, the scheduling timing in the sensing integration sensing activation period adopts cross-slot scheduling. The cross-slot scheduling scheme under the typical 2.5 ms double period frame structure is shown in FIG. 1.

[0047] In FIG. 1, slot1 / 2 / 3 / 6 / 7 are downlink normal slots, which are scheduled by using a scheduling mode of K0=0. K0 refers to the interval time slot number between a PDCCH (Physical Downlink Control Channel) and a PDSCH (Physical Downlink Shared Channel) scheduled by the PDCCH, and K0=0 means that the interval time slot number between the PDCCH and the PDSCH scheduled by the PDCCH is 0.

[0048] slot4 / 8 / 9 are uplink normal slots, which are scheduled by using a scheduling mode of K2=2. K2 refers to the interval time slot number between a PDCCH and a PUSCH (Physical Uplink Shared Channel) scheduled by the PDCCH, and K2=2 means that the interval time slot number between the PDCCH and the PUSCH scheduled by the PDCCH is 2.

[0049] slot0 (10) / 5 are sensing slots (slots in which sensing signals are located), and the first 7 symbols in the slots are occupied by the sensing signals.

[0050] In FIG. 1, slot1 / 2 / 3 / 6 / 7 use a normal slot scheduling scheme as shown in FIG. 2.

[0051] The normal slot scheduling scheme is described as follows: the first symbol in a slot is a PDCCH channel, and the PDCCH carries a DCI message used to schedule a PDSCH channel, and the DCI message is configured through an SLIV field. As shown in FIG. 1, the PDCCH is in the first symbol, and the remaining 13 symbols are PDSCH, SLIV=40 (S:1, L:13) means that the starting position S of the PDSCH is symbol index 1, the length L is 13 symbols, and the allocation mode is Type A. The symbol index starts from 0.

[0052] When L-1≤7, SLIV=14*(L-1)+S;

[0053] When L-1>7, SLIV=14*(14-L+1)+(14-1-S).

[0054] Type A (PDSCH time domain resource allocation mode A (which can occupy most symbols)): the PDSCH occupies symbols usually starting from [0~3] of a slot, and the symbol length can be varied between 3 and 14. This allocation mode allows data transmission using a longer continuous symbol.

[0055] FIG. 3 is a schematic diagram of a scheduling timing in the related art, and it can be known from FIG. 3 that:

[0056] slot3 schedules PDSCH resource of slot3 / 5 through DCI, since the first 7 symbols of slot5 are occupied by sensing signal, the PDSCH resource can only be allocated from the 8th symbol, so slot5 adopts resource allocation mode of Type B short symbol (S:L=7:7).

[0057] slot7 schedules PDSCH resource of slot7 / 0(10) and PUSCH resource (K2=2) of slot9 through DCI, since the first 7 symbols of slot0(10) are occupied by sensing signal, the PDSCH resource can only be allocated from the 8th symbol, so slot0(10) adopts resource allocation mode of Type B short symbol (S:L=7:7).

[0058] Type B (PDSCH time domain resource allocation mode B (only occupies a smaller part of symbol)): the symbol position of PDSCH is more flexible, which can start from 0-12 of the slot. The symbol length is relatively short, which is limited to 2, 4, 7 (R15) or 3-13 (R16), in order to adapt to the demand of URLLC (Ultra-Reliable and Low-Latency Communications) service for low latency.

[0059] The downlink PDSCH resource and the uplink PUSCH resource are both scheduled by the base station sending DCI. DCI is a control instruction sent to the terminal through PDCCH, and DCI is composed of CCE (Control Channel Element) and occupies the bandwidth of the downlink PRB (Physical Resource Block). The frequency domain resource of CCE is limited, so the number of DCI that can be sent is also limited.

[0060] When cross-slot scheduling is adopted, the DCI resource may be in a situation of resource allocation shortage. As shown in FIG. 3, slot1 / 2 / 3 adopts downlink scheduling mode of K0=0, same-slot scheduling; slot4 adopts scheduling mode of K2=2, which is scheduled by DCI of slot2; slot5 adopts cross-slot scheduling K0=2, which is scheduled by DCI of slot3; slot6 / 7 adopts downlink scheduling mode of K0=0, same-slot scheduling; slot8 / 9 adopts scheduling mode of K2=2, which is scheduled by DCI of slot6 / 7; slot0(10) adopts cross-slot scheduling K0=3, which is scheduled by DCI of slot7. As can be seen, three time slots of DCI resource need to be allocated on slot7, when the number of cell users increases to a certain extent, the phenomenon of DCI resource shortage will occur, which leads to allocation failure and reduces user experience.

[0061] The cross-slot scheduling delay is shown in FIG. 4(a) and FIG. 4(b). In FIG. 4(a), the PDSCH resource of slot5 is scheduled by slot3, and after slot3 completes the scheduling, the next DCI scheduling of slot6 will not be performed until the PUSCH resource of slot4 and the PDSCH resource of slot5 are sent, and the delay between the two DCI scheduling is 3 slots; in FIG. 4(b), the PDSCH resource of slot0 is scheduled by slot7, and after slot7 completes the scheduling, the next DCI scheduling of slot1 will not be performed until the PUSCH resource of slot8 / 9 and the PDSCH resource of slot0 are sent, and the delay between the two DCI scheduling is 4 slots.

[0062] In summary, the sensing slot scheduling in the related art has the following disadvantages:

[0063] 1. DCI resource is tight. If the terminal in the sensing activation period performs uplink and downlink services, the base station needs to schedule resources through DCI, and each slot resource needs to be scheduled by corresponding DCI. When the number of terminal access in a cell is large, the DCI is very limited. For example, in a typical 2.5ms double period scenario, slot7 needs to allocate DCI of slot7 / 9 / 10 three slots, and the DCI resource is very tight compared with other slots. When reaching a certain critical point, DCI allocation failure may occur, resulting in a decrease in uplink and downlink service rate of part of the terminal, and the user experience is poor.

[0064] 2. The scheduling delay is increased. When cross-slot scheduling is adopted, the two PDCCHs before and after the sensing slot will necessarily differ by one slot, increasing the delay. For example, in a typical 2.5ms double period scenario, the PDSCH resource of slot5 is scheduled by slot3, and the difference is one slot. After slot3 sends the DCI to schedule slot5, if the base station scheduling changes, the changed scheduling needs to be sent through slot6 after slot4 / 5 two slots are sent. The scheduling time sequence increases the delay of one slot compared with the scheduling time sequence of K0=0.

[0065] Therefore, the present disclosure proposes a scheduling method, a network device, a scheduling apparatus and a storage medium to provide a sensing slot scheduling scheme (in the sensing slot scheduling scheme, the channel resource of the sensing slot is scheduled by the sensing slot), to alleviate the DCI resource tightness, reduce the time slots between the scheduling DCI, and reduce the scheduling delay.

[0066] The technical solutions provided by the embodiments of the present disclosure can be applied to various systems, especially future communication systems, such as a 5G system. For example, the applicable systems can be a GSM (Global System for Mobile Communications) system, a CDMA (Code Division Multiple Access) system, a WCDMA (Wide-band Code Division Multiple Access) system, a GPRS (Ggeneral Packet Radio Service) system, an LTE (Long Term Evolution) system, an LTE FDD (Frequency Division Duplex) system, an LTE TDD (Time Division Duplex) system, an LTE-A (Long Term Evolution Advanced) system, a UMTS (Universal Mobile Telecommunication System), a WiMAX (Worldwide Interoperability for Microwave Access) system, a 5G system, and the like. The various systems all include terminal devices and network devices. The system can also include a core network part, such as an EPS (Evolved Packet System), a 5GC (5G core network), and the like.

[0067] The terminal device to which the embodiments of the present disclosure relate can refer to a device providing voice and / or data connectivity to a user, a handheld device with wireless connection function, or other processing devices connected to a wireless modem, etc. In different systems, the name of the terminal device can also be different, for example, in the 5G system, the terminal device can be referred to as UE. The wireless terminal device can communicate with one or more CNs through the RAN, and the wireless terminal device can be a mobile terminal device, such as a mobile phone (or called "cellular" phone) and a computer with a mobile terminal device, for example, it can be a portable, pocket, handheld, computer built-in or vehicle-mounted mobile device, which exchanges language and / or data with the wireless access network. For example, PCS (Personal Communication Service) phone, cordless phone, SIP (Session Initiated Protocol) phone, WLL (Wireless Local Loop) station, PDA (Personal Digital Assistant) and other devices. The wireless terminal device can also be referred to as a system, a subscriber unit, a subscriber station, a mobile station, a mobile, a remote station, an access point, a remote terminal, an access terminal, a user terminal, a user agent, a user device, which is not limited in the embodiments of the present disclosure.

[0068] The network device according to the embodiments of the present disclosure can be a base station, which can include a plurality of cells serving terminals. According to different application scenarios, the base station can also be referred to as an access point, or can be a device in an access network that communicates with wireless terminal devices through one or more sectors over an air interface, or other names. The network device can be used to exchange received air frames and IP (Internet Protocol) packets as a router between the wireless terminal device and the rest of the access network, wherein the rest of the access network can include an IP communication network. The network device can also coordinate the management of the properties of the air interface. For example, the network device according to the embodiments of the present disclosure can be a BTS (Base Transceiver Station) in GSM or CDMA, or a NodeB in WCDMA, or an eNB or e-NodeB (evolutional Node B) in an LTE system, or a 5G base station (gNB) in a 5G network architecture (next generation system), or a HeNB (Home evolved Node B), a relay node, a femto, a pico, etc., which are not limited in the embodiments of the present disclosure. In some network structures, the network device can include a CU (Centralized Unit) node and a DU (Distributed Unit) node, and the CU and the DU can also be arranged geographically apart.

[0069] The network device and the terminal device can each use one or more antennas for MIMO (Multi Input Multi Output) transmission, which can be SU-MIMO (Single User MIMO) or MU-MIMO (Multiple User MIMO). According to the form and number of antenna combinations, the MIMO transmission can be 2D-MIMO, 3D-MIMO, FD-MIMO or massive-MIMO, or can be a diversity transmission or a precoding transmission or a beamforming transmission, etc.

[0070] The scheduling method, the network device, the scheduling apparatus and the storage medium according to the embodiments of the present disclosure are described below with reference to the accompanying drawings.

[0071] FIG. 5 is a flowchart of a scheduling method according to an embodiment of the present disclosure.

[0072] It should be noted that the scheduling method of the embodiments of the present disclosure is applied to a network device.

[0073] As shown in FIG. 5, the scheduling method can include steps 501-502.

[0074] In step 501, an awareness time slot scheduling scheme is acquired.

[0075] In the awareness time slot scheduling scheme, the channel resources of the awareness time slot are scheduled by the awareness time slot, and the awareness time slot is a time slot in which an awareness signal exists.

[0076] As a possible implementation, in the awareness time slot scheduling scheme, the awareness time slot includes a symbol in which the awareness signal is located, a symbol in which a physical downlink control channel (PDCCH) of the awareness time slot is located, and a symbol in which a physical downlink shared channel (PDSCH) of the awareness time slot is located. The symbol in which the PDCCH of the awareness time slot is located is any symbol after the symbol in which the awareness signal is located. The PDCCH of the awareness time slot carries downlink control information (DCI) of the awareness time slot. The DCI of the awareness time slot is used to indicate scheduling information of a target PDSCH of the awareness time slot. The target PDSCH is a PDSCH after the PDCCH of the awareness time slot.

[0077] The scheduling information includes a resource allocation type, a SLIV (Start and Length Indicator Value) field, and a slot offset. The resource allocation type includes Type A and Type B. The SLIV field is used to indicate a starting position S and a length L of the PDSCH of the awareness time slot.

[0078] That is, in the awareness time slot scheduling scheme, the PDSCH of the awareness time slot and the DCI of the awareness time slot are both in the awareness time slot. Compared with the cross-slot scheduling scheme in which the PDSCH of the awareness time slot and the DCI of the awareness time slot are located in different time slots, the present disclosure can effectively alleviate DCI resource shortage, reduce the time slots between the scheduled DCIs, and reduce scheduling delay through the same-slot scheduling manner.

[0079] The PDCCH of the sensing time slot can be the first symbol after the symbol where the sensing signal is located, or the second symbol after the symbol where the sensing signal is located, and the like, which is not limited in the present disclosure. It should be noted that, since the DCI carried in the PDCCH of the sensing time slot can only indicate the scheduling information of the PDSCH of the sensing time slot after the PDCCH of the sensing time slot, when the PDCCH of the sensing time slot is located in the first symbol after the symbol where the sensing signal is located, the symbol where the PDCCH of the sensing time slot is located is adjacent to the symbol where the sensing signal is located, all the symbols of the sensing time slot are effectively utilized, and the stability of the rate can be maximally guaranteed, and when the PDCCH of the sensing time slot is not located in the first symbol after the symbol where the sensing signal is located, the symbol where the PDCCH of the sensing time slot is located is not adjacent to the symbol where the sensing signal is located, and the channel resources of at least one symbol between the two symbols are wasted, which also causes certain influence on the rate.

[0080] As a possible implementation manner, in the sensing time slot scheduling scheme, the resource allocation type of the PDSCH of the sensing time slot is Type B, the starting position S in the SLIV field is the symbol after the symbol where the PDCCH of the sensing time slot is located, and the length L is determined based on the number of symbols after the symbol where the PDCCH of the sensing time slot is located.

[0081] As a possible implementation manner, in the sensing time slot scheduling scheme, the first set number of symbols in the sensing time slot are the symbol where the sensing signal is located, the first symbol after the symbol where the sensing signal is located is the symbol where the PDCCH of the sensing time slot is located, and the symbol after the symbol where the PDCCH of the sensing time slot is located is the symbol where the PDSCH of the sensing time slot is located.

[0082] As an example, FIG. 6 is a schematic diagram of a sensing time slot scheduling scheme according to the second embodiment of the present disclosure. The first 7 symbols in the sensing time slot are sensing signals, the last 7 symbols send communication signals, the 8th symbol is a PDCCH channel (which maximally guarantees the stability of the rate), the PDCCH carries a DCI to schedule the position of a PDSCH channel, and the DCI is configured through an SLIV field. As shown in FIG. 6, the PDCCH is in the 8th symbol, and the remaining 6 symbols are PDSCH, SLIV=78 (S:8, L:6), that is, the starting position of the PDSCH is symbol index 8, the length is 6 symbols, and the allocation mode is Type B. It should be noted that the symbol index starts from 0.

[0083] In some embodiments, the network device of the sensing cell can acquire a sensing time slot scheduling scheme to schedule the sensing time slot.

[0084] As an example, for a common sense cell, the base station can issue a sense time slot scheduling scheme. Optionally, a "common sense time slot scheduling switch" can be added to the LMT (Local Maintenance Terminal). When the switch is turned on, the common sense cell identifier is added to the RRC (Radio Resource Control) MAC (Medium Access Control) cell establishment message. When responding to the cell establishment message, fill in the sense time slot scheduling scheme.

[0085] Step 502, using the sense time slot scheduling scheme to schedule the sense time slot in the target frame.

[0086] According to the scheduling method provided by the present disclosure, the sense time slot scheduling scheme is obtained, wherein the channel resources of the sense time slot in the sense time slot scheduling scheme are scheduled by the sense time slot, and the sense time slot is a time slot in which a sense signal exists. Therefore, the sense time slot in the target frame is scheduled using the sense time slot scheduling scheme. Thus, in the related art, the technical problems of DCI resource shortage and increased delay caused by cross-time slot scheduling can be effectively alleviated by scheduling the channel resources of the sense time slot by the sense time slot itself, reducing the time slots between the scheduling DCIs, and reducing the scheduling delay.

[0087] In the present disclosure, in addition to using the sense time slot scheduling scheme to schedule the sense time slot in the target frame, a cross-time slot scheduling scheme can also be used to schedule the sense time slot in the target frame. The process of using the sense time slot scheduling scheme or the cross-time slot scheduling scheme to schedule the sense time slot in the target frame will be described below in conjunction with FIG. 7.

[0088] FIG. 7 is a flowchart of a sense time slot scheduling process according to an embodiment of the present disclosure.

[0089] As shown in FIG. 7, the process can include steps 701-702.

[0090] Step 701, obtaining a cross-time slot scheduling scheme.

[0091] In the cross-time slot scheduling scheme, the channel resources of the sense time slot are scheduled by normal time slots other than the sense time slot, and the normal time slot is a time slot in which no sense signal exists.

[0092] As a possible implementation, in the cross-slot scheduling scheme, the sensing slot includes a symbol where the sensing signal is located and a symbol where the PDSCH of the sensing slot is located, the symbol after the symbol where the sensing signal is located is the symbol where the PDSCH of the sensing slot is located, and the scheduling information of the PDSCH of the sensing slot is indicated by the DCI of the sensing slot carried by the PDCCH of the normal slot, wherein the PDCCH of the normal slot also carries the DCI of the normal slot, and the DCI of the normal slot is used to indicate the scheduling information of the PDSCH of the normal slot after the PDCCH of the normal slot.

[0093] That is, in the cross-slot scheduling scheme, the PDSCH of the sensing slot and the DCI of the sensing slot are located in different slots, wherein the PDSCH of the sensing slot is located in the sensing slot, and the DCI of the sensing slot is located in the normal slot scheduling the sensing slot.

[0094] It should be noted that the PDCCH of the normal slot and the PDSCH of the normal slot are both located in the normal slot. Moreover, the normal slot has the following two scheduling cases:

[0095] I. The normal slot does not schedule the channel resource of the sensing slot, and only the DCI of the normal slot is carried in the PDCCH of the normal slot. For example, as shown in FIG. 3, slot1 schedules the PDSCH resource of slot1 by DCI1, wherein slot1 is a normal slot, DCI1 is the DCI of slot1, and thus it can be known that slot1 does not schedule the sensing slot, and only the DCI of slot1 is carried in the PDCCH of slot1.

[0096] II. The normal slot schedules the channel resource of the sensing slot, and the DCI of the normal slot and the DCI of the scheduled sensing slot are both carried in the PDCCH of the normal slot. For example, as shown in FIG. 3, slot3 schedules the PDSCH resource of slot3 / 5 by DCI3 / DCI5, wherein slot3 is a normal slot, slot5 is a sensing slot, DCI3 is the DCI of slot3, and DCI5 is the DCI of slot5, and thus it can be known that slot3 schedules the sensing slot, and the DCI of slot3 and the DCI of slot5 are both carried in the PDCCH of slot3.

[0097] As a possible implementation, in the cross-slot scheduling scheme, the resource allocation type of the PDSCH of the sensing slot is Type B, the starting position S in the SLIV field is the first symbol after the symbol where the sensing signal is located, and the length L is determined based on the number of symbols after the symbol where the sensing signal is located.

[0098] As a possible implementation manner, in the cross-slot scheduling scheme, the first preset number of symbols before the sensing slot is the symbol where the sensing signal is located, and the symbol after the symbol where the sensing signal is located is the symbol where the PDSCH of the sensing slot is located.

[0099] The second preset number can be the same as or different from the first preset number in the foregoing, and the disclosure does not limit this.

[0100] As an example, the cross-slot scheduling scheme can refer to the related description of FIGS. 1-4, which is not described here again.

[0101] In some embodiments, the network device of the sensing cell can obtain the sensing slot scheduling scheme and the cross-slot scheduling scheme for scheduling the sensing slot.

[0102] As an example, for the sensing cell, the base station can issue the sensing slot scheduling scheme and the cross-slot scheduling scheme. Optionally, a "sensing slot scheduling switch" can be added to the LMT. When the switch is turned on, the sensing cell identifier is added to the RRC MAC cell establishment message. When responding to the cell establishment message, the sensing slot scheduling scheme and the cross-slot scheduling scheme are filled in.

[0103] Step 702: based on the preset sensing slot scheduling mechanism, the sensing slot in the target frame is scheduled by using the cross-slot scheduling scheme or the sensing slot scheduling scheme.

[0104] In some embodiments, by using the sensing slot scheduling scheme and the cross-slot scheduling scheme, the sensing slot scheduling mode can be reasonably allocated for different application scenarios, and the delay resource can be fully utilized. Optionally, based on the preset sensing slot scheduling mechanism, the sensing slot in the target frame can be scheduled by using the cross-slot scheduling scheme or the sensing slot scheduling scheme. The preset sensing slot scheduling mechanism can be any scheduling mechanism, and the number of preset sensing slot scheduling mechanisms can be one or more, and the disclosure does not limit this.

[0105] It should be noted that when the preset sensing slot scheduling mechanism is multiple, in order to avoid the case that multiple sensing slot scheduling presets are met at the same time, but the scheduling schemes adopted by the preset requests met are different, resulting in that it cannot be determined which scheduling scheme is adopted, the priority of the multiple sensing slot scheduling mechanisms can be set in the disclosure, so that when the scheduling schemes adopted by the preset requests met are different when the multiple sensing slot scheduling presets are met at the same time, based on the priority of the multiple sensing slot scheduling mechanisms, the scheduling scheme adopted by the target sensing slot scheduling mechanism is selected from the multiple sensing slot scheduling mechanisms to schedule the sensing slot in the target frame.

[0106] As a possible implementation, the sensing time slot scheduling mechanism can include a first sensing time slot scheduling mechanism and / or a second sensing time slot scheduling mechanism.

[0107] The first sensing time slot scheduling mechanism is configured to schedule the sensing time slots of the terminals using a cross-slot scheduling scheme when the number of accessed terminals does not exceed a set threshold value, schedule the sensing time slots of the subsequently accessed terminals using a sensing time slot scheduling scheme when the number of accessed terminals reaches the set threshold value, and convert the sensing time slot scheduling scheme to the cross-slot scheduling scheme when the number of accessed terminals is below the set threshold value.

[0108] The second sensing time slot scheduling mechanism is configured to schedule the sensing time slots of the accessed terminals using a sensing time slot scheduling scheme when a scheduling request sent by the accessed terminal is received, and start a timer to convert the sensing time slot scheduling scheme to the cross-slot scheduling scheme when the timer expires.

[0109] The set threshold value can be any set value, which is not limited in the present disclosure.

[0110] In the present disclosure, a user number threshold value (i.e., the set threshold value mentioned above) is set, and when the number of users reaches the threshold, the base station of the subsequently accessed user issues a conversion command to convert the cross-slot scheduling scheme to the sensing time slot scheduling scheme. When the number of users decreases, the base station issues a command to convert the users using the sensing time slot scheduling scheme to the cross-slot scheduling scheme. Such a conversion mechanism can effectively utilize the time domain resources while ensuring the stability of the rate.

[0111] In addition, with the rapid development of artificial intelligence, the requirement for communication latency is also increasing. When triggering some low-latency tasks, the terminal can initiate a SR (Scheduling Request), and the base station can issue a scheduling mode conversion command after receiving the request, converting the original cross-slot scheduling scheme to the sensing time slot scheduling scheme, and starting a timer. In this way, the latency can be correspondingly reduced to meet user demand. When the task is completed, the timer is used to listen within a time window. If no resource scheduling is detected within the listening window, the timer will timeout and issue a conversion command to convert the sensing time slot scheduling scheme back to the cross-slot scheduling scheme. In this way, the time domain resources can be reasonably utilized to meet different needs and improve user experience.

[0112] Optionally, the priority of the first sensing time slot scheduling mechanism is higher than the second sensing time slot scheduling mechanism, and a possible implementation manner of the step 702 can be that, in a case where the preset conditions of the first sensing time slot scheduling mechanism and the second sensing time slot scheduling mechanism are both met but the scheduling schemes adopted are different, the sensing time slots in the target frame are scheduled by using the scheduling scheme adopted by the first sensing time slot scheduling mechanism.

[0113] In conclusion, the disclosure can reasonably allocate the scheduling manner of the sensing time slot based on different application scenarios, for example, in a case where the DCI resource is tight, the sensing time slot scheduling scheme is adopted to schedule the sensing time slots in the target frame, in a case where the DCI resource is not tight, the cross-slot scheduling scheme is adopted to schedule the sensing time slots in the target frame, and / or in a case where the terminal initiates the SR, the sensing time slot scheduling scheme is adopted to schedule the sensing time slots in the target frame, and in a case where the timer of the SR is timed out, the cross-slot scheduling scheme is adopted to schedule the sensing time slots in the target frame, and so on.

[0114] In conclusion, in the disclosure, by optimizing the scheduling of the sensing time slot in the sensing activation period, a self-slot scheduling is added to the original cross-slot scheduling, and a corresponding conversion mechanism is configured to alleviate the scheduling tension of the DCI resource, reduce the scheduling delay, and meet different user needs.

[0115] In the disclosure, the target frame can also include a normal time slot, and the normal time slot is a time slot without sensing signals. The scheduling process of the normal time slot in the target frame is described below in combination with FIG. 8.

[0116] FIG. 8 is a flowchart of a normal time slot scheduling process provided by an embodiment of the disclosure.

[0117] As shown in FIG. 8, the process can include steps 801-802.

[0118] In step 801, a normal time slot scheduling scheme is acquired.

[0119] In the normal time slot scheduling scheme, the channel resource of the normal time slot is scheduled by the normal time slot.

[0120] As a possible implementation manner, in the normal time slot scheduling scheme, the first symbol in the normal time slot is a symbol where the PDCCH of the normal time slot is located, the PDCCH of the normal time slot carries the DCI of the normal time slot, and the DCI of the normal time slot is used to indicate the scheduling information of the PDSCH of the normal time slot after the PDCCH of the normal time slot.

[0121] In the disclosure, the scheduling information includes a resource allocation type, a SLIV field, and a slot offset, the resource allocation type includes Type A and Type B, and the SLIV field is used to indicate the starting position S and the length L of the PDSCH of the normal time slot.

[0122] That is, in the normal slot scheduling scheme, the PDSCH of the normal slot and the DCI of the normal slot are both in the normal slot.

[0123] As a possible implementation, in the normal slot scheduling scheme, the resource allocation type of the PDSCH of the normal slot is Type A, the starting position S in the SLIV field is the second symbol in the normal slot, and the length L is determined based on the number of symbols other than the first symbol in the normal slot.

[0124] As a possible implementation, in the normal slot scheduling scheme, the first symbol in the normal slot is the symbol where the PDCCH of the normal slot is located, and the symbols after the first symbol in the normal slot are the symbols where the PDSCH of the normal slot is located.

[0125] As a possible implementation, in the case of a normal slot being a scheduling-aware slot, the PDCCH of the normal slot carries the DCI of the normal slot and the DCI of the scheduled aware slot, wherein the DCI of the normal slot is used to indicate the scheduling information of the PDSCH of the normal slot, and the DCI of the scheduled aware slot is used to indicate the scheduling information of the PDSCH of the scheduled aware slot.

[0126] As an example, the normal slot scheduling scheme can refer to the related description of FIGS. 1-4, which will not be repeated here.

[0127] In some embodiments, the network device of the sensing cell can obtain the aware slot scheduling scheme, the cross-slot scheduling scheme, and the normal slot scheduling scheme, to schedule the aware slots by using the aware slot scheduling scheme or the cross-slot scheduling scheme, and to schedule the normal slots in the target frame by using the normal slot scheduling scheme.

[0128] As an example, for a sensing cell, the base station can issue three sets of scheduling schemes: the aware slot scheduling scheme, the cross-slot scheduling scheme, and the normal slot scheduling scheme. Optionally, a "sensing time slot scheduling switch" can be added to the LMT, and when the switch is on, the sensing cell identifier is added to the RRC MAC cell setup message. When responding to the cell setup message, fill in the three sets of PDCCH+PDSCH scheduling schemes (the first set is the normal slot scheduling scheme: the first symbol is PDCCH+PDSCH+Type A; the second set is the cross-slot scheduling scheme: the aware slot is scheduled by PDCCH+PDSCH+Type B by other slots; the third set is the aware slot scheduling scheme: the first symbol after the aware symbol is PDCCH+PDSCH+Type B).

[0129] Step 802, the normal slots in the target frame are scheduled by using the normal slot scheduling scheme.

[0130] In the disclosure, under the 2.5 ms double-period frame structure, if the normal time slots are scheduled by the normal time slot scheduling scheme and the sensing time slots are scheduled by the sensing time slot scheduling scheme, the scheduling timing is as shown in FIG. 9, which is a schematic diagram of the scheduling timing provided by the fifth embodiment of the disclosure. At this time, the DCI allocation reduces the risk of resource shortage and increases the capacity of the cell.

[0131] As shown in FIG. 9, the slot0 / 1 / 2 / 3 / 5 / 6 / 7 adopts the scheduling mode of K0=0, schedules the same time slot, slot0 / 5 adopts Type B, and the other time slots adopt Type A; the slot4 / 8 / 9 adopts the scheduling mode of K2=2, and is scheduled by the DCI of slot2 / 6 / 7. At this time, the DCI resource allocation on slot7 reduces some overhead, reduces the risk of allocation failure, and improves the user experience.

[0132] In addition, compared with the scheduling timing shown in FIG. 3, the scheduling timing has certain optimization in the delay, and better improves the perception of the user. The scheduling delay of the scheduling timing is as shown in FIG. 10(a) and FIG. 10(b), which are schematic diagrams of the scheduling delay provided by the embodiment of the disclosure. In FIG. 10(a), the PDSCH resource of slot5 is scheduled by the current time slot, when slot3 completes the scheduling, it needs to wait until the PUSCH resource of slot4 is sent, and the next DCI scheduling is completed on slot5, the delay between the two DCI scheduling is 2 time slots. Compared with the scheduling timing shown in FIG. 3, the delay of one time slot is reduced; in FIG. 10(b), the PDSCH resource of slot0 is scheduled by the current time slot, when slot7 completes the scheduling, it needs to wait until the PUSCH resource of slot8 / 9 is sent, and the next DCI scheduling is completed on slot0, the delay between the two DCI scheduling is 3 time slots. Compared with the scheduling timing shown in FIG. 3, the delay of one time slot is reduced.

[0133] In summary, in the disclosure, the normal time slots in the target frame are scheduled by the normal time slot scheduling scheme, and the sensing time slots in the target frame are scheduled by the sensing time slot scheduling scheme, which can effectively alleviate the DCI resource shortage and reduce the scheduling delay.

[0134] In order to realize the above-mentioned embodiments, the disclosure further provides a network device.

[0135] FIG. 11 is a structural schematic diagram of a network device provided by the embodiment of the disclosure.

[0136] As shown in FIG. 11, the network device can include a memory 1110, a transceiver 1120, and a processor 1130.

[0137] The memory 1110 is configured to store a computer program; the transceiver 1120 is configured to transceive data under the control of the processor; and the processor 1130 is configured to read the computer program in the memory and perform the following operations: obtaining a sensing time slot scheduling scheme, wherein channel resources of a sensing time slot in the sensing time slot scheduling scheme are scheduled by the sensing time slot, and the sensing time slot is a time slot in which a sensing signal exists; and scheduling the sensing time slot in a target frame by using the sensing time slot scheduling scheme.

[0138] The transceiver 1120 is configured to receive and send data under the control of the processor 1130.

[0139] In FIG. 11, the bus architecture can include any number of interconnected buses and bridges, which link together various circuits such as the processor 1130, which is representative of the one or more processors, and the memory 1110, which is representative of the memory. The bus architecture can also link together various other circuits such as peripheral devices, voltage stabilizers, and power management circuits, which are well known in the art, and thus, are not further described herein. The bus interface provides an interface. The transceiver 1120 can be a plurality of elements, i.e., including a transmitter and a receiver, which provide units for communicating with various other devices over transmission media, including wireless channels, wired channels, optical cables, and the like. The processor 1130 is responsible for managing the bus architecture and general processing, and the memory 1110 can store data used by the processor 1130 in performing operations.

[0140] The processor 1130 can be a central processing unit (CPU), an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or a complex programmable logic device (CPLD), and the processor can also adopt a multi-core architecture.

[0141] As a possible implementation manner of the embodiment of the present disclosure, in the sensing time slot scheduling scheme, the sensing time slot includes a symbol where the sensing signal is located, a symbol where a physical downlink control channel (PDCCH) of the sensing time slot is located, and a symbol where a physical downlink shared channel (PDSCH) of the sensing time slot is located, the symbol where the PDCCH of the sensing time slot is located is any symbol after the symbol where the sensing signal is located, the PDCCH of the sensing time slot carries downlink control information (DCI) of the sensing time slot, the DCI of the sensing time slot is used to indicate scheduling information of a target PDSCH of the sensing time slot, and the target PDSCH is a PDSCH after the PDCCH of the sensing time slot; wherein the scheduling information includes a resource allocation type, a start and length indication value (SLIV) field, and a slot offset, the resource allocation type includes Type A and Type B, and the SLIV field is used to indicate a start position S and a length L of the PDSCH of the sensing time slot.

[0142] As a possible implementation manner of the embodiment of the present disclosure, in the sensing time slot scheduling scheme, the resource allocation type of the PDSCH of the sensing time slot is Type B, the start position S in the SLIV field is a symbol after the symbol where the PDCCH of the sensing time slot is located, and the length L is determined based on a number of symbols after the symbol where the PDCCH of the sensing time slot is located.

[0143] As a possible implementation manner of the embodiment of the present disclosure, in the sensing time slot scheduling scheme, the first set number of symbols of the sensing time slot are the symbols where the sensing signal is located, the first symbol after the symbols where the sensing signal is located is the symbol where the PDCCH of the sensing time slot is located, and the symbols after the symbol where the PDCCH of the sensing time slot is located are the symbols where the PDSCH of the sensing time slot is located.

[0144] As a possible implementation manner of the embodiment of the present disclosure, the processor 1130 is further configured to: obtain a cross-slot scheduling scheme, wherein in the cross-slot scheduling scheme, a channel resource of a sensing time slot is scheduled by a normal time slot other than the sensing time slot, and the normal time slot is a time slot without a sensing signal; and based on a preset sensing time slot scheduling mechanism, schedule the sensing time slot in a target frame by using the cross-slot scheduling scheme or the sensing time slot scheduling scheme.

[0145] As a possible implementation manner of the embodiment of the present disclosure, the sensing time slot scheduling mechanism comprises a first sensing time slot scheduling mechanism and / or a second sensing time slot scheduling mechanism; the first sensing time slot scheduling mechanism is used for scheduling the sensing time slot of the terminal by using a cross-slot scheduling scheme when the number of accessed terminals does not exceed a set threshold value, scheduling the sensing time slot of the terminal by using a sensing time slot scheduling scheme when the number of accessed terminals reaches the set threshold value, and converting the sensing time slot scheduling scheme into the cross-slot scheduling scheme when the number of accessed terminals is lower than the set threshold value; the second sensing time slot scheduling mechanism is used for scheduling the sensing time slot of the accessed terminal by using the sensing time slot scheduling scheme when a scheduling request sent by the accessed terminal is received, and starting a timer to convert the sensing time slot scheduling scheme into the cross-slot scheduling scheme when the timer expires.

[0146] As a possible implementation manner of the embodiment of the present disclosure, the priority of the first sensing time slot scheduling mechanism is higher than that of the second sensing time slot scheduling mechanism, and the processor 1130 is further configured to perform the following operation: when the preset conditions of the first sensing time slot scheduling mechanism and the second sensing time slot scheduling mechanism are both met but the adopted scheduling schemes are different, scheduling the sensing time slot in the target frame by using the scheduling scheme adopted by the first sensing time slot scheduling mechanism.

[0147] As a possible implementation manner of the embodiment of the present disclosure, in the cross-slot scheduling scheme, the sensing time slot comprises a symbol where the sensing signal is located and a symbol where the PDSCH of the sensing time slot is located, the symbol after the symbol where the sensing signal is located is the symbol where the PDSCH of the sensing time slot is located, and the scheduling information of the PDSCH of the sensing time slot is indicated by the DCI of the sensing time slot carried by the PDCCH of the normal time slot, wherein the PDCCH of the normal time slot also carries the DCI of the normal time slot, and the DCI of the normal time slot is used for indicating the scheduling information of the PDSCH of the normal time slot after the PDCCH of the normal time slot.

[0148] As a possible implementation manner of the embodiment of the present disclosure, the target frame further comprises a normal time slot, the normal time slot is a time slot where no sensing signal exists, and the processor 1130 is further configured to perform the following operation: obtaining a normal time slot scheduling scheme, wherein the channel resource of the normal time slot in the normal time slot scheduling scheme is scheduled by the normal time slot; and scheduling the normal time slot in the target frame by using the normal time slot scheduling scheme.

[0149] It should be noted that the above network device provided by the embodiment of the present disclosure can realize all the method steps realized by the above method embodiments, and achieve the same technical effects. Therefore, the same parts and beneficial effects of the method embodiments will not be described in detail herein.

[0150] To achieve the above-mentioned embodiments, the disclosure further provides a scheduling device.

[0151] FIG. 12 is a structural schematic diagram of a scheduling device provided by an embodiment of the disclosure.

[0152] As shown in FIG. 12, the scheduling device comprises a first acquisition unit 1210 and a first scheduling unit 1220.

[0153] The first acquisition unit 1210 is configured to acquire a sensing time slot scheduling scheme, wherein the channel resource of the sensing time slot in the sensing time slot scheduling scheme is scheduled by the sensing time slot, and the sensing time slot is a time slot in which a sensing signal exists; and the first scheduling unit 1220 is configured to schedule the sensing time slot in a target frame by using the sensing time slot scheduling scheme.

[0154] In a possible implementation manner of the embodiment of the disclosure, in the sensing time slot scheduling scheme, the sensing time slot comprises a symbol in which the sensing signal is located, a symbol in which a physical downlink control channel (PDCCH) of the sensing time slot is located, and a symbol in which a physical downlink shared channel (PDSCH) of the sensing time slot is located, the symbol in which the PDCCH of the sensing time slot is located is any symbol after the symbol in which the sensing signal is located, the PDCCH of the sensing time slot carries downlink control information (DCI) of the sensing time slot, the DCI of the sensing time slot is used to indicate scheduling information of a target PDSCH of the sensing time slot, and the target PDSCH is a PDSCH after the PDCCH of the sensing time slot; wherein the scheduling information comprises a resource allocation type, a start and length indication value (SLIV) field, and a slot offset, the resource allocation type comprises Type A and Type B, and the SLIV field is used to indicate a start position S and a length L of the PDSCH of the sensing time slot.

[0155] In a possible implementation manner of the embodiment of the disclosure, in the sensing time slot scheduling scheme, the resource allocation type of the PDSCH of the sensing time slot is Type B, the start position S in the SLIV field is a symbol after the symbol in which the PDCCH of the sensing time slot is located, and the length L is determined based on the number of symbols after the symbol in which the PDCCH of the sensing time slot is located.

[0156] In a possible implementation manner of the embodiment of the disclosure, in the sensing time slot scheduling scheme, the first set number of symbols before the sensing time slot is the symbol in which the sensing signal is located, the first symbol after the symbol in which the sensing signal is located is the symbol in which the PDCCH of the sensing time slot is located, and the symbol after the symbol in which the PDCCH of the sensing time slot is located is the symbol in which the PDSCH of the sensing time slot is located.

[0157] In a possible implementation of the embodiment of the present disclosure, the first scheduling unit 1220 is further configured to: obtain a cross-slot scheduling scheme, wherein the channel resources of the sensing slot in the cross-slot scheduling scheme are scheduled by a normal slot other than the sensing slot, and the normal slot is a slot without sensing signals; and schedule the sensing slot in the target frame based on a preset sensing slot scheduling mechanism, using the cross-slot scheduling scheme or the sensing slot scheduling scheme.

[0158] In a possible implementation of the embodiment of the present disclosure, the sensing slot scheduling mechanism includes a first sensing slot scheduling mechanism and / or a second sensing slot scheduling mechanism; the first sensing slot scheduling mechanism is configured to schedule the sensing slot of the terminal using the cross-slot scheduling scheme when the number of accessed terminals does not exceed a preset threshold, schedule the sensing slot of the terminal using the sensing slot scheduling scheme when the number of accessed terminals reaches the preset threshold, and convert the sensing slot scheduling scheme to the cross-slot scheduling scheme when the number of accessed terminals is less than the preset threshold; and the second sensing slot scheduling mechanism is configured to schedule the sensing slot of the accessed terminal using the sensing slot scheduling scheme when a scheduling request sent by the accessed terminal is received, and start a timer, so as to convert the sensing slot scheduling scheme to the cross-slot scheduling scheme when the timer expires.

[0159] In a possible implementation of the embodiment of the present disclosure, the priority of the first sensing slot scheduling mechanism is higher than that of the second sensing slot scheduling mechanism, and the first scheduling unit 1220 is further configured to: when the preset conditions of the first sensing slot scheduling mechanism and the second sensing slot scheduling mechanism are met at the same time but the adopted scheduling schemes are different, schedule the sensing slot in the target frame using the scheduling scheme adopted by the first sensing slot scheduling mechanism.

[0160] In a possible implementation of the embodiment of the present disclosure, in the cross-slot scheduling scheme, the sensing slot includes a symbol where the sensing signal is located and a symbol where the PDSCH of the sensing slot is located, the symbol after the symbol where the sensing signal is located is the symbol where the PDSCH of the sensing slot is located, and the scheduling information of the PDSCH of the sensing slot is indicated by the DCI of the sensing slot carried by the PDCCH of the normal slot, wherein the PDCCH of the normal slot also carries the DCI of the normal slot, and the DCI of the normal slot is used to indicate the scheduling information of the PDSCH of the normal slot after the PDCCH of the normal slot.

[0161] In a possible implementation of the embodiment of the present disclosure, the target frame further includes a normal time slot, the normal time slot is a time slot without the sensing signal, and the apparatus further includes a second obtaining unit, configured to obtain a normal time slot scheduling scheme, wherein a channel resource of the normal time slot in the normal time slot scheduling scheme is scheduled by a normal time slot scheduling; and a second scheduling unit, configured to schedule the normal time slot in the target frame by using the normal time slot scheduling scheme.

[0162] It should be noted that the division of units in the embodiments of the present disclosure is illustrative, and is only a logical function division. In actual implementation, another division manner can be used. In addition, each functional unit in each embodiment of the present disclosure can be integrated in one processing unit, or each unit can be physically present separately, or two or more units can be integrated in one unit. The integrated unit can be implemented in the form of hardware or in the form of a software functional unit.

[0163] When the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, the integrated unit can be stored in a processor-readable storage medium. Based on this understanding, the technical solutions of the present disclosure, essentially or in part, or all or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium, and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor to perform all or part of the steps of the methods described in the various embodiments of the present disclosure. The foregoing storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), magnetic disk or optical disk, and various other media that can store program codes.

[0164] It should be noted that the above apparatus provided by the embodiments of the present disclosure can implement all method steps achieved by the above method embodiments, and achieve the same technical effects. Therefore, the same parts and beneficial effects of the method embodiments are not described in detail.

[0165] In order to implement the above-mentioned embodiments, the embodiments of the present disclosure further provide a processor-readable storage medium.

[0166] The processor-readable storage medium stores a computer program, and the computer program is used to make the processor execute the scheduling method of any one of the embodiments of the present disclosure shown in FIG. 5 to FIG. 10.

[0167] The processor-readable storage medium can be any available medium or data storage that can be accessed by a processor including both volatile and nonvolatile media, removable and non-removable media, and computer-readable storage media. By way of example, and not limitation, computer-readable media can comprise RAM, ROM, EEPROM, flash memory, phase change memory, other non-volatile memory, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of computer-readable instructions or data structures and that can be accessed by a computer. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, or twisted pair, then the coaxial cable, fiber optic cable, or twisted pair are included in the definition of medium. Disk and disc, as used herein, include compact disc (CD), laser disc, optical disc, Blu-ray disc, and floppy disk used to store software and data.

[0168] To implement the above-mentioned embodiments, the embodiments of the present disclosure further provide a computer program product comprising a computer program which, when executed by a processor, implements the scheduling method of any one of the embodiments of FIG. 5 to FIG. 10.

[0169] Those skilled in the art will appreciate that embodiments of the present disclosure can be provided as a method, a system, or a computer program product. Therefore, the present disclosure can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present disclosure can take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage and optical storage) containing computer-usable program code.

[0170] The present disclosure is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present disclosure. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, and combinations of flows and / or blocks in the flowcharts and / or block diagrams can be implemented by computer executable instructions. These computer executable instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing apparatus to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing apparatus produce the functions specified in one or more flows in the flowcharts and / or one or more blocks in the block diagrams.

[0171] These processor executable instructions can also be stored in a processor-readable memory that can direct the computer or other programmable data processing apparatus to work in a specific manner, so that the instructions stored in the processor-readable memory produce a product including instruction means, which implements the functions specified in one or more flows in the flowcharts and / or one or more blocks in the block diagrams.

[0172] These processor-executable instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart and / or block diagram block or blocks.

[0173] Obviously, numerous modifications and variations of the present disclosure are possible in light of the above teachings. It is therefore to be understood that within the scope of the present disclosure, the disclosure can be practiced otherwise than as specifically set out herein. Accordingly, any one of the above-described and other example methods or processes can be realized by a computerized platform, such as a general purpose computer, a computerized platform programmed to provide the functions described herein and / or one or more specialized computers designed to provide the functions described herein.

Claims

1. A scheduling method, wherein, Applied to network devices, the method includes: Obtain a sensing time slot scheduling scheme, wherein the channel resources of the sensing time slots in the sensing time slot scheduling scheme are scheduled by the sensing time slots, and the sensing time slots are time slots where sensing signals exist; and The aforementioned sensing time slot scheduling scheme is used to schedule the sensing time slots in the target frame.

2. The method according to claim 1, wherein, In the sensing time slot scheduling scheme, the sensing time slot includes the symbol containing the sensing signal, the symbol containing the physical downlink control channel (PDCCH) of the sensing time slot, and the symbol containing the physical downlink shared channel (PDSCH) of the sensing time slot. The symbol containing the PDCCH of the sensing time slot is any symbol following the symbol containing the sensing signal. The PDCCH of the sensing time slot carries the downlink control information (DCI) of the sensing time slot. The DCI of the sensing time slot is used to indicate the scheduling information of the target PDSCH of the sensing time slot. The target PDSCH is the PDSCH following the PDCCH of the sensing time slot. The scheduling information includes resource allocation type, start and length indication value (SLIV) field, and time slot offset. The resource allocation type includes Type A and Type B. The SLIV field is used to indicate the start position S and length L of the PDSCH of the sensing time slot.

3. The method according to claim 2, wherein, In the sensing time slot scheduling scheme, the resource allocation type of the PDSCH of the sensing time slot is Type B, the starting position S in the SLIV field is the symbol after the symbol where the PDCCH of the sensing time slot is located, and the length L is determined based on the number of symbols after the symbol where the PDCCH of the sensing time slot is located.

4. The method according to claim 2 or 3, wherein, In the sensing time slot scheduling scheme, the first set number of symbols before the sensing time slot are the symbols where the sensing signal is located, the first symbol after the symbol where the sensing signal is located is the symbol where the PDCCH of the sensing time slot is located, and the symbols after the symbol where the PDCCH of the sensing time slot is located are the symbols where the PDSCH of the sensing time slot is located.

5. The method according to any one of claims 1-4, wherein, The step of scheduling the sensing time slots in the target frame using the aforementioned sensing time slot scheduling scheme includes: Obtain a cross-timeslot scheduling scheme, wherein the channel resources of the sensing time slot in the cross-timeslot scheduling scheme are scheduled by normal time slots other than the sensing time slot, and the normal time slots are time slots without sensing signals; and Based on the preset sensing time slot scheduling mechanism, the sensing time slots in the target frame are scheduled using the cross-time slot scheduling scheme or the sensing time slot scheduling scheme.

6. The method according to claim 5, wherein, The sensing time slot scheduling mechanism includes a first sensing time slot scheduling mechanism and / or a second sensing time slot scheduling mechanism. The first sensing time slot scheduling mechanism is used to schedule the sensing time slots of the terminal using the cross-time slot scheduling scheme when the number of connected terminals does not exceed the set threshold; when the number of connected terminals reaches the set threshold, the sensing time slot scheduling scheme is used to schedule the sensing time slots of the subsequently connected terminals; and when the number of connected terminals is lower than the set threshold, the sensing time slot scheduling scheme is converted into the cross-time slot scheduling scheme. The second sensing time slot scheduling mechanism is used to schedule the sensing time slots of the access terminal and start a timer when a scheduling request is received from the access terminal, so that the sensing time slot scheduling scheme is converted into the cross-time slot scheduling scheme when the timer expires.

7. The method according to claim 6, wherein, The first sensing time slot scheduling mechanism has a higher priority than the second sensing time slot scheduling mechanism. The step of scheduling sensing time slots in the target frame using the cross-time slot scheduling scheme or the sensing time slot scheduling scheme based on the preset sensing time slot scheduling mechanism includes: If the preset conditions of the first sensing time slot scheduling mechanism and the second sensing time slot scheduling mechanism are met simultaneously, but the scheduling schemes adopted are different, the sensing time slots in the target frame are scheduled using the scheduling scheme adopted by the first sensing time slot scheduling mechanism.

8. The method according to any one of claims 5-7, wherein, In the cross-timeslot scheduling scheme, the sensing time slot includes the symbol containing the sensing signal and the symbol containing the PDSCH of the sensing time slot. The symbol following the symbol containing the sensing signal is the symbol containing the PDSCH of the sensing time slot. The scheduling information of the PDSCH of the sensing time slot is indicated by the DCI of the sensing time slot carried by the PDCCH of the normal time slot. The PDCCH of the normal time slot also carries the DCI of the normal time slot. The DCI of the normal time slot is used to indicate the scheduling information of the PDSCH of the normal time slot following the PDCCH of the normal time slot.

9. The method according to any one of claims 1-8, wherein, The target frame also includes a normal time slot, which is a time slot where no sensing signal is present. The method further includes: Obtain a normal time slot scheduling scheme, wherein the channel resources of the normal time slots in the normal time slot scheduling scheme are scheduled by the normal time slots; and The normal time slots in the target frame are scheduled using the normal time slot scheduling scheme.

10. A network device, wherein, Includes memory, transceiver, and processor: A memory for storing computer programs; a transceiver for sending and receiving data under the control of the processor; and a processor for reading the computer programs from the memory and performing the following operations: Obtain a sensing time slot scheduling scheme, wherein the channel resources of the sensing time slots in the sensing time slot scheduling scheme are scheduled by the sensing time slots, and the sensing time slots are time slots where sensing signals exist; and The aforementioned sensing time slot scheduling scheme is used to schedule the sensing time slots in the target frame.

11. The network device according to claim 10, wherein, In the sensing time slot scheduling scheme, the sensing time slot includes the symbol containing the sensing signal, the symbol containing the physical downlink control channel (PDCCH) of the sensing time slot, and the symbol containing the physical downlink shared channel (PDSCH) of the sensing time slot. The symbol containing the PDCCH of the sensing time slot is any symbol following the symbol containing the sensing signal. The PDCCH of the sensing time slot carries the downlink control information (DCI) of the sensing time slot. The DCI of the sensing time slot is used to indicate the scheduling information of the target PDSCH of the sensing time slot. The target PDSCH is the PDSCH following the PDCCH of the sensing time slot. The scheduling information includes resource allocation type, start and length indication value (SLIV) field, and time slot offset. The resource allocation type includes Type A and Type B. The SLIV field is used to indicate the start position S and length L of the PDSCH of the sensing time slot.

12. The network device according to claim 11, wherein, In the sensing time slot scheduling scheme, the resource allocation type of the PDSCH of the sensing time slot is Type B, the starting position S in the SLIV field is the symbol after the symbol where the PDCCH of the sensing time slot is located, and the length L is determined based on the number of symbols after the symbol where the PDCCH of the sensing time slot is located.

13. The network device according to claim 11 or 12, wherein, In the sensing time slot scheduling scheme, the first set number of symbols before the sensing time slot are the symbols where the sensing signal is located, the first symbol after the symbol where the sensing signal is located is the symbol where the PDCCH of the sensing time slot is located, and the symbols after the symbol where the PDCCH of the sensing time slot is located are the symbols where the PDSCH of the sensing time slot is located.

14. The network device according to any one of claims 10-13, wherein, The processor is also used to perform the following operations: Obtain a cross-timeslot scheduling scheme, wherein the channel resources of the sensing time slot in the cross-timeslot scheduling scheme are scheduled by normal time slots other than the sensing time slot, and the normal time slots are time slots without sensing signals; and Based on the preset sensing time slot scheduling mechanism, the sensing time slots in the target frame are scheduled using the cross-time slot scheduling scheme or the sensing time slot scheduling scheme.

15. The network device according to claim 14, wherein, The sensing time slot scheduling mechanism includes a first sensing time slot scheduling mechanism and / or a second sensing time slot scheduling mechanism. The first sensing time slot scheduling mechanism is used to schedule the sensing time slots of the terminal using the cross-time slot scheduling scheme when the number of connected terminals does not exceed the set threshold; when the number of connected terminals reaches the set threshold, the sensing time slot scheduling scheme is used to schedule the sensing time slots of the subsequently connected terminals; and when the number of connected terminals is lower than the set threshold, the sensing time slot scheduling scheme is converted into the cross-time slot scheduling scheme. The second sensing time slot scheduling mechanism is used to schedule the sensing time slots of the access terminal and start a timer when a scheduling request is received from the access terminal, so that the sensing time slot scheduling scheme is converted into the cross-time slot scheduling scheme when the timer expires.

16. The network device according to claim 15, wherein, The first sensing time slot scheduling mechanism has a higher priority than the second sensing time slot scheduling mechanism, and the processor is further configured to perform the following operations: If the preset conditions of the first sensing time slot scheduling mechanism and the second sensing time slot scheduling mechanism are met simultaneously, but the scheduling schemes adopted are different, the sensing time slots in the target frame are scheduled using the scheduling scheme adopted by the first sensing time slot scheduling mechanism.

17. The network device according to any one of claims 14-16, wherein, In the cross-timeslot scheduling scheme, the sensing time slot includes the symbol containing the sensing signal and the symbol containing the PDSCH of the sensing time slot. The symbol following the symbol containing the sensing signal is the symbol containing the PDSCH of the sensing time slot. The scheduling information of the PDSCH of the sensing time slot is indicated by the DCI of the sensing time slot carried by the PDCCH of the normal time slot. The PDCCH of the normal time slot also carries the DCI of the normal time slot. The DCI of the normal time slot is used to indicate the scheduling information of the PDSCH of the normal time slot following the PDCCH of the normal time slot.

18. The network device according to any one of claims 10-17, wherein, The target frame also includes normal time slots, which are time slots where no sensing signal is present. The processor is further configured to perform the following operations: Obtain a normal time slot scheduling scheme, wherein the channel resources of the normal time slots in the normal time slot scheduling scheme are scheduled by the normal time slots; and The normal time slots in the target frame are scheduled using the normal time slot scheduling scheme.

19. A scheduling device, wherein, Applied to network devices, the device includes: The first acquisition unit is used to acquire a sensing time slot scheduling scheme, wherein the channel resources of the sensing time slots in the sensing time slot scheduling scheme are scheduled by the sensing time slots, and the sensing time slots are time slots where sensing signals exist; and The first scheduling unit is used to schedule the sensing time slots in the target frame using the sensing time slot scheduling scheme.

20. A processor-readable storage medium, characterized in that, The processor-readable storage medium stores a computer program for causing the processor to perform the method of any one of claims 1 to 9.

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