Display panel, display module and display apparatus

Abstract

A display panel (10), a display module and a display apparatus (100). A display area (10a) of the display panel (10) comprises a plurality of display sub-areas (Psub) arranged in an array, each display sub-area (Psub) comprises a plurality of pixel units (P), and the pixel units (P) are used for executing image display. All pixel units (P) in each display sub-area (Psub) are connected to a same detection signal line (T), and all the pixel units (P) in each display sub-area (Psub) are connected to a same first power line (ELVDD). The detection signal line (T) is used for detecting driving currents (Ids) of the pixel units (P) and correspondingly outputting detection signals, the detection signals are used for providing data signals used for compensation for the pixel units (P), and the first power line (ELVDD) is used for providing power used for image display driving for the pixel units (P).

Description

Display panel, display module and display device

[0001] The present application claims priority to the Chinese patent application No. 202410874593.8, filed on July 2, 2024, and entitled "Display panel and display device", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] The present application relates to the technical field of display, in particular to a display panel, a display module and a display device. BACKGROUND

[0003] Organic light-emitting diode (OLED) as a current light-emitting device has been more and more applied to high-performance display devices. Since it has the advantages of self-luminous, ultra-thin, bendable, bright color, wide viewing angle, high contrast and other advantages, organic light-emitting diode has become the mainstream display device.

[0004] Display devices all include pixels that emit light rays for image display. Each of the pixels can include a driving switch tube that generates a driving current and an organic light-emitting diode (OLED) that emits light based on the driving current. The transistor characteristics (e.g., threshold voltage, mobility, etc.) of the driving switch tube can change according to process deviations in the manufacturing process of the display device, degradation of the pixels in the driving process of the display device, etc. To compensate for the characteristic changes of the driving switch tube, a compensation transistor for compensating for the characteristics of the driving switch tube can be added inside the pixel, or the data signal applied to the pixel can be compensated outside the pixel. However, the compensation effect and accuracy of the display device cannot be optimal at present, resulting in poor image display effect after compensation. SUMMARY

[0005] In view of the foregoing technical problems, the present application provides a display panel, a display module and a display device with better image display effect.

[0006] In a first aspect, the embodiments of the present application disclose a display panel, a display area of the display panel comprising a plurality of display sub-areas arranged in an array, each display sub-area comprising a plurality of pixel units, the pixel units being used for performing image display, all pixel units in each display sub-area being connected to a same detection signal line, and all pixel units in each display sub-area being connected to a same first power supply line, wherein the detection signal line is used for detecting a driving current of the pixel units and correspondingly outputting a detection signal, the detection signal being used for providing a compensation data signal for the pixel units, and the first power supply line being used for providing a power supply for image display driving of the pixel units.

[0007] In an embodiment of the present application, the display panel further comprises a detection circuit and a power supply circuit, the detection circuit and the power supply circuit are respectively arranged in the non-display area on opposite sides of the display area, the detection circuit is connected to each display sub-area through a plurality of detection signal lines, the detection signal lines transmit the detection signals obtained by the detection to the detection circuit to obtain corresponding compensation signals, the compensation signals are used to compensate the data signals of the pixel units. The power supply circuit is connected to all pixel units in each display sub-area through the first power supply lines, and the power supply circuit is used to output a first driving voltage to the pixel units, and the first driving voltage is used to drive the pixel units to perform image display.

[0008] In an embodiment of the present application, the display panel further comprises a plurality of second power supply lines, the second power supply lines are used to provide a second driving voltage, and the first driving voltage and the second driving voltage cooperate to provide a driving current for the pixel units, wherein the first driving voltage is greater than the second driving voltage.

[0009] In an embodiment of the present application, the display panel comprises a substrate, the pixel units are arranged on the substrate, the first power supply lines are located in a preset layer of the display panel, part of the second power supply lines are arranged in the same layer as the first power supply lines, and part of the second power supply lines are arranged in different layers from the first power supply lines.

[0010] In an embodiment of the present application, the first driving voltage is a power supply voltage, and the second driving voltage is a ground voltage.

[0011] In an embodiment of the present application, the detection circuit is arranged in a data driving circuit, the data driving circuit is used to output data signals for image display to the pixel units, and the first driving voltage cooperates with the data signals to drive the pixel units to perform image display.

[0012] In an embodiment of the present application, the display panel further comprises a scan driving circuit, the scan driving circuit is arranged between the detection circuit and the power supply circuit and adjacent to the non-display area of the display area, the scan driving circuit is used to provide a scan signal and a compensation detection scan signal, the scan signal is used to control the time when the data signal is provided to the pixel units, and the compensation detection scan signal is used to control the time when the detection signal is output from the detection signal line to the pixel units.

[0013] In an embodiment of the present application, the scan driving circuit does not simultaneously output the scan signal and the compensation detection scan signal.

[0014] In an embodiment of the present application, the display panel further comprises a timing control circuit, which is configured to receive image data, encode and decode the image data, and transmit the encoded and decoded image data to the pixel units. The timing control circuit receives the detection signal from the detection circuit, and outputs the compensation signal for compensating the pixel units according to the detection signal.

[0015] In an embodiment of the present application, the display area comprises a×b display sub-areas arranged in a matrix, wherein each display sub-area is connected to one detection signal line and one first power supply line, and all the display sub-areas are connected to the power supply circuit through a×b first power supply lines, and connected to the detection circuit through a×b detection signal lines.

[0016] In an embodiment of the present application, the power supply circuit and the data driving circuit are arranged on opposite sides of the display area.

[0017] In a second aspect, the present application provides a display module, wherein the display module comprises the display panel as described above, and further comprises a first circuit board and a second circuit board. The first circuit board is electrically connected to the display panel and the second circuit board. The second circuit board is configured to receive a display signal provided by an external display device, and output a data signal, a control signal and a power supply signal to the first circuit board correspondingly. The first circuit board is configured to receive the data signal and the control signal provided by the second circuit board, and transmit the data signal and the control signal to the pixel units correspondingly.

[0018] In an embodiment of the present application, the first circuit board is a driving circuit board, which comprises a plurality of data driving circuits and a memory. The first circuit board is connected to the display panel through a chip on film (COF). The data driving circuits are connected to the pixel units through data lines. The second circuit board is a control circuit board, which comprises a power management circuit and a timing control circuit.

[0019] In an embodiment of the present application, the first circuit board and the second circuit board are connected through a flexible wire, so as to control the rotation of the second circuit board relative to the first circuit board and fix the second circuit board to the display panel.

[0020] In a third aspect, the present application provides a display device, which comprises a frame and a display module as described above. The display panel is fixed in the frame.

[0021] Compared with the prior art, the display area is divided into multiple display sub-areas, and the same display sub-area is connected to the same detection signal line and the first power line, thereby effectively improving the carrying capacity of the detection signal line and the first power line, effectively improving the impedance effect of the detection signal line and the first power line, improving the uniformity and accuracy of image display of each pixel unit in the display area, and ensuring better image display effect. BRIEF DESCRIPTION OF DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0023] FIG. 1 is a structural schematic diagram of a display device according to an embodiment of the present application;

[0024] FIG. 2 is a functional module schematic diagram of the display device shown in FIG. 1;

[0025] FIG. 3 is a planar layout structural schematic diagram of the display panel shown in FIG. 2 in a comparative embodiment of the present application;

[0026] FIG. 4 is an equivalent circuit schematic diagram of any one pixel unit shown in FIG. 3;

[0027] FIG. 5 is a layout structural schematic diagram of part of the display area shown in FIG. 3;

[0028] FIG. 6 is an image display effect diagram of the display panel shown in FIG. 3;

[0029] FIG. 7 is a planar layout structural schematic diagram of the display panel shown in FIG. 3 in a first embodiment of the present application;

[0030] FIG. 8 is a layout structural schematic diagram of the pixel unit in any one display sub-area shown in FIG. 7;

[0031] FIG. 9 is an image display effect diagram of the display panel shown in FIG. 7;

[0032] FIG. 10 is a layout structural schematic diagram of the pixel unit shown in FIG. 7 in a second embodiment of the present application.

[0033] Explanation of reference numerals: display device-100, display panel-10, display panel-20, frame-30, display area-10a, non-display area-10b, first circuit board-31, second circuit board-32, n data lines-D1-Dn, m scan lines-G1-Gm, m compensation scan lines-Gc1-Gcm, n detection signal lines-T1-Tn, detection signal line-T a×b, n first power lines - ELVDD1 ~ ELVDDn, first power line - ELVDD a×b , second power line - ELVSS, first direction - X, second direction - Y, timing control circuit - 500, data driving circuit - 400, scan driving circuit - 300, power management circuit - 600, power supply circuit - 700, detection circuit - 800, driving current - Ids, pixel unit - P, red sub-pixel - R, white sub-pixel - W, green sub-pixel - G, blue sub-pixel - B, the i-th scan line - Gi, the i-th compensation scan line - Gci, the j-th data line - Dj, the j-th detection signal line - Tj, the j-th first power line - ELVDDj, storage capacitor - C1, control switch tube - M2, first control end - M20, first conductive end - M21, second conductive end - M22, driving switch tube - M1, second control end - M10, third conductive end - M13, fourth conductive end - M14, first power end - VDD, second power end - VSS, control node - N1, driving node - N2, light emitting element - OLED, detection switch tube - M3, third control end - M30, fifth conductive end - M35, sixth conductive end - M36, display sub-region - Psub, data signal - Data. DETAILED DESCRIPTION

[0034] For the purpose of facilitating the understanding of the present application, the present application will be described in more detail below with reference to the related drawings. The preferred embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0035] The following description of the embodiments is provided with reference to the accompanying drawings, which illustrate specific embodiments in which the present application can be implemented. The serial numbers of the components in the text, such as "first", "second", etc., are only used to distinguish the described objects and do not have any sequential or technical meaning. The "connection" and "coupling" mentioned in the present application, unless otherwise specified, include direct and indirect connections (couplings). The direction terms mentioned in the present application, such as "up", "down", "front", "back", "left", "right", "inside", "outside", "side" and the like, are only with reference to the direction of the accompanying drawings. Therefore, the direction terms used are for better and clearer illustration and understanding of the present application, and are not intended to indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0036] In the description of the present application, it should be noted that unless specifically defined and limited otherwise, the terms "mounting", "connected", "connection" should be interpreted broadly, for example, can be fixedly connected, can be detachably connected, or integrally connected; can be mechanically connected; can be directly connected, or indirectly connected through an intermediate medium; can be the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances. It should be noted that the terms "first", "second" and the like in the specification and claims of the present application and the drawings are used to distinguish different objects, and are not used to describe a specific order.

[0037] In addition, the terms "including", "may include", "including" or "may include" used in the present application represent the existence of the corresponding functions, operations, elements, etc. disclosed, and do not limit other one or more functions, operations, elements, etc. In addition, the term "including" or "including" means the existence of the corresponding features, numbers, steps, operations, elements, components or combinations thereof disclosed in the specification, and does not exclude the existence or addition of one or more other features, numbers, steps, operations, elements, components or combinations thereof, and is intended to cover non-exclusive inclusion. In addition, when describing the embodiments of the present application, "may" is used to represent "one or more embodiments of the present application". And the term "exemplary" is intended to refer to an example or illustration.

[0038] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terms used in the specification of the present application are only for the purpose of describing the specific embodiments of the present application, and are not intended to limit the present application.

[0039] Please refer to FIG. 1, which is a structural schematic diagram of a display device provided by the embodiment.

[0040] As shown in FIG. 1, the display device 100 includes a display panel 10 and a frame 30, the display panel 10 is fixed to the frame 30, and the frame 30 provides fixing and supporting functions for the display panel 10. In other embodiments of the present application, when the display device 100 is a portable electronic device, such as a mobile phone, a tablet computer, etc., the display device 100 does not need to be provided with a supporting frame.

[0041] Please refer to FIG. 2, which is a functional module diagram of the display device 100 shown in FIG. 1. As shown in FIG. 2, the display device 100 includes the display panel 10, the first circuit board 31, and the second circuit board 32. The first circuit board 31 is electrically connected with the display panel 10 and the second circuit board 32. The first circuit board 31 can be connected with the display panel 10 through a flexible conductive wire or a flexible conductive film, so that the first circuit board 31 can be rotated or turned relative to the display panel 10 and fixed on the display panel 10. Correspondingly, the first circuit board 31 is also connected with the second circuit board 32 through a flexible conductive wire, so that the second circuit board 32 can be rotated relative to the first circuit board 31 and fixed on the display panel 10.

[0042] In the embodiment, the first circuit board 31 is a driving circuit board (X-board), and the second circuit board 32 is a control circuit board (C-board). The first circuit board 31 and the second circuit board 32 can be a driving circuit board (X-board) or a control circuit board (C-board) alone, or can be integrated with a driving circuit board (X-board) and a control circuit board (C-board).

[0043] The second circuit board 32 as a control circuit board (C-board) mainly includes a power management circuit 600 (PMIC), a timing control circuit 500 (TCON), etc. The second circuit board 32 is mainly used for receiving a display signal provided by an external image display, and corresponding output of a data signal, a control signal, and a power signal. In the embodiment, the timing control circuit 500 is also connected with an image processing module (GPU), and obtains image data to be displayed by the image processing module, and transmits the image data to pixel units in a display area of the display panel 10 after coding and decoding processing to perform corresponding image display. It can be understood that the image processing module is arranged in a host device independent of the display device 100, for example, the image processing module is arranged in a host computer, or the image processing module can also be arranged in the display device 100.

[0044] The first circuit board 31 as a driving circuit board (X-board) is mainly used for receiving a data signal and a control signal provided by the second circuit board 32, and transmitting the data signal and the control signal to a plurality of data driving chips (data driving circuit). In the embodiment, the first circuit board 31 includes a memory (not shown in the figure), and the first circuit board 31 is connected to the display panel 10 through a chip on flex (COF), and the data driving chip is arranged on the chip on flex. The data driving chip is connected with the pixel unit P (FIG. 3) through a data line (FIG. 3) to transmit the data signal to the pixel unit P for image display.

[0045] The display panel 10 further comprises a scan driving circuit 300, wherein the scan driving circuit 300 is connected to the timing control circuit 500 through corresponding signal lines.

[0046] Referring to FIG. 3, which is a schematic diagram of a planar layout structure of the display panel shown in FIG. 2 according to a comparative embodiment of the present application. As shown in FIG. 3, the display area 10a of the display panel 10 comprises a plurality of m*n pixel units P arranged in a matrix, n data lines D1-Dn, n detection signal lines T1-Tn, n first power lines ELVDD1-ELVDDn, m scan lines G1-Gm, and m compensation scan lines Gc1-Gcm, wherein m and n are natural numbers greater than 1.

[0047] The m scan lines G1-Gm extend along a first direction X and are parallel and insulated from each other along a second direction Y, and are configured to output scan signals to the pixel units P.

[0048] The n data lines D1-Dn extend along the second direction Y and are parallel and insulated from each other along the first direction X, and the first direction X is perpendicular to the second direction Y. Correspondingly, the n detection signal lines T1-Tn extend along the second direction Y and are parallel and insulated from each other along the first direction X, and the n data lines D1-Dn and the n detection signal lines T1-Tn are also insulated from each other. It should be noted that in the present embodiment, one detection signal line is provided for one pixel unit.

[0049] The non-display area 10b of the display panel 10 can be provided with functional circuits for driving the pixel units P to display images and signal lines. The display device 100 further comprises a power management circuit 600, a timing control circuit 500, a data driving circuit 400, a power supply circuit 700, a detection circuit 800, and a scan driving circuit 300 provided in the display panel 10, wherein the scan driving circuit 300 is provided in the non-display area 10b of the display panel 10, and the timing control circuit 500 and the data driving circuit 400 are provided on a circuit board and are electrically connected to the display area 10a through signal lines for signal transmission.

[0050] The timing control circuit 500 is electrically connected to the data driving circuit 400 and the scan driving circuit 300, and is configured to control the working timing of the data driving circuit 400 and the scan driving circuit 300, i.e., output corresponding timing control signals to the data driving circuit 400 and the scan driving circuit 300, so as to control when the scan driving circuit 300 outputs corresponding scan signals and control when the data driving circuit 400 outputs corresponding data signals Data.

[0051] The data driving circuit 400 is electrically connected with the n data lines D1-Dn, and is configured to transmit the data signal Data to be displayed to the plurality of pixel units P in the form of data voltage through the n data lines D1-Dn.

[0052] The scan driving circuit 300 is electrically connected with the m scan lines G1-Gm, and is configured to output the scan signal to the pixel units P through the m scan lines G1-Gm to control when the pixel units P receive the data signal Data. In this embodiment, the scan driving circuit 300 outputs the scan signal from the scan lines G1, G2, …, Gm in turn according to the scan period in the order of position arrangement.

[0053] In this embodiment, the m compensation scan lines Gc1-Gcm are configured to output the compensation detection scan signal, and the compensation detection scan signal is configured to control the pixel units P to perform data compensation. In this embodiment, the compensation detection scan signal works in the idle period between the display periods of two adjacent frames of images, that is, the compensation detection scan signal is output by the m compensation scan lines Gc1-Gcm in the period when the m scan lines G1-Gm do not output the scan signal, in other words, the scan signal and the compensation detection scan signal are not output to the pixel units P at the same time. In this embodiment, the compensation detection scan signal is also a pulse signal, and the pulse duration of the compensation detection scan signal is less than the pulse duration of the scan signal. It can be understood that, in this embodiment, the m compensation scan lines Gc1-Gcm are connected to the scan driving circuit 300, and the plurality of compensation detection scan signals are output by the scan driving circuit 300. Of course, in other embodiments, the m compensation scan lines Gc1-Gcm can be independent of other pulse signal output modules of the scan driving circuit 300, and the plurality of compensation detection scan signals are output by the other pulse signal output modules. In this embodiment, the pulse of the compensation detection scan signal is low.

[0054] The power management circuit 600 is configured to convert the power signal provided by the power supply end into a data driving voltage to drive the data driving circuit 400. At the same time, the power management circuit 600 is also configured to generate a plurality of driving voltages to be provided to the scan driving circuit 300 and each pixel unit P in the display area 10a of the display panel 10. In this embodiment, the power management circuit 600 outputs the power signal to the power supply circuit 700.

[0055] The power supply circuit 700 is connected to the power management circuit 600, and is configured to provide the first driving voltage and the second driving voltage to the plurality of pixel units P through the n first power lines ELVDD1-ELVDDn according to the power signal provided by the power management circuit 600.

[0056] The detection circuit 800 is connected to the n detection signal lines T1-Tn, and is configured to detect the driving current Ids of the pixel unit P through the n detection signal lines T1-Tn to obtain a corresponding detection signal after the pixel unit P receives the compensation detection scanning signal. In this embodiment, the detection circuit 800 is arranged in the data driving circuit 400. Of course, in other embodiments, the n detection signal lines T1-Tn and the detection circuit 800 can be independent of the data driving circuit 400, and can be directly connected to the timing control circuit 500.

[0057] In this embodiment, the detection circuit 800 and the power supply circuit 700 are arranged in the non-display area 10b on opposite sides of the display area 10a, and the scan driving circuit 300 is arranged in the non-display area 10b between the detection circuit 800 and the power supply circuit 700.

[0058] Referring to FIG. 4, FIG. 4 is a schematic diagram of an equivalent circuit of any one of the pixel units shown in FIG. 3. As shown in FIG. 4, the pixel unit P is any one of the pixel units arranged in the array of the display panel 10 shown in FIG. 3, and includes a driving switch tube M1, a control switch tube M2, a detection switch tube M3, and a storage capacitor C1.

[0059] The control switch tube M2 includes a first control end M20, a first conductive end M21, and a second conductive end M22. The first control end M20 is connected to the ith scanning line Gi, the first conductive end M21 is connected to the jth data line Dj, and the second conductive end M22 is connected to the control node N1. The voltage received by the first control end M20 is used to control the conduction or cutoff of the control switch tube M2. It can be understood that i is a positive integer less than or equal to m, and j is a positive integer less than or equal to n.

[0060] In this embodiment, the control switch tube M2 is a thin film transistor (TFT), in which the gate of the transistor serves as the first control end M20, or the gate of the transistor is directly connected to the first control end M20, the source of the transistor serves as the first conductive end M21, or the source of the transistor is directly connected to the first conductive end M21, and the drain of the transistor serves as the second conductive end M22, or the drain of the transistor is directly connected to the second conductive end M22. Under the control of the scanning signal output by the ith scanning line Gi, the turned-on control switch tube M2 receives the data signal from the jth data line Dj and transmits it to the control node N1.

[0061] The driving switch tube M1 includes a second control terminal M10, a third conductive terminal M13 and a fourth conductive terminal M14. The second control terminal M10 is connected to the control node N1, the third conductive terminal M13 is connected to the first power supply terminal VDD, and the fourth conductive terminal M14 is connected to the anode of the light emitting element OLED through the driving node N2. The voltage received by the second control terminal M10 is used to control the on or off of the driving switch tube M1. In this embodiment, the driving switch tube M1 is controlled to be on or off according to the voltage of the control node N1. In this embodiment, the cathode of the light emitting element OLED is connected to the second power supply terminal VSS. In this embodiment, the second power supply terminal VSS can be a ground terminal (GND), that is, the second power supply terminal VSS provides a ground voltage for the light emitting element OLED. It should be noted that the first power supply terminal VDD can receive a first driving voltage from the first power supply line ELVDD, and the second power supply terminal VSS can receive a second driving voltage from the second power supply line ELVSS.

[0062] In this embodiment, the driving switch tube M1 is a thin film transistor TFT. The gate of the transistor serves as the second control terminal M10, or the gate of the transistor is directly connected to the second control terminal M10. The drain of the transistor serves as the third conductive terminal M13, or the drain of the transistor is directly connected to the third conductive terminal M13. The source of the transistor serves as the fourth conductive terminal M14, or the source of the transistor is directly connected to the fourth conductive terminal M14. Under the voltage control of the control node N1, the driving switch tube M1 is in an on or off state. The driving switch tube M1 in the on state outputs a corresponding driving current Ids to the light emitting element OLED under the control of the control node N1 according to the power supply voltage provided by the first power supply terminal VDD. It can be understood that the driving current Ids is the source-drain current flowing through the driving switch tube M1.

[0063] The storage capacitor C1 is connected between the control node N1 and the first power supply terminal VDD, and is used to store the data voltage corresponding to the data signal transmitted from the control switch tube M2 to the control node N1, and maintain the data voltage to support the on state of the control driving switch tube M1 and control the size of the driving current Ids provided by the driving switch tube M1 for the light emitting element OLED.

[0064] The detection switch tube M3 includes a third control terminal M30, a fifth conductive terminal M35 and a sixth conductive terminal M36. The third control terminal M30 is connected to the ith compensation scan line Gci. The fifth conductive terminal M35 is connected to the detection circuit 800 through the jth detection signal line Tj. The sixth conductive terminal M36 is connected to the anode of the light emitting element OLED through the driving node N2. The detection scan signal received by the third control terminal M30 is used to control the on or off of the detection switch tube M3. In this embodiment, the detection switch tube M3 is controlled to be on or off according to the scan detection signal provided by the ith compensation scan line Gci. In this embodiment, the detection switch tube M3 is used to detect the driving current Ids flowing through the light emitting element OLED. It can be understood that the driving current Ids can accurately represent the source-drain current of the driving switch tube M1, and further accurately represent the threshold voltage Vth drift of the driving switch tube M1. Therefore, the detection signal and the compensation signal obtained by detecting the driving current Ids can accurately perform data compensation.

[0065] In this embodiment, the detection switch tube M3 is a thin film transistor TFT. The gate of the transistor is used as the third control terminal M30, or the gate of the transistor is directly connected to the third control terminal M30. The drain of the transistor is used as the fifth conductive terminal M35, or the drain of the transistor is directly connected to the fifth conductive terminal M35. The source of the transistor is used as the sixth conductive terminal M36, or the source of the transistor is directly connected to the sixth conductive terminal M36.

[0066] In this embodiment, the driving switch tube M1, the control switch tube M2 and the detection switch tube M3 are N-type thin film transistors. Of course, in other embodiments of the present application, the driving switch tube M1, the control switch tube M2 and the detection switch tube M3 are P-type thin film transistors.

[0067] In this embodiment, the pixel unit P displays images by using the light emitting element OLED. That is, the display medium in the pixel unit P in this embodiment is an organic light emitting material.

[0068] Referring to FIG. 5, FIG. 5 is a schematic diagram of the layout structure of the partial display area shown in FIG. 3.

[0069] As shown in FIG. 5, each pixel unit P includes a plurality of sub-pixels. In this embodiment, each pixel unit P includes four sub-pixels, which can be red sub-pixels R, white sub-pixels W, green sub-pixels G and blue sub-pixels B. Each sub-pixel is connected to the jth detection signal line Tj. At the same time, each pixel unit P is also connected to the same first power supply line. It can be understood that each first power supply line is connected to the power supply circuit 700 providing the first driving voltage.

[0070] In this way, in the image display stage, each pixel unit P needs to perform current detection and compensation, and the time length of detection and compensation can be more than 30-60 minutes. Obviously, long time threshold voltage Vth detection will affect the service life of the driving tube, and the setting of the jth detection signal line Tj and the jth first power supply line ELVDDj will easily complicate the display area wiring and limit the wiring space, and even affect the resolution of each pixel unit. In addition, the number of pixel units connected by the jth detection signal line Tj and the jth first power supply line ELVDDj is large, which causes the jth detection signal line Tj and the jth first power supply line ELVDDj to be heavily loaded, and the jth detection signal line Tj and the jth first power supply line ELVDDj in the area far from the data driving circuit and the light emitting driving circuit are affected by impedance effect (IR drop), which further causes the pixel units in different areas in the display area to have poor uniformity when displaying images, and present the stripes as shown in FIG. 6, where FIG. 6 is an image display effect diagram of the display panel 10 shown in FIG. 3.

[0071] Please refer to FIG. 7, which is a planar layout structure schematic diagram of the display panel shown in FIG. 3 in the first embodiment of the present application. In the present embodiment, the display panel 20 shown in FIG. 7 has basically the same planar layout structure schematic diagram as the display panel 10 shown in FIG. 3, and the display area 10a includes a×b display sub-areas Psub arranged in a matrix, and each display sub-area Psub includes a plurality of pixel units. That is, the display area 10a includes a×b display sub-areas Psub arranged in a row and a column.

[0072] As shown in FIG. 7, in the present embodiment, the power supply circuit 700 and the data driving circuit 400 are arranged on opposite sides of the display area 10a, that is, the power supply circuit 700 and the data driving circuit 400 are arranged on opposite sides of the display area 10a along the second direction Y, or in other words, the power supply circuit 700 and the data driving circuit 400 are arranged on the upper and lower sides of the display area 10a.

[0073] In the present embodiment, the pixel units P in each display sub-area Psub are connected to one detection signal line and one first power supply line. Thus, for the power supply circuit 700, the direction extending along the second direction Y from the a row to the 1 row is connected to all the pixel units P in the display sub-area Psub through the first power supply line ELVDD, that is, all the pixel units in each display sub-area Psub are connected to the power supply circuit 700 through one first power supply line ELVDD. In the present embodiment, the pixel units P in each display sub-area Psub are connected to a×b first power supply lines ELVDD1-ELVDD1 a×b to the power supply circuit 700.

[0074] For the data driving circuit 400, the direction extending along the second direction Y from the first row to the a-th row is connected to all the pixel units P in the display sub-region Psub through the detection signal line, that is, all the pixel units in each display sub-region Psub are connected to the detection circuit 800 through one detection signal line. In the embodiment, the pixel units P in each display sub-region Psub are connected to a total of a x b detection signal lines T1-Ta x b. a×b connected to the detection circuit 800.

[0075] Specifically, referring to FIG. 8, which is a layout structure diagram of the pixel units in any one display sub-region Psub shown in FIG. 7. As shown in FIG. 8, the sub-pixels in each pixel unit P in the display sub-region Psub are connected to the same detection signal line, so that each sub-pixel in each pixel unit P in the display sub-region Psub outputs a corresponding driving current Idsto the detection circuit 800 through the detection signal line, so as to obtain the average driving current Idsof the plurality of pixel units P in the display sub-region Psub, and thus determine the compensation signal corresponding to the plurality of pixel units P in the display sub-region Psub.

[0076] Meanwhile, the plurality of pixel units P are connected to the same first power line ELVDD, so that all the sub-pixels in the pixel units P in the display sub-region Psub obtain the first driving voltage from the power supply circuit 700 through the first power line ELVDD, so as to obtain the driving power for driving.

[0077] In the embodiment, the display region 10a is not connected to different detection signal lines for each pixel unit P, but the sub-pixels in all the pixel units P in one display sub-region Psub are connected to the same detection signal line, so as to effectively reduce the number of detection signal lines and reduce the detection and compensation time of each sub-pixel, thereby ensuring the safety and stability of the driving switch tube M1 in the pixel unit P. Meanwhile, the sub-pixels in all the pixel units P in each display sub-region Psub are connected to the same first power line ELVDD, so as to effectively reduce the number of first power lines ELVDD. Meanwhile, the number of pixel units P that need to be driven by the first power line ELVDD and the detection signal line is relatively small, so the load of the first power line ELVDD and the detection signal line is relatively small, thereby effectively reducing the IR drop, and thus effectively improving the image display effect of the pixel unit. As shown in FIG. 9, the image display uniformity in each display sub-region is better, thereby effectively improving the image display effect of the display panel 20. FIG. 9 is an image display effect diagram of the display panel 20 shown in FIG. 7.

[0078] Referring to FIG. 10, it is a layout structure diagram of the pixel unit shown in FIG. 7 in the second embodiment of the present application. As shown in FIG. 10, in the display area 10a, the area where the first power line ELVDDi is not arranged is provided with the second power line ELVSS, so as to improve the IR drop effect of the second power line ELVSS.

[0079] Specifically, as shown in FIG. 10, the second power line ELVSS is used to provide the second driving voltage, the first driving voltage cooperates with the second driving voltage to provide a conductive path for the light emitting element OLED in the pixel unit P, and the first driving voltage cooperates with the data signal Data to provide a driving current Ids of a corresponding size for the light emitting element OLED, so as to drive the pixel unit P to perform image display of a corresponding brightness. In the embodiment, the first driving voltage is a positive voltage, for example, 5V, which is greater than the second driving voltage, for example, a ground voltage of 0V.

[0080] It can be understood that the display panel 20 includes a substrate (not shown in the figure), the pixel unit P is arranged on the substrate, the first power line ELVDD is located in a preset layer structure of the display panel 20, part of the second power line ELVSS is arranged in the same layer as the first power line ELVDD, and the other part of the second power line ELVSS is arranged in a different layer from the first power line ELVDD. In other words, the previously arranged first power ELVDD is electrically disconnected with the power supply circuit 700, but is electrically connected with the second power line ELVDD by punching or forming an opening on the insulating layer, thereby effectively improving the carrying capacity of the second power line ELVDD corresponding to each pixel unit P and improving the IR drop effect of the second power line ELVSS.

[0081] In the embodiment, by partitioning the display area 10a to form a plurality of display sub-areas, and the same display sub-area is connected to the same detection signal line and the first power line, thereby effectively improving the carrying capacity of the detection signal line and the first power line, and effectively improving the IR drop effect of the detection signal line, the first power line and the second power line, improving the accuracy of the data signal and the driving current Ids provided for the light emitting element OLED in the pixel unit P, and ensuring the accuracy of image display.

[0082] It should be understood that the application of the present application is not limited to the above examples, and those skilled in the art can make improvements or changes according to the above description, and all these improvements and changes shall belong to the protection scope of the appended claims of the present application.

Claims

1. A display panel, a display area of the display panel comprising a plurality of display sub-areas arranged in an array, each display sub-area comprising a plurality of pixel units, the pixel units being configured to perform image display, characterized in that, All pixel units in each display sub-region are connected to the same detection signal line, and all pixel units in each display sub-region are connected to the same first power supply line, wherein the detection signal line is used for detecting the driving current of the pixel unit and correspondingly outputting a detection signal, the detection signal is used for providing a data signal for compensation for the pixel unit, and the first power supply line is used for providing a power supply for image display driving of the pixel unit.

2. The display panel of claim 1, wherein, The display panel further comprises a detection circuit and a power supply circuit, the detection circuit and the power supply circuit are respectively arranged in the non-display area on opposite sides of the display area, the detection circuit is connected to each display sub-region through a plurality of detection signal lines, and the detection signal lines transmit the detection signals obtained by detection to the detection circuit to obtain corresponding compensation signals, the compensation signals are used for compensating the data signals of the pixel units; The power supply circuit is connected to all pixel units in each display sub-region through the first power supply line, and the power supply circuit is used for outputting a first driving voltage to the pixel units, and the first driving voltage is used for driving the pixel units to perform image display.

3. The display panel of claim 2, wherein, The display panel further comprises a plurality of second power supply lines, the second power supply lines are used for providing a second driving voltage, and the first driving voltage and the second driving voltage cooperate to provide a driving current for the pixel units, wherein the first driving voltage is greater than the second driving voltage.

4. The display panel of claim 3, wherein, The display panel comprises a substrate, the pixel units are arranged on the substrate, the first power supply line is located in a preset layer of the display panel, and part of the second power supply lines are arranged in the same layer as the first power supply line, and part of the second power supply lines are arranged in different layers from the first power supply line.

5. The display panel of claim 4, wherein, The first driving voltage is a power supply voltage, and the second driving voltage is a ground voltage.

6. The display panel of any of claims 2-5, wherein, The detection circuit is arranged in a data driving circuit, the data driving circuit is used for outputting a data signal for image display to the pixel units, and the first driving voltage cooperates with the data signal to drive the pixel units to perform image display.

7. The display panel of claim 6, wherein, The display panel further comprises a scan driving circuit, the scan driving circuit is arranged between the detection circuit and the power supply circuit and adjacent to the non-display area of the display area, the scan driving circuit is used for providing a scan signal and a compensation detection scan signal, the scan signal is used for controlling the time when the data signal is provided to the pixel units, and the compensation detection scan signal is used for controlling the time when the detection signal is output from the detection signal line to the pixel units.

8. The display panel of claim 7, wherein, The scan driving circuit does not simultaneously output the scan signal and the compensation detection scan signal.

9. The display panel of claim 8, wherein, The display panel further comprises a timing control circuit, the timing control circuit is used for receiving image data and transmitting the image data to the pixel units after coding and decoding processing, and the timing control circuit receives the detection signal from the detection circuit and outputs the compensation signal for compensating the pixel units according to the detection signal.

10. The display panel of claim 6, wherein, The display region comprises a×b display sub-regions arranged in a matrix, wherein each display sub-region is connected to a detection signal line and a first power supply line, and all the display sub-regions are connected to the power supply circuit through a×b first power supply lines and connected to the detection circuit through a×b detection signal lines.

11. The display panel of claim 10, wherein, The power supply circuit and the data driving circuit are respectively arranged on opposite sides of the display region.

12. A display module, wherein, The display module comprises the display panel according to any one of claims 1-11, and further comprises a first circuit board and a second circuit board, the first circuit board is electrically connected with the display panel and the second circuit board, the second circuit board is used for receiving display signals for image display provided by the display device outside, and correspondingly outputs data signals, control signals and power supply signals to the first circuit board, and the first circuit board is used for receiving the data signals and the control signals provided by the second circuit board and correspondingly transmitting to the pixel unit.

13. The display module of claim 12, wherein, The first circuit board is a driving circuit board, comprising a plurality of data driving circuits and a memory, the first circuit board is connected to the display panel through a chip on film, and the data driving circuit is connected to the pixel unit through a data line; the second circuit board is a control circuit board, and the second circuit board comprises a power management circuit and a timing control circuit.

14. The display module of claim 13, wherein, The first circuit board and the second circuit board are connected through flexible wires to control the second circuit board to rotate relative to the first circuit board and be fixed to the display panel.

15. A display device, wherein, The display device comprises a frame and the display module according to claim 14, and the display panel is fixed in the frame.

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