Communication method and communication apparatus

Abstract

The present application discloses a communication method and a communication apparatus. The method comprises: a sending end performing layered coding on a first input bit, wherein the layered coding comprises coding a first layer and coding at least one second layer, the first layer corresponds to a first coding mode, one of the at least one second layer corresponds to a second coding mode or is not coded, and all or part of the first input bit is an amplitude symbol sequence output by a distribution matcher, a first check bit obtained by coding of the first layer is used as a first symbol bit, the amplitude symbol sequence comprises a first amplitude symbol, and the layered coding further comprises: when the first symbol bit is a first value, adjusting a value of one or more bits at the at least one second layer; and on the basis of a layered coded modulation constellation diagram, mapping an output bit obtained by performing layered coding. The performance gain caused by probabilistic amplitude shaping is maintained, and the advantage of layered coded modulation of reducing the decoding complexity is also achieved.

Description

Communication method and communication apparatus

[0001] This application claims priority to the Chinese patent application No. 202410881578.6, filed on July 2, 2024, with the State Intellectual Property Office of China, and the Chinese patent application No. 202410881578.6 has the title of “Communication method and communication apparatus”, the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] The present application relates to the field of communication, and in particular to a communication method and a communication apparatus. BACKGROUND

[0003] Traditional modulation methods include quadrature amplitude modulation (QAM), phase-shift keying (PSK), frequency-shift keying (FSK), etc. Under the traditional modulation method, the probability of each constellation point in the constellation diagram is the same, i.e., each constellation point has the same probability. This means that the outer constellation points with higher amplitudes have the same probability as the inner constellation points with lower amplitudes. The amplitudes of the outer constellation points are large, which requires high power, while the amplitudes of the inner constellation points are small, which requires low power. The average power of the signal directly affects the nonlinearity of the system, and in turn affects the system performance. In order to improve the system performance (e.g., reduce the bit error rate), the transmitter can reduce the probability of the outer constellation points appearing when modulating the bit stream, i.e., use fewer outer constellation points and increase the probability of the inner constellation points appearing, i.e., use more inner constellation points. The probabilistic shaping (PS) technology is based on this idea. Compared with the traditional modulation method, the probabilistic shaping technology can further approach the Shannon limit, and the theoretical proof shows that the improvement space of the probabilistic shaping is 1.53 dB.

[0004] Probabilistic amplitude shaping (PAS) is a kind of probability shaping technology. The workflow of the existing probabilistic amplitude shaping technology is as follows: a distribution matcher (DM) converts an input bit stream with a 0, 1 equiprobable distribution into an amplitude symbol sequence with a given probability distribution; the amplitude symbol sequence is converted into a bit sequence, and then the bit sequence is input into an encoder to obtain a parity bit sequence; 0 / 1 in the parity bit sequence is mapped into a symbol bit of + / -1, and is combined with the amplitude symbol sequence obtained before to form a bit sequence to be mapped by a constellation diagram. By using the existing probabilistic amplitude shaping technology, the bit sequence formed by the symbol bit and the amplitude symbol sequence is suitable for being mapped by a traditional Gray constellation diagram, and is not suitable for being mapped by a hierarchical coded modulation constellation diagram. Therefore, it is necessary to study a probabilistic amplitude shaping technology suitable for a hierarchical coded modulation constellation diagram. SUMMARY

[0005] Embodiments of the present application disclose a communication method and a communication device, so that the bit sequence formed by the symbol bit and the amplitude symbol sequence is suitable for being mapped by using the hierarchical coded modulation constellation diagram, the performance gain brought by the probabilistic amplitude shaping is maintained, and the advantage of reducing the decoding complexity of the hierarchical coded modulation is also possessed.

[0006] In a first aspect, an embodiment of the present application provides a communication method, which comprises: performing hierarchical coding on a first input bit by a sending end, wherein the hierarchical coding comprises coding of a first layer and coding of at least one second layer, the first layer corresponds to a first coding mode, one layer of the at least one second layer corresponds to a second coding mode or is not coded, and all or part of the first input bit is an amplitude symbol sequence output by a distribution matcher; wherein a first check bit obtained by coding of the first layer is a first symbol bit, the amplitude symbol sequence comprises a first amplitude symbol, the first amplitude symbol corresponds to an I path, the first check bit corresponds to the I path, or the first amplitude symbol corresponds to a Q path, and the first check bit corresponds to the Q path; the hierarchical coding further comprises: when the first symbol bit takes a first value, adjusting values of one or more bits of the at least one second layer, and when the first symbol bit takes a second value, the values of the one or more bits remain unchanged, the one or more bits comprise part of bits obtained by processing the first amplitude symbol by the second coding mode, and / or the one or more bits comprise part of bits in the first amplitude symbol and correspond to a layer that is not coded; and mapping output bits of the hierarchical coding based on a hierarchical coded modulation constellation diagram.

[0007] In the embodiments of the present application, the sending end performs hierarchical encoding on the first input bit, and when the first symbol bit takes a first value, the value of one or more bits of at least one second layer is adjusted; the probability distribution of the adjusted amplitude symbol sequence can satisfy the axisymmetric feature; the performance gain brought by the probability amplitude shaping is maintained, and meanwhile the advantage of reducing decoding complexity of hierarchical encoding modulation is also possessed.

[0008] In the second aspect, the embodiments of the present application provide another communication method, which comprises: a receiving end receives a first signal, the first signal corresponds to a first modulation symbol, the first modulation symbol is obtained by mapping output bits of hierarchical encoding performed by a sending end, the output bits are obtained by performing the hierarchical encoding on first input bits, wherein the hierarchical encoding comprises encoding of a first layer and encoding of at least one second layer, the first layer corresponds to a first encoding mode, one layer of the at least one second layer corresponds to a second encoding mode or is not encoded, all or part of the first input bits are amplitude symbol sequences output by a distribution matcher; wherein a first check bit obtained by the encoding of the first layer is a first symbol bit, the amplitude symbol sequence comprises a first amplitude symbol, the first amplitude symbol corresponds to an I path, the first check bit corresponds to the I path, or the first amplitude symbol corresponds to a Q path, and the first check bit corresponds to the Q path; the hierarchical encoding further comprises: when the first symbol bit takes a first value, the value of one or more bits of the at least one second layer is adjusted, when the first symbol bit takes a second value, the values of all bits of the at least one second layer remain unchanged, the one or more bits comprise part of bits obtained by processing the first amplitude symbol by the second encoding mode, and / or the one or more bits comprise part of bits in the first amplitude symbol and the corresponding layer is not encoded.

[0009] In the embodiments of the present application, the hierarchical encoding comprises: when the first symbol bit takes a first value, the value of one or more bits of at least one second layer is adjusted; the probability distribution of the adjusted amplitude symbol sequence can satisfy the axisymmetric feature; the performance gain brought by the probability amplitude shaping is maintained, and meanwhile the advantage of reducing decoding complexity of hierarchical encoding modulation is also possessed.

[0010] In a possible implementation of the first aspect or the second aspect, the first amplitude symbol is a bit sequence including 2 bits, the at least one second layer includes only one layer and corresponds to no coding, the at least one second layer corresponds to a most significant bit (MSB) of the first amplitude symbol, and the first layer corresponds to a least significant bit (LSB) of the first amplitude symbol; or the first amplitude symbol in the sequence of amplitude symbols is a bit sequence including 3 bits, the at least one second layer includes only one layer and corresponds to no coding, the at least one second layer corresponds to a MSB and a second MSB of the first amplitude symbol, and the first layer corresponds to a LSB of the first amplitude symbol; and the one or more bits are the MSB of the first amplitude symbol corresponding to the at least one second layer.

[0011] In this implementation, the one or more bits are the MSB of the first amplitude symbol corresponding to the at least one second layer. When the first symbol bit takes the first value, the value of the MSB of the first amplitude symbol is adjusted, so that the probability distribution of the adjusted sequence of amplitude symbols satisfies the axial symmetry feature.

[0012] In a possible implementation of the first aspect or the second aspect, the first amplitude symbol is a bit sequence including 2 bits, the output bit of the hierarchical coding includes a first bit sequence, and the first bit sequence includes 3 bits; when the first symbol bit takes the second value, a MSB of the first bit sequence is a MSB of the first amplitude symbol, and when the first symbol bit takes the first value, the MSB of the first bit sequence is a MSB of the adjusted first amplitude symbol; a second MSB of the first bit sequence is the first symbol bit, and a LSB of the first bit sequence is a LSB of the first amplitude symbol.

[0013] In this implementation, when the first symbol bit takes the second value, the MSB of the first bit sequence is the MSB of the first amplitude symbol, and when the first symbol bit takes the first value, the MSB of the first bit sequence is the MSB of the adjusted first amplitude symbol, so that the probability distribution of the adjusted sequence of amplitude symbols satisfies the axial symmetry feature.

[0014] In a possible implementation of the first aspect or the second aspect, the first amplitude symbol is a bit sequence including 3 bits, the output bit of the hierarchical encoding is a first bit sequence, and the first bit sequence includes 4 bits; when the first symbol bit takes the second value, the MSB of the first bit sequence is the MSB of the first amplitude symbol, and when the first symbol bit takes the first value, the MSB of the first bit sequence is the MSB of the adjusted first amplitude symbol; the second MSB of the first bit sequence is the second MSB of the first amplitude symbol, the third MSB of the first bit sequence is the first symbol bit, and the LSB of the first bit sequence is the LSB of the first amplitude symbol.

[0015] In this implementation, when the first symbol bit takes the second value, the MSB of the first bit sequence is the MSB of the first amplitude symbol, and when the first symbol bit takes the first value, the MSB of the first bit sequence is the MSB of the adjusted first amplitude symbol, so that the probability distribution of the adjusted amplitude symbol sequence satisfies the axisymmetric feature.

[0016] In a possible implementation of the first aspect or the second aspect, the first input bit includes a first part and a second part, the first part is the amplitude symbol sequence output by the distribution matcher, and the second part includes a second bit sequence; the first amplitude symbol is a bit sequence including 3 bits; the at least one second layer includes a third layer and a fourth layer, the third layer corresponds to no encoding, and the fourth layer corresponds to the second encoding mode; the third layer corresponds to the MSB of the first amplitude symbol, and the fourth layer corresponds to the second MSB and the LSB of the first amplitude symbol; the input of the first layer is the second bit sequence, and the one or more bits are the MSB and the first bit of the first amplitude symbol; the first bit is a bit corresponding to the LSB of the first amplitude symbol, which is obtained by processing the second MSB and the LSB of the first amplitude symbol by using the second encoding mode.

[0017] In this implementation, the one or more bits are the MSB and the first bit of the first amplitude symbol. When the first symbol bit takes the first value, the values of the MSB and the first bit of the first amplitude symbol are adjusted, so that the probability distribution of the adjusted amplitude symbol sequence satisfies the axisymmetric feature.

[0018] In a possible implementation manner of the first aspect or the second aspect, the output bit of the hierarchical coding includes a first bit sequence, the first bit sequence includes 4 bits; when the first symbol bit takes the second value, the MSB of the first bit sequence is the MSB of the first amplitude symbol, the third MSB of the first bit sequence is the first bit; when the first symbol bit takes the first value, the MSB of the first bit sequence is the MSB of the adjusted first amplitude symbol, the third MSB of the first bit sequence is the adjusted first bit; the second MSB of the first bit sequence is a second bit, the LSB of the first bit sequence is the first symbol bit, and the second bit is a bit corresponding to the second MSB of the first amplitude symbol, which is obtained by processing the second MSB and the LSB of the first amplitude symbol by using the second encoding mode.

[0019] In the implementation manner, when the first symbol bit takes the first value, the MSB of the first bit sequence is the MSB of the adjusted first amplitude symbol, and the third MSB of the first bit sequence is the adjusted first bit, so that the probability distribution of the adjusted amplitude symbol sequence satisfies the axis symmetry feature.

[0020] In a third aspect, the embodiments of the present application provide another communication method, which comprises: a receiving end demodulating and decoding a first modulation symbol to obtain system bits corresponding to a first layer, first check bits corresponding to the first layer, second check bits corresponding to the first layer, and system bits corresponding to at least one second layer, wherein the demodulating comprises demodulating the first modulation symbol based on a hierarchical coding modulation constellation to obtain a third bit sequence corresponding to the first layer and fourth bit sequences respectively corresponding to one second layer, and the decoding comprises: the receiving end first decoding the third bit sequence to obtain the system bits corresponding to the first layer, the first check bits corresponding to the first layer, and the second check bits corresponding to the first layer, the first check bits corresponding to an I path, and the second check bits corresponding to a Q path; then, taking the first check bits as a first symbol bit, when the first symbol bit takes a first value, adjusting values of one or more third bits in the fourth bit sequence corresponding to at least one second layer, when the first symbol bit takes a second value, the values of the one or more third bits remain unchanged, and the one or more third bits correspond to the I path; taking the second check bits as a second symbol bit, when the second symbol bit takes a first value, adjusting values of one or more fourth bits in the fourth bit sequence corresponding to at least one second layer, when the second symbol bit takes a second value, the values of the one or more fourth bits remain unchanged, and the one or more fourth bits correspond to the Q path; and then decoding the fourth bit sequence corresponding to at least one second layer to obtain system bits corresponding to at least one second layer (optional). If the at least one second layer includes only one layer and corresponds to no coding, the fourth bit sequence corresponding to the at least one second layer is the system bits corresponding to the at least one second layer.

[0021] In the embodiments of the present application, demodulating the first modulation symbol based on the hierarchical coding modulation constellation can reduce the complexity of decoding.

[0022] In a possible implementation, the at least one second layer includes only one layer and corresponds to no coding, the at least one second layer corresponds to one fourth bit sequence including 2 bits, the one or more third bits are bits corresponding to the I path in the fourth bit sequence, and the one or more fourth bits are bits corresponding to the Q path in the fourth bit sequence.

[0023] In a possible implementation, the method further includes: obtaining, by the receiving end, a first amplitude symbol according to the system bits corresponding to the first layer and the system bits corresponding to the at least one second layer; wherein the system bits corresponding to the first layer include first system bits and second system bits, the first system bits correspond to the I path, and the second system bits correspond to the Q path; the first amplitude symbol corresponds to the I path; the MSB in the first amplitude symbol is a bit corresponding to the I path in the fourth bit sequence; and the LSB in the first amplitude symbol is the first system bit. Alternatively, the receiving end obtains a third amplitude symbol according to the system bits corresponding to the first layer and the system bits corresponding to the at least one second layer; wherein the system bits corresponding to the first layer include first system bits and second system bits, the first system bits correspond to the I path, and the second system bits correspond to the Q path; the highest bit to the lowest bit of the third amplitude symbol are, in sequence, a bit corresponding to the I path in the fourth bit sequence, a bit corresponding to the Q path in the fourth bit sequence, the first system bit, and the second system bit.

[0024] In a possible implementation, the at least one second layer includes only one layer and corresponds to no encoding; the at least one second layer corresponds to one fourth bit sequence including four bits; the one or more third bits are MSBs in the fourth bit sequence; and the one or more fourth bits are second MSBs in the fourth bit sequence. The MSBs and third MSBs in the fourth bit sequence correspond to the I path, and the second MSBs and LSBs in the fourth bit sequence correspond to the Q path.

[0025] In a possible implementation, the method further includes: obtaining, by the receiving end, a first amplitude symbol according to the system bits corresponding to the first layer and the system bits corresponding to the at least one second layer; wherein the system bits corresponding to the first layer include first system bits and second system bits, the first system bits correspond to the I path, and the second system bits correspond to the Q path; the first amplitude symbol corresponds to the I path; the MSB in the first amplitude symbol is a MSB in the fourth bit sequence; the second MSB in the first amplitude symbol is a third MSB in the fourth bit sequence; and the LSB in the first amplitude symbol is the first system bit. Alternatively, the receiving end obtains a third amplitude symbol according to the system bits corresponding to the first layer and the system bits corresponding to the at least one second layer; wherein the system bits corresponding to the first layer include first system bits and second system bits, the first system bits correspond to the I path, and the second system bits correspond to the Q path; the highest bit to the lowest bit of the third amplitude symbol are, in sequence, a MSB in the fourth bit sequence, a second MSB in the fourth bit sequence, a third MSB in the fourth bit sequence, a LSB in the fourth bit sequence, the first system bit, and the second system bit.

[0026] In a possible implementation, the at least one second layer includes a third layer and a fourth layer, the third layer corresponds to no coding, and the fourth layer corresponds to the second coding mode; the third layer corresponds to a fourth bit sequence including two bits, and the fourth layer corresponds to a fourth bit sequence including four bits; one or more third bits in the fourth bit sequence corresponding to the third layer are MSBs in the fourth bit sequence corresponding to the third layer, and one or more fourth bits in the fourth bit sequence corresponding to the third layer are LSBs in the fourth bit sequence corresponding to the third layer; one or more third bits in the fourth bit sequence corresponding to the fourth layer are third MSBs in the fourth bit sequence corresponding to the third layer, and one or more fourth bits in the fourth bit sequence corresponding to the fourth layer are LSBs in the fourth bit sequence corresponding to the third layer.

[0027] In a possible implementation, the method further includes: obtaining, by the receiving end, a first amplitude symbol according to the system bits corresponding to the at least one second layer; the system bits corresponding to the at least one second layer include system bits corresponding to the third layer and system bits corresponding to the fourth layer; the system bits corresponding to the third layer include a third system bit corresponding to I and a fourth system bit corresponding to Q; the system bits corresponding to the fourth layer are, in order from the lowest bit to the highest bit, a fifth system bit, a sixth system bit, a seventh system bit, and an eighth system bit; the first amplitude symbol corresponds to an I path; an MSB in the first amplitude symbol is the third system bit; a second MSB in the first amplitude symbol is the fifth system bit; and an LSB in the first amplitude symbol is the seventh system bit. Alternatively, obtaining, by the receiving end, a third amplitude symbol according to the system bits corresponding to the at least one second layer; the system bits corresponding to the at least one second layer include system bits corresponding to the third layer and system bits corresponding to the fourth layer; the system bits corresponding to the third layer include a third system bit corresponding to I and a fourth system bit corresponding to Q; the system bits corresponding to the fourth layer are, in order from the lowest bit to the highest bit, a fifth system bit, a sixth system bit, a seventh system bit, and an eighth system bit; and the highest bit to the lowest bit of the third amplitude symbol are, in order, the third system bit, the fourth system bit, the fifth system bit, the sixth system bit, the seventh system bit, and the eighth system bit.

[0028] In a fourth aspect, an embodiment of the present application provides a communication apparatus, which has functions of implementing the behaviors in the method embodiments of the first aspect. The communication apparatus can be a network device, or a component (for example, a processor, a chip, or a chip system, etc.) of the network device, or a logic module or software capable of implementing the functions of the network device in whole or in part. Alternatively, the communication apparatus can be a terminal device, or a component (for example, a processor, a chip, or a chip system, etc.) of the terminal device, or a logic module or software capable of implementing the functions of the terminal device in whole or in part. The functions of the communication apparatus can be implemented by hardware, or by hardware executing corresponding software, and the hardware or software includes one or more modules or units corresponding to the above functions. In a possible implementation, the communication apparatus includes a transceiver module and a processing module, where: the processing module is configured to perform hierarchical encoding on first input bits, where the hierarchical encoding includes encoding of a first layer and encoding of at least one second layer, the first layer corresponds to a first encoding manner, one of the at least one second layer corresponds to a second encoding manner or is not encoded, and all or part of the first input bits are amplitude symbol sequences output by a distribution matcher; the first layer, after being encoded, obtains first check bits as first symbol bits, the amplitude symbol sequences include a first amplitude symbol, the first amplitude symbol corresponds to an I path, the first check bits correspond to the I path, or the first amplitude symbol corresponds to a Q path, and the first check bits correspond to the Q path; the hierarchical encoding further includes: when the first symbol bits take a first value, adjusting values of one or more bits of the at least one second layer, and when the first symbol bits take a second value, the values of the one or more bits remain unchanged, the one or more bits include part of bits obtained by processing the first amplitude symbol by using the second encoding manner, and / or the one or more bits include part of bits in the first amplitude symbol and the corresponding layer is not encoded; and mapping output bits of the hierarchical encoding based on a hierarchical encoding modulation constellation.

[0029] Possible implementation manners of the communication apparatus of the fourth aspect can refer to the various possible implementation manners of the first aspect.

[0030] The technical effects brought by the various possible implementation manners of the fourth aspect can refer to the introduction of the technical effects of the various possible implementation manners of the first aspect.

[0031] In a fifth aspect, an embodiment of the present application provides a communication apparatus, which has functions of implementing the behaviors in the method embodiments of the second aspect. The communication apparatus can be a network device, or a component (for example, a processor, a chip, or a chip system, etc.) of the network device, or a logic module or software which can realize the functions of the whole or part of the network device. Alternatively, the communication apparatus can be a terminal device, or a component (for example, a processor, a chip, or a chip system, etc.) of the terminal device, or a logic module or software which can realize the functions of the whole or part of the terminal device. The functions of the communication apparatus can be realized by hardware, or by hardware executing corresponding software, and the hardware or software includes one or more modules or units corresponding to the above functions. In a possible implementation, the communication apparatus includes a transceiver module and a processing module, where: the transceiver module is configured to receive a first signal, the first signal corresponds to a first modulation symbol, the first modulation symbol is obtained by mapping output bits of hierarchical encoding at a sending end, and the output bits are obtained by performing the hierarchical encoding on first input bits, where the hierarchical encoding includes encoding of a first layer and encoding of at least one second layer, the first layer corresponds to a first encoding manner, one of the at least one second layer corresponds to a second encoding manner or no encoding, and all or part of the first input bits are amplitude symbol sequences output by a distribution matcher; where a first check bit obtained by performing the encoding on the first layer is used as a first symbol bit, the amplitude symbol sequences include a first amplitude symbol, the first amplitude symbol corresponds to an I path, the first check bit corresponds to the I path, or the first amplitude symbol corresponds to a Q path, and the first check bit corresponds to the Q path; the hierarchical encoding further includes: when the first symbol bit takes a first value, adjusting values of one or more bits of the at least one second layer, and when the first symbol bit takes a second value, keeping values of all bits of the at least one second layer unchanged, the one or more bits include part of bits obtained by processing the first amplitude symbol by using the second encoding manner, and / or the one or more bits include part of bits in the first amplitude symbol and the corresponding layer does not encode. The processing module is configured to parse the first signal.

[0032] Possible implementation manners of the communication apparatus of the fifth aspect can refer to the various possible implementation manners of the second aspect.

[0033] The technical effects brought by the various possible implementation manners of the fifth aspect can refer to the introduction of the technical effects of the various possible implementation manners of the second aspect.

[0034] In a sixth aspect, an embodiment of the present application provides a communication apparatus, which has functions of implementing the behaviors in the method embodiments of the third aspect. The communication apparatus can be a network device, or a component (for example, a processor, a chip, or a chip system, etc.) of the network device, or a logic module or software capable of implementing the functions of the network device in whole or in part. Alternatively, the communication apparatus can be a terminal device, or a component (for example, a processor, a chip, or a chip system, etc.) of the terminal device, or a logic module or software capable of implementing the functions of the terminal device in whole or in part. The functions of the communication apparatus can be implemented by hardware, or by hardware executing corresponding software, and the hardware or software includes one or more modules or units corresponding to the above functions. In a possible implementation, the communication apparatus includes a transceiver module and a processing module, where: the transceiver module is configured to receive the first modulation symbol; and the processing module is configured to demodulate and decode the first modulation symbol to obtain the system bits corresponding to the first layer, the first check bits corresponding to the first layer, the second check bits corresponding to the first layer, and the system bits corresponding to at least one second layer, where the demodulation includes demodulating the first modulation symbol based on a layered encoding modulation constellation to obtain a third bit sequence corresponding to the first layer and fourth bit sequences respectively corresponding to one second layer, and the decoding includes: the receiving end first decodes the third bit sequence to obtain the system bits corresponding to the first layer, the first check bits corresponding to the first layer, and the second check bits corresponding to the first layer, the first check bits corresponding to the I path, and the second check bits corresponding to the Q path; then, taking the first check bits as a first symbol bit, when the first symbol bit takes a first value, adjusting the values of one or more third bits in the fourth bit sequence corresponding to at least one second layer respectively, when the first symbol bit takes a second value, the values of the one or more third bits remain unchanged, and the one or more third bits correspond to the I path; taking the second check bits as a second symbol bit, when the second symbol bit takes a first value, adjusting the values of one or more fourth bits in the fourth bit sequence corresponding to at least one second layer respectively, when the second symbol bit takes a second value, the values of the one or more fourth bits remain unchanged, and the one or more fourth bits correspond to the Q path; and then decoding the fourth bit sequence corresponding to at least one second layer respectively to obtain the system bits corresponding to at least one second layer (optional).

[0035] In a possible implementation, the processing module is further configured to obtain a first amplitude symbol according to the system bits corresponding to the first layer and the system bits corresponding to the at least one second layer; the system bits corresponding to the first layer include first system bits and second system bits, the first system bits correspond to an I path, and the second system bits correspond to a Q path; the first amplitude symbol corresponds to the I path; a most significant bit (MSB) in the first amplitude symbol is a bit corresponding to the I path in the fourth bit sequence; and least significant bits (LSBs) in the first amplitude symbol are the first system bits.

[0036] In a possible implementation, the processing module is further configured to obtain a first amplitude symbol according to the system bits corresponding to the first layer and the system bits corresponding to the at least one second layer; the system bits corresponding to the first layer include first system bits and second system bits, the first system bits correspond to an I path, and the second system bits correspond to a Q path; the first amplitude symbol corresponds to the I path; a most significant bit (MSB) in the first amplitude symbol is a MSB in the fourth bit sequence; a second MSB in the first amplitude symbol is a third MSB in the fourth bit sequence; and least significant bits (LSBs) in the first amplitude symbol are the first system bits.

[0037] In a possible implementation, the processing module is further configured to obtain a first amplitude symbol according to the system bits corresponding to the at least one second layer; the system bits corresponding to the at least one second layer include system bits corresponding to the third layer and system bits corresponding to the fourth layer; the system bits corresponding to the third layer include third system bits corresponding to the I and fourth system bits corresponding to the Q; the system bits corresponding to the fourth layer are, in order from a lowest bit to a highest bit, fifth system bits, sixth system bits, seventh system bits, and eighth system bits; the first amplitude symbol corresponds to the I path; a MSB in the first amplitude symbol is the third system bits; a second MSB in the first amplitude symbol is the fifth system bits; and least significant bits (LSBs) in the first amplitude symbol are the seventh system bits.

[0038] Possible implementation of the communication apparatus of the sixth aspect can refer to possible implementation of the third aspect.

[0039] The technical effects brought by the various possible implementation of the sixth aspect can refer to the introduction of the technical effects of the various possible implementation of the third aspect.

[0040] In the seventh aspect, an embodiment of the present application provides another communication apparatus, which includes one or more processors configured to process data and / or signaling, so that the method in the first aspect or the second aspect or the third aspect is implemented.

[0041] Optionally, the communication apparatus further comprises a memory storing a program or instructions, which when executed by the processor, causes the communication apparatus to perform the method according to the first aspect or the second aspect. For example, the communication apparatus can be a chip, the processor can be a processing circuit in the chip, and the memory can be a random access memory or a cache in the chip.

[0042] In the embodiments of the present application, in the process of executing the above method, the process of sending information (or signal) in the above method can be understood as the process of outputting information based on the instructions of the processor. When outputting the information, the processor outputs the information to the transceiver for transmission by the transceiver. After the information is output by the processor, it can also be processed further and then reach the transceiver. Similarly, when the processor receives the input information, the transceiver receives the information and inputs it to the processor. Furthermore, after the transceiver receives the information, the information can be processed further and then input to the processor.

[0043] For the sending and / or receiving operations of the processor, if there is no special description, or if it does not conflict with the actual role or inherent logic in the related description, it can be generally understood as output based on the instructions of the processor.

[0044] In the implementation process, the processor can be a processor specially used for executing the methods, or a processor executing computer instructions in the memory to execute the methods, such as a general processor. For example, the processor can also be used to execute the program stored in the memory, and when the program is executed, the communication apparatus executes the method according to the first aspect or any possible implementation manner of the first aspect.

[0045] In a possible implementation manner, the memory is located outside the communication apparatus. In a possible implementation manner, the memory is located inside the communication apparatus.

[0046] In a possible implementation manner, the processor and the memory can also be integrated into one device, that is, the processor and the memory can also be integrated together.

[0047] In a possible implementation manner, the communication apparatus further comprises a transceiver, which is configured to receive a signal or transmit a signal.

[0048] In an eighth aspect, the present application provides another communication apparatus, which comprises a processing circuit and an interface circuit, the interface circuit is configured to obtain a signal or output a signal; the processing circuit is configured to execute the method according to the first aspect or the second aspect or the third aspect.

[0049] In a ninth aspect, the present application provides a computer readable storage medium, which stores a computer program, the computer program comprising program instructions, which when executed by a computer, cause the computer to perform the method according to the first aspect or the second aspect or the third aspect.

[0050] In a tenth aspect, the present application provides a computer program product, which comprises a computer program, the computer program comprising program instructions, which when executed by a computer, cause the computer to perform the method according to the first aspect or the second aspect or the third aspect.

[0051] In an eleventh aspect, the present application provides a chip, comprising a communication interface and a processor; the communication interface is configured to transceive signals of the chip; the processor is configured to execute computer program instructions, so that a communication device comprising the chip performs the method according to the first aspect or the second aspect or the third aspect.

[0052] In a twelfth aspect, the present application provides a communication system, comprising the communication device according to the first aspect or any possible implementation manner of the first aspect, and the communication device according to the second aspect or any possible implementation manner of the second aspect.

[0053] In a thirteenth aspect, the present application provides a communication system, comprising the communication device according to the first aspect or any possible implementation manner of the first aspect, and the communication device according to the third aspect or any possible implementation manner of the third aspect. BRIEF DESCRIPTION OF DRAWINGS

[0054] FIG. 1 is a schematic diagram of an application scenario according to an embodiment of the present application;

[0055] FIG. 2 is a schematic diagram of a possible application framework in a communication system;

[0056] FIG. 3 is a workflow diagram of an existing probability amplitude shaping technology;

[0057] FIG. 4 shows an example of a conventional Gray constellation and an example of a hierarchical coded modulation constellation;

[0058] FIG. 5 shows an example of 2 bits of I path of a Gray constellation (left) and an example of 2 bits of I path of a hierarchical coded modulation constellation;

[0059] FIG. 6 shows a schematic diagram of I path of a hierarchical coded modulation constellation;

[0060] FIG. 7 is a flowchart of a communication method according to an embodiment of the present application;

[0061] FIG. 8 shows a schematic diagram of an I path of another hierarchical coding modulation constellation;

[0062] FIG. 9 shows a schematic diagram of an I path of another hierarchical coding modulation constellation;

[0063] FIGS. 10A-10D show schematic diagrams of another hierarchical coding process according to embodiments of the present application;

[0064] FIG. 11 shows a schematic diagram of an I path of a 64QAM hierarchical coding modulation constellation according to embodiments of the present application;

[0065] FIG. 12 shows a schematic diagram of probability distribution of constellation points in a hierarchical coding modulation constellation according to embodiments of the present application;

[0066] FIG. 13 shows a schematic diagram of an I path of a 256QAM hierarchical coding modulation constellation according to embodiments of the present application;

[0067] FIG. 14A shows a schematic diagram of probability distribution of constellation points in another hierarchical coding modulation constellation according to embodiments of the present application;

[0068] FIG. 14B shows a performance simulation diagram according to embodiments of the present application;

[0069] FIGS. 15A-15F show schematic diagrams of another hierarchical coding process according to embodiments of the present application;

[0070] FIG. 16 shows a schematic diagram of an I path of another 256QAM hierarchical coding modulation constellation according to embodiments of the present application;

[0071] FIG. 17 shows a flowchart of a coding modulation method according to embodiments of the present application;

[0072] FIG. 18 shows a schematic diagram of a hierarchical coding process according to embodiments of the present application;

[0073] FIG. 19 shows a flowchart of a demodulation decoding method according to embodiments of the present application;

[0074] FIG. 20 shows a schematic diagram of a demodulation decoding process according to embodiments of the present application;

[0075] FIG. 21 shows a schematic diagram of a structure of a communication apparatus 2100 according to embodiments of the present application;

[0076] FIG. 22 shows a schematic diagram of a structure of another apparatus 220 according to embodiments of the present application. DETAILED DESCRIPTION

[0077] The terms "first" and "second" and the like in the description, claims and drawings of the present application merely mean different objects and do not imply a particular order or sequence. It can be understood that various numerical numbers involved in the embodiments of the present application are only for the convenience of differentiation and do not limit the scope of the embodiments of the present application. The size of the serial numbers of the above processes does not mean the order of execution, and the execution order of the processes should be determined according to their functions and inherent logic. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device, etc. including a series of steps or units is not limited to the listed steps or units, but can optionally include unlisted steps or units, etc. or can optionally include other steps or units inherent to the process, method, product or device, etc.

[0078] "Embodiments" mentioned herein means that the specific features, structures or characteristics described in conjunction with the embodiments can be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily mean the same embodiment, nor is it an independent or alternative embodiment to other embodiments. Those skilled in the art can explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments. In this application, the naming of messages is only for the purpose of distinguishing different messages and should not be understood as a limitation. That is, the name of any message in this application can be replaced by other names, and this application is not limited.

[0079] The terms used in the following embodiments of the present application are only for the purpose of describing the specific embodiments and are not intended to be limiting to the present application. As used in the specification and the appended claims of the present application, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "and / or" as used herein refer to and encompass any or all possible combinations of one or more of the associated listed items. For example, "A and / or B" can mean: only A exists, only B exists, and both A and B exist, where A and B can be singular or plural. The term "plurality" as used in the present application means two or more. In the literal description of the present application, the character " / ", generally indicates that the associated objects before and after are in an "or" relationship.

[0080] It can be understood that in the embodiments of the present application, "A corresponds to B" means that A and B have a corresponding relationship, and B can be determined according to A. However, it should also be understood that determining (or generating) B according to (or based on) A does not mean that B is determined (or generated) only according to (or based on) A, but B can also be determined (or generated) according to (or based on) A and / or other information.

[0081] It should be understood that, in the present application, indicating includes direct indication (also known as explicit indication) and implicit indication. Among them, direct indication of information A means including the information A; implicit indication of information A means indicating information A by the correspondence between information A and information B and directly indicating information B. Among them, the correspondence between information A and information B can be pre-defined, pre-stored, pre-burned, or pre-configured.

[0082] It should be understood that, in the present application, information C is used for determination of information D, which includes that information D is determined based on information C only, and also includes that information D is determined based on information C and other information. In addition, information C used for determination of information D can also be the case of indirect determination, such as the case that information D is determined based on information E, and information E is determined based on information C.

[0083] In addition, in the embodiments of the present application, "network element A sends information A to network element B" can be understood as that the destination of the information A or the intermediate network element in the transmission path between the destination is network element B, which can include direct or indirect sending of information to network element B. "Network element B receives information A from network element A" can be understood as that the source of the information A or the intermediate network element in the transmission path between the source is network element A, which can include direct or indirect receiving of information from network element A. The information can be processed as necessary between the source and the destination of the information transmission, for example, format change, etc., but the destination can understand the valid information from the source. Similar expressions in the present application can be understood similarly, which will not be described here.

[0084] The application scenario of the technical solution of the present application will be introduced first.

[0085] The application scenario of the technical solution of the present application includes but is not limited to: data transmission between network devices (such as base stations or access points) and terminal devices, data transmission between network devices and network devices, data transmission between terminal devices and terminal devices, data transmission between network devices and relay devices, data transmission between relay devices and relay devices, or data transmission between relay devices and terminal devices. The present application takes data transmission between network devices and terminal devices as an example for description, and the data transmission between other devices can be referred to the data transmission between network devices and terminal devices. The data transmission between network devices and terminal devices includes but is not limited to: network devices sending radio frequency signals carrying information to terminal devices; network devices sending radio frequency signals carrying information to terminal devices through relay devices; terminal devices sending radio frequency signals carrying information to network devices; terminal devices sending radio frequency signals carrying information to network devices through relay devices. The term "data transmission" can also be described as "communication", "information transmission", "transmission", "data transmission" or "number transmission" and the like.

[0086] The technical solutions of the present application can be applied to various communication scenarios. FIG. 1 is a schematic diagram of an application scenario provided by an embodiment of the present application. As shown in FIG. 1, the application scenario of the technical solutions of the present application can include: direct communication between a network device and a user equipment (UE) (i.e., point-to-point single connection between the network device and the UE), multi-hop / multi-relay transmission between the network device and the UE (i.e., multi-hop single connection), dual connectivity (DC) between multiple network devices and the UE, or multi-hop multi-connection, etc. In the multi-hop / multi-relay transmission scenario between the network device and the UE, the network device transmits data to the terminal device through one or more relay devices, and the terminal device transmits data to the network device through one or more relay devices. In the dual connectivity scenario between multiple network devices and the UE, the UE is connected to two network devices at the same time. In the multi-hop multi-connection scenario, the network device and the terminal device can transmit data to each other through multiple connections. FIG. 1 is only exemplary and does not limit the network architecture applicable to the present application. Wireless data transmission between any two devices is a network architecture applicable to the present application.

[0087] The technical solutions provided by the present application can be applied to various communication systems, such as: a 5th generation (5G) or new radio (NR) system, a long term evolution (LTE) system, an LTE frequency division duplex (FDD) system, an LTE time division duplex (TDD) system, a wireless local area network (WLAN) system, a satellite communication system, a future communication system, such as a fusion system of multiple systems, etc. The technical solutions provided by the present application can also be applied to device to device (D2D) communication, vehicle-to-everything (V2X) communication, machine to machine (M2M) communication, machine type communication (MTC), and internet of things (IoT) communication system or other communication systems.

[0088] In the present application, the technical solutions of the present application are described taking the third generation partnership project (3GPP) related cellular system as an example, but this should not constitute any limitation on the present application. Based on the same concept, the technical methods of the present application can also be applied to other communication networks such as zigbee, long range radio (Lora), bluetooth (BT), wireless fidelity (Wi-Fi), etc. The technical solutions provided in the embodiments of the present application are also applicable to other communication systems supporting wireless energy and data transmission. The above communication systems to which the technical solutions provided in the embodiments of the present application are applicable are only illustrative, and the communication systems to which the technical solutions provided in the present application are applicable are not limited thereto. In this case, it is uniformly stated below, and the following will not be described in detail.

[0089] The first device in the communication system can send a signal to the second device or receive a signal from the third device. Wherein the signal can include information, signaling or data, etc. Wherein, the device can also be replaced by entity, network entity, communication device, communication module, node, communication node, etc. In the present disclosure, the network element is taken as an example for description. Wherein, the first device can be a network device or a terminal device, the second device can be a network device or a terminal device, and the third device can be a network device or a terminal device. For example, the communication system can include at least one terminal device and at least one network device. The network device can send a downlink signal to the terminal device, and / or the terminal device can send an uplink signal to the network device. It can be understood that the terminal device in the present disclosure can be replaced by the first device, and the network device can be replaced by the second device, and both of them perform the corresponding communication method in the present disclosure.

[0090] In the embodiments of the present application, the terminal device (terminal equipment) can also be referred to as user equipment (UE), access terminal, subscriber unit, user station, mobile station, mobile station (MS), remote station, remote terminal, mobile device, user terminal, terminal, wireless communication device, user agent or user apparatus.

[0091] The terminal device can be a device that provides a wireless communication function, for example, a handheld device, a vehicle-mounted device, and the like that has a wireless connection function. Currently, some examples of the terminal device are a mobile phone, a cellular phone, a smart phone, a tablet computer, a notebook computer, a palm computer, a mobile internet device (MID), a wearable device, a virtual reality (VR) device, an augmented reality (AR) device, a wireless terminal in industrial control, a wireless terminal in self driving, a wireless terminal in remote medical surgery, a wireless terminal in a smart grid, a wireless terminal in transportation safety, a wireless terminal in a smart city, a wireless terminal in a smart home, a cellular phone, a cordless phone, a session initiation protocol (SIP) phone, a wireless local loop (WLL) station, a personal digital assistant (PDA), a handheld device with a wireless communication function, a computing device or other processing device connected to a wireless modem, a wearable device, a terminal device in a 5G network, or a terminal device in a future evolved public land mobile network (PLMN), and the like, which are not limited by the embodiments of the present application. The terminal device can also be a device in a zigbee network, a device in a Lora network, a Bluetooth slave (BT slave), a Bluetooth low energy (BLE) slave, a Wi-Fi station (STA), and the like.

[0092] By way of example and without limitation, in embodiments of the present application, the terminal device can also be a terminal device in an IoT system, which can also be referred to as an IoT node. IoT is an important part of future information technology development, and its main technical feature is to connect objects through communication technology and network, so as to realize the intelligent network of man-machine interconnection and object-object interconnection. Connection can be through broadband technology or narrowband technology. IoT technology can achieve mass connection, deep coverage and terminal power saving through, for example, narrowband (NB) technology. IoT technology can include reflection communication technology, spread spectrum technology, ultra wide band (UWB), etc., and will not be described here.

[0093] By way of example and without limitation, in embodiments of the present application, the terminal device can also be a wearable device. The wearable device can also be referred to as a wearable smart device, which is a general term for devices that are designed and developed by applying wearable technology to daily wear, such as glasses, gloves, watches, clothing and shoes, etc. The wearable device is a portable device that is directly worn on the body or integrated into the user's clothes or accessories. The wearable device is not only a hardware device, but also a powerful function realized through software support and data interaction, cloud interaction. The general wearable smart device includes a full function, large size, and can realize complete or partial functions without relying on a smart phone, such as a smart watch or smart glasses, etc., and focuses on a certain application function and needs to cooperate with other devices such as a smart phone, such as various smart wristbands, smart jewelry, etc. for monitoring vital signs.

[0094] In embodiments of the present application, the device for implementing the function of the terminal device can be a terminal device, or a device capable of supporting the terminal device to implement the function, such as a chip system, which can be installed in the terminal device or used in combination with the terminal device. In embodiments of the present application, the chip system can be composed of a chip, or can include a chip and other discrete devices. In embodiments of the present application, only the device for implementing the function of the terminal device is taken as an example for description, and the scheme of the embodiments of the present application is not limited.

[0095] The network device in the embodiments of the present application can be a device for communicating with a terminal device, and the network device can also be referred to as an access network device or a radio access network device, for example, the network device can be a base station. The network device in the embodiments of the present application can refer to a radio access network (RAN) node (or device) for accessing a terminal device to a wireless network. The base station can broadly cover various names in the following or be replaced by the following names, such as: RAN node, Node B, evolved Node B (eNB), next generation Node B (gNB), base station controller (BSC), base transceiver station (BTS), home base station (for example, home evolved Node B or home Node B, HNB), baseband unit (BBU), wireless relay node, wireless backhaul node, relay station, transmission point (TRP), IAB node, transmitting point (TP), master station, auxiliary station, multi-mode wireless (MSR) node, network controller, access node, wireless node, access point (AP), transmission node, transceiver node, radio frequency remote unit (RRU), active antenna unit (AAU), radio frequency head (RRH), central unit (CU), distributed unit (DU), radio unit (RU), positioning node, one or a group of antenna panels (including multiple antenna panels) of a base station in a 5G system, and the like. The network device in the embodiments of the present application can also be a zigbee base station, a BT master, a BLE master, a Lora base station, and a Wi-Fi access point.

[0096] The base station can be a macro base station, a micro base station, a relay node, a donor node, or the like, or a combination thereof. The base station can also refer to a communication module, a modem, or a chip configured in the aforementioned devices or apparatuses. The base station can also be a mobile switching center, a device assuming a base station function in device to device (D2D), vehicle to everything (V2X), machine to machine (M2M) communication, a network side device in a future communication network, a device assuming a base station function in a future communication system, and the like. The base station can support networks of the same or different access technologies. Optionally, the RAN node can also be a server, a wearable device, a vehicle or a vehicle-mounted device, and the like. For example, the access network device in V2X technology can be a road side unit (RSU). Embodiments of the present application do not limit the specific technology and specific device form of the network device.

[0097] The base station can be fixed, or mobile. For example, a helicopter or a drone can be configured to act as a mobile base station, and one or more cells can move according to the location of the mobile base station. In other examples, the helicopter or the drone can be configured to act as a device that communicates with another base station.

[0098] In some deployments, the network device mentioned in the embodiments of the present application can be a device including a CU, or a DU, or including a CU and a DU, or a control plane CU node (central unit-control plane (CU-CP)) and a user plane CU node (central unit-user plane (CU-UP)) and a DU node. For example, the network device can include a gNB-CU-CP, a gNB-CU-UP, and a gNB-DU.

[0099] In some deployments, a plurality of RAN nodes cooperate to assist a terminal to implement wireless access, and different RAN nodes respectively implement part of the functions of a base station. For example, the RAN node can be a CU, a DU, a CU-CP, a CU-UP, or an RU, and the like. The CU and the DU can be separately arranged, or can also be included in the same network element, such as a BBU. The RU can be included in a radio frequency device, such as an RRU, an AAU, or an RRH.

[0100] The RAN node can support one or more types of fronthaul interfaces, different fronthaul interfaces respectively corresponding to DUs and RUs having different functions. If the fronthaul interface between the DU and the RU is a common public radio interface (CPRI), the DU is configured to implement one or more of baseband functions, and the RU is configured to implement one or more of radio frequency functions. If the fronthaul interface between the DU and the RU is another interface, which, relative to the CPRI, moves one or more of partial baseband functions of the downlink and / or uplink, such as, for the downlink, one or more of precoding, digital beamforming (BF), or inverse fast Fourier transform (IFFT) / add cyclic prefix (CP), from the DU to the RU for implementation, and for the uplink, one or more of digital beamforming (BF), or fast Fourier transform (FFT) / remove cyclic prefix (CP), from the DU to the RU for implementation. In a possible implementation, the interface can be an enhanced common public radio interface (eCPRI). Under the eCPRI architecture, the splitting manner between the DU and the RU is different, corresponding to different categories (Cat) of eCPRI, such as eCPRI Cat A, B, C, D, E, and F.

[0101] Taking eCPRI Cat A as an example, for downlink transmission, with layer mapping as the cut, the DU is configured to implement one or more functions (i.e., one or more of encoding, rate matching, scrambling, modulation, layer mapping) before layer mapping, and other functions (e.g., one or more of resource element (RE) mapping, digital beamforming (BF), or inverse fast Fourier transform (IFFT) / adding cyclic prefix (CP)) after layer mapping are implemented in the RU. For uplink transmission, with de-RE mapping as the cut, the DU is configured to implement one or more functions (i.e., one or more of decoding, de-rate matching, de-scrambling, de-modulation, inverse discrete Fourier transform (IDFT), channel equalization, de-RE mapping) before de-mapping, and other functions (e.g., one or more of digital BF or fast Fourier transform (FFT) / CP removal) after de-mapping are implemented in the RU. It can be understood that the function description of the DU and the RU corresponding to various types of eCPRI can refer to the eCPRI protocol, and will not be described here.

[0102] In a possible design, the processing unit in the BBU for implementing baseband functions is referred to as a base band high (BBH) unit, and the processing unit in the RRU / AAU / RRH for implementing baseband functions is referred to as a base band low (BBL) unit.

[0103] In different systems, the CU (or CU-CP and CU-UP), DU or RU can also have different names, but those skilled in the art can understand their meanings. For example, in an open radio access network (ORAN / O-RAN) system, the CU can also be referred to as an O-CU (open CU), the DU can also be referred to as an O-DU, the CU-CP can also be referred to as an O-CU-CP, the CU-UP can also be referred to as an O-CU-UP, and the RU can also be referred to as an O-RU. Any of the CU (or CU-CP, CU-UP), DU and RU in this application can be implemented by a software module, a hardware module, or a combination of a software module and a hardware module.

[0104] In the embodiments of the present application, the apparatus for implementing the function of the network device can be a network device, or an apparatus capable of supporting the network device to implement the function, such as a chip system, a hardware circuit, a software module, or a hardware circuit plus a software module. The apparatus can be installed in the network device or used in combination with the network device. In the embodiments of the present application, only the apparatus for implementing the function of the network device is taken as an example for description, and the scheme of the embodiments of the present application is not limited in this way.

[0105] The network device and / or the terminal device can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted; can also be deployed on water; and can also be deployed on airplanes, balloons and satellites in the air. The scenarios in which the network device and the terminal device are located are not limited in the embodiments of the present application. In addition, the terminal device and the network device can be hardware devices, or software functions running on special hardware, software functions running on general hardware, such as virtualized functions instantiated on a platform (for example, a cloud platform), or entities including special or general hardware devices and software functions. The specific forms of the terminal device and the network device are not limited in the present application.

[0106] It should be noted that the network architecture described in the embodiments of the present application is used to more clearly illustrate the technical solutions of the embodiments of the present application, and does not constitute a limitation on the technical solutions provided by the embodiments of the present application. It can be known by those skilled in the art that, with the evolution of network architecture and the emergence of new business scenarios, the technical solutions provided by the embodiments of the present application are also applicable to similar technical problems. In the following embodiments, the apparatus for implementing the function of the network device is taken as the network device, and the network device is taken as a base station to describe the technical solutions provided by the embodiments of the present application.

[0107] FIG. 2 is a schematic diagram of a possible application framework in a communication system. As shown in FIG. 2, the communication system includes a core network device, an access network node, an operation administration and maintenance (OAM) network element, and a terminal device. The network elements in the communication system are connected through interfaces (for example, NG, Xn) or air interfaces. The access network node can be a single RAN node, or can include multiple RAN nodes, for example, including a CU and a DU. Optionally, the CU can also be split into a CU-CP and a CU-UP.

[0108] It can be understood that the specific structure of the execution subject of the method provided in the embodiments of the present application is not particularly limited, as long as the program recording the code of the method provided in the embodiments of the present application can be run to perform data transmission according to the method provided in the embodiments of the present application. The method provided in the embodiments of the present application can be applied to data transmission between a sending end (which can be referred to as an encoding end) and a receiving end (which can be referred to as a decoding end or a decoding end). Hereinafter, the interaction between the sending end and the receiving end is taken as an example for description.

[0109] Some technical terms related to the technical solutions of the present application are introduced below.

[0110] 1. Uniform modulation (UM): After uniform modulation, the probability distribution of constellation points in the constellation diagram is the same, and the geometric positions of the constellation points are regular. For example, quadrature amplitude modulation (QAM) modulation belongs to uniform modulation.

[0111] 2. Non-uniform modulation (NUM): including geometric constellation shaping (GCS) and probabilistic constellation shaping (PCS). After non-uniform modulation, the probability distribution of constellation points in the constellation diagram is different, or the geometric positions of the constellation points are irregular and non-uniform, or both the probability distribution is different and the geometric positions of the constellation points are irregular and non-uniform.

[0112] 3. Geometric constellation shaping: shaping gain is achieved by modifying the geometric position of constellation mapping, and the probability distribution of constellation points is uniform distribution, and the probability distribution of each point is equal.

[0113] 4、Probability constellation shaping: shaping gain is achieved by modifying the probability distribution of constellation points in the constellation diagram, the probability distribution of each constellation point is not the same, but the geometric position of the constellation mapping does not change. The shaping gain increases with the increase of the modulation order, and the high-order constellation has larger shaping gain, thereby further improving the system performance and improving the spectrum efficiency. The probability distribution of the probability-shaped constellation diagram conforms to the Maxwell-Boltzmann distribution, and the direct manifestation of the probability-shaped constellation diagram is that the probability distribution of the constellation points in each circle of the probability-shaped constellation diagram is the same, the probability distribution of the constellation points in the inner circle is large, and the probability distribution of the constellation points in the outer circle is small. The probability distribution of the constellation points of the probability-shaped constellation diagram has shaping gain. The distance of the constellation points on each circle of the probability-shaped constellation diagram to the origin of the coordinates is equal. The probability-shaped constellation diagram can be called a constellation diagram based on probability constellation shaping. In order to facilitate description, the probability-shaped constellation diagram is described hereinafter. The probability constellation shaping is achieved by the probability shaping technology.

[0114] The probability constellation shaping includes probabilistic amplitude shaping (PAS) and probabilistic fold shaping (PFS). The technical solution of the present application relates to probabilistic amplitude shaping.

[0115] 5、Probabilistic amplitude shaping: referring to FIG. 3, the working process of the existing probabilistic amplitude shaping technology is as follows: the distribution matcher (DM) usually adopts arithmetic coding to convert the input bit sequence (or bit stream) with equal probability distribution of 0, 1 into an amplitude symbol sequence with a given probability distribution, that is, A1, A2, …, A nc in FIG. 3, where nc is an integer greater than 0; b() in FIG. 3 represents converting the amplitude symbol sequence into a bit sequence, that is, b(A1), …, b(A nc in FIG. 3, and then inputting the bit sequence into the encoder to obtain a parity bit sequence, that is, b(S1), …, b(S nc in FIG. 3, where the value of any parity bit in the parity bit sequence is 0 / 1; f() represents mapping 0 / 1 in the parity bit sequence into a symbol bit of + / -1, and together with the amplitude symbol sequence obtained before, a bit sequence to be mapped through the constellation diagram is formed, that is, X1, …, X ncFig. 3 is a workflow diagram of a known probability amplitude shaping technique. Since the amplitude symbol sequence is generally represented as positive numbers, in order to be mapped onto the constellation, the symbol bits with equal probability distribution need to be constructed. The method in Fig. 3 is to convert the amplitude symbol sequence into a bit sequence, and then pass it through an encoder to obtain a sequence of check bits. Since the check bits generated after encoding the unequal probability 0, 1 sequence have the equal probability feature, the 0 / 1 in the check bit sequence can be mapped to + / -1 symbol bits.

[0116] In the present application, the amplitude symbol sequence includes amplitude symbols corresponding to the I path and / or amplitude symbols corresponding to the Q path. In the present application, the amplitude symbols corresponding to the I path can be referred to as the amplitude symbols of the I path, and the amplitude symbols corresponding to the Q path can be referred to as the amplitude symbols of the Q path. The amplitude symbols corresponding to the I path and the amplitude symbols corresponding to the Q path can constitute an amplitude symbol corresponding to the I path and the Q path. In other words, an amplitude symbol corresponding to the I path and the Q path includes an amplitude symbol corresponding to the I path and an amplitude symbol corresponding to the Q path. For example, the amplitude symbol #0 corresponding to the I path and the Q path can be represented as i0q0i1q1…i (L-2) q (L-2) , the amplitude symbols corresponding to the I path in the amplitude symbol #0 can be represented as i0i1…i (L-2) , and the amplitude symbols corresponding to the Q path in the amplitude symbol #0 can be represented as q0q1…q (L-2) . L is an integer greater than 2.

[0117] 6. Hierarchical coding modulation constellation and traditional Gray constellation: FIG. 4 shows an example of a traditional Gray constellation and an example of a hierarchical coding modulation constellation. The horizontal axis of the constellation is the in-phase (I) axis, and the vertical axis of the constellation is the quadrature (Q) axis. Alternatively, a portion of each constellation point in the constellation corresponds to the I axis, and another portion of the constellation point corresponds to the Q axis, or each constellation point includes an I axis and a Q axis. Generally, the odd bits in the constellation point correspond to the I axis, and the even bits in the constellation point correspond to the Q axis. For example, a constellation point in a certain constellation can be represented as i0q0i1q1i3q3, the I axis of the constellation point is i0i1i3, and the Q axis of the constellation point is q0q1q3. FIG. 5 shows an example of 2 bits of the I axis of the Gray constellation (left) and an example of 2 bits of the I axis of the hierarchical coding modulation constellation. Since the I axis and the Q axis in the constellation have the same or similar characteristics, the I axis is taken as an example for description below. Referring to FIG. 5, in the traditional Gray constellation, the most significant bit (MSB) of the I axis of the constellation point corresponds to a sign bit, indicating whether the constellation point is on the positive half-axis or the negative half-axis of the constellation, and the least significant bit (LSB) of the I axis of the constellation point indicates amplitude information of the constellation point, and the LSBs of the I axes of the constellation points are symmetrically distributed about an axis, i.e., when the LSB of the I axis of the constellation point is 0, it indicates that the amplitude information of the I axis of the constellation point is 1, and when the LSB of the I axis of the constellation point is 1, it indicates that the amplitude information of the I axis of the constellation point is 3. Referring to FIG. 5, in the hierarchical coding modulation constellation, the MSB of the I axis of the constellation point corresponds to a sign bit, indicating whether the constellation point is on the positive half-axis or the negative half-axis of the constellation, and when the LSB of the I axis of the constellation point is 0, the amplitude information of the I axis of the constellation point can be 1 or 3, and when the LSB of the I axis of the constellation point is 1, the amplitude information of the I axis of the constellation point can be 1 or 3. The LSBs of the I axes of the constellation points in the hierarchical coding modulation constellation do not satisfy the symmetric distribution about an axis.

[0118] The background section introduces that the bit sequence composed of the sign bits and the amplitude symbol sequence by the existing probability amplitude shaping technique is suitable for mapping using the traditional Gray constellation, but is not suitable for mapping using the hierarchical coded modulation constellation. The reason why the bit sequence composed of the sign bits and the amplitude symbol sequence by the existing probability amplitude shaping technique is suitable for mapping using the traditional Gray constellation is that: referring to FIG. 5, the LSBs of the I paths of the constellation points in the traditional Gray constellation are axisymmetrically distributed, the amplitude symbols corresponding to the I paths (i.e., the amplitude symbols corresponding to the I paths) can be directly mapped to the LSBs of the I paths of the constellation points, and the sign bits corresponding to the amplitude symbols of the I paths are mapped to the MSBs of the I paths of the constellation points. The LSBs of the Q paths of the constellation points in the traditional Gray constellation are also axisymmetrically distributed, the amplitude symbols corresponding to the Q paths (i.e., the amplitude symbols corresponding to the Q paths) can be directly mapped to the LSBs of the Q paths of the constellation points, and the sign bits corresponding to the amplitude symbols of the Q paths are mapped to the MSBs of the Q paths of the constellation points. The reason why the bit sequence composed of the sign bits and the amplitude symbol sequence by the existing probability amplitude shaping technique is not suitable for mapping using the hierarchical coded modulation constellation is that: the LSBs of the I paths of the constellation points in the hierarchical coded modulation constellation do not satisfy the axisymmetric distribution, and the amplitude symbols of the I paths cannot be directly mapped to the LSBs of the I paths of the constellation points. Similarly, the LSBs of the Q paths of the constellation points in the hierarchical coded modulation constellation do not satisfy the axisymmetric distribution, and the amplitude symbols of the Q paths cannot be directly mapped to the LSBs of the I paths of the constellation points.

[0119] The present application provides a modulation scheme based on the probability amplitude shaping technique suitable for mapping using the hierarchical coded modulation constellation, by fusing (or jointly designing) the probability amplitude shaping and the hierarchical coded modulation constellation, so that the bit sequence composed of the sign bits and the amplitude symbols is suitable for mapping using the hierarchical coded modulation constellation, the performance gain brought by the probability amplitude shaping is maintained, and the advantage of reducing the decoding complexity of the hierarchical coded modulation is also possessed.

[0120] The main principle of the modulation scheme based on the probability amplitude shaping technology provided in the application is as follows: based on the value of the symbol bit corresponding to each amplitude symbol (including the amplitude symbol of the I path and the amplitude symbol of the Q path) in the amplitude symbol sequence, the value of one or more bits in the amplitude symbol is adjusted or the value of each bit in the amplitude symbol is kept unchanged, so that the probability distribution of the adjusted amplitude symbol sequence satisfies the axisymmetric characteristic. The probability distribution of the amplitude symbol sequence satisfying the axisymmetric characteristic can be that, for any amplitude symbol in the amplitude symbol sequence, when the value of the symbol bit corresponding to the amplitude symbol is a first value, the constellation point corresponding to the bit sequence composed of the amplitude symbol and the symbol bit corresponding to the amplitude symbol in the hierarchical coding modulation constellation diagram is axisymmetric with the constellation point corresponding to the bit sequence composed of the amplitude symbol and the symbol bit corresponding to the amplitude symbol when the value of the symbol bit corresponding to the amplitude symbol is a second value. The first value and the second value are different. For example, the first value is 0 and the second value is 1. For another example, the first value is 1 and the second value is 0. Taking the amplitude symbol of the I path in the amplitude symbol sequence as an example, the probability distribution of the amplitude symbol sequence satisfying the axisymmetric characteristic can be that, for any amplitude symbol of the I path in the amplitude symbol sequence, when the value of the symbol bit corresponding to the amplitude symbol is a first value, the constellation point corresponding to the bit sequence composed of the amplitude symbol and the symbol bit corresponding to the amplitude symbol in the hierarchical coding modulation constellation diagram is axisymmetric about the y-axis with the constellation point corresponding to the bit sequence composed of the amplitude symbol and the symbol bit corresponding to the amplitude symbol when the value of the symbol bit corresponding to the amplitude symbol is a second value. The amplitude symbol of the I path in the amplitude symbol sequence corresponds to the I path of the constellation diagram, and the amplitude symbol of the Q path corresponds to the Q path of the constellation diagram.

[0121] For example, the amplitude symbols of the I path in the amplitude symbol sequence (corresponding to the I path of the constellation) are ordered from high to low probability as follows: 11, 10, 00, 01; the amplitude symbol of the I path and the sign bit constitute a bit sequence, and the sign bit is the second MSB in the bit sequence; when the value of the sign bit is 1, each bit in the amplitude symbol remains unchanged, wherein 11 and the sign bit constitute a bit sequence 111, 10 and the sign bit constitute a bit sequence 110, 00 and the sign bit constitute a bit sequence 010, and 01 and the sign bit constitute a bit sequence 011; when the value of the sign bit is 0, the value of the MSB in the amplitude symbol is adjusted, wherein 11 is adjusted to 01, 10 is adjusted to 00, 00 is adjusted to 10, and 01 is adjusted to 11, 01 and the sign bit constitute a bit sequence 001, 00 and the sign bit constitute a bit sequence 000, 10 and the sign bit constitute a bit sequence 100, and 11 and the sign bit constitute a bit sequence 101. In this example, when the value of the sign bit corresponding to the amplitude symbol of the I path is the first value, the bit sequence constituted by the amplitude symbol and the sign bit corresponding to the amplitude symbol corresponds to a constellation point (i.e., any one of 111, 110, 010, or 011) in the hierarchical coded modulation constellation, and when the value of the sign bit corresponding to the amplitude symbol is the second value, the bit sequence constituted by the amplitude symbol and the sign bit corresponding to the amplitude symbol corresponds to a constellation point (i.e., any one of 001, 000, 010, or 011) in the hierarchical coded modulation constellation that is symmetric about the y-axis, as shown in FIG. 6. FIG. 6 shows a schematic diagram of the I path of a hierarchical coded modulation constellation. As shown in FIG. 6, 111 and 001 are symmetric about the y-axis, 110 and 000 are symmetric about the y-axis, 100 and 010 are symmetric about the y-axis, and 101 and 011 are symmetric about the y-axis.

[0122] The technical scheme provided by the embodiments of the present application can be applied to channel coding / decoding between communication devices. The channel coding / decoding between communication devices can include channel coding / decoding between a network device and a terminal device, channel coding / decoding between network devices, and channel coding / decoding between terminal devices. In the embodiments of the present application, the term "channel coding / decoding" can also be referred to as "coding", and the term "coding" can also be described as "channel coding / decoding", "network coding", "outer code", "source-channel joint coding / decoding". The term "coding structure" can also be referred to as "coding", "code type", "code design", and the term "coding structure" can also be described as "concatenated code", "hierarchical code", "coupled code", "outer code", "sliding window code", "product code", and "ladder code".

[0123] The technical scheme of the present application will be described below with reference to the accompanying drawings.

[0124] FIG. 7 is a flowchart of a communication method according to an embodiment of the present application. As shown in FIG. 7, the method includes the following steps.

[0125] 701、The sending end performs hierarchical encoding on the first input bits.

[0126] The hierarchical encoding includes encoding of a first layer and encoding of at least one second layer. The first layer corresponds to a first encoding manner. One of the at least one second layer corresponds to a second encoding manner or no encoding. The first layer can be any layer with the feature that the parity check bits generated after encoding of a 0, 1 sequence with unequal probabilities have the feature of equal probabilities. The first layer can be a low density parity check code (LDPC), or other layers, which are not limited in the present application. The first encoding manner is LDPC encoding, or other encoding manners, which are not limited in the present application. The at least one second layer can include one or more of a no-encoding layer, a BCH layer, a polar code layer, a linear block code (LBC) layer, a convolutional code layer, a concatenated code layer, a turbo product code (TPC) layer, etc., wherein the BCH layer corresponds to a Bose-Chaudhuri-Hocquenghem code (BCH code), the polar code layer corresponds to a polar code, the linear block code layer corresponds to a linear block code, the convolutional code layer corresponds to a convolutional code, the concatenated code layer corresponds to a concatenated code, and the turbo product code layer corresponds to a turbo product code. That a certain encoding layer corresponds to a certain code means that the encoding of the certain encoding layer results in the certain code. The second encoding manner corresponds to any one of a BCH code, a polar code, a linear block code, a convolutional code, a concatenated code, a turbo product code, or other codes. Alternatively, one of the at least one second layer is encoded by the second encoding manner to obtain any one of a BCH code, a polar code, a linear block code, a convolutional code, a concatenated code, a turbo product code, or other codes. As an example, the at least one second layer includes only one layer and corresponds to no encoding, i.e., the input bits of the layer do not need to be encoded. Alternatively, the at least one second layer is a no-encoding layer. As another example, the at least one second layer includes a no-encoding layer and a BCH layer. The first layer can encode its input bits by using the first encoding manner. Each of the at least one second layer can encode its input bits by using the encoding manner corresponding to the layer. If one of the at least one second layer corresponds to no encoding, the input bits of the layer are not encoded. In a possible implementation, the at least one second layer can further include one or more layers corresponding to other encoding manners. As an example, one of the at least one second layer corresponds to a third encoding manner, the third encoding manner is different from the second encoding manner, the second encoding manner corresponds to a BCH code, and the third encoding manner corresponds to any one of a polar code, a linear block code, a convolutional code, a concatenated code, a turbo product code, or other codes.

[0127] All or part of the first input bits are amplitude symbol sequences output by the distribution matcher. As an example, all of the first input bits are amplitude symbol sequences output by the distribution matcher, the input bits of the first layer are part of the amplitude symbol sequences, and the input bits of the at least one second layer are another part of the amplitude symbol sequences. As another example, part of the first input bits are amplitude symbol sequences output by the distribution matcher, and another part are bit streams to be input to the first layer, and the input bits of the at least one second layer are all of the amplitude symbol sequences. The input bits of different layers in the at least one second layer can be different. In this application, an amplitude symbol of the I path is composed of (L-1) bits, the amplitude symbol of the I path can be converted into a bit sequence with a length of (L-1), an amplitude symbol of the Q path is composed of (L-1) bits, the amplitude symbol of the Q path can be converted into a bit sequence with a length of (L-1), the amplitude symbols corresponding to the I path and the Q path are composed of 2*(L-1) bits, and the amplitude symbols corresponding to the I path and the Q path can be converted into a bit sequence with a length of 2*(L-1), where L is an integer greater than 1. For example, an amplitude symbol is composed of 6 bits, and the amplitude symbol can be converted into a bit sequence with a length of 6. For ease of description, this application can regard the amplitude symbol as the bit sequence converted from the amplitude symbol.

[0128] In a possible implementation, the amplitude symbol sequence includes a first amplitude symbol and a second amplitude symbol. The first amplitude symbol is any amplitude symbol in the amplitude symbol sequence corresponding to an I path, i.e., the first amplitude symbol is an amplitude symbol of any I path in the amplitude symbol sequence, and the second amplitude symbol is any amplitude symbol in the amplitude symbol sequence corresponding to a Q path, i.e., the second amplitude symbol is an amplitude symbol of any Q path in the amplitude symbol sequence. Alternatively, the first amplitude symbol is any amplitude symbol in the amplitude symbol sequence corresponding to a Q path, and the second amplitude symbol is any amplitude symbol in the amplitude symbol sequence corresponding to an I path. The present application takes the first amplitude symbol corresponding to an I path and the second amplitude symbol corresponding to a Q path as an example for description. The first amplitude symbol and the second amplitude symbol can constitute an amplitude symbol corresponding to an I path and a Q path. In a possible design, the input bits of the distribution matcher correspond to an I path and a Q path, and the amplitude symbol sequence output by the distribution matcher includes a plurality of amplitude symbols corresponding to an I path and a Q path, and each amplitude symbol corresponding to an I path and a Q path can be divided into (or include) an amplitude symbol corresponding to an I path (for example, the first amplitude symbol) and an amplitude symbol corresponding to a Q path (for example, the second amplitude symbol). For example, an amplitude symbol corresponding to an I path and a Q path in the amplitude symbol sequence is i0q0i1q1i3q3, the first amplitude symbol is i0i1i3, and the second amplitude symbol is q0q1q3. In a possible design, when the input bits of the distribution matcher correspond to an I path, the distribution matcher outputs an amplitude symbol sequence corresponding to an I path, and the amplitude symbol sequence corresponding to an I path includes amplitude symbols of an I path and does not include amplitude symbols of a Q path; when the input bits of the distribution matcher correspond to a Q path, the distribution matcher outputs an amplitude symbol sequence corresponding to a Q path, and the amplitude symbol sequence corresponding to a Q path includes amplitude symbols of a Q path and does not include amplitude symbols of an I path. That is, the amplitude symbol sequence output by the distribution matcher includes an amplitude symbol sequence corresponding to an I path and an amplitude symbol sequence corresponding to a Q path. The first amplitude symbol is any amplitude symbol in the amplitude symbol sequence corresponding to an I path output by the distribution matcher, and the second amplitude symbol is any amplitude symbol in the amplitude symbol sequence corresponding to a Q path output by the distribution matcher. As an example, the amplitude symbol sequence corresponding to an I path output by the distribution matcher includes N I path amplitude symbols each having a length of (L-1), and the amplitude symbol sequence corresponding to a Q path output by the distribution matcher includes N Q path amplitude symbols each having a length of (L-1), and the N I path amplitude symbols correspond to the N Q path amplitude symbols one by one. In a possible design, the distribution matcher described above includes a first distribution matcher and a second distribution matcher; the input bits of the first distribution matcher correspond to an I path, and the first distribution matcher outputs an amplitude symbol sequence corresponding to an I path; the input bits of the second distribution matcher correspond to a Q path, and the second distribution matcher outputs an amplitude symbol sequence corresponding to a Q path. The amplitude symbol sequence output by the distribution matcher described above includes an amplitude symbol sequence corresponding to an I path and an amplitude symbol sequence corresponding to a Q path.As an example, the amplitude symbol sequence output by the first distribution matcher corresponding to the I path includes N amplitude symbols of the I path with a length of (L-1), and the amplitude symbol sequence output by the second distribution matcher corresponding to the Q path includes N amplitude symbols of the Q path with a length of (L-1), the N amplitude symbols of the I path corresponding one-to-one to the N amplitude symbols of the Q path.

[0129] The layered encoding further includes: the sending end taking the first check bit obtained by encoding the first layer as a first symbol bit, the first check bit corresponding to the I path, the first check bit corresponding to the first amplitude symbol, or in other words, the first symbol bit corresponding to the first amplitude symbol; when the first symbol bit takes a first value, adjusting the value of one or more bits of at least one second layer, and when the first symbol bit takes a second value, the value of the one or more bits remains unchanged. The one or more bits include part of the bits obtained by processing the first amplitude symbol by the second encoding manner, and / or the one or more bits include part of the bits in the first amplitude symbol and the corresponding layer is not encoded. Or, the one or more bits include part of the bits obtained by processing the part of the bits in the first amplitude symbol corresponding to at least one second layer by the second encoding manner, and / or the one or more bits include part of the bits in the first amplitude symbol and the corresponding layer is not encoded. For example, the first value is 0 and the second value is 1. As another example, the first value is 1 and the second value is 0. Adjusting the value of the one or more bits of at least one second layer means respectively adjusting the value of each bit in the one or more bits from 0 to 1 or from 1 to 0. For example, when the value of a bit is 0, adjusting the value of the bit means adjusting the value of the bit from 0 to 1; when the value of a bit is 1, adjusting the value of the bit means adjusting the value of the bit from 1 to 0. The first layer encodes the input bits to obtain check bits corresponding to the amplitude symbol of the I path (e.g., the first amplitude symbol) and check bits corresponding to the amplitude symbol of the Q path (e.g., the second amplitude symbol).

[0130] In a possible implementation, the first amplitude symbol is a bit sequence including 2 bits, the at least one second layer includes only one layer and corresponds to no coding, that is, the at least one second layer is a non-coding layer, the at least one second layer corresponds to the MSB of the first amplitude symbol, and the first layer corresponds to the LSB of the first amplitude symbol; the one or more bits are the MSB of the first amplitude symbol corresponding to the at least one second layer. The output bit of the hierarchical coding includes a first bit sequence, and the first bit sequence includes 3 bits; when the first symbol bit takes a second value, the MSB of the first bit sequence is the MSB of the first amplitude symbol, and when the first symbol bit takes a first value, the MSB of the first bit sequence is the MSB of the adjusted first amplitude symbol; the second MSB of the first bit sequence is the first symbol bit, and the LSB of the first bit sequence is the LSB of the first amplitude symbol; the first value is 0, and the second value is 1. In the embodiment of the application, the first bit sequence is a bit sequence corresponding to an I path. In the application, the fth MSB in any bit sequence refers to the fth bit in the bit sequence in the order from the highest bit to the lowest bit. Alternatively, in the application, the bits in any bit sequence are sequentially ordered in the order from the highest bit to the lowest bit as follows: MSB, second MSB, third MSB, fourth MSB, …, LSB.

[0131] As an example, the first amplitude symbol is any one of 11, 10, 00, and 01;

[0132] When the first amplitude symbol is 11, if the value of the first symbol bit is 0, the first bit sequence is 001, and if the value of the first symbol bit is 1, the first bit sequence is 111; or,

[0133] When the first amplitude symbol is 10, if the value of the first symbol bit is 0, the first bit sequence is 000, and if the value of the first symbol bit is 1, the first bit sequence is 110; or,

[0134] When the first amplitude symbol is 00, if the value of the first symbol bit is 0, the first bit sequence is 100, and if the value of the first symbol bit is 1, the first bit sequence is 010; or,

[0135] When the first amplitude symbol is 01, if the value of the first symbol bit is 0, the first bit sequence is 101, and if the value of the first symbol bit is 1, the first bit sequence is 011;

[0136] In the hierarchical coding modulation constellation, the distribution probabilities of 001 and 111 are the same, the distribution probabilities of 000 and 110 are the same, the distribution probabilities of 010 and 100 are the same, and the distribution probabilities of 101 and 011 are the same, as shown in FIG. 6. In this example, the probability distribution of the adjusted amplitude symbol sequence satisfies the axial symmetry feature.

[0137] In a possible implementation, the first amplitude symbol in the amplitude symbol sequence is a bit sequence including 3 bits, the at least one second layer includes only one layer and corresponds to no coding, the at least one second layer corresponds to the MSB and the second MSB of the first amplitude symbol, and the first layer corresponds to the LSB of the first amplitude symbol; the one or more bits are the MSB of the first amplitude symbol corresponding to the at least one second layer. The output bit of the hierarchical coding includes a first bit sequence, and the first bit sequence includes 4 bits; when the first symbol bit takes a second value, the MSB of the first bit sequence is the MSB of the first amplitude symbol, and when the first symbol bit takes a first value, the MSB of the first bit sequence is the MSB of the first amplitude symbol after adjustment; the second MSB of the first bit sequence is the second MSB of the first amplitude symbol, the third MSB of the first bit sequence is the first symbol bit, and the LSB of the first bit sequence is the LSB of the first amplitude symbol; wherein the first value is 0, and the second value is 1.

[0138] As an example, the first amplitude symbol is any one of 001, 000, 100, 101, 011, 010, 110, and 111;

[0139] When the first amplitude symbol is 001, if the value of the first symbol bit is 0, the first bit sequence is 1001, and if the value of the first symbol bit is 1, the first bit sequence is 0011; or,

[0140] When the first amplitude symbol is 000, if the value of the first symbol bit is 0, the first bit sequence is 1000, and if the value of the first symbol bit is 1, the first bit sequence is 0010; or,

[0141] When the first amplitude symbol is 100, if the value of the first symbol bit is 0, the first bit sequence is 0000, and if the value of the first symbol bit is 1, the first bit sequence is 1010; or,

[0142] When the first amplitude symbol is 101, if the value of the first symbol bit is 0, the first bit sequence is 0001, and if the value of the first symbol bit is 1, the first bit sequence is 1011; or,

[0143] When the first amplitude symbol is 011, if the value of the first symbol bit is 0, the first bit sequence is 1101, and if the value of the first symbol bit is 1, the first bit sequence is 0111; or,

[0144] When the first amplitude symbol is 010, if the value of the first symbol bit is 0, the first bit sequence is 1100, and if the value of the first symbol bit is 1, the first bit sequence is 0110; or,

[0145] When the first amplitude symbol is 110, if the first symbol bit takes the value 0, the first bit sequence is 0100, and if the first symbol bit takes the value 1, the first bit sequence is 1110; or,

[0146] When the first amplitude symbol is 111, if the first symbol bit takes the value 0, the first bit sequence is 0101, and if the first symbol bit takes the value 1, the first bit sequence is 1111.

[0147] In the hierarchical coding modulation constellation, the distribution probabilities of 1001 and 0011 are the same, the distribution probabilities of 1000 and 0010 are the same, the distribution probabilities of 0000 and 1010 are the same, the distribution probabilities of 0001 and 1011 are the same, the distribution probabilities of 1101 and 0111 are the same, the distribution probabilities of 1100 and 0110 are the same, the distribution probabilities of 0100 and 1110 are the same, and the distribution probabilities of 0101 and 1111 are the same, as shown in FIG. 8. FIG. 8 shows a schematic diagram of the I path of another hierarchical coding modulation constellation. In this example, the probability distribution of the adjusted amplitude symbol sequence satisfies the axial symmetry feature.

[0148] In a possible implementation, the first input bit includes a first part and a second part, the first part is the amplitude symbol sequence output by the distribution matcher, and the second part includes a second bit sequence. The first amplitude symbol is a bit sequence including 3 bits. The at least one second layer includes a third layer and a fourth layer. The third layer corresponds to no coding, and the fourth layer corresponds to a second coding mode. The third layer corresponds to the MSB of the first amplitude symbol, and the fourth layer corresponds to the second MSB and the LSB of the first amplitude symbol. The input of the first layer is the second bit sequence. The one or more bits are the MSB of the first amplitude symbol and the first bit. The first bit is a bit corresponding to the second MSB of the first amplitude symbol, which is obtained by processing the second MSB and the LSB of the first amplitude symbol by the second coding mode. The output bit of the hierarchical coding includes a first bit sequence. The first bit sequence includes 4 bits. When the first symbol bit takes the second value, the MSB of the first bit sequence is the MSB of the first amplitude symbol, and the third MSB of the first bit sequence is the first bit. When the first symbol bit takes the first value, the MSB of the first bit sequence is the MSB of the adjusted first amplitude symbol, and the third MSB of the first bit sequence is the adjusted first bit. The second MSB of the first bit sequence is the second bit, and the LSB of the first bit sequence is the first symbol bit. The second bit is a bit corresponding to the second MSB of the first amplitude symbol, which is obtained by processing the second MSB and the LSB of the first amplitude symbol by the second coding mode.

[0149] As an example, the first amplitude symbol is any one of 001, 000, 100, 101, 011, 010, 110, and 111.

[0150] When the first amplitude symbol is 001, if the value of the first symbol bit is 0, the first bit sequence is 1000, and if the value of the first symbol bit is 1, the first bit sequence is 0011; or,

[0151] When the first amplitude symbol is 100, if the value of the first symbol bit is 0, the first bit sequence is 0010, and if the value of the first symbol bit is 1, the first bit sequence is 1001; or,

[0152] When the first amplitude symbol is 000, if the value of the first symbol bit is 0, the first bit sequence is 1010, and if the value of the first symbol bit is 1, the first bit sequence is 0001; or,

[0153] When the first amplitude symbol is 101, if the value of the first symbol bit is 0, the first bit sequence is 0000, and if the value of the first symbol bit is 1, the first bit sequence is 1011; or,

[0154] When the first amplitude symbol is 011, if the value of the first symbol bit is 0, the first bit sequence is 1100, and if the value of the first symbol bit is 1, the first bit sequence is 0111; or,

[0155] When the first amplitude symbol is 110, if the value of the first symbol bit is 0, the first bit sequence is 0110, and if the value of the first symbol bit is 1, the first bit sequence is 1101; or,

[0156] When the first amplitude symbol is 010, if the value of the first symbol bit is 0, the first bit sequence is 1110, and if the value of the first symbol bit is 1, the first bit sequence is 0101; or,

[0157] When the first amplitude symbol is 111, if the value of the first symbol bit is 0, the first bit sequence is 0100, and if the value of the first symbol bit is 1, the first bit sequence is 1111; or,

[0158] Wherein, in the hierarchical coding modulation constellation, the distribution probability of 1000 and 0011 is the same, the distribution probability of 1001 and 0010 is the same, the distribution probability of 1010 and 0001 is the same, the distribution probability of 0000 and 1011 is the same, the distribution probability of 1100 and 0111 is the same, the distribution probability of 0110 and 1101 is the same, the distribution probability of 1110 and 0101 is the same, and the distribution probability of 0100 and 1111 is the same, refer to FIG. 9. FIG. 9 shows a schematic diagram of the I path of another hierarchical coding modulation constellation. In this example, the probability distribution of the adjusted amplitude symbol sequence satisfies the axial symmetry feature.

[0159] It should be understood that only some possible implementations and examples are listed above, instead of all possible implementations and examples. In this application, the length of the first amplitude symbol, the length of the first bit sequence, the first encoding mode, and the second encoding mode are not limited. Modulation schemes based on the probability amplitude shaping technique using the above principles all belong to the protection scope of this application.

[0160] The hierarchical encoding further includes that the sending end takes the second check bit obtained by encoding the first layer as a second symbol bit, the second check bit corresponds to the Q path, the second check bit corresponds to the second amplitude symbol, or in other words, the second symbol bit corresponds to the second amplitude symbol; when the second symbol bit takes the first value, the value of one or more bits of at least one second layer is adjusted, and when the second symbol bit takes the second value, the value of the one or more bits remains unchanged. The one or more bits include part of the bits obtained by processing the second amplitude symbol by the second encoding mode, and / or the one or more bits include part of the bits in the second amplitude symbol and the corresponding layer is not encoded. Alternatively, the one or more bits include part of the bits obtained by processing the part of the bits in the second amplitude symbol corresponding to at least one second layer by the second encoding mode, and / or the one or more bits include part of the bits in the second amplitude symbol and the corresponding layer is not encoded.

[0161] The output bits of the hierarchical encoding of the sending end on the first input bits include a bit sequence corresponding to the I path (for example, the first bit sequence described above) and a bit sequence corresponding to the Q path. The bit sequence corresponding to the I path included in the output bits of the hierarchical encoding is obtained by the sending end hierarchically encoding the amplitude symbol of the I path. Alternatively, the sending end hierarchically encodes the amplitude symbol of the I path to obtain the bit sequence corresponding to the I path. The bit sequence corresponding to the Q path included in the output bits of the hierarchical encoding is obtained by the sending end hierarchically encoding the amplitude symbol of the Q path. Alternatively, the sending end hierarchically encodes the amplitude symbol of the Q path to obtain the bit sequence corresponding to the Q path. The sending end can hierarchically encode the amplitude symbol of the I path and the amplitude symbol of the Q path in the same way. Alternatively, the sending end can obtain the bit sequence corresponding to the I path and the bit sequence corresponding to the Q path in the same way, which will not be described here.

[0162] 702、The sending end maps the output bits of the hierarchical encoding based on the hierarchical encoding modulation constellation to obtain the first modulation symbol.

[0163] In a possible implementation, the output bits of the layered encoding include a plurality of bit sequences to be mapped by the layered encoding modulation constellation, and each bit sequence to be mapped by the layered encoding modulation constellation is composed of a bit sequence corresponding to the I path (for example, the first bit sequence described above) and a bit sequence corresponding to the Q path. In other words, each bit sequence to be mapped by the layered encoding modulation constellation contains a bit sequence corresponding to the I path (for example, the first bit sequence described above) and a bit sequence corresponding to the Q path. As an example, each bit sequence to be mapped by the layered encoding modulation constellation can be represented as i0 q0 i1 q1 i2 q2 i3 q3, or in other words, i0 q0 i1 q1 i2 q2 i3 q3 is a bit sequence to be mapped by the layered encoding modulation constellation, where i0 i1 i2 i3 is a bit sequence corresponding to the I path, and q0 q1 q2 q3 is a bit sequence corresponding to the Q path. The sending end mapping the output bits of the layered encoding based on the layered encoding modulation constellation can be that the sending end maps each bit sequence to be mapped by the layered encoding modulation constellation included in the output bits of the layered encoding based on the layered encoding modulation constellation, to obtain a plurality of modulation symbols.

[0164] In a possible implementation, the output bits of the layered encoding include a plurality of bit sequences corresponding to the I path and a plurality of bit sequences corresponding to the Q path, and the plurality of bit sequences corresponding to the I path and the plurality of bit sequences corresponding to the Q path are in one-to-one correspondence. As an example, the sending end first encodes the bits corresponding to the I path in the first input bits, to output a plurality of bit sequences corresponding to the I path; and then encodes the bits corresponding to the Q path in the first input bits, to output a plurality of bit sequences corresponding to the Q path. The sending end mapping the output bits of the layered encoding based on the layered encoding modulation constellation can be that the sending end maps a bit sequence composed of a bit sequence corresponding to the I path and a bit sequence corresponding to the Q path corresponding to the bit sequence based on the layered encoding modulation constellation, to obtain a plurality of modulation symbols. In the bit sequence composed of a bit sequence corresponding to the I path and a bit sequence corresponding to the Q path corresponding to the bit sequence, each bit in the bit sequence corresponding to the I path is located at an odd position, and each bit in the bit sequence corresponding to the Q path is located at an even position. As an example, the bit sequence corresponding to the I path is i0 i1 i2 i3, the bit sequence corresponding to the Q path corresponding to the bit sequence is q0 q1 q2 q3, and the bit sequence composed of the bit sequence corresponding to the I path and the bit sequence corresponding to the Q path corresponding to the bit sequence is i0 q0 i1 q1 i2 q2 i3 q3.

[0165] 703、The sending end obtains a second signal based on the first modulation symbol.

[0166] The second signal corresponds to the first modulation symbol. The transmitter can obtain the second signal based on the plurality of modulation symbols (including the first modulation symbol) obtained in step 702. The transmitter can obtain the second signal from the modulation symbols according to the conventional techniques in the art, which will not be described herein.

[0167] 704. The transmitter transmits the second signal to the receiver.

[0168] Correspondingly, the receiver receives the first signal, which is the signal transmitted by the transmitter and received by the receiver after being transmitted through the wireless channel. The first signal corresponds to the first modulation symbol. The receiver can obtain one or more modulation symbols based on the first signal, which includes the first modulation symbol.

[0169] 705. The receiver obtains the sequence of amplitude symbols based on the first signal and the layered encoding modulation constellation.

[0170] The receiver can demodulate and decode each modulation symbol obtained based on the first signal in the same way to obtain the sequence of amplitude symbols; wherein each modulation symbol corresponds to an amplitude symbol in the I path and an amplitude symbol in the Q path in the sequence of amplitude symbols. Or, demodulating and decoding a modulation symbol can obtain an amplitude symbol in the I path and an amplitude symbol in the Q path. Or, demodulating and decoding a modulation symbol can obtain an amplitude symbol corresponding to the I path and the Q path. The following will be described taking the receiver demodulating and decoding the first modulation symbol as an example.

[0171] In a possible implementation, the receiving end demodulates and decodes the first modulation symbol to obtain system bits corresponding to the first layer, first check bits corresponding to the first layer, second check bits corresponding to the first layer, and system bits corresponding to at least one second layer. The demodulation includes demodulating the first modulation symbol based on a hierarchical encoding modulation constellation to obtain a third bit sequence corresponding to the first layer and fourth bit sequences respectively corresponding to one second layer. The decoding includes: the receiving end first decodes the third bit sequence to obtain the system bits corresponding to the first layer, the first check bits corresponding to the first layer, and the second check bits corresponding to the first layer, the first check bits corresponding to an I path, and the second check bits corresponding to a Q path; then, taking the first check bits as a first symbol bit, when the first symbol bit takes a first value, adjusting the values of one or more third bits in the fourth bit sequence respectively corresponding to at least one second layer, when the first symbol bit takes a second value, the values of the one or more third bits remain unchanged, and the one or more third bits correspond to the I path; taking the second check bits as a second symbol bit, when the second symbol bit takes a first value, adjusting the values of one or more fourth bits in the fourth bit sequence respectively corresponding to at least one second layer, when the second symbol bit takes a second value, the values of the one or more fourth bits remain unchanged, and the one or more fourth bits correspond to the Q path; and then, decoding the fourth bit sequence respectively corresponding to at least one second layer to obtain system bits corresponding to at least one second layer. The plurality of third bits are different bits in the fourth bit sequence, and the plurality of fourth bits are different bits in the fourth bit sequence. When the first symbol bit and / or the second symbol bit takes the first value, the receiving end first adjusts the values of one or more bits in the fourth bit sequence respectively corresponding to at least one second layer; and then, decodes the fourth bit sequence respectively corresponding to at least one second layer after adjustment. When the first symbol bit and the second symbol bit both take the second value, the values of the bits in the fourth bit sequence respectively corresponding to at least one second layer remain unchanged; and the receiving end decodes the fourth bit sequence respectively corresponding to at least one second layer.

[0172] As an example, the at least one second layer includes only one layer and corresponds to no encoding, the fourth bit sequence respectively corresponding to the at least one second layer is i0 q0, the first check bits corresponding to the first layer are i1, the second check bits corresponding to the first layer are q1, the system bits corresponding to the first layer are i2 q2, the one or more third bits are i0, and the one or more fourth bits are q0.

[0173] As another example, the at least one second layer includes only one layer and corresponds to no encoding, the fourth bit sequence corresponding to the at least one second layer is i0q0i1q1, the first check bit corresponding to the first layer is i2, the second check bit corresponding to the first layer is q2, the system bit corresponding to the first layer is i3q3, the one or more third bits are i0, and the one or more fourth bits are q0.

[0174] As another example, the at least one second layer includes a third layer and a fourth layer, the third layer corresponds to no encoding, the fourth layer corresponds to a second encoding manner, the fourth bit sequence corresponding to the third layer is i0q0, the fourth bit sequence corresponding to the fourth layer is i1q1i2q2, the first check bit corresponding to the first layer is i3, the second check bit corresponding to the first layer is q3, the one or more third bits are i0 and i2, and the one or more fourth bits are q0 and q2.

[0175] After the receiving end demodulates and decodes the first modulation symbol, the following operations can be performed: based on all or part of the system bits corresponding to at least one second layer, the amplitude symbol sequence to be input to the de-matching unit is obtained, or based on all or part of the system bits corresponding to the first layer and at least one second layer, the amplitude symbol sequence to be input to the de-matching unit is obtained. As an example, the at least one second layer only includes one layer and corresponds to no encoding, the system bits corresponding to the at least one second layer include a plurality of bit sequences #1 of length 2, i0q0 represents one bit sequence #1, the system bits corresponding to the first layer include a plurality of bit sequences #2 of length 2, i1q1 represents one bit sequence #2, and the plurality of bit sequences #1 correspond to the bit sequences #2 one by one; the receiving end combines each bit sequence #1 with the bit sequence #2 corresponding to the bit sequence #1 to obtain one amplitude symbol, i0q0i1q1. The two bit sequences #1 can be different, and the two bit sequences #2 can be different. As another example, the system bits corresponding to the at least one second layer include a plurality of bit sequences #3 of length 4, i0q0i1q1 represents one bit sequence #3, the system bits corresponding to the first layer include a plurality of bit sequences #4 of length 2, i2q2 represents one bit sequence #4, and the plurality of bit sequences #3 correspond to the bit sequences #4 one by one; the receiving end combines each bit sequence #3 with the bit sequence #4 corresponding to the bit sequence #3 to obtain one amplitude symbol, i0q0i1q1i2q2. The two bit sequences #3 can be different, and the two bit sequences #4 can be different. As another example, the at least one second layer includes a third layer and a fourth layer, the third layer corresponds to no encoding, the fourth layer corresponds to a second encoding mode, the system bits corresponding to the third layer include a plurality of bit sequences #5 of length 2, i0q0 represents one bit sequence #5, the system bits corresponding to the fourth layer include a plurality of bit sequences #6 of length 4, i1q1i2q2 represents one bit sequence #4, and the plurality of bit sequences #5 correspond to the bit sequences #6 one by one; the receiving end combines each bit sequence #5 with the bit sequence #6 corresponding to the bit sequence #5 to obtain one amplitude symbol, i0q0i1q1i2q2. The two bit sequences #5 can be different, and the two bit sequences #6 can be different.

[0176] 706、The receiving end inputs the amplitude symbol sequence to the de-matching unit to obtain target system bits.

[0177] The target system bits are the system bits sent by the sending end. The target system bits are the input bits of the de-matching unit.

[0178] In the embodiment, the first input bits are hierarchically coded by the sending end, so that the probability distribution of the adjusted amplitude symbol sequence satisfies the axisymmetric characteristic; the performance gain brought by the probability amplitude shaping is maintained, and the advantage of reducing the decoding complexity of hierarchical coding modulation is also possessed.

[0179] The following describes a possible implementation of step 701 in FIG. 7 and a corresponding example in detail in combination with FIG. 10A. FIG. 10A is a schematic diagram of a hierarchical coding process provided by the embodiment. In the hierarchical coding process shown in FIG. 10A, the hierarchical coding includes coding of the first layer and coding of at least one second layer, the at least one second layer includes only one layer and corresponds to no coding, that is, the at least one second layer is a non-coding layer. Referring to FIG. 10A, the main steps of hierarchically coding the second input bits by the sending end are as follows:

[0180] 101. The sending end inputs the second input bits into the distribution matcher to obtain an amplitude symbol sequence.

[0181] The second input bits are bit sequences that the sending end needs to send to the receiving end and expects the receiving end to obtain. The second input bits are the target system bits. The second input bits can be referred to as original system bits or original information bits or original information bit sequences. Optionally, the 0 and 1 in the second input bits are equally distributed. The amplitude symbol sequence {A0, A1, …, A N-1} output by the distribution matcher has the characteristic of unequal probability distribution. In a possible implementation, the amplitude symbols on the I path and the amplitude symbols on the Q path in the amplitude symbol sequence each have Q amplitudes, and the probability of each amplitude is {P1, P2, …, P Q}. The probability of each amplitude can be generated according to a preconfigured parameter. Q is an integer greater than 1. In the embodiment, the hierarchical coding modulation constellation is composed of 2*L bits, that is, the I path and the Q path of the hierarchical coding modulation constellation each include L bits, each amplitude symbol on the I path in the amplitude symbol sequence includes (L-1) bits, and each amplitude symbol on the Q path includes (L-1) bits, and L is an integer greater than 2. For example, L is 6, 8, 10, 12, and the like, which are not limited in the embodiment. The corresponding amplitude symbols on the I path and the Q path in the amplitude symbol sequence can be represented as i0 q0 i1 q1…i (L-2) q (L-2) , each amplitude symbol on the I path in the amplitude symbol sequence can be represented as i0i1…i (L- 2) , and each amplitude symbol on the Q path in the amplitude symbol sequence can be represented as q0 q1…q (L-2)Figure 10B is a schematic diagram of another hierarchical coding flow provided by the embodiments of the present application. For the purpose of understanding the method flow shown in Figure 10A, Figure 10B takes an example of mapping one amplitude index to a bit sequence to be mapped using a hierarchical coding modulation constellation to describe the flow shown in Figure 10A. Referring to Figure 10B, the input of the distribution matcher is the second input bit, and the output is the amplitude symbol sequence. The operation of the distribution matcher to process the second input bit to output the amplitude symbol sequence is step 101 in Figure 10A. Each amplitude symbol in the amplitude symbol sequence output by the distribution matcher is composed of two groups of bits, {i0, q0, i1, q1, … i (M-1) , (M-1)} and {i M , M , i (M+1) , (M+1) , … i (L-2) , (L-2)}, where the former group of bits corresponds to the non-coding layer, and the latter group of bits corresponds to the LDPC layer (or the LDPC coding layer). In the present application, {i0, q0, i1, q1, … i (M-1) , (M-1)} has the same meaning as the bit sequence i0q0i1q1…i (M-1) q (M-1)}, and the value of M is not limited.

[0182] 102. The sending end obtains a first amplitude bit sequence and a second amplitude bit sequence based on the amplitude symbol sequence.

[0183] The first amplitude bit sequence corresponds to the LDPC layer (i.e., the first layer described above), and the second amplitude bit sequence corresponds to the non-coding layer (i.e., the at least one second layer described above). The first amplitude bit sequence contains i M q M i (M+1) q (M+1) …i (L-2) q (L-2) of each amplitude symbol (corresponding to the I path and the Q path) in the amplitude symbol sequence, and the second amplitude bit sequence contains i0q0i1q1…i (M-1) q (M-1) of each amplitude symbol in the amplitude symbol sequence. M is an integer greater than 1, and L is an integer greater than 2. The embodiments of the present application take an example of the amplitude symbol sequence containing the amplitude symbols corresponding to the I path and the Q path to describe the embodiments. The first amplitude bit sequence contains N groups of bit sequences, and each group of bit sequences is i M q M i (M+1) q (M+1) …i (L-2) q(L-2) ; the second amplitude bit sequence comprises N groups of bit sequences, each group of bit sequences being i0q0i1q1…i (M-1) q (M-1) ; the N groups of bit sequences comprised by the first amplitude bit sequence correspond one by one to the N groups of bit sequences comprised by the second amplitude bit sequence. As an example, the amplitude symbol sequence output by the distribution matcher is {A0, A1, …, AL-1}, the first amplitude bit sequence is {A′0, A′1, …, A′ N-1}, A′ N-1 i i q i i M q M i (M+1) q (M+1) …i (L-2) q (L-2) ; the second amplitude bit sequence is {A″0, A″1, …, A″ N-1}, A″ i i i q (M-1) i (M-1) q i i i q i , A′ N-1 corresponds to A″ M . i is an integer greater than or equal to 0, and i is less than or equal to (L-2), L being an integer greater than 2. A M is any one of A0, A1, …, AL-1. M is an integer greater than or equal to 1, and N is an integer greater than 1. The sending end can obtain (or extract) i (M+1) q (M+1) i (L-2) q (L-2) of each amplitude symbol in the amplitude symbol sequence in order according to the order (e.g. from left to right) of each amplitude symbol in the amplitude symbol sequence, to obtain the first amplitude bit sequence; and obtain i0q0i1q1…i (M-1) q (M-1) of each amplitude symbol in the amplitude symbol sequence in order according to the order (e.g. from left to right) of each amplitude symbol in the amplitude symbol sequence, to obtain the second amplitude bit sequence.

[0184] Referring to FIG. 10B, the sending end obtains {i M ,q M ,i (M+1) ,q (M+1) …i (L-2) ,q (L-2)} is LDPC encoded. The transmitting end performs LDPC encoding on {i} in the amplitude symbol. M ,q M i (M+1) ,q (M+1) …i (L-2) ,q (L-2) Before performing LDPC encoding, each amplitude symbol is first divided into {i0, q0, i1, q1, ... i}. (M-1) ,q (M-1)} and {i M ,q M i (M+1) ,q (M+1) …i (L-2) ,q (L-2)}, or in other words, to obtain (extract) {i0,q0,i1,q1,…i} from each amplitude symbol. (M-1) ,q (M-1)} and {i M ,q M i (M+1) ,q (M+1) …i (L-2) ,q (L-2) The transmitting end divides each amplitude symbol into {i0, q0, i1, q1, ... i}. (M-1) ,q (M-1)} and {i M ,q M i (M+1) ,q (M+1) …i (L-2) ,q (L-2) The operation corresponds to step 102 above, wherein the first amplitude bit sequence contains {i} in each amplitude symbol. M ,q M i (M+1) ,q (M+1) …i (L-2) ,q (L-2) The second amplitude bit sequence contains {i0, q0, i1, q1, ..., i} in each amplitude symbol. (M-1) ,q (M-1)}

[0185] 103. The transmitting end performs LDPC encoding on the first amplitude bit sequence to obtain the check bit sequence.

[0186] The first encoding mode is LDPC encoding. The first amplitude bit sequence includes 2N*(L-1-M), i.e., the LDPC layer corresponds to a sequence composed of 2N*(L-1-M) bits. The check bit sequence includes 2N check bits. In actual application, when the number of bits included in the first amplitude bit sequence exceeds 2N*(L-1-M) or is less than 2N*(L-1-M), appropriate puncturing or padding operation is performed. After the first amplitude bit sequence is subjected to LDPC encoding, the target is to generate a check bit sequence including 2N check bits. When the number of check bits included in the check bit sequence exceeds 2N or is less than 2N, appropriate rate matching is also performed, i.e., puncturing or padding operation is performed, so that the check bit sequence includes 2N check bits. Since the 0 and 1 of the check bit sequence generated after LDPC encoding and rate matching are equally distributed, the check bits in the check bit sequence can be used as symbol bits corresponding to the amplitude symbol. Referring to FIG. 10B, the sending end performs LDPC encoding on the amplitude symbol {i0q0, i1q1, …, iNqN} corresponding to the I path and the Q path, to obtain a check bit sequence {c0c’0, c1c’1, …, cNc’N}. M M (M+1) (M+1) (L-2) (L-2)} corresponding to the I path and the Q path. i i , which represent two check bits corresponding to one amplitude symbol. i corresponding to the I path. i corresponding to the Q path.

[0187] 104. The sending end adjusts the value of a bit in the second amplitude bit sequence based on a check bit in the check bit sequence.

[0188] In a possible implementation, the check bit sequence includes N check bits corresponding to the I path and N check bits corresponding to the Q path. Alternatively, the check bit sequence includes N groups of bit sequences, and each group of bit sequences includes two check bits. For example, the check bit sequence is c0c’0c1c’1…cNc’N, where c0, c1, …, cN represent N check bits corresponding to the I path, and c’0, c’1, …, c’N represent N check bits corresponding to the Q path. (N-1) (N-1) , where c0, c1, …, cN represent N check bits corresponding to the I path, and c’0, c’1, …, c’N represent N check bits corresponding to the Q path. (N-1) corresponding to the I path. (N-1) corresponding to the Q path. (M-1) (M-1) , where i0, i1, …, iN represent the bit sequence corresponding to the I path in the group of bit sequences, and q0, q1, …, qN represent the bit sequence corresponding to the Q path in the group of bit sequences. (M-1) (M-1) ​​​​​​​​​is the bit sequence corresponding to the Q path in the i-th group of bit sequences. Since the second amplitude bit sequence comprises N groups of bit sequences, each group of bit sequences comprises a bit sequence corresponding to the I path and a bit sequence corresponding to the Q path, the second amplitude bit sequence comprises N groups of bit sequences corresponding to the I path and N groups of bit sequences corresponding to the Q path. The N check bits corresponding to the I path in the check bit sequence correspond one-to-one to the N groups of bit sequences corresponding to the I path in the second amplitude bit sequence, and the N check bits corresponding to the Q path in the check bit sequence correspond one-to-one to the N groups of bit sequences corresponding to the Q path in the second amplitude bit sequence. In other words, when any check bit in the check bit sequence corresponds to the I path, the check bit corresponds to a group of bit sequences corresponding to the I path in the second amplitude bit sequence, and when the check bit corresponds to the Q path, the check bit corresponds to a group of bit sequences corresponding to the Q path in the second amplitude bit sequence. As an example, the check bit sequence is c0c'0c1c'1... c (N-1) c' (N-1) , the second amplitude bit sequence is {A"0, A"1,..., A" N-1}, each of A"0, A"1,..., A" N-1 represents a group of bit sequences, c i corresponds to i0i1...i i in A" (M-1) , c' i corresponds to q0q1...q i in A" (M-1) , c i is any one of c0, c1, c2,..., c (N-1) , c' i is any one of c'0, c'1, c'2,..., c' (N-1) , and A" i is any one of A"0, A"1,..., A" N-1 .

[0189] The sending end adjusts the value of a bit in the second amplitude bit sequence based on a check bit in the check bit sequence can be: the sending end adjusts the value of one or more bits in a group of bit sequences in the second amplitude bit sequence corresponding to each check bit in the check bit sequence based on the check bit. In one possible implementation, the check bit sequence is c0c'0c1c'1... c (N-1) c' (N-1) , the second amplitude bit sequence is {A"0, A"1,..., A" N-1}, each of A"0, A"1,..., A" N-1 represents a group of bit sequences, c i corresponds to i0i1...i i in A" (M-1) , c'i Corresponding to A″ i q0 q1…q (M-1) c i Let c0, c1, c2, ..., c (N-1) any one of them, c' i Let c'0, c'1, c'2, ..., c' (N-1) Any one of them, A″ i is A″0,A″1,…,A″ N-1 Any one of them; the sender will send c i As A″ i i0i1…i (M-1) The corresponding sign bit, when c i When the value is the first value, adjust A″. i i0i1…i (M-1) The value of one or more bits in c i When A″ takes the second value, i i0i1…i (M-1) The values ​​of c' remain unchanged; i As A″ i q0 q1…q (M-1) The corresponding sign bit, when c' i When the value is the first value, adjust A″. i q0 q1…q (M-1) The value of one or more bits in c' i When A″ takes the second value, i q0 q1…q (M-1) The values ​​of all remain unchanged. Referring to Figure 10B, the adjustment operation represents adjusting {i0, q0, i1, q1, ... i} based on the parity bits. (M-1) ,q (M-1) The values ​​of the bits in} correspond to step 104 above.

[0190] As an example, each bit sequence in the second amplitude bit sequence is represented by i0 q0, where i0 is the bit corresponding to the I-path in that bit sequence, q0 is the bit corresponding to the Q-path in that bit sequence, and A″ i For any group of bits in the second amplitude bit sequence; the transmitter will use c i As A″ i The sign bit corresponding to i0 in c i When the value is the first value, adjust A″. i The value of i0 in c, when c i When A″ takes the second value, i The value of i0 in c' remains unchanged; i As A″ icorresponding to the symbol bits of i0i1in A" i corresponding to the symbol bits of i0i1in A" i corresponding to the symbol bits of i0i1in A" i corresponding to the symbol bits of i0i1in A" i corresponding to the symbol bits of i0i1in A"

[0191] As another example, each group of bit sequences in the second amplitude bit sequence is denoted by i0q0i1q1, i0i1is the bit sequence corresponding to the I path in the group of bit sequences, q0q1is the bit sequence corresponding to the Q path in the group of bit sequences, A" i corresponding to the symbol bits of i0q0i1q1in A" i corresponding to the symbol bits of i0q0i1q1in A" i corresponding to the symbol bits of i0q0i1q1in A" i corresponding to the symbol bits of i0q0i1q1in A" i corresponding to the symbol bits of i0q0i1q1in A" i corresponding to the symbol bits of i0q0i1q1in A" i corresponding to the symbol bits of i0q0i1q1in A" i corresponding to the symbol bits of i0q0i1q1in A" i corresponding to the symbol bits of i0q0i1q1in A" i corresponding to the symbol bits of i0q0i1q1in A" i corresponding to the symbol bits of i0q0i1q1in A" i corresponding to the symbol bits of i0q0i1q1in A" i corresponding to the symbol bits of i0q0i1q1in A"

[0192] 105、The sending end maps the first amplitude bit sequence, the adjusted second amplitude bit sequence, and the check bit sequence to constellation points to obtain output bits.

[0193] In other words, the sending end obtains the output bits according to the first amplitude bit sequence, the adjusted second amplitude bit sequence, and the check bit sequence. In yet another aspect, the sending end combines the first amplitude bit sequence, the adjusted second amplitude bit sequence, and the check bit sequence to obtain the output bits. The output bits of the hierarchical encoding include N constellation points. In other words, the output bits of the hierarchical encoding include N bit sequences, each bit sequence being a constellation point in the hierarchical encoding modulation constellation. The N bit sequences are obtained by the sending end according to the N groups of bit sequences in the first amplitude bit sequence, the N groups of bit sequences in the adjusted second amplitude bit sequence, and the N groups of bit sequences contained in the check bit sequence. The adjusted second amplitude bit sequence is the second amplitude bit sequence obtained by the sending end after performing step 104.

[0194] In a possible implementation manner, the first amplitude bit sequence contains N groups of bit sequences which are in one-to-one correspondence with N groups of bit sequences contained in the second amplitude bit sequence, and the N groups of bit sequences contained in the check bit sequence are in one-to-one correspondence with the N groups of bit sequences contained in the first amplitude bit sequence; the sending end can map a bit sequence #i0 (a group of bit sequences) in the first amplitude bit sequence, a bit sequence #i1 (a group of bit sequences) in the second amplitude bit sequence, and a bit sequence #i2 (a group of bit sequences) in the check bit sequence into a constellation point (or a bit sequence); where the bit sequence #i0 corresponds to the bit sequence #i1, the bit sequence #i1 corresponds to the bit sequence #i2, and the bit sequence #i0 corresponds to the bit sequence #i2. As an example, i0 q0 i1 q1…i (M-1) q (M-1) represents a group of bit sequences (for example, a bit sequence #i1) in the adjusted second amplitude bit sequence, i M q M i (M+1) q (M+1) …i (L-2) q (L-2) is a group of bit sequences (for example, a bit sequence #i0) in the first amplitude bit sequence, c i c’ i is a group of bit sequences (a bit sequence #i2) in the check bit sequence; the sending end maps i0 q0 i1 q1…i (M-1) q (M-1) , i M q M i (M+1) q (M+1) …i (L-2) q (L-2) and c i c’ i into a constellation point, that is, i0 q0 i1 q1…i (M-1) q (M-1) c i c’ I i M q M i (M+1) q (M+1) …i (L-2) q (L-2) . For example, M is 2, and L is 4. Referring to FIG. 10B, the mapping processing is to map i M q M i (M+1) q (M+1) …i (L-2) q (L-2) , c i c’ i and adjusted i0 q0 i1 q1…i(M-1) q (M-1) , mapping to a constellation point, i0q0i1q1... (M-1) q (M-1) c i c’ I i M q M i (M+1) q (M+1) ...i (L-2) q (L-2) , the mapping process corresponding to step 105.

[0195] 106. The sending end maps the output bits of the layered encoding based on the layered encoding modulation constellation.

[0196] The output bits of the layered encoding include N bit sequences, each bit sequence being a constellation point in the layered encoding modulation constellation. The sending end mapping the output bits of the layered encoding based on the layered encoding modulation constellation can be mapping each bit sequence included in the output bits of the layered encoding to a modulation symbol.

[0197] The application also provides another layered encoding procedure. In the layered encoding procedure, the layered encoding includes encoding of a first layer and encoding of at least one second layer, the at least one second layer including only one layer and corresponding to the second encoding mode. The layered encoding procedure can be based on the layered encoding procedure shown in FIG. 10A, with the addition of the sending end encoding the second amplitude bit sequence using the second encoding mode. Specifically, the sending end, after performing step 102, encodes the second amplitude bit sequence using the second encoding mode. The second amplitude bit sequence in step 104 is the encoded second amplitude bit sequence.

[0198] The sending end performing the layered encoding procedure shown in FIG. 10A can make the probability distribution of the adjusted amplitude symbol sequence satisfy the axial symmetry feature; maintain the performance gain brought by the probability amplitude shaping, and also have the advantage of reducing the decoding complexity of the layered encoding modulation.

[0199] The following describes another possible implementation of step 701 in FIG. 7 and the corresponding example in detail in combination with FIG. 10C. FIG. 10C is a schematic diagram of another layered encoding procedure provided by an embodiment of the application. In the layered encoding procedure shown in FIG. 10C, the layered encoding includes encoding of a first layer and encoding of at least one second layer, the at least one second layer including a third layer and a fourth layer, the third layer corresponding to no encoding, and the fourth layer corresponding to the second encoding mode. Referring to FIG. 10C, the main steps of the sending end encoding the second input bit are as follows:

[0200] 201. The sending end inputs the second input bit to the distribution matcher to obtain an amplitude symbol sequence.

[0201] Step 201 can refer to step 201 in FIG. 10A. FIG. 10D is a schematic diagram of another hierarchical coding flow provided by the embodiments of the present application. In order to facilitate understanding of the method flow shown in FIG. 10C, FIG. 10D takes an example of mapping one amplitude index to a bit sequence to be mapped using a hierarchical coding modulation constellation to describe the flow described in FIG. 10C. Referring to FIG. 10D, the input of the distribution matcher is the second input bit, and the output is the amplitude symbol sequence. The operation of the distribution matcher processing the second input bit to output the amplitude symbol sequence is step 201 in FIG. 10C. Each amplitude symbol in the amplitude symbol sequence output by the distribution matcher is composed of two groups of bits, {i0, q0, … i G ,q G}, {i (G+1) ,q (G+1) …i (M-1) ,q (M-1)}, {i M ,q M ,i (M+1) ,q (M+1) …i (L-2) ,q (L-2)}, where the first group of bits corresponds to no coding layer, and the second group of bits corresponds to the LDPC layer (or LDPC coding layer). M is an integer greater than 1, L is an integer greater than 2, G is an integer greater than or equal to 0, and (G+1) is less than or equal to (M-1). For example, G is 0, M is 2, and L is 4.

[0202] 202. The sending end obtains amplitude bit sequence #1, amplitude bit sequence #2, and amplitude bit sequence #3 based on the amplitude symbol sequence.

[0203] The amplitude bit sequence #1 corresponds to the LDPC layer (i.e., the first layer described above), the amplitude bit sequence #2 corresponds to the third layer, the amplitude bit sequence #3 corresponds to the fourth layer, the amplitude bit sequence #1 contains i M q M i (M+1) q (M+1) …i (L-2) q (L-2) of each amplitude symbol (corresponding to I and Q paths) in the amplitude symbol sequence, the amplitude bit sequence #2 contains i0 q0…i G q G of each amplitude symbol in the amplitude symbol sequence, and the amplitude bit sequence #3 contains i (G+1) q (G+1) …i (M-1) q (M-1), M is an integer greater than 1, L is an integer greater than 2, G is an integer greater than or equal to 0, and (G+1) is less than or equal to (M-1). As an example, each amplitude symbol in the amplitude symbol sequence is represented as i0q0i1q1i2q2, amplitude bit sequence #1 contains i2q2of each amplitude symbol in the amplitude symbol sequence, amplitude bit sequence #2 contains i0q0of each amplitude symbol in the amplitude symbol sequence, and amplitude bit sequence #3 contains i1q1of each amplitude symbol in the amplitude symbol sequence. Embodiments of the present application are described by taking the amplitude symbol sequence containing amplitude symbols corresponding to I and Q paths as an example. Amplitude bit sequence #1 contains N groups of bit sequences, each group of bit sequences being i M q M i (M+1) q (M+1) …i (L-2) q (L-2) of an amplitude symbol corresponding to I and Q paths in the amplitude symbol sequence, amplitude bit sequence #2 contains N groups of bit sequences, each group of bit sequences being i G q G 0…i (G+1) q (G+1) …i (M-1) q (M-1) of an amplitude symbol corresponding to I and Q paths in the amplitude symbol sequence, and amplitude bit sequence #3 contains N groups of bit sequences, each group of bit sequences being i N-1 q N-1 0…i i q i …i M q M of an amplitude symbol corresponding to I and Q paths in the amplitude symbol sequence. As an example, the amplitude symbol sequence output by the distribution matcher is {A0, A1, …, AN-1}, amplitude bit sequence #1 is {A′0, A′1, …, A′N-1}, A′i is i (M+1) q (M+1) 0…i (L-2) q (L-2) of an amplitude symbol Ai in A, amplitude bit sequence #2 is {A″0, A″1, …, A″N-1}, A″i is i N-1 q i 0…i i q G of an amplitude symbol Ai in A, and amplitude bit sequence #3 is {A″′0, A″′1, …, A″′N-1}, A″′i is i G q N-1 0…i i q ii (G+1) q (G+1) …i (M-1) q (M-1) A′ i corresponding to A″ i , A″ i corresponding to A″′ i . A i is any one of A0, A1, …, A N-1 , A′ i is any one of A′0, A′1, …, A′ N-1 , A″ i is any one of A″0, A″1, …, A″ N-1 , A″′ i is any one of A″′0, A″′1, …, A″′ N-1 . The transmitter can obtain each amplitude symbol’s i M q M i (M+1) q (M+1) …i (L-2) q (L-2) , respectively, according to the ordering (e.g., from left to right) of each amplitude symbol in the amplitude symbol sequence; obtain each amplitude symbol’s i G q G , respectively, according to the ordering (e.g., from left to right) of each amplitude symbol in the amplitude symbol sequence; obtain each amplitude symbol’s i (G+1) q (G+1) …i (M-1) q (M-1) , respectively, according to the ordering (e.g., from left to right) of each amplitude symbol in the amplitude symbol sequence.

[0204] Referring to FIG. 10D, the transmitter LDPC encodes the {i M ,q M ,i (M+1) ,q (M+1) …i (L-2) ,q (L-2)} in the amplitude symbols output by the distribution matcher. Before the transmitter LDPC encodes the {i M ,q M ,i (M+1) ,q (M+1) …i (L-2) ,q (L-2)} in the amplitude symbols, the transmitter divides each amplitude symbol into {i G ,q G}(included in amplitude bit sequence #2), {i (G+1) ,q (G+1) …i (M-1) ,q (M-1)}(included in amplitude bit sequence #3), {i M ,q M ,i (M+1) ,q (M+1) …i (L-2) ,q (L-2)}(included in amplitude bit sequence #1). The transmitter divides each amplitude symbol into {i G ,q G}、{i (G+1) ,q (G+1) …i (M-1) ,q (M-1)}、{i M ,q M ,i (M+1) ,q (M+1) …i (L-2) ,q (L-2)} respectively. The operation of the transmitter corresponds to step 202.

[0205] 203. The transmitter LDPC encodes amplitude bit sequence #1 to obtain a check bit sequence.

[0206] The first encoding mode is LDPC encoding. Step 203 can refer to step 103 in FIG. 10A. Referring to FIG. 10D, the transmitter LDPC encodes {i M ,q M ,i (M+1) ,q (M+1) …i (L-2) ,q (L-2)} in the amplitude symbol. The operation of the transmitter corresponds to step 203, and c i c’ i represents two check bits corresponding to one amplitude symbol, c i corresponds to I path, and c’ i corresponds to Q path.

[0207] 204. The transmitter encodes amplitude bit sequence #3 using a second encoding mode to obtain amplitude bit sequence #4.

[0208] The second encoding method described above corresponds to BCH code. Amplitude bit sequence #3 contains N sets of bit sequences corresponding to I-paths and N sets of bit sequences corresponding to Q-paths, and amplitude bit sequence #4 contains N sets of bit sequences corresponding to I-paths and N sets of bit sequences corresponding to Q-paths. The N sets of bit sequences corresponding to I-paths in amplitude bit sequence #4 can be obtained by the transmitter encoding the N sets of bit sequences corresponding to I-paths contained in amplitude bit sequence #3 using the second encoding method. The N sets of bit sequences corresponding to Q-paths in amplitude bit sequence #4 can also be obtained by the transmitter encoding the N sets of bit sequences corresponding to Q-paths contained in amplitude bit sequence #3 using the second encoding method. Referring to Figure 10D, the first encoding represents the encoding of i using the second encoding method. (G+1) q (G+1) …i (M-1) q (M-1) Encode the code, corresponding to step 204 above.

[0209] 205. The transmitting end adjusts the value of the bit in the amplitude bit sequence #2 based on the parity bit in the parity bit sequence.

[0210] In one possible implementation, the parity bit sequence includes N parity bits corresponding to the I-channel and N parity bits corresponding to the Q-channel. Alternatively, the parity bit sequence comprises N sets of bit sequences, each set including two parity bits. For example, the parity bit sequence could be c0 c'0c1 c'1…c (N-1) c' (N-1) , where c0c1…c (N-1) Corresponding to I-path, c'0c'1…c' (N-1) This corresponds to the Q-path. Each bit sequence in amplitude bit sequence #2 contains a bit sequence corresponding to the I-path and a bit sequence corresponding to the Q-path. For example, each bit sequence in amplitude bit sequence #2 is i0q0…i G q G , where i0…i G Let q0…q be the bit sequence corresponding to the I-path in this set of bit sequences. G This refers to the bit sequence corresponding to the Q-path in this set of bit sequences. The N parity bits corresponding to the I-path in the parity bit sequence #2 correspond one-to-one with the N sets of bit sequences corresponding to the I-path in the amplitude bit sequence #2, and the N parity bits corresponding to the Q-path in the parity bit sequence #2 correspond one-to-one with the N sets of bit sequences corresponding to the I-path in the amplitude bit sequence #2. In other words, when any parity bit in the parity bit sequence corresponds to an I-path, that parity bit corresponds to one set of bit sequences corresponding to the I-path in the amplitude bit sequence #2; when that parity bit corresponds to a Q-path, that parity bit corresponds to one set of bit sequences corresponding to the Q-path in the amplitude bit sequence #2. As an example, the parity bit sequence is c0 c'0c1 c'1…c (N-1) c' (N-1)The amplitude bit sequence #2 is {A″0,A″1,…,A″} N-1},A″0,A″1,…,A″ N-1 Each in c represents a set of bit sequences. i Corresponding to A″ i i0…i G ,c' i Corresponding to A″ i q0…q G c i Let c0, c1, c2, ..., c (N-1) any one of them, c' i Let c'0, c'1, c'2, ..., c' (N-1) Any one of them, A″ i is A″0,A″1,…,A″ N-1 Any one of them.

[0211] The transmitter adjusts the values ​​of bits in amplitude bit sequence #2 based on the parity bits in the parity bit sequence. This adjustment can be achieved by adjusting the values ​​of one or more bits in the corresponding set of bits in amplitude bit sequence #2 for each parity bit in the parity bit sequence. In one possible implementation, the parity bit sequence is c0 c'0c1 c'1…c (N-1) c' (N-1) The amplitude bit sequence #2 is {A″0,A″1,…,A″} N-1},A″0,A″1,…,A″ N-1 Each in c represents a set of bit sequences. i Corresponding to A″ i i0…i G ,c' i Corresponding to A″ i q0…q G c i Let c0, c1, c2, ..., c (N-1) any one of them, c' i Let c'0, c'1, c'2, ..., c' (N-1) Any one of them, A″ i is A″0,A″1,…,A″ N-1 Any one of them; the sender will send c i As the sign bit, when c i When the value is the first value, adjust A″. i i0…i G The value of one or more bits in c i When A″ takes the second value, i i0…i G The values ​​of c' remain unchanged;i The sign bit, when c' i When the value is the first value, adjust A″. i q0…q G The value of one or more bits in c' i When A″ takes the second value, i q0…q G The values ​​of all remain unchanged. Referring to Figure 10D, the adjustment operation represents adjusting {i0, q0, i1, q1, ... i} based on the parity bits. (M- 1) ,q (M-1) The values ​​of the bits in} correspond to step 205 above.

[0212] As an example, each bit sequence in amplitude bit sequence #2 is represented by i0 q0, where i0 is the bit corresponding to the I-path in that bit sequence, q0 is the bit corresponding to the Q-path in that bit sequence, and A″ i For any set of bit sequences in amplitude bit sequence #2; the transmitter will use c i As the sign bit, when c i When the value is the first value, adjust A″. i The value of i0 in c i When A″ takes the second value, i The value of i0 in c' remains unchanged; i As the sign bit, when c' i When the value is the first value, adjust A″. i The value of q0 in c' is determined when c' i When A″ takes the second value, i The value of q0 remains unchanged.

[0213] 206. The transmitting end maps the amplitude bit sequence #1, the adjusted amplitude bit sequence #2, the amplitude bit sequence #4, and the parity bit sequence to constellation points to obtain the output bits.

[0214] Alternatively, the transmitting end maps the amplitude bit sequence #1, the adjusted amplitude bit sequence #2, the amplitude bit sequence #4, and the parity bit sequence to constellation points to obtain the output bits. The layered coding output bits include N constellation points. Or, the layered coding output bits include N bit sequences, each bit sequence being a constellation point in the layered coding modulation constellation diagram. These N bit sequences are obtained by the transmitting end based on the N sets of bit sequences in amplitude bit sequence #1, the N sets of bit sequences in the adjusted amplitude bit sequence #2, the N sets of bit sequences in amplitude bit sequence #4, and the N sets of bit sequences contained in the parity bit sequence. The adjusted amplitude bit sequence #2 is the amplitude bit sequence #2 obtained by the transmitting end after performing step 205.

[0215] In a possible implementation, any two of the N groups of bit sequences contained in the amplitude bit sequence #1, the N groups of bit sequences contained in the adjusted amplitude bit sequence #2, the N groups of bit sequences contained in the check bit sequence, and the N groups of bit sequences contained in the amplitude bit sequence #4 correspond to each other one by one; the sending end can map the bit sequence #i10 (a group of bit sequences) in the amplitude bit sequence #1, the bit sequence #i20 (a group of bit sequences) in the adjusted amplitude bit sequence #2, the bit sequence #i30 (a group of bit sequences) in the amplitude bit sequence #4, and the bit sequence #i40 (a group of bit sequences) in the check bit sequence into one constellation point; where the bit sequence #i10 corresponds to the bit sequence #i20, the bit sequence #i20 corresponds to the bit sequence #i30, and the bit sequence #i30 corresponds to the bit sequence #i40. As an example, i M q M i (M+1) q (M+1) …i (L-2) q (L-2) is a group of bit sequences in the amplitude bit sequence #1, i0 q0…i G q G represents a group of bit sequences (for example, the bit sequence #i1) in the adjusted amplitude bit sequence #2, i (G+1) q (G+1) …i (M-1) q (M-1) is a group of bit sequences in the amplitude bit sequence #4, c i c’ i is a group of bit sequences (the bit sequence #i2) in the check bit sequence; the sending end maps i0 q0…i G q G , i (G+1) q (G+1) …i (M-1) q (M-1) , i M q M i (M+1) q (M+1) …i (L-2) q (L-2) and c i c’ i into one constellation point, that is, i0 q0…i G q G i (G+1) q (G+1) …i (M-1) q (M-1) c i c’ I i M q M i(M+1) q (M+1) …i (L-2) q (L-2) For example, G is 0, M is 2, and L is 4. Referring to FIG. 10D, the mapping process is to map i0q0,…i M q M i (M+1) q (M+1) …i (L-2) q (L-2) , i (G+1) q (G+1) …i (M-1) q (M-1) , c i c’ i and the adjusted i0q0,…i G q G to a constellation point, i0q0,…i G i (G+1) q (G+1) …i (M-1) q (M-1) c i c’ I i M q M i (M+1) q (M+1) …i (L-2) q (L-2) , which corresponds to step 206.

[0216] 207. The transmitter maps the output bits of the layered encoding based on the layered encoding modulation constellation.

[0217] The output bits of the layered encoding include N bit sequences, and each bit sequence is a constellation point in the layered encoding modulation constellation. The transmitter mapping the output bits of the layered encoding based on the layered encoding modulation constellation can be mapping each bit sequence included in the output bits of the layered encoding to a modulation symbol.

[0218] The transmitter performs the layered encoding process shown in FIG. 10C, which can make the probability distribution of the adjusted amplitude symbol sequence satisfy the axisymmetric feature; it maintains the performance gain brought by the probability amplitude shaping, and also has the advantage of reducing the decoding complexity of layered encoding modulation.

[0219] The following describes two examples in which the transmitter performs the layered encoding process shown in FIG. 10A or FIG. 10C, which can make the probability distribution of the adjusted amplitude symbol sequence satisfy the axisymmetric feature.

[0220] Example 1:

[0221] In step 101, the amplitudes of the I or Q of the amplitude symbol sequence outputted by the distribution matcher are ordered from high to low as follows: 11, 10, 00, 01. Alternatively, the distribution probabilities of the amplitudes of the I or Q of the amplitude symbol sequence outputted by the distribution matcher are ordered from high to low as follows: 11, 10, 00, 01. The amplitude of the I is any one of 11, 10, 00, 01, and the amplitude of the Q is any one of 11, 10, 00, 01. Each amplitude of the I and the corresponding symbol bit of the amplitude of the I jointly form the I of a constellation point (or the bit sequence corresponding to the I). The I of the constellation point contains 3 bits. Each amplitude of the Q and the corresponding symbol bit of the amplitude of the Q jointly form the Q of a constellation point (or the bit sequence corresponding to the Q), and the bit sequence of the Q contains 3 bits. The I of the constellation point and the Q of the constellation point can form a bit sequence to be mapped by the hierarchical coding modulation constellation. The transmitter maps the amplitude of the I to the I of the constellation point in the same or similar way as mapping the amplitude of the Q to the Q of the constellation point. Hereinafter, the transmitter mapping the amplitude of the I to the I of the constellation point is taken as an example for description. The way the transmitter maps the amplitude of the I to the I of the constellation point is one of the examples of step 104 to step 105.

[0222] FIG. 11 is a schematic diagram of a 64QAM hierarchical coded modulation constellation I path according to an embodiment of the present application. As shown in FIG. 11, 101, 100, 110, 111, 001, 000, 010, and 011 are I paths of constellation points, respectively. The probability distribution of 111 and 001 is the same, the probability distribution of 110 and 000 is the same, the probability distribution of 100 and 010 is the same, and the probability distribution of 101 and 011 is the same. The second MSB in 110, 111, 010, and 011 is 1. The MSB and LSB of 110, 111, 010, and 011, in order from the highest bit to the lowest bit, form 10, 11, 00, and 01, respectively. The second MSB in 101, 100, 001, and 000 is 0. The MSB and LSB of 101, 100, 001, and 000, in order from the highest bit to the lowest bit, form 11, 10, 01, and 00, respectively. Referring to FIG. 11, the probability distribution of 111, 110, 010, and 011 decreases in turn, and correspondingly, the probability distribution of the MSB and LSB of 111 (i.e., 11), the MSB and LSB of 110 (i.e., 10), the MSB and LSB of 010 (i.e., 00), and the MSB and LSB of 011 (i.e., 01) decreases in turn. Since the probability distribution of the MSB and LSB of 111 (i.e., 11), the MSB and LSB of 110 (i.e., 10), the MSB and LSB of 010 (i.e., 00), and the MSB and LSB of 011 (i.e., 01) is the same as the order of the probability distribution of the amplitude symbols of the I path in the amplitude symbol sequence output by the distribution matcher, when the symbol bit (or check bit) corresponding to the amplitude symbol of the I path is 1, the sending end can map the amplitude symbol of the I path to (or as) the MSB and LSB of the I path of the constellation point and map the symbol bit to the second MSB of the I path of the constellation point. Here, the MSB of the amplitude symbol of the I path is mapped to the MSB of the I path of the constellation point, and the LSB of the amplitude symbol of the I path is mapped to the LSB of the I path of the constellation point. It should be understood that when the symbol bit (or check bit) corresponding to the amplitude symbol of the I path is 1, the sending end maps the amplitude symbol of the I path to the MSB and LSB of the I path of the constellation point and maps the symbol bit to the second MSB of the I path of the constellation point, which can make the probability distribution of the amplitude symbol of the I path be ordered from high to low as follows: 11, 10, 00, and 01.

[0223] When the value of the sign bit corresponding to the amplitude symbol of the I branch is 0, if the amplitude symbol of the I branch is mapped to (or as) the MSB and LSB of the I branch of the constellation point and the sign bit is mapped to the second MSB of the I branch of the constellation point, where 11 is mapped to the I branch of the constellation point 101, 10 is mapped to the I branch of the constellation point 100, 01 is mapped to the I branch of the constellation point 001, and 00 is mapped to the I branch of the constellation point 000, the probability distribution of the amplitude symbol of the I branch is in descending order: 01, 00, 10, 11.

[0224] In order to make the probability distribution of the amplitude symbol of the I branch satisfy the axial symmetry characteristic, the application adopts the following scheme (corresponding to the above-mentioned steps 104 and step 105: when the value of the sign bit corresponding to the amplitude symbol of the I branch (such as the above-mentioned first amplitude symbol) is 0, the value of the MSB of the amplitude symbol of the I branch is adjusted, when the value of the sign bit corresponding to the amplitude symbol of the I branch is 1, the value of the MSB of the amplitude symbol of the I branch remains unchanged; the amplitude symbol of the I branch is mapped to the MSB and LSB of the I branch of the constellation point and the sign bit is mapped to the second MSB of the I branch of the constellation point. For example, when the value of the sign bit corresponding to 11 (the amplitude symbol of the I branch) is 0, the I branch of the constellation point mapped by 11 is 001; when the value of the sign bit corresponding to 10 is 0, the I branch of the constellation point mapped by 10 is 000; when the value of the sign bit corresponding to 00 is 0, the I branch of the constellation point mapped by 00 is 100; when the value of the sign bit corresponding to 01 is 0, the I branch of the constellation point mapped by 01 is 101; when the value of the sign bit corresponding to 11 is 1, the I branch of the constellation point mapped by 11 is 111; when the value of the sign bit corresponding to 10 is 1, the I branch of the constellation point mapped by 10 is 110; when the value of the sign bit corresponding to 00 is 1, the I branch of the constellation point mapped by 00 is 010; when the value of the sign bit corresponding to 01 is 1, the I branch of the constellation point mapped by 01 is 011; wherein in the hierarchical coding modulation constellation diagram, the distribution probability of 001 and 111 is the same, the distribution probability of 000 and 110 is the same, the distribution probability of 010 and 100 is the same, and the distribution probability of 101 and 011 is the same, refer to FIG. 6 and FIG. 11. It can be seen that the probability distribution of the adjusted amplitude symbol of the I branch satisfies the axial symmetry characteristic. The amplitude symbol of the Q branch has the same or similar characteristics (or features) as the amplitude symbol of the I branch. The way the amplitude symbol of the I branch is mapped to the I branch of the constellation point by the sending end is the same as or similar to the way the amplitude symbol of the Q branch is mapped to the Q branch of the constellation point, and the probability distribution of the adjusted amplitude symbol of the Q branch also satisfies the axial symmetry characteristic. Since the probability distribution of the adjusted amplitude symbol of the I branch satisfies the axial symmetry characteristic and the probability distribution of the adjusted amplitude symbol of the Q branch satisfies the axial symmetry characteristic, the probability distribution of the adjusted amplitude symbol sequence satisfies the axial symmetry characteristic.

[0225] FIG. 12 is a diagram illustrating a probability distribution of constellation points in a layered coding modulation constellation according to an embodiment of the present application. FIG. 12 is obtained by mapping the amplitude symbols of the I path to the I path of the constellation points and mapping the amplitude symbols of the Q path to the Q path of the constellation points using the scheme in Example 1 at the transmitting end. As shown in FIG. 12, the probability of the constellation points closer to the center of the constellation diagram is higher, which can improve performance and further approach the Shannon limit.

[0226] Example 2

[0227] In step 101, the amplitude symbols of the I path or the Q path in the amplitude symbol sequence output by the distribution matcher are ordered from high to low probability as follows: 001, 000, 100, 101, 011, 010, 110, 111. Alternatively, the distribution probabilities of the amplitude symbols of the I path or the Q path in the amplitude symbol sequence output by the distribution matcher are ordered from high to low as follows: 001, 000, 100, 101, 011, 010, 110, 111. The amplitude symbol of the I path is any one of 001, 000, 100, 101, 011, 010, 110, 111, and the amplitude symbol of the Q path is any one of 001, 000, 100, 101, 011, 010, 110, 111. Each amplitude symbol of the I path and the symbol bit corresponding to the amplitude symbol of the I path together form the I path of a constellation point. The I path of the constellation point contains 4 bits. Each amplitude symbol of the Q path and the symbol bit corresponding to the amplitude symbol of the Q path together form the Q path of the constellation point, and the bit sequence of the Q path contains 4 bits. The I path of the constellation point and the Q path of the constellation point can form a bit sequence to be mapped by the layered coding modulation constellation. The transmitting end maps the amplitude symbols of the I path to the I path of the constellation points in the same or similar manner as mapping the amplitude symbols of the Q path to the Q path of the constellation points. Hereinafter, the mapping of the amplitude symbols of the I path to the I path of the constellation points by the transmitting end is taken as an example for description. The manner of mapping the amplitude symbols of the I path to the I path of the constellation points by the transmitting end is one of the examples of step 104 to step 105.

[0228] FIG. 13 is a schematic view of a 256QAM hierarchical coding modulation constellation I path provided by an embodiment of the present application. As shown in FIG. 13, 1111, 1110, 1100, 1101, 1011, 1010, 1000, 1001, 0011, 0010, 0000, 0001, 0111, 0110, 0100, 0101 are I paths of constellation points respectively, the distribution probability of 1001 and 0011 is the same, the distribution probability of 1000 and 0010 is the same, the distribution probability of 0000 and 1010 is the same, the distribution probability of 0001 and 1011 is the same, the distribution probability of 1101 and 0111 is the same, the distribution probability of 1100 and 0110 is the same, the distribution probability of 0100 and 1110 is the same, the distribution probability of 0101 and 1111 is the same; the third MSB in 1111, 1110, 1011, 1010, 0011, 0010, 0111, 0110 is 1, the MSB, the second MSB and the LSB of 1111 in order from the highest bit to the lowest bit form 111, the MSB, the second MSB and the LSB of 1110 in order from the highest bit to the lowest bit form 110, the MSB, the second MSB and the LSB of 1011 in order from the highest bit to the lowest bit form 101, the MSB, the second MSB and the LSB of 1010 in order from the highest bit to the lowest bit form 100, the MSB, the second MSB and the LSB of 0011 in order from the highest bit to the lowest bit form 001, the MSB, the second MSB and the LSB of 0010 in order from the highest bit to the lowest bit form 000, the MSB, the second MSB and the LSB of 0111 in order from the highest bit to the lowest bit form 011, the MSB, the second MSB and the LSB of 0110 in order from the highest bit to the lowest bit form 010; the third MSB in 1100, 1101, 1000, 1001, 0000, 0001, 0100, 0101 is 0, the MSB, the second MSB and the LSB of 1100 in order from the highest bit to the lowest bit form 110, the MSB, the second MSB and the LSB of 1101 in order from the highest bit to the lowest bit form 111, the MSB, the second MSB and the LSB of 1000 in order from the highest bit to the lowest bit form 100, the MSB, the second MSB and the LSB of 1001 in order from the highest bit to the lowest bit form 101, the MSB, the second MSB and the LSB of 0000 in order from the highest bit to the lowest bit form 000, the MSB, the second MSB and the LSB of 0001 in order from the highest bit to the lowest bit form 001, the MSB, the second MSB and the LSB of 0100 in order from the highest bit to the lowest bit form 010, the MSB, the second MSB and the LSB of 0101 in order from the highest bit to the lowest bit form 011.

[0229] Referring to FIG. 13, the probability distribution of 0011, 0010, 1010, 1011, 0111, 0110, 1110, 1111 decreases in turn. When the value of the sign bit corresponding to the amplitude symbol of the I channel is 1, the transmitter maps the amplitude symbol of the I channel to the MSB, the second MSB, and the LSB of the I channel of the constellation point, and maps the sign bit to the third MSB of the I channel of the constellation point, so that the probability distribution of the amplitude symbol of the I channel is ordered from high to low as follows: 001, 000, 100, 101, 011, 010, 110, 111. Among them, the MSB of the amplitude symbol of the I channel is mapped to the MSB of the I channel of the constellation point, the second MSB of the amplitude symbol of the I channel is mapped to the second MSB of the I channel of the constellation point, and the LSB of the amplitude symbol of the I channel is mapped to the LSB of the I channel of the constellation point. For example, when the value of the sign bit corresponding to the amplitude symbol of the I channel is 1, the I channel of the constellation point mapped by 001 is 0011, the I channel of the constellation point mapped by 000 is 0010, the I channel of the constellation point mapped by 100 is 1010, the I channel of the constellation point mapped by 101 is 1011, the I channel of the constellation point mapped by 011 is 0111, the I channel of the constellation point mapped by 010 is 0110, the I channel of the constellation point mapped by 110 is 1110, and the I channel of the constellation point mapped by 111 is 1111; referring to FIG. 13, the probability distribution of 0011, 0010, 1010, 1011, 0111, 0110, 1110, 1111 decreases in turn, that is, the probability distribution of the I channel of the constellation point mapped by 001, 000, 100, 101, 011, 010, 110, 111 decreases in turn. Therefore, when the transmitter maps the amplitude symbol of the I channel to the MSB, the second MSB, and the LSB of the I channel of the constellation point, and maps the sign bit to the third MSB of the I channel of the constellation point, the probability distribution of the amplitude symbol of the I channel can be ordered from high to low as follows: 001, 000, 100, 101, 011, 010, 110, 111.

[0230] When the value of the symbol bit corresponding to the amplitude symbol of the I path is 0, if the sending end maps the amplitude symbol of the I path to the MSB, the second MSB, the LSB of the I path of the constellation point, and maps the symbol bit to the third MSB of the I path of the constellation point, wherein the I path of the constellation point to which 101 is mapped is 1001, the I path of the constellation point to which 100 is mapped is 1000, the I path of the constellation point to which 000 is mapped is 0000, the I path of the constellation point to which 001 is mapped is 0001, the I path of the constellation point to which 111 is mapped is 1101, the I path of the constellation point to which 110 is mapped is 1100, the I path of the constellation point to which 010 is mapped is 0100, and the I path of the constellation point to which 011 is mapped is 0101, the probability distribution of the amplitude symbol of the I path is ordered from high to low as follows: 101, 100, 000, 001, 111, 110, 010, and 011, which is different from the probability distribution of the amplitude symbol of the I path in the amplitude symbol sequence output by the distribution matcher.

[0231] In order to make the probability distribution of the amplitude symbol of the I path meet the axisymmetric characteristic, the application adopts the following scheme (corresponding to the above-mentioned steps 104 and step 105: when the value of the symbol bit corresponding to the amplitude symbol of the I path (for example, the first amplitude symbol mentioned above) is 0, the sending end adjusts the value of the MSB of the amplitude symbol of the I path, and when the value of the symbol bit corresponding to the amplitude symbol of the I path is 1, the value of the MSB of the amplitude symbol of the I path remains unchanged; the amplitude symbol of the I path is mapped to the MSB, the second MSB, the LSB of the I path of the constellation point, and the third MSB of the I path of the constellation point. For example, when the value of the symbol bit corresponding to 001 (the amplitude symbol of the I path) is 1, the I path of the constellation point to which 001 is mapped is 0011; when the value of the symbol bit corresponding to 000 is 1, the I path of the constellation point to which 000 is mapped is 0010; when the value of the symbol bit corresponding to 100 is 1, the I path of the constellation point to which 100 is mapped is 1010; when the value of the symbol bit corresponding to 101 is 1, the I path of the constellation point to which 101 is mapped is 1011; when the value of the symbol bit corresponding to 011 is 1, the I path of the constellation point to which 011 is mapped is 0111; when the value of the symbol bit corresponding to 010 is 1, the I path of the constellation point to which 010 is mapped is 0110; when the value of the symbol bit corresponding to 110 is 1, the I path of the constellation point to which 110 is mapped is 1110; and when the value of the symbol bit corresponding to 111 is 1, the I path of the constellation point to which 111 is mapped is 1111.

[0232] When the value of the symbol bit corresponding to 001 is 0, the I path of the constellation point mapped by 001 is 1001; when the value of the symbol bit corresponding to 000 is 0, the I path of the constellation point mapped by 000 is 1000; when the value of the symbol bit corresponding to 100 is 0, the I path of the constellation point mapped by 100 is 0000; when the value of the symbol bit corresponding to 101 is 0, the I path of the constellation point mapped by 101 is 0001; when the value of the symbol bit corresponding to 011 is 0, the I path of the constellation point mapped by 011 is 1101; when the value of the symbol bit corresponding to 010 is 0, the I path of the constellation point mapped by 010 is 1100; when the value of the symbol bit corresponding to 110 is 0, the I path of the constellation point mapped by 110 is 0100; when the value of the symbol bit corresponding to 111 is 0, the I path of the constellation point mapped by 111 is 0101; wherein in the hierarchical coding modulation constellation, the distribution probability of 1001 and 0011 is the same, the distribution probability of 1000 and 0010 is the same, the distribution probability of 0000 and 1010 is the same, the distribution probability of 0001 and 1011 is the same, the distribution probability of 1101 and 0111 is the same, the distribution probability of 1100 and 0110 is the same, the distribution probability of 0100 and 1110 is the same, the distribution probability of 0101 and 1111 is the same, refer to FIG. 8 and FIG. 13. It can be seen that the probability distribution of the amplitude symbol of the adjusted I path satisfies the axial symmetry characteristic. The amplitude symbol of the Q path has the same or similar characteristic (or feature) as the amplitude symbol of the I path. The sending end maps the amplitude symbol of the I path to the I path of the constellation point in the same or similar way as mapping the amplitude symbol of the Q path to the Q path of the constellation point, and the probability distribution of the amplitude symbol of the adjusted Q path also satisfies the axial symmetry characteristic. Since the probability distribution of the amplitude symbol of the adjusted I path satisfies the axial symmetry characteristic and the probability distribution of the amplitude symbol of the adjusted Q path satisfies the axial symmetry characteristic, the probability distribution of the adjusted amplitude symbol sequence satisfies the axial symmetry characteristic.

[0233] FIG. 14A is a probability distribution diagram of constellation points in another hierarchical coding modulation constellation provided by the embodiments of the present application. FIG. 14A is obtained by mapping the amplitude symbol of the I path to the I path of the constellation point and mapping the amplitude symbol of the Q path to the Q path of the constellation point by the sending end using the scheme in example 2. As shown in FIG. 14A, the constellation points closer to the center of the constellation diagram have higher probability, which can improve performance and further approach the Shannon limit.

[0234] FIG. 14B is a performance simulation diagram provided by an embodiment of the present application. In FIG. 14B, the vertical axis is the block error rate (BLER), the horizontal axis represents the ratio of symbol energy to noise power spectrum density (Es / N0) (or the symbol signal-to-noise ratio), multi-level coded modulation (MLCM) represents multi-level coded modulation without probability shaping, bit interleaved coded modulation (BICM) represents traditional bit interleaved coded modulation without probability shaping, MLCM+PS represents multi-level coded modulation with probability shaping, and BICM+PS represents traditional bit interleaved coded modulation with probability shaping. As can be seen from FIG. 14B, the scheme of the present application (for example, the scheme of Example 2) can obtain a performance gain of 1.1 dB compared to the scheme of non-PAS+multi-level coded modulation, and can obtain a performance gain of 0.15 dB compared to the scheme of PAS+modulation using a traditional Gray constellation.

[0235] Another possible implementation of step 701 in FIG. 7 and the corresponding example are described in detail below in combination with FIG. 15A. FIG. 15A is a schematic diagram of another multi-level coding process provided by an embodiment of the present application. In the multi-level coding process shown in FIG. 15A, the multi-level coding includes coding of a first layer and coding of at least one second layer, the at least one second layer including a third layer and a fourth layer, the third layer corresponding to no coding, and the fourth layer corresponding to a second coding manner. Referring to FIG. 15A, the main steps of multi-level coding of the second input bits by the sending end are as follows:

[0236] 301. The sending end inputs the second input bits to the distribution matcher to obtain an amplitude symbol sequence.

[0237] Referring to FIG. 15A, the input of the distribution matcher is the second input bits, and the output of the distribution matcher is the amplitude symbol sequence. The second input bits are the bit sequence that the sending end needs to send to the receiving end and expects the receiving end to obtain. The second input bits are the above-mentioned target system bits. Optionally, the 0s and Is in the second input bits are equally distributed. The amplitude symbols corresponding to the I path and the Q path in the amplitude symbol sequence can be represented as i0q0 i1q1…i (L-2) q (L-2) , each amplitude symbol corresponding to the I path in the amplitude symbol sequence can be represented as i0i1…i (L-2) , and each amplitude symbol corresponding to the Q path in the amplitude symbol sequence can be represented as q0 q1…q (L-2)Figure 15B is a schematic diagram of another hierarchical coding flow provided by the embodiments of the present application. For the purpose of understanding the method flow shown in Figure 15A, Figure 15B describes the flow shown in Figure 15A by taking an example of mapping one amplitude index to a bit sequence to be mapped using a hierarchical coding modulation constellation. Referring to Figure 15B, the input of the distribution matcher is the second input bit, and the output of the distribution matcher is the amplitude index sequence. The operation of the distribution matcher processing the second input bit to output the amplitude index sequence is step 301 in Figure 15A. Each amplitude index in the amplitude index sequence output by the distribution matcher is composed of two groups of bits, i.e., {i0, q0, i1, q1, …, i (M-1) ,q (M-1)} and {i M ,q M ,i (M+1) ,q (M+1) …i (L-2) ,q (L-2)}, where the former group of bits corresponds to the non-coding layer, and the latter group of bits corresponds to the fourth layer (e.g., the BCH layer).

[0238] 302. The sending end obtains a third amplitude bit sequence and a fourth amplitude bit sequence based on the amplitude index sequence.

[0239] Referring to Figure 15A, the third amplitude bit sequence corresponds to the third layer (i.e., the non-coding layer), and the fourth amplitude bit sequence corresponds to the fourth layer. The third amplitude bit sequence contains i0 q0 i1 q1…i (M-1) q (M-1) of each amplitude index in the amplitude index sequence, and the fourth amplitude bit sequence contains i M q M i (M+1) q (M+1) …i (L-2) q (L-2) , where M is an integer greater than 1, and L is an integer greater than 2. The embodiments of the present application are described by taking an example of the amplitude index sequence containing amplitude indices corresponding to the I path and the Q path. The third amplitude bit sequence contains N groups of bit sequences, and each group of bit sequences is i0 q0 i1 q1…i (M-1) q (M-1) of one amplitude index corresponding to the I path and the Q path in the amplitude index sequence, and the fourth amplitude bit sequence contains N groups of bit sequences, and each group of bit sequences is i M q M i (M+1) q (M+1) …i (L-2) q (L-2)The N sets of bit sequences in the third amplitude bit sequence correspond one-to-one with the N sets of bit sequences in the fourth amplitude bit sequence. Alternatively, the third amplitude bit sequence contains N sets of bit sequences corresponding to the I-path and N sets of bit sequences corresponding to the Q-path, with each set of bit sequences corresponding to the I-path being i0 i1 q1…i (M-1) Each group corresponds to the bit sequence q0q1…q (M-1) The fourth amplitude bit sequence contains N sets of bit sequences corresponding to the I-path and N sets of bit sequences corresponding to the Q-path, with each set of bit sequences corresponding to the I-path being i. M i (M+1) …i (L-2) Each group corresponds to a bit sequence of Q-paths as q M q (M+1) …q (L-2) .

[0240] As an example, the amplitude sign sequence output by the distributed matcher is {A0, A1, ..., A...} N-1 The third amplitude bit sequence is {A′0, A′1, ..., A′}. N-1}, A′ i For A i i0 q0 i1 q1…i (M-1) q (M-1) The fourth amplitude bit sequence is {A″0,A″1,…,A″}. N-1}, A″ i For A i i in M q M i (M+1) q (M+1) …i (L-2) q (L-2) A′ i Corresponding to A″ i Let i be an integer greater than or equal to 0, and i is less than or equal to (L-2), where L is an integer greater than 2. A i Let A0, A1, ..., A N-1 Any one of them. A′ i is A′0,A′1,…,A′ N-1 Any one of them. A″ i is A″0,A″1,…,A″ N-1 Any one of the following. M is an integer greater than or equal to 1, and N is an integer greater than 1. The transmitting end can obtain the i0 q0 i1 q1…i of each amplitude symbol in the amplitude symbol sequence according to the order of each amplitude symbol in the amplitude symbol sequence (e.g., from left to right). (M-1) q (M-1), to obtain a fourth amplitude bit sequence. M q M i (M+1) q (M+1) …i (L-2) q (L-2) , to obtain a fourth amplitude bit sequence.

[0241] Referring to FIG. 15B, {i M ,q M ,i (M+1) ,q (M+1) …i (L-2) ,q (L-2)} represents that the sending end encodes {i M ,q M ,i (M+1) ,q (M+1) …i (L-2) ,q (L-2)} in the amplitude symbol output by the distribution matcher using the second encoding mode, to obtain encoded {i M ,q M ,i (M+1) ,q (M+1) …i (L- 2) ,q (L-2)}. Before the sending end encodes {i M ,q M ,i (M+1) ,q (M+1) …i (L-2) ,q (L-2)} using the second encoding mode, each amplitude symbol is divided into {i (M-1) ,q (M-1)} and {i M ,q M ,i (M+1) ,q (M+1) …i (L-2) ,q (L-2)}. The operation of the sending end dividing each amplitude symbol into {i (M-1) ,q (M-1)} and {i M ,q M ,i (M+1) ,q (M+1) …i (L-2) ,q (L-2)} corresponds to step 302 described above, wherein the third amplitude bit sequence contains {i 1, …i(M-1) q (M-1)}, the fourth amplitude bit sequence contains {i M q M i (M+1) q (M+1) …i (L-2) q (L-2)}.

[0242] 303. The sending end LDPC encodes the second bit sequence to obtain a check bit sequence.

[0243] The second bit sequence is the input bit of the first layer. The first encoding mode is LDPC encoding. The second bit sequence can be a bit sequence with uniform distribution of 0 and 1 (or equal probability of 0 and 1). After the second bit sequence is LDPC encoded, the target is to generate a check bit sequence containing 2N check bits. The bits in the second bit sequence do not need to be mapped to constellation points, and the source and length of the second bit sequence are not limited in the present application. For example, the second bit sequence is a bit sequence with uniform distribution of 0 and 1 randomly generated by the sending end. For another example, the second bit sequence is a bit sequence with uniform distribution already possessed by the sending end. When the number of check bits contained in the check bit sequence exceeds 2N or is less than 2N, appropriate rate matching will be performed, and puncturing or zero padding operation will be performed, so that the check bit sequence contains 2N check bits. Since the 0 and 1 of the check bit sequence generated after LDPC encoding and rate matching are equally distributed, the check bits in the check bit sequence can be used as the symbol bits corresponding to the amplitude symbol. The order of steps 303 and 302 is not limited. Referring to FIG. 15B, the operation of the sending end LDPC encoding the second bit sequence corresponds to step 303, c i c' i represents two check bits corresponding to an amplitude symbol, c i corresponds to I path, c' i corresponds to Q path.

[0244] 304. The sending end encodes the fourth amplitude bit sequence by using the second encoding mode to obtain a fifth amplitude bit sequence.

[0245] The second encoding mode can correspond to a BCH code. The fourth amplitude bit sequence includes N groups of bit sequences corresponding to the I path and N groups of bit sequences corresponding to the Q path, and the fifth amplitude bit sequence includes N groups of bit sequences corresponding to the I path and N groups of bit sequences corresponding to the Q path. The N groups of bit sequences corresponding to the I path in the fifth amplitude bit sequence can be obtained by encoding, by the sending end, the N groups of bit sequences corresponding to the I path included in the fourth amplitude bit sequence by using the second encoding mode. The N groups of bit sequences corresponding to the Q path in the fifth amplitude bit sequence can be obtained by encoding, by the sending end, the N groups of bit sequences corresponding to the Q path included in the fourth amplitude bit sequence by using the second encoding mode. Referring to FIG. 15B, {i M ,q M ,i (M+1) ,q (M+1) …i (L-2) ,q (L-2)} in the amplitude symbol output by the distribution matcher are encoded by the sending end by using the second encoding mode, to obtain the encoded {i M ,q M ,i (M+1) ,q (M+1) …i (L-2) ,q (L-2)} (included in the fourth amplitude bit sequence) to obtain the encoded {i M ,q M ,i (M+1) ,q (M+1) …i (L-2) ,q (L-2)} (included in the fifth amplitude bit sequence).

[0246] 305、The sending end adjusts the values of the bits in the third amplitude bit sequence and the values of the bits in the fifth amplitude bit sequence based on the check bits in the check bit sequence.

[0247] In a possible implementation, the check bit sequence includes N check bits corresponding to the I path and N check bits corresponding to the Q path. In other words, the check bit sequence includes N groups of bit sequences, and each group of bit sequences includes two check bits. For example, the check bit sequence is c0 c’0c1 c’1…c (N-1) c’ (N-1) , where c0c1…c (N-1) correspond to the I path, and c’0c’1…c’ (N-1)The third amplitude bit sequence corresponds to the Q-path. It contains N sets of bit sequences corresponding to the I-path and N sets of bit sequences corresponding to the Q-path. The N parity bits in the parity bit sequence corresponding to the I-path correspond one-to-one with the N sets of bit sequences corresponding to the I-path in the third amplitude bit sequence; the N parity bits in the parity bit sequence corresponding to the Q-path correspond one-to-one with the N sets of bit sequences corresponding to the Q-path in the third amplitude bit sequence; the N parity bits in the parity bit sequence corresponding to the I-path correspond one-to-one with the N sets of bit sequences corresponding to the I-path in the fifth amplitude bit sequence; and the N parity bits in the parity bit sequence corresponding to the Q-path correspond one-to-one with the N sets of bit sequences corresponding to the Q-path in the fifth amplitude bit sequence. In other words, when any parity bit in the parity bit sequence corresponds to an I-path, that parity bit corresponds to a set of I-path corresponding bits in the third amplitude bit sequence and a set of I-path corresponding bits in the fifth amplitude bit sequence. When that parity bit corresponds to a Q-path, that parity bit corresponds to a set of Q-path corresponding bits in the third amplitude bit sequence and a set of Q-path corresponding bits in the fifth amplitude bit sequence. As an example, the parity bit sequence is c0 c'0c1 c'1…c (N-1) c' (N-1) The third amplitude bit sequence is {A′0,A′1,…,A′} N-1 The fifth amplitude bit sequence is {A″0,A″1,…,A″}. N-1},A′0,A′1,…,A′ N-1 Each bit in the sequence represents a set of bits, A″0, A″1, ..., A″ N-1 Each in c represents a set of bit sequences. i Corresponding to A′ i i0i1…i (M-1) and A″ i i in M i (M+1) …i (L-2) ,c' i Corresponding to A′ i q0 q1…q (M-1) and A″ i q in M q (M+1) …q (L-2) c i Let c0, c1, c2, ..., c (N-1) any one of them, c' i Let c'0, c'1, c'2, ..., c' (N-1) Any one of them, A′ i is A′0,A′1,…,A′ N-1 Any one of them, A″ i is A″0,A″1,…,A″N-1 Any one of them.

[0248] The transmitting end adjusts the values ​​of bits in the third amplitude bit sequence and the fifth amplitude bit sequence based on the parity bits in the parity bit sequence. This can be achieved by adjusting the values ​​of one or more bits in the corresponding bit sequence in the third amplitude bit sequence and one or more bits in the corresponding bit sequence in the fifth amplitude bit sequence, based on each parity bit in the parity bit sequence. In one possible implementation, the parity bit sequence is c0 c'0c1 c'1…c (N-1) c' (N-1) The third amplitude bit sequence is {A′ o ,A′1,…,A′ N-1 The fifth amplitude bit sequence is {A″0,A″1,…,A″}. N-1},A′0,A′1,…,A′ N-1 Each bit in the sequence represents a set of bits, A″0, A″1, ..., A″ N-1 Each in c represents a set of bit sequences. i Corresponding to A′ i i0i1…i (M-1) and A″ i i in M i (M+1) …i (L-2) ,c' i Corresponding to A′ i q0 q1…q (M-1) and A″ i q in M q (M+1) …q (L-2) c i Let c0, c1, c2, ..., c (N-1) any one of them, c' i Let c'0, c'1, c'2, ..., c' (N-1) Any one of them, A′ i is A′0,A′1,…,A′ N-1 Any one of them, A″ i is A″0,A″1,…,A″ N-1 Any one of them; the sender will send c i As the sign bit, when c i When the value is the first value, adjust A′. i i0i1…i (M-1) The value of one or more bits in and A″ i i in M i (M+1) …i(L-2) the value of c i the value of A′ i the value of i0i1…i (M-1) the value of i0i1…i i the value of i M i (M+1) …i (L-2) the value of i i as a sign bit, when the value of c i the value of i0i1…i i the value of q0q1…q (M-1) the value of q0q1…q i the value of q0q1…q M the value of q (M+1) …q (L-2) the value of q0q1…q i the value of A′ i the value of q0q1…q (M-1) the value of q0q1…q i the value of q M q (M+1) …q (L-2) the value of q0q1…q (M-1) the value of q (M-1)} and {i M ,q M ,i (M+1) ,q (M+1) …i (L-2) ,q (L-2)} corresponding to the above-mentioned step 305.

[0249] As an example, each group of bit sequences in the third amplitude bit sequence is represented by i0q0, i0 being the bit corresponding to I path in the group of bit sequences, q0 being the bit corresponding to Q path in the group of bit sequences, each group of bit sequences in the fifth amplitude bit sequence is represented by i1q1i2q2, A′ i being any group of bit sequences in the third amplitude bit sequence, A″ i being any group of bit sequences in the fifth amplitude bit sequence; the transmitting end takes c i as a sign bit, when the value of c i the value of i0i1…i i the value of i0i1…i i the value of i0i1…i i the value of i0i1…i i the value of i0i1…ii the value of i1i2in the first value; c i as a symbol bit, when the value of c i the value of q0in the first value; A" i the value of q0in the first value; A" i the value of q2in the first value; A" i the value of i1i2in the first value; c i the value of i1i2in the first value; c i the value of i1i2in the first value; c

[0250] 306、The sending end maps the adjusted third amplitude bit sequence, the adjusted fifth amplitude bit sequence and the check bit sequence to constellation points to obtain output bits.

[0251] In other words, the sending end obtains output bits according to the adjusted third amplitude bit sequence, the adjusted fifth amplitude bit sequence and the check bit sequence. The output bits of the hierarchical encoding include N constellation points. In other words, the output bits of the hierarchical encoding include N bit sequences, each bit sequence being a constellation point in the hierarchical encoding modulation constellation. The N bit sequences are obtained by the sending end according to N groups of bit sequences in the adjusted third amplitude bit sequence, N groups of bit sequences in the adjusted fifth amplitude bit sequence and N groups of bit sequences contained in the check bit sequence. The adjusted third amplitude bit sequence is the third amplitude bit sequence obtained by the sending end after performing step 305. The adjusted fifth amplitude bit sequence is the fifth amplitude bit sequence obtained by the sending end after performing step 305.

[0252] In a possible implementation, the N groups of bit sequences contained in the adjusted third amplitude bit sequence correspond one-to-one to the N groups of bit sequences contained in the adjusted fifth amplitude bit sequence, the N groups of bit sequences contained in the check bit sequence correspond one-to-one to the N groups of bit sequences contained in the adjusted third amplitude bit sequence, and the N groups of bit sequences contained in the check bit sequence correspond one-to-one to the N groups of bit sequences contained in the adjusted fifth amplitude bit sequence; the sending end can map a bit sequence #i3 (a group of bit sequences) in the adjusted third amplitude bit sequence, a bit sequence #i4 (a group of bit sequences) in the adjusted fifth amplitude bit sequence and a bit sequence #i5 (a group of bit sequences) in the check bit sequence to a constellation point; wherein the bit sequence #i3 corresponds to the bit sequence #i4, the bit sequence #i3 corresponds to the bit sequence #i5, and the bit sequence #i4 corresponds to the bit sequence #i5. As an example, i0q0i1q1…i (M-1) q (M-1) denotes a group of bit sequences (for example, bit sequence #i3) in the adjusted third amplitude bit sequence, i M q Mi (M+1) q (M+1) …i (L-2) q (L-2) For a set of bit sequences (e.g. bit sequence #i4) in the adjusted fifth amplitude bit sequence, c i c’ i For a set of bit sequences (bit sequence #i5) in the check bit sequence; the transmitting end maps i0 q0 i1 q1…i (M-1) q (M-1) 、i M q M i (M+1) q (M+1) …i (L-2) q (L-2) and c i c’ i to a constellation point, i.e. i0 q0 i1 q1…i (M-1) q (M-1) i M q M i (M+1) q (M+1) …i (L-2) q (L-2) c i c’ I . Referring to FIG. 15B, the mapping process is to map the adjusted {i0, q0, i1, q1, …i (M-1) ,q (M- 1) (i.e. i0 q0 i1 q1…i (M-1) q (M-1) ), the adjusted {i M ,q M ,i (M+1) ,q (M+1) …i (L-2) ,q (L-2)}(i.e. i M q M i (M+1) q (M+1) …i (L-2) q (L-2) ) and c i c’ i to a constellation point, i.e. i0 q0 i1 q1…i (M-1) q (M-1) c i c’ I i M q M i (M+1) q (M+1) …i (L-2) q (L-2)The mapping processing corresponds to step 105.

[0253] 307. The sending end maps the output bits of the layered coding based on the layered coding modulation constellation.

[0254] The output bits of the layered coding include N bit sequences, each bit sequence being a constellation point in the layered coding modulation constellation. The sending end mapping the output bits of the layered coding based on the layered coding modulation constellation can be mapping each bit sequence included in the output bits of the layered coding to a modulation symbol.

[0255] The sending end performing the layered coding procedure shown in FIG. 15A can make the probability distribution of the adjusted amplitude symbol sequence satisfy the axial symmetry feature; the performance gain brought by the probability amplitude shaping is maintained, and meanwhile the layered coding modulation has the advantage of reducing the decoding complexity.

[0256] The following describes another possible implementation of step 701 in FIG. 7 and the corresponding example in detail in combination with FIG. 15C. FIG. 15C is a schematic diagram of another layered coding procedure provided by the embodiments of the present application. In the layered coding procedure shown in FIG. 15C, the layered coding includes coding of a first layer and coding of at least one second layer, the at least one second layer including only one layer and corresponding to no coding. Referring to FIG. 15C, the main steps of the sending end performing layered coding on the second input bits are as follows:

[0257] 401. The sending end inputs the second input bits to the distribution matcher to obtain an amplitude symbol sequence.

[0258] Referring to FIG. 15C, the input of the distribution matcher is the second input bits, and the output of the distribution matcher is the amplitude symbol sequence. Step 401 can refer to step 101 in FIG. 10A. FIG. 15D is a schematic diagram of another layered coding procedure provided by the embodiments of the present application. In order to facilitate understanding of the method procedure shown in FIG. 15C, in FIG. 15D, taking mapping one amplitude number to a bit sequence to be mapped using the layered coding modulation constellation as an example, the procedure shown in FIG. 15C is described. Referring to FIG. 15D, the input of the distribution matcher is the second input bits, and the output of the distribution matcher is the amplitude symbol sequence. The operation of the distribution matcher processing the second input bits to output the amplitude symbol sequence is step 401 in FIG. 15C. Each amplitude symbol in the amplitude symbol sequence output by the distribution matcher can be represented as {i0, q0, i1, q1, … iN-1, qN-1}. (L-2) (L-2)}.

[0259] 402. The sending end LDPC encodes the second bit sequence to obtain a check bit sequence.

[0260] ​Step 402 can refer to step 303 in FIG. 15A. The order of step 402 and step 401 is not limited. Referring to FIG. 15D, the operation of the sending end LDPC encoding the second bit sequence corresponds to step 402, c i c’ i represents two check bits corresponding to one amplitude symbol, c i corresponds to the I path, c’ i corresponds to the Q path.

[0261] 403. The sending end adjusts the value of the bit in the amplitude symbol sequence based on the check bit in the check bit sequence.

[0262] In one possible implementation, the check bit sequence contains N check bits corresponding to the I path and N check bits corresponding to the Q path. In other words, the check bit sequence contains N groups of bit sequences, and each group of bit sequences includes two check bits. For example, the check bit sequence is c0 c’0c1 c’1…c (N-1) c’ (N-1) , where c0, c1, c2, … c (N-1) corresponds to the I path, c’0, c’1, c’2, … c’ (N-1) corresponds to the Q path. The amplitude symbol sequence contains N groups of bit sequences corresponding to the I path and N groups of bit sequences corresponding to the Q path. The N check bits corresponding to the I path in the check bit sequence correspond to the N groups of bit sequences corresponding to the I path in the amplitude symbol sequence, and the N check bits corresponding to the Q path in the check bit sequence correspond to the N groups of bit sequences corresponding to the Q path in the amplitude symbol sequence. In other words, when any check bit in the check bit sequence corresponds to the I path, the check bit corresponds to a group of bit sequences corresponding to the I path in the amplitude symbol sequence, and when the check bit corresponds to the Q path, the check bit corresponds to a group of bit sequences corresponding to the Q path in the amplitude symbol sequence. As an example, the check bit sequence is c0 c’0c1 c’1…c (N-1) c’ (N-1) , and the amplitude symbol sequence is {A0, A1, …, A N-1}, where each of A0, A1, …, A N-1 represents a group of bit sequences, c i corresponds to i0i1…i i in A (L-2) , c’0, c’1, c’2, … c’ i corresponds to q0 q1…q i in A (L-2) , c i is any one of c0, c1, c2, … c (N-1) , c’ i is any one of c’0, c’1, c’2, … c’ (N-1) , A iLet A0, A1, ..., A N-1 Any one of them.

[0263] The transmitter adjusts the values ​​of bits in the amplitude symbol sequence based on the parity bits in the parity bit sequence. This can be achieved by adjusting the values ​​of one or more bits in a set of bits corresponding to each parity bit in the parity bit sequence. In one possible implementation, the parity bit sequence is c0 c'0c1 c'1…c (N-1) c' (N-1) The amplitude sign sequence is {A0, A1, ..., A...} N-1},A0,A1,…,A N-1 Each in c represents a set of bit sequences. i Corresponding to A i i0i1…i (L-2) ,c' i Corresponding to A i q0q1…q (L-2) c i Let c0, c1, c2, ..., c (N-1) any one of them, c' i Let c'0, c'1, c'2, ..., c' (N-1) Any one of them, A i Let A0, A1, ..., A N-1 Any one of them; the sender will c i As the sign bit, when c i When the value is the first value, adjust A. i i0i1…i (L-2) The value of one or more bits in c i When A takes the second value, i i0i1…i (L-2) The values ​​of c' remain unchanged; i As the sign bit, when c' i When the value is the first value, adjust A′. i q0 q1…q (L-2) The value of one or more bits in c' i When A' takes the second value, i q0 q1…q (L-2) The values ​​of all remain unchanged. Referring to Figure 15D, the adjustment operation represents adjusting {i0, q0, i1, q1, ... i} based on the parity bits. (L-2) ,q (L-2) The values ​​of the bits in} correspond to step 403 above.

[0264] As an example, each group of bit sequences in the amplitude symbol sequence is denoted as i0q0i1q1i2q2, i0, i1, i2 are bits corresponding to the I path in the group of bit sequences, q0, q1, q2 are bits corresponding to the Q path in the group of bit sequences, A′ i is any group of bit sequences in the amplitude symbol sequence; the sending end maps c i as a symbol bit, when the value of c i is the first value, the values of i0 and i2 in A′ i are adjusted, when the value of c i is the second value, the values of i0, i1 and i2 in A′ i remain unchanged; c′ i is a symbol bit, when the value of c′ i is the first value, the values of q0 and q2 in A′ i are adjusted, when the value of c′ i is the second value, the values of q0, q1 and q2 in A′ i remain unchanged.

[0265] 404. The sending end maps the adjusted amplitude symbol sequence and the check bit sequence to constellation points to obtain output bits.

[0266] In other words, the sending end obtains output bits according to the adjusted amplitude symbol sequence and the check bit sequence. The output bits of the hierarchical encoding include N constellation points. In other words, the output bits of the hierarchical encoding include N bit sequences, each bit sequence being a constellation point in the hierarchical encoding modulation constellation. The N bit sequences are obtained by the sending end according to N groups of bit sequences in the adjusted amplitude symbol sequence and N groups of bit sequences contained in the check bit sequence. The adjusted amplitude symbol sequence is the amplitude symbol sequence obtained by the sending end after step 403.

[0267] In a possible implementation, the N groups of bit sequences contained in the adjusted amplitude symbol sequence correspond one-to-one to the N groups of bit sequences contained in the check bit sequence; the sending end can map each group of bit sequences in the adjusted amplitude symbol sequence and a corresponding group of check bits in the check bit sequence as a constellation point. As an example, i0q0i1q1…i (L-2) q (L-2) denotes a group of bit sequences in the adjusted amplitude symbol sequence, c i c′ i is a group of bit sequences in the check bit sequence; the sending end maps i0q0i1q1…i (L-2) q (L-2) and c i c′ i, maps to a constellation point, i0q0i1q1…i (L-2) q (L-2) c i c’ I Referring to FIG. 15D, the mapping process is to map the adjusted {i0, q0, i1, q1, …, i (L-2) q (L-2)} (i.e., i0q0i1q1…i (L-2) q (L-2) ) and c i c’ i to a constellation point, i0q0i1q1…i (L-2) q (L-2) c i c’ I , which corresponds to step 404.

[0268] 405. The transmitter maps the output bits of the layered encoding based on the layered encoding modulation constellation.

[0269] The output bits of the layered encoding include N bit sequences, each bit sequence being a constellation point in the layered encoding modulation constellation. The transmitter mapping the output bits of the layered encoding based on the layered encoding modulation constellation can be mapping each bit sequence included in the output bits of the layered encoding to a modulation symbol.

[0270] The transmitter performing the layered encoding process shown in FIG. 15C can make the probability distribution of the adjusted amplitude symbol sequence satisfy the axial symmetry feature; the performance gain brought by the probability amplitude shaping is maintained, and the layered encoding modulation also has the advantage of reducing the decoding complexity.

[0271] Another possible implementation of step 701 in FIG. 7 and the corresponding example are described in detail below with reference to FIG. 15E. FIG. 15E is a schematic diagram of another layered encoding process provided by an embodiment of the present application. In the layered encoding process shown in FIG. 15E, the layered encoding includes encoding of a first layer and encoding of at least one second layer, the at least one second layer including only one layer and corresponding to the second encoding mode described above. Referring to FIG. 15E, the main steps of the layered encoding of the second input bits by the transmitter are as follows:

[0272] 501. The transmitter inputs the second input bits to the distribution matcher to obtain an amplitude symbol sequence.

[0273] Referring to FIG. 15E, the input of the distribution matcher is the second input bit, and the output of the distribution matcher is the amplitude symbol sequence. Step 501 can refer to step 101 in FIG. 10A. Referring to FIG. 15F, the input of the distribution matcher is the second input bit, and the output of the distribution matcher is the amplitude symbol sequence. The operation of the distribution matcher processing the second input bit to output the amplitude symbol sequence is step 501 in FIG. 15E. Each amplitude symbol in the amplitude symbol sequence output by the distribution matcher can be represented as {i0, q0, i1, q1, … i (L-2) (L-2) .

[0274] 502. The sending end LDPC encodes the second bit sequence to obtain a check bit sequence.

[0275] Step 502 can refer to step 303 in FIG. 15A. The order of step 502 and step 501 is not limited. Referring to FIG. 15F, the operation of the sending end LDPC encoding the second bit sequence corresponds to step 502, c i i represents two check bits corresponding to one amplitude symbol, c i corresponds to the I path, and c i corresponds to the Q path.

[0276] 503. The sending end encodes the amplitude symbols in the amplitude symbol sequence using a second encoding manner.

[0277] Referring to FIG. 15F, {i0, q0, i1, q1, … i (L-2) (L-2)} output by the distribution matcher, to obtain the encoded {i0, q0, i1, q1, … i (L-2) (L-2)}, i.e., the encoded amplitude symbols.

[0278] 504. The sending end adjusts the value of the bits in the encoded amplitude symbol sequence based on the check bits in the check bit sequence.

[0279] Step 504 can refer to step 403 in FIG. 15C, which will not be described here. Referring to FIG. 15F, the adjusting operation represents adjusting the value of the bits in {i0, q0, i1, q1, … i (L-2) (L-2)} based on the check bits, which corresponds to step 504.

[0280] 505. The sending end maps the adjusted amplitude symbol sequence and the check bit sequence to constellation points to obtain output bits.

[0281] ​​​​​Or, the transmitting end obtains the output bits according to the adjusted amplitude symbol sequence and the check bit sequence. The adjusted amplitude symbol sequence in step 505 is the amplitude symbol sequence obtained by the transmitting end in step 504. Step 505 can refer to step 404 in FIG. 15C. Referring to FIG. 15F, the mapping process is to map the adjusted {i0, q0, i1, q1, …, i (L-2) (L-2)}(i.e., i0 q0 i1 q1…i (L-2) (L-2) ) and c i c’ i to a constellation point, i0 q0 i1 q1…i (L-2) (L-2) c i c’ I , which corresponds to step 505.

[0282] 506. The transmitting end maps the output bits of the layered encoding according to the layered encoding modulation constellation.

[0283] The output bits of the layered encoding include N bit sequences, and each bit sequence is a constellation point in the layered encoding modulation constellation. The transmitting end mapping the output bits of the layered encoding according to the layered encoding modulation constellation can be mapping each bit sequence included in the output bits of the layered encoding to a modulation symbol.

[0284] The transmitting end performs the layered encoding process shown in FIG. 15E, so that the probability distribution of the adjusted amplitude symbol sequence satisfies the axisymmetric feature; the performance gain brought by the probability amplitude shaping is maintained, and the advantage of reducing the decoding complexity of the layered encoding modulation is also possessed.

[0285] The following describes two examples in which the transmitting end performs the layered encoding process shown in FIG. 15A, FIG. 15C or FIG. 15E, so that the probability distribution of the adjusted amplitude symbol sequence satisfies the axisymmetric feature.

[0286] Example 3:

[0287] ​​​In step 301, the amplitudes of the I or Q of the amplitude symbol sequence outputted by the distribution matcher are ordered from high to low probability as: 001, 100, 000, 101, 011, 110, 010, 111. Or, the distribution probability of the amplitudes of the I or Q of the amplitude symbol sequence outputted by the distribution matcher is ordered from high to low as: 001, 100, 000, 101, 011, 110, 010, 111. The amplitude of the I is any one of 001, 100, 000, 101, 011, 110, 010, 111, and the amplitude of the Q is any one of 001, 100, 000, 101, 011, 110, 010, 111. Each amplitude of the I and the symbol bit corresponding to the amplitude of the I jointly constitute the I of a constellation point. The I of the constellation point contains 4 bits. Each amplitude of the Q and the symbol bit corresponding to the amplitude of the Q jointly constitute the Q of the constellation point, and the bit sequence of the Q contains 4 bits. The I of the constellation point and the Q of the constellation point can constitute a bit sequence to be mapped by the hierarchical coding modulation constellation. The sending end maps the amplitude of the I to the I of the constellation point in the same or similar manner as mapping the amplitude of the Q to the Q of the constellation point. The following describes the mapping of the amplitude of the I to the I of the constellation point by the sending end as an example. The manner of mapping the amplitude of the I to the I of the constellation point by the sending end is one of the examples of step 304 to step 306.

[0288] FIG. 16 is a schematic diagram of another 256QAM hierarchical coded modulation constellation I path provided by an embodiment of the present application.As shown in FIG. 16, 1111, 1110, 1101, 1100, 1011, 1010, 1001, 1000, 0011, 0010, 0001, 0000, 0111, 0110, 0101, 0100 are I paths of constellation points respectively, the distribution probability of 1000 and 0011 is same, the distribution probability of 1001 and 0010 is same, the distribution probability of 1010 and 0001 is same, the distribution probability of 0000 and 1011 is same, the distribution probability of 1100 and 0111 is same, the distribution probability of 0110 and 1101 is same, the distribution probability of 1110 and 0101 is same, the distribution probability of 0100 and 1111 is same; the LSB in 1111, 1101, 1011, 1001, 0011, 0001, 0111, 0101 is 1, the MSB, the second MSB and the third MSB of 1111 form 111 according to the order from the highest bit to the lowest bit, the MSB, the second MSB and the third MSB of 1101 form 110 according to the order from the highest bit to the lowest bit, the MSB, the second MSB and the third MSB of 1011 form 101 according to the order from the highest bit to the lowest bit, the MSB, the second MSB and the third MSB of 1001 form 100 according to the order from the highest bit to the lowest bit, the MSB, the second MSB and the third MSB of 0011 form 001 according to the order from the highest bit to the lowest bit, the MSB, the second MSB and the third MSB of 0001 form 000 according to the order from the highest bit to the lowest bit, the MSB, the second MSB and the third MSB of 0111 form 011 according to the order from the highest bit to the lowest bit, the MSB, the second MSB and the third MSB of 0101 form 010 according to the order from the highest bit to the lowest bit; the LSB in 1110, 1100, 1010, 1000, 0010, 0000, 0110, 0100 is 0, the MSB, the second MSB and the third MSB of 1110 form 111 according to the order from the highest bit to the lowest bit, the MSB, the second MSB and the third MSB of 1100 form 110 according to the order from the highest bit to the lowest bit, the MSB, the second MSB and the third MSB of 1010 form 101 according to the order from the highest bit to the lowest bit, the MSB, the second MSB and the third MSB of 1000 form 100 according to the order from the highest bit to the lowest bit, the MSB, the second MSB and the third MSB of 0010 form 001 according to the order from the highest bit to the lowest bit, the MSB, the second MSB and the third MSB of 0000 form 000 according to the order from the highest bit to the lowest bit, the MSB, the second MSB and the third MSB of 0110 form 011 according to the order from the highest bit to the lowest bit, the MSB, the second MSB and the third MSB of 0100 form 010 according to the order from the highest bit to the lowest bit.

[0289] Referring to FIG. 16, the probability distribution of 0011, 1001, 0001, 1011, 0111, 1101, 0101, 1111 decreases in turn. When the value of the sign bit corresponding to the amplitude symbol of the I path is 1, the sending end maps the amplitude symbol of the I path to the MSB, the second MSB, the third MSB of the I path of the constellation point, and maps the sign bit to the LSB of the I path of the constellation point, so that the probability distribution of the amplitude symbol of the I path is ordered from high to low as follows: 001, 100, 000, 101, 011, 110, 010, 111. Among them, the MSB of the amplitude symbol of the I path is mapped to the MSB of the I path of the constellation point, the second MSB of the amplitude symbol of the I path is mapped to the second MSB of the I path of the constellation point, and the LSB of the amplitude symbol of the I path is mapped to the third MSB of the I path of the constellation point. For example, when the value of the sign bit corresponding to the amplitude symbol of the I path is 1, the I path of the constellation point mapped by 001 is 0011, the I path of the constellation point mapped by 100 is 1001, the I path of the constellation point mapped by 000 is 0001, the I path of the constellation point mapped by 101 is 1011, the I path of the constellation point mapped by 011 is 0111, the I path of the constellation point mapped by 110 is 1101, the I path of the constellation point mapped by 010 is 0101, and the I path of the constellation point mapped by 111 is 1111; referring to FIG. 16, the probability distribution of 0011, 1001, 0001, 1011, 0111, 1101, 0101, 1111 decreases in turn, that is, the probability distribution of the I path of the constellation point mapped by 001, 100, 000, 101, 011, 110, 010, 111 decreases in turn. Therefore, when the sending end maps the amplitude symbol of the I path to the MSB, the second MSB, the third MSB of the I path of the constellation point, and maps the sign bit to the LSB of the I path of the constellation point, the probability distribution of the amplitude symbol of the I path can be ordered from high to low as follows: 001, 100, 000, 101, 011, 110, 010, 111.

[0290] When the value of the sign bit corresponding to the amplitude symbol of the I path is 0, if the sending end maps the amplitude symbol of the I path to the MSB, the second MSB, the third MSB of the I path of the constellation point, and maps the sign bit to the LSB of the I path of the constellation point, wherein the I path of the constellation point to which 100 is mapped is 1000, the I path of the constellation point to which 001 is mapped is 0010, the I path of the constellation point to which 101 is mapped is 1010, the I path of the constellation point to which 000 is mapped is 0000, the I path of the constellation point to which 110 is mapped is 1100, the I path of the constellation point to which 011 is mapped is 0110, the I path of the constellation point to which 111 is mapped is 1110, and the I path of the constellation point to which 010 is mapped is 0100, then the probability distribution of the amplitude symbol of the I path is ordered from high to low as: 100, 001, 101, 000, 110, 011, 111, 010, which is different from the probability distribution of the amplitude symbol of the I path in the amplitude symbol sequence output by the distribution matcher.

[0291] In Example 3, the sending end can encode part or all of the bits in the amplitude symbol of the I path to obtain the encoded amplitude symbol of the I path. As an example, the sending end encodes all the bits in the amplitude symbol of the I path by using the second encoding manner described above. As another example, the sending end encodes the second MSB and the LSB in the amplitude symbol of the I path by using the second encoding manner described above, and the MSB in the amplitude symbol of the I path corresponds to no encoding, i.e., no encoding is performed on the MSB in the amplitude symbol of the I path.

[0292] In order to make the probability distribution of the amplitude symbol of the encoded I path satisfy the axisymmetric characteristic, the application adopts the following scheme (corresponding to the above steps 305 to 306): when the value of the symbol bit corresponding to the amplitude symbol (for example, the above first amplitude symbol) of the encoded I path is 0, the sending end adjusts the values of the MSB and LSB of the amplitude symbol of the encoded I path; when the value of the symbol bit corresponding to the adjusted amplitude symbol of the I path is 1, the values of the MSB and LSB of the adjusted amplitude symbol of the I path remain unchanged; the adjusted amplitude symbol of the I path is mapped to the MSB, the second MSB, the third MSB of the constellation point and the LSB of the constellation point. For example, when the value of the symbol bit corresponding to 001 (the adjusted amplitude symbol of the I path) is 1, the I path of the constellation point mapped by 001 is 0011; when the value of the symbol bit corresponding to 100 is 1, the I path of the constellation point mapped by 100 is 1001; when the value of the symbol bit corresponding to 000 is 1, the I path of the constellation point mapped by 000 is 0001; when the value of the symbol bit corresponding to 101 is 1, the I path of the constellation point mapped by 101 is 1011; when the value of the symbol bit corresponding to 011 is 1, the I path of the constellation point mapped by 011 is 0111; when the value of the symbol bit corresponding to 110 is 1, the I path of the constellation point mapped by 110 is 1101; when the value of the symbol bit corresponding to 010 is 1, the I path of the constellation point mapped by 010 is 0101; when the value of the symbol bit corresponding to 111 is 1, the I path of the constellation point mapped by 111 is 1111.

[0293] When the value of the corresponding symbol bit of 001 is 0, the I path of the constellation point mapped by 001 is 1000; when the value of the corresponding symbol bit of 100 is 0, the I path of the constellation point mapped by 100 is 0010; when the value of the corresponding symbol bit of 000 is 0, the I path of the constellation point mapped by 000 is 1010; when the value of the corresponding symbol bit of 101 is 0, the I path of the constellation point mapped by 101 is 0000; when the value of the corresponding symbol bit of 011 is 0, the I path of the constellation point mapped by 011 is 1100; when the value of the corresponding symbol bit of 110 is 0, the I path of the constellation point mapped by 110 is 0110; when the value of the corresponding symbol bit of 010 is 0, the I path of the constellation point mapped by 010 is 1110; when the value of the corresponding symbol bit of 111 is 0, the I path of the constellation point mapped by 111 is 0100; wherein, in the hierarchical coding modulation constellation, the distribution probability of 1000 and 0011 is the same, the distribution probability of 1001 and 0010 is the same, the distribution probability of 1010 and 0001 is the same, the distribution probability of 0000 and 1011 is the same, the distribution probability of 1100 and 0111 is the same, the distribution probability of 0110 and 1101 is the same, the distribution probability of 1110 and 0101 is the same, the distribution probability of 0100 and 1111 is the same, refer to FIG. 9 and FIG. 16. It can be seen that the probability distribution of the amplitude symbol of the adjusted I path satisfies the axial symmetry characteristic. The amplitude symbol of the Q path has the same or similar characteristics (or features) as the amplitude symbol of the I path. The sending end maps the amplitude symbol of the I path to the I path of the constellation point in the same or similar way as mapping the amplitude symbol of the Q path to the Q path of the constellation point, and the probability distribution of the adjusted amplitude symbol of the Q path also satisfies the axial symmetry characteristic. Since the probability distribution of the amplitude symbol of the adjusted I path satisfies the axial symmetry characteristic and the probability distribution of the amplitude symbol of the adjusted Q path satisfies the axial symmetry characteristic, the probability distribution of the adjusted amplitude symbol sequence satisfies the axial symmetry characteristic.

[0294] The encoding and modulation method executed by the sending end under the PAS+ hierarchical coding modulation architecture is given below in combination with FIG. 17. FIG. 17 is a flowchart of an encoding and modulation method provided by an embodiment of the application. The method flow in FIG. 17 is one possible implementation of steps 701 to 702 in FIG. 7. As shown in FIG. 17, the method comprises:

[0295] 1701. The sending end inputs the second input bit to the distribution matcher to obtain an amplitude symbol sequence.

[0296] The second input bits are bit sequences that the sending end needs to send to the receiving end and expects the receiving end to obtain. The output of the distribution matcher is a sequence of amplitude symbols, which includes N amplitude symbols, each of which contains 6 bits. Each amplitude symbol can be represented as i0q0i1q1i3q3. The I channel of each amplitude symbol corresponds to {i0, i1, i3}, and the Q channel of each amplitude symbol corresponds to {q0, q1, q3}. In other words, the amplitude symbols of the I channel are i0i1i3, and the amplitude symbols of the Q channel are q0q1q3. The 2 bits in each amplitude symbol correspond to the non-coding layer (i.e., the at least one second layer described above), and the 4 bits correspond to the LDPC layer (i.e., the first layer described above). The {i0, i1} and {q0, q1} in each amplitude symbol correspond to the non-coding layer, and the {i3} and {q3} in each amplitude symbol correspond to the LDPC layer.

[0297] 1702. The sending end obtains a first amplitude bit sequence and a second amplitude bit sequence based on the sequence of amplitude symbols.

[0298] The sending end can obtain the {i3} and {q3} in each amplitude symbol in the sequence of amplitude symbols in order of their order in the sequence of amplitude symbols (e.g., from left to right) to obtain the first amplitude bit sequence, and obtain the i0q0i1q1 in each amplitude symbol in the sequence of amplitude symbols in order of their order in the sequence of amplitude symbols (e.g., from left to right) to obtain the second amplitude bit sequence. FIG. 18 is a schematic diagram of a layered encoding process provided by an embodiment of the present application. Referring to FIG. 18, the N groups of i0q0i1q1i3q3 represent the N amplitude symbols in the sequence of amplitude symbols, each group of i0q0i1q1i3q3 represents an amplitude symbol, the N groups of i3q3 represent the N groups of bit sequences in the first amplitude bit sequence, and the N groups of i0q0i1q1 represent the N groups of bit sequences in the second amplitude bit sequence.

[0299] 1703. The sending end LDPC encodes the first amplitude bit sequence and the r bits that have been rate matched to obtain a check bit sequence.

[0300] The r rate matched bits (i.e., the r bits that have been rate matched) and the generated check bits constitute the check bit sequence, which includes 2N check bits, i.e., N {i2} and N {q2}. r is an integer greater than 0. Referring to FIG. 18, the N groups of i2q2 represent the N groups of check bits in the check bit sequence. The N groups of i2q2 correspond one-to-one to the N groups of i0q0i1q1i3q3. In other words, each i2 corresponds to a group of i0q0i1q1i3q3, and each q2 corresponds to a group of i0q0i1q1i3q3.

[0301] 1704、The sending end adjusts the value of the bit in the second amplitude bit sequence based on the check bit in the check bit sequence.

[0302] As an example, when the value of i2 is 0, the value of i0 in the group of i0 q0 i1 q1 i3 q3 corresponding to i2 is adjusted, when the value of i2 is 1, the values of i0, i1 and i3 in the group of i0 q0 i1 q1 i3 q3 corresponding to i2 remain unchanged; when the value of q2 is 0, the value of q0 in the group of i0 q0 i1 q1 i3 q3 corresponding to q2 is adjusted, when the value of q2 is 1, the values of q0, q1 and q3 in the group of i0 q0 i1 q1 i3 q3 corresponding to q2 remain unchanged.

[0303] 1705、The sending end maps the first amplitude bit sequence, the adjusted second amplitude bit sequence and the check bit sequence to constellation points to obtain output bits.

[0304] Step 1705 can refer to step 105 in FIG. 10A. The output bits include N groups of i0 q0 i1 q1 i2 q2 i3 q3. Referring to FIG. 18, the N groups of i0 q0 i1 q1, the N groups of i2 q2 and the N groups of i2 q2 are combined to obtain the N groups of i0 q0 i1 q1 i2 q2 i3 q3.

[0305] 1706、The sending end maps the output bits of the hierarchical encoding based on a hierarchical encoding modulation constellation to obtain first modulation symbols.

[0306] Step 1706 can refer to step 702 in FIG. 7. The hierarchical encoding modulation constellation can be a 256QAM hierarchical encoding modulation constellation. It should be understood that the method flow in FIG. 17 is only one possible implementation of steps 701 to 702 in FIG. 7, and other implementations are similar to the flow shown in FIG. 17, which will not be illustrated one by one here.

[0307] The demodulation and decoding method executed by the receiving end under the PAS+ hierarchical encoding modulation architecture is given below in combination with FIG. 19. FIG. 19 is a flowchart of a demodulation and decoding method according to an embodiment of the present application. The method flow in FIG. 19 is one possible implementation of step 705 in FIG. 7. The demodulation and decoding method shown in FIG. 19 corresponds to the encoding and modulation method shown in FIG. 17. As shown in FIG. 19, the method includes:

[0308] 1901、The receiving end obtains N modulation symbols based on the received first signal.

[0309] 1902、The receiving end demodulates each modulated symbol to obtain log-likelihood ratio (LLR) soft values corresponding to {i0, i1, i2, i3} of the I channel and {q0, q1, q2, q3} of the Q channel.

[0310] wherein {i0, i1} in {i0, i1, i2, i3} corresponds to the non-encoding layer, and {i2, i3} corresponds to the LDPC encoding layer; {q0, q1} in {q0, q1, q2, q3} corresponds to the non-encoding layer, and {q2, q3} corresponds to the LDPC encoding layer. FIG. 20 is a schematic diagram of a demodulation and decoding process provided by an embodiment of the present application. Referring to FIG. 20, the receiving end demodulates N modulated symbols to obtain N groups of log-likelihood ratio (LLR) soft values corresponding to {i0, i1, i2, i3} of the I channel and N groups of LLR soft values corresponding to {q0, q1, q2, q3} of the Q channel.

[0311] 1903、The receiving end extracts LLR soft values corresponding to {i2, i3} of the LDPC layer and LLR soft values corresponding to {q2, q3} of the LDPC layer, and decodes the LDPC layer pair {i2, i3} and {q2, q3}.

[0312] If the decoding is correct, the receiving end obtains correct {i3} and {q3}; then, {i3} is determined to be 0 or 1 by hard decision, and {q3} is determined to be 0 or 1 by hard decision. If the decoding is incorrect, the receiving end performs step 1904, that is, LDPC re-encoding is performed on the LDPC layer pair {i3} and {q3} to obtain encoded bit sequences {i2, i3} and {q2, q3}. Referring to FIG. 20, the receiving end extracts LLR soft values corresponding to {i2, i3} of the LDPC layer and LLR soft values corresponding to {q2, q3} of the LDPC layer, and decodes the LDPC layer pair {i2, i3} and {q2, q3}.

[0313] 1904、The receiving end performs LDPC re-encoding on the LDPC layer pair {i3} and {q3} to obtain encoded bit sequences {i2, i3} and {q2, q3}.

[0314] Referring to FIG. 20, the receiving end performs LDPC re-encoding on the LDPC layer pair {i3} and {q3} to obtain encoded bit sequences {i2, i3} and {q2, q3}.

[0315] 1905、The receiving end demodulates the non-encoding layer pair {i0, i1} and {q0, q1}.

[0316] 1906、The receiving end adjusts the value of i0 according to the value of i2, and adjusts the value of q0 according to the value of q2.

[0317] 1907、The receiving end combines {i0, i1}, {q0, q1}, {i3} and N {q3} to obtain an amplitude symbol sequence.

[0318] Each amplitude symbol in the amplitude symbol sequence can be represented as i0q0i1q1i3q3.

[0319] The structure of a communication device that can implement the communication method provided in the embodiments of the present application will be described below with reference to the accompanying drawings. The communication device is briefly described below. For details of the implementation, refer to the description of the method embodiments above, which will not be repeated here.

[0320] FIG. 21 is a structural schematic diagram of a communication device 2100 provided in an embodiment of the present application. The communication device 2100 can correspond to the functions or steps implemented by the sending end in each of the method embodiments described above, or can correspond to the functions or steps implemented by the receiving end in each of the method embodiments described above. The communication device can include a processing module 2110 and a transceiver module 2120. In a possible implementation, a storage unit can also be included, which can be used to store instructions (codes or programs) and / or data. The processing module 2110 and the transceiver module 2120 can be coupled with the storage unit. For example, the processing module 2110 can read the instructions (codes or programs) and / or data in the storage unit to implement the corresponding method. The above-mentioned units can be independently arranged, or partially or wholly integrated. For example, the transceiver module 2120 can include a sending module and a receiving module. The sending module can be a transmitter, and the receiving module can be a receiver. The corresponding entity of the transceiver module 2120 can be a transceiver circuit, such as a transceiver or a communication interface.

[0321] In some possible implementations, the communication device 2100 can correspond to the behaviors and functions of the sending end in the method embodiments described above. For example, the communication device 2100 can be the sending end, or a component (such as a chip or a circuit) applied to the sending end. The transceiver module 2120 can be used to perform all receiving or sending operations performed by the sending end in the embodiments of FIG. 7, FIG. 10A, FIG. 10C, FIG. 15A, FIG. 15C, FIG. 15E and FIG. 17, for example. The processing module 2110 can be used to perform all operations performed by the sending end in the embodiments of FIG. 7, FIG. 10A, FIG. 10C, FIG. 15A, FIG. 15C, FIG. 15E and FIG. 17, except for the transceiver operations, for example.

[0322] In some possible implementation, the communication apparatus 2100 can correspond to implement the behavior and functions of the receiving end in the above-mentioned method embodiments. For example, the communication apparatus 2100 can be the receiving end, or a component (for example, a chip or a circuit) applied to the receiving end. The transceiver module 2120 can be used to perform all receiving or transmitting operations performed by the receiving end in the embodiments of FIG. 7, FIG. 19, for example. The processing module 2110 can be used to perform all operations performed by the receiving end in the embodiments of FIG. 7, FIG. 19, except for the transceiver operations, for example.

[0323] FIG. 22 is a structural schematic diagram of another apparatus 220 provided by the embodiments of the present application. The apparatus in FIG. 22 can be the above-mentioned sending end or a chip for the above-mentioned sending end, or the above-mentioned receiving end or a chip for the above-mentioned receiving end. As shown in FIG. 22, the apparatus 220 includes a processing circuit 2210 and a transceiver circuit 2220.

[0324] In some embodiments of the present application, the processing circuit 2210 and the transceiver circuit 2220 can be used to perform the functions or operations performed by the sending end, etc. The transceiver circuit 2220 can be used to perform all receiving or transmitting operations performed by the sending end in the embodiments of FIG. 7, FIG. 10A, FIG. 10C, FIG. 15A, FIG. 15C, FIG. 15E, FIG. 17, for example. The processing circuit 2210 can be used to perform all operations performed by the sending end in the embodiments of FIG. 7, FIG. 10A, FIG. 10C, FIG. 15A, FIG. 15C, FIG. 15E, FIG. 17, except for the transceiver operations, for example.

[0325] In some embodiments of the present application, the processing circuit 2210 and the transceiver circuit 2220 can be used to perform the functions or operations performed by the receiving end, etc. The transceiver circuit 2220 can be used to perform all receiving or transmitting operations performed by the receiving end in the embodiments of FIG. 7, FIG. 19, for example. The processing circuit 2210 can be used to perform all operations performed by the receiving end in the embodiments of FIG. 7, FIG. 19, except for the transceiver operations, for example.

[0326] In a possible implementation, the apparatus is the above-mentioned sending end or receiving end, the transceiver circuit 2220 includes at least one transceiver, and the processing circuit 2210 includes at least one processor, or a circuit for processing or control in the at least one processor.

[0327] The transceiver is configured to communicate with other devices / apparatuses via a transmission medium. The processor is configured to receive and / or send data and / or signaling with the transceiver, and is configured to implement the methods in the above-described method embodiments. The processor can implement the functions of the processing module 2110, and the transceiver can implement the functions of the transceiving module 2120. Optionally, the transceiver can include a radio frequency circuit and an antenna, where the radio frequency circuit is mainly configured to convert a baseband signal into a radio frequency signal and process the radio frequency signal. The antenna is mainly configured to transceive a radio frequency signal in the form of an electromagnetic wave. The input / output device, such as a touch screen, a display screen, a keyboard, etc., is mainly configured to receive data input by a user and output data to the user.

[0328] Optionally, the apparatus 220 can further include at least one memory configured to store program instructions and / or data. The memory is coupled to the processor. The coupling in the embodiments of the present application is an indirect coupling or communication connection between apparatuses, units or modules, which can be electrical, mechanical or other forms, and is configured to enable information interaction between the apparatuses, units or modules. The processor can operate in cooperation with the memory. The processor can execute program instructions stored in the memory. At least one of the at least one memory can be included in the processor.

[0329] The processor can read software programs in the memory, execute instructions of the software programs, and process data of the software programs. When data needs to be transmitted wirelessly, the processor performs baseband processing on the data to be transmitted, and outputs a baseband signal to the radio frequency circuit. The radio frequency circuit performs radio frequency processing on the baseband signal, and transmits a radio frequency signal in the form of an electromagnetic wave to the outside through the antenna. When data is transmitted to the apparatus 220, the radio frequency circuit receives a radio frequency signal through the antenna, converts the radio frequency signal into a baseband signal, and outputs the baseband signal to the processor. The processor converts the baseband signal into data and processes the data.

[0330] In another implementation, the radio frequency circuit and the antenna described above can be arranged independently of the processor that performs baseband processing, for example, in a distributed scenario, the radio frequency circuit and the antenna can be arranged remotely from the apparatus 220.

[0331] The specific connection medium between the transceiver, the processor and the memory in the embodiments of the present application is not limited.

[0332] In the embodiments of the present application, the processor can be one of the following devices: a general processor, a digital signal processor, an application specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, or all or part of the circuitry of the foregoing devices for processing functions, which can implement or execute the disclosed methods, steps and logic block diagrams in the embodiments of the present application. The general processor can be a microprocessor or any conventional processor. The steps of the method disclosed in combination with the embodiments of the present application can be directly embodied as execution completed by a hardware processor, or executed by a combination of hardware and software modules in the processor.

[0333] In a possible implementation, the apparatus is a chip for the above-mentioned sending end or receiving end, the processing circuit 2210 includes at least one logic circuit, and the transceiver circuit 2220 includes at least one interface. The processing module 2110 in FIG. 21 can be implemented by a logic circuit, and the transceiver module 2120 in FIG. 21 can be implemented by an interface. The logic circuit can be a chip, a processing circuit, an integrated circuit or a system on chip (SoC) chip, and the interface can be a communication interface, an input / output interface, etc. In the embodiments of the present application, the logic circuit and the interface can also be coupled to each other. The specific connection mode of the logic circuit and the interface is not limited in the embodiments of the present application.

[0334] The present application also provides a computer readable storage medium, which stores a computer program or instructions, when the computer program or instructions are run on a computer, so that the computer executes the method of the above-mentioned embodiments.

[0335] The present application also provides a computer program product, which includes instructions or computer programs, when the instructions or computer programs are run on a computer, so that the method in the above-mentioned embodiments is executed.

[0336] The present application also provides a communication system, which includes the above-mentioned sending end and the above-mentioned receiving end.

[0337] The present application also provides a chip, which includes: a communication interface and a processor; the communication interface is used for signal transceiving of the above-mentioned chip; the processor is used for executing computer program instructions, so that the communication apparatus including the above-mentioned chip executes the method in the above-mentioned embodiments.

[0338] In the above embodiments, all or part of the embodiments can be implemented by software, hardware, firmware or any combination thereof. When implemented by software, all or part of the embodiments can be implemented in the form of a computer program product. The above computer program product includes one or more computer programs or instructions. When the above computer programs or instructions are loaded and executed on a computer, all or part of the above processes or functions of the embodiments are performed. The computer can be a general purpose computer, a special purpose computer, a computer network, a network device, a user equipment or other programmable apparatus. The above computer programs or instructions can be stored in a computer readable storage medium or transferred from one computer readable storage medium to another computer readable storage medium, for example, the above computer programs or instructions can be transferred from one website, computer, server or data center to another website, computer, server or data center through wired or wireless manner. The above computer readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center and the like integrated with one or more available media. The above available medium can be a magnetic medium, for example, a floppy disk, a hard disk, a magnetic tape; or an optical medium, for example, a digital video disc; or a semiconductor medium, for example, a solid state disk. The computer readable storage medium can be a volatile or non-volatile storage medium, or can include both volatile and non-volatile storage media.

[0339] In various embodiments of the present application, the terms and / or descriptions of different embodiments are consistent and can be referred to each other if there is no special description and logical conflict, and the technical features in different embodiments can be combined to form new embodiments according to their inherent logical relationship.

Claims

1. A communication method characterized by comprising: The method comprises: performing hierarchical encoding on the first input bits, wherein the hierarchical encoding comprises encoding of a first layer and encoding of at least one second layer, the first layer corresponds to a first encoding mode, one of the at least one second layer corresponds to a second encoding mode or no encoding, and all or part of the first input bits are amplitude symbol sequences output by a distribution matcher; wherein a first check bit obtained by encoding of the first layer is a first symbol bit, the amplitude symbol sequences comprise a first amplitude symbol, the first amplitude symbol corresponds to an I path, the first check bit corresponds to the I path, or the first amplitude symbol corresponds to a Q path, and the first check bit corresponds to the Q path; the hierarchical encoding further comprises: when the first symbol bit takes a first value, adjusting values of one or more bits of the at least one second layer, and when the first symbol bit takes a second value, the values of the one or more bits remain unchanged, the one or more bits comprise part of bits obtained by processing the first amplitude symbol by the second encoding mode, and / or the one or more bits comprise part of bits in the first amplitude symbol and the corresponding layer is not encoded; mapping output bits of the hierarchical encoding based on a modulation constellation of the hierarchical encoding.

2. The method of claim 1, wherein, The first amplitude symbol is a bit sequence comprising 2 bits, the at least one second layer comprises only one layer and corresponds to no encoding, the at least one second layer corresponds to a most significant bit (MSB) of the first amplitude symbol, and the first layer corresponds to a least significant bit (LSB) of the first amplitude symbol; or the first amplitude symbol in the amplitude symbol sequences is a bit sequence comprising 3 bits, the at least one second layer comprises only one layer and corresponds to no encoding, the at least one second layer corresponds to a MSB and a second MSB of the first amplitude symbol, and the first layer corresponds to a LSB of the first amplitude symbol; the one or more bits are MSBs of the first amplitude symbol corresponding to the at least one second layer.

3. The method of claim 2, wherein, The first amplitude symbol is a bit sequence comprising 2 bits, and output bits of the hierarchical encoding comprise a first bit sequence comprising 3 bits; when the first symbol bit takes the second value, a MSB of the first bit sequence is a MSB of the first amplitude symbol, and when the first symbol bit takes the first value, the MSB of the first bit sequence is a MSB of the first amplitude symbol after adjustment; a second MSB of the first bit sequence is the first symbol bit, and a LSB of the first bit sequence is a LSB of the first amplitude symbol.

4. The method of claim 2, wherein, The first amplitude symbol is a bit sequence comprising 3 bits, and output bits of the hierarchical encoding comprise a first bit sequence comprising 4 bits; when the first symbol bit takes the second value, a MSB of the first bit sequence is a MSB of the first amplitude symbol, and when the first symbol bit takes the first value, the MSB of the first bit sequence is a MSB of the first amplitude symbol after adjustment; The second MSB of the first bit sequence is the second MSB of the first amplitude symbol, the third MSB of the first bit sequence is the first bit, and the LSB of the first bit sequence is the LSB of the first amplitude symbol.

5. The method of claim 1, wherein, The first input bit includes a first part and a second part, the first part is an amplitude symbol sequence output by a distribution matcher, and the second part includes a second bit sequence; the first amplitude symbol is a bit sequence including 3 bits; the at least one second layer includes a third layer and a fourth layer, the third layer corresponds to no encoding, and the fourth layer corresponds to the second encoding mode; the third layer corresponds to the MSB of the first amplitude symbol, and the fourth layer corresponds to the second MSB and the LSB of the first amplitude symbol; the input of the first layer is the second bit sequence; the one or more bits are the MSB and the first bit of the first amplitude symbol; and the first bit is a bit corresponding to the LSB of the first amplitude symbol, which is obtained by processing the second MSB and the LSB of the first amplitude symbol by using the second encoding mode.

6. The method of claim 5, wherein, The output bit of the hierarchical encoding includes a first bit sequence, and the first bit sequence includes 4 bits; When the first sign bit takes the second value, the MSB of the first bit sequence is the MSB of the first amplitude symbol, and the third MSB of the first bit sequence is the first bit; when the first sign bit takes the first value, the MSB of the first bit sequence is the MSB of the adjusted first amplitude symbol, and the third MSB of the first bit sequence is the adjusted first bit; The second MSB of the first bit sequence is a second bit, and the LSB of the first bit sequence is the first sign bit; and the second bit is a bit corresponding to the second MSB of the first amplitude symbol, which is obtained by processing the second MSB and the LSB of the first amplitude symbol by using the second encoding mode.

7. A communication method characterized by comprising: The method includes: receiving a first signal, the first signal corresponding to a first modulation symbol, the first modulation symbol being obtained by mapping output bits of hierarchical encoding by a sending end, the output bits being obtained by performing the hierarchical encoding on first input bits, wherein the hierarchical encoding includes encoding of a first layer and encoding of at least one second layer, the first layer corresponding to a first encoding mode, and one layer of the at least one second layer corresponding to a second encoding mode or no encoding; and all or part of the first input bits being an amplitude symbol sequence output by a distribution matcher; The first layer is encoded to obtain a first check bit as a first symbol bit, the amplitude symbol sequence includes a first amplitude symbol, and the first amplitude symbol corresponds to an I path or a Q path, and the first check bit corresponds to the I path or the Q path; the hierarchical encoding further includes: when the first symbol bit takes a first value, adjusting values of one or more bits of the at least one second layer, and when the first symbol bit takes a second value, values of all bits of the at least one second layer remain unchanged, the one or more bits include part of bits obtained by processing the first amplitude symbol through the second encoding mode, and / or the one or more bits include part of bits in the first amplitude symbol and a corresponding layer is not encoded.

8. The method of claim 7, wherein, The first amplitude symbol is a bit sequence including 2 bits, the at least one second layer includes only one layer and corresponds to no encoding, the at least one second layer corresponds to a most significant bit (MSB) of the first amplitude symbol, and the first layer corresponds to a least significant bit (LSB) of the first amplitude symbol; or The first amplitude symbol in the amplitude symbol sequence is a bit sequence including 3 bits, the at least one second layer includes only one layer and corresponds to no encoding, the at least one second layer corresponds to a MSB and a second MSB of the first amplitude symbol, and the first layer corresponds to a LSB of the first amplitude symbol. The one or more bits are MSBs of the first amplitude symbol corresponding to the at least one second layer.

9. The method of claim 8, wherein, The first amplitude symbol is a bit sequence including 2 bits, and output bits of the hierarchical encoding include a first bit sequence including 3 bits; When the first symbol bit takes the second value, a MSB of the first bit sequence is a MSB of the first amplitude symbol, and when the first symbol bit takes the first value, the MSB of the first bit sequence is a MSB of the first amplitude symbol after adjustment; A second MSB of the first bit sequence is the first symbol bit, and a LSB of the first bit sequence is a LSB of the first amplitude symbol.

10. The method of claim 8, wherein, The first amplitude symbol is a bit sequence including 3 bits, and output bits of the hierarchical encoding include a first bit sequence including 4 bits; When the first symbol bit takes the second value, a MSB of the first bit sequence is a MSB of the first amplitude symbol, and when the first symbol bit takes the first value, the MSB of the first bit sequence is a MSB of the first amplitude symbol after adjustment; A second MSB of the first bit sequence is a second MSB of the first amplitude symbol, a third MSB of the first bit sequence is the first symbol bit, and a LSB of the first bit sequence is a LSB of the first amplitude symbol.

11. The method of claim 7, wherein, The first input bit includes a first part and a second part, the first part is a sequence of amplitude symbols output by the distribution matcher, and the second part includes a second bit sequence, the first amplitude symbol is a bit sequence including 3 bits, the at least one second layer includes a third layer and a fourth layer, the third layer corresponds to no coding, and the fourth layer corresponds to the second coding mode, the third layer corresponds to MSBs of the first amplitude symbol, and the fourth layer corresponds to second MSBs and LSBs of the first amplitude symbol, an input of the first layer is the second bit sequence, the one or more bits are MSBs and first bits of the first amplitude symbol, and the first bits are bits corresponding to LSBs of the first amplitude symbol and obtained by processing second MSBs and LSBs of the first amplitude symbol by using the second coding mode.

12. The method of claim 11, wherein, The output bit of the layered coding includes a first bit sequence, and the first bit sequence includes 4 bits; When the first symbol bit takes the second value, MSBs of the first bit sequence are MSBs of the first amplitude symbol, and third MSBs of the first bit sequence are the first bits; when the first symbol bit takes the first value, MSBs of the first bit sequence are MSBs of the first amplitude symbol after adjustment, and third MSBs of the first bit sequence are the first bits after adjustment; Second MSBs of the first bit sequence are second bits, LSBs of the first bit sequence are the first symbol bit, and the second bits are bits corresponding to second MSBs of the first amplitude symbol and obtained by processing second MSBs and LSBs of the first amplitude symbol by using the second coding mode.

13. A communications device, characterized by A module for implementing the method in any one of claims 1 to 6 or the method in any one of claims 7 to 12.

14. A communication method, comprising: A module for implementing the method in any one of claims 1 to 6 or the method in any one of claims 7 to 12. The first modulation symbol is demodulated and decoded to obtain system bits corresponding to the first layer, first check bits corresponding to the first layer, second check bits corresponding to the first layer, and system bits corresponding to at least one second layer, wherein the demodulation comprises demodulating the first modulation symbol based on a hierarchical encoding modulation constellation to obtain a third bit sequence corresponding to the first layer and fourth bit sequences respectively corresponding to one second layer, and the decoding comprises: first decoding the third bit sequence to obtain the system bits corresponding to the first layer, the first check bits corresponding to the first layer, and the second check bits corresponding to the first layer, the first check bits corresponding to an I path, and the second check bits corresponding to a Q path; then, taking the first check bits as a first symbol bit, when the first symbol bit takes a first value, adjusting the values of one or more third bits in the fourth bit sequence corresponding to at least one second layer, when the first symbol bit takes a second value, the values of the one or more third bits remain unchanged, and the one or more third bits correspond to the I path; taking the second check bits as a second symbol bit, when the second symbol bit takes a first value, adjusting the values of one or more fourth bits in the fourth bit sequence corresponding to at least one second layer, when the second symbol bit takes a second value, the values of the one or more fourth bits remain unchanged, and the one or more fourth bits correspond to the Q path; and then, decoding the fourth bit sequences corresponding to at least one second layer to obtain system bits corresponding to at least one second layer.

15. The method of claim 14, wherein, The at least one second layer only includes one layer and corresponds to no encoding, the at least one second layer corresponds to one fourth bit sequence including 2 bits, the one or more third bits are bits corresponding to the I path in the fourth bit sequence, and the one or more fourth bits are bits corresponding to the Q path in the fourth bit sequence.

16. The method of claim 15, wherein, The method further comprises: obtaining a first amplitude symbol according to the system bits corresponding to the first layer and the system bits corresponding to the at least one second layer; wherein the system bits corresponding to the first layer include a first system bit and a second system bit, the first system bit corresponds to the I path, the second system bit corresponds to the Q path, the first amplitude symbol corresponds to the I path, an MSB in the first amplitude symbol is a bit corresponding to the I path in the fourth bit sequence, and an LSB in the first amplitude symbol is the first system bit.

17. The method of claim 14, wherein, The at least one second layer only includes one layer and corresponds to no encoding, the at least one second layer corresponds to one fourth bit sequence including 4 bits, the one or more third bits are MSBs in the fourth bit sequence, and the one or more fourth bits are second MSBs in the fourth bit sequence.

18. The method of claim 17, wherein, The method further comprises: obtaining a first amplitude symbol according to the system bits corresponding to the first layer and the system bits corresponding to the at least one second layer; wherein the system bits corresponding to the first layer comprise a first system bit and a second system bit, the first system bit corresponds to an I path, and the second system bit corresponds to a Q path; the first amplitude symbol corresponds to the I path; the MSB in the first amplitude symbol is the MSB in the fourth bit sequence; the second MSB in the first amplitude symbol is the third MSB in the fourth bit sequence; and the LSB in the first amplitude symbol is the first system bit.

19. The method of claim 14, wherein, The at least one second layer comprises a third layer and a fourth layer; the third layer corresponds to no encoding; the fourth layer corresponds to a second encoding mode; the third layer corresponds to a fourth bit sequence comprising two bits; the fourth layer corresponds to a fourth bit sequence comprising four bits; one or more third bits in the fourth bit sequence corresponding to the third layer are MSBs in the fourth bit sequence corresponding to the third layer; one or more fourth bits in the fourth bit sequence corresponding to the third layer are LSBs in the fourth bit sequence corresponding to the third layer; one or more third bits in the fourth bit sequence corresponding to the fourth layer are third MSBs in the fourth bit sequence corresponding to the third layer; and one or more fourth bits in the fourth bit sequence corresponding to the fourth layer are LSBs in the fourth bit sequence corresponding to the third layer.

20. The method of claim 19, wherein, The first amplitude symbol is obtained according to the system bits corresponding to the at least one second layer; the system bits corresponding to the at least one second layer comprise system bits corresponding to the third layer and system bits corresponding to the fourth layer; the system bits corresponding to the third layer comprise a third system bit corresponding to I and a fourth system bit corresponding to Q; the system bits corresponding to the fourth layer are a fifth system bit, a sixth system bit, a seventh system bit, and an eighth system bit in order from the lowest bit to the highest bit; the first amplitude symbol corresponds to the I path; the MSB in the first amplitude symbol is the third system bit; the second MSB in the first amplitude symbol is the fifth system bit; and the LSB in the first amplitude symbol is the seventh system bit.

21. A communications device, characterized by The communication device comprises one or more processors coupled to one or more memories, the one or more memories are configured to store computer programs or instructions, and the one or more processors are configured to execute the computer programs or instructions in the one or more memories, so that the communication device executes the method according to any one of claims 1 to 20.

22. A chip, characterized by The communication device comprises a processor and a communication interface, the processor reads instructions stored on a memory through the communication interface, and executes the instructions so that the communication device comprising the chip executes the method according to any one of claims 1 to 20.

23. A computer-readable storage medium, characterized in that, The computer readable storage medium stores computer programs or instructions, and the computer programs or instructions are executed to execute the method according to any one of claims 1 to 20.

24. A computer program product, characterised in that, When the computer program product is run on a computer, it causes the method of any one of claims 1 to 20 to be performed.

25. A communications device, characterized by comprising means for implementing the method of any one of claims 14 to 20.

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