Display device

Abstract

A display device (1) comprises: a plurality of light-emitting diodes (80) that have emission surfaces (80S) in the same virtual plane (VP); anode contact parts (58-1) that are electrically connected to anodes (84A) of the light-emitting diodes (80) and extend in a direction that intersects the virtual plane (VP); and cathode contact parts (58-2) that are electrically connected to cathodes (82K) of the light-emitting diodes (80) and extend in a direction that intersects the virtual plane (VP). At least one of upper surfaces of the anode contact parts (58-1) and upper surfaces of the cathode contact parts (58-2) do not overlap the light-emitting diodes (80) in a direction perpendicular to the virtual plane (VP).

Description

display device

[0001] An embodiment of the present invention relates to a display device.

[0002] 2. Description of the Related Art Circuit elements are formed on each of two substrates, and these substrates are then bonded together to manufacture flat panel displays (FPDs) such as liquid crystal displays, plasma displays, and organic EL displays.

[0003] Gallium nitride (GaN) is a direct transition semiconductor with a large band gap. Utilizing this property, thin film transistors (TFTs) and light-emitting diodes (LEDs) using GaN have been put to practical use.

[0004] Patent Document 1 describes a display device in which a circuit including a transistor formed in a semiconductor layer containing gallium nitride on one glass substrate is electrically connected by a conductive connecting member to a light-emitting diode formed in a semiconductor layer containing gallium nitride on another glass substrate.

[0005] International Publication No. 2022 / 210402

[0006] The display device described in Patent Document 1 is formed by bonding two glass substrates together so that an electrode of a light-emitting diode and an electrode that supplies current to the light-emitting diode face each other.

[0007] In order to avoid a deterioration in display quality, it is desirable that stress is not easily applied to the light-emitting diode when the two glass substrates are bonded together.

[0008] An object of one embodiment of the present invention is to provide a display device in which light-emitting diodes on substrates are less likely to be damaged when the substrates are bonded together.

[0009] A display device according to one embodiment of the present invention comprises a plurality of light-emitting diodes whose emission surfaces are included in the same imaginary plane, anode contact portions electrically connected to the anodes of the light-emitting diodes and extending in a direction intersecting the imaginary plane, and cathode contact portions electrically connected to the cathodes of the light-emitting diodes and extending in a direction intersecting the imaginary plane, wherein at least one of the upper surfaces of the anode contact portions and the upper surfaces of the cathode contact portions does not overlap with the light-emitting diodes in a direction perpendicular to the imaginary plane.

[0010] 1. A plan view illustrating an overview of a display device according to one embodiment of the present invention. FIG. 1 is a cross-sectional view of the display device shown in FIG. 1. FIG. 2 is another plan view of the display device shown in FIG. 1. FIG. 3 is a circuit diagram of a pixel of the display device shown in FIG. 1. FIG. 4 is another cross-sectional view of the display device shown in FIG. 1. FIG. 5 is a flowchart showing an example of a method for manufacturing the display device shown in FIG. 1. FIG. 6 is another flowchart showing an example of a method for manufacturing the display device shown in FIG. 1. FIG. 7 is a cross-sectional view illustrating an overview of a display device according to another embodiment of the present invention. FIG. 8 is another cross-sectional view of the display device shown in FIG. 10. FIG. 9 is another cross-sectional view of the display device shown in FIG. 10. FIG. 10 is a flowchart showing an example of a method for manufacturing the display device shown in FIG. 10. FIG. 11 is another flowchart showing an example of a method for manufacturing the display device shown in FIG. 11. FIG. 12 is a cross-sectional view illustrating an overview of a display device according to another embodiment of the present invention. FIG. 13 is a flowchart showing an example of a method for manufacturing the display device shown in FIG. 13. FIG. 14 is another flowchart showing an example of a method for manufacturing the display device shown in FIG. 14. FIG. 15 is another flowchart showing an example of a method for manufacturing the display device shown in FIG. 15. FIG. 16 is a plan view of a display device according to a modified example.

[0011] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. However, the present invention can be embodied in various forms without departing from the spirit of the present invention, and should not be construed as being limited to the description of the following exemplary embodiments. Furthermore, in the drawings, the width, thickness, shape, etc. of each part may be schematically shown compared to the actual form to clarify the explanation. However, these schematic diagrams are merely examples and do not limit the interpretation of the present invention. Furthermore, in this specification and each drawing, elements that are identical or similar to those described in the previous drawings may be given the same reference numerals, and redundant explanations may be omitted. Note that in this specification, ordinal numbers are used for convenience to distinguish parts, portions, etc., and do not indicate priority or order.

[0012] In this specification, unless otherwise specified, expressions such as "D includes A, B, or C," "D includes any of A, B, and C," and "D includes one selected from the group consisting of A, B, and C" do not exclude cases where D includes multiple combinations of A to C. Furthermore, these expressions do not exclude cases where D includes other elements.

[0013] In the present invention, when a single film is processed to form multiple films, these multiple films may have different functions and roles. However, these multiple films originate from films formed as the same layer in the same process, and have the same layer structure and the same material. Therefore, these multiple films are defined as existing in the same layer. Furthermore, when a single film is processed to form multiple films, they may be distinguished and described as -1, -2, etc. in this specification.

[0014] In this specification and claims, expressions such as "above" and "below" express the relative positional relationship between a structure of interest and another structure. In this specification and claims, when expressing an aspect in which another structure is placed on top of a certain structure, the term "above" is used to include both a case in which another structure is placed directly above the certain structure so as to be in contact with the certain structure, and a case in which another structure is placed above the certain structure via yet another structure, unless otherwise specified.

[0015] In this specification, the letters "first," "second," or "third" attached to each component are convenient labels used to distinguish each component, and have no other meaning unless otherwise specified.

[0016] In this specification, bottom gate driving refers to on / off control by a gate electrode arranged below the semiconductor layer. In this specification, top gate driving refers to on / off control by a gate electrode arranged above the semiconductor layer. In this specification, dual gate driving refers to on / off control by inputting the same control signal to gate electrodes arranged above and below the semiconductor layer.

[0017] The following embodiments can be combined with each other unless a technical contradiction occurs.

[0018] First Embodiment A display device 1 according to one embodiment of the present invention will be described with reference to FIG.

[0019] 1 is a plan view showing an overview of a display device 1 according to one embodiment of the present invention. The display device 1 includes a display unit 10, a drive circuit unit 20, and a terminal unit 30. A plurality of pixels 11 are arranged in a matrix in the display unit 10.

[0020] 1 shows an example in which the pixels 11 are arranged in five rows and five columns, but the number of rows and columns of the pixels 11 is not limited to this. As will be described in detail later, a drain conductive portion 48-1, an anode conductive portion 58-1, a ground conductive portion 48-2, and a cathode conductive portion 58-2 are arranged at the corners of each pixel 11.

[0021] The non-display section 10A, which is an area that does not include pixels 11, is arranged to surround the display section 10. The inside of the non-display section 10A refers to a closed area that does not include the inside of the display section 10. A drive circuit section 20 and a terminal section 30 are arranged in the non-display section 10A. The drive circuit section 20 includes a circuit that controls the display section 10. The terminal section 30 is arranged at an end of the display device 1. The terminal section 30 is, for example, an electronic connector, and includes a plurality of terminals 31 to which power and signals are supplied.

[0022] The drive circuit section 20 controls the light emission of each pixel 11 based on the power and signals supplied via the terminal section 30 , thereby displaying an image on the display section 10 .

[0023] Fig. 2 shows a cross-sectional view of the display device 1 taken along line A1-A2 in Fig. 1. As shown in Fig. 2, the display device 1 has a structure in which a first substrate 40 and a second substrate 50 are bonded together. Each of the pixels 11 arranged in the display section 10 of the display device 1 includes a transistor 60, a light-emitting diode 80, etc., which will be described later, between the first substrate 40 and the second substrate 50.

[0024] Light emitted from the light-emitting diodes 80 passes through the second substrate 50 toward the outside of the display device 1. The light-emitting diodes 80 are provided in contact with the second substrate 50. Therefore, the light-emitting surface 80S of each light-emitting diode 80 is disposed on an imaginary plane VP, which is an arbitrary plane that includes the light-emitting surfaces 80S of all the light-emitting diodes 80. In other words, the light-emitting surface 80S of each light-emitting diode 80 is part of the imaginary plane VP.

[0025] Next, referring to Figure 3, which is a plan view of a cross section of the display device 1 shown in Figure 1 taken along line B1-B2 in Figure 2, viewed from the first substrate 40 toward the second substrate 50, the positional relationship of the conductive parts that supply current to the light-emitting diode 80 of each pixel 11 will be described.

[0026] 3, one light-emitting diode 80 is arranged for each pixel 11 on the second substrate 50. As will be described in detail later, an anode (p-type electrode) 84A and a cathode 82K (n-type electrode) of the light-emitting diode 80 are connected to an anode conductive portion 58-1 and a cathode conductive portion 58-2, respectively.

[0027] In this embodiment, when viewed from a direction perpendicular to the imaginary plane VP, the top surface of the anode conductive portion 58-1 does not overlap with the light-emitting diode 80, and the top surface of the cathode conductive portion 58-2 overlaps with the light-emitting diode 80. The anode conductive portion 58-1 and the cathode conductive portion 58-2 are examples of an anode contact portion and a cathode contact portion, respectively.

[0028] 4 shows an example of a circuit diagram of the pixel 11 (see FIG. 2). The pixel circuit 11P of the pixel 11 includes a first transistor 11T-1, a second transistor 11T-2, a light-emitting diode 11L, and a capacitance element 11C.

[0029] <2-1. Selection Transistor> The first transistor 11T-1 can function as a selection transistor. That is, the first transistor 11T-1 is a transistor in which the conduction state between the source electrode and the drain electrode is controlled in accordance with a voltage applied to the gate electrode via the scanning line 11S. The source electrode of the first transistor 11T-1 is electrically connected to the signal line 11T. The gate electrode of the first transistor 11T-1 is electrically connected to the scanning line 11S. The drain electrode of the first transistor 11T-1 is electrically connected to the gate electrode of the second transistor 11T-2. A signal voltage is applied to the signal line 11T.

[0030] <2-2. Driving Transistor> The second transistor 11T-2 can function as a driving transistor. That is, the second transistor 11T-2 is a transistor that controls the magnitude of the driving current supplied to the anode of the light-emitting diode 11L in accordance with the voltage applied to its gate electrode via the first transistor 11T-1. The source electrode of the second transistor 11T-2 is connected to the driving power supply line 11U. The gate electrode of the second transistor 11T-2 is connected to the drain electrode of the first transistor 11T-1. The drain electrode of the second transistor 11T-2 is electrically connected to the anode (positive electrode, p-type electrode) of the light-emitting diode 11L. The cathode (negative electrode, n-type electrode) of the light-emitting diode 11L is connected to the reference power supply line 11G.

[0031] <2-3. Other Circuit Elements> One of the electrodes of the capacitance element 11C is electrically connected to the gate of the second transistor 11T-2 and the drain of the first transistor 11T-1. The other electrode of the capacitance element 11C is electrically connected to the drive power supply line 11U. The capacitance element 11C is a parallel plate capacitor formed by two metal layers facing each other with an insulating layer such as an interlayer film interposed therebetween in a layer structure described below, for example.

[0032] <3. Layer structure of pixel> <3-1. Matters common to the first substrate 40 and the second substrate 50> The layer structure of the pixel 11 will be described with reference to Fig. 5. Fig. 5 shows a cross-sectional view of one pixel 11 taken along line C1-C2 (see Fig. 3).

[0033] Between the first substrate 40 and the second substrate 50, various elements described below are arranged.

[0034] The first substrate 40 and the second substrate 50 are, for example, amorphous glass substrates. The first substrate 40 has surfaces 40-1 and 40-2 parallel to the display surface of the display device 1. The second substrate 50 has surfaces 50-1 and 50-2 parallel to the display surface of the display device 1. Of the surfaces 40-1, 40-2, 50-1, and 50-2, the surface 40-1 and the surface 50-1 face each other on the inside of the display device 1. The surfaces 40-2 and 50-2 are disposed on the outside of the display device 1.

[0035] The first substrate 40 has an underlayer 41 provided in contact with the surface 40-1, and a buffer layer 42 provided in contact with the underlayer 41. The second substrate 50 has an underlayer 51 provided in contact with the surface 50-1, and a buffer layer 52 provided in contact with the underlayer 51.

[0036] <3-2. Underlayers 41, 51> The underlayer 41 prevents the diffusion of impurities (water, sodium, etc.) generated from the first substrate 40 and impurities entering from the outside of the first substrate 40. The underlayer 51 prevents the diffusion of impurities (water, sodium, etc.) generated from the second substrate 50 and impurities entering from the outside of the second substrate 50.

[0037] The underlayers 41 and 51 are made of, for example, silicon nitride (SiN ｘThe underlayers 41 and 51 may be made of, for example, silicon oxide (SiO ｘ ) layer and silicon nitride (SiN ｘ ) layer may be used.

[0038] Buffer Layers 42, 52> Providing the buffer layer 42 can improve the crystallinity of the gallium nitride layer formed in contact with the buffer layer 42. Providing the buffer layer 52 can improve the crystallinity of the gallium nitride layer formed in contact with the buffer layer 52.

[0039] The buffer layer 42 may be, for example, a titanium (Ti) film or a titanium nitride (TiN) film. ｘ ) film, or an aluminum nitride film (AlN ｘ A light-transmitting film such as a titanium nitride film or a titanium nitride film can be used. The buffer layer 42 may be a single film or a laminated film. The buffer layer 42 is preferably c-axis oriented with respect to the first substrate 40. The c-axis orientation of the buffer layer 42 allows the gallium nitride layer to grow as a c-axis oriented crystal. The c-axis oriented buffer layer 42 can be obtained by depositing the titanium film, titanium nitride film, or aluminum nitride film described above by sputtering. Furthermore, the buffer layer 42 may be formed of a silicon semiconductor film including a silicon (Si) film.

[0040] The material and structure of the buffer layer 52 may be the same as or different from the buffer layer 42 described above, for example.

[0041] <3-4. Structure on the First Substrate 40 Side> Next, a description will be given of the structure of the elements provided on the first substrate 40 side. A transistor 60 is provided in contact with the buffer layer 42 arranged on the first substrate 40 side.

[0042] The transistor 60 includes a gallium nitride layer 61 provided in contact with the buffer layer 42, an aluminum gallium nitride layer 62 provided in contact with the gallium nitride layer 61, and a drain electrode 63 provided in contact with the aluminum gallium nitride layer 62. The transistor 60 also includes a source electrode and a gate electrode, which are not shown in the cross-sectional view of FIG. 5. The transistor 60 may be top-gate driven, bottom-gate driven, or dual-gate driven.

[0043] The interlayer film 47 is provided so as to cover the transistor 60. For example, an organic insulating film such as an acrylic resin film or a polyimide resin film can be used as the interlayer film 47. The interlayer film 47 may be a single film or a laminated film. When the interlayer film 47 is a laminated film, the interlayer film 47 may be made of not only an organic insulating film but also a silicon oxide (SiO ｘ ) film or silicon nitride (SiN ｘ The interlayer film 47 can flatten irregularities on the transistor 60 and the like.

[0044] A drain conductive portion 48-1 is provided in the interlayer film 47. The drain conductive portion 48-1 is a columnar conductor embedded in an opening formed in the interlayer film 47. The drain conductive portion 48-1 is in electrical contact with the drain electrode of the transistor 60. The drain conductive portion 48-1 extends in a direction intersecting with the imaginary plane VP.

[0045] A ground conductive portion 48-2 is provided on the interlayer film 47. The ground conductive portion 48-2 is a columnar conductor embedded in an opening formed in the interlayer film 47. The ground conductive portion 48-2 is electrically connected to the ground conductive portion 48-2 of another pixel 11 via the ground wiring 44. The ground conductive portion 48-2 extends in a direction intersecting with the imaginary plane VP.

[0046] The first transistor 11T-1 shown in FIG. 4 is formed on the first substrate 40 side in the same manner as the transistor 60, but is not shown in FIG. 5 and is therefore omitted from the illustration.

[0047] 3-5. Structure of Second Substrate 50 Side The second substrate 50 includes an underlayer 51, a buffer layer 52 provided in contact with the underlayer 51, and a light-emitting diode 80 provided in contact with the buffer layer 52.

[0048] The light-emitting diode 80 includes a gallium nitride layer 81, an n-type semiconductor layer 82, a light-emitting layer 83, a p-type semiconductor layer 84, a cathode (n-type electrode) 82K, and an anode (p-type electrode) 84A.

[0049] The gallium nitride layer 81 is provided in contact with the buffer layer 52. For example, a gallium nitride (GaN) film can be used as the gallium nitride layer 81. Since the gallium nitride layer 81 is provided in contact with the buffer layer 52, the crystal growth of the gallium nitride layer 81 is controlled by the buffer layer 52. Specifically, the gallium nitride layer 81 includes a gallium nitride film that is c-axis oriented with respect to the first substrate 40.

[0050] The n-type semiconductor layer 82 is provided in contact with the gallium nitride layer 81. As the n-type semiconductor layer 82, for example, a gallium nitride (GaN) film doped with silicon (Si) can be used.

[0051] The cathode 82K is provided in contact with the n-type semiconductor layer 82. For the cathode 82K, for example, a metal such as indium (In) can be used.

[0052] The light emitting layer 83 is provided in contact with the n-type semiconductor layer 82. As the light emitting layer 83, for example, a laminated film in which indium gallium nitride (InGaN) films and gallium nitride (GaN) films are alternately laminated can be used.

[0053] The p-type semiconductor layer 84 is provided in contact with the light emitting layer 83. As the p-type semiconductor layer 84, for example, a magnesium (Mg)-doped gallium nitride (GaN) film can be used.

[0054] The anode 84A is in contact with the p-type semiconductor layer 84 and extends parallel to the imaginary plane VP. The anode 84A may be made of a metal such as palladium (Pd) or gold (Au).

[0055] The light-emitting diode 80 described above is a so-called micro LED or mini LED, but is not limited to this. Note that a micro LED refers to an LED with a side length of 100 μm or less, and a mini LED refers to an LED with a side length of more than 100 μm.

[0056] The planarization layer 57 is provided so as to cover the light-emitting diode 80. For example, an organic insulating film such as a polyimide resin film can be used as the planarization layer 57. More specifically, the planarization layer 57 includes a laminated film of a first planarization layer 57-1 and a second planarization layer 57-2. The planarization layer 57 can be made of not only an organic insulating film but also silicon oxide (SiO ｘ ) film or silicon nitride (SiN ｘ The planarization layer 57 can flatten unevenness of the light-emitting diode 80 and the like. The planarization layer 57 does not have to be a laminated film of the first planarization layer 57-1 and the second planarization layer 57-2, and may be a single layer.

[0057] The first planarization layer 57-1 is provided in contact with the buffer layer 52 or the gallium nitride layer 81, and the second planarization layer 57-2 is provided in contact with the first planarization layer 57-1. The first planarization layer 57-1 surrounds the n-type semiconductor layer 82, the light-emitting layer 83, and the p-type semiconductor layer 84. The second planarization layer 57-2 is provided with an anode conductor 58-1. The anode conductor 58-1 is a columnar conductor embedded in an opening formed in the second planarization layer 57-2. The anode conductor 58-1 is disposed in a position that does not overlap with the light-emitting diode 80 in a direction perpendicular to the imaginary plane VP. The anode conductor 58-1 is provided in contact with the anode 84A and the connecting member 13-1, and is electrically connected to the anode region of the light-emitting diode 80, the anode 84A, and the connecting member 13-1. The anode conductive portion 58-1 extends in a direction intersecting the imaginary plane VP.

[0058] A cathode conductive portion 58-2 is provided in the first planarization layer 57-1 and the second planarization layer 57-2. The cathode conductive portion 58-2 is a columnar conductor embedded in an opening formed through the first planarization layer 57-1 and the second planarization layer 57-2. The cathode conductive portion 58-2 is provided in contact with the cathode 82K and is electrically connected to the cathode region of the light-emitting diode 80 and the cathode 82K. The anode conductive portion 58-1 extends in a direction intersecting the imaginary plane VP. Note that the drain conductive portion 48-1, the ground conductive portion 48-2, the anode conductive portion 58-1, or the cathode conductive portion 58-2 is not limited to being embedded in an opening formed in the interlayer film 47 or the planarization layer 57, as long as opposing conductive portions are electrically connected to each other.

[0059] If necessary, a protective layer may be provided to cover the transistor 60 or the light-emitting diode 80. The protective layer may be silicon nitride (SiN ｘ As the protective layer, for example, a silicon oxide (SiO ｘ ) film and silicon nitride (SiN ｘ ) film may be used.

[0060] <3-6. Mechanical and Electrical Connection Between Substrates> The adhesive resin material 53 is disposed between the light-shielding layer 14 provided on the first substrate 40 side and the gallium nitride layer 81 provided on the second substrate 50 side, and bonds the light-shielding layer 14 and the gallium nitride layer 81. In this way, the first substrate 40 and the second substrate 50 are indirectly bonded together by the adhesive resin material 53.

[0061] The drain conductive portion 48-1 and the anode conductive portion 58-1 are connected by a conductive connecting member 13-1. The ground conductive portion 48-2 and the cathode conductive portion 58-2 are connected by a conductive connecting member 13-2. The connecting member 13-1 is, for example, solder that is in close contact with both the drain conductive portion 48-1 and the anode conductive portion 58-1. The connecting member 13-2 is, for example, solder that is in close contact with both the ground conductive portion 48-2 and the cathode conductive portion 58-2.

[0062] The connection members 13-1 and 13-2 are both provided for each pixel 11, that is, for each light-emitting diode 80. Therefore, the drain conductive portion 48-1 and the anode conductive portion 58-1 are electrically connected for each light-emitting diode 80. In addition, the ground conductive portion 48-2 and the cathode conductive portion 58-2 are also electrically connected for each light-emitting diode 80.

[0063] <3-7. Regarding height> The height L1 of the anode conductive portion 58-1 is equal to the height L2 of the cathode conductive portion 58-2. The height L1 of the anode conductive portion 58-1 and the height L2 of the cathode conductive portion 58-2 are measured, for example, with the upper surface of the buffer layer 52 as the reference. Specifically, the height L1 of the anode conductive portion 58-1 is the distance between the upper surface of the buffer layer 52 and the upper surface of the anode conductive portion 58-1. The height L2 of the cathode conductive portion 58-2 is the distance between the upper surface of the buffer layer 52 and the upper surface of the cathode conductive portion 58-2.

[0064] The drain electrode 63, the ground wiring 44, etc. formed on the first substrate 40 side are formed by a typical TFT manufacturing process, and therefore the drain electrode 63, the ground wiring 44, etc. have the same height. Furthermore, the height of the drain conductive portion 48-1 provided in contact with the drain electrode 63 is the same as the height of the ground conductive portion 48-2 provided in contact with the ground wiring 44. The heights of the drain electrode 63, the ground wiring 44, the drain conductive portion 48-1, and the ground conductive portion 48-2 are measured using, for example, the top surface of the buffer layer 42 as a reference.

[0065] The method for measuring the height is not limited to the above. For example, the surfaces 40-1 and 40-2 of the first substrate 40, the surfaces 50-1 and 50-2 of the second substrate 50, etc. may be used as references.

[0066] Because light-emitting diode 80 has a structure in which n-type semiconductor layer 82, light-emitting layer 83, and p-type semiconductor layer 84 are stacked, a step occurs between cathode 82K provided in contact with n-type semiconductor layer 82 and anode 84A provided in contact with p-type semiconductor layer 84. Anode conductive portion 58-1 and cathode conductive portion 58-2 are each formed to have a length that absorbs the step that occurs between cathode 82K and anode 84A. For this reason, with respect to the side of second substrate 50, for example, the upper surface of buffer layer 52, height L1 of connecting member 13-1 is equal to height L2 of connecting member 13-2.

[0067] The height L1 of the anode conductive portion 58-1 and the height L2 of the cathode conductive portion 58-2 do not have to be measured from the top surface of the buffer layer 52, and may be measured, for example, from the surface 50-1. The height of the drain electrode 63 and the height of the ground wiring 44 do not have to be measured from the surface 40-1, and may be measured, for example, from the top surface of the buffer layer 42.

[0068] <3-8. Regarding "equal" or "identical"> With regard to the heights L1, L2, etc. of the connecting members 13-1, 13-2, "equal" or "identical" includes not only the case where the two heights are strictly equal, but also the case where the two heights are substantially equal. For example, when the heights are substantially equal, this includes the case where the difference between one height and the other is preferably 10% or less of the reference height, and more preferably 5% or less of the reference height. The reference height may be the higher or lower of the two heights.

[0069] <3-9. Correspondence with Circuit Diagram> The transistor 60 corresponds to the second transistor 11T-2 in Fig. 4. The light-emitting diode 80 corresponds to the light-emitting diode 11L in Fig. 4. The first transistor 11T-1 in Fig. 4 does not appear in Fig. 5 and therefore will not be described in detail, but is manufactured by the same manufacturing method as the transistor 60 and has the same structure as the transistor 60.

[0070] The drain electrode 63 corresponds to, for example, the drain of the second transistor 11T-2 in Fig. 4, and the ground wiring 44 corresponds to, for example, the reference power supply line 11G in Fig. 4. The drain electrode 63 and the ground wiring 44 serve to supply current to the light-emitting diode 80 (light-emitting diode 11L in Fig. 4), and the pixel circuit 11P shown in Fig. 4 is an example of a current supply unit. The drain electrode 63 and the ground wiring 44 are examples of a first electrode and a second electrode of the current supply unit, respectively.

[0071] 4. Manufacturing Method An example of a method for manufacturing the display device 1 will be described with reference to FIGS.

[0072] 6 is a flowchart showing an outline of an example of a method for manufacturing the display device 1. The display device 1 is manufactured by performing, in this order, a step of laminating the first substrate 40 (step S100), a step of laminating the second substrate 50 (step S200), and a step of bonding the first substrate 40 and the second substrate 50 together (step S300). Each of steps S100 to S300 will be described in detail below.

[0073] Step S100 is a process of laminating a first substrate 40 such as an amorphous glass substrate using the first substrate 40 as a support substrate.

[0074] Step S100 (see FIG. 6) is divided into steps S110 to S160 shown in FIG.

[0075] First, in step S110, an underlayer 41 is formed in contact with the first substrate 40. The underlayer 41 can be formed by using, for example, a sputtering method or a chemical vapor deposition (CVD) method.

[0076] In step S120, a buffer layer 42 is formed in contact with the underlayer 41. The buffer layer 42 can be formed by using a sputtering method or a CVD method.

[0077] In step S130, the transistor 60 is formed in contact with the buffer layer 42. At this time, a gallium nitride layer 61 and an aluminum gallium nitride layer 62 are formed in advance in a position where the ground wiring 44 will be in contact, similar to the region where the transistor 60 is to be formed.

[0078] In step S140, an interlayer film 47 is formed to cover the transistor 60. If necessary, an opening is formed in the interlayer film 47 by photolithography.

[0079] In step S150, a drain conductive portion 48-1 electrically connected to the drain electrode 63 of the transistor 60 and a ground conductive portion 48-2 electrically connected to the ground wiring 44 are formed through the opening in the interlayer film 47. The drain conductive portion 48-1 may be, for example, a laminated metal film of aluminum and titanium (Al / Ti film). The drain conductive portion 48-1 and the ground wiring 44 are both in contact with the aluminum gallium nitride layer 62, and are therefore formed at equal distances from the first substrate 40 (see FIG. 5).

[0080] In step S160, the light-shielding layer 14 is formed so that a part of the upper surface of the drain conductive portion 48-1 is exposed. For example, a black resin or the like can be used as the light-shielding layer 14. The light-shielding layer 14 is not limited to the above-mentioned ones as long as it has insulating properties and is difficult for light to transmit through it.

[0081] Step S200 shown in FIG. 6 is a process of laminating a second substrate 50 such as an amorphous glass substrate using the second substrate 50 as a support substrate.

[0082] Step S200 (see FIG. 6) is divided into steps S210 to S270 shown in FIG.

[0083] In step S210, an underlayer 51 is formed in contact with the second substrate 50. The underlayer 51 may be formed using an insulating film similar to that used for the underlayer 41. The underlayer 51 may be formed using a sputtering method or a CVD method.

[0084] In step S220, a buffer layer 52 is formed on the base layer 51. Light emitted from the light-emitting layer 83 of the light-emitting diode 80 passes through the buffer layer 52 and is emitted to the outside. Therefore, it is desirable that the buffer layer 52 have high light-transmitting properties. For example, a light-transmitting film such as an aluminum nitride (AlN) film can be used as the buffer layer 52. The buffer layer 52 can also be formed using a sputtering method or a CVD method.

[0085] In step S230, the light-emitting diode 80 is formed in contact with the buffer layer 52.

[0086] In step S240, a first planarization layer 57-1 is formed in contact with the buffer layer 52 to a thickness that covers up to the p-type semiconductor layer 84 of the light-emitting diode 80. For example, a resin containing photosensitive polyimide is applied to the buffer layer 52. Using photolithography, an opening is formed in the next step in order to locate the lower part of the cathode conductive part 58-2. Note that the upper part of the cathode conductive part 58-2 refers to the part that will be formed in a subsequent step.

[0087] In step S250, the lower portion of the cathode conductor 58-2 is formed so as to be electrically connected to the cathode 82K of the light-emitting diode 80 through the opening in the first planarization layer 57-1. The cathode conductor 58-2 may be, for example, a laminated metal film of aluminum and titanium (Al / Ti film). After forming the laminated metal film, the cathode conductor 58-2 may be leveled flush with the first planarization layer 57-1 by chemical mechanical polishing (CMP), and portions other than the lower portion of the cathode conductor 58-2 may be removed. Using photolithography, openings are formed in the next step to accommodate the anode 84A, the anode conductor 58-1, and the upper portions of the cathode conductor 58-2.

[0088] In step S260, a second planarization layer 57-2 is formed. For example, a resin containing photosensitive polyimide is applied to the first planarization layer 57-1. Using photolithography, openings are formed in order to locate the upper portions of the anode 84A, anode conductive portion 58-1, and cathode conductive portion 58-2 in the next step. The opening for the anode 84A is provided so as to extend in a direction parallel to the imaginary plane VP so that the anode conductive portion 58-1 does not overlap with the light-emitting diode 80 in a direction perpendicular to the imaginary plane VP (see FIG. 5).

[0089] In step S270, the upper portions of the anode 84A, anode conductive portion 58-1, and cathode conductive portion 58-2 are formed in the openings formed in the second planarizing layer 57-2. For example, a laminated metal film of aluminum and titanium (Al / Ti film) can be used as the upper portions of the anode 84A, anode conductive portion 58-1, and cathode conductive portion 58-2.

[0090] Step S300 shown in FIG. 6 is a process of electrically connecting the transistor 60 formed on the first substrate 40 and the light-emitting diode 80 formed on the second substrate 50.

[0091] Step S300 (see FIG. 6) is divided into steps S310 to S330 shown in FIG.

[0092] In step S310, a connection member 13-1 in contact with the drain conductive portion 48-1 and a connection member 13-2 in contact with the ground conductive portion 48-2 are formed. For example, solder, silver paste, or an anisotropic conductive film (ACF) can be used as the connection members 13-1 and 13-2. The connection members 13-1 and 13-2 may be formed in contact with the anode conductive portion 58-1 and the cathode conductive portion 58-2, respectively.

[0093] In step S320, an adhesive resin material 53 is applied to the light-shielding layer 14 to bond the first substrate 40 and the second substrate 50. For example, an acrylic resin can be used as the adhesive resin material 53. The adhesive resin material 53 functions as a spacer, so that the distance between the first substrate 40 and the second substrate 50 is maintained constant.

[0094] In step S330, the bonded first substrate 40 and second substrate 50 are pressure-bonded to harden the connecting members 13-1 and 13-2. The hardening of the connecting members 13-1 and 13-2 may be performed in stages, including temporary hardening and full hardening. Alternatively, the temperature of the connecting members 13-1 and 13-2 may be raised to a temperature higher than the melting point, and after the connecting members 13-1 and 13-2 have fully melted, the temperature of the connecting members 13-1 and 13-2 may be lowered to a low temperature below the melting point, thereby softening and hardening the connecting members 13-1 and 13-2.

[0095] The above procedure mechanically bonds the first substrate 40 and the second substrate 50. Furthermore, the drain conductive portion 48-1 and the anode conductive portion 58-1 are electrically connected by the connection member 13-1, and the ground conductive portion 48-2 and the cathode conductive portion 58-2 are electrically connected by the connection member 13-2.

[0096] Anode conductive portion 58-1 does not overlap light-emitting diode 80 in a direction perpendicular to imaginary plane VP, and connecting member 13-1 also does not overlap light-emitting diode 80 (see FIG. 5). Therefore, even if stress is applied to second substrate 50 from first substrate 40 when first substrate 40 and second substrate 50 are bonded together, the position at which the stress is applied is deviated from the position of light-emitting diode 80, and light-emitting diode 80 is unlikely to be damaged.

[0097] The mechanical connection and electrical connection between the drain conductive portion 48-1 and the anode conductive portion 58-1 are not limited to those via a connecting member 13-1 such as solder. For example, the drain conductive portion 48-1 and the anode conductive portion 58-1 may be in direct contact with each other, and the contacting portions may be joined together to connect them. Similarly, the mechanical connection and electrical connection between the ground conductive portion 48-2 and the cathode conductive portion 58-2 are not limited to those via a connecting member 13-2 such as solder. For example, the ground conductive portion 48-2 and the cathode conductive portion 58-2 may be in direct contact with each other, and the contacting portions may be joined together to connect them. The method for joining the contacting portions may be solid-state welding or liquid-state welding.

[0098] As described above, the drain conductive portion 48-1 and the ground conductive portion 48-2 on the first substrate 40 side formed in a typical TFT manufacturing process are equal in height. Furthermore, according to the display device 1, the anode conductive portion 58-1 and the cathode conductive portion 58-2 provided on the second substrate 50 side facing the first substrate 40 are also equal in height. Therefore, compared to when conductive portions of different heights are connected by the connecting member 13-1 or 13-2, gaps are less likely to occur between the conductive portions, and poor electrical contact is less likely to occur between the two bonded substrates.

[0099] Furthermore, in the display device 1 of this embodiment, the heights of the conductive portions (drain conductive portion 48-1, ground conductive portion 48-2) on the first substrate 40 side are uniform, and the heights of the conductive portions (anode conductive portion 58-1, cathode conductive portion 58-2) on the second substrate 50 side are also uniform. Therefore, even if the areas of the first substrate 40 and the second substrate 50 are increased, the two substrates can be easily bonded together without creating gaps between the drain conductive portion 48-1 and the anode conductive portion 58-1, and between the ground conductive portion 48-2 and the cathode conductive portion 58-2.

[0100] In addition, in the direction perpendicular to the imaginary plane VP, the connecting member 13-1 overlaps with the light-emitting diode 80, and the connecting member 13-2 does not overlap with the light-emitting diode 80, but both the connecting members 13-1 and 13-2 may be arranged in positions that do not overlap with the light-emitting diode 80.

[0101] 5, in the display device 1 described as the first embodiment, the cathode 82K and the anode 84A are connected to the conductive portion on the first substrate 40 side for each pixel 11. However, the method for connecting the connection portion of the anode and cathode of the light-emitting diode 80 to the first substrate 40 side is not limited to the above. In the display device 2 according to the second embodiment, the cathode 82K is connected to the connection portion on the first substrate 40 side outside the pixel 11.

[0102] The display device 2 will be described with reference to Fig. 10. The following description will focus on the differences from the display device 1.

[0103] 10 shows a cross-sectional view of the display device 2 taken along line A1-A2 (see FIG. 1). In the pixel 11A of the display device 2, a transistor 60, a light-emitting diode 80A, and the like are disposed between the first substrate 40 and the second substrate 50. The pixel 11A does not have a cathode conductive portion 58-2 or a ground conductive portion 48-2 (see FIG. 5). As will be described later, the cathode provided on the second substrate 50 side and the ground wiring provided on the first substrate 40 side are connected in the non-display portion 10A.

[0104] Next, to explain the positional relationship of the wiring, FIG. 11 shows a plan view of a cross section of the display device 2 taken along line D1-D2 (see FIG. 10) as viewed from the first substrate 40 toward the second substrate 50. Cathode wiring 59 is disposed adjacent to each pixel 11A. The cathode wiring 59 is a routed wiring, and is, for example, a metal layer containing aluminum connected to the cathode of the light-emitting diode 80A. The cathode wiring 59 also extends from the display section 10 to the non-display section 10A and is connected to the cathode conductive section 58-3 disposed in the non-display section 10A.

[0105] To explain the layer structure of the display unit 10 of the display device 2, Fig. 12 shows a cross-sectional view of one pixel 11A taken along line E1-E2 (see Fig. 11). As shown in Fig. 12, the pixel 11A does not have a ground conductive portion 48-2 (see Fig. 5) that contacts the ground wiring 44. Therefore, the cathode 82K of the light-emitting diode 80A is not connected to the ground wiring 44 in the pixel 11A. The connection between the cathode 82K of the light-emitting diode 80A and the ground wiring 44 is made in the non-display unit 10A, which will be described next.

[0106] 13 shows a cross-sectional view of non-display section 10A taken along line F1-F2 (see FIG. 11 ) of non-display section 10A of display device 2. As shown in FIG. 13 , diode 80B is formed in contact with buffer layer 52. Diode 80B includes a gallium nitride layer 81 provided in contact with buffer layer 52, an n-type semiconductor layer 82 provided in contact with gallium nitride layer 81, a light-emitting layer 83 provided in contact with n-type semiconductor layer 82, and a p-type semiconductor layer 84 provided in contact with light-emitting layer 83.

[0107] A ground conductive portion 48-3 is formed in an opening formed in the interlayer film 47. The ground conductive portion 48-3 is connected to the ground wiring 44 (see FIG. 12).

[0108] A cathode conductive portion 58-3 is provided in contact with the p-type semiconductor layer 84 and connected to the cathode wiring 59 of the pixel 11A (see FIG. 12 ). The cathode conductive portion 58-3 is a portion of a conductive portion formed by the same process as the cathode wiring 59, for example, by sputtering, that extends in a direction intersecting the imaginary plane VP and contacts the p-type semiconductor layer 84. The cathode conductive portion 58-3 is electrically connected to the cathode region of the light-emitting diode 80A via the cathode wiring 59. The cathode conductive portion 58-3 is an example of a cathode contact portion. Note that the cathode conductive portion 58-3 does not have to be in direct contact with the p-type semiconductor layer 84; for example, a planarizing film or the like may be disposed between the cathode conductive portion 58-3 and the p-type semiconductor layer 84.

[0109] Diode 80B is formed in the same process as light-emitting diode 80A (see FIG. 12), and therefore has the same layer structure as light-emitting diode 80A. However, the cathode of diode 80B, which is located inside non-display section 10A, is insulated from drive circuit section 20 (see FIG. 1), and therefore does not emit light. Thus, in display device 2, light-emitting diode 80A is not located in non-display section 10A. Note that the anode of diode 80B may be insulated from drive circuit section 20 (see FIG. 1).

[0110] The height L1 (see FIG. 12) of the anode conductive portion 58-1 is equal to the height L2 (see FIG. 13) of the cathode conductive portion 58-3. A portion of the cathode conductive portion 58-3 is disposed between the upper surface of the diode 80B and the light-shielding layer 14. In this way, the diode 80B functions as a base for the cathode conductive portion 58-3.

[0111] 12, the cathode wiring 59 extends toward the depth of the drawing and has a portion at its end that extends in a direction parallel to the second substrate 50, as indicated by the dashed line (see FIG. 11). Therefore, the cathode wiring 59 is electrically connected to adjacent portions 11A. The height L3 of the upper surface of the cathode wiring 59 relative to the upper surface of the buffer layer 52 is smaller than the height L1 of the upper surface of the anode conductive portion 58-1 relative to the upper surface of the buffer layer 52.

[0112] The cathode wiring 59 may be disposed closer to the second substrate 50 than the light-emitting diode 80A.

[0113] Next, an example of a method for manufacturing the display device 2 will be described with reference to FIGS.

[0114] 14 is a flowchart showing an outline of an example of a method for manufacturing the display device 2. The display device 2 is manufactured by performing, in this order, a step of laminating the first substrate 40 (step S2100), a step of laminating the second substrate 50 (step S2200), and a step of bonding the first substrate 40 and the second substrate 50 together (step S2300).

[0115] Step S2100 is a process of laminating a first substrate 40 such as an amorphous glass substrate using the first substrate 40 as a support substrate.

[0116] Step S2100 is divided into steps S2110 to S2160 shown in Fig. 15. Of these, steps S2110 to S2140 are similar to steps S110 to S140 shown in Fig. 7.

[0117] In step S2150, a drain conductive portion 48-1 electrically connected to the drain electrode 63 of the transistor 60 and a ground conductive portion 48-3 electrically connected to the ground wiring 44 are formed through the opening in the interlayer film 47. The drain conductive portion 48-1 is provided in contact with the drain electrode 63 of the transistor 60 of the pixel 11A, as in step S150 (see FIG. 7). Unlike the ground conductive portion 48-2 (see FIG. 7) in step S150, the ground conductive portion 48-3 is provided in the non-display portion 10A. The ground conductive portion 48-3 is formed from the same material as the ground wiring 44, for example, a laminated metal film of aluminum and titanium (Al / Ti film).

[0118] Step S2200 shown in FIG. 14 is a process of laminating a second substrate 50 such as an amorphous glass substrate using the second substrate 50 as a support substrate.

[0119] Step S2200 is divided into steps S2210 to S2270 shown in Fig. 16. Of these, steps S2210 to S2220 are the same as steps S210 to S220 shown in Fig. 8.

[0120] In step S2230, light-emitting diode 80A and diode 80B are formed. Like light-emitting diode 80 in step S230 (see FIG. 8), light-emitting diode 80A is provided in pixel 11A, but diode 80B is provided in non-display section 10A. Because light-emitting diode 80A and diode 80B are formed integrally, no additional process is required just to form the electrical contact of the cathode, and it is easy to align the heights of connecting member 13-1 and connecting member 13-3.

[0121] In step S2240, a first planarization layer 57-1 is formed to a thickness that covers up to the p-type semiconductor layer 84 of the light-emitting diode 80A. An opening for arranging the cathode wiring 59 may be formed in the first planarization layer 57-1 using photolithography.

[0122] In step S2250, cathode conductive portion 58-3 is formed. Unlike cathode conductive portion 58-2 (see FIG. 8) in step S250, cathode conductive portion 58-3 is provided in non-display portion 10A. The same material as cathode wiring 59, such as a laminated metal film of aluminum and titanium (Al / Ti film), can be used for cathode conductive portion 58-3.

[0123] In step S2260, a second planarization layer 57-2 is formed. Using photolithography, an opening is formed for disposing the anode 84A and anode conductive portion 58-1 in the next step. The opening for the anode 84A is provided extending in a direction parallel to the imaginary plane VP so that the top surface of the anode conductive portion 58-1 does not overlap with the light-emitting diode 80 in a direction perpendicular to the imaginary plane VP (see FIG. 12). The anode conductive portion 58-1 is provided in contact with the anode 84A of the light-emitting diode 80A of the pixel 11A, as in step S250 (see FIG. 8).

[0124] In step S2270, the anode 84A and the anode conductive portion 58-1 are formed in the opening formed in the second planarizing layer 57-2. The anode 84A and the anode conductive portion 58-1 may be, for example, a laminated metal film of aluminum and titanium (Al / Ti film).

[0125] Step S2300 shown in FIG. 14 is a process of electrically connecting the transistor 60 formed on the first substrate 40 and the light-emitting diode 80A formed on the second substrate 50.

[0126] Step S2300 (see FIG. 14) is divided into steps S2310 to S2330 shown in FIG.

[0127] In step S2310, a connection member 13-1 is formed in contact with the drain conductive portion 48-1, and a connection member 13-3 is formed in contact with the ground conductive portion 48-3. For example, solder, silver paste, or an anisotropic conductive film (ACF) can be used as the connection member 13-3. The connection member 13-3 may also be formed in contact with the cathode conductive portion 58-3.

[0128] Steps S2320 to S2330 are similar to steps S320 to S330 shown in FIG.

[0129] In the display device 2, the connection between the cathode 82K of the light-emitting diode 80A and the ground conductive portion 48-3 is not made for each pixel 11A, but is shared by multiple pixels 11A (see FIG. 13). Therefore, even if the number of pixels 11A is the same, the number of cathode conductive portions 58-3 and ground conductive portions 48-3 can be reduced compared to the display device 1 (see FIG. 13).

[0130] Therefore, according to the display device 2, when bonding the first substrate 40 and the second substrate 50 (see Figure 10), it is possible to reduce the number of electrical contacts that must be connected, and it is possible to provide a display device 2 that is less likely to cause poor contact.

[0131] Although the anode conductive portion 58-1 is disposed inside the display portion 10, the upper surface of the anode conductive portion 58-1 does not overlap with the light-emitting diode 80A (see FIGS. 10 and 12). Furthermore, since the cathode conductive portion 58-3 is disposed in the non-display portion 10A, the upper surface of the cathode conductive portion 58-3 does not overlap with the light-emitting diode 80A (see FIGS. 10 and 13). Therefore, according to the display device 2, the light-emitting diode 80A is less likely to be damaged by stress generated when bonding the first substrate 40 and the second substrate 50 (see FIG. 10) together, compared to when the light-emitting diode 80A overlaps with the cathode conductive portion 58-3.

[0132] 11 , in this embodiment, the cathodes 82K of the light-emitting diodes 80A are connected to each other by the cathode wiring 59 for commonality. However, the common wiring or contact is not limited to the above, and for example, the anodes 84A (see FIG. 11 ) of the light-emitting diodes 80A may be common. Furthermore, when the anodes 84A (see FIG. 11 ) of the adjacent pixels 11A are connected by a wiring, the height of the wiring may be smaller than the height of the cathode conductive portion.

[0133] <Third Embodiment> Both the display device 1 according to the first embodiment and the display device 2 according to the second embodiment include a second substrate 50 as a support substrate that supports light-emitting diodes 80, 80A (see FIGS. 2 and 10). In contrast, a display device 3 according to another embodiment of the present invention does not include the second substrate 50. The following description will focus on the differences from the display devices 1 and 2.

[0134] The display device 3 will be described with reference to Fig. 18. Fig. 18 is a schematic cross-sectional view of the display device 3 taken along the line A1-A2 (see Fig. 1), similar to the display device 1 shown in Fig. 2.

[0135] A plurality of light-emitting diodes 80 are arranged opposite to the first substrate 40. The light-emitting diodes 80 have emission surfaces 80S arranged within a virtual surface 50-3 (virtual plane VP). The light-emitting diodes 80 do not have to be connected to each other via the planarizing layer 57 as shown in FIG. 18 , but may be individually separated.

[0136] Next, an example of a method for manufacturing the display device 3 will be described with reference to FIGS.

[0137] 19 is a flowchart showing an outline of an example of a method for manufacturing the display device 3. The display device 3 is manufactured by performing, in this order, a step of laminating on the first substrate 40 (step S3100), a step of laminating on the second substrate 50 (step S3200), and a step of bonding the first substrate 40 and the second substrate 50 together and peeling off the second substrate 50 (step S3300).

[0138] Step S3100 is a step of laminating a first substrate 40 such as an amorphous glass substrate using the first substrate 40 as a support substrate.

[0139] Step S3100 shown in Fig. 19 is divided into steps S3110 to S3160 shown in Fig. 20. Steps S3110 to S3160 are similar to steps S110 to S160 shown in Fig. 7.

[0140] Step S3200 is a step of laminating a second substrate 50 such as an amorphous glass substrate using the second substrate 50 as a support substrate.

[0141] Step S3200 is divided into steps S3210 to S3270 shown in Figure 21. Steps S3210 to S3270 are similar to steps S210 to S270 shown in Figure 8.

[0142] Step S3300 shown in FIG. 19 is a process of electrically connecting the transistor 60 formed on the first substrate 40 and the light-emitting diode 80 formed on the second substrate 50.

[0143] Step S3300 is divided into steps S3310 to S3340 shown in Fig. 22. Of these, steps S3310 to S3330 are similar to steps S310 to S330 shown in Fig. 9.

[0144] In step S3340, the second substrate 50 is peeled off from the bonded first substrate 40 and second substrate 50.

[0145] According to this embodiment, since there is no second substrate 50 (see FIGS. 2 and 10), most of the light emitted from the light-emitting diodes 80 is used to display an image. Therefore, image quality can be improved compared to when the light emitted from the light-emitting diodes 80 is viewed through the second substrate 50.

[0146] Therefore, the display device 3 can provide a display device 3 with higher image quality.

[0147] Furthermore, since the display device 3 does not include the second substrate 50 (see FIGS. 2 and 10), the device can be made thinner and lighter than when the second substrate 50 is included.

[0148] <Modification> A display device 2 according to the second embodiment is provided with cathode wiring 59 as a lead wiring (see FIG. 13). The cathode 82K of each light-emitting diode 80A is connected to the cathode wiring 59 by one path (see FIG. 11), but the cathode 82K may be connected to the cathode wiring 59 by two or more paths. A display device 4 according to a modification will be described below, focusing on the differences from the display devices 1, 2, and 3.

[0149] 23 shows a plan view of a cross section of the display device 4 taken along line D1-D2 (see FIG. 10) as viewed from the first substrate 40 toward the second substrate 50. Each light-emitting diode 80A of the display device 4 is connected to the cathode wiring 59A by two paths.

[0150] Specifically, the cathode 82K of the light-emitting diode 80A is connected to the cathode wiring 59A via two paths: a cathode wiring 59B extending in a first direction, and a cathode wiring 59C extending in a direction intersecting the first direction in a planar view.

[0151] If multiple electrical connection paths are secured, even if one of them is interrupted, current will be supplied to the light-emitting diode 80A via the remaining paths. Therefore, according to this embodiment, lighting failure of the light-emitting diode 80A is unlikely to occur, and a high-quality display device can be provided.

[0152] The anodes 84A of the light-emitting diodes 80A may be electrically connected in common, and the anodes of the light-emitting diodes 80A may be electrically connected to the lead wiring via two or more paths for multiplexing.

[0153] In the above embodiments, a high electron mobility transistor (HEMT) using a nitride semiconductor layer has been described as an example of the transistor 60 formed on the first substrate 40. However, the material or configuration of the channel region of the transistor 60 is not limited to those described above. For example, the transistor 60 may be a metal oxide semiconductor field effect transistor (MOSFET) formed on a single crystal silicon (Si) substrate or an SOI (silicon on insulator) substrate. Furthermore, the transistor 60 may be a thin film transistor (TFT) using amorphous silicon (a-Si), polysilicon (poly-Si), an oxide semiconductor, or the like as a material constituting the channel region. Furthermore, an element other than a transistor having a switching function may be used instead of the transistor 60.

[0154] Although preferred embodiments have been described above, the present disclosure is not limited to such embodiments. The contents disclosed in the embodiments are merely examples, and various modifications are possible within the scope of the present disclosure. Appropriate modifications made within the scope of the present disclosure naturally fall within the technical scope of the present disclosure. Furthermore, the above-described embodiments can be implemented in appropriate combinations as long as they are not mutually contradictory. Furthermore, even if there are other effects and advantages different from those achieved by the aspects of the above-described embodiments, those that are clear from the description in this specification or that can be easily predicted by a person skilled in the art are naturally considered to be achieved by the present invention.

[0155] 1, 2, 3, 4: Display device 10: Display section 10A: Non-display section 11, 11A: Pixel 11C: Capacitor element 11L: Light-emitting diode 11P: Pixel circuit 11S: Scanning line 11T: Signal line 11G: Reference power supply line 11T-1: First transistor 11T-2: Second transistor 11U: Drive power supply line 13-1, 13-2, 13-3: Connection member 14: Light-shielding layer 20: Drive circuit section 30: Terminal section 31: Terminal 40: First substrate 40-1, 40-2, 50-1, 50-2, 50-3: Surface 41, 51: Base layer 42, 52: Buffer layer 43: Capacitor 43-1: First electrode 43-2: Second electrode 44: Ground wiring 47: Interlayer film 48-1: Drain conductive portion 48-2, 48-3: Ground conductive portion 50: Second substrate 53: Adhesive resin material 57: Planarization layer 57-1: First planarization layer 57-2: Second planarization layer 58-1: Anode conductive portion 58-2, 58-3: Cathode conductive portion 59, 59A, 59B, 59C: Cathode wiring 60: Transistor 61: Gallium nitride layer 62: Aluminum gallium nitride layer 63: Drain electrode 70: Transistor 74D: Drain electrode 80, 80A: Light-emitting diode 80B: Diode 80S: Emission surface 81: Gallium nitride layer 82: n-type semiconductor layer 82K: Cathode (n-type electrode) 83: Light-emitting layer 84: p-type semiconductor layer 84A: anode (p-type electrode)

Claims

1. A display device comprising: a plurality of light-emitting diodes whose emission surfaces are included in the same imaginary plane; anode contact portions electrically connected to the anodes of the light-emitting diodes and extending in a direction intersecting the imaginary plane; and cathode contact portions electrically connected to the cathodes of the light-emitting diodes and extending in a direction intersecting the imaginary plane, wherein at least one of an upper surface of the anode contact portion and an upper surface of the cathode contact portion does not overlap with the light-emitting diodes in a direction perpendicular to the imaginary plane.

2. The display device according to claim 1, wherein, of a first region in which the plurality of light-emitting diodes are arranged and a second region surrounding the first region, the upper surface of the anode contact portion located inside the first region and the upper surface of the cathode contact portion located inside the first region do not overlap with the light-emitting diodes in a direction perpendicular to the imaginary plane.

3. The display device according to claim 1, wherein the cathode contact portion is connected to a routing wiring that electrically connects the cathodes of at least two of the light-emitting diodes, and the upper surface of the cathode contact portion is arranged inside a second region that surrounds a first region in which the plurality of light-emitting diodes are arranged.

4. The display device according to claim 3, wherein the cathode contact portion and the lead-out wiring are formed from the same material.

5. The display device according to claim 3, wherein the distance between the imaginary plane and the upper surface of the lead-out wiring is smaller than the distance between the imaginary plane and the upper surface of the anode contact portion.

6. The display device according to claim 1, wherein the anode contact portion is connected to a routing wiring that electrically connects the anodes of at least two of the light-emitting diodes, and the upper surface of the anode contact portion is arranged inside a second region that surrounds a first region in which the plurality of light-emitting diodes are arranged.

7. The display device according to claim 6, wherein the anode contact portion and the lead-out wiring are formed from the same material.

8. The display device according to claim 6, wherein the distance between the imaginary plane and the upper surface of the lead-out wiring is smaller than the distance between the imaginary plane and the upper surface of the cathode contact portion.

9. The display device according to claim 3 or 6, wherein the anode of each of the light-emitting diodes or the cathode of each of the light-emitting diodes is electrically connected to the lead-out wiring through two or more paths.

Images