Data error correction method and apparatus for raid strip, device, and readable storage medium
By reading data from non-target storage cells in the RAID stripe and selecting either hardware or software decoding to reread based on the number of erases, the problem of insufficient error correction capability of RAID stripes is solved, achieving more efficient data error correction and extending the lifespan of solid-state drives.
Patent Information
- Application Number
- PCT/CN2025/101829
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-07-26
- Filing Date
- 2025-06-18
- Publication Date
- 2026-01-29
AI Technical Summary
RAID stripe error correction is prone to failure when reading data. Existing methods such as hardware decoding and software decoding are insufficient to effectively correct read errors, resulting in weak error correction capabilities.
By reading the data from the non-target storage cells on the RAID stripe, excluding the target storage cell that needs error correction, and selecting either hardware or software decoding based on the number of times the superblock has been erased, the data is reread. If the reread is successful, an XOR operation is performed to fill the target storage cell.
It improves the success rate and reliability of RAID stripe data error correction, extends the lifespan of solid-state drives, and ensures the integrity and availability of data stripes.
Smart Images

Figure CN2025101829_29012026_PF_FP_ABST
Abstract
Description
RAID stripe data correction method, device and equipment and readable storage medium
[0001] Cross-reference to Related Applications
[0002] The present disclosure claims priority to the Chinese patent application No. 202411009021X, filed on July 26, 2024, and entitled "RAID stripe data correction method, device and equipment and readable storage medium", the entire content of which is incorporated herein by reference. TECHNICAL FIELD
[0003] The present disclosure relates to the field of data storage, and in particular to a RAID stripe data correction method, device, equipment and readable storage medium. BACKGROUND
[0004] When a solid state drive (SSD) is used in various complex environments, read errors caused by internal and external factors are inevitable, and therefore the error correction capability is particularly important. Hard decode (Hard Decode) and soft decode (Soft Decode) are common physical error correction methods, and Hard Decode is also called read-retry. In addition, the Redundant Arrays of Independent Disks (RAID) error correction method, as the last line of defense, is also frequently used. It is a logical error correction method based on the XOR principle, which uses redundant data to achieve the purpose of error correction.
[0005] Before performing XOR on one or more stripe (storage unit) data, the RAID stripe correction needs to read one or more storage unit data. At this time, it is very likely that read failure will also occur. Once read failure occurs and there is no hard decode and soft decode operation, the RAID correction will fail, and the RAID correction capability is weak. SUMMARY
[0006] To solve the above technical problems, the present disclosure provides a RAID stripe data correction method, device, equipment and readable storage medium.
[0007] The present disclosure provides a RAID stripe data correction method, which comprises:
[0008] reading data of non-target storage units on the RAID stripe except for a target storage unit that needs to be corrected;
[0009] If the reading of the data of the non-target storage unit fails, a hard decoding mode is selected according to the erase times of the super block, and the non-target storage unit is re-read according to the hard decoding mode;
[0010] If the number of times of re-reading the data of the non-target storage unit fails reaches a preset re-reading number, the non-target storage unit is re-read according to a soft decoding mode;
[0011] If the re-reading of the data of the non-target storage unit succeeds, an exclusive OR operation is performed on the read data of the non-target storage unit;
[0012] The result of the exclusive OR operation is filled into the position of the target storage unit.
[0013] In an embodiment, after the reading of the data of the non-target storage unit on the RAID stripe except the target storage unit requiring error correction, the method further comprises:
[0014] If the reading of the data of the non-target storage unit succeeds, an exclusive OR operation is performed on the read data of the non-target storage unit;
[0015] The result of the exclusive OR operation is filled into the position of the target storage unit.
[0016] In an embodiment, the selecting of the hard decoding mode according to the erase times of the super block and the re-reading of the non-target storage unit according to the hard decoding mode comprises:
[0017] The maximum erase times of the solid state disk where the super block is located are obtained, and the erase times threshold of the super block is determined according to the maximum erase times;
[0018] If the erase times of the super block is less than or equal to the erase times threshold, the hard decoding mode is selected as concurrent re-reading, and the non-target storage unit is re-read according to the concurrent re-reading;
[0019] If the erase times of the super block is greater than the erase times threshold, the hard decoding mode is selected as serial re-reading, and the non-target storage unit is re-read according to the serial re-reading.
[0020] In an embodiment, the solid state disk comprises a flash memory controller, and the re-reading of the non-target storage unit according to the concurrent re-reading comprises:
[0021] A plurality of re-reading commands are synchronously issued to the flash memory controller according to all addresses of the non-target storage unit, and each re-reading command corresponds to one non-target storage unit;
[0022] The flash memory controller rereads the non-target memory cells sequentially according to the reread command;
[0023] The flash memory controller is polled to sequentially obtain the reread progress of each non-target memory cell until the reread progress of all non-target memory cells is completed, and then the reread ends.
[0024] In one embodiment, rereading the non-target memory cell according to the serial reread includes:
[0025] A reread command is sent to the flash memory controller based on the address of the first non-target memory cell;
[0026] After the first non-target memory cell is successfully reread, a reread command is sent to the flash memory controller according to the address of the second non-target memory cell, until the reread of the last non-target memory cell is completed, and the reread ends.
[0027] In one embodiment, the method further includes:
[0028] After receiving the reread result of the previous non-target memory cell, a reread command is sent to the next non-target memory cell.
[0029] In one embodiment, before reading data from non-target storage cells on the RAID stripe (excluding the target storage cell requiring error correction), the method further includes:
[0030] Request cache space from the flash controller.
[0031] In one embodiment, the method further includes:
[0032] If rereading the data in the non-target storage unit fails, the cache space is released, and a RAID stripe error correction termination command is sent to the flash memory controller.
[0033] In one embodiment, rereading the non-target storage unit according to the software decoding method includes:
[0034] Add a check bit to the data in the non-target storage unit;
[0035] The non-target storage unit with the added check bit is reread.
[0036] In one embodiment, rereading the non-target storage unit according to the software decoding method includes:
[0037] By selecting offset voltages of different magnitudes, soft reads are performed on the non-target memory cells to obtain soft read data;
[0038] The soft-read data is then soft-decoded and reread.
[0039] In one embodiment, after reading the data from the non-target storage cells on the RAID stripe, excluding the target storage cell requiring error correction, the method further includes:
[0040] The error check code determines whether there is a data read failure in the non-target storage unit.
[0041] Embodiments of this disclosure also provide a RAID stripe data error correction device, the RAID stripe data error correction device comprising:
[0042] The read module is configured to read data from non-target storage cells on the RAID stripe, excluding the target storage cell that needs error correction.
[0043] The first reread module is configured to determine if reading data from the non-target storage unit fails, and then select a hardware decoding method based on the number of erases of the superblock, and reread the non-target storage unit according to the hardware decoding method.
[0044] The second reread module is configured to determine if the number of failed rereads of the data in the non-target storage unit reaches a preset number of rereads, and then reread the non-target storage unit according to the software decoding method.
[0045] The XOR module is configured to perform an XOR operation on the data of the non-target storage unit if the rereading of the data in the non-target storage unit is successful.
[0046] The filling module is configured to fill the position of the target storage unit with the result of the XOR operation.
[0047] Embodiments of this disclosure also provide an electronic device, including a memory and a processor, the memory being configured to store a computer program that executes the RAID stripe data error correction method provided in the first aspect when the processor is running.
[0048] Embodiments of this disclosure also provide a computer-readable storage medium storing a computer program that, when run on a processor, executes the RAID stripe data error correction method provided in the first aspect.
[0049] The RAID stripe data error correction method provided in this disclosure reads data from non-target storage units on the RAID stripe, excluding the target storage unit to be corrected. If reading data from a non-target storage unit fails, a hardware decoding method is selected based on the number of superblock erases, and the non-target storage unit is reread using the hardware decoding method. If the number of failed rereads of data from a non-target storage unit reaches a preset number of rereads, the non-target storage unit is reread using a software decoding method. If rereading data from a non-target storage unit is successful, an XOR operation is performed on the already read data from the non-target storage unit. The result of the XOR operation is then filled into the position of the target storage unit. This disclosure improves data error correction capabilities by selecting a hardware decoding method based on the number of erases and performing software decoding rereads based on the reread results of the hardware decoding method, and then performing an XOR operation only after successful rereads of the storage unit's data. Attached Figure Description
[0050] To more clearly illustrate the technical solutions of this disclosure, the accompanying drawings used in the embodiments will be briefly described below. It should be understood that the following drawings only show some embodiments of this disclosure and should not be considered as a limitation on the scope of protection of this disclosure. In the various drawings, similar components are numbered similarly.
[0051] Figure 1 shows a flowchart of a RAID stripe data error correction method provided in an embodiment of this disclosure;
[0052] Figure 2 shows another flowchart of the RAID stripe data error correction method provided in an embodiment of this disclosure;
[0053] Figure 3 shows another schematic flowchart of the RAID stripe data error correction method provided in the embodiments of this disclosure;
[0054] Figure 4 shows another schematic flowchart of the RAID stripe data error correction method provided in the embodiments of this disclosure;
[0055] Figure 5 shows a schematic diagram of a RAID stripe data error correction device provided in an embodiment of this disclosure.
[0056] Icons: 500 - RAID stripe data error correction device, 501 - Read module, 502 - First reread module, 503 - Second reread module, 504 - XOR module, 505 - Fill module. Detailed Implementation
[0057] The technical solutions of the present disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present disclosure, and not all embodiments.
[0058] The components of the embodiments of this disclosure, typically described and illustrated in the accompanying drawings, can be arranged and designed in a variety of different configurations. Therefore, the following detailed description of the embodiments of this disclosure provided in the drawings is not intended to limit the scope of the claimed disclosure, but merely to illustrate selected embodiments of the disclosure. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without inventive effort are within the scope of this disclosure.
[0059] In the following, the terms “comprising,” “having,” and their cognates, which may be used in various embodiments of this disclosure, are intended only to indicate a particular feature, number, step, operation, element, component, or combination thereof, and should not be construed as excluding, firstly, the presence of one or more other features, numbers, steps, operations, elements, components, or combinations thereof, or adding the possibility of one or more features, numbers, steps, operations, elements, components, or combinations thereof.
[0060] Furthermore, the terms "first," "second," and "third" are used only to distinguish descriptions and should not be interpreted as indicating or implying relative importance.
[0061] Unless otherwise specified, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which the various embodiments of this disclosure pertain. Terms (such as those defined in a generally used dictionary) shall be interpreted as having the same meaning as in the context of the relevant technical field and shall not be construed as having an idealized or overly formal meaning, unless clearly defined in the various embodiments of this disclosure.
[0062] This disclosure provides a RAID stripe data error correction method, applied to the error correction module of firmware in a solid-state drive (SSD). The error correction module and the flash controller of the SSD will cooperate using the method proposed in this disclosure to reread erroneous data in the RAID stripe and complete the data error correction.
[0063] Referring to Figure 1, RAID stripe data error correction methods include:
[0064] S101: Reads data from non-target storage cells on the RAID stripe, excluding the target storage cell that needs error correction.
[0065] In this embodiment, the solid-state drive consists of multiple superblocks. One superblock corresponds to one stripe, and one stripe consists of multiple storage unit data blocks. In a redundant array of independent disks (RAID) error correction system, when an error occurs in a storage unit where the data cannot be corrected (UNC), the RAID error correction module needs to traverse and read the data on all other storage units (non-target storage units) in the RAID stripe except for the storage unit to be corrected (target storage unit), and determine whether the data on the other storage units can be successfully read.
[0066] It should be further noted that the granularity of the area where erroneous data occurs may be all the data on a single storage unit, or it may be a portion of a storage unit (one or more storage matrices). In this embodiment, the granularity of the RAID error correction area is not limited. Moreover, the RAID error correction module can only perform RAID error correction on the target storage unit if there is data in only one storage unit on the RAID stripe that cannot be corrected. If there is more than one storage unit of data that cannot be corrected on the RAID stripe, the RAID error correction module cannot perform the XOR operation.
[0067] In one embodiment, after reading the data from the non-target storage cells on the RAID stripe, excluding the target storage cell requiring error correction, the method further includes:
[0068] The error check code determines whether there is a data read failure in the non-target storage unit.
[0069] In this embodiment, the SSD's error correction module identifies whether there is a data read failure in a non-target storage unit by checking the error check code (such as ECC). If there is a data read failure in a non-target storage unit or an error exists, the non-target storage unit will be marked as a non-target storage unit that needs to be reread.
[0070] S102: If reading data from the non-target storage unit fails, a hardware decoding method is selected based on the number of erases of the superblock, and the non-target storage unit is reread according to the hardware decoding method.
[0071] In this embodiment, RAID error correction relies on the correct reading back of data from all non-target storage units on the RAID stripe, excluding the target storage unit requiring correction. If any non-target storage unit fails to read data, the RAID error correction module cannot calculate the correct data using XOR to replace the erroneous target storage unit data block, and the error correction process will terminate. If data reading from non-target storage units in the RAID stripe fails, to ensure the RAID error correction process continues, a hard decoding method will be selected based on the number of superblock program / erase (PE) operations. Different hard decoding methods will be used to reread the failed non-target storage units.
[0072] In one embodiment, selecting a hardware decoding method based on the number of erases of the superblock and rereading the non-target memory unit according to the hardware decoding method includes:
[0073] Obtain the maximum number of erases on the solid-state drive where the superblock is located, and determine the erase count threshold of the superblock based on the maximum number of erases; select a hardware decoding method based on the erase count of the superblock and the erase count threshold, and reread the non-target storage unit based on the hardware decoding method.
[0074] In this embodiment, to extend the lifespan of the SSD, the firmware includes a wear leveling algorithm to ensure that the PE count of all superblocks is approximately the same, avoiding premature wear of some superblocks. Because of the wear leveling algorithm, the PE count of all superblocks in the SSD is essentially the same; therefore, checking the PE count of the SSD can represent the PE count of the superblock corresponding to the RAID stripe where the current non-target storage unit is located. Specifically, the maximum PE count of the SSD's NAND flash memory is obtained from the information provided by the manufacturer. Optionally, the erase count threshold for the superblock containing the non-target storage unit that failed to read can be determined based on the maximum PE count of the SSD's NAND flash memory.
[0075] The SSD firmware records information about each superblock (BlockInform). The BlockInform contains the number of PE (Extreme Error) cycles for each superblock. In order to maximize the success rate of data recovery and reduce the risk of potential data loss, the RAID error correction module will dynamically select different read-retry methods for non-target storage units that have failed to be read, based on the comparison between the superblock's PE cycle threshold and the superblock's erase cycle.
[0076] The rereading methods differ depending on whether the PE count threshold is less than or equal to the number of erases of the superblock or greater than the number of erases of the superblock.
[0077] Referring to Figure 2, in one embodiment, the step of selecting a hardware decoding method based on the number of erases of the superblock and rereading the non-target memory unit according to the hardware decoding method includes:
[0078] S1021: Obtain the maximum number of erases on the solid-state drive where the superblock is located, and determine the erase count threshold of the superblock based on the maximum number of erases.
[0079] In this embodiment, to extend the lifespan of the SSD, the firmware includes a wear leveling algorithm to ensure that the PE count of all superblocks is approximately the same, avoiding premature wear of some superblocks. Because of the wear leveling algorithm, the PE count of all superblocks in the SSD is essentially the same; therefore, checking the PE count of the SSD can represent the PE count of the superblock corresponding to the RAID stripe where the current non-target storage unit is located. Specifically, the maximum PE count of the SSD's NAND flash memory is obtained from the information provided by the manufacturer. Optionally, the erase count threshold for the superblock containing the non-target storage unit that failed to read can be determined based on the maximum PE count of the SSD's NAND flash memory.
[0080] S1022: If the number of erases of the superblock is less than or equal to the number of erases threshold, then the hardware decoding method is selected as concurrent reread, and the non-target storage unit is reread according to the concurrent reread.
[0081] In this embodiment, the SSD firmware records information about each superblock (BlockInform). The BlockInform contains the number of PE cycles for each superblock. In order to maximize the success rate of data recovery and reduce the risk of potential data loss, the RAID error correction module will dynamically select different read-retry methods for non-target storage units that have failed to be read, based on the PE cycle threshold of the superblock.
[0082] Specifically, if the number of erases is less than or equal to the erase count threshold, it indicates that the superblock is still in a relatively healthy state, and the data retention capability of the storage unit is strong. In this case, the system will choose the concurrent read-retry method. This method allows the error correction module to simultaneously send reread commands to the flash controller, attempting to reread data from multiple faulty non-target storage units, thereby improving the speed and efficiency of data recovery.
[0083] S1023: If the number of erases of the superblock is greater than the erase count threshold, then the hardware decoding method is selected as serial reread, and the non-target storage unit is reread according to the serial reread.
[0084] In this embodiment, if the current erase count of the superblock exceeds the erase count threshold, it indicates that the superblock has entered a stage of significant wear, and the data on the storage units is more prone to read errors. In this case, the RAID error correction module selects serial read-retry as the hardware decoding method. This method attempts to read data from each erroneous non-target storage unit sequentially. If a read of a non-target storage unit fails, it immediately switches to a higher-level error recovery mechanism, soft decoding. Unlike the parallel read-retry method, it does not wait for the read results of other non-target storage units but directly enters soft decoding and then rereads. This allows for faster identification and processing of non-target storage units that cannot be successfully read, reducing the overall error correction process time and resource consumption.
[0085] Referring to Figure 3, in one embodiment, the solid-state drive includes a flash memory controller, and the rereading of the non-target storage cell according to the concurrent reread includes:
[0086] S10221: Based on all addresses of the non-target storage units, a plurality of reread commands are synchronously sent to the flash memory controller, each reread command corresponding to one of the non-target storage units.
[0087] In this embodiment, the SSD's error correction module identifies whether there are data read failures in non-target storage units by checking error check codes (such as ECC). If there are data read failures or errors in non-target storage units, the non-target storage units will be marked as non-target storage units that need to be reread. The module will query all addresses of the non-target storage units that have failed to be read. Once the addresses and number of non-target storage units that need to be reread are determined, the error correction module will synchronously issue multiple reread commands to the flash controller (FC). Each reread command corresponds to a non-target storage unit that needs to be reread.
[0088] S10222: The flash memory controller rereads the non-target storage cells sequentially according to the reread command.
[0089] In this embodiment, the flash memory controller rereads non-target storage cells sequentially according to the received reread commands. For example, when the granularity of the non-target storage cell that caused the read error is a Die, assuming a RAID stripe has a total of 32 Dies, they can be numbered sequentially as Die1, Die2...Die32. If an uncorrectable error occurs in Die1, RAID error correction needs to be performed on Die1. The error correction module will read the data of other non-target storage cell Dies. For example, when Die3-14 and Die20-31 have read errors, a Read-Retry operation will be performed on the erroneous Dies. When the concurrent Read-Retry method is selected, the error correction module sends all the reread commands for Die3-14 and Die20-31 to the flash memory controller at once, and then rereads Die3-14 and Die20-31 sequentially.
[0090] S10223: Poll the flash memory controller to sequentially obtain the reread progress of each non-target storage cell until the reread progress of all non-target storage cells is completed, and end the reread.
[0091] In this embodiment, after sending the reread command, although all reread commands are sent to the FC simultaneously, the FC's internal processing capacity is limited; it has only one decoder. It decodes the data of the non-target memory cells to be reread one by one according to the order of the non-target memory cells in the superblock. The error correction module polls the flash memory controller, receiving the reread progress information of the data in each non-target memory cell sequentially. By understanding the reread progress of each non-target memory cell, it determines that all non-target memory cells requiring reread have been reread, and then ends the parallel reread process.
[0092] Referring to Figure 4, in one embodiment, the step of rereading the non-target memory cell according to the serial reread includes:
[0093] S10231: Send a reread command to the flash memory controller based on the address of the first non-target memory cell.
[0094] In this embodiment, similar to the above method of using concurrent rereading to obtain the non-target memory unit that needs to be reread, the error correction module identifies the first non-target memory unit with a read error through ECC, obtains the address of the first non-target memory unit, and marks it as the memory unit that needs to be reread. The error correction module will first send a reread command to the FC for the first non-target memory unit.
[0095] S10232: After the first non-target memory cell is successfully reread, a reread command is sent to the flash memory controller according to the address of the second non-target memory cell, until the reread of the last non-target memory cell is completed, and the reread ends.
[0096] In this embodiment, the error correction module waits for the FC to complete the data reread of the first non-target memory unit and obtains the processing result returned by the FC through the FC's status register. When it receives the FC's processing result for the first non-target memory unit, the error correction module checks whether the data was successfully reread. If the data was successfully reread, the error correction module will continue to issue a reread command for the second non-target memory unit. If the reread fails, the error correction module will immediately perform soft decoding and reread the data. This process is repeated until all non-target memory units that need to be reread have been processed, ending the serial reread process.
[0097] Optionally, the method further includes:
[0098] After receiving the reread result of the previous non-target memory cell, a reread command is sent to the next non-target memory cell.
[0099] It should be noted that before sending a new reread command, the error correction module waits for the processing result of the previous non-target storage unit. This serial reread method, which waits for the result and sends the command sequentially, is more time-consuming than the concurrent reread method. However, it will not continue to process the reread of other non-target storage units due to the failure of the reread of a certain non-target storage unit, thus saving time. The serial reread method can end the Read-Retry of non-target storage units more quickly, thereby entering the Soft Decode error correction step of non-target storage units.
[0100] S103: If the number of failed attempts to reread the data in the non-target storage unit reaches the preset number of reread attempts, then the non-target storage unit is reread according to the software decoding method.
[0101] In this embodiment, during the error correction process of the solid-state drive, when the data reread of a non-target storage unit fails, the data of that non-target storage unit contains errors that cannot be directly recovered. In this case, RAID error correction will use a more complex error recovery mechanism to attempt to repair the data.
[0102] In one embodiment, rereading the non-target storage unit according to the software decoding method includes: adding a check bit to the data in the non-target storage unit; and rereading the non-target storage unit after adding the check bit.
[0103] Specifically, the error correction module applies LDPC encoding to the data in the storage unit, adding extra parity bits to the original data. Data with added parity bits is more robust during writing. Because non-target storage unit data now contains additional parity information, the error correction module can use this information for error detection and correction during reading. If the number of errors in the data is small, and these errors can be corrected through LDPC encoding, then a reread may successfully recover the data. However, if the number of errors in the data exceeds the error correction capability of LDPC encoding, then even with LDPC encoding applied, the data may not be recoverable after a reread.
[0104] In another embodiment, the step of rereading the non-target memory cell according to the software decoding method includes: performing a software read on the non-target memory cell by selecting offset voltages of different magnitudes to obtain software read data; and performing software decoding on the software read data before rereading.
[0105] In this embodiment, when the data reread of a non-target storage cell fails, the error correction module will adopt a soft read method. Soft read provides more information to the error correction module than traditional hard read. By adjusting the offset voltage during reading, soft read can obtain the 0 / 1 confidence information of each bit and provide it to the flash memory controller for decoding.
[0106] Specifically, the error correction module selects a certain number of offset voltages for soft reading, each offset voltage being different in magnitude, ultimately obtaining the 0 / 1 confidence information corresponding to each bit. The soft read data obtained is then passed to the decoder of the flash memory controller to execute the LDPC decoding algorithm. The error correction module receives the decoded data from the flash memory controller; if decoding is successful, the data can be successfully reread, and after a successful reread, the reread of the next non-target memory cell data will continue.
[0107] S104: If the non-target storage unit is successfully reread, then perform an XOR operation on the data of the read non-target storage unit.
[0108] In this embodiment, if rereading a non-target storage unit is successful, meaning all data in the required non-target storage units has been successfully read, the next step is to perform an XOR operation on the read data in the non-target storage units. The XOR operation is a bitwise operation that assigns 0 to each bit and 1 to each bit if they are the same. In RAID, the data in all non-target storage units (each non-target unit's data block is a long binary number) is traversed, and the data in each non-target storage unit is continuously XORed with the result of the current XOR operation to obtain the final XOR result.
[0109] S105: Fill the position of the target storage unit with the result of the XOR operation.
[0110] In this embodiment, the result of the XOR operation is filled into the original target storage cell that needs to be corrected, maintaining the integrity and continuity of the data stripe, while ensuring that when a data read or write request occurs in the future, the RAID storage cell that has been corrected can be transparently used to replace the original faulty storage cell.
[0111] Before replacing a RAID storage unit with a unit that needs error correction, the integrity and correctness of the RAID storage unit must be verified. If the correctness of the RAID storage unit has been verified, and the unit to be corrected is marked as unavailable, the error correction module uses its internal address mapping table to replace the RAID storage unit with the original target storage unit. After replacing the RAID storage unit, the stripe's metadata and information are updated to reflect that the storage unit has been replaced. At this point, the storage unit location that was previously unavailable due to data corruption has now been replaced by a valid RAID storage unit, and the integrity and availability of the RAID data stripe are restored.
[0112] In one embodiment, before reading data from non-target storage cells on the RAID stripe other than the target storage cell that needs error correction, the method further includes: requesting cache space from the flash controller.
[0113] In this embodiment, before the error correction module starts reading data from non-target storage units on the RAID stripe other than the target storage unit to be corrected, the error correction module will request a cache space of a predetermined size from the flash controller. The FC of the SSD will allocate the cache space according to the data size of the storage unit. This cache space will be configured to temporarily store the RAID storage unit generated by the error correction.
[0114] Optionally, the method further includes: if rereading the data in the non-target storage unit fails, releasing the cache space and issuing a RAID stripe error correction termination command to the flash memory controller.
[0115] In this embodiment, if the error correction module still fails to reread, the error correction module will release the previously allocated cache space and issue an error correction termination command to end the RAID stripe error correction process.
[0116] In one embodiment, after reading the data of the non-target storage units on the RAID stripe other than the target storage unit that needs error correction, the method further includes: if there is no failure to read the data of the non-target storage units, then modifying the target storage unit based on the data of the non-target storage units that have been read.
[0117] In this embodiment, if all data from non-target storage units other than the target storage unit that needs error correction is successfully read from the RAID stripe without any failure to read data from non-target storage units, then a preset calculation operation is used to calculate the data from the read non-target storage units, and the calculation result is filled into the position of the target storage unit to restore the integrity and availability of the RAID data stripe.
[0118] In one embodiment, modifying the target storage unit based on the data already read from the non-target storage unit includes:
[0119] Perform an XOR operation on the data in the non-target storage unit that has been read; fill the target storage unit with the result of the XOR operation.
[0120] In this embodiment, if all data from non-target storage units except the target storage unit that needs error correction are successfully read from the RAID stripe without any failure to read data from non-target storage units, then an XOR operation is used to process the read data from the non-target storage units, and the result of the XOR operation is filled into the position of the target storage unit, thus restoring the integrity and availability of the RAID data stripe.
[0121] The RAID stripe data error correction method provided in this embodiment reads data from non-target storage units on the RAID stripe, excluding the target storage unit to be corrected. If reading data from a non-target storage unit fails, a hardware decoding method is selected based on the number of superblock erases, and the non-target storage unit is reread according to the hardware decoding method. If the number of failed rereads of data from a non-target storage unit reaches a preset number of rereads, the non-target storage unit is reread according to a software decoding method. If the reread of data from a non-target storage unit is successful, an XOR operation is performed on the already read data from the non-target storage unit. The result of the XOR operation is then filled into the position of the target storage unit. This disclosure improves the data error correction capability by selecting a hardware decoding method based on the number of erases and performing software decoding rereads based on the reread results of the hardware decoding method, and performing an XOR operation only after the data in the storage unit is successfully reread.
[0122] Furthermore, embodiments of this disclosure provide a RAID stripe data error correction device for use in electronic devices.
[0123] As shown in Figure 5, the RAID stripe data error correction device 500 includes:
[0124] The read module 501 is configured to read data from non-target storage cells on the RAID stripe, excluding the target storage cell that needs error correction.
[0125] The first reread module 502 is configured to determine if reading data from the non-target storage unit fails, and then select a hardware decoding method based on the number of erases of the superblock, and reread the non-target storage unit according to the hardware decoding method.
[0126] The second reread module 503 is configured to determine if the number of failed rereads of the data in the non-target storage unit reaches a preset number of rereads, and then reread the non-target storage unit according to the software decoding method.
[0127] The XOR module 504 is configured to perform an XOR operation on the data of the non-target storage unit if it is successful to reread the data of the non-target storage unit.
[0128] The filling module 505 is configured to fill the position of the target storage unit with the result of the XOR operation.
[0129] Optionally, the XOR module 504 shown is further configured to perform an XOR operation on the data of the non-target storage unit that has been read if there is no failure to read the data of the non-target storage unit.
[0130] Optionally, the first reread module 502 shown is further configured to obtain the maximum number of erases on the solid-state drive where the superblock is located, and determine the erase count threshold of the superblock based on the maximum number of erases; select a hardware decoding method based on the erase count of the superblock and the erase count threshold, and reread the non-target storage unit based on the hardware decoding method.
[0131] Optionally, the first reread module 502 shown is further configured to obtain the maximum number of erases on the solid-state drive where the superblock is located, and determine the erase count threshold of the superblock based on the maximum number of erases; if the number of erases of the superblock is less than or equal to the erase count threshold, then the hardware decoding method is selected as concurrent reread, and the non-target storage unit is reread based on the concurrent reread; if the number of erases of the superblock is greater than the erase count threshold, then the hardware decoding method is selected as serial reread, and the non-target storage unit is reread based on the serial reread.
[0132] The solid-state drive includes a flash memory controller. Optionally, the first reread module 502 shown is further configured to synchronously send multiple reread commands to the flash memory controller based on all addresses of the non-target storage units, with each reread command corresponding to one of the non-target storage units. The flash memory controller rereads the non-target storage units sequentially according to the reread commands. The flash memory controller is polled to sequentially obtain the reread progress of each non-target storage unit until the reread progress of all non-target storage units is completed, at which point the reread ends.
[0133] Optionally, the first reread module 502 shown is further configured to send a reread command to the flash memory controller based on the address of the first non-target memory cell; after the first non-target memory cell is successfully reread, send a reread command to the flash memory controller based on the address of the second non-target memory cell, until the reread of the last non-target memory cell is completed, and then end the reread.
[0134] Optionally, the first reread module 502 shown is further configured to send a reread command to the next non-target storage unit after receiving the reread processing result of the previous non-target storage unit.
[0135] Optionally, the RAID stripe data error correction device further includes an application module configured to apply for cache space from the flash controller.
[0136] Optionally, the application module is also configured to release the cache space and issue a RAID stripe error correction termination command to the flash memory controller if rereading the data of the non-target storage unit fails.
[0137] Optionally, the second reread module 503 shown is further configured to add a check bit to the data in the non-target storage unit; and to reread the non-target storage unit after adding the check bit.
[0138] Optionally, the second reread module 503 shown is further configured to perform soft reading on the non-target storage unit by selecting offset voltages of different magnitudes to obtain soft read data; and to perform soft decoding on the soft read data before rereading.
[0139] Optionally, the RAID stripe data error correction device further includes a judgment module configured to determine whether there is a data read failure of the non-target storage unit based on the error check code.
[0140] The RAID stripe data error correction device 500 provided in this embodiment can implement the above-mentioned RAID stripe data error correction method. To avoid repetition, it will not be described again here.
[0141] The RAID stripe data error correction device provided in this embodiment reads data from non-target storage units on the RAID stripe, excluding the target storage unit to be corrected. If reading data from a non-target storage unit fails, a hardware decoding method is selected based on the number of superblock erases, and the non-target storage unit is reread according to the hardware decoding method. If the number of failed rereads of data from a non-target storage unit reaches a preset number of rereads, the non-target storage unit is reread according to a software decoding method. If rereading data from a non-target storage unit is successful, an XOR operation is performed on the read data from the non-target storage unit. The result of the XOR operation is then filled into the position of the target storage unit. This disclosure improves the data error correction capability by selecting a hardware decoding method based on the number of erases and performing software decoding rereads based on the reread results of the hardware decoding method, and performing an XOR operation only after successful rereads of the storage unit's data.
[0142] Furthermore, embodiments of this disclosure provide an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the computer program executes the above-described RAID stripe data error correction method when running on the processor.
[0143] The electronic device provided in this embodiment can perform the steps of the RAID stripe data error correction method described above. To avoid repetition, it will not be described again here.
[0144] This disclosure also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described RAID stripe data error correction method.
[0145] In this embodiment, the computer-readable storage medium may be a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, etc.
[0146] The computer-readable storage medium provided in this embodiment can implement the above-described RAID stripe data error correction method, and will not be described again here to avoid repetition.
[0147] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or terminal. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or terminal that includes that element.
[0148] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this disclosure, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the various embodiments of this disclosure.
[0149] The embodiments of this disclosure have been described above with reference to the accompanying drawings. However, this disclosure is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this disclosure without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this disclosure. Industrial applicability
[0150] By adopting the above scheme, the hardware decoding method is selected based on the number of erases, and the software decoding method is reread based on the reread status of the hardware decoding method. After the data in the storage unit is successfully reread, an XOR operation is performed, which improves the data error correction capability.
Claims
1. A method of RAID stripe data error correction, the method comprising: The method comprises: reading data of non-target storage units on a RAID stripe except for a target storage unit requiring error correction; if there is a failure in reading the data of the non-target storage units, selecting a hard decoding mode according to the erasing times of a super block, and re-reading the non-target storage units according to the hard decoding mode; if the number of times of failure in re-reading the data of the non-target storage units reaches a preset re-reading number, re-reading the non-target storage units according to a soft decoding mode; if the re-reading of the data of the non-target storage units is successful, performing an exclusive or operation on the read data of the non-target storage units; filling the result of the exclusive or operation into the position of the target storage unit.
2. The method of claim 1, wherein, After the reading of the data of the non-target storage units on the RAID stripe except for the target storage unit requiring error correction, the method further comprises: if there is no failure in reading the data of the non-target storage units, performing an exclusive or operation on the read data of the non-target storage units; filling the result of the exclusive or operation into the position of the target storage unit.
3. The method of claim 1, wherein, The selecting of the hard decoding mode according to the erasing times of the super block and the re-reading of the non-target storage units according to the hard decoding mode comprises: acquiring the maximum erasing times of a solid state disk where the super block is located, and determining an erasing times threshold of the super block according to the maximum erasing times; selecting a hard decoding mode according to the erasing times of the super block and the erasing times threshold, and re-reading the non-target storage units according to the hard decoding mode.
4. The method according to any one of claims 1 to 3, characterized in that, The selecting of the hard decoding mode according to the erasing times of the super block and the re-reading of the non-target storage units according to the hard decoding mode comprises: acquiring the maximum erasing times of a solid state disk where the super block is located, and determining an erasing times threshold of the super block according to the maximum erasing times; if the erasing times of the super block is less than or equal to the erasing times threshold, selecting the hard decoding mode as concurrent re-reading, and re-reading the non-target storage units according to the concurrent re-reading; if the erasing times of the super block is greater than the erasing times threshold, selecting the hard decoding mode as serial re-reading, and re-reading the non-target storage units according to the serial re-reading.
5. The method of claim 4, wherein, The solid state disk comprises a flash memory controller, and the re-reading of the non-target storage units according to the concurrent re-reading comprises: synchronously issuing a plurality of re-reading commands to the flash memory controller according to all addresses of the non-target storage units, each re-reading command corresponding to one non-target storage unit; the flash memory controller re-reading the non-target storage units according to the re-reading commands; polling the flash memory controller to sequentially acquire the re-reading progress of each non-target storage unit until the re-reading progress of all non-target storage units is completed, and ending the re-reading.
6. The method of claim 5, wherein, The re-reading of the non-target storage units according to the serial re-reading comprises: issuing a re-reading command to the flash memory controller according to the address of a first non-target storage unit; After the first non-target storage unit is successfully re-read, a re-reading command is sent to the flash memory controller according to the address of the second non-target storage unit until the re-reading of the last non-target storage unit is completed, and the re-reading is ended.
7. The method of claim 6, wherein, The method further comprises: After the re-reading processing result of the previous non-target storage unit is received, a re-reading command is sent to the next non-target storage unit.
8. The method according to any one of claims 1 to 7, characterized in that, Before the data of the non-target storage units on the RAID stripe except the target storage unit requiring error correction is read, the method further comprises: Applying for a cache space to the flash memory controller.
9. The method of claim 8, wherein, The method further comprises: If the data of the non-target storage unit fails to be re-read, the cache space is released, and a RAID stripe error correction termination command is sent to the flash memory controller.
10. The method according to any one of claims 1 to 9, characterized in that, The re-reading of the non-target storage unit according to the soft decoding mode comprises: Adding a check bit to the data of the non-target storage unit; Re-reading the non-target storage unit after the check bit is added.
11. The method according to any one of claims 1 to 9, characterized in that, The re-reading of the non-target storage unit according to the soft decoding mode comprises: Soft reading the non-target storage unit by selecting offset voltages with different voltage sizes to obtain soft reading data; Re-reading after the soft reading data is soft decoded.
12. The method according to any one of claims 1 to 11, characterized in that, After the data of the non-target storage units on the RAID stripe except the target storage unit requiring error correction is read, the method further comprises: Determining whether the data of the non-target storage unit fails to be read according to an error check code.
13. A RAID stripe data error correction apparatus, characterized by, The device comprises: A reading module configured to read the data of the non-target storage units on the RAID stripe except the target storage unit requiring error correction; A first re-reading module configured to determine whether the data of the non-target storage unit fails to be read, and if so, to select a hard decoding mode according to the erasing number of a super block, and to re-read the non-target storage unit according to the hard decoding mode; A second re-reading module configured to determine whether the number of times that the data of the non-target storage unit fails to be re-read reaches a preset re-reading number, and if so, to re-read the non-target storage unit according to a soft decoding mode; An exclusive OR module configured to determine whether the data of the non-target storage unit is successfully re-read, and if so, to perform an exclusive OR operation on the data of the non-target storage unit that has been read; A filling module configured to fill the result of the exclusive OR operation to the position of the target storage unit.
14. An electronic device, comprising: A memory and a processor, the memory storing a computer program, the computer program executing the RAID stripe data error correction method of any one of claims 1 to 12 when the processor runs.
15. A computer readable storage medium, characterized in that, The computer program executes the RAID stripe data error correction method of any one of claims 1 to 12 when the processor runs.
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