Frame synchronization method, apparatus and system

Abstract

Disclosed in the embodiments of the present application are a frame synchronization method, an apparatus and a system. A receiver performs frame synchronization at the granularity of a first symbol sequence that comprises Q first symbol blocks, each first symbol block comprising N symbols; the receiver is pre-configured with a pilot sequence comprising Q consecutive pilot symbols, respectively matches the Q consecutive pilot symbols with the Q first symbol blocks and, after the matching of all, determines boundaries of frames in the first symbol sequence on the basis of a first statistical position of the maximum number of successful matching of the Q first symbol blocks. The frame synchronization method determines boundaries of frames with higher accuracy, and can reduce the synchronization error probability and the synchronization loss probability especially in scenarios of poor channel quality.

Description

A frame synchronization method, apparatus and system

[0001] This application claims priority to Chinese Patent Application No. 202411017498.2, filed on July 26, 2024, entitled "A Frame Synchronization Method, Apparatus and System", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of communication technology, and in particular to a frame synchronization method, apparatus and system. Background Technology

[0003] As network interface speed requirements increase, bandwidth interface speeds have also been upgraded to the current 800 gigabits per second (Gbps) and 1.6 terabit per second (Tbps). Due to the increased speed, the channel's signal-to-noise ratio (SNR) decreases, leading to a higher bit error rate (BER) at the receiver. Therefore, the transmitter typically employs forward error correction (FEC) coding to control the BER within an acceptable range. Correspondingly, in coherent transmission scenarios, the receiver needs to perform frame synchronization before FEC decoding to determine the boundaries of the Digital Signal Processing (DSP) frames and further determine the FEC code block boundaries.

[0004] The current 800LR scenario employs a simplified DSP frame structure. In a DSP frame, the starting position of every 64 consecutive symbols is a pilot symbol (PS), and the DSP frame contains a total of 96 pilot symbols. The other symbols in the DSP frame besides the pilot symbols can be called payload symbols, resulting in a total of 96 × 64 = 6144 symbols. Currently, the receiver typically performs frame synchronization at a granular level of 6144 symbols to determine the boundaries of the DSP frame. Specifically, the receiver is pre-configured with a pilot sequence containing 96 pilot symbols. The receiver obtains a symbol block of 6144 symbols from the received data. First, it matches the first pilot symbol in the pilot sequence with each symbol in the symbol block. If a match is successful, the first matching position in the symbol block is determined. Then, the second pilot symbol in the pilot sequence is matched with a position 63 symbols away from the first matching position. If a match is successful, this position is determined as the second matching position. The third pilot symbol in the pilot sequence is then matched with a position 63 symbols away from the second matching position, and so on. If N consecutive pilot symbols match the corresponding positions successfully, the boundary of the DSP frame is considered found, where N is a preset threshold. Otherwise, the matching process restarts from the first pilot symbol.

[0005] However, in scenarios with poor channel quality, this frame synchronization method has a high probability of synchronization error and synchronization loss. For example, after determining the boundaries of the DSP frame, multiple consecutive pilot symbols may fail to match their corresponding positions, indicating that the previously determined DSP frame boundaries are inaccurate or synchronization has been lost. Therefore, there is an urgent need for a frame synchronization method that can reduce the probability of synchronization error and synchronization loss in scenarios with poor channel quality. Summary of the Invention

[0006] This application provides a frame synchronization method, apparatus, and system. The frame boundary determined by this frame synchronization method is more accurate, especially in scenarios with poor channel quality. This frame synchronization method can reduce the probability of synchronization error and synchronization loss.

[0007] Firstly, this application provides a frame synchronization method applied at a receiving end. A first symbol sequence comprising W frames, transmitted by the sending end, arrives at the receiving end via a channel. Due to noise, clock drift, or other impairments in the channel, the data received by the receiving end is not aligned with the data transmitted by the sending end. It should be understood that the receiving end does not know the frame boundaries before performing frame synchronization on the received data; that is, the receiving end does not know the positions of the pilot symbols in the first symbol sequence. Specifically, the receiving end receives the first symbol sequence comprising W frames transmitted by the sending end and divides the first symbol sequence into Q first symbol blocks. Here, W is an integer greater than 1, 1 < Q ≤ W, and each of the Q first symbol blocks includes N symbols, where N is an integer greater than 1. In other words, the receiving end performs frame synchronization at a granularity of the first symbol sequence comprising Q first symbol blocks. The receiver is pre-configured with a pilot sequence consisting of Q consecutive pilot symbols. Each of the Q consecutive pilot symbols is matched against one of the Q first symbol blocks. For example, the 0th pilot symbol is matched against all symbols in the 0th first symbol block, the 1st pilot symbol is matched against all symbols in the 1st first symbol block, and so on. After all matching is complete, the receiver determines the frame boundary in the first symbol sequence based on the first statistical position of the maximum number of successful matches among the Q first symbol blocks.

[0008] As can be seen, in this embodiment, Q first symbol blocks are obtained according to the number Q of pilot symbols in the pilot sequence. Each pilot symbol in the pilot sequence is matched one by one with all symbols in the corresponding first symbol block. Only after matching all symbols in the Q first symbol blocks is completed will the frame boundary be determined based on the statistical value of the matching results. Among them, the frame boundary determined based on the first statistical position of the maximum number of successful matches in the Q first symbol blocks has the highest accuracy. Therefore, the frame boundary determined by this frame synchronization method has higher accuracy, especially in scenarios with poor channel quality, where this frame synchronization method can reduce the probability of synchronization error and synchronization loss.

[0009] In some possible implementations, the first statistical position is a position used to count the number of matches between each of the Q first symbol blocks and its corresponding pilot symbol. The Q first symbol blocks include N first statistical positions. The actual positions of the N symbols in each first symbol block correspond to these N first statistical positions, and the actual positions of the N symbols corresponding to the N first statistical positions are different in different first symbol blocks. By defining N first statistical positions for each first symbol block to count the matching results, the first statistical position with the maximum number of successful matches can be found after all matches are completed, thus accurately locating the frame boundary.

[0010] In some possible implementations, if the matching result is successful, the count at the first statistical position is incremented by 1; if the matching result is unsuccessful, the count at the first statistical position remains unchanged. This statistical method can effectively find the first statistical position with the maximum number of successful matches, thereby accurately locating the frame boundary.

[0011] In some possible implementations, the frame transmitted by the transmitter includes N symbols in one polarization direction. Every M consecutive symbols in the N symbols include one pilot symbol and M-1 payload symbols, where 1 < M < N. This simplified frame structure can be applied to long-range (LR) scenarios of 800 gigabits per second (Gbps), or simply 800LR scenarios. It helps reduce data overhead and assists in frame synchronization and carrier phase recovery, simplifying algorithm complexity and improving processing performance.

[0012] In some possible implementations, the position of the (i+k×M)%Nth symbol in the kth first symbol block of Q first symbol blocks is the first statistical position Gi. Here, 0≤k≤Q-1, 0≤i≤N-1, and "%" represents the modulo operation. It can be seen that as the first symbol block shifts to the right, the actual symbol position corresponding to the first statistical position Gi in the first symbol block also shifts to the right by M symbol positions. For example, symbol block 0 shifted one symbol block to the right becomes symbol block 1. The actual symbol position corresponding to the first statistical position Gi in symbol block 1 is shifted to the right by M symbol positions compared to the actual symbol position corresponding to the first statistical position Gi in symbol block 0. It should be understood that the offset M designed here is because there is a difference of M symbol bits between every two pilot symbols in the frame. For example, if the 0th symbol in symbol block 0 matches the 0th pilot symbol successfully, then, assuming no transmission error occurs, the Mth symbol in symbol block 1 should also match the 1st pilot symbol successfully, and so on. In this way, the frame boundary determined by the first statistical position of the maximum number of successful matches can be considered the most accurate.

[0013] In some possible implementations, the position of the i-th symbol in the k-th first symbol block of the Q first symbol blocks corresponds to the position of the (i+M)%N-th symbol in the (k+1)-th first symbol block of the Q first symbol blocks, both corresponding to the same first statistical position. It should be understood that the offset M is designed here because every two pilot symbols in the frame differ by M symbol bits. For example, if the 0th symbol in symbol block 0 matches the 0th pilot symbol, then, assuming no transmission error, the M-th symbol in symbol block 1 should also match the 1st pilot symbol, and so on. In this way, the frame boundary determined by the first statistical position based on the maximum number of successful matches can be considered the most accurate.

[0014] In some possible implementations, the Q consecutive pilot symbols used for matching with the Q first symbol blocks correspond one-to-one with the Q consecutive pilot symbols in the frame. The receiver can then match the configured Q pilot symbols with the Q first symbol blocks to determine the position within each first symbol block where a successful match with the corresponding pilot symbol has occurred.

[0015] In some possible implementations, N = M × Q. That is, a frame generated by the transmitting end includes Q pilot symbols, and correspondingly, the receiving end receives a first symbol sequence including Q first symbol blocks. The receiving end is configured with Q consecutive pilot symbols, and matching the Q consecutive pilot symbols with D first symbol blocks can maximize the accuracy of frame synchronization.

[0016] In some possible implementations, M = 64, Q = 96, and N = 6144.

[0017] In some possible implementations, matching each of the Q consecutive pilot symbols with one of the Q first symbol blocks includes: matching the k-th pilot symbol among the Q consecutive pilot symbols with each symbol in the k-th first symbol block of the Q first symbol blocks, where 0 ≤ k ≤ Q-1. This matching method can traverse all symbols in the first symbol sequence, effectively ensuring the accuracy of statistical analysis of the matching results.

[0018] In some possible implementations, determining the frame boundary in the first symbol sequence based on the first statistical position of the maximum number of successful matches among the Q first symbol blocks includes: determining the frame boundary in the first symbol sequence based on the position of the symbol in the 0th first symbol block (one of the Q first symbol blocks) corresponding to the first statistical position of the maximum number of successful matches. It should be understood that, considering the position of the i-th symbol in the 0th first symbol block is the first statistical position Gi, i.e., the first statistical position Gi is the actual position of the i-th symbol, without any offset from the first statistical position Gi, determining the frame boundary based on the first statistical position of the maximum number of successful matches in the 0th first symbol block can be faster and more direct.

[0019] In some possible implementations, determining the frame boundary in the first symbol sequence based on the first statistical position of the maximum number of successful matches in the Q first symbol blocks includes: if there is only one first statistical position of the maximum number of successful matches in the Q first symbol blocks, and the maximum number of successful matches in the Q first symbol blocks is greater than a first threshold, then the frame boundary in the first symbol sequence is determined based on the first statistical position of the maximum number of successful matches in the Q first symbol blocks. Designing condition 1 above helps ensure the accuracy of the determined frame boundary.

[0020] In some possible implementations, after determining the frame boundaries in the first symbol sequence based on the first statistical position of the maximum number of successful matches in the Q first symbol blocks, the method further includes: receiving a second symbol sequence comprising W frames sent by the transmitter, the second symbol sequence being sent after the first symbol sequence; dividing the second symbol sequence into Q second symbol blocks, each of the Q second symbol blocks comprising N symbols; matching Q consecutive pilot symbols with the Q second symbol blocks respectively; and obtaining the second statistical position of the maximum number of successful matches in the Q second symbol blocks. In this implementation, the receiver may also continue to receive the second symbol sequence and other subsequent symbol sequences, and repeat the above frame synchronization operation based on the second symbol sequence to facilitate real-time monitoring for synchronization errors or synchronization loss.

[0021] In some possible implementations, after obtaining the second statistical position of the maximum number of successful matches in the Q second symbol blocks, the method further includes: if the difference between the maximum number of successful matches in the Q second symbol blocks and the maximum number of successful matches in the Q first symbol blocks is greater than a second threshold, then the boundary of the frame in the second symbol sequence is determined based on the second statistical position of the maximum number of successful matches in the Q second symbol blocks. In this implementation, if condition 2 above is satisfied, it indicates that the transmission quality of the second symbol sequence is better than that of the first symbol sequence, the success rate of pilot symbols matching symbols in the second symbol sequence is higher than that of symbols matching symbols in the first symbol sequence, and the newly determined frame boundary is more accurate than the previously determined frame boundary.

[0022] In some possible implementations, the first statistical position of the maximum number of successful matches in the Q first symbol blocks is the first statistical position Ga, the second statistical position of the maximum number of successful matches in the Q second symbol blocks is the second statistical position Gb, and the second statistical position corresponding to the first statistical position Ga among the N second statistical positions is the second statistical position Ga. After obtaining the second statistical position of the maximum number of successful matches in the Q second symbol blocks, the method further includes: if the second statistical position Ga and the second statistical position Gb are not the same statistical position, and the difference between the statistical value of the number of successful matches at the second statistical position Gb and the statistical value of the number of successful matches at the first statistical position Ga is greater than a third threshold, then the boundary of the frame in the second symbol sequence is determined based on the second statistical position of the maximum number of successful matches in the Q second symbol blocks. In this implementation, if condition 3 above is met, it indicates that the transmission quality of the second symbol sequence is better than that of the first symbol sequence, the success rate of pilot symbols matching symbols in the second symbol sequence is higher than that of symbols matching symbols in the first symbol sequence, and the newly determined frame boundary is more accurate than the previously determined frame boundary.

[0023] In some possible implementations, after obtaining the second statistical position of the maximum number of successful matches in the Q second symbol blocks, the method further includes: if the maximum number of successful matches in the Q second symbol blocks is less than a fourth threshold, then frame synchronization is re-performed. In this implementation, if condition 4 above is met, it indicates that the transmission quality of the second symbol sequence is poor, and it is considered to have been lost in synchronization, also known as synchronization lockout, and therefore frame synchronization needs to be re-performed.

[0024] Secondly, embodiments of this application provide a data processing apparatus, which includes a receiving unit and a processing unit. The receiving unit is configured to: receive a first symbol sequence comprising W frames transmitted by a transmitting end, where W is an integer greater than 1. The processing unit is configured to: divide the first symbol sequence into Q first symbol blocks, where 1 < Q ≤ W, and each of the Q first symbol blocks includes N symbols, where N is an integer greater than 1; match Q consecutive pilot symbols with the Q first symbol blocks respectively; and determine the boundaries of frames in the first symbol sequence based on the first statistical position of the maximum number of successful matches among the Q first symbol blocks.

[0025] In some possible implementations, the first statistical position is a position used to count the number of times each of the Q first symbol blocks matches the corresponding pilot symbol, where the Q first symbol blocks include N first statistical positions.

[0026] In some possible implementations, if the matching result is a successful match, the count of the first statistical position is incremented by 1; if the matching result is a failed match, the count of the first statistical position remains unchanged.

[0027] In some possible implementations, each frame includes N symbols, and each consecutive M symbols in the frame include one pilot symbol and M-1 payload symbols located at a fixed position, where 1 < M < N.

[0028] In some possible implementations, the position of the (i+k×M)%Nth symbol in the kth first symbol block of Q first symbol blocks is the first statistical position Gi, where 0≤k≤Q-1 and 0≤i≤N-1.

[0029] In some possible implementations, the position of the i-th symbol in the k-th first symbol block of the Q first symbol blocks corresponds to the position of the (i+M)%N-th symbol in the (k+1)-th first symbol block of the Q first symbol blocks, where 0≤k≤Q-1 and 0≤i≤N-1.

[0030] In some possible implementations, the Q consecutive pilot symbols used to match the Q first symbol blocks respectively correspond one-to-one with the Q consecutive pilot symbols in the frame.

[0031] In some possible implementations, N = M × Q.

[0032] In some possible implementations, M = 64, Q = 96, and N = 6144.

[0033] In some possible implementations, the processing unit is specifically used to: match the kth pilot symbol in a series of Q pilot symbols with all symbols in the kth first symbol block in a series of Q first symbol blocks, where 0 ≤ k ≤ Q-1.

[0034] In some possible implementations, the processing unit is specifically used to: determine the boundary of the frame in the first symbol sequence based on the position of the symbol corresponding to the first statistical position of the maximum number of successful matches in the 0th first symbol block of Q first symbol blocks.

[0035] In some possible implementations, the processing unit is specifically used to: if there is only one first statistical position for the maximum number of successful matches in the Q first symbol blocks, and the maximum number of successful matches in the Q first symbol blocks is greater than a first threshold, then determine the boundary of the frame in the first symbol sequence based on the first statistical position for the maximum number of successful matches in the Q first symbol blocks.

[0036] In some possible implementations, after the processing unit determines the frame boundary in the first symbol sequence based on the first statistical position of the maximum number of successful matches in the Q first symbol blocks, the receiving unit is further configured to: receive a second symbol sequence comprising W frames transmitted by the transmitting end, the second symbol sequence being transmitted after the first symbol sequence. The processing unit is further configured to: divide the second symbol sequence into Q second symbol blocks, each of the Q second symbol blocks comprising N symbols; match Q consecutive pilot symbols with the Q second symbol blocks respectively; and obtain the second statistical position of the maximum number of successful matches in the Q second symbol blocks.

[0037] In some possible implementations, after the processing unit obtains the second statistical position of the maximum number of successful matches in the Q second symbol blocks, the processing unit is further configured to: if the difference between the maximum number of successful matches in the Q second symbol blocks and the maximum number of successful matches in the Q first symbol blocks is greater than a second threshold, then determine the boundary of the frames in the first symbol sequence and the second symbol sequence based on the second statistical position of the maximum number of successful matches in the Q second symbol blocks.

[0038] In some possible implementations, the first statistical position of the maximum number of successful matches in the Q first symbol blocks is called the first statistical position Ga, the second statistical position of the maximum number of successful matches in the Q second symbol blocks is called the second statistical position Gb, and the second statistical position corresponding to the first statistical position Ga among the N second statistical positions is called the second statistical position Ga. After the processing unit obtains the second statistical position of the maximum number of successful matches in the Q second symbol blocks, the processing unit is further configured to: if the second statistical position Ga and the second statistical position Gb are not the same statistical position, and the difference between the statistical value of the number of successful matches at the second statistical position Gb and the statistical value of the number of successful matches at the first statistical position Ga is greater than a third threshold, then the boundary of the frame in the second symbol sequence is determined according to the second statistical position of the maximum number of successful matches in the Q second symbol blocks.

[0039] In some possible implementations, after the processing unit obtains the second statistical position of the maximum number of successful matches in the Q second symbol blocks, the processing unit is further configured to: if the maximum number of successful matches in the Q second symbol blocks is less than a fourth threshold, then re-synchronize the frame.

[0040] Thirdly, embodiments of this application provide a chip for performing the method as described in any of the embodiments of the first aspect.

[0041] Fourthly, embodiments of this application provide an optical module, which includes a control circuit and an interface circuit. The interface circuit is used for transmitting and receiving signals, and the control circuit is used for performing the methods described in any embodiment of the first aspect. For example, the interface circuit is used to transmit signals from the control circuit or to transmit received signals to the control circuit.

[0042] Fifthly, embodiments of this application provide a receiving device. The receiving device includes a host and an optical module as described in the fourth aspect, the optical module being used to convert received optical signals into electrical signals and transmit the electrical signals to the host.

[0043] In a sixth aspect, embodiments of this application provide a communication system, which includes a transmitting device and a receiving device as described in the fifth aspect, wherein the transmitting device is used to transmit an optical signal to the receiving device.

[0044] In a seventh aspect, this application provides a computer-readable storage medium storing instructions that, when executed by a computer, cause the method described in any embodiment of the first aspect to be implemented.

[0045] Eighthly, this application provides a computer program product including program instructions that, when executed, implement the method described in any of the embodiments of the first aspect.

[0046] In this embodiment, the frame transmitted by the transmitting end includes N symbols in one polarization direction. Each consecutive M symbols in the N symbols includes one pilot symbol and M-1 payload symbols, where N = M × Q. The first symbol sequence, comprising W frames, transmitted by the transmitting end reaches the receiving end through the channel. Due to noise, clock drift, or other impairments in the channel, the data received by the receiving end is not aligned with the data transmitted by the transmitting end. It should be understood that the receiving end does not know the frame boundaries before performing frame synchronization on the received data; that is, the receiving end does not know the position of the pilot symbols in the first symbol sequence. Specifically, the receiving end performs frame synchronization at a granularity of a first symbol sequence comprising Q first symbol blocks, where each first symbol block includes N symbols. The receiver is pre-configured with a pilot sequence consisting of Q consecutive pilot symbols. Each of the Q consecutive pilot symbols is matched against one of the Q first symbol blocks. For example, the 0th pilot symbol is matched against all symbols in the 0th first symbol block, the 1st pilot symbol is matched against all symbols in the 1st first symbol block, and so on. After all matching is complete, the receiver determines the frame boundary in the first symbol sequence based on the first statistical position with the maximum number of successful matches among the Q first symbol blocks. The first statistical position is used to count the number of matches between each of the Q first symbol blocks and its corresponding pilot symbol. The Q first symbol blocks contain Q × N symbols, but only N first statistical positions. That is, each of the N symbols in a first symbol block corresponds to one of N first statistical positions. For two adjacent first symbol blocks, the symbol position corresponding to the same first statistical position in the previous first symbol block is offset by M symbol bits from the symbol position in the next first symbol block. As can be seen, in this embodiment, Q first symbol blocks are obtained according to the number Q of pilot symbols in the pilot sequence. Each pilot symbol in the pilot sequence is matched one by one with all symbols in the corresponding first symbol block. Only after matching all symbols in the Q first symbol blocks is completed will the frame boundary be determined based on the statistical value of the matching results. Among them, the frame boundary determined based on the first statistical position of the maximum number of successful matches in the Q first symbol blocks has the highest accuracy. Therefore, the frame boundary determined by this frame synchronization method has higher accuracy, especially in scenarios with poor channel quality, where this frame synchronization method can reduce the probability of synchronization error and synchronization loss. Attached Figure Description

[0047] Figure 1 is a schematic diagram of a communication system applied in an embodiment of this application;

[0048] Figure 2 is a schematic diagram of one implementation of the sending DSP processor in an embodiment of this application;

[0049] Figure 3 is a schematic diagram of another implementation of the starting DSP processor in the embodiments of this application;

[0050] Figure 4 is a schematic diagram of a data processing process performed by the sending end and the receiving end in an embodiment of this application.

[0051] Figure 5 is a schematic diagram of a data transmission method in an embodiment of this application;

[0052] Figure 6 is a schematic diagram of the structure of a frame in an embodiment of this application;

[0053] Figure 7 is a schematic diagram of symbols on a constellation diagram according to an embodiment of this application;

[0054] Figure 8 is a schematic diagram of a frame synchronization method using an oDSP chip in an embodiment of this application;

[0055] Figure 9 is a flowchart illustrating a frame synchronization method in an embodiment of this application.

[0056] Figure 10 is a schematic diagram of a first symbol sequence including Q first symbol blocks in an embodiment of this application;

[0057] Figure 11 is a schematic diagram of the first statistical position in the first symbol block in an embodiment of this application;

[0058] Figure 12 is a schematic diagram of the frame synchronization process in an application scenario according to an embodiment of this application;

[0059] Figure 13 is a schematic diagram of a data processing device in an embodiment of this application;

[0060] Figure 14 is a schematic diagram of a structure of an optical module in an embodiment of this application;

[0061] Figure 15 is a schematic diagram of a receiving device in an embodiment of this application. Detailed Implementation

[0062] This application provides a frame synchronization method, apparatus, and system. The frame boundary determined by this frame synchronization method is more accurate, especially in scenarios with poor channel quality. This frame synchronization method can reduce the probability of synchronization error and synchronization loss.

[0063] Figure 1 is a schematic diagram of a communication system applied in an embodiment of this application. As shown in Figure 1, at the transmitting end, the source provides a data stream to be transmitted. A forward error correction (FEC) encoder receives the data stream and performs FEC encoding on it; the codeword information obtained by FEC encoding (including parity bits and information bits) is sent to the transmitting end digital signal processor (DSP) for framing, and then transmitted through the channel to the receiving end. After receiving the distorted signal caused by noise or other impairments in the channel, the receiving end sends it to the receiving end DSP processor for dispersion compensation, synchronization, phase recovery, and other operations, and then decodes it through the FEC decoder to recover the original data and send it to the destination. The above-mentioned framing can also be called DSP framing.

[0064] Figure 2 is a schematic diagram of one implementation of the transmitting DSP processor in this application embodiment. As shown in Figure 2, in one possible implementation, the transmitting DSP processor performs symbol mapping on the received data sequence. Typically, the received data sequence includes information obtained through FEC encoding and a check sequence. Dual-polarization symbol mapping includes symbol mapping and polarization distribution. The symbol mapping methods include, but are not limited to, Quadrature Phase Shift Keying (QPSK) and Quadrature Amplitude Modulation (QAM). Typically, QAM modulation (also known as symbol mapping) involves symbol mapping multiple input bits to obtain multiple QAM symbols, and polarization distribution of the multiple QAM symbols to obtain multiple dual-polarization (DP) symbols, i.e., DP-QAM symbols, such as DP-16QAM, DP-32QAM, and DP-64QAM. For ease of explanation, the two polarization directions will be uniformly referred to as the X-polarization direction and the Y-polarization direction, respectively, wherein the X-polarization direction and the Y-polarization direction are orthogonal to each other. It should be understood that the X-polarization direction and the Y-polarization direction are not two specified polarization directions, but rather two arbitrarily orthogonal polarization directions. Furthermore, the transmitting DSP processor performs framing processing on a certain number of dual-polarization symbols as follows: specifically, it obtains a pre-framing dual-polarization symbol sequence containing multiple dual-polarization symbols, and inserts multiple pilot symbols in both the X-polarization and Y-polarization directions to obtain a post-framing dual-polarization symbol sequence. The sequence containing multiple pilot symbols is also called a pilot symbol sequence or pilot sequence. In some specific applications, the post-framing dual-polarization symbol sequence is called a frame or a DSP frame. For ease of explanation, this application embodiment uniformly refers to the post-framing dual-polarization symbol sequence as a frame.

[0065] It should be understood that a dual-polarization symbol can be represented by two symbols, one located in the X-polarization direction and the other in the Y-polarization direction. Each symbol can be represented by a complex number. For example, a symbol obtained using 16QAM modulation can be represented by any one of the following 16 complex numbers: ±1±1j, ±1±3j, ±3±1j, and ±3±3j, where ± indicates a positive or negative value, such as ±3 representing 3 or -3. Here, j represents the imaginary unit. In some scenarios, the imaginary unit may also be represented by other symbols such as i, which is not limited here. In the embodiments of this application, the imaginary unit is uniformly represented by j. In some specific applications, the real and imaginary parts may be normalized, but the essence remains unchanged.

[0066] It should be noted that a sequence containing L dual-polarization symbols can be represented by two complex sequences of length L, where one sequence represents the symbol in the X-polarization direction and the other represents the symbol in the Y-polarization direction. Each complex sequence of length L consists of a sequence of length L's real part (also called the I-path sequence) and a sequence of length L's imaginary part (also called the Q-path sequence), where L is an integer greater than 1. Therefore, there are four different types of sequences: X-polarization direction I-path (in-phase component) sequence, X-polarization direction Q-path (quadrature-phase component) sequence, Y-polarization direction I-path sequence, and Y-polarization direction Q-path sequence. The X-polarization direction I-path sequence is also called X... I The component, the Q-path sequence in the X polarization direction, is also called X. Q The component, the Y-polarization direction I-path sequence, is also called the Y component. I The component, the Q-path sequence in the Y-polarization direction, is also called the Y-axis. Q Quantity.

[0067] It should be noted that after dual-polarization symbol mapping and framing operations, a dual-polarization symbol data stream to be transmitted is obtained. This stream can be represented by two symbol data streams: the first is the symbol data stream in the X-polarization direction, and the second is the symbol data stream in the Y-polarization direction. Alternatively, a dual-polarization symbol data stream can also be represented by four data streams, where the first is the data stream corresponding to the I-path component in the X-polarization direction (referred to as X...). I The second data stream is the data stream of the Q-path component in the X-polarization direction corresponding to the dual-polarization symbol stream (abbreviated as X). Q The third data stream is the data stream of the I-path component in the Y-polarization direction corresponding to the dual-polarization symbol stream (abbreviated as Y). I The fourth data stream is the data stream of the Q-path component in the Y-polarization direction corresponding to the dual-polarization symbol stream (abbreviated as Y). Q(Data flow).

[0068] It should be understood that in the dual-polarization symbol mapping and framing operations shown in Figure 2, framing (also known as DSP framing) is performed after dual-polarization symbol mapping; that is, framing is performed on the symbol level. Below is a schematic diagram of another possible implementation of the originating DSP processor, where framing is performed before dual-polarization symbol mapping; that is, framing is performed on the bit level.

[0069] Figure 3 is a schematic diagram of another implementation of the transmitting DSP processor in this application. As shown in Figure 3, framing is performed before dual-polarization symbol mapping. Specifically, a pre-framing bit sequence containing multiple bits is obtained, a target bit sequence is inserted, and dual-polarization symbol mapping is performed to obtain a post-framing dual-polarization symbol sequence. The target bit sequence is then mapped using dual-polarization symbol mapping to obtain a pilot symbol sequence; the target bit sequence is also called the bits corresponding to the pilot sequence. It should be understood that the post-framing dual-polarization symbol sequence obtained using the implementation shown in Figure 3 is the same as the post-framing dual-polarization symbol sequence obtained using the implementation shown in Figure 2.

[0070] It should be noted that this application does not limit the specific framing method adopted by the sending DSP processor. In addition to the framing methods described in Figures 2 and 3 above, other similar framing methods are also applicable to this scheme, and will not be described one by one here.

[0071] Figure 4 is a schematic diagram illustrating a data processing process performed separately by the transmitting and receiving ends in an embodiment of this application. At the transmitting end, the Physical Medium Attachment (PMA) sublayer processes the data from the client lane to obtain a Physical Coding Sublayer (PCS) or FEC channel data stream. The channel data stream undergoes alignment locking and lane deskewing to obtain an aligned channel data stream. Then, based on the alignment marker, the channel data stream is reordered to ensure it is arranged in a specified order. After reordering, the channel data stream undergoes permutation to obtain multiple data streams. Each data stream then undergoes convolutional interleaving, Bose-Chaudhuri-Hocquenghem (BCH) encoding, and circular shift. Finally, the multiple data streams are BCH interleaved and pilot symbols are inserted. Insertion) is performed, followed by DP-16QAM mapping to obtain a dual-polarization symbol sequence; the dual-polarization symbol sequence undergoes digital-to-analog conversion (DAC) to obtain four analog signals, which are then transmitted to the Physical Medium Dependent (PMD) sublayer. The four analog signals correspond to X respectively. I Data stream, X Q Data stream, Y I Data stream, Y QData Streams. At the receiving end, the four analog signals from the PMD sublayer are converted into four digital signals by Analog-to-Digital Conversion (ADC). After receiving signal processing, the four digital signals are processed to obtain a dual-polarization symbol sequence. The dual-polarization symbol sequence is then subjected to DP-16QAM demapping, frame synchronization, pilot removal, and BCH deinterleaving to obtain multiple data streams. Each data stream is then processed by inverse circular shift, BCH decoder, and convolutional deinterleaving to obtain a channel data stream. The channel data stream is then transmitted to the PAM sublayer after inverse permutation.

[0072] Figure 5 is a schematic diagram of a data transmission method according to an embodiment of this application. As shown in Figure 5, the data transmission method includes the following steps.

[0073] 101. The sending end generates a frame.

[0074] It should be noted that this application does not limit the specific implementation method of frame generation. For example, the dual-polarization symbol mapping and framing method described in Figure 2 or Figure 3 above can be used. Of course, other similar dual-polarization symbol mapping and framing methods are also applicable to this scheme, and will not be described one by one here. It should be understood that a frame includes symbols in two polarization directions. The structure of the frame is similar in both polarization directions. For example, a frame includes N symbols in the X polarization direction and N symbols in the Y polarization direction. The structure of the frame will be described below using one polarization direction as an example.

[0075] Figure 6 is a schematic diagram of the structure of a frame in an embodiment of this application. As shown in Figure 6, a frame (also called a DSP frame) in one polarization direction includes N symbols. Every M consecutive symbols in the N symbols include one pilot symbol and M-1 payload symbols located at a fixed position, where N = M × D, D is an even number, and M is an integer greater than 1. It should be understood that every M consecutive symbols in the N symbols can be regarded as a group, and the N symbols include D groups of symbols in total. For example, N = 6144, M = 64, D = 96, symbols 1-64 are the first group of 64 consecutive symbols, symbols 65-128 are the second group of 64 consecutive symbols, ..., symbols 6081-6144 are the 96th group of 64 consecutive symbols. That is, in a frame consisting of N = 6144 dual-polarization symbols, starting from the beginning, the first dual-polarization symbol in every M = 64 dual-polarization symbols is a pilot symbol, containing a total of D = 96 dual-polarization pilot symbols. It should be understood that the payload symbol, also known as the pre-framing symbol, includes FEC-encoded information and check bits, which are then symbolized through symbol mapping to obtain the symbol (called the information symbol and check symbol). At the receiver, pilot symbols can be used to assist in frame synchronization and carrier phase recovery, etc. It should be understood that this application does not limit the specific position of the pilot symbols in each group of M symbols. As an example, each pilot symbol is located at the beginning of its consecutive M symbols; for example, the first symbol in the frame shown in Figure 6 is the first pilot symbol. It can be seen that there is an interval of M-1 symbols between every two pilot symbols in the frame, or in other words, there is a difference of M symbol bits between every two pilot symbols in the frame.

[0076] The simplified frame structure shown in Figure 6 above can be applied to long-range (LR) scenarios with speeds of 800 gigabits per second (Gbps), referred to as the 800LR scenario. This simplified frame structure includes only pilot symbols and payload symbols. The main purpose of setting up the simplified frame structure is to reduce data overhead and assist in frame synchronization and carrier phase recovery, thereby simplifying algorithm complexity and improving processing performance.

[0077] It should be noted that the D pilot symbols in a frame are generated by a polynomial and a seed. Each pilot symbol can take the value of -A-Aj, -A+Aj, A-Aj, or A+Aj, where A is a real number and j represents the imaginary unit. In some practical applications, -A-Aj, -A+Aj, A-Aj, and A+Aj are symbols on the constellation diagram of the modulation format used. For example, using QPSK, there are only four symbols, in which case A = ±1, and each pilot symbol can be represented by one of -1-1j, -1+1j, 1-1j, and 1+1j. All four complex-number representations of the frame symbols will exist in a single frame. Using 16QAM, there are 16 symbols on the constellation diagram, in which case A = ±1 or ±3.

[0078] Figure 7 is a schematic diagram of symbols on a constellation diagram according to an embodiment of this application. As shown in Figure 7, when A = 3 or -3, each pilot symbol can be represented by one of -3-3j, -3+3j, 3-3j, and 3+3j, as shown by the hollow symbol in Figure 7. Similarly, when using 64QAM, A = ±1, ±3, ±5, or ±7. It should be noted that higher-order modulation formats can also be used, which will not be elaborated upon in this application. In actual transmission, using the four outermost symbols on the constellation diagram for pilot symbols can reduce the probability of symbol errors.

[0079] 102. The sending end sends a sequence of symbols, including multiple frames, to the receiving end.

[0080] The symbol sequence of multiple frames sent by the transmitter will be transmitted to the receiver via the channel. In some possible scenarios, the dual-polarization symbols in the frame will be converted from digital to analog (DAC) to obtain four analog signals, corresponding to the I component signal in the X-polarization direction, the Q component signal in the X-polarization direction, the I component signal in the Y-polarization direction, and the Q component signal in the Y-polarization direction, respectively, and then transmitted to the receiver through optical fiber.

[0081] 103. The receiving end performs frame synchronization on the symbol sequence.

[0082] It should be understood that the receiving end receives a sequence of symbols transmitted through the channel, which can be understood as a distorted signal affected by noise or other impairments in the channel. In other words, the symbol sequence received by the receiving end differs from the symbol sequence transmitted by the transmitting end. For example, the symbol sequence received by the receiving end is not aligned with the symbol sequence transmitted by the transmitting end. The receiving end needs to perform frame synchronization based on the pilot symbols. This "frame synchronization" process can also be called the "synchronization locking" process. That is, the receiving end needs to determine the frame boundaries from the received symbol sequence based on the pilot symbols. The "frame boundaries" can also be called the "frame start position," "synchronization bit," or "synchronization lock bit," etc.

[0083] The following describes the frame synchronization process performed by the receiving end in the embodiments of this application.

[0084] It should be understood that this frame synchronization method is applied at the receiving end, for example, it can be implemented by the receiving end DSP processor shown in Figure 1. Alternatively, the receiving end can be an optical module, and this frame synchronization method is applied to the optical digital signal processor (oDSP) chip within the optical module. For example, frame synchronization can be implemented at the location marked by the dashed box in the oDSP chip shown in Figure 4.

[0085] Figure 8 is a schematic diagram illustrating a frame synchronization implementation using an oDSP chip in an embodiment of this application. As shown in Figure 8, the electrical signal obtained by photoelectric conversion of the optical signal is input to the Clock and Data Recovery (CDR) module in the oDSP chip. The CDR module is responsible for recovering data and clock from the input signal. The symbol cache module is used to read the symbol sequence in the data and does not affect the normal transmission of data to the synchronizer module. The sequence identifier module matches the symbol sequence with a pilot sequence according to the method provided in the embodiment of this application to determine the frame boundaries in the symbol sequence. The synchronization module recovers the frame from the received data based on the frame boundaries determined by the sequence identifier module.

[0086] Figure 9 is a schematic flowchart of a frame synchronization method in an embodiment of this application. As shown in Figure 9, the frame synchronization method includes the following steps.

[0087] 201. Receive the first symbol sequence.

[0088] Specifically, the receiving end receives the first symbol sequence consisting of W frames sent by the sending end, where W is an integer greater than 1.

[0089] 202. Divide the first symbol sequence into Q first symbol blocks.

[0090] Figure 10 is a schematic diagram of a first symbol sequence including Q first symbol blocks in an embodiment of this application. As shown in Figure 10, the first symbol sequence includes symbol block 0, symbol block 1, ..., symbol block Q-1, for a total of Q first symbol blocks. Each first symbol block includes N symbols, where N is an integer greater than 1, meaning the first symbol sequence includes N×Q symbols in total. Furthermore, a frame generated by the transmitting end also includes N symbols. The first symbol block structure is similar to the frame structure, with each M consecutive symbols forming a group. The first symbol block includes a total of D groups of symbols, where N = M×D. In other words, assuming no data transmission errors, similar to the frame structure, each first symbol block also includes D pilot symbols, with an interval of M-1 symbols between every two pilot symbols in the first symbol block. The difference lies in the fact that before frame synchronization is completed, the receiving end does not know the specific positions of each pilot symbol in the first symbol block.

[0091] In one possible scenario, the first symbol sequence received by the receiver is perfectly aligned with the first symbol sequence sent by the transmitter, in which case Q = W. In another possible scenario, the first symbol sequence received by the receiver is not aligned with the first symbol sequence sent by the transmitter. In this case, the receiver divides the first symbol sequence into Q = W-1 first symbol blocks. For example, symbol block 0 includes a portion of the symbols from frame 0 and a portion of the symbols from frame 1; symbol block 1 includes another portion of the symbols from frame 1 and a portion of the symbols from frame 2; ..., symbol block Q-1 includes a portion of the symbols from frame W-2 and a portion of the symbols from frame W-1. Therefore, 1 < Q ≤ W.

[0092] 203. Match the Q consecutive pilot symbols with the Q first symbol blocks respectively.

[0093] In this embodiment, the receiving end can pre-configure Q consecutive pilot symbols for matching. For example, the receiving end can generate pilot symbols based on a polynomial and a seed, similar to the transmitting end. That is, the Q consecutive pilot symbols generated by the receiving end correspond one-to-one with the Q consecutive pilot symbols in one frame generated by the transmitting end. The receiving end can then match the configured Q pilot symbols with Q first symbol blocks to determine the position in each first symbol block where a successful match with the corresponding pilot symbol is achieved. It should be understood that this application does not limit the specific value of each of the Q pilot symbols.

[0094] Specifically, the receiving end matches the k-th pilot symbol in a sequence of Q consecutive pilot symbols with each symbol in the k-th first symbol of a sequence of Q first symbol blocks, where 0 ≤ k ≤ Q-1. That is, each pilot symbol is matched one by one with all N symbols in its corresponding first symbol block. If a symbol in the first symbol block has the same value as a pilot symbol, the match is considered successful; otherwise, it is considered a failure. In this way, all N×Q symbols in the Q first symbol blocks are matched with their corresponding pilot symbols, completing the traversal of the Q first symbol blocks.

[0095] It should be understood that, considering that a frame generated by the transmitting end includes D pilot symbols, Q should be set to D to improve the accuracy of frame synchronization. That is, the receiving end acquires a first symbol sequence comprising D first symbol blocks, and the receiving end is configured with D consecutive pilot symbols. These D consecutive pilot symbols are then matched with the D first symbol blocks respectively. This application does not limit the specific value of Q, where Q ≤ D. The specific value of Q depends on the actual application. To maximize the accuracy of frame synchronization, Q = D; to improve the efficiency of frame synchronization while ensuring sufficient accuracy, Q < D can be used. However, if the value of Q is too small, it is difficult to guarantee the accuracy of frame synchronization. It should be understood that in the scenario where Q < D, any number of consecutive Q pilot symbols can be used. Typically, consecutive Q pilot symbols are taken starting from the 0th pilot symbol to facilitate faster determination of frame boundaries.

[0096] 204. Determine the frame boundaries in the first symbol sequence based on the first statistical position of the maximum number of successful matches in the Q first symbol blocks.

[0097] It should be noted that after all N×Q symbols in the Q first symbol blocks have been matched with their corresponding pilot symbols, the receiving end will statistically analyze the matching results. To facilitate this statistical analysis, this embodiment defines a first statistical position for each first symbol block. The first statistical position is used to count the number of times each of the Q first symbol blocks matches with its corresponding pilot symbol. Specifically, the actual positions of the N symbols in each first symbol block correspond to N first statistical positions, and the actual positions of the N symbols corresponding to the N first statistical positions are different in different first symbol blocks. That is, although the Q first symbol blocks contain N×Q actual positions, only N first statistical positions need to be defined. After the N symbols in each first symbol block are matched, the matching results will be counted at the corresponding N first statistical positions. For example, if the matching result is successful, the count at the corresponding first statistical position is incremented by 1; if the matching result is unsuccessful, the count at the corresponding first statistical position remains unchanged, i.e., incremented by 0. Finally, after traversing the Q first symbol blocks, the first statistical position corresponding to the maximum value of the statistical values ​​of the N first statistical positions can be selected. This first statistical position is the first statistical position of the maximum number of successful matches among the Q first symbol blocks, and the frame boundary determined by this first statistical position has the highest accuracy. The first statistical position defined in the embodiments of this application will be described in detail below with a specific example.

[0098] Figure 11 is a schematic diagram of the first statistical position in the first symbol block in an embodiment of this application. As shown in Figure 11, the first statistical position is denoted as Gi, 0≤i≤N-1, and the N first statistical positions are denoted as G0, G1, G2, ..., GN-1. Specifically, the position of the (i+k×M)%Nth symbol in the kth first symbol block of the Q first symbol blocks is the first statistical position Gi, 0≤k≤Q-1. Here, "%" represents the modulo operation, for example, 8%3=2, 2%3=2. In the scenario where Q=D, taking the first statistical position G0 in Figure 11 as an example, in symbol block 0, the position of the 0th symbol is the first statistical position G0; in symbol block 1, the position of the Mth symbol is the first statistical position G0; ..., and so on, in symbol block Q-1, the position of the N-1-Mth symbol is the first statistical position G0. Similarly, this also applies to other first statistical positions Gi besides the first statistical position G0.

[0099] It can be seen that as the first symbol block shifts to the right, the actual symbol position corresponding to the first statistical position Gi in the first symbol block also shifts to the right by M symbol positions. For example, symbol block 0 shifted one symbol block to the right becomes symbol block 1. The actual symbol position corresponding to the first statistical position Gi in symbol block 1 is shifted to the right by M symbol positions compared to the actual symbol position corresponding to the first statistical position Gi in symbol block 0. In other words, the position of the i-th symbol in the k-th first symbol block corresponds to the same first statistical position as the position of the (i+M)%N-th symbol in the (k+1)-th first symbol block.

[0100] It should be noted that the offset M designed here is because there is a difference of M symbol bits between every two pilot symbols in the frame. In the scenario where Q=D, for example, if the 0th symbol in symbol block 0 matches the 0th pilot symbol, then, assuming no transmission error occurs, the Mth symbol in symbol block 1 should also match the 1st pilot symbol, and so on. Similarly, the N-1-Mth symbol in symbol block Q-1 should also match the Q-1th pilot symbol. Therefore, ideally, the statistical value of the first statistical position G0 will accumulate to Q, and the first statistical position G0 is naturally the first statistical position with the largest statistical value among the N first statistical positions. Of course, in the case of a transmission error, although the statistical value of the first statistical position G0 may not accumulate to Q, if the statistical value of the first statistical position G0 is still the largest, then the frame boundary determined based on the first statistical position G0 will still be the most accurate. It should be understood that this explanation is based on the example where the statistical value of the first statistical position G0 is the largest. In specific scenarios, the frame boundary should be determined based on the first statistical position Gi with the largest actual statistical value.

[0101] It should be noted that, considering the location of the i-th symbol in symbol block 0 is the first statistical position Gi, meaning the first statistical position Gi is the actual location of the i-th symbol, there is no offset of the first statistical position Gi. For scenarios where Q consecutive pilot symbols are taken starting from the 0th pilot symbol, the first statistical position Gi with the largest statistical value selected from the N first statistical positions corresponds to the frame boundary in symbol block 0, which is the location of the 0th pilot symbol in the frame. For scenarios where Q consecutive pilot symbols are not taken starting from the 0th pilot symbol, such as starting from the 1st pilot symbol, the first statistical position Gi with the largest statistical value selected from the N first statistical positions is first determined to correspond to the symbol location in symbol block 0, which is the location of the 1st pilot symbol in the frame; then the location of the 0th pilot symbol in the frame is calculated, which is the frame boundary in the first symbol sequence.

[0102] In one possible implementation, the frame boundary determined based on the first statistical position of the maximum number of successful matches is considered accurate only if condition 1 is met. For example, condition 1 is that there is only one first statistical position of the maximum number of successful matches among the Q first symbol blocks, and the maximum number of successful matches among the Q first symbol blocks is greater than a first threshold. That is, if there are multiple first statistical positions of the maximum number of successful matches among the Q first symbol blocks, then the above steps 201-204 are repeated until the first statistical position of the maximum number of successful matches among the Q first symbol blocks is unique. Alternatively, if the maximum number of successful matches among the Q first symbol blocks is less than or equal to the first threshold, the above steps 201-204 are also repeated until the maximum number of successful matches among the Q first symbol blocks is greater than the first threshold. It should be understood that this application does not limit the specific value of the first threshold. Taking M=64, N=6144, Q=D=96 as an example, the first threshold can be 50.

[0103] It should be noted that after frame synchronization is completed by performing steps 201-204 above, the receiving end can continue to receive subsequent symbol sequences, such as the second symbol sequence, and repeat steps 201-204 based on the newly received symbol sequences. There are two main considerations for doing this. Taking the receiving end performing steps 201-204 based on the second symbol sequence as an example, the receiving end divides the second symbol sequence into Q second symbol blocks, each containing N symbols; then, it matches the Q consecutive pilot symbols with the Q second symbol blocks; and finally, it obtains the second statistical position with the maximum number of successful matches among the Q second symbol blocks.

[0104] In the first possible scenario, if the difference between the maximum number of successful matches in the Q second symbol blocks and the maximum number of successful matches in the Q first symbol blocks is greater than the second threshold, i.e., condition 2 is satisfied, it indicates that the transmission quality of the second symbol sequence is better than that of the first symbol sequence, and the success rate of pilot symbols matching symbols in the second symbol sequence is higher than that of symbols matching symbols in the first symbol sequence. Therefore, the receiver can determine the frame boundary based on the second statistical position of the maximum number of successful matches in the Q second symbol blocks. The newly determined frame boundary is more accurate than the previously determined frame boundary. It should be understood that this application does not limit the specific value of the second threshold. Taking M=64, N=6144, Q=D=96 as an example, the second threshold can be 10.

[0105] In the second possible scenario, the first statistical position with the maximum number of successful matches in the Q first symbol blocks is denoted as the first statistical position Ga, the second statistical position with the maximum number of successful matches in the Q second symbol blocks is denoted as the second statistical position Gb, and the second statistical position corresponding to the first statistical position Ga among the N second statistical positions is denoted as the second statistical position Ga. If the second statistical position Ga and the second statistical position Gb are not the same statistical position, and the difference between the statistical value of the number of successful matches at the second statistical position Gb and the statistical value of the number of successful matches at the first statistical position Ga is greater than the third threshold, i.e., condition 3 is satisfied, it indicates that the transmission quality of the second symbol sequence is better than that of the first symbol sequence, and the success rate of pilot symbols matching symbols in the second symbol sequence is higher than that of symbols matching symbols in the first symbol sequence. Therefore, the receiver can determine the frame boundary based on the second statistical position with the maximum number of successful matches in the Q second symbol blocks. The newly determined frame boundary is more accurate than the previously determined frame boundary. It should be understood that this application does not limit the specific value of the third threshold. Taking M=64, N=6144, Q=D=96 as an example, the third threshold can be 10. For example, in the first round of statistics, the statistical value of the first statistical position Ga is the largest, and the statistical value of the first statistical position Ga is 70; in the second round of statistics, the statistical value of the second statistical position Gb is the largest, and the statistical value of the second statistical position Gb is 75. The statistical value of the second statistical position Ga corresponding to the first statistical position Ga is 60. If the difference between the statistical value of the second statistical position Gb and the statistical value of the second statistical position Ga is greater than the third threshold, then the new frame boundary can be determined based on the second statistical position Gb.

[0106] In the third possible scenario, if the maximum number of successful matches among the Q second symbol blocks is less than the fourth threshold, i.e., condition 4 is met, it indicates that the transmission quality of the second symbol sequence is poor, and it is considered to have been lost in synchronization, also known as synchronization lockout. Therefore, frame synchronization needs to be re-performed. For example, the receiving end continues to receive the third symbol sequence and repeats steps 201-204 based on the third symbol sequence to redetermine the frame boundary. It should be understood that this application does not limit the specific value of the fourth threshold. Taking M=64, N=6144, Q=D=96 as an example, the fourth threshold can be 30.

[0107] The frame synchronization method provided in this application embodiment will be described below using a scenario where M=64, N=6144, and Q=D=96 as an example. Figure 12 is a schematic flowchart of frame synchronization in an application scenario of this application embodiment. As shown in Figure 12, the frame synchronization method includes the following process.

[0108] Step 1: The receiver obtains 96 symbol blocks, totaling 96 × 6144 = 589824 symbols, from the received data. Here, k represents the sequence number of the symbol block and the pilot symbol, 0 ≤ k ≤ 95; i represents the sequence number of a symbol within a single symbol block, 0 ≤ i ≤ 6143; n represents the sequence number of a symbol among the 589824 symbols, 0 ≤ n ≤ 589823; initially, k = 0, n = 0, and i = 0.

[0109] Step 2: Starting from k=0, match pilot symbol 0 with all symbols in symbol block 0 one by one; then, proceed with k+1, matching pilot symbol k+1 with all symbols in symbol block k+1 one by one; and so on, until the above operation is completed when k=95.

[0110] The specific matching process between pilot symbol k and symbol block k is as follows:

[0111] Execution begins at i=0. The pilot symbol is matched against the i-th symbol in the corresponding symbol block. If a match is successful, the statistical value at the corresponding Gi position is incremented by 1; otherwise, the statistical value remains unchanged. Here, Gi is the position of the (i+k×M)%N-th symbol in the symbol block. Then, execution continues at i+1, matching the pilot symbol against the (i+1)-th symbol in the corresponding symbol block. If a match is successful, the statistical value at the corresponding Gi+1 position is incremented by 1; otherwise, the statistical value is changed. This process continues until the operation at i=6143 is completed.

[0112] Step 3: Determine the Gi position with the largest statistical value. If the Gi position with the largest statistical value satisfies condition 1, then determine the frame boundary based on the Gi position with the largest statistical value to complete frame synchronization. Conversely, if the Gi position with the largest statistical value does not satisfy condition 1, then repeat steps 1-3. Condition 1 is: there is only one Gi position with the largest statistical value, and the statistical value of the Gi position with the largest statistical value is greater than the first threshold. It should be understood that after completing the first round of operations in steps 1-3, 96 × 6144 = 589824 symbols can be acquired again and steps 1-3 can be repeated to complete the second round of operations.

[0113] As an example, if the Gi position with the largest statistical value determined in the second round of operations satisfies condition 2, then a new frame boundary is determined based on the Gi position with the largest statistical value determined in the second round of operations to complete frame synchronization. Condition 2 is: the difference between the statistical value of the Gi position with the largest statistical value determined in the second round of operations and the statistical value of the Gi position with the largest statistical value determined in the first round of operations is greater than a second threshold.

[0114] As another example, if the Gi position with the largest statistical value determined in the second round of operations satisfies condition 3, then synchronization is determined to be lost. It is necessary to reacquire 96 × 6144 = 589824 symbols and repeat steps 1-3 above to resynchronize the frame. Condition 3 is: the statistical value of the Gi position with the largest statistical value is less than the third threshold.

[0115] Figure 13 is a schematic diagram of a data processing device in an embodiment of this application. This data processing device is applied to a receiving end. As shown in Figure 13, the data processing device includes a receiving unit 301 and a processing unit 302. Specifically, the receiving unit 301 is used to perform the operation of step 201 described above, and the processing unit 302 is used to perform the operations of steps 202-204 described above. It should be understood that the data processing device provided in this embodiment can also be implemented in other ways. For example, the unit division in the above data processing device is only a logical functional division; in actual implementation, there can be other division methods. For example, multiple units or components can be combined or integrated into another system. Furthermore, the functional units in various embodiments of this application can be integrated into one processing unit, or they can be independent physical units, or two or more functional units can be integrated into one processing unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0116] Figure 14 is a schematic diagram of an optical module in an embodiment of this application. As shown in Figure 14, the optical module includes a control circuit 401 and an interface circuit 402. It should be understood that the interface circuit 402 can be a transceiver or an input / output interface. The interface circuit 402 is used to receive signals from other devices outside the optical module and transmit them to the control circuit 401, or to send signals from the control circuit 401 to other devices outside the optical module. In one possible implementation, the interface circuit 402 is used to perform the operation of step 201 described above, and the control circuit 401 is used to perform the operations of steps 202-204 described above. Optionally, the optical module may also include a memory 403, wherein the memory 403 is used to store program instructions and data.

[0117] Figure 15 is a schematic diagram of a receiving device in an embodiment of this application. As shown in Figure 15, the receiving device includes a host 501 and an optical module 502. The optical module 502 is used to convert the received optical signal into an electrical signal and send the electrical signal to the host 501. For example, the host 501 may specifically be a switch, router, or server. The receiving device can be a communication device including a host 501 and an optical module 502. It should also be understood that the receiving device in the embodiments of this application is named based on the data flow direction and does not limit the function of the device. For example, the receiving device may also have a transmitting function.

[0118] This application also provides a chip. This chip integrates circuitry for implementing the functions of the control circuit 401 described above, and one or more interfaces. As an example, the chip integrates a memory. As another example, when the chip does not integrate a memory, it can be connected to an external memory via the interface. This chip can perform the method steps of any one or more of the foregoing embodiments. Alternatively, the chip can implement the actions performed by the data processing device in the foregoing embodiments based on program code stored in the memory.

[0119] As an example, the chip in the embodiments of this application can be a central processing unit (CPU), or other general-purpose processors, DSP processors, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. A general-purpose processor can be a microprocessor, any conventional processor, or a processing circuit that implements a specific function.

[0120] This application also provides a computer-readable storage medium including a program or instructions that, when run on a computer, cause the method performed as described in the above method embodiments to be implemented.

[0121] It should be understood that the control circuit mentioned in the embodiments of this application can be implemented in hardware or software. When implemented in hardware, the control circuit can be a logic circuit, integrated circuit, etc. When implemented in software, the control circuit can be a general-purpose processor that reads software code stored in memory. The memory can exist independently and be connected to the control circuit, or the memory can be integrated with the control circuit.

[0122] As an example, the control circuit in the embodiments of this application can be a central processing unit (CPU), or other general-purpose processors, DSP processors, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. The general-purpose processor can be a microprocessor, any conventional processor, or a processing circuit that implements a specific function.

[0123] In embodiments of this application, the memory may be random access memory (RAM), flash memory, read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, hard disks, portable hard disks, CD-ROMs, or any other form of storage medium known in the art. An exemplary storage medium is coupled to a processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium may also be a component of the processor. The processor and storage medium may reside in an ASIC. Additionally, the ASIC may reside in a network device or a terminal device. Alternatively, the processor and storage medium may exist as discrete components in the network device or terminal device.

[0124] In the above embodiments, it can be implemented entirely or partially by software, hardware, firmware, or any combination thereof.

[0125] When implemented in hardware, the data processing method provided in this application embodiment may be implemented without reading software code or instructions. For example, it may be implemented by CPU, DSP, ASIC, FPGA, other programmable logic devices, transistor logic devices, hardware components, or any combination thereof.

[0126] When implemented using software, it can be implemented entirely or partially in the form of a computer program product. A computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, all or part of the processes or functions of the embodiments of this application are performed. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a network device, a terminal device, or other programmable device. The computer program or instructions can be stored in or transmitted through a computer-readable storage medium. The computer-readable storage medium can be any available medium that a computer can access, or a data storage device such as a server that integrates one or more available media. The available medium can be a magnetic medium, such as a floppy disk, hard disk, or magnetic tape; it can also be an optical medium, such as a Digital Versatile Disc (DVD); or it can be a semiconductor medium, such as a solid-state disk (SSD).

[0127] Finally, it should be noted that the above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method of frame synchronization, characterized by, The method comprises the following steps: receiving a first symbol sequence sent by a sending end, the first symbol sequence comprising W frames, W being an integer greater than 1; dividing the first symbol sequence into Q first symbol blocks, 1 matching the Q continuous pilot symbols with the Q first symbol blocks respectively; determining the boundary of a frame in the first symbol sequence according to a first statistical position of a maximum value of a number of successful matches in the Q first symbol blocks.

2. The method of claim 1, wherein, The first statistical position is a position for counting a number of matching results of each first symbol block in the Q first symbol blocks with a corresponding pilot symbol, the Q first symbol blocks comprising N first statistical positions.

3. The method of claim 2, wherein, If the matching result is a successful match, the number counted by the first statistical position is incremented by 1; if the matching result is a failed match, the number counted by the first statistical position remains unchanged.

4. The method according to any one of claims 1 to 3, characterized in that, Each frame comprises N symbols, and every M continuous symbols in the N symbols of the frame comprise one pilot symbol at a fixed position and M-1 payload symbols, 1 5. The method of claim 4, wherein, The position of the (i+k×M) %N symbol in the kth first symbol block in the Q first symbol blocks is a first statistical position Gi, where 0≤k≤Q-1 and 0≤i≤N-1.

6. The method according to claim 4 or 5, characterized in that, The position of the ith symbol in the kth first symbol block in the Q first symbol blocks corresponds to the position of the (i+M) %N symbol in the (k+1)th first symbol block in the Q first symbol blocks, where 0≤k≤Q-1 and 0≤i≤N-1.

7. The method according to any one of claims 4 to 6, characterized in that, The Q continuous pilot symbols for matching with the Q first symbol blocks respectively correspond to Q continuous pilot symbols in the frame one by one.

8. The method according to any one of claims 4 to 7, characterized in that, N=M×Q.

9. The method according to any one of claims 4 to 8, characterized in that, M=64, Q=96, N=6144.

10. The method according to any one of claims 1 to 9, characterized in that, Matching the Q continuous pilot symbols with the Q first symbol blocks respectively comprises the following steps: matching the kth pilot symbol in the Q continuous pilot symbols with all symbols in the kth first symbol block in the Q first symbol blocks one by one, where 0≤k≤Q-1.

11. The method according to any one of claims 1 to 10, characterized in that, Determining the boundary of a frame in the first symbol sequence according to a first statistical position of a maximum value of a number of successful matches in the Q first symbol blocks comprises the following steps: Determining the boundary of a frame in the first symbol sequence according to the position of the symbol in the 0th first symbol block in the Q first symbol blocks corresponding to the first statistical position of the maximum value of the number of successful matches.

12. The method according to any one of claims 1 to 11, characterized in that, Determining the boundary of a frame in the first symbol sequence according to a first statistical position of a maximum value of a number of successful matches in the Q first symbol blocks comprises the following steps: If the first statistical position of the maximum value of the number of successful matches in the Q first symbol blocks is only one, and the maximum value of the number of successful matches in the Q first symbol blocks is greater than a first threshold, determining the boundary of a frame in the first symbol sequence according to the first statistical position of the maximum value of the number of successful matches in the Q first symbol blocks.

13. The method according to any one of claims 1 to 12, characterized in that, After determining the boundary of a frame in the first symbol sequence according to the first statistical position of the maximum number of successful matches in the Q first symbol blocks, the method further comprises: receiving a second symbol sequence including W frames sent by a sending end, the second symbol sequence being sent after the first symbol sequence; segmenting the second symbol sequence into Q second symbol blocks, each of the Q second symbol blocks including N symbols; matching the continuous Q pilot symbols with the Q second symbol blocks respectively; obtaining a second statistical position of the maximum number of successful matches in the Q second symbol blocks.

14. The method of claim 13, wherein, After obtaining the second statistical position of the maximum number of successful matches in the Q second symbol blocks, the method further comprises: if a difference between the maximum number of successful matches in the Q second symbol blocks and the maximum number of successful matches in the Q first symbol blocks is greater than a second threshold, determining the boundary of a frame in the second symbol sequence according to the second statistical position of the maximum number of successful matches in the Q second symbol blocks.

15. The method of claim 13, wherein, The first statistical position of the maximum number of successful matches in the Q first symbol blocks is a first statistical position Ga, the second statistical position of the maximum number of successful matches in the Q second symbol blocks is a second statistical position Gb, and a second statistical position corresponding to the first statistical position Ga in the N second statistical positions is a second statistical position Ga. After obtaining the second statistical position of the maximum number of successful matches in the Q second symbol blocks, the method further comprises: if the second statistical position Ga and the second statistical position Gb are not the same statistical position, and a difference between a statistical value of the number of successful matches counted by the second statistical position Gb and a statistical value of the number of successful matches counted by the first statistical position Ga is greater than a third threshold, determining the boundary of a frame in the second symbol sequence according to the second statistical position of the maximum number of successful matches in the Q second symbol blocks.

16. The method of claim 13, wherein, After obtaining the second statistical position of the maximum number of successful matches in the Q second symbol blocks, the method further comprises: if the maximum number of successful matches in the Q second symbol blocks is less than a third threshold, re-performing frame synchronization.

17. A chip, characterized by The chip is configured to perform the method according to any one of claims 1 to 16.

18. An optical module characterized by comprising: The optical module comprises a control circuit and an interface circuit, the interface circuit is configured to transceive signals, and the control circuit is configured to perform the method according to any one of claims 1 to 16.

19. A receiving device, comprising: The receiving device comprises a host and the optical module according to claim 18, the optical module is configured to convert a received optical signal into an electrical signal and send the electrical signal to the host.

20. A communication system, characterized by comprises: a sending device and the receiving device according to claim 19, the sending device is configured to send a signal to the receiving device.

21. A computer-readable storage medium, characterized in that, The computer readable storage medium stores instructions, the instructions are executed by a computer to implement the method according to any one of claims 1 to 16.

Images