Display substrate and manufacturing method therefor, and display device

By introducing a light-shielding structure into the display substrate, the light leakage problem at the via under high pixel density is solved, improving the display effect and aperture ratio, and reducing backlight power consumption.

WO2026026247A9PCT designated stage Publication Date: 2026-05-21BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
BOE TECHNOLOGY GROUP CO LTD
Filing Date
2025-06-11
Publication Date
2026-05-21

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Abstract

A display substrate and a manufacturing method therefor, and a display device, relating to, but not limited to the technical field of display. The display substrate comprises a base (101), an active layer (6), a first gate (8), and at least one source / drain; the active layer (6) is disposed on the base (101); the first gate (8) is provided on the side of the active layer (6) away from the base (101); the at least one source / drain is provided on the side of the first gate (8) away from the base (101); at least one via hole is formed between the active layer (6) and the at least one source / drain; the at least one source / drain is connected to the active layer (6) by means of the at least one via hole; the display substrate further comprises at least one light-blocking structure; the at least one light-blocking structure is provided on the side of the active layer (6) close to the base (101); and the orthographic projection of the at least one light-blocking structure on the base (101) includes the orthographic projection of the at least one via hole on the base (101). The size of the light-blocking structures is reduced to ensure the aperture ratio of the display device.
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Description

A display substrate, its fabrication method, and a display device.

[0001] This application claims priority to Chinese Patent Application No. 202411047554.7, filed on July 31, 2024, entitled "A display substrate and its preparation method, and a display device", the contents of which shall be construed as incorporated herein by reference. Technical Field

[0002] This article relates to, but is not limited to, the field of display technology, specifically to a display substrate and its preparation method, and a display device. Background Technology

[0003] Micro-OLEDs (Micro-Organic Light-Emitting Diodes) are microdisplays that have emerged in recent years, with silicon-based OLEDs being one type. Silicon-based OLEDs not only enable active pixel addressing but also allow for the fabrication of pixel driving circuits and other structures on silicon substrates, which helps reduce system size and achieve lightweight design. Silicon-based OLEDs are fabricated using mature Complementary Metal Oxide Semiconductor (CMOS) integrated circuit technology, offering advantages such as small size, high resolution (Pixels Per Inch, PPI), and high refresh rate. They are widely used in near-eye displays for Virtual Reality (VR) and Augmented Reality (AR). Summary of the Invention

[0004] The following is an overview of the subject matter described in detail herein. This overview is not intended to limit the scope of the claims.

[0005] This application provides a display substrate, including a substrate, an active layer, a first gate, and at least one source / drain electrode. The active layer is disposed on the substrate, the first gate is disposed on the side of the active layer away from the substrate, and the at least one source / drain electrode is disposed on the side of the first gate away from the substrate. At least one via is disposed between the active layer and the at least one source / drain electrode, and the at least one source / drain electrode is connected to the active layer through the at least one via. The display substrate also includes at least one light-shielding structure disposed on the side of the active layer near the substrate, and the orthographic projection of the at least one light-shielding structure on the substrate includes the orthographic projection of the at least one via on the substrate.

[0006] Optionally, the at least one source / drain electrode includes a signal line as a first electrode, the at least one via includes a first via, the first via is disposed between the active layer and the signal line, the signal line is connected to the active layer through the first via, and the at least one light-shielding structure includes a first light-shielding structure, the orthographic projection of the first light-shielding structure on the substrate includes the orthographic projection of the first via on the substrate.

[0007] Optionally, the first via has a first width, and the first light-shielding structure has a second width. The first width and the second width satisfy the following formula: the difference between the second width and the first width is equal to twice the average deviation, the first width is the maximum dimension of the first via in a first direction, the second width is the minimum dimension of the first light-shielding structure in a first direction, the average deviation is 0.4 micrometers to 0.6 micrometers, and the first direction is the direction perpendicular to the signal line.

[0008] Optionally, there is a first spacing between the edge of the first light-shielding structure and the edge of the first via, the first spacing being greater than or equal to 0.1 micrometers and less than or equal to 1 micrometer; wherein, the first spacing is the minimum distance between the edge of the first light-shielding structure on one side of the first direction in the orthogonal projection of the substrate and the edge of the first via on one side of the first direction in the orthogonal projection of the substrate, or, the first spacing is the minimum distance between the edge of the first light-shielding structure on the opposite side of the first direction in the orthogonal projection of the substrate and the edge of the first via on the opposite side of the first direction in the orthogonal projection of the substrate; the first direction is a direction perpendicular to the signal line.

[0009] Optionally, the at least one source / drain electrode further includes a second electrode, and the at least one via further includes a second via. The second electrode is disposed on the side of the first electrode away from the substrate, and the second via is disposed between the active layer and the second electrode. The second electrode is connected to the active layer through the second via. The at least one light-shielding structure further includes a second light-shielding structure, and the orthographic projection of the second light-shielding structure on the substrate includes the orthographic projection of the second via on the substrate.

[0010] Optionally, the second light-shielding structure and the first light-shielding structure are located in the same film layer and are made of the same material.

[0011] Optionally, the first light-shielding structure is located on the side of the second light-shielding structure closer to the substrate.

[0012] Optionally, the second light-shielding structure serves as a second gate, and the orthographic projection of the second gate onto the substrate overlaps with the orthographic projection of the active layer onto the substrate.

[0013] Optionally, the at least one light-shielding structure has a reflectivity of 80% or greater than or equal to that of visible light.

[0014] Optionally, the at least one light-shielding structure includes a substrate and at least one micro / nano structure, the at least one micro / nano structure being disposed on the side of the substrate near the substrate, the at least one micro / nano structure protruding toward the substrate, and the at least one micro / nano structure being configured to totally reflect incident light toward the substrate.

[0015] Optionally, the shape of the at least one micro / nanostructure includes a conical shape.

[0016] Optionally, it further includes a dielectric layer disposed on the side of the at least one light-shielding structure near the substrate, wherein at least one microgroove is disposed in the dielectric layer, and the at least one microgroove is disposed in a one-to-one correspondence with the at least one micro / nano structure, wherein the at least one micro / nano structure fills the corresponding microgroove, and the contact interface between the at least one micro / nano structure and the corresponding microgroove serves as a total internal reflection interface.

[0017] Optionally, the thickness of the at least one light-shielding structure is less than or equal to 1000 angstroms.

[0018] This application also provides a method for preparing a display substrate, comprising:

[0019] At least one light-shielding structure is formed on the substrate.

[0020] An active layer is formed on the side of the at least one light-shielding structure away from the substrate;

[0021] A first gate is formed on the side of the active layer away from the substrate;

[0022] At least one source / drain electrode is formed on the side of the first gate away from the substrate; at least one via is provided between the active layer and the at least one source / drain electrode, and the at least one source / drain electrode is connected to the active layer through the at least one via; the orthogonal projection of the at least one light-shielding structure on the substrate includes the orthogonal projection of the at least one via on the substrate.

[0023] This application also provides a display device, including any of the display substrates described above.

[0024] After reading and understanding the accompanying diagrams and detailed descriptions, the other aspects can be understood. Attached Figure Description

[0025] The accompanying drawings are used to provide an understanding of the technical solutions of this application and constitute a part of the specification. They are used together with the embodiments of this application to explain the technical solutions of this application and do not constitute a limitation on the technical solutions of this application.

[0026] Figure 1 is a schematic diagram of the planar structure of vias and traces in a display device;

[0027] Figure 2 is a schematic diagram of the planar structure of vias and traces in a display device.

[0028] Figure 3 is a schematic cross-sectional view of a display device;

[0029] Figure 4 is a schematic diagram of the planar structure of a display device;

[0030] Figure 5 is a cross-sectional structural diagram of a display substrate according to an embodiment of the present disclosure;

[0031] Figure 6 is a cross-sectional view of another display substrate according to an embodiment of the present disclosure;

[0032] Figure 7 is a cross-sectional schematic diagram of the first light-shielding structure of a display substrate according to an embodiment of the present disclosure;

[0033] Figure 8 is a schematic planar structure diagram of a first light-shielding structure of a display substrate according to an embodiment of the present disclosure;

[0034] Figure 9 is a schematic diagram showing the positional relationship between a first light-shielding structure, a first signal line, and a second signal line in a substrate according to an embodiment of this disclosure;

[0035] Figure 10 is a schematic diagram showing the positional relationship between a first light-shielding structure and a first via in a substrate according to an embodiment of the present disclosure;

[0036] Figure 11 is a schematic diagram showing the positional relationship between another first light-shielding structure and a first via in a display substrate according to an embodiment of this disclosure. Detailed Implementation

[0037] To make the objectives, technical solutions, and advantages of this disclosure clearer, embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. Note that the implementation can be carried out in at least two different forms. Those skilled in the art will readily understand that the methods and content can be varied in many ways without departing from the spirit and scope of this disclosure. Therefore, this disclosure should not be construed as limited to the contents described in the following embodiments. Without conflict, the embodiments and features in the embodiments of this disclosure can be arbitrarily combined with each other.

[0038] The scale of the figures in this disclosure can be used as a reference in actual manufacturing processes, but is not limited thereto. For example, the aspect ratio of the channel, the thickness and spacing of each film layer, and the width and spacing of each signal line can be adjusted according to actual needs. The number of pixels in the display substrate and the number of sub-pixels in each pixel are not limited to the quantities shown in the figures. The figures described in this disclosure are only schematic diagrams of the structure, and one aspect of this disclosure is not limited to the shapes or values ​​shown in the figures.

[0039] The ordinal numbers “first,” “second,” and “third” used in this specification are used to avoid confusion among the constituent elements, not to limit their quantity.

[0040] In this specification, for convenience, terms such as "middle," "upper," "lower," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer" are used to indicate orientation or positional relationships in conjunction with the accompanying drawings. This is solely for the purpose of facilitating the description and simplification, and does not imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this disclosure. The positional relationships of the constituent elements may be appropriately varied depending on the orientation of each constituent element being described. Therefore, the use of terms not limited to those described in the specification may be appropriately replaced as needed.

[0041] In this specification, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they may refer to a fixed connection, a detachable connection, or an integral connection; a mechanical connection or an electrical connection; a direct connection, an indirect connection via an intermediate component, or a connection within two components. Those skilled in the art will understand the specific meaning of these terms in this disclosure based on the specific circumstances.

[0042] In this specification, a transistor is a device that includes at least three terminals: a gate electrode, a drain electrode, and a source electrode. A transistor has a channel region between the drain electrode (drain electrode terminal, drain region, or drain electrode) and the source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. Note that in this specification, the channel region refers to the region through which current primarily flows.

[0043] In this specification, the first electrode can be the drain electrode and the second electrode can be the source electrode, or vice versa. In cases where transistors with opposite polarities are used or the current direction changes during circuit operation, the functions of the "source electrode" and "drain electrode" may sometimes be interchanged. Therefore, in this specification, the "source electrode" and "drain electrode" can be interchanged, and the "source terminal" and "drain terminal" can be interchanged.

[0044] In this specification, "electrical connection" includes the situation where components are connected together by elements that have a certain electrical function. There are no particular limitations on what constitutes an "electrical function," as long as it allows for the transmission and reception of electrical signals between the connected components. Examples of "electrical functions" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements with various functions.

[0045] In this specification, "parallel" refers to the state where the angle formed by two straight lines is greater than or equal to -10° and less than 10°, and therefore also includes the state where the angle is greater than or equal to -5° and less than 5°. Similarly, "perpendicular" refers to the state where the angle formed by two straight lines is greater than or equal to 80° and less than 100°, and therefore also includes the state where the angle is greater than or equal to 85° and less than 95°.

[0046] In this specification, the terms "film" and "layer" may be interchanged. For example, "conductive layer" may sometimes be replaced with "conductive film." Similarly, "insulating film" may sometimes be replaced with "insulating layer."

[0047] In this specification, triangles, rectangles, trapezoids, pentagons, or hexagons are not strictly defined; they can be approximate triangles, rectangles, trapezoids, pentagons, or hexagons. Small deformations due to tolerances are possible, as are chamfers, curved edges, and other variations.

[0048] In this disclosure, “about” means a value that is not strictly limited and allows for process and measurement errors.

[0049] Figure 1 is a schematic diagram of a planar structure of vias and traces in a display device. As shown in Figure 1, in a display device with a pixel density greater than or equal to 1200 ppi, such as a liquid crystal display device with a pixel density of 1400 ppi or 2100 ppi, the array substrate of the display device connects different film layers through traces 2' in the vias 1' of the insulating layer. For example, the active layer can be connected to the source and drain of the SD layer through the traces 2' in the vias 1' of the inter-layer dielectric layer above it. The traces 2' extend along the sidewall of the via 1', and the shape of the traces 2' is approximately the same as the shape of the via 1'. For example, the shape of the via 1' is elliptical, and the shape of the traces 2' is also elliptical.

[0050] When light from the array substrate passes through the gap between trace 2' and the sidewall of via 1', the polarization direction of the transverse wave (S-wave) is parallel to the extension direction of the trace and remains unchanged. The polarization direction of the longitudinal wave (P-wave) is perpendicular to the extension direction of trace 2', generating a surface plasmon polariton (SPP) effect on the surface of trace 2'. The SPP effect alters the polarization direction of the light, depolarizing the linearly polarized light generated by the lower polarizer. This depolarized light cannot be completely cut off after passing through the upper polarizer, resulting in light leakage at via 1' when the display device displays a completely dark screen (0% brightness). The SPP effect is a phenomenon where light oscillates collectively with free electrons on the metal surface when passing through the interface between the dielectric and the metal.

[0051] Figure 2 is a schematic diagram of the planar structure of vias and traces in a display device. As shown in Figure 2, the black matrix 3' (BM) in the color filter substrate of the display device is located on the side of the SD layer away from the substrate, and the black matrix 3' (BM) can be used to block the via 1'. However, when the pixel density of the display device is greater than or equal to 1400ppi, as the pixel density increases, the spacing between adjacent sub-pixels 4' decreases, the density of via 1' increases, and the light leakage of via 1' increases linearly. Using the black matrix 3' (BM) to block the via 1' will cause the black matrix 3' (BM) to extend into the sub-pixel 4' area, reducing the aperture ratio of the display device and decreasing the display brightness.

[0052] This disclosure provides a display substrate, including a substrate, an active layer, a first gate, at least one source / drain electrode, and at least one via. The active layer is disposed on the substrate, the first gate is disposed on the side of the active layer away from the substrate, the at least one source / drain electrode is disposed on the side of the first gate away from the substrate, and the at least one via is disposed between the active layer and the at least one source / drain electrode. The at least one source / drain electrode is connected to the active layer through the at least one via. The display substrate further includes at least one light-shielding structure disposed on the side of the active layer near the substrate. The orthographic projection of the at least one light-shielding structure on the substrate includes the orthographic projection of the at least one via on the substrate.

[0053] Figure 3 is a cross-sectional structural schematic diagram of a display device. As shown in Figure 3, the display device may include a first substrate 100 and a second substrate 200 disposed opposite to each other, and a liquid crystal layer 300 disposed between the first substrate 100 and the second substrate 200. The first substrate 100 may include a first structural layer 102 disposed on the side of the first substrate 10 facing the second substrate 200, and the second substrate 200 may include a second structural layer 202 disposed on the side of the second substrate 201 facing the first substrate 100.

[0054] Optionally, the first substrate 100 can serve as an array substrate, and the first structural layer 102 can include gate lines, data lines, thin-film transistors, pixel electrodes, and common electrodes; the second substrate 200 can serve as a color filter substrate, and the second structural layer 202 can include a light filter layer and a black matrix (BM). The liquid crystal layer 300 can include at least two liquid crystal molecules having dielectric anisotropy. In response to an electric field applied between the array substrate and the color filter substrate, the liquid crystal molecules can rotate between the array substrate and the color filter substrate in a predetermined direction, thereby allowing or blocking light transmission.

[0055] Figure 4 is a schematic diagram of a planar structure of a display device. As shown in Figure 4, the display device may include at least two pixel units P arranged in a matrix. At least one of the at least two pixel units P includes a first sub-pixel P1 that emits a first color light, a second sub-pixel P2 that emits a second color light, and a third sub-pixel P3 that emits a third color light. Each of the three sub-pixels includes a thin-film transistor, a pixel electrode, and a common electrode.

[0056] Optionally, the first sub-pixel P1 can be a red sub-pixel emitting red (R) light, the second sub-pixel P2 can be a green sub-pixel emitting green (G) light, and the third sub-pixel P3 can be a blue sub-pixel emitting blue (B) light. The shape of the sub-pixels in the pixel unit can be rectangular, rhomboid, pentagonal, or hexagonal, etc., and the sub-pixels in the pixel unit can be arranged horizontally, vertically, or in a triangular pattern. This disclosure does not impose any limitations on this arrangement. Optionally, the pixel unit can include four sub-pixels. This disclosure does not impose any limitations on this arrangement.

[0057] Figure 5 is a schematic cross-sectional view of a display substrate according to an embodiment of the present disclosure. Optionally, as shown in Figure 5, the display substrate according to the present disclosure includes a substrate 101, a buffer layer 1 disposed on the substrate 101, a first insulating layer 2 disposed on the side of the buffer layer 1 away from the substrate 101, a first conductive layer disposed on the side of the first insulating layer 2 away from the substrate 101, a second insulating layer 5 disposed on the side of the first conductive layer away from the substrate 101, an active layer 6 disposed on the side of the second insulating layer 5 away from the substrate 101, a third insulating layer 7 disposed on the side of the active layer 6 away from the substrate 101, a second conductive layer disposed on the side of the third insulating layer 7 away from the substrate 101, a fourth insulating layer 9 disposed on the side of the second conductive layer away from the substrate 101, and a third conductive layer 6 disposed on the side of the fourth insulating layer 9 away from the substrate 101. The system comprises the following layers: a fifth insulating layer 11 disposed on the side of the third conductive layer away from the substrate 101; a fourth conductive layer disposed on the side of the fifth insulating layer 11 away from the substrate 101; a first organic dielectric layer 13 disposed on the side of the fourth conductive layer away from the substrate 101; a fifth conductive layer disposed on the side of the first organic dielectric layer 13 away from the substrate 101; a sixth insulating layer 15 disposed on the side of the fifth conductive layer away from the substrate 101; a sixth conductive layer disposed on the side of the sixth insulating layer 15 away from the substrate 101; a seventh conductive layer disposed on the side of the sixth conductive layer away from the substrate 101; a seventh insulating layer 18 disposed on the side of the seventh conductive layer away from the substrate 101; and an eighth conductive layer disposed on the side of the seventh insulating layer 18 away from the substrate 101. The first insulating layer 2 can serve as a first gate insulating layer, the second insulating layer 5 can serve as a first interlayer dielectric layer, the third insulating layer 7 can serve as a second gate insulating layer, the fourth insulating layer 9 can serve as a second interlayer dielectric layer, the fifth insulating layer 11 can serve as a third interlayer dielectric layer, the sixth insulating layer 15 can serve as a first passivation layer, and the seventh insulating layer 18 can serve as a second passivation layer.

[0058] Optionally, the first conductive layer may include a first light-shielding structure 3 and a second light-shielding structure 4, both located on the side of the active layer 6 near the substrate 101. The second conductive layer may include a first gate 8, located on the side of the active layer 6 away from the substrate 101. The third conductive layer may include a first electrode 10, located on the side of the active layer 6 away from the substrate 101, and connected to the active layer 6. The fourth conductive layer may include a second electrode 12, located on the side of the first electrode 10 away from the substrate 101, and connected to the active layer 6. The fifth conductive layer may include a first electrode 14, located on the side of the second electrode 12 away from the substrate 101. The sixth conductive layer may include a second electrode 16, located on the side of the first electrode 14 away from the substrate 101, and connected to the second electrode 12. The seventh conductive layer may include a third electrode 17, located on the side of the second electrode 16 away from the substrate 101, and connected to the second electrode 16. The eighth conductive layer may include a fourth electrode 19, which is located on the side of the third electrode 17 away from the substrate 101. The third electrode 17 can serve as a pixel electrode, the fourth electrode 19 can serve as a common electrode, and the second electrode 16 is connected to both the second electrode 12 and the third electrode 17.

[0059] Optionally, a first via 31 is provided between one end of the active layer 6 and the first electrode 10. The first via 31 extends along a direction perpendicular to the substrate 101. The first via 31 extends from the surface of the fourth insulating layer 9 away from the substrate 101 along a direction close to the substrate 101, sequentially penetrating the fourth insulating layer 9 and the third insulating layer 7, and extends to the surface of the active layer 6 away from the substrate 101, exposing the active layer 6. The first electrode 10 is connected to the active layer 6 through the first via 31.

[0060] Optionally, the first light-shielding structure 3 is located on the side of the active layer 6 near the substrate 101, and the orthographic projection of the first light-shielding structure 3 on the substrate 101 overlaps with the orthographic projection of the active layer 6 on the substrate 101. The orthographic projection of the first light-shielding structure 3 on the substrate 101 includes the orthographic projection of the first via 31 on the substrate 101.

[0061] Optionally, the first light-shielding structure 3 may have a reflectivity of visible light greater than or equal to 80%. The first light-shielding structure 3 is configured to reflect incident visible light toward the substrate, thereby enabling the first light-shielding structure 3 to block light from entering the first via 31 and thus preventing light leakage at the first via 31.

[0062] Optionally, the material of the first light-shielding structure 3 may include a metal, such as molybdenum.

[0063] Optionally, the thickness of the first light-shielding structure 3 is less than or equal to 1000 angstroms. The thickness of the first light-shielding structure 3 is its average dimension in the direction perpendicular to the substrate.

[0064] Optionally, a second via 32 is provided between the other end of the active layer 6 and the second electrode 12. The second via 32 extends along a direction perpendicular to the substrate 101. The second via 32 extends from the surface of the fifth insulating layer 11 away from the substrate 101 along a direction close to the substrate 101, sequentially penetrating the fifth insulating layer 11, the fourth insulating layer 9 and the third insulating layer 7, and extends to the surface of the active layer 6 away from the substrate 101, exposing the active layer 6. The second electrode 12 is connected to the active layer 6 through the second via 32.

[0065] Optionally, the second light-shielding structure 4 is located on the side of the active layer 6 near the substrate 101, and the orthographic projection of the second light-shielding structure 4 on the substrate 101 overlaps with the orthographic projection of the active layer 6 on the substrate 101. The orthographic projection of the second light-shielding structure 4 on the substrate 101 includes the orthographic projection of the second via 32 on the substrate 101.

[0066] Optionally, the reflectivity of the second light-shielding structure 4 to visible light can be greater than or equal to 80%. The second light-shielding structure 4 is configured to reflect the incident visible light toward the substrate, thereby enabling the second light-shielding structure 4 to block light from entering the second via 32, thus preventing light leakage at the second via 32.

[0067] Optionally, the material of the second light-shielding structure 4 may include a metal, such as molybdenum.

[0068] Optionally, the thickness of the second light-shielding structure 4 is less than or equal to 1000 angstroms. The thickness of the second light-shielding structure 4 is its average dimension in the direction perpendicular to the substrate.

[0069] Optionally, the second light-shielding structure 4 can serve as a second gate, and the second light-shielding structure 4 and the first gate 8 form a dual-gate structure.

[0070] Optionally, the first light-shielding structure 3 and the second light-shielding structure 4 are located in the same film layer, made of the same material, and prepared by the same manufacturing process.

[0071] In some embodiments, the first light-shielding structure and the second light-shielding structure may be made of the same or different materials and prepared by different manufacturing processes.

[0072] Optionally, the first gate 8 is located on the side of the active layer 6 away from the substrate 101, and the orthographic projection of the first gate 8 on the substrate 101 is located in the orthographic projection of the active layer 6 on the substrate 101.

[0073] Optionally, the substrate disclosed in this embodiment further includes a third via 33. The third via 33 extends along a direction perpendicular to the substrate 101. The third via 33 extends from the surface of the first organic dielectric layer 13 away from the substrate 101 along a direction close to the substrate 101, penetrates the first organic dielectric layer 13, and extends to the surface of the second electrode 12 away from the substrate 101, exposing the second electrode 12. The second electrode 16 is connected to the second electrode 12 through the third via 33.

[0074] Optionally, at least a portion of the first stacked layer formed by the first electrode 14, the sixth insulating layer 15, and the second electrode 16 covers one sidewall of the third via 33, and the second electrode 16 is connected to the exposed second electrode 12 and the third electrode 17, respectively. At least a portion of the second stacked layer formed by the first electrode 14 and the sixth insulating layer 15 covers the other sidewall of the third via 33.

[0075] Optionally, the substrate disclosed in this embodiment further includes a second organic dielectric layer 20, which fills the third via 33 and covers the first stacked layer and the second stacked layer located on the sidewall of the third via 33.

[0076] In this embodiment of the present disclosure, the substrate uses a first light-shielding structure 3 and a second light-shielding structure 4 to block the first via 31 and the second via 32 respectively, so as to prevent light leakage at the first via 31 and the second via 32.

[0077] The display substrate of this embodiment is simulated using the finite differential time domain method. Compared to the scheme of using a black matrix to block vias, the first and second light-blocking structures can prevent light leakage from the first and second vias, thereby improving the display effect of the display device and reducing the power consumption of the backlight. Specifically, the finite differential time domain method uses Lumerical optical simulation software to simulate the propagation of electromagnetic waves between the layers of the pixel structure by setting the film stacking structure and material parameters of the sub-pixels, and calculates the electric field, magnetic field direction, intensity, polarization direction, and other results.

[0078] Figure 6 is a cross-sectional structural diagram of another display substrate according to an embodiment of the present disclosure. Optionally, as shown in Figure 6, the structure of the display substrate of the present disclosure embodiment is generally the same as that of the display substrate shown in Figure 5, except that the first light-shielding structure 3 and the second light-shielding structure 4 of the display substrate of the present disclosure embodiment can be located in different film layers, and the first light-shielding structure 3 is disposed on the side of the second light-shielding structure 4 near the substrate 101. For example, the first light-shielding structure 3 is disposed on the substrate 101, and the buffer layer 1 covers the first light-shielding structure 3.

[0079] Figure 7 is a cross-sectional schematic diagram of a first light-shielding structure of a display substrate according to an embodiment of the present disclosure. The first light-shielding structure shown in Figure 7 can be the same as the first light-shielding structure in Figure 5. Optionally, as shown in Figure 7, the first light-shielding structure 3 may include a substrate 3-2 and at least one micro / nano structure 3-1. The at least one micro / nano structure 3-1 is disposed on the side of the substrate 3-2 near the substrate and is integrally connected to the substrate 3-2. The at least one micro / nano structure 3-1 protrudes towards the substrate. A first insulating layer 2 is disposed on the side of the substrate 3-2 near the substrate. At least one microgroove is provided in the first insulating layer 2, and the at least one microgroove corresponds one-to-one with the at least one micro / nano structure 3-1, with the micro / nano structure 3-1 filling its corresponding microgroove. The contact interface between the micro / nano structure 3-1 and the first insulating layer 2 serves as a total internal reflection interface. Visible light Li undergoes total internal reflection at this interface, reflecting the visible light Li incident on the first light-shielding structure 3 towards the substrate.

[0080] Optionally, the first insulating layer 2 has a first refractive index n1, and the micro / nano structure 3-1 has a second refractive index n2. The first refractive index n1 is greater than the second refractive index n2, so visible light Li undergoes total internal reflection at the interface between the micro / nano structure 3-1 and the first insulating layer 2.

[0081] Optionally, the first light-shielding structure 3 may include an inorganic material, such as silicon oxide.

[0082] Optionally, the micro / nano structure 3-1 has a conical shape and includes a side surface. The extension line of the side surface of the micro / nano structure 3-1 forms an angle m1 with the plane containing the substrate 101. Visible light Li has a total internal reflection angle m2 at the interface between the micro / nano structure 3-1 and the first insulating layer 2, wherein the angle m1 is greater than or equal to the total internal reflection angle m2. The total internal reflection angle m2 = acrsin(n2 / n1), where n1 is the first refractive index n1 of the first insulating layer 2, and n2 is the second refractive index n2 of the micro / nano structure 3-1.

[0083] Optionally, taking the material of the first insulating layer 2 as silicon nitride and the first refractive index n1 of the first insulating layer 2 as 1.95, and the material of the micro / nano structure 3-1 as silicon oxide and the second refractive index n2 of the micro / nano structure 3-1 as 1.47, according to the above formula, the total internal reflection angle m2 of visible light Li at the contact interface between the micro / nano structure 3-1 and the first insulating layer 2 is 48°, and the angle m1 between the extension line of the side surface of the micro / nano structure 3-1 and the plane where the substrate 101 is located is greater than or equal to 48°, thus realizing the reflection of the light incident on the micro / nano structure 3-1 toward the substrate.

[0084] Optionally, the micro / nano structure 3-1 can be formed using an exposure process or a nanoimprinting process. The number of micro / nano structures 3-1 is determined by the required size of the light-shielding structure and the size of the micro / nano structure 3-1, and the size of the micro / nano structure 3-1 is determined by the depth of the micro / nano structure 3-1 and the film thickness of the first insulating layer 2.

[0085] Optionally, the second light-shielding structure of the display substrate in this embodiment can be substantially the same as the first light-shielding structure shown in FIG7, and will not be described again here.

[0086] Figure 8 is a schematic planar structure diagram of a first light-shielding structure of a display substrate according to an embodiment of the present disclosure. The first light-shielding structure shown in Figure 8 can be a schematic planar structure diagram of the first light-shielding structure in Figure 7. Optionally, as shown in Figure 8, the first light-shielding structure 3 of the display substrate according to an embodiment of the present disclosure includes at least two micro / nano structures 3-1, which are arranged along a first direction D1 and a second direction D2. Both the first direction D1 and the second direction D2 are parallel to the substrate and intersect each other; for example, the first direction D1 and the second direction D2 are perpendicular to each other.

[0087] Optionally, the second light-shielding structure of the display substrate in this embodiment can be substantially the same as the first light-shielding structure shown in FIG8, and will not be described again here.

[0088] Figure 9 is a schematic diagram illustrating the positional relationship between a first light-shielding structure, a first signal line, and a second signal line in a display substrate according to an embodiment of the present disclosure. The first light-shielding structure shown in Figure 9 can be the same as the first light-shielding structure in Figure 5. Optionally, as shown in Figure 9, the first conductive layer of the display substrate in this embodiment may include a first light-shielding structure 3, a second light-shielding structure, and a first signal line 51. The first signal line 51 extends along a first direction D1 and is spaced apart along a second direction D2. The first signal line 51 is integrated with the second light-shielding structure. The first light-shielding structure 3, the second light-shielding structure, and the first signal line 51 are located in the same film layer, use the same material, and are fabricated using the same manufacturing process.

[0089] In some embodiments, the first light-shielding structure may be made of the same or different materials as the first signal line and may be fabricated using different manufacturing processes.

[0090] Optionally, in embodiments of this disclosure, the third conductive layer of the display substrate may include a first electrode 10 and a second signal line 52. The second signal line 52 extends along a second direction D2 and is spaced apart along a first direction D1. The first direction D1 may be a direction perpendicular to the second signal line 52. The second signal line 52 is integrated with the first electrode 10, that is, the second signal line 52 serves as the first electrode 10 of this disclosure. The first electrode 10 and the second signal line 52 are located in the same film layer, are made of the same material, and are prepared by the same manufacturing process.

[0091] In some embodiments, the second light-shielding structure may be made of the same or different materials as the second signal line and may be fabricated using different manufacturing processes.

[0092] Figure 10 is a schematic diagram showing the positional relationship between a first light-shielding structure and a first via in a display substrate according to an embodiment of the present disclosure. The first light-shielding structure shown in Figure 10 can be the same as the first light-shielding structure in Figure 5. Optionally, as shown in Figure 10, the third conductive layer of the display substrate according to an embodiment of the present disclosure may include a first electrode 10 and a second signal line 52. The second signal line 52 extends along a second direction D2 and is spaced apart along a first direction D1. The second signal line 52 is integrally connected to the first electrode 10. The first light-shielding structure 3 is located on the side of the first electrode 10 closest to the substrate. The shape of the first light-shielding structure 3 includes a rectangle, and the shape of the first via 31 includes a rectangle. The orthographic projection of the first light-shielding structure 3 onto the substrate includes the orthographic projection of the first via 31 onto the substrate.

[0093] Optionally, the first via 31 may have a first width a, and the first light-shielding structure 3 may have a second width b, wherein the first width a and the second width b satisfy the following formula:

[0094] Second width b - First width a = 2 * mean deviation c.

[0095] Wherein, the first width a is the maximum dimension of the first via 31 in the first direction D1; the second width b is the minimum dimension of the first light-shielding structure 3 in the first direction D1; and the average deviation c can be approximately 0.4 micrometers to 0.6 micrometers, for example, the average deviation c can be approximately 0.5 micrometers.

[0096] Optionally, the process for fabricating the first light-shielding structure 3 and the first via 31 may have a process deviation b1 and an alignment deviation c1, wherein the average deviation c can be the root mean square of the process deviation b1 and the alignment deviation c1, i.e.:

[0097] mean deviation

[0098] Optionally, in embodiments of this disclosure, a first distance L is provided between the edge of the first light-shielding structure 3 and the edge of the first via 31 in the substrate. The first distance L can be greater than or equal to 0.1 micrometers and less than or equal to 1 micrometer. Specifically, the first distance L can be the minimum distance between the edge of the first light-shielding structure 3 on one side of the first direction D1 in its orthogonal projection onto the substrate and the edge of the first via 31 on one side of the first direction D1 in its orthogonal projection onto the substrate; or, the first distance L can be the minimum distance between the edge of the first light-shielding structure 3 on the opposite side of the first direction D1 in its orthogonal projection onto the substrate and the edge of the first via 31 on the opposite side of the first direction D1 in its orthogonal projection onto the substrate.

[0099] Compared to the scheme of using a black matrix to block vias, the display substrate of this disclosure has a larger size than the first light-shielding structure in the display substrate of this disclosure because the size of the black matrix needs to take into account the alignment deviation between the color filter substrate and the array substrate, as well as the large vertical distance between the black matrix and the vias.

[0100] Optionally, taking a display device with a pixel density of 1218 ppi as an example, the average deviation c of the display substrate in this embodiment is approximately 0.5 micrometers, the first width a of the first via 31 is 1.9 micrometers, and according to the above formula, the second width b of the first light-shielding structure 3 is 2.9 micrometers. In comparison, the width of the black matrix is ​​approximately 3.9 micrometers.

[0101] In this embodiment of the display substrate, the first light-shielding structure 3 blocks the first via 31, which can reduce the deviation caused by process alignment. Compared with the black matrix, the size is smaller, which can ensure the aperture ratio of the display device.

[0102] In some embodiments, the shape of the first light-shielding structure may include other shapes, such as triangles, circles, ellipses, trapezoids, parallelograms, and other polygons such as pentagons and hexagons.

[0103] Figure 11 is a schematic diagram showing the positional relationship between another first light-shielding structure and a first via in a display substrate according to an embodiment of the present disclosure. The first light-shielding structure shown in Figure 11 can be the first light-shielding structure in Figure 5. Optionally, as shown in Figure 11, the third conductive layer of the display substrate according to an embodiment of the present disclosure may include a first electrode 10 and a second signal line 52. The second signal line 52 extends along a second direction D2 and is spaced apart along a first direction D1. The second signal line 52 is integrally connected to the first electrode 10. The first light-shielding structure 3 is located on the side of the first electrode 10 near the substrate. The shape of the first light-shielding structure 3 includes a strip shape. The first light-shielding structure 3 extends along the second direction D2, and its extension direction is approximately the same as that of the second signal line 52. The shape of the first via 31 includes a rectangle. At least two first vias 31 are spaced apart along the second direction D2. The orthographic projection of a first light-shielding structure 3 onto the substrate includes the orthographic projection of at least two first vias 31 spaced apart along the second direction D2 onto the substrate.

[0104] This disclosure also provides a display device, which includes the aforementioned display substrate. The display device can be any product or component with display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator, and the embodiments of the present invention are not limited thereto.

[0105] This disclosure also provides a method for preparing a display substrate, comprising:

[0106] At least one light-shielding structure is formed on the substrate.

[0107] An active layer is formed on the side of the at least one light-shielding structure away from the substrate;

[0108] A first gate is formed on the side of the active layer away from the substrate;

[0109] At least one source / drain electrode is formed on the side of the first gate away from the substrate; at least one via is provided between the active layer and the at least one source / drain electrode, and the at least one source / drain electrode is connected to the active layer through the at least one via; the orthogonal projection of the at least one light-shielding structure on the substrate includes the orthogonal projection of the at least one via on the substrate.

[0110] This application describes several embodiments, but these descriptions are exemplary and not restrictive, and it will be apparent to those skilled in the art that many more embodiments and implementations are possible within the scope of the embodiments described herein. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are also possible. Unless specifically limited, any feature or element of any embodiment may be used in combination with, or may replace, any feature or element of any other embodiment.

[0111] This application includes and contemplates combinations of features and elements known to those skilled in the art. The embodiments, features, and elements disclosed in this application may also be combined with any conventional features or elements to form a unique inventive scheme as defined by the claims. Any feature or element of any embodiment may also be combined with features or elements from other inventive schemes to form another unique inventive scheme as defined by the claims. Therefore, it should be understood that any feature shown and / or discussed in this application may be implemented individually or in any suitable combination. Therefore, the embodiments are not limited except by the limitations imposed by the appended claims and their equivalents. Furthermore, various modifications and changes may be made within the scope of the appended claims.

[0112] Furthermore, in describing representative embodiments, the specification may have presented methods and / or processes as a specific sequence of steps. However, the method or process should not be limited to the specific order of steps described herein, to the extent that it does not depend on such a specific order. As will be understood by those skilled in the art, other sequences of steps are also possible. Therefore, the specific order of steps set forth in the specification should not be construed as a limitation of the claims. Moreover, the claims concerning the method and / or process should not be limited to the steps performed in the written order, and those skilled in the art will readily understand that these orders can be varied and still remain within the spirit and scope of the embodiments of this application.

Claims

1. A display substrate, comprising a substrate, an active layer, a first gate, and at least one source / drain electrode, wherein the active layer is disposed on the substrate, the first gate is disposed on the side of the active layer away from the substrate, the at least one source / drain electrode is disposed on the side of the first gate away from the substrate, at least one via is disposed between the active layer and the at least one source / drain electrode, the at least one source / drain electrode being connected to the active layer through the at least one via, the display substrate further comprising at least one light-shielding structure, the at least one light-shielding structure being disposed on the side of the active layer near the substrate, the orthographic projection of the at least one light-shielding structure on the substrate including the orthographic projection of the at least one via on the substrate. 2.The display substrate of claim 1, wherein, The at least one source / drain electrode includes a signal line as a first electrode, the at least one via includes a first via disposed between the active layer and the signal line, the signal line is connected to the active layer through the first via, and the at least one light-shielding structure includes a first light-shielding structure, the orthographic projection of the first light-shielding structure on the substrate includes the orthographic projection of the first via on the substrate. 3.The display substrate of claim 2, wherein, The first via has a first width, and the first light-shielding structure has a second width. The first width and the second width satisfy the following formula: the difference between the second width and the first width is equal to twice the average deviation. The first width is the maximum dimension of the first via in a first direction, and the second width is the minimum dimension of the first light-shielding structure in a first direction. The average deviation is 0.4 micrometers to 0.6 micrometers, and the first direction is the direction perpendicular to the signal line. 4.The display substrate of claim 2, wherein, The edge of the first light-shielding structure and the edge of the first via have a first spacing, which is greater than or equal to 0.1 micrometers and less than or equal to 1 micrometer; wherein, the first spacing is the minimum distance between the edge of the first light-shielding structure on one side of the first direction in the orthogonal projection of the substrate and the edge of the first via in the first direction in the orthogonal projection of the substrate, or, the first spacing is the minimum distance between the edge of the first light-shielding structure on the opposite side of the first direction in the orthogonal projection of the substrate and the edge of the first via in the opposite side of the first direction in the orthogonal projection of the substrate; the first direction is a direction perpendicular to the signal line. 5.The display substrate of claim 2, wherein, The at least one source / drain electrode further includes a second electrode, and the at least one via further includes a second via. The second electrode is disposed on the side of the first electrode away from the substrate, and the second via is disposed between the active layer and the second electrode. The second electrode is connected to the active layer through the second via. The at least one light-shielding structure further includes a second light-shielding structure, and the orthographic projection of the second light-shielding structure on the substrate includes the orthographic projection of the second via on the substrate. 6.The display substrate of claim 5, wherein, The second light-shielding structure is located in the same film layer as the first light-shielding structure and uses the same material. 7.The display substrate of claim 5, wherein, The first light-shielding structure is located on the side of the second light-shielding structure closer to the substrate. 8.The display substrate of claim 5, wherein, The second light-shielding structure serves as the second gate, and the orthographic projection of the second gate on the substrate overlaps with the orthographic projection of the active layer on the substrate. 9.The display substrate according to any one of claims 1 to 8, wherein The at least one light-shielding structure has a reflectivity of 80% or greater than or equal to that of visible light.

10. The display substrate according to any one of claims 1 to 8, wherein The at least one light-shielding structure includes a substrate and at least one micro / nano structure, the at least one micro / nano structure being disposed on the side of the substrate near the substrate, the at least one micro / nano structure protruding toward the substrate, and the at least one micro / nano structure being configured to totally reflect incident light toward the substrate. 11.The display substrate of claim 10, wherein, The shape of the at least one micro / nano structure includes a conical shape.

12. The display substrate according to claim 10, further comprising a dielectric layer disposed on the side of the at least one light-shielding structure near the substrate, wherein at least one microgroove is disposed in the dielectric layer, the at least one microgroove is disposed in a one-to-one correspondence with the at least one micro / nano structure, the at least one micro / nano structure fills the corresponding microgroove, and the contact interface between the at least one micro / nano structure and the corresponding microgroove serves as a total internal reflection interface.

13. The display substrate according to any one of claims 1 to 8, wherein The thickness of the at least one light-shielding structure is less than or equal to 1000 angstroms.

14. A method for preparing a display substrate, comprising: At least one light-shielding structure is formed on the substrate. An active layer is formed on the side of the at least one light-shielding structure away from the substrate; A first gate is formed on the side of the active layer away from the substrate; At least one source / drain electrode is formed on the side of the first gate away from the substrate; At least one via is provided between the active layer and the at least one source / drain electrode, and the at least one source / drain electrode is connected to the active layer through the at least one via. The orthogonal projection of the at least one light-shielding structure onto the substrate includes the orthogonal projection of the at least one via onto the substrate.

15. A display device comprising the display substrate according to any one of claims 1 to 13.