Method and apparatus for non-periodic digital envelope tracking for power amplifiers in a wireless communication system

Abstract

The present disclosure relates to a 5G communication system or a 6G communication system for supporting higher data rates beyond a 4G communication system such as long term evolution (LTE). Methods and systems for non-periodic digital envelope tracking for power amplifiers. A method includes setting a default digital envelope tracking (DET) level in a DET level module of a Faster-than-Symbol Power Tracking (FSPT) module and receiving baseband data using the FSPT module. The method also includes calculating an input signal amplitude using the DET level module based on the received IQ baseband data and processing the IQ baseband data using a low power search (LPS) module to produce an LPS output. The method further includes generating a DET signal using a DET decision module based on the input signal amplitude and the LPS output. The DET decision module is configured to use non-periodic DET to generate the DET signal. The method includes providing the DET signal to a supply modulator to drive a power amplifier.

Description

METHOD AND APPARATUS FOR NON-PERIODIC DIGITAL ENVELOPE TRACKING FOR POWER AMPLIFIERS IN A WIRELESS COMMUNICATION SYSTEM

[0001] The present disclosure relates generally to wireless communication systems. More specifically, the present disclosure relates to a system and method for non-periodic digital envelope tracking for power amplifiers in a wireless communication system.

[0002] Considering the development of wireless communication from generation to generation, the technologies have been developed mainly for services targeting humans, such as voice calls, multimedia services, and data services. Following the commercialization of 5G (5th generation) communication systems, it is expected that the number of connected devices will exponentially grow. Increasingly, these will be connected to communication networks. Examples of connected things may include vehicles, robots, drones, home appliances, displays, smart sensors connected to various infrastructures, construction machines, and factory equipment. Mobile devices are expected to evolve in various form-factors, such as augmented reality glasses, virtual reality headsets, and hologram devices. In order to provide various services by connecting hundreds of billions of devices and things in the 6G (6th generation) era, there have been ongoing efforts to develop improved 6G communication systems. For these reasons, 6G communication systems are referred to as beyond-5G systems.

[0003] 6G communication systems, which are expected to be commercialized around 2030, will have a peak data rate of tera (1,000 giga)-level bit per second (bps) and a radio latency less than 100μsec, and thus will be 50 times as fast as 5G communication systems and have the 1 / 10 radio latency thereof.

[0004] In order to accomplish such a high data rate and an ultra-low latency, it has been considered to implement 6G communication systems in a terahertz (THz) band (for example, 95 gigahertz (GHz) to 3THz bands). It is expected that, due to severer path loss and atmospheric absorption in the terahertz bands than those in mmWave bands introduced in 5G, technologies capable of securing the signal transmission distance (that is, coverage) will become more crucial. It is necessary to develop, as major technologies for securing the coverage, Radio Frequency (RF) elements, antennas, novel waveforms having a better coverage than Orthogonal Frequency Division Multiplexing (OFDM), beamforming and massive Multiple-input Multiple-Output (MIMO), Full Dimensional MIMO (FD-MIMO), array antennas, and multiantenna transmission technologies such as large-scale antennas. In addition, there has been ongoing discussion on new technologies for improving the coverage of terahertz-band signals, such as metamaterial-based lenses and antennas, Orbital Angular Momentum (OAM), and Reconfigurable Intelligent Surface (RIS).

[0005] Moreover, in order to improve the spectral efficiency and the overall network performances, the following technologies have been developed for 6G communication systems: a full-duplex technology for enabling an uplink transmission and a downlink transmission to simultaneously use the same frequency resource at the same time; a network technology for utilizing satellites, High-Altitude Platform Stations (HAPS), and the like in an integrated manner; an improved network structure for supporting mobile base stations and the like and enabling network operation optimization and automation and the like; a dynamic spectrum sharing technology via collision avoidance based on a prediction of spectrum usage; an use of Artificial Intelligence (AI) in wireless communication for improvement of overall network operation by utilizing AI from a designing phase for developing 6G and internalizing end-to-end AI support functions; and a next-generation distributed computing technology for overcoming the limit of UE computing ability through reachable super-high-performance communication and computing resources (such as Mobile Edge Computing (MEC), clouds, and the like) over the network. In addition, through designing new protocols to be used in 6G communication systems, developing mechanisms for implementing a hardware-based security environment and safe use of data, and developing technologies for maintaining privacy, attempts to strengthen the connectivity between devices, optimize the network, promote softwarization of network entities, and increase the openness of wireless communications are continuing.

[0006] It is expected that research and development of 6G communication systems in hyper-connectivity, including person to machine (P2M) as well as machine to machine (M2M), will allow the next hyper-connected experience. Particularly, it is expected that services such as truly immersive eXtended Reality (XR), high-fidelity mobile hologram, and digital replica could be provided through 6G communication systems. In addition, services such as remote surgery for security and reliability enhancement, industrial automation, and emergency response will be provided through the 6G communication system such that the technologies could be applied in various fields such as industry, medical care, automobiles, and home appliances.

[0007] The present disclosure provides apparatus and method for non-periodic digital envelope tracking for power amplifiers in a wireless communication system.

[0008] According to an aspect of an exemplary embodiment, there is provided apparatus and method for non-periodic digital envelope tracking for power amplifiers in a wireless communication system.

[0009] Aspects of the present disclosure provide efficient communication methods in a wireless communication system.

[0010] For a more complete understanding of the present disclosure and its advantages, reference is now made to the following description taken in conjunction with the accompanying drawings, in which like reference numerals represent like parts:

[0011] FIG. 1 illustrates an example wireless network according to embodiments of the present disclosure;

[0012] FIG. 2 illustrates an example gNB according to embodiments of the present disclosure;

[0013] FIG. 3 illustrates an example UE according to embodiments of the present disclosure;

[0014] FIG. 4 illustrates an example signal envelope of a power amplifier;

[0015] FIG. 5A illustrates an example non-periodic digital envelope tracking system according to embodiments of the present disclosure;

[0016] FIG. 5B illustrates an example flow chart for digital envelope tracking calculation for the non-periodic digital envelope tracking system of FIG. 5A according to embodiments of the present disclosure;

[0017] FIG. 6 illustrates an example multi-carrier non-periodic digital envelope tracking system according to embodiments of the present disclosure;

[0018] FIG. 7 illustrates an example method of non-periodic digital envelope tracking according to embodiments of the present disclosure;

[0019] FIG. 8 is a block diagram of a terminal or user equipment (UE) according to an embodiment of the disclosure;

[0020] FIG. 9 is a block diagram of a base station (BS) according to an embodiment of the disclosure; and

[0021] FIG. 10 is a block diagram of a network entity according to an embodiment of the disclosure.

[0022] The present application claims priority to U.S. Provisional Patent Application No.　63 / 678,352, filed on August 1, 2024. The contents of the above-identified patent documents are incorporated herein by reference.

[0023] In 6G extreme-MIMO systems, there are likely to be hundreds of power amplifiers in a single base station. These power amplifiers typically consume the majority of the power budget of the base station. Moreover, their power-added efficiency (PAE is often as low as 20%. The lower PAE is indicative of wasted power that contributes significantly to thermal concerns and increases the operational expenditure costs of a system. One potential solution to improve PAE is Digital Envelope Tracking (DET), which dynamically adjusts the bias voltage based on the instantaneous baseband-signal envelope. When the envelope power decreases, the bias voltage is also reduced, resulting in power savings. However, the transition and settling time associated with changing the supply voltage of power amplifiers can momentarily disrupt the power amplifier output signal. As the DET switching frequency increases, signal quality degradation becomes a significant concern.

[0024] Accordingly, there is a need for systems and methods for improved digital pre-distortion for digital envelope tracking systems that overcome these challenges.

[0025] The present disclosure relates to a system and method for non-periodic digital envelope tracking for power amplifiers.

[0026] In one embodiment, a method is provided. The method includes setting a default digital envelope tracking (DET) level in a DET level module of a Faster-than-Symbol Power Tracking (FSPT) module and receiving in-phase and quadrature (IQ) baseband data in an input signal using the FSPT module. The method also includes calculating an input signal amplitude using the DET level module of the FSPT module based on the received IQ baseband data and processing the IQ baseband data using a low power search (LPS) module of the FSPT module to produce an LPS output. The method further includes generating a DET signal using a DET decision module of the FSPT module based on the input signal amplitude and the LPS output. The DET decision module is configured to use non-periodic DET to generate the DET signal. The method includes providing the DET signal to a supply modulator to drive a power amplifier.

[0027] In another embodiment, an electronic device is provided. The electronic device includes a power amplifier, and a processor operably coupled to the power amplifier. The processor is configured to cause the electronic device to set a default digital envelope tracking (DET) level in a DET level module of a Faster-than-Symbol Power Tracking (FSPT) module and receive in-phase and quadrature (IQ) baseband data in an input signal using the FSPT module. The processor is also configured to cause the electronic device to calculate an input signal amplitude using the DET level module of the FSPT module based on the received IQ baseband data and process the IQ baseband data using a low power search (LPS) module of the FSPT module to produce an LPS output. The processor is further configured to cause the electronic device to generate a DET signal using a DET decision module of the FSPT module based on the input signal amplitude and the LPS output. The DET decision module is configured to use non-periodic DET to generate the DET signal. The processor is also configured to cause the electronic device to provide the DET signal to a supply modulator to drive the power amplifier.

[0028] In yet another embodiment, a non-transitory computer-readable medium is provided. The non-transitory computer-readable medium includes program code, that when executed by at least one processor of an electronic device, causes the electronic device to set a default digital envelope tracking (DET) level in a DET level module of a Faster-than-Symbol Power Tracking (FSPT) module and receive in-phase and quadrature (IQ) baseband data in an input signal using the FSPT module. The program code, that when executed by at least one processor of an electronic device, also causes the electronic device to calculate an input signal amplitude using the DET level module of the FSPT module based on the received IQ baseband data and process the IQ baseband data using a low power search (LPS) module of the FSPT module to produce an LPS output. The program code, that when executed by at least one processor of an electronic device, further causes the electronic device to generate a DET signal using a DET decision module of the FSPT module based on the input signal amplitude and the LPS output. The DET decision module is configured to use non-periodic DET to generate the DET signal. The program code, that when executed by at least one processor of an electronic device, also causes the electronic device to provide the DET signal to a supply modulator to drive a power amplifier.

[0029] Other technical features may be readily apparent to one skilled in the art from the following figures, descriptions, and claims.

[0030] Before undertaking the DETAILED DESCRIPTION below, it may be advantageous to set forth definitions of certain words and phrases used throughout this patent document. The term “couple” and its derivatives refer to any direct or indirect communication between two or more elements, whether or not those elements are in physical contact with one another. The terms “transmit,” “receive,” and “communicate,” as well as derivatives thereof, encompass both direct and indirect communication. The terms “include” and “comprise,” as well as derivatives thereof, mean inclusion without limitation. The term “or” is inclusive, meaning and / or. The phrase “associated with,” as well as derivatives thereof, means to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have, have a property of, have a relationship to or with, or the like. The term “controller” means any device, system, or part thereof that controls at least one operation. Such a controller may be implemented in hardware or a combination of hardware and software and / or firmware. The functionality associated with any particular controller may be centralized or distributed, whether locally or remotely. The phrase “at least one of,” when used with a list of items, means that different combinations of one or more of the listed items may be used, and only one item in the list may be needed. For example, “at least one of: A, B, and C” includes any of the following combinations: A, B, C, A and B, A and C, B and C, and A and B and C.

[0031] Moreover, various functions described below may be implemented or supported by one or more computer programs, each of which is formed from computer readable program code and embodied in a computer readable medium. The terms “application” and “program” refer to one or more computer programs, software components, sets of instructions, procedures, functions, objects, classes, instances, related data, or a portion thereof adapted for implementation in a suitable computer readable program code. The phrase “computer readable program code” includes any type of computer code, including source code, object code, and executable code. The phrase “computer readable medium” includes any type of medium capable of being accessed by a computer, such as read only memory (ROM), random access memory (RAM), a hard disk drive, a compact disc (CD), a digital video disc (DVD), or any other type of memory. A “non-transitory” computer readable medium excludes wired, wireless, optical, or other communication links that transport transitory electrical or other signals. A non-transitory computer readable medium includes media where data may be permanently stored and media where data may be stored and later overwritten, such as a rewritable optical disc or an erasable memory device.

[0032] Definitions for other certain words and phrases are provided throughout this patent document. Those of ordinary skill in the art should understand that in many if not most instances, such definitions apply to prior as well as future uses of such defined words and phrases.

[0033] FIGS. 1-10, discussed below, and the various embodiments used to describe the principles of the present disclosure in this patent document are by way of illustration only and should not be construed in any way to limit the scope of the disclosure. Those skilled in the art will understand that the principles of the present disclosure may be implemented in any suitably arranged system or device.

[0034] As introduced above, power amplifiers typically consume the majority of the power budget of the base station. While it is convenient to model power amplifiers as having a fixed gain, there is a nonlinear relationship between input and output power. As the input power increases, a fixed gain is not perfectly maintained. Power amplifiers are also highly nonlinear and exhibit memory effects. The power amplifier nonlinearity may harm the error vector magnitude (EVM) of a signal. Moreover, the nonlinearity may create spectral regrowth around the main carrier. This out-of-band emission is limited to an adjacent channel leakage ratio (ACLR) of -45 dBc in many 3GPP-based standards. To achieve this, most transmitters deploy digital pre-distortion (DPD), where the inverse nonlinearity of the power amplifier is used so that the cascade of DPD and the power amplifier is linearized.

[0035] Another method used to increase PAE is digital envelope tracking (DET), which dynamically adjusts the bias voltage based on the instantaneous baseband-signal envelope. When the envelope power decreases, the bias voltage is also reduced, resulting in power savings. However, the transition and settling time associated with changing the supply voltage of power amplifiers may momentarily disrupt the power amplifier output signal. As the DET switching frequency increases, signal quality degradation becomes a significant concern.

[0036] Additionally, conventional DPD techniques assume static power amplifier nonlinearity, not effectively addressing the challenges in DET power amplifier linearization. While DPD is used to linearize power amplifier functionality, modeling and linearizing power amplifier around the transition time is still a significant challenge. Each transition may require a dedicated DPD model, which increases DPD modeling complexity in combination with the number of DET levels.

[0037] Accordingly, the present disclosure provides systems and methods for non-periodic digital envelope tracking for power amplifiers. As described herein, the present disclosure includes a DET level calculator and a DET decision module that is refined based on a Low Power Search algorithm to adjust supply voltages provided to a power amplifier, such as when the input power is low, to reduce power consumption of the power amplifier.

[0038] To meet the demand for wireless data traffic having increased since deployment of 4G communication systems and to enable various vertical applications, 5G / NR communication systems have been developed and are currently being deployed. The 5G / NR communication system is considered to be implemented in higher frequency (mmWave) bands, e.g., 28 GHz or 60GHz bands, so as to accomplish higher data rates or in lower frequency bands, such as 6 GHz, to enable robust coverage and mobility support. To decrease propagation loss of the radio waves and increase the transmission distance, the beamforming, massive multiple-input multiple-output (MIMO), full dimensional MIMO (FD-MIMO), array antenna, an analog beam forming, large scale antenna techniques are discussed in 5G / NR communication systems.

[0039] In addition, in 5G / NR communication systems, development for system network improvement is under way based on advanced small cells, cloud radio access networks (RANs), ultra-dense networks, device-to-device (D2D) communication, wireless backhaul, moving network, cooperative communication, coordinated multi-points (CoMP), reception-end interference cancelation and the like.

[0040] The discussion of 5G systems and frequency bands associated therewith is for reference as certain embodiments of the present disclosure may be implemented in 5G systems. However, the present disclosure is not limited to 5G systems or the frequency bands associated therewith, and embodiments of the present disclosure may be utilized in connection with any frequency band. For example, aspects of the present disclosure may also be applied to deployment of 5G communication systems, 6G or even later releases which may use terahertz (THz) bands.

[0041] Hereinafter, embodiments of the disclosure will be described in detail with reference to the accompanying drawings.

[0042] In describing the embodiments, descriptions related to technical contents well-known in the art and not associated directly with the disclosure will be omitted. Such an omission of unnecessary descriptions is intended to prevent obscuring of the main idea of the disclosure and more clearly transfer the main idea.

[0043] For the same reason, in the accompanying drawings, some elements may be exaggerated, omitted, or schematically illustrated. Further, the size of each element does not completely reflect the actual size. In the drawings, identical or corresponding elements are provided with identical reference numerals or different reference numerals.

[0044] The advantages and features of the disclosure and ways to achieve them will be apparent by making reference to embodiments as described below in detail in conjunction with the accompanying drawings. However, the disclosure is not limited to the embodiments set forth below, but may be implemented in various different forms. The following embodiments are provided only to completely disclose the disclosure and inform those skilled in the art of the scope of the disclosure, and the disclosure is defined only by the scope of the appended claims. Throughout the specification, the same or like reference numerals designate the same or like elements. Furthermore, in describing the disclosure, a detailed description of known functions or constitution incorporated herein will be omitted in the case that it is determined that the description may make the subject matter of the disclosure unnecessarily unclear. The terms which will be described below are terms defined in consideration of the functions in the disclosure, and may be different according to users, intentions of the operators, or customs. Therefore, the definitions of the terms should be made based on the contents throughout the specification.

[0045] Herein, it will be understood that each block of the flowchart illustrations, and combinations of blocks in the flowchart illustrations, may be performed based on computer program instructions. These computer program instructions may be loaded collectively onto at least one processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which perform through any one of, or in any combination of, the at least one processor of the computer or other programmable data processing apparatus, create means for performing the functions specified in the flowchart block(s). These computer program instructions may also be stored in a non-transitory computer usable or computer-readable memory that may direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer usable or computer-readable memory produce an article of manufacture including instruction means that perform the function specified in the flowchart block(s). The computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable data processing apparatus to produce a computer executed process such that the instructions that perform on the computer or other programmable data processing apparatus provide steps for executing the functions specified in the flowchart block(s).

[0046] Further, each block may represent a module, segment, or portion of code, which includes one or more executable instructions for executing the specified logical function(s). It should also be noted that in some alternative implementations, the functions noted in the blocks may occur out of the order. For example, two blocks(or functions) shown in succession may in fact be performed substantially concurrently or the blocks may sometimes be performed in the reverse order, depending upon the functionality involved.

[0047] As used in embodiments of the disclosure, a “~unit” may refer to a software element or a hardware element, such as a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC), which performs a predetermined function. However, the term including the word “~unit” does not always have a meaning limited to software or hardware. The “~unit” may be constructed either to be stored in an addressable storage medium or to execute one or more processors. Therefore, the “~unit” includes, for example, software elements, object-oriented software elements, components such as class elements and task elements, processes, functions, properties, procedures, sub-routines, segments of a program code, drivers, firmware, micro-codes, circuits, data, database, data structures, tables, arrays, and parameters. The components and functions provided by the “~unit” may be either combined into a smaller number of components and a “~unit,” or divided into additional components and a “~unit.” Moreover, the components and “~units” may be implemented to reproduce one or more central processing units (CPUs) within a device or a security multimedia card. Further, in the embodiments, the “~unit” may include one or more processors.

[0048] It should be appreciated that the blocks in each flowchart and combinations of the flowcharts may be performed by one or more computer programs which include instructions. The entirety of the one or more computer programs may be stored in a single memory device or the one or more computer programs may be divided with different portions stored in different multiple memory devices.

[0049] Any of the functions or operations described herein can be processed by one processor or a combination of processors. The one processor or the combination of processors is circuitry performing processing and includes circuitry like an application processor (AP, e.g. a CPU), a communication processor (CP, e.g., a modem), a graphics processing unit (GPU), a neural processing unit (NPU) (e.g., an artificial intelligence (AI) chip), a Wi-Fi chip, a Bluetooth® chip, a global positioning system (GPS) chip, a near field communication (NFC) chip, connectivity chips, a sensor controller, a touch controller, a finger-print sensor controller, a display driver integrated circuit (IC), an audio CODEC chip, a universal serial bus (USB) controller, a camera controller, an image processing IC, a microprocessor unit (MPU), a system on chip (SoC), an IC, or the like.

[0050] It will be appreciated that various embodiments of the disclosure according to the claims and description in the specification can be realized in the form of hardware, software or a combination of hardware and software.

[0051] Any such software may be stored in non-transitory computer readable storage media. The non-transitory computer readable storage media store one or more computer programs (software modules), the one or more computer programs include computer-executable instructions that, when executed by one or more processors of an electronic device individually or collectively, cause the electronic device to perform a method of the disclosure.

[0052] Any such software may be stored in the form of volatile or non-volatile storage such as, for example, a storage device like read only memory (ROM), whether erasable or rewritable or not, or in the form of memory such as, for example, random access memory (RAM), memory chips, device or integrated circuits or on an optically or magnetically readable medium such as, for example, a compact disk (CD), digital versatile disc (DVD), magnetic disk or magnetic tape or the like. It will be appreciated that the storage devices and storage media are various embodiments of non-transitory machine-readable storage that are suitable for storing a computer program or computer programs comprising instructions that, when executed, implement various embodiments of the disclosure. Accordingly, various embodiments of the present disclosure may provide a program comprising code for implementing apparatus or a method as claimed in any one of the claims of this specification and a non-transitory machine-readable storage storing such a program.

[0053] Hereinafter, the determination of priority between A and B in the present disclosure may refer to various actions such as selecting the one having a higher priority based on a predefined priority rule and performing an operation corresponding thereto, or omitting or dropping an operation corresponding to the one having a lower priority.

[0054] Hereinafter, "A or B" as described in the present disclosure may be understood as "A and / or B," which may include A, or B, or both A and B.

[0055] In addition, "at least one of A, B, and C" as described in the present disclosure may be understood to include A, or B, or C, or any combination of A, B, and C.

[0056] In addition, "at least one of A, B, or C" as described in the present disclosure may be understood to include A, or B, or C, or any combination of A, B, and C.

[0057] Furthermore, "A / B" as described in the present disclosure may be understood as "A and / or B," which may include A, or B, or both A and B.

[0058] Furthermore, "A, B" as described in the present disclosure may be understood as "A and / or B," which may include A, or B, or both A and B.

[0059] Furthermore, "A and B" as described in the present disclosure may be understood as "A and / or B," which may include A, or B, or both A and B.

[0060] Furthermore, “if condition A and condition B are satisfied,” as described in the present disclosure, may not be limited to a case where both condition A and condition B are satisfied, but may be understood to include a case where either condition A or condition B is individually satisfied, both condition A and condition B are satisfied, or one or more additional conditions are satisfied in combination.

[0061] Furthermore, throughout this disclosure, ordinal terms such as "first," "second," "third," etc., (and similar qualifiers) are used merely to distinguish between different instances, occurrences, configurations, messages, stages, or aspects of elements, operations, or information as described herein. Unless the context clearly dictates otherwise, the use of such ordinal terms does not itself require that the elements, operations, or information distinguished by these terms be structurally different, numerically distinct, or substantively dissimilar. For example, a "first signal" and a "second signal" may refer to instances of the same signal transmitted at different times or containing the same core information despite minor variations, or they may refer to signals with different content or characteristics, depending on the specific context. Similarly, a "first value" and a "second value" may represent the same magnitude but measured or applied in different circumstances, or they may represent different magnitudes. The interpretation should be guided by the specific technical context, function, and relationship described in the relevant portion of the specification and claims.

[0062] Furthermore, the terms “first ~”, “second ~”, etc., as described in the present disclosure with respect to various elements (e.g., information, objects, operation, sequences, or the like), should not limit those elements. These terms may only be intended to distinguish one element from another, and may not be intended to indicate a specific order. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element.

[0063] Furthermore, even if “first ~” and “second ~” are described in the present disclosure, it may be understood that element(s) referred to by “first ~” and “second ~” may be the same or different. For example, in case of element(s) being information, first information and second information may both be same information and, in some cases, are separate and different information.

[0064] In addition, the terms “if ~” and “in case that ~” as used in the disclosure or claims may be interpreted to include the meanings of “when (or upon) ~,” “in response to ~,” “based on ~,” or “according to ~,” and may be used interchangeably with these expressions. In addition, expressions other than those exemplified herein may also be used, as long as they have substantially the same meaning and do not impair the technical features of the present disclosure.

[0065] For example, the physical layer signaling may be referred to as Layer 1 (L1) signaling and may include downlink control information (DCI). In addition, the higher layer signaling may include a medium access control (MAC) control message, a radio resource control (RRC) signaling message, a non-access stratum (NAS) signaling message, or an application layer message. The RRC signaling message may be referred to as L3 (layer 3) signaling. It should be noted, however, that the higher layer signaling is not limited to the aforementioned examples.

[0066] In addition, the term "not perform" as used in the present disclosure or claims may, in context, be understood to mean that the corresponding step is omitted or skipped. Such a term may be replaced with other terms having the same or substantially equivalent meaning.

[0067] In addition, "transmitting a message including A and B" as described in the present disclosure, may be understood as encompassing both (i) transmitting A and B in a single message, and (ii) transmitting A and B separately via multiple messages (e.g., transmitting a first message including A and a second message including B). This interpretation may also apply to messages that include two or more items (e.g., A, B, C), transmitted either together or separately.

[0068] In addition, "transmitting a message including A and transmitting a message including B" may also be interpreted as transmitting a message including A and B in a single message.

[0069] In the specific embodiments of the present disclosure described below, terms or components included in the disclosure may be expressed in singular or plural form depending on the specific embodiments presented. However, such singular or plural expressions are selected appropriately for convenience of description, and the present disclosure is not limited to a singular or plural number of components. A component expressed in the plural form may be implemented as a single component, and a component expressed in the singular form may be implemented as multiple components.

[0070] The drawings or flowcharts described below illustrate exemplary methods that may be implemented according to the principles of the present disclosure, and various modifications may be made to the methods illustrated in the flowcharts of the present disclosure. For example, although illustrated as a series of steps, various steps in each drawing or flowchart may overlap, occur in parallel, occur in a different order, or be repeated. In other examples, any step may be omitted or replaced with another step.

[0071] The methods and apparatuses proposed in the embodiments of the present disclosure are not limited to each embodiment individually, but may also be applied in combination of all or some of the embodiments proposed in the disclosure. Therefore, the embodiments of the present disclosure may be modified and applied without significantly departing from the scope of the present disclosure, as would be understood by those skilled in the art.

[0072] In this case, even if certain wordings are described differently across embodiments, they may be used interchangeably or in substitution or in combination if their underlying concepts are equivalent. For example, for the same or equivalent concept, even if one embodiment uses the expression "A" and another embodiment uses the expression "B", such expressions may be understood interchangeably, in substitution, or in combination.

[0073] The terms used in the following description to refer to access nodes, network entities, messages, interfaces between network entities, various types of identification information, and the like, are provided merely for the convenience of explanation by way of example. Therefore, the present disclosure is not limited to the terms described below, and other terms having equivalent technical meanings may also be used. Such terms may also be interchangeable with terms defined in any 3rd generation partnership project　(3GPP) technical specifications (TS) where appropriate.

[0074] Hereinafter, a base station is an entity that allocates resources to terminals, and may be at least one of a gNode B, an eNode B, a Node B, a base station (BS), a wireless access unit, a BS controller, or a node on a network.

[0075] Furthermore, the base station of the present disclosure may include a split architecture comprising a central unit (CU) and a distributed unit (DU). In this structure, the CU is configured to process the higher layers of the control and user planes, while the DU is configured to process lower-layer radio resource functions. The embodiments of the present disclosure may be equally applicable to 5G base station architectures in which such CU and DU functional splits are implemented.

[0076] A terminal may include a UE, a mobile station (MS), a cellular phone, a smartphone, a computer, or a multimedia system capable of performing communication functions.

[0077] In the disclosure, a downlink (DL) refers to a radio link through which a BS transmits a signal to a UE, and an uplink (UL) refers to a radio link through which a UE transmits a signal to a BS.

[0078] Furthermore, hereinafter, 5th generation (5G) mobile communication technologies (e.g., 5G new radio (NR)), 6th generation (6G) mobile communication technologies may be described by way of example, but the embodiments of the present disclosure may also be applied to other communication systems having similar technical backgrounds or channel types. For example, newly evolved mobile communication systems developed after 5G and 6G may be included. Furthermore, based on determinations by those skilled in the art, the embodiments of the present disclosure may also be applied to other communication systems (e.g., Wi-Fi systems) through some modifications without significantly departing from the scope of the present disclosure

[0079] In the following description, the terms physical channel and signal may be used interchangeably with data or control signal. For example, the term physical downlink shared channel (PDSCH) refers to a physical channel through which data is transmitted, but the term PDSCH may also be used to refer to the data itself. That is, in the present disclosure, the expression "transmit a physical channel" may be interpreted as being equivalent to the expression "transmit data or a signal via a physical channel."

[0080] Hereinafter, in the context of the present disclosure, higher layer signaling may refer to signaling corresponding to at least one or any combination of the following: master information block (MIB), system information block (SIB) or SIB M (M = 1, 2, ...), radio resource control (RRC), or medium access control (MAC) control element (CE), or a non-access stratum (NAS) signaling message, or an application layer message. The RRC signaling message may be referred to as L3 (layer 3) signaling.

[0081] In addition, L1 signaling may refer to signaling corresponding to at least one or any combination of signaling techniques using the at least one or any combination of the following physical layer channels or signaling: physical downlink control channel (PDCCH), downlink control information (DCI), user equipment (UE)-specific DCI, group-common DCI, common DCI, scheduling DCI (e.g., DCI used for scheduling downlink or uplink data), non-scheduling DCI (e.g., DCI not used for scheduling downlink or uplink data) physical uplink control channel (PUCCH), or uplink control information (UCI). The L1 signaling message may be referred to as a physical layer signaling.

[0082] Hereinafter, the expression that information is configured by the BS, as used in the present disclosure or claims, may, in context, be understood to mean that the terminal receives the corresponding information from the BS via a physical layer signaling or a higher layer signaling. Such an expression may be replaced with other terms having the same or substantially equivalent meaning.

[0083] Hereinafter, the operational principle of the present disclosure will be described in detail with reference to the accompanying drawings.

[0084] FIGS. 1-3 below describe various embodiments implemented in wireless communications systems and with the use of orthogonal frequency division multiplexing (OFDM) or orthogonal frequency division multiple access (OFDMA) communication techniques. The descriptions of FIGS. 1-3 are not meant to imply physical or architectural limitations to the manner in which different embodiments may be implemented. Different embodiments of the present disclosure may be implemented in any suitably arranged communications system.

[0085] FIG. 1 illustrates an example wireless network according to embodiments of the present disclosure. The embodiment of the wireless network shown in FIG. 1 is for illustration only. Other embodiments of the wireless network 100 could be used without departing from the scope of this disclosure.

[0086] As shown in FIG. 1, the wireless network includes a gNB 101 (e.g., base station, BS), a gNB 102, and a gNB 103. The gNB 101 communicates with the gNB 102 and the gNB 103. The gNB 101 also communicates with at least one network 130, such as the Internet, a proprietary Internet Protocol (IP) network, or other data network.

[0087] The gNB 102 provides wireless broadband access to the network 130 for a first plurality of user equipment (UEs) within a coverage area 120 of the gNB 102. The first plurality of UEs includes a UE 111, which may be located in a small business; a UE 112, which may be located in an enterprise; a UE 113, which may be a WiFi hotspot; a UE 114, which may be located in a first residence; a UE 115, which may be located in a second residence; and a UE 116, which may be a mobile device, such as a cell phone, a wireless laptop, a wireless PDA, or the like. The gNB 103 provides wireless broadband access to the network 130 for a second plurality of UEs within a coverage area 125 of the gNB 103. The second plurality of UEs includes the UE 115 and the UE 116. In some embodiments, one or more of the gNBs 101-103 may communicate with each other and with the UEs 111-116 using 5G / NR, long term evolution (LTE), long term evolution-advanced (LTE-A), WiMAX, WiFi, or other wireless communication techniques.

[0088] Depending on the network type, the term “base station” or “BS” can refer to any component (or collection of components) configured to provide wireless access to a network, such as transmit point (TP), transmit-receive point (TRP), an enhanced base station (eNodeB or eNB), a 5G / NR base station (gNB), a macrocell, a femtocell, a WiFi access point (AP), or other wirelessly enabled devices. Base stations may provide wireless access in accordance with one or more wireless communication protocols, e.g., 5G / NR 3rdgeneration partnership project (3GPP) NR, long term evolution (LTE), LTE advanced (LTE-A), high speed packet access (HSPA), Wi-Fi 802.11a / b / g / n / ac, etc. For the sake of convenience, the terms “BS” and “TRP” are used interchangeably in this patent document to refer to network infrastructure components that provide wireless access to remote terminals. Also, depending on the network type, the term “user equipment” or “UE” can refer to any component such as “mobile station,” “subscriber station,” “remote terminal,” “wireless terminal,” “receive point,” or “user device.” For the sake of convenience, the terms “user equipment” and “UE” are used in this patent document to refer to remote wireless equipment that wirelessly accesses a BS, whether the UE is a mobile device (such as a mobile telephone or smartphone) or is normally considered a stationary device (such as a desktop computer or vending machine).

[0089] Dotted lines show the approximate extents of the coverage areas 120 and 125, which are shown as approximately circular for the purposes of illustration and explanation only. It should be clearly understood that the coverage areas associated with gNBs, such as the coverage areas 120 and 125, may have other shapes, including irregular shapes, depending upon the configuration of the gNBs and variations in the radio environment associated with natural and man-made obstructions.

[0090] Although FIG. 1 illustrates one example of a wireless network, various changes may be made to FIG. 1. For example, the wireless network could include any number of gNBs and any number of UEs in any suitable arrangement. Also, the gNB 101 could communicate directly with any number of UEs and provide those UEs with wireless broadband access to the network 130. Similarly, each gNB 102-103 could communicate directly with the network 130 and provide UEs with direct wireless broadband access to the network 130. Further, the gNBs 101, 102, and / or 103 could provide access to other or additional external networks, such as external telephone networks or other types of data networks.

[0091] FIG. 2 illustrates an example gNB 102 according to embodiments of the present disclosure. The embodiment of the gNB 102 illustrated in FIG. 2 is for illustration only, and the gNBs 101 and 103 of FIG. 1 could have the same or similar configuration. However, gNBs come in a wide variety of configurations, and FIG. 2 does not limit the scope of this disclosure to any particular implementation of a gNB.

[0092] As shown in FIG. 2, the gNB 102 includes multiple antennas 205a-205n, multiple transceivers 210a-210n, a controller / processor 225, a memory 230, and a backhaul or network interface 235.

[0093] The transceivers 210a-210n receive, from the antennas 205a-205n, incoming RF signals, such as signals transmitted by UEs in the network 100. The transceivers 210a-210n down-convert the incoming RF signals to generate IF or baseband signals. The IF or baseband signals are processed by receive (RX) processing circuitry in the transceivers 210a-210n and / or controller / processor 225, which generates processed baseband signals by filtering, decoding, and / or digitizing the baseband or IF signals. The controller / processor 225 may further process the baseband signals.

[0094] Transmit (TX) processing circuitry in the transceivers 210a-210n and / or controller / processor 225 receives analog or digital data (such as voice data, web data, e-mail, or interactive video game data) from the controller / processor 225. The TX processing circuitry encodes, multiplexes, and / or digitizes the outgoing baseband data to generate processed baseband or IF signals. The transceivers 210a-210n up-converts the baseband or IF signals to RF signals that are transmitted via the antennas 205a-205n.

[0095] The controller / processor 225 can include one or more processors or other processing devices that control the overall operation of the gNB 102. For example, the controller / processor 225 could control the reception of UL channel signals and the transmission of DL channel signals by the transceivers 210a-210n in accordance with well-known principles. The controller / processor 225 could support additional functions as well, such as more advanced wireless communication functions. For instance, the controller / processor 225 could support beam forming or directional routing operations in which outgoing / incoming signals from / to multiple antennas 205a-205n are weighted differently to effectively steer the outgoing signals in a desired direction. Any of a wide variety of other functions could be supported in the gNB 102 by the controller / processor 225.

[0096] The controller / processor 225 is also capable of executing programs and other processes resident in the memory 230, such as an OS. The controller / processor 225 can move data into or out of the memory 230 as required by an executing process.

[0097] The controller / processor 225 is also coupled to the backhaul or network interface 235. The backhaul or network interface 235 allows the gNB 102 to communicate with other devices or systems over a backhaul connection or over a network. The network interface 235 could support communications over any suitable wired or wireless connection(s). For example, when the gNB 102 is implemented as part of a cellular communication system (such as one supporting 5G / NR, LTE, or LTE-A), the interface 235 could allow the gNB 102 to communicate with other gNBs over a wired or wireless backhaul connection. When the gNB 102 is implemented as an access point, the network interface 235 could allow the gNB 102 to communicate over a wired or wireless local area network or over a wired or wireless connection to a larger network (such as the Internet). The interface 235 includes any suitable structure supporting communications over a wired or wireless connection, such as an Ethernet or transceiver.

[0098] The memory 230 is coupled to the controller / processor 225. Part of the memory 230 could include a RAM, and another part of the memory 230 could include a Flash memory or other ROM.

[0099] Although FIG. 2 illustrates one example of gNB 102, various changes may be made to FIG. 2. For example, the gNB 102 could include any number of each component shown in FIG. 2. Also, various components in FIG. 2 could be combined, further subdivided, or omitted and additional components could be added according to particular needs.

[0100] FIG. 3 illustrates an example UE 116 according to embodiments of the present disclosure. The embodiment of the UE 116 illustrated in FIG. 3 is for illustration only, and the UEs 111-115 of FIG. 1 could have the same or similar configuration. However, UEs come in a wide variety of configurations, and FIG. 3 does not limit the scope of this disclosure to any particular implementation of a UE.

[0101] As shown in FIG. 3, the UE　116 includes antenna(s) 305, a transceiver(s) 310, and a microphone 320. The UE　116 also includes a speaker 330, a processor 340, an input / output (I / O) interface (IF) 345, an input 350, a display 355, and a memory 360. The memory 360 includes an operating system (OS) 361 and one or more applications 362.

[0102] The transceiver(s) 310 receives, from the antenna 305, an incoming RF signal transmitted by a gNB of the network 100. The transceiver(s) 310 down-converts the incoming RF signal to generate an intermediate frequency (IF) or baseband signal. The IF or baseband signal is processed by RX processing circuitry in the transceiver(s) 310 and / or processor 340, which generates a processed baseband signal by filtering, decoding, and / or digitizing the baseband or IF signal. The RX processing circuitry sends the processed baseband signal to the speaker 330 (such as for voice data) or is processed by the processor 340 (such as for web browsing data).

[0103] TX processing circuitry in the transceiver(s) 310 and / or processor 340 receives analog or digital voice data from the microphone 320 or other outgoing baseband data (such as web data, e-mail, or interactive video game data) from the processor 340. The TX processing circuitry encodes, multiplexes, and / or digitizes the outgoing baseband data to generate a processed baseband or IF signal. The transceiver(s) 310 up-converts the baseband or IF signal to an RF signal that is transmitted via the antenna(s) 305.

[0104] The processor 340 can include one or more processors or other processing devices and execute the OS 361 stored in the memory 360 in order to control the overall operation of the UE 116. For example, the processor 340 could control the reception of DL channel signals and the transmission of UL channel signals by the transceiver(s) 310 in accordance with well-known principles. In some embodiments, the processor 340 includes at least one microprocessor or microcontroller.

[0105] The processor 340 is also capable of executing other processes and programs resident in the memory 360. The processor 340 can move data into or out of the memory 360 as required by an executing process. In some embodiments, the processor 340 is configured to execute the applications 362 based on the OS 361 or in response to signals received from gNBs or an operator. The processor 340 is also coupled to the I / O interface 345, which provides the UE 116 with the ability to connect to other devices, such as laptop computers and handheld computers. The I / O interface 345 is the communication path between these accessories and the processor 340.

[0106] The processor 340 is also coupled to the input 350, which includes for example, a touchscreen, keypad, etc., and the display 355. The operator of the UE 116 can use the input 350 to enter data into the UE 116. The display 355 may be a liquid crystal display, light emitting diode display, or other display capable of rendering text and / or at least limited graphics, such as from web sites.

[0107] The memory 360 is coupled to the processor 340. Part of the memory 360 could include a random-access memory (RAM), and another part of the memory 360 could include a Flash memory or other read-only memory (ROM).

[0108] Although FIG. 3 illustrates one example of UE 116, various changes may be made to FIG. 3. For example, various components in FIG. 3 could be combined, further subdivided, or omitted and additional components could be added according to particular needs. As a particular example, the processor 340 could be divided into multiple processors, such as one or more central processing units (CPUs) and one or more graphics processing units (GPUs). In another example, the transceiver(s) 310 may include any number of transceivers and signal processing chains and may be connected to any number of antennas. Also, while FIG. 3 illustrates the UE 116 configured as a mobile telephone or smartphone, UEs could be configured to operate as other types of mobile or stationary devices.

[0109] The TX processing circuitry of the gNB 101 may also include one or more power amplifiers coupled to one or more digital-to-analog converters and configured to amplify the baseband signal prior to transmission using the antenna. The one or more power amplifiers receive a supply voltage sufficient to cover the signal envelope of the baseband signal, as shown in FIG.　4.

[0110] FIG. 4 illustrates an example signal envelope 400 of a power amplifier 450. As shown in FIG.　4, the signal envelope 400, which may be represented as amplitude voltage over time, includes a RF envelope 402 representative of a baseband signal supplied to the power amplifier 450 from the DAC 452. In response to receiving the RF envelope 402, the power amplifier 450, using a constant supply voltage source 454 provides a PA supply voltage 404 to generate an output signal 456. The PA supply voltage 404 may need to have a voltage level (e.g., 48 volts as shown) greater than the RF envelope 402 to be effective. The RF envelope 402, however, fluctuates over time, creating a gap 406 between the RF envelope 402 and the PA supply voltage 404. The gap 406 creates an area of wasted energy 408 as the PA supply voltage 404 remains constant despite the RF envelope 402 changing voltage levels over time.

[0111] Further, the gap 406 forces the power amplifier 450 to operate in a power backoff mode. In a power backoff mode, the power amplifier 450 operates at a reduced power level below its maximum output, intentionally lowering the signal received from the DAC 452 to maintain linearity and avoid distortion, especially when dealing with signals that have large peaks in power, ensuring the power amplifier 450 stays within its linear operating region even during high signal bursts from the DAC 452. While operating in backoff mode can improve signal quality, it usually comes at the cost of reduced power efficiency as the power amplifier 450 is not operating at its peak power output. In particular, when the power amplifier 450 operates in a power backoff mode, its power added efficiency (PAE) typically decreases significantly, reducing the effectiveness of the power amplifier 450 in amplifying the RF envelope 402.

[0112] Although FIG. 4 illustrates one example of a signal envelope of a power amplifier, various changes may be made to FIG. 4. For example, the baseband signal may fluctuate between more than two voltage levels, such as between three or more voltage levels, such as between 4 or more voltage levels.

[0113] To improve power efficiency, the area of wasted energy 408 should be minimized between the RF envelope 402 and the PA supply voltage 404. This may be accomplished by addressing the challenges in PA nonlinearity compensation when using DET, for example, by adjusting supply voltages to the power amplifier based on a low power search algorithm over a window of baseband signals using a non-periodic digital envelope tracking system as shown in FIGS. 5A-5B.

[0114] FIG. 5A illustrates an example non-periodic digital envelope tracking system according to embodiments of the present disclosure. The embodiment of the non-periodic digital envelope tracking system 500 shown in FIG. 5A is for illustration only. Other embodiments of the non-periodic digital envelope tracking system 500 could be used without departing from the scope of this disclosure.

[0115] As shown in FIG. 5A, the non-periodic digital envelope tracking system 500 may include a baseband modem 502 that generates and delivers an input signal 504 to a data converter 506. The data converter 506 converts the input signal 504 into in-phase and quadrature (IQ) baseband data 508 from the input signal 504. The data converter 506 produces the IQ baseband data 508 through a data conversion process that includes digital up-conversion and filtering. The data converter 506 then provides the IQ baseband data 508 to a Faster-than-Symbol Power Tracking (FSPT) module 510.

[0116] The FSPT module 510 includes a low power search (LPS) module 512, a DET level calculator 514, and a DET decision module 516. A digital envelope signal 518 is generated by calculating the input signal amplitude level based on the IQ baseband data 508 in the DET level calculator 514 and an LPS algorithm in the LPS module 512 over a window of input signals 504. The DET levels (e.g., DET control bits) are propagated to the DET decision module 516. The FSPT module 510 then outputs a digital envelope signal 518 to a supply modulator 520. The supply modulator 520 receives the digital envelope signal 518 and generates voltage levels according to the digital envelope signal 518. The supply modulator 520 then supplies a supply voltage 522 to a power amplifier 540 based on the voltage levels generated.

[0117] The data converter 506 also transmits the input signal 504 to a buffer 524 which then provides the IQ baseband data 508 to a digital pre-distortion (DPD) module 526. The DPD module 526 generates a pre-distorted RF signal 530 and provides the RF signal 530 to the power amplifier 540 through a radio frequency digital-to-analog converter (RFDAC) 528, which converts the digital signal into an analog signal. The power amplifier 540 then uses the RF signal 530 and the supply voltage 522 to amplify the RF signal 530 and, subsequently, generate and provide an output signal 542 to an antenna 544.

[0118] The FSPT module 510 may use Symbol Power Tracking (SPT) to measure the peak power of samples in an orthogonal frequency-division multiplexing (OFDM) symbol of the IQ baseband data 508 and changes the power amplifier 540 voltage level uniformly at the cyclic prefix time of an OFDM symbol. Additionally, a DET frequency used by the FSPT module 510 may be faster than other SPT methods for further improved efficiency of the power amplifier 540. However, the supply modulator 520 may require support to switch between voltage levels faster while maintaining signal quality (e.g., having low signal distortion).

[0119] The below equation returns the expected power consumptionPDC(in Watt) of power amplifier 540 at the timet. The input and output power arePinandPout(in dBm). Also, the power amplifier 540 gain β (in dB) and PA power efficiency asα.

[0120]

[0121] As shown above, power consumption of the power amplifier 540 changes exponentially with the power Pinof the input signal 504. The LPS algorithm minimizes signal distortions in DET-based systems by shifting voltage levels (e.g., voltage levels provided by the FSPT module 510 and the supply modulator 520) when the transmitted signal power is low, which results in a faster transition time and a smaller over-shoot / under-shoot of the supply voltage 522 during a level change. The LPS algorithm forces transitions to happen when input signal power is at least a minimum over a window of time. Power switching in the supply modulator 520 has a transition and settling time that may need to be modeled for non-linearity compensation.

[0122] FIG. 5B illustrates an example flow chart for digital envelope tracking calculation　550 for the non-periodic digital envelope tracking system of FIG. 5A according to embodiments of the present disclosure. The embodiment of the digital envelope tracking calculation 550 shown in FIG. 5B is for illustration only. Other embodiments of the digital envelope tracking calculation 550 could be used without departing from the scope of this disclosure.

[0123] As shown in FIG. 5B, the digital envelope tracking calculation 550 of the non-periodic digital envelope tracking system 500 may be implemented by a DET level and transition computation engine 570 of the FSPT module 510 (e.g., within the DET decision module 516) and includes initializing the DET decision module and the DET level calculator with a predetermined or default value for digital envelopes (operation　552). After the modem starts (operation 554), the IQ baseband data 508 is buffered to determine the length of a requested DET period (e.g., a retention time) in operation 556.

[0124] For example, let be the complex IQ baseband data 508 indexed byn.Letfrepresent the DET decision function that maps thenth baseband sample of to a DET level for a set ofLvoltage levels denoted by The DET level computation 550 is broken down to small packet processing indexed by thekth window with a retention time (e.g., window length) for each packet. Both the buffer 524 (e.g., as a moving average power calculator) and the DET level calculator 514 will buffer the retention time of the input signal 504 where The DET decision module 516 may consider realistic constraints, such as the minimum retention time at any level as well as a maximum transition time, based on the IQ baseband data　508.

[0125] Subsequently, the envelope level with the largest relative area over the retention time is identified using the DET decision module 516 (operation 558). For example, to account for system constraints, the DET decision module 516 will, after the IQ baseband data 508 is buffered for the retention timeTw, determine a DET level for thekth window over the maximum value of each retention timeTw. The DET level is determined, for example, by:

[0126] The DET decision module will determine if the newly calculated DET level is the same as a previous DET level (operation 560) or, if during an initial DET calculation, if the newly calculated DET level is the same as the default or predetermined DET level. For example, the DET decision module 516 verifies if the current calculated level is the same as a previous level If the new DET level and the previous (or default) DET level are not the same, the FSPT module 510 (e.g., via the DET decision module 516) will initiate a transition DET level change.

[0127] If DET level change is initiated, for example, the LPS module 512 implements an LPS algorithm to determine a minimum power level of the input signal 504 (operation 562). In other words, the transition time will be set by the LPS module 512 at a time that the input signal 504 power is at a minimum, for example, where the LPS algorithm uses the below functions:

[0128] and

[0129]

[0130] Once the minimum power level of the IQ baseband data 508 is determined, a DET level change is transmitted (e.g., to the DET level calculator 514) during a time during the retention timeTwthat the signal power of the input signal 504 is at a minimum.

[0131] After this, updates are written to the DET decision module (operation 566). Similarly, if the current calculated level and the previous level are the same (operation 560), the calculation 550 proceeds to operation 566 and the FSPT module 510 will buffer a subsequent instance of the IQ baseband data 508 using the DET level calculator 514.

[0132] Although FIGS. 5A and 5B illustrate an example non-periodic digital envelope tracking system, various changes may be made to FIGS. 5A and 5B. For example, various components in FIGS. 5A and 5B could be combined, further subdivided, or omitted and additional components could be added according to particular needs. Also, the DPD module may include a neural network to generate the digital pre-distortion signal or the input signa may include a plurality of input signals, such as in a multi-carrier system as shown in FIG. 6.

[0133] FIG. 6 illustrates an example multi-carrier non-periodic digital envelope tracking system 600 according to embodiments of the present disclosure. The embodiment of the multi-carrier non-periodic digital envelope tracking system 600 shown in FIG. 6 is for illustration only. Other embodiments of the multi-carrier non-periodic digital envelope tracking system 600 could be used without departing from the scope of this disclosure. In particular, the multi-carrier non-periodic digital envelope tracking system 600 is configured similarly to the non-periodic digital envelope tracking system 500 of FIG. 5A except as otherwise described.

[0134] As shown in FIG. 6, the multi-carrier non-periodic digital envelope tracking system 600 may include a plurality of baseband input signals 610, such as a first baseband input signal 612 and a second baseband input signal 614. Each of the plurality of baseband input signals 610 may originate from a single modem (e.g., the baseband modem 502) or multiple modems. Each of the plurality of baseband input signals 610 may then be processed by a plurality of upsamplers 620. For example, the first baseband input signal 612 may be upsampled by a first upsampler 622 and the second baseband input signal 614 may be upsampled by a second upsampler 624. The upsampled plurality of baseband input signals 610 are then phase shifted by one or more phase shifters 630 and combined using one or more frequency multiplexors 640.

[0135] The combined plurality of baseband input signals 610 may then be used as input into the FSPT module 510 and the DPD module 526 for processing as described in FIGS. 5A and 5B, although the sampling frequency is higher and should match the component carrier-combining frequency.

[0136] Although FIG. 6 illustrates an example non-periodic digital envelope tracking system, various changes may be made to FIG. 6. For example, various components in FIG. 6 could be combined, further subdivided, or omitted and additional components could be added according to particular needs.

[0137] FIG. 7 illustrates an example method 700 of non-periodic digital envelope tracking according to embodiments of the present disclosure. An embodiment of the method illustrated in FIG. 7 is for illustration only. One or more of the components illustrated in FIG. 7 may be implemented in specialized circuitry configured to perform the noted functions or one or more of the components may be implemented by one or more processors executing instructions to perform the noted functions. Other embodiments of digital pre-distortion could be used without departing from the scope of this disclosure.

[0138] A default digital envelope tracking (DET) level is set in a DET level calculator 514 of a Faster-than-Symbol Power Tracking (FSPT) module 510 in step 702. For example, the DET level calculator 514 may include predetermined DET levels based on anticipated RF load scenarios or arbitrary levels.

[0139] In-phase and quadrature (IQ) baseband data 508 in an input signal 504 is received using the FSPT module 510 in step 704. For example, the baseband modem 502 may generate the input signal 504 (e.g., based on received RF signals) and deliver the input signal 504 to the data converter 506 to generate IQ baseband data 508 from the input signal 504. The data converter 506 may then deliver the IQ baseband data 508 to the FSPT module 510. Additionally, the IQ baseband data 508 is buffered to determine the length of a requested DET period (e.g., a retention time).

[0140] An input signal 504 amplitude is calculated using the DET level calculator 514 of the FSPT module 510 based on the received IQ baseband data 508 in step 706. Calculating the input signal 504 amplitude may include selecting an envelope level of a plurality of envelope levels of the input signal 504 amplitude within the retention period based on an envelope area then determining if a DET level of the received IQ baseband data 508 is the same as a previous DET level. For example, the envelope level with the largest relative area (e.g., the highest amplitude for a duration of the retention time) over the retention time is identified using the DET decision module 516 by determining a DET level for thekth window over the maximum value of each retention timeTw. The DET decision module will determine if the newly calculated DET level is the same as a previous DET level or, if during an initial DET calculation, if the newly calculated DET level is the same as the default or predetermined DET level.

[0141] The IQ baseband data 508 is processed using a low power search (LPS) module 512 of the FSPT module 510 to produce an LPS output in step 708. For example, upon determining that the DET level of the received IQ baseband data 508 is different than the previous DET level, the LPS module 512 may use the LPS algorithm to determine a minimum power level and produce the LPS output based on the determined minimum power level. The transition time will be set by the LPS module 512 at a time that the input signal 504 power is at a minimum. This will allow for DET level transitions to occur during a period that preserves output signal quality.

[0142] A DET signal is generated using a DET decision module 516 of the FSPT module 510 based on the input signal 504 amplitude and the LPS output in step 710. The DET decision module 516 configured to use non-periodic DET to generate the DET signal. The DET decision module 516 may update the DET level based on the LPS output. For example, the digital envelope signal 518 is generated by calculating the input signal amplitude level based on the IQ baseband data 508 in the DET level calculator 514 and the LPS algorithm in the LPS module 512 over a window of input signals 504. The DET control bits are propagated to the DET decision module 516 to drive the supply modulator 520.

[0143] The DET signal is provided to a supply modulator to drive the power amplifier step 712. For example, the supply modulator 520 may use the DET signal to select a corresponding supply voltage 522 to drive the power amplifier 540.

[0144] A digital pre-distortion signal is provided concurrently with the DET signal to the supply modulator in step 714. For example, the data converter 506 may provide the IQ baseband data 508 to the buffer 524 which subsequently provides the IQ baseband data 508 to the DPD module 526. The DPD module 526 may generate a digital pre-distortion signal using the IQ baseband data 508 and the digital envelope signal 518. The digital pre-distortion signal may then be provided to the power amplifier 540, along with the supply voltage 522, after conversion to an analog signal (e.g., using the RFDAC 528).

[0145] The DET signal is updated based on a DET decision using a low power search (LPS) algorithm of the LPS module 512 to adjust a supply voltage to the power amplifier when an input power of the IQ baseband data 508 is below a predetermined threshold within a retention period in step 716. For example, the FSPT module 510 may receive a subsequent instance of the IQ baseband data 508 (e.g., from subsequent input signals 504) that may require a DET level change as determined by the DET decision module 516, using steps 706-710.

[0146] Although FIG. 7 illustrates one example method 700 for non-periodic digital envelope tracking, various changes may be made to FIG. 7. For example, while shown as a series of steps, various steps in FIG. 7 could overlap, occur in parallel, occur in a different order, or occur any number of times. For example, the non-periodic digital envelope tracking system 500 may continuously repeat steps 710 through 716.

[0147] FIG. 8 is a block diagram of a terminal or user equipment (UE) 800 according to an embodiment of the disclosure. FIG. 8 corresponds to the example of the UE of FIG. 3.

[0148] The terminal is an electronic device capable of wireless communication, may include a User Equipment (UE), a portable phone, a smartphone, a tablet, an Internet of things (IoT) device, etc., having various form factors, and may perform wireless communication with a base station (BS) through a wireless channel.

[0149] Referring to FIG. 8, the UE 800 may include at least one transceiver (hereinafter, referred to as simply “transceiver”) 801, at least one processor (hereinafter, referred to as simply “processor”) 802, and at least one memory (hereinafter, referred to as simply “memory”) 803. According to at least one or a combination of methods corresponding to the embodiments described in the present disclosure, the transceiver 801, the processor 802, and the memory 803 of the UE 800 may operate. However, components of the UE 800 are not limited to the exemplary components illustrated in FIG. 8. In another embodiment, the UE 800 may further include additional components in addition to the above-mentioned components, or some components may be omitted. Further, in some embodiments, any combination of the transceiver 801, the processor 802, or the memory 803 may be integrated in the form of one component.

[0150] The transceiver 801 may be a communication circuit or communication circuitry that enables the UE 800 to perform wireless communication with a node or an entity of a network. For example, the transceiver 801 may enable the UE 800 to transmit or receive a signal to or from a BS through cellular communication, or to transmit or receive a signal to or from another UE through cellular communication. For example, the transceiver 801 may support at least one of various cellular communication technologies including 3rd generation (3G), 4thgeneration (4G), long term evolution (LTE), 5th generation (5G) NR, 6thgeneration (6G), and various cellular wireless communication technologies supported by the transceiver (801) may include all subsequent generations of evolved wireless communications.

[0151] According to an embodiment, the UE 800 may include a plurality of transceivers. For example, in the case of supporting evolved-universal terrestrial radio access-new radio (E-UTRA-NR) sual connectivity (EN-DC), the UE 800 may include a first transceiver supporting the 4G LTE wireless communication and a second transceiver supporting the 5G NR wireless communication. According to another embodiment, in the case of supporting NR-dual connectivity (NR-DC), the UE 800 may include a plurality of transceivers supporting the 5G NR wireless communication. According to still another embodiment, in the case of supporting near field wireless communication, the UE 800 may separately include a transceiver supporting at least one standard in the group of wireless communication protocol standards as defined in the protocol standards for Bluetooth®, wireless local area network (WLAN) network (including institute of electrical and electronics engineers (IEEE) 802.11-2016 standard or its amendments, e.g., 802.11ah, 802.11ad, 802.11ay, 802.11ax, 802.11az, 802.11ba, and 802.11be, without being limited thereto).

[0152] According to an embodiment, the transceiver 801 may include various circuit structures used to transmit or receive signals to or from a BS through a wireless channel. The signals may include control information and data. For example, the transceiver 801 may include a radio frequency (RF) transmitter for up-converting and amplifying the frequency of a transmitted signal and an RF receiver for low-noise-amplifying a received signal and down-converting the frequency thereof. The transceiver 801 may output a signal received through a wireless channel to the processor 802 and may transmit, through a wireless channel, a signal output from the processor 802.

[0153] The processor 802 may control general operations of the UE 800 according to embodiments of the disclosure. The processor 802 may be implemented by one or more integrated circuit (or circuitry) (IC) chips and may execute various data processings. The processor 802 may include at least one electric circuit, and may execute instructions (or a program, codes, data, etc.) stored in the memory 803, individually, collectively or in any combination thereof. Further, the processor 802 may include a single-core processor or multi-core processor, and may include a processor assembly including a plurality of processing circuits (circuitry) according to a specific implementation scheme.

[0154] The processor 802 may be electrically, operatively, or communicatively coupled to the transceiver 801 to control the transceiver 801.

[0155] The processor 802 may include at least one processor (or processing circuitry), and the at least one processor may perform the following operations individually, collectively or in any combination thereof. For example, the processor 802 may include a communication processor (CP) configured to control communication operations and an application processor (AP) configured to control execution of an upper layer (for example, an application layer) . In a specific embodiment, at least a part of the processor 802 may be included in one chip and the other part of the processor 802 may be included in another chip. Otherwise, at least one processor may be included in another component, for example, the transceiver 801 or the memory 803.

[0156] The processor 802 may perform or control or cause an operation of the UE 800 for executing at least one or a combination of methods according to embodiments of the disclosure. For example, the processor 802 may control operations of the UE 800 for processing a downlink signal received from a BS or generating and transmitting an uplink signal to a BS. To this end, the processor 802 may execute a computer program, codes, or instructions stored in the memory 803, so as to control other components of the UE 800 to enable execution of various operations.

[0157] The memory 803 corresponds to a hardware storage device capable of temporarily or permanently storing information and may include one or more storage media. For example, the memory 803 may include a memory assembly including one or more storage media. For example, the one or more storage media may include permanent memory, such as a hard drive, flash memory, or read-only memory (ROM), semipermanent memory, such as random access memory (RAM), cache memory, or a combination thereof.

[0158] The memory 803 may be electrically, operatively, or communicatively coupled to the processor 802 and may be accessed by the processor 802.

[0159] The memory 803 may store a computer program, codes, or instructions executable by the processor 802. According to an embodiment, a computer program, codes, or instructions executable by the processor 802 may be either stored in a single memory device or separated and distributedly stored in two or more memory devices. By executing the instructions stored in the memory 803, the processor 802 may perform various functions according to an embodiment of the disclosure.

[0160] According to an embodiment of the disclosure, operations of the UE 800 may be caused to be performed based on execution of instructions (or a computer program or codes) stored in the memory 803 by at least one processor (or processing circuitry) configured to execute the same individually, collectively, or in any combination thereof, based on processing circuitry that is not configured to execute instructions, and / or based on components of processing circuitry that is not configured to execute instructions.

[0161] FIG. 9 is a block diagram of a base station (BS) 900 according to an embodiment of the disclosure. FIG. 9 corresponds to the example of the gNB of FIG. 2.

[0162] The BS 900 may perform wireless communication with at least one user equipment (UE) located within the area of the BS 900 through a wireless channel.

[0163] Referring to FIG. 9, the BS 900 may include at least one transceiver (hereinafter, referred to as simply “transceiver”) 901, at least one processor (hereinafter, referred to as simply “processor”) 902, and at least one memory (hereinafter, referred to as simply “memory”) 903. According to at least one or a combination of methods corresponding to the embodiments described in the present disclosure, the transceiver 901, the processor 902, and the memory 903 of the BS 900 may operate. However, components of the BS 900 are not limited to the exemplary components illustrated in FIG. 9. In another embodiment, the BS 900 may further include additional components in addition to the above-mentioned components, or some components may be omitted. Further, in some embodiments, any combination of the transceiver 901, the processor 902, or the memory 903 may be integrated in the form of one component.

[0164] The transceiver 901 may be a communication circuit or communication circuitry that enables the BS 900 to perform wireless communication with a node or an entity of a network. For example, the transceiver 901 may enable the BS 900 to transmit or receive a signal to or from the UE X00 through cellular communication, or to transmit or receive a signal to or from another network entity through wireless communication. For example, the transceiver 901 may support various cellular communication technologies including 3rd generation (3G), 4thgeneration (4G), long term evolution (LTE), 5th generation (5G) NR, 6thgeneration (6G), and various cellular wireless communication technologies supported by the transceiver (901) may include all subsequent generations of evolved wireless communications.. According to an embodiment, the transceiver 901 may include various circuit structures used to transmit or receive signals to or from a UE through a wireless channel. The signals may include control information and data. For example, the transceiver 901 may include a radio frequency (RF) transmitter for up-converting and amplifying the frequency of a transmitted signal and an RF receiver for low-noise-amplifying a received signal and down-converting the frequency thereof. The transceiver 901 may output a signal received through a wireless channel to the processor 902 and may transmit, through a wireless channel, a signal output from the processor 902.

[0165] Meanwhile, according to an embodiment of the present disclosure, the BS 900 may perform communication with a node or an entity of a network through wired or wireless communication. For example, the BS 900 may perform wired or wireless communication with an adjacent BS, or a node or an entity of a core network through a backhaul network. Although not illustrated in FIG. 9, when the BS 900 performs wired communication, the BS 900 may further include a separate network interface for wired communication in addition to the transceiver 901. The network interface may be referred to as network interface circuitry or communication interface circuitry.

[0166] The processor 902 may control general operations of the BS 900 according to embodiments of the disclosure. The processor 902 may be implemented by one or more integrated circuit (or circuitry) (IC) chips and may execute various data processings. The processor 902 may include at least one electric circuit, and may execute instructions (or a program, codes, data, etc.) stored in the memory 903, individually, collectively or in any combination thereof. Further, the processor 902 may include a single-core processor or multi-core processor, and may include a processor assembly including a plurality of processing circuits (circuitry) according to a specific implementation scheme.

[0167] The processor 902 may be electrically, operatively, or communicatively coupled to the transceiver 901 to control the transceiver 901.

[0168] The processor 902 may include at least one processor (or processing circuitry), and the at least one processor may perform the following operations individually, collectively or in any combination thereof. In a specific embodiment, at least a part of the processor 902 may be included in one chip and the other part of the processor 902 may be included in another chip. Otherwise, at least one processor may be included in another component, for example, the transceiver 901 or the memory 903.

[0169] The processor 902 may perform or control or cause an operation of the BS 900 for executing at least one or a combination of methods according to embodiments of the disclosure. For example, the processor 902 may control operations of the BS 900 for generating and transmitting a downlink signal to a UE or processing an uplink signal received from a UE. Otherwise, the BS 900 may transmit or receive a signal to or from a neighboring BS, transfer a signal received from a UE to an upper node of the network, or transmit a signal transferred from an upper node of the network to a UE. To this end, the processor 902 may execute a computer program, codes, or instructions stored in the memory 903, so as to control other components of the BS 900 to enable execution of various operations.

[0170] The memory 903 corresponds to a hardware storage device capable of temporarily or permanently storing information and may include one or more storage media. For example, the memory 903 may include a memory assembly including one or more storage media. For example, the one or more storage media may include permanent memory, such as a hard drive, flash memory, or read-only memory (ROM), semipermanent memory, such as random access memory (RAM), cache memory, or a combination thereof.

[0171] The memory 903 may be electrically, operatively, or communicatively coupled to the processor 902 and may be accessed by the processor 902.

[0172] The memory 903 may store a computer program, codes, or instructions executable by the processor 902. According to an embodiment, a computer program, codes, or instructions executable by the processor 902 may be either stored in a single memory device or separated and distributedly stored in two or more memory devices. By executing the instructions stored in the memory 903, the processor 902 may perform various functions according to an embodiment of the disclosure.

[0173] According to an embodiment of the disclosure, operations of the BS 900 may be caused to be performed based on execution of instructions (or a computer program or codes) stored in the memory 903 by at least one processor (or processing circuitry) configured to execute the same individually, collectively, or in any combination thereof, based on processing circuitry that is not configured to execute instructions, and / or based on components of processing circuitry that is not configured to execute instructions.

[0174] The UE or the base station may perform various communication procedures related to the control plane or the user plane by cooperating with one or more network entities based on wireless communication. For example, the UE may communicate with network entity such as an Access and Mobility Management Function (AMF) or a Session Management Function (SMF) via the base station, or the base station may perform at least one communication procedure by directly transmitting and receiving signals to / from, or relaying signals between, the network entities.

[0175] The structure of the above-described network entity will be described in more detail with reference to the drawings.

[0176] FIG. 10 is a block diagram of a network entity 1000 according to an embodiment of the disclosure.

[0177] The network entity 1000 may include an entity (apparatus, device, or server, etc.) that performs one or more network functions (NFs) or a part of a network function constituting a core network (e.g., a 5th generation (5G) core (5GC)) in a communication system. In this case, multiple NFs may be implemented within a single network entity, or a single NF may be distributed and implemented across a plurality of network entities. In addition, when an NF is implemented within the network entity, the NF may be implemented in the form of software, and in such a case, a program for operating the NF may be stored in memory of the network entity 1000.

[0178] A single NF may be implemented by one or more instances, which may be deployed on the same network entity or distributed across multiple network entities to operate. The instance may be a software unit that logically executes a specific network function, and may be implemented in a form that is decoupled from physical hardware resources. Further, one or more NFs may be implemented in the form of one network slice to operate to satisfy specifications required by a particular service.

[0179] The NF may include at least one of an access and mobility management function (AMF), a session management function (SMF), a local session management function (L-SMF), a user plane function (UPF), a local user plane function (L-UPF), a policy control function (PCF), a unified data management (UDM), a unified data repository (UDR), a network exposure function (NEF), a network repository function (NRF), an application function (AF), a network slice selection function (NSSF), a network data analytics function (NWDAF), a network slice admission control function (NSACF), an authentication server function (AUSF), or a data network (DN).

[0180] Referring to FIG. 10, the network entity 1000 may include at least one network interface 1001, at least one processor 1002 (hereinafter, “processor”), and at least one memory 1003 (hereinafter, “memory”). As described above, a NF may be implemented in the form of a physical device such as the network entity 1000, or may be virtualized and executed in the form of an instance. When implemented as an instance, the NF need not necessarily include physical components as illustrated in FIG. 10. In such a case, the instance may be logically represented as comprising one or more logical functional elements.

[0181] According to at least one or a combination of methods corresponding to the embodiments described in the present disclosure, the network interface 1001, the processor 1002, and the memory 1003 of the network entity 1000 may operate. However, components of the network entity 1000 are not limited to the exemplary components illustrated in FIG. 10. In another embodiment, the network entity 1000 may further include additional components in addition to the above-mentioned components, or some components may be omitted. Further, in an embodiment, the network interface 1001, the processor 1002, or the memory 1003 may be integrated in the form of one component.

[0182] The network interface 1001 is a collective term for a transmitter part of the network entity 1000 and a receiver part of the network entity 1000, and may be a communication circuit for transmitting or receiving a signal to or from a user equipment (UE), a base station (BS), or another network entity. Here, the communication circuit may include both a communication circuit for wireless communication and a communication circuit for a wired communication. For example, the network interface 1001 may include a circuit, logic, hardware, etc., configured to exchange a control plane message or a user plane message with a UE, a BS, or other core network entities through wireless communication or wired communication. The network interface 1001 may operate using various protocols (e.g., non-access stratum (NAS) protocol). The network interface 1001 may also be referred to, for convenience of description or depending on implementation, as communication circuitry, network interface circuitry, or a communication interface circuitry.

[0183] The processor 1002 may control general operations of the network entity 1000 according to embodiments of the disclosure. The processor 1002 may be implemented by one or more integrated circuit (or circuitry) (IC) chips and may execute various data processings. The processor 1002 may include at least one electric circuit, and may execute instructions (or a program, codes, data, etc.) stored in the memory 1003, individually, collectively or in any combination thereof. Further, the processor 1002 may include a single-core processor or multi-core processor, and may include a processor assembly including a plurality of processing circuits (circuitry) according to a specific implementation scheme. Further, it should be noted that, according to another embodiment, in a case where NF is implemented in the form of an instance, the network function may be not necessarily configured by physical hardware.

[0184] According to an embodiment, the processor 1002 may be electrically, operatively, or communicatively coupled to the network interface 1001 to control the network interface 1001.

[0185] The processor 1002 may include at least one processor (or processing circuitry), and the at least one processor may perform the following operations individually, collectively or in any combination thereof. In a specific embodiment, at least a part of the processor 1002 may be included in one chip and the other part of the processor 1002 may be included in another chip. Otherwise, at least one processor may be included in another component, for example, the network interface 1001 or the memory 1003.

[0186] The processor 1002 may perform or control or cause an operation of the network entity 1000 for executing at least one or a combination of methods according to embodiments of the disclosure. For example, the processor 1002 may control operations of the network entity 1000 for exchanging a control plane message or a user plane message with a UE, a BS, or other core network entities through wireless or wired communication, using various protocols (e.g., NAS protocol). To this end, the processor 1002 may execute a computer program, codes, or instructions stored in the memory 1003, so as to control other components of the network entity 1000 to enable execution of various operations.

[0187] The memory 1003 corresponds to a hardware storage device capable of temporarily or permanently storing information and may include one or more storage media. For example, the memory 1003 may include a memory assembly including one or more storage media. For example, the one or more storage media may include permanent memory, such as a hard drive, flash memory, or read-only memory (ROM), semipermanent memory, such as random access memory (RAM), cache memory, or a combination thereof.

[0188] The memory 1003 may be electrically, operatively, or communicatively coupled to the processor 1002 and may be accessed by the processor 1002.

[0189] The memory 1003 may store a computer program, codes, or instructions executable by the processor 1002. According to an embodiment, a computer program, codes, or instructions executable by the processor 1002 may be either stored in a single memory device or separated and distributedly stored in two or more memory devices. By executing the instructions stored in the memory 1003, the processor 1002 may perform various functions according to an embodiment of the disclosure.

[0190] According to an embodiment of the disclosure, operations of the network entity 1000 may be caused to be performed based on execution of instructions (or a computer program or codes) stored in the memory 1003 by at least one processor (or processing circuitry) configured to execute the same individually, collectively, or in any combination thereof, based on processing circuitry that is not configured to execute instructions, and / or based on components of processing circuitry that is not configured to execute instructions.

[0191] In one embodiment, a method is provided. The method includes setting a default digital envelope tracking (DET) level in a DET level module of a Faster-than-Symbol Power Tracking (FSPT) module and receiving in-phase and quadrature (IQ) baseband data in an input signal using the FSPT module. The method also includes calculating an input signal amplitude using the DET level module of the FSPT module based on the received IQ baseband data and processing the IQ baseband data using a low power search (LPS) module of the FSPT module to produce an LPS output. The method further includes generating a DET signal using a DET decision module of the FSPT module based on the input signal amplitude and the LPS output. The DET decision module is configured to use non-periodic DET to generate the DET signal. The method includes providing the DET signal to a supply modulator to drive a power amplifier.

[0192] In another embodiment, the method is provided. The method further comprising: updating the DET signal based on a DET decision using a low power search (LPS) algorithm of the LPS module to adjust a supply voltage to the power amplifier when an input power of the IQ baseband data is below a predetermined threshold within a retention period.

[0193] In another embodiment, the method is provided. Wherein calculating an input signal amplitude using the DET level module of the FSPT module based on the received IQ baseband data comprises: selecting an envelope level of a plurality of envelope levels of the input signal amplitude within a retention period based on an envelope area; and determining if a DET level of the received IQ baseband data is the same as a previous DET level.

[0194] In another embodiment, the method is provided. Wherein processing the IQ baseband data using the LPS module of the FSPT module to produce the LPS output comprises upon determining that the DET level of the received IQ baseband data is different than the previous DET level, using the LPS algorithm to determine a minimum power level and produce the LPS output based on the determined minimum power level.

[0195] In another embodiment, the method is provided. Wherein generating a DET signal using the DET decision module of the FSPT module based on the input signal amplitude and the LPS output comprises updating the DET level in the DET decision module based on the LPS output.

[0196] In another embodiment, the method is provided. The method further comprising: providing a digital pre-distortion signal concurrently with the DET signal to the supply modulator.

[0197] In another embodiment, the method is provided. Wherein the digital pre-distortion signal is also provided to the power amplifier after conversion to an analog signal.

[0198] In one embodiment, an electronic device is provided. The electronic device includes a power amplifier, and a processor operably coupled to the power amplifier. The processor is configured to cause the electronic device to set a default digital envelope tracking (DET) level in a DET level module of a Faster-than-Symbol Power Tracking (FSPT) module and receive in-phase and quadrature (IQ) baseband data in an input signal using the FSPT module. The processor is also configured to cause the electronic device to calculate an input signal amplitude using the DET level module of the FSPT module based on the received IQ baseband data and process the IQ baseband data using a low power search (LPS) module of the FSPT module to produce an LPS output. The processor is further configured to cause the electronic device to generate a DET signal using a DET decision module of the FSPT module based on the input signal amplitude and the LPS output. The DET decision module is configured to use non-periodic DET to generate the DET signal. The processor is also configured to cause the electronic device to provide the DET signal to a supply modulator to drive the power amplifier.

[0199] In another embodiment, the electronic device is provided. wherein the processor is further configured to cause the electronic device to: update the DET signal based on a DET decision using a low power search (LPS) algorithm of the LPS module to adjust a supply voltage to the power amplifier when an input power of the IQ baseband data is below a predetermined threshold within a retention period.

[0200] In another embodiment, the electronic device is provided. Wherein, while causing the electronic device to calculate an input signal amplitude using the DET level module of the FSPT module based on the received IQ baseband data, the processor is further configured the electronic device to: select an envelope level of a plurality of envelope levels of the input signal amplitude within a retention period based on an envelope area; and determine if a DET level of the received IQ baseband data is the same as a previous DET level.

[0201] In another embodiment, the electronic device is provided. Wherein, while causing the electronic device to process the IQ baseband data using the LPS module of the FSPT module to produce the LPS output, the processor is further configured to cause the electronic device to, upon determining that the DET level of the received IQ baseband data is different than the previous DET level, use the LPS algorithm to determine a minimum power level and produce the LPS output based on the determined minimum power level.

[0202] In another embodiment, the electronic device is provided. Wherein, while causing the electronic device to generate a DET signal using the DET decision module of the FSPT module based on the input signal amplitude and the LPS output, the processor is further configured to cause the electronic device to update the DET level in the DET decision module based on the LPS output.

[0203] In another embodiment, the electronic device is provided. The processor is further configured to cause the electronic device to: provide a digital pre-distortion signal concurrently with the DET signal to the supply modulator.

[0204] In another embodiment, the electronic device is provided. The processor is further configured to cause the electronic device to: provide the digital pre-distortion signal to the power amplifier after conversion to an analog signal.

[0205] In one embodiment, a non-transitory computer-readable medium is provided. The non-transitory computer-readable medium includes program code, that when executed by at least one processor of an electronic device, causes the electronic device to set a default digital envelope tracking (DET) level in a DET level module of a Faster-than-Symbol Power Tracking (FSPT) module and receive in-phase and quadrature (IQ) baseband data in an input signal using the FSPT module. The program code, that when executed by at least one processor of an electronic device, also causes the electronic device to calculate an input signal amplitude using the DET level module of the FSPT module based on the received IQ baseband data and process the IQ baseband data using a low power search (LPS) module of the FSPT module to produce an LPS output. The program code, that when executed by at least one processor of an electronic device, further causes the electronic device to generate a DET signal using a DET decision module of the FSPT module based on the input signal amplitude and the LPS output. The DET decision module is configured to use non-periodic DET to generate the DET signal. The program code, that when executed by at least one processor of an electronic device, also causes the electronic device to provide the DET signal to a supply modulator to drive a power amplifier.

[0206] In another embodiment, the non-transitory computer-readable medium is provided. The non-transitory computer-readable medium further comprising: program code, that when executed by the at least one processor of an electronic device, causes the electronic device to: update the DET signal based on a DET decision using a low power search (LPS) algorithm of the LPS module to adjust a supply voltage to the power amplifier when an input power of the IQ baseband data is below a predetermined threshold within a retention period.

[0207] In another embodiment, the non-transitory computer-readable medium is provided. Wherein the program code, that when executed by the at least one processor, causes the electronic device to calculate an input signal amplitude using the DET level module of the FSPT module based on the received IQ baseband data, further comprises program code, that when executed by the at least one processor, causes the electronic device to: select an envelope level of a plurality of envelope levels of the input signal amplitude within a retention period based on an envelope area; and determine if a DET level of the received IQ baseband data is the same as a previous DET level.

[0208] In another embodiment, the non-transitory computer-readable medium is provided. Wherein the program code, that when executed by the at least one processor, causes the electronic device to process the IQ baseband data using the LPS module of the FSPT module to produce the LPS output, further comprises program code, that when executed by the at least one processor, causes the electronic device to: upon determining that the DET level of the received IQ baseband data is different than a previous DET level, use the LPS algorithm to determine a minimum power level and produce the LPS output based on the determined minimum power level.

[0209] In another embodiment, the non-transitory computer-readable medium is provided. Wherein the program code, that when executed by the at least one processor, causes the electronic device to generate a DET signal using the DET decision module of the FSPT module based on the input signal amplitude and the LPS output, further comprises program code, that when executed by the at least one processor, causes the electronic device to: update the DET level in the DET decision module based on the LPS output.

[0210] In another embodiment, the non-transitory computer-readable medium is provided. the non-transitory computer-readable medium further comprising program code, that when executed by the at least one processor of an electronic device, causes the electronic device to: provide a digital pre-distortion signal concurrently with the DET signal to the supply modulator.

[0211] The above flowcharts illustrate example methods that may be implemented in accordance with the principles of the present disclosure and various changes could be made to the methods illustrated in the flowcharts herein. For example, while shown as a series of steps, various steps in each figure could overlap, occur in parallel, occur in a different order, or occur multiple times. In another example, steps may be omitted or replaced by other steps.

[0212] Although the present disclosure has been described with exemplary embodiments, various changes and modifications may be suggested to one skilled in the art. It is intended that the present disclosure encompass such changes and modifications as fall within the scope of the appended claims. None of the description in this application should be read as implying that any particular element, step, or function is an essential element that must be included in the claims scope. The scope of patented subject matter is defined by the claims.

[0213] Meanwhile, although specific embodiments of the present disclosure have been described in detail, various modifications may be made without departing from the scope of the present disclosure. Therefore, the scope of the present disclosure should not be limited to the described embodiments, but should be defined by the claims and equivalents thereof.

Claims

1.A method comprising:setting a default digital envelope tracking (DET) level in a DET level module of a Faster-than-Symbol Power Tracking (FSPT) module;receiving in-phase and quadrature (IQ) baseband data in an input signal using the FSPT module;calculating an input signal amplitude using the DET level module of the FSPT module based on the received IQ baseband data;processing the IQ baseband data using a low power search (LPS) module of the FSPT module to produce an LPS output;generating a DET signal using a DET decision module of the FSPT module based on the input signal amplitude and the LPS output, the DET decision module configured to use non-periodic DET to generate the DET signal; andproviding the DET signal to a supply modulator to drive a power amplifier.2.The method of claim 1, further comprising:updating the DET signal based on a DET decision using a low power search (LPS) algorithm of the LPS module to adjust a supply voltage to the power amplifier when an input power of the IQ baseband data is below a predetermined threshold within a retention period.3.The method of claim 2, wherein calculating an input signal amplitude using the DET level module of the FSPT module based on the received IQ baseband data comprises:selecting an envelope level of a plurality of envelope levels of the input signal amplitude within a retention period based on an envelope area; anddetermining if a DET level of the received IQ baseband data is the same as a previous DET level.4.The method of claim 3, wherein processing the IQ baseband data using the LPS module of the FSPT module to produce the LPS output comprises upon determining that the DET level of the received IQ baseband data is different than the previous DET level, using the LPS algorithm to determine a minimum power level and produce the LPS output based on the determined minimum power level.5.The method of claim 4, wherein generating a DET signal using the DET decision module of the FSPT module based on the input signal amplitude and the LPS output comprises updating the DET level in the DET decision module based on the LPS output.6.The method of claim 1, further comprising:providing a digital pre-distortion signal concurrently with the DET signal to the supply modulator.7.The method of claim 6, wherein the digital pre-distortion signal is also provided to the power amplifier after conversion to an analog signal.8.An electronic device, comprising:a power amplifier; anda processor operably coupled to the power amplifier and configured to cause the electronic device to:set a default digital envelope tracking (DET) level in a DET level module of a Faster-than-Symbol Power Tracking (FSPT) module;receive in-phase and quadrature (IQ) baseband data in an input signal using the FSPT module;calculate an input signal amplitude using the DET level module of the FSPT module based on the received IQ baseband data;process the IQ baseband data using a low power search (LPS) module of the FSPT module to produce an LPS output;generate a DET signal using a DET decision module of the FSPT module based on the input signal amplitude and the LPS output, the DET decision module configured to use non-periodic DET to generate the DET signal; andprovide the DET signal to a supply modulator to drive the power amplifier.9.The electronic device of claim 8, wherein the processor is further configured to cause the electronic device to:update the DET signal based on a DET decision using a low power search (LPS) algorithm of the LPS module to adjust a supply voltage to the power amplifier when an input power of the IQ baseband data is below a predetermined threshold within a retention period.10.The electronic device of claim 9, wherein, while causing the electronic device to calculate an input signal amplitude using the DET level module of the FSPT module based on the received IQ baseband data, the processor is further configured the electronic device to:select an envelope level of a plurality of envelope levels of the input signal amplitude within a retention period based on an envelope area; anddetermine if a DET level of the received IQ baseband data is the same as a previous DET level.11.The electronic device of claim 10, wherein, while causing the electronic device to process the IQ baseband data using the LPS module of the FSPT module to produce the LPS output, the processor is further configured to cause the electronic device to, upon determining that the DET level of the received IQ baseband data is different than the previous DET level, use the LPS algorithm to determine a minimum power level and produce the LPS output based on the determined minimum power level.12.The electronic device of claim 11, wherein, while causing the electronic device to generate a DET signal using the DET decision module of the FSPT module based on the input signal amplitude and the LPS output, the processor is further configured to cause the electronic device to update the DET level in the DET decision module based on the LPS output.13.The electronic device of claim 8, the processor is further configured to cause the electronic device to:provide a digital pre-distortion signal concurrently with the DET signal to the supply modulator.14.The electronic device of claim 13, the processor is further configured to cause the electronic device to:provide the digital pre-distortion signal to the power amplifier after conversion to an analog signal.15.A non-transitory computer-readable medium comprising program code, that when executed by at least one processor of an electronic device, causes the electronic device to:set a default digital envelope tracking (DET) level in a DET level module of a Faster-than-Symbol Power Tracking (FSPT) module;receive in-phase and quadrature (IQ) baseband data in an input signal using the FSPT module;calculate an input signal amplitude using the DET level module of the FSPT module based on the received IQ baseband data;process the IQ baseband data using a low power search (LPS) module of the FSPT module to produce an LPS output;generate a DET signal using a DET decision module of the FSPT module based on the input signal amplitude and the LPS output, the DET decision module configured to use non-periodic DET to generate the DET signal; andprovide the DET signal to a supply modulator to drive a power amplifier.

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