Automotive-grade chip packaging method and packaging structure

Abstract

The present application belongs to the technical field of chip packaging and discloses an automotive-grade chip packaging method and packaging structure. The method improves the packaging process. The problem of severe high-temperature tape adhesive residue on the surface of an L4 layer in a multi-layer chip is solved, the problem of delamination at an adhesive residue area caused when the final product generates heat during operation can be effectively prevented, and the reliability of the product is significantly improved; the problem of severely thin thickness of an L2 dielectric layer and an L3 dielectric layer at the position close to an embedded power module is solved, and the defect of high-voltage breakdown or conductive cation migration at the position where the dielectric layer is thin during operation of the final product can be effectively prevented; by means of performing a supplementary brown oxide process on the back surface of a heat dissipation copper base, the bonding force between the back surface of the copper base and a semi-cured resin sheet is ensured, and the reliability of the product is improved; and by means of optimizing the heat dissipation channel and increasing the heat dissipation area of an L6 layer, the heat dissipation effect is improved.

Description

A packaging method and packaging structure for automotive-grade chips Technical Field

[0001] This application relates to the field of chip packaging technology, and in particular to a packaging method and packaging structure for automotive-grade chips. Background Technology

[0002] Advances in technologies such as artificial intelligence and the Internet of Things have driven electronic products to become increasingly intelligent, leading to a growing demand for advanced packaging processes. Traditional chip packaging processes primarily involve mounting power chips on a heat-dissipating copper substrate, temporarily fixing the power module within a slot in a double-sided copper-clad laminate using high-temperature tape, bonding conductive copper foil with a prepreg, removing the high-temperature tape, machining blind and through holes to form a semi-finished product, and then performing solder resist printing, exposure, development, and post-curing to create the final product.

[0003] However, the inventors encountered the following problems when packaging the chip according to the original manufacturing process: During the intermediate manufacturing process, when the prepreg was melted at high temperature, the high-temperature tape attached to the chip semi-finished product was also affected by high temperature and pressure. The adhesive layer and film layer of the high-temperature tape were very easy to separate. When removing the high-temperature tape later, adhesive residue remained on the surface, requiring manual cleaning with alcohol, which was labor-intensive. If not cleaned thoroughly, the residual adhesive inside the board could easily cause the product to delaminate and explode, affecting product reliability. The inventors also attempted to use the adhesive flow generated by the melting of the prepreg to fill the gaps between the power module and the through slots in the core board. This results in the dielectric layer thickness of the L2 / 3 layer near the power module being significantly lower than the specified thickness. During subsequent product use, high-voltage breakdown and conductive cation migration defects are prone to occur in areas with thinner dielectric layers. When the power module is browned along the horizontal browning line, the non-perforated structure at the bottom of the fixture prevents the copper base from being fully browned. Due to structural factors, it is impossible to supplement the browning on the back side later, resulting in poor adhesion between the copper base and the L4 / 5 layer prepreg resin in the final product. When the chip manufactured by the original process is in operation, the overall heat dissipation effect is poor due to the limited heat dissipation area. Summary of the Invention

[0004] Therefore, embodiments of this application provide a packaging method and packaging structure for automotive-grade chips, thereby improving product quality and yield.

[0005] Firstly, this application provides a packaging method for automotive-grade chips.

[0006] This application is achieved through the following technical solution:

[0007] A packaging method for automotive-grade chips, comprising:

[0008] S1, the upper surface of the core board is surface treated to form layer L3, the lower surface of the core board is surface treated to form layer L4, and the surface-treated core board is processed with through grooves and browning treatment.

[0009] S2, apply tape to the surface of L4 layer, mount the power module into the through groove, cut the composite adhesive film into a rectangular block of the preset size, and then attach and fix the rectangular block of the adhesive film to the area of ​​the embedded power module on L3 layer.

[0010] S3, the core board after step S2 is subjected to pressure transmission treatment, so that the rectangular block of the adhesive film is heated and melted and filled in the gap between the power module and the core board, and then cured.

[0011] S4, remove the tape from the surface of L4 layer, and perform additional browning treatment on the surface of the heat dissipation copper base of the power module near L4 layer;

[0012] S5, plasma treatment is performed on layers L3 and L4, and multiple layers of semi-cured resin sheets and a layer of copper foil are sequentially stacked on the surface of layer L3 and pressed together to form layer L2, and multiple layers of semi-cured resin sheets and a layer of copper foil are sequentially stacked on the surface of layer L4 and pressed together to form layer L5.

[0013] S6. Drill blind holes between layers L2 and L3 and between layers L5 and L4, fill the blind holes with copper pillars, drill through holes through layers L2 to L5, and metallize the inner wall of the through holes.

[0014] S7, perform surface treatment on the L2 layer of the core board, perform surface treatment on the L5 layer, and perform browning treatment on the surface-treated L2 and L5 layers.

[0015] S8, using a vacuum-plugged resin mesh, the through holes and surface spacing of the L5 layer are filled with resin to obtain the L2 / 5 semi-finished board, and the L2 / 5 semi-finished board is baked in two stages.

[0016] S9, plasma treatment is performed on L2 and L5 layers. Multiple layers of semi-cured resin sheets and a layer of copper foil are stacked on the surface of L2 layer and pressed together to form L1 layer. An RCC material is arranged on the surface of L5 layer and pressed together to form L6 layer.

[0017] S10: Blind holes are machined between layers L1 and L2. The blind holes are filled by electroplating to form copper pillars. Layers L1 and L6 are surface treated to form L1 / 6 semi-finished boards. Processing is carried out on the basis of L1 / 6 semi-finished boards to form the final product.

[0018] In a preferred embodiment of this application, the RCC material in step S9 may be further configured to include a film with a thickness of 135 μm to 150 μm and a copper foil with a thickness of 35 μm. The film comprises 5% epoxy resin and 95% filler particles, wherein the filler particles comprise aluminum oxide and boron nitride.

[0019] In a preferred embodiment of this application, the thermal conductivity of the adhesive film can be further set to 10 W / mK.

[0020] In a preferred example of this application, the L6 layer may be further configured such that no through holes and / or blind holes are machined, so that the L6 layer forms a complete metal surface layer.

[0021] In a preferred embodiment of this application, the semi-cured resin sheet may be further configured to consist of fiberglass cloth and epoxy resin.

[0022] In a preferred embodiment of this application, step S2, which involves punching the composite adhesive film into rectangular blocks of a preset size, includes:

[0023] Take a roll of adhesive film material, which comprises three layers: a 38μm PET film, a 60μm adhesive film, and a 10μm OPP film.

[0024] Take a roll of micro-adhesive film, which comprises three layers: a 30μm PVC film, a 10μm acrylic film, and a 75μm PI film.

[0025] Peel off the OPP film of the adhesive film material and the PVC film of the micro-adhesive film, and attach the adhesive film of the adhesive film material to the acrylic film of the micro-adhesive film to form a composite adhesive film.

[0026] The combined adhesive film is installed on the product shaft of the automatic cutting machine, the adhesive film portion of the combined adhesive film is punched into rectangular adhesive film blocks, and the rectangular adhesive film blocks are removed from the micro adhesive film. The side length of the rectangular adhesive film blocks is 6mm longer than the side length of the power module.

[0027] In a preferred embodiment of this application, step S2, which involves attaching and fixing the rectangular adhesive film block to the area of ​​the embedded power module on the L3 layer, includes:

[0028] Heat the suction head and stage of the automatic film applicator to 100°C, use the suction head to pick up the rectangular block of adhesive film, apply it to the area of ​​the embedded power module on the L3 layer, and maintain a pressure of 0.3MPa for 1.0s.

[0029] In a preferred embodiment of this application, the method may be further configured such that, before performing pressure transmission processing on the core board processed in step S2, the method further includes:

[0030] A release film is attached to the surface of the rectangular adhesive film block, and the size of the release film is the same as that of the L3 layer.

[0031] In a preferred embodiment of this application, step S7, after browning the surface-treated L2 and L5 layers, may further include:

[0032] The core board is passed through the grinding line, which only has a nylon brush section. The nylon brush is used to grind off the brown film on the top surface of the circuit, while the brown film on the side wall of the circuit is retained.

[0033] In a preferred embodiment of this application, step S8 may be further configured to perform two-stage baking on the L2 / 5 semi-finished board, including:

[0034] The first stage is baking at 110℃ for 60 minutes; the second stage is baking at 150℃ for 30 minutes.

[0035] In a preferred embodiment of this application, it can be further configured that, in step S6, the diameter of the blind hole is 0.2 mm and the diameter of the through hole is 0.4 mm.

[0036] In a preferred embodiment of this application, the diameter of the blind hole in step S10 can be further set to 0.15 mm.

[0037] Secondly, this application provides a packaging structure for an automotive-grade chip.

[0038] This application is achieved through the following technical solution:

[0039] A packaging structure for an automotive-grade chip, the packaging structure being prepared by the method described in the first aspect above, comprising:

[0040] The core board has a through groove that runs through its upper and lower surfaces; a power module is fixed in the through groove, and the gap between the power module and the core board is filled by hot-melt adhesive film and then solidified for connection; the upper surface of the core board is a surface-treated L3 layer and the lower surface of the core board is a surface-treated L4 layer.

[0041] The surface of the L3 layer is connected to copper foil through a dielectric layer to form the L2 layer, and the surface of the L4 layer is connected to copper foil through a dielectric layer to form the L5 layer; blind holes are formed between the L2 layer and the L3 layer and between the L5 layer and the L4 layer, and the blind holes are filled with copper pillars; through holes are formed through the L2 layer and the L5 layer.

[0042] The surface of the L2 layer is connected to a copper foil through a dielectric layer to form the L1 layer, and the surface of the L5 layer is connected to an RCC material to form the L6 layer; a blind via is provided between the L1 layer and the L2 layer.

[0043] In a preferred embodiment of this application, the core board can be further configured as follows: the core board is a double-sided copper-clad laminate with a total thickness of 1.292 mm and the copper plates on the upper and lower surfaces are both 42 μm thick.

[0044] In a preferred embodiment of this application, the surface spacing and vias of the L5 layer can be further configured such that the resin filling is achieved by a vacuum plug resin mesh.

[0045] This application addresses the issue of severe high-temperature adhesive residue on the L4 layer surface in multilayer chips through process optimization. This effectively prevents delamination and board bursting caused by residual adhesive during operation, significantly improving product reliability. It also resolves the problem of severely thin dielectric layers in the L2 and L3 layers near the embedded power module, effectively preventing high-voltage breakdown or conductive cation migration defects at these thin dielectric layer locations during operation. Furthermore, by supplementing the back of the heat-dissipating copper substrate with browning, the adhesion between the copper substrate and the semi-cured resin sheet is ensured, enhancing product reliability. Finally, by optimizing the heat dissipation channels and increasing the heat dissipation area of ​​the L6 layer, the heat dissipation effect is improved. Attached Figure Description

[0046] Figure 1 is a flowchart illustrating a packaging method for an automotive-grade chip according to an embodiment of this application;

[0047] Figure 2 is a schematic diagram of the structure of the chipboard used in an embodiment of this application for automotive-grade chips.

[0048] Figure 3 is a schematic diagram of the structure of the core board after slotting according to another embodiment of this application;

[0049] Figure 4 is a schematic diagram of the structure of a surface-mount power module provided in another embodiment of this application;

[0050] Figure 5 is a structural schematic diagram of the filling power module and the gap between the core board provided in another embodiment of this application;

[0051] Figure 6 is a structural schematic diagram of the L2 / 5 semi-finished plate provided in another embodiment of this application;

[0052] Figure 7 is a schematic diagram of the structure for opening holes in the L2 / 5 semi-finished plate according to another embodiment of this application;

[0053] Figure 8 is a structural schematic diagram of the L1 / 6 semi-finished plate provided in another embodiment of this application;

[0054] Figure 9 is a schematic diagram of the packaging structure of an automotive-grade chip provided in another embodiment of this application;

[0055] Explanation of reference numerals in the attached diagram: Core board-1, Through slot-101, Power module-2, L3 layer-30, L4 layer-40, L2 layer-20, L2 dielectric layer-20b, L2 copper foil-20a, L5 layer-50, L5 dielectric layer-50b, L5 copper foil-50a, Blind via-7, L1 layer-10, L1 dielectric layer-10b, L1 copper foil-10a, L6 layer-60, L6 dielectric layer-60a, L6 copper foil-60b, Blind via-8, Through hole-9. Detailed Implementation

[0056] This specific embodiment is merely an explanation of this application and is not intended to limit it. After reading this specification, those skilled in the art can make modifications to this embodiment without contributing any inventive step, but such modifications are protected by patent law as long as they fall within the scope of the claims of this application.

[0057] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0058] Furthermore, the term "and / or" in this application is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this application, unless otherwise specified, generally indicates that the preceding and following related objects have an "or" relationship.

[0059] In this application, the terms "first," "second," etc., are used to distinguish identical or similar items with essentially the same function. It should be understood that there is no logical or temporal dependency between "first," "second," and "nth," nor are there any restrictions on quantity or execution order.

[0060] The embodiments of this application will be further described in detail below with reference to the accompanying drawings. The packaging method proposed in this application is applicable to the packaging of automotive-grade chips. Automotive-grade chips are mainly used in automotive electronic systems, such as engine control, braking systems, and safety systems. Automotive-grade chips have extremely high requirements for reliability and stability, and need to meet the stable operation requirements of automobiles under extreme temperature, high vibration, high voltage, electromagnetic interference, and other operating conditions. As shown in Figure 1, the packaging method proposed in this application includes:

[0061] S1, the upper surface of the core board is surface treated to form layer L3, the lower surface of the core board is surface treated to form layer L4, and the surface-treated core board is processed with through grooves and browning treatment.

[0062] Specifically, a double-sided copper-clad laminate is used as the core board, with a total thickness of 1.292 mm. The copper thickness of both the upper and lower surfaces is 41 μm. As shown in Figure 2, the upper and lower surfaces of the core board are first cleaned to ensure they are clean and dry. Inner layer pattern transfer is performed on the copper surface of the upper surface to form the circuit layout pattern, designated as layer L3; the same transfer is performed on the copper surface of the lower surface to form the circuit layout pattern, designated as layer L4. At this point, the core board is designated as the L3 / 4 semi-finished board. It should be noted that the circuit layout patterns on the upper and lower surfaces can be the same or different circuit images. The surface treatment processes for the upper and lower surfaces can be performed simultaneously, or the upper surface can be treated first, followed by the lower surface, or vice versa.

[0063] As shown in Figure 3, a through-slot is machined on the surface-treated L3 / 4 semi-finished board using an automated optical alignment milling machine. This through-slot is used to house the power module. The power module consists of a chip and a copper base with grooves. The chip is fixed to the grooved portion of the copper base by sintering silver. The single-sided dimension of the through-slot is 100μm larger than the side of the copper base, meaning the gap between the copper base and the through-slot needs to be controlled within 100μm. This ensures that the power module can be accurately inserted, taking into account potential manufacturing tolerances and assembly clearances. After machining the through-slot, the L3 / 4 semi-finished board undergoes a browning treatment to improve the roughness and adhesion of the copper surface, facilitating better bonding with subsequent materials.

[0064] S2, apply adhesive tape to the surface of L4 layer, mount the power module into the through slot, cut the composite adhesive film into a rectangular block of a preset size, and then attach and fix the rectangular block of adhesive film to the area of ​​the embedded power module on L3 layer.

[0065] As shown in Figure 4, after the browning treatment, high-temperature resistant tape is applied to the surface of layer L4. A high-precision pick-and-place machine is used to mount the power module into the through-slot. The high-temperature resistant tape on layer L4 helps to secure the power module and prevent movement. In actual operation, a roll of adhesive film is used. This adhesive film consists of three layers: a 38μm PET film (polyester film), a 60μm adhesive film (semi-cured adhesive sheet), and a 10μm OPP film (oriented polypropylene film). The adhesive film is 550μm wide and needs to be cut to a width of 127mm before use.

[0066] Take a roll of micro-adhesive film with a width of 127mm. This micro-adhesive film consists of three layers: a 30μm PVC film (polyvinyl chloride film), a 10μm acrylic film, and a 75μm PI film (polyimide film). Remove the OPP film from the adhesive film material and the PVC film from the micro-adhesive film. Attach the adhesive film material to the acrylic film of the micro-adhesive film to form a composite adhesive film. Mount the composite adhesive film onto the cutting shaft of an automatic cutting machine. Fix a 140mm × 70mm die to the table of the automatic punching machine, with the die blade facing upwards. Start the machine to punch and cut the adhesive film portion of the composite adhesive film into rectangular blocks of 42mm × 33mm. Remove the rectangular blocks from the micro-adhesive film; the side length of the rectangular blocks is 6mm longer than the side length of the power module. Because the micro-adhesive film layer is relatively thick, it was not completely cut. Finally, remove the rectangular blocks from the micro-adhesive film.

[0067] The automatic laminator's nozzle and stage are heated to 100°C. The nozzle picks up a rectangular piece of adhesive film and applies it to the area of ​​the embedded power module on the L3 layer, maintaining a pressure of 0.3 MPa for 1.0 s. Specifically, the automatic laminator's nozzle and stage are both heated to 100°C. A 42µm × 33µm rectangular piece of adhesive film is picked up by the nozzle and applied to the embedded power module area on the L3 layer of the core board, maintaining a pressure of 0.3 MPa for 1 s. This causes the adhesive film to melt and adhere to the L3 layer of the core board. The glass transition temperature of the adhesive film is 210°C, higher than the maximum heat generation temperature of the chip during operation, meeting the product's heat resistance requirements. This means that the adhesive film can maintain stable performance even at high temperatures, without deforming or failing due to temperature changes, thus ensuring the long-term stability and reliability of the chip packaging.

[0068] S3, the core board after step S2 is subjected to pressure transmission treatment, so that the rectangular block of adhesive film is heated and melted and filled into the gap between the power module and the core board, and then cured.

[0069] Specifically, the pressure transmission condition is at a temperature of 130°C, with a pressure of 40 N / cm. 2 The bonding process is then performed. As shown in Figure 5, the adhesive film melts under high temperature and pressure during the process. The resin and filler particles contained in the adhesive film flow into and fill the gaps between the power module and the L3 and L4 layers. Then the resin cures, firmly embedding the power module inside the core board.

[0070] In some embodiments, prior to the pressure transfer process, a release film is affixed to the surface of the adhesive film rectangle, with the release film having the same dimensions as layer L3. The release film may be a polyethylene protective film. After the pressure transfer process is completed, the release film is removed for subsequent processing.

[0071] S4, remove the tape from the surface of L4 layer, and perform supplementary browning treatment on the surface of the heat dissipation copper base of the power module near L4 layer.

[0072] Remove the high-temperature resistant tape from the surface of layer L4, and then pass the L3 / 4 semi-finished board through the browning line again to supplement the browning of the back side of the heat dissipation copper base, i.e., the surface close to layer L4. This supplementary browning process ensures that all copper surfaces requiring browning are adequately treated, thereby improving the overall quality and reliability of the finished product.

[0073] S5. Plasma treatment is performed on layers L3 and L4. Multiple layers of semi-cured resin sheets and a layer of copper foil are sequentially stacked on the surface of layer L3 and pressed together to form layer L2. Multiple layers of semi-cured resin sheets and a layer of copper foil are sequentially stacked on the surface of layer L4 and pressed together to form layer L5.

[0074] The L3 and L4 layers of the L3 / 4 semi-finished board are subjected to plasma treatment to roughen the surface of the adhesive film into a honeycomb structure and generate hydrophilic hydroxyl and carboxyl groups on the surface of the adhesive film to improve the bonding force between the adhesive film and the subsequently laminated prepreg resin. Specifically, the prepreg resin sheet is an RC74 type PP sheet composed of fiberglass cloth and epoxy resin, wherein the epoxy resin accounts for 74% by weight. In some embodiments, as shown in FIG. 6, two layers of prepreg resin sheet and one layer of copper foil are sequentially stacked on the surface of the L3 layer and laminated to form the L2 layer, and two layers of prepreg resin sheet and one layer of copper foil are sequentially stacked on the surface of the L4 layer and laminated to form the L5 layer. The layers are firmly bonded together to form an integral multilayer circuit board structure.

[0075] S6. Drill blind holes between layers L2 and L3 and between layers L5 and L4, fill the blind holes with copper pillars, drill through holes through layers L2 to L5, and metallize the inner wall of the through holes.

[0076] In actual implementation, after pretreatment of the surfaces of layers L2 and L5, blind vias are machined using a laser drilling machine at the locations of the copper substrate and chip, specifically at the power module locations. These blind vias are located between layers L2 and L3, and between layers L5 and L4. Drilling debris on the blind vias is removed, and electroplating fills the vias, forming... The copper pillar penetrates from layer L2 to layer L5, that is, it drills through layers L2, L3, the core board, L4, and L5. Mechanical holes, i.e. through holes, are then drilled to remove drilling debris and electroplated to metallize the inner wall of the through hole until the plated copper is ≥25um.

[0077] Among them, the diameter of the blind hole is The diameter of the through hole is Blind vias are mainly used to achieve electrical connections in specific areas within the same layer or between different layers, while through vias are used to penetrate the entire circuit board, connecting copper foil lines between different layers to ensure that signals and power can be transmitted smoothly between layers.

[0078] S7. Perform surface treatment on the L2 layer of the core board, perform surface treatment on the L5 layer, and perform browning treatment on the surface-treated L2 and L5 layers.

[0079] Image transfer is performed on the copper surface of layer L2 to form a circuit layout pattern, and the same image transfer is performed on the copper surface of layer L5 to form a circuit layout pattern. After surface treatment, layers L2 and L5 undergo a browning treatment, forming a brown film on the circuit surfaces of layers L2 and L5, including the top and sidewalls of the circuits. The brown film is a copper-metallic organic complex with a molecular-level thickness, characterized by a large specific surface area, high surface tension, and polarity. It significantly increases the adhesion between buried vias and the circuit surface and the via / gap filling resin, improving product reliability. It should be noted that the circuit layout patterns on layers L2 and L5 can be the same image, or they can be set to different images according to actual needs. The surface treatment processes for layers L2 and L5 can be performed simultaneously or sequentially.

[0080] In some embodiments, after the browning treatment in step S7, the process further includes: passing the core board through a grinding line, where only a nylon brush section is open, and using the nylon brush to grind away the browning film on the top surface of the circuit, while retaining the browning film on the sidewalls of the circuit. The purpose of this operation is to remove the browning film from the surface of the circuit, preventing the via / gap filling resin from diffusing along the microstructure of the browning film to the top surface of the circuit, and ensuring that the resin fills the vias and the spacing between the circuits tightly.

[0081] S8, using a vacuum-sealed resin mesh, the through holes after metallization and the surface spacing of the L5 layer are filled with resin to obtain the L2 / 5 semi-finished board, and the L2 / 5 semi-finished board is baked in two stages.

[0082] In the actual implementation process, a vacuum plug resin film is first made, and then the film is used to make a vacuum plug resin stencil. The holes on the vacuum plug resin stencil are made with an opening 0.5mm larger than the actual hole diameter, and the spacing on the stencil is made with an opening 0.5mm larger than the actual spacing, to ensure that the resin can fully fill the holes and the line spacing on the L5 layer surface.

[0083] The baking process is divided into two stages: the first stage is baking at 110℃ for 60 minutes, and the second stage is baking at 150℃ for 30 minutes. After baking, the resin is cured, but the resin monomers have not yet fully cross-linked and polymerized. This ensures that the resin monomers of the ink can further cross-link and polymerize with the resin monomers of the high heat dissipation material during the subsequent high-temperature pressing process, which helps to improve product reliability.

[0084] S9. Plasma treatment is performed on layers L2 and L5. Multiple layers of semi-cured resin sheets and a layer of copper foil are stacked on the surface of layer L2 and pressed together to form layer L1. An RCC material is arranged on the surface of layer L5 and pressed together to form layer L6.

[0085] After step S8, it is also necessary to remove the drilling debris from layers L2 and L5. After removing the drilling debris, layers L2 and L5 are subjected to plasma treatment to roughen the surface of the resin ink into a honeycomb structure and generate hydrophilic hydroxyl and carboxyl groups on the surface of the resin ink, thereby improving its adhesion to the subsequent prepreg resin.

[0086] Specifically, an RCC material is arranged on the surface of the L5 layer. This RCC material consists of a 135μm-150μm thick adhesive film and a 35μm thick copper foil. The adhesive film is a high-heat-dissipating bonding sheet, composed of 5% epoxy resin and 95% filler particles, including alumina and boron nitride. The RCC material adhesive film is bonded to the surface of the L5 layer to form a dielectric layer. It should be noted that the thermal conductivity of the adhesive film is 10W / mK. The reason for filling the L5 layer circuit spacing with resin is that both the L2 and L5 copper plates are as thick as 115μm, requiring a large amount of adhesive. However, the high-heat-dissipating bonding sheet has a low resin content, and even under high temperature and high pressure, it is still impossible to fill the L5 layer circuit spacing, resulting in significant voids after pressure transmission, affecting product reliability. The glass transition temperature of the via / gap filling resin is 170℃, which is higher than the highest heat generation temperature (165℃) of the buried via and L5 layer line spacing when the substrate is working. This meets the product's requirements for material heat resistance and can effectively improve the thermal stability of the final product.

[0087] S10: Blind holes are machined between layers L1 and L2. The blind holes are filled by electroplating to form copper pillars. Layers L1 and L6 are surface treated to form L1 / 6 semi-finished boards. Processing is carried out on the basis of L1 / 6 semi-finished boards to form the final product.

[0088] The diameter of the blind via between layers L1 and L2 is 0.15 mm. Surface processing of layers L1 and L6 involves transferring the outer layer image to layer L1 to form a circuit layout pattern, and transferring the outer layer image to layer L6 to form a circuit layout pattern.

[0089] As shown in Figure 8, the L6 layer formed by lamination does not have any through holes and / or blind holes, allowing the L6 layer to form a complete metal surface layer that is insulated from other layers. The large gold surface of the L6 surface can be used to solder a large water-cooled heatsink for heat dissipation. This effectively increases the heat dissipation area of ​​the product, improves the heat dissipation effect, and prevents excessive heat accumulation of the power chip inside the package, thus avoiding excessively high junction temperatures. Furthermore, only one water-cooled heatsink needs to be soldered, effectively simplifying the workload of downstream processes.

[0090] In actual implementation, the L1 / 6 semi-finished board undergoes solder resist silkscreening, solder resist exposure, solder resist development, and post-curing to form a solder resist pattern. Nickel-palladium-gold is then deposited, and the product is routerd to form a Set unit to create the final product.

[0091] The packaging method proposed in this application solves the problem of severe adhesive residue on the L4 layer by optimizing the packaging process. This effectively prevents delamination and delamination at the adhesive residue location due to heat generation during product operation, significantly improving product reliability. It also addresses the issue of severely thin dielectric layers on the L2 and L3 layers near the embedded power module, effectively preventing high-voltage breakdown or conductive cation migration defects at this location during product operation. Furthermore, it enables browning of the back side of the heat-dissipating copper base, ensuring adhesion between the copper base and the prepreg resin, significantly improving product reliability. The optimized heat dissipation channel design increases the area and significantly enhances heat dissipation. During chip operation, heat is transferred to the water-cooled heat sink soldered to the L6 gold surface via the path: "power chip → sintered silver layer → heat-dissipating copper base → L4 to L5 copper pillars → L5 copper layer → high heat-dissipating bonding sheet → L6 large gold surface." The heat dissipation area is equal to the area of ​​the large gold surface, which is 2520 mm². 2 The heat dissipation area is much larger than that of the original product; all power modules on the same product share a single water-cooled radiator, which significantly reduces the assembly workload of the downstream water-cooled radiator.

[0092] Another embodiment of this application also provides a packaging structure for an automotive-grade chip, which is prepared by the above-described packaging method for automotive-grade chips, as shown in FIG9. The packaging structure includes:

[0093] The core board 1 has a through groove 101 that runs through the upper and lower surfaces. A power module 2 is fixed in the through groove 101. The gap between the power module 2 and the core board 1 is filled by hot-melt adhesive film and then connected after curing. The upper surface of the core board 1 is formed by surface treatment to form an L3 layer 30 and the lower surface of the core board is formed by surface treatment to form an L4 layer 40.

[0094] The upper surface of layer L3 30 is connected to copper foil 20a via dielectric layer L2 20b to form layer L2 20, and the lower surface of layer L4 is connected to copper foil 50a via dielectric layer L5 50b to form layer L5 50; blind holes 7 are provided between layer L2 20 and layer L3 30 and between layer L5 50 and layer L4 40, and the blind holes 7 are filled with copper pillars;

[0095] The upper surface of L2 layer 20 is connected to L1 copper foil 10a through L1 dielectric layer 10b to form L1 layer 10. The lower surface of L5 layer is connected to RCC material to form L6 layer 60. L6 layer 60 includes L6 dielectric layer 60b and L1 copper foil 60a. A blind via 8 is provided between L1 layer and L2 layer.

[0096] A through hole 9 is provided between L2 layer 20 and L5 layer 50.

[0097] In some embodiments, the core board 1 is a double-sided copper-clad laminate with a total thickness of 1.292 mm and a copper thickness of 42 μm on each surface, with both the upper and lower copper surfaces having a thickness of 42 μm.

[0098] In some embodiments, the surface spacing of the L5 layer 50, i.e. the line spacing and the via 9, is filled with resin by a vacuum plug resin mesh.

[0099] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0100] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is used as an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the system described in this application can be divided into different functional units or modules to complete all or part of the functions described above.

Claims

1. A packaging method for an automotive-grade chip, characterized in that, include: S1, the upper surface of the core board is surface treated to form layer L3, the lower surface of the core board is surface treated to form layer L4, and the surface-treated core board is processed with through grooves and browning treatment. S2, apply tape to the surface of L4 layer, mount the power module into the through groove, cut the composite adhesive film into a rectangular block of the preset size, and then attach and fix the rectangular block of the adhesive film to the area of ​​the embedded power module on L3 layer. S3, the core board after step S2 is subjected to pressure transmission treatment, so that the rectangular block of the adhesive film is heated and melted and filled in the gap between the power module and the core board, and then cured. S4, remove the tape from the surface of L4 layer, and perform additional browning treatment on the surface of the heat dissipation copper base of the power module near L4 layer; S5, plasma treatment is performed on layers L3 and L4, and multiple layers of semi-cured resin sheets and a layer of copper foil are sequentially stacked on the surface of layer L3 and pressed together to form layer L2, and multiple layers of semi-cured resin sheets and a layer of copper foil are sequentially stacked on the surface of layer L4 and pressed together to form layer L5. S6. Drill blind holes between layers L2 and L3 and between layers L5 and L4, fill the blind holes with copper pillars, drill through holes through layers L2 to L5, and metallize the inner wall of the through holes. S7, perform surface treatment on the L2 layer of the core board, perform surface treatment on the L5 layer, and perform browning treatment on the surface-treated L2 and L5 layers. S8, using a vacuum-plugged resin mesh, the through holes and surface spacing of the L5 layer are filled with resin to obtain the L2 / 5 semi-finished board, and the L2 / 5 semi-finished board is baked in two stages. S9, plasma treatment is performed on L2 and L5 layers. Multiple layers of semi-cured resin sheets and a layer of copper foil are stacked on the surface of L2 layer and pressed together to form L1 layer. An RCC material is arranged on the surface of L5 layer and pressed together to form L6 layer. S10: Blind holes are machined between layers L1 and L2. The blind holes are filled by electroplating to form copper pillars. Layers L1 and L6 are surface treated to form L1 / 6 semi-finished boards. Processing is carried out on the basis of L1 / 6 semi-finished boards to form the final product.

2. The packaging method for automotive-grade chips according to claim 1, characterized in that, In step S9, the RCC material includes: a film with a thickness of 135μm to 150μm and a copper foil with a thickness of 35μm. The film consists of 5% epoxy resin and 95% filler particles, which include aluminum oxide and boron nitride.

3. The packaging method for automotive-grade chips according to claim 2, characterized in that, The thermal conductivity of the adhesive film is 10 W / mK.

4. The packaging method for automotive-grade chips according to claim 1, characterized in that, The L6 layer is not machined with any through holes and / or blind holes, so that the L6 layer forms a complete metal surface layer.

5. The packaging method for automotive-grade chips according to claim 1, characterized in that, The semi-cured resin sheet is composed of fiberglass cloth and epoxy resin.

6. The packaging method for automotive-grade chips according to claim 1, characterized in that, Step S2 involves punching the composite adhesive film into rectangular blocks of a preset size, including: Take a roll of adhesive film material, which comprises three layers: a 38μm PET film, a 60μm adhesive film, and a 10μm OPP film. Take a roll of micro-adhesive film, which comprises three layers: a 30μm PVC film, a 10μm acrylic film, and a 75μm PI film. Peel off the OPP film of the adhesive film material and the PVC film of the micro-adhesive film, and attach the adhesive film of the adhesive film material to the acrylic film of the micro-adhesive film to form a composite adhesive film. The combined adhesive film is installed on the product shaft of the automatic cutting machine, the adhesive film portion of the combined adhesive film is punched into rectangular adhesive film blocks, and the rectangular adhesive film blocks are removed from the micro adhesive film. The side length of the rectangular adhesive film blocks is 6mm longer than the side length of the power module.

7. The packaging method for automotive-grade chips according to claim 6, characterized in that, Step S2 involves attaching and fixing the rectangular adhesive film block to the area of ​​the embedded power module on layer L3, including: Heat the suction head and stage of the automatic film applicator to 100°C, use the suction head to pick up the rectangular block of adhesive film, apply it to the area of ​​the embedded power module on the L3 layer, and maintain a pressure of 0.3MPa for 1.0s.

8. The packaging method for automotive-grade chips according to claim 1, characterized in that, Before performing the pressure transmission process on the core board after step S2, the following steps are also included: A release film is attached to the surface of the rectangular adhesive film block, and the size of the release film is the same as that of the L3 layer.

9. The packaging method for automotive-grade chips according to claim 1, characterized in that, After performing browning treatment on the surface-treated L2 and L5 layers in step S7, the process also includes: The core board is passed through the grinding line, which only has a nylon brush section. The nylon brush is used to grind off the brown film on the top surface of the circuit, while the brown film on the side wall of the circuit is retained.

10. The packaging method for automotive-grade chips according to claim 1, characterized in that, Step S8 involves two-stage baking of the L2 / 5 semi-finished board, including: The first stage is baking at 110℃ for 60 minutes; the second stage is baking at 150℃ for 30 minutes.

11. The packaging method for automotive-grade chips according to claim 1, characterized in that, In step S6, the diameter of the blind hole is 0.2 mm and the diameter of the through hole is 0.4 mm.

12. The packaging method for automotive-grade chips according to claim 1, characterized in that, In step S10, the diameter of the blind hole is 0.15 mm.

13. A packaging structure for an automotive-grade chip, fabricated by the method described in any one of claims 1 to 12, characterized in that, include: The core board has a through groove that runs through its upper and lower surfaces; a power module is fixed in the through groove, and the gap between the power module and the core board is filled by hot-melt adhesive film and then solidified for connection; the upper surface of the core board is a surface-treated L3 layer and the lower surface of the core board is a surface-treated L4 layer. The surface of the L3 layer is connected to copper foil through a dielectric layer to form the L2 layer, and the surface of the L4 layer is connected to copper foil through a dielectric layer to form the L5 layer; blind holes are formed between the L2 layer and the L3 layer and between the L5 layer and the L4 layer, and the blind holes are filled with copper pillars; through holes are formed through the L2 layer and the L5 layer. The surface of the L2 layer is connected to a copper foil through a dielectric layer to form the L1 layer, and the surface of the L5 layer is connected to an RCC material to form the L6 layer; a blind via is provided between the L1 layer and the L2 layer.

14. The packaging structure of the automotive-grade chip according to claim 13, characterized in that, The core board is a double-sided copper-clad laminate with a total thickness of 1.292 mm, and the copper plates on the upper and lower surfaces are both 42 μm thick.

15. The packaging structure of the automotive-grade chip according to claim 13, characterized in that, The surface spacing and through-holes of the L5 layer are filled with resin through a vacuum-plugged resin mesh.

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