Method for preparing TBC solar cell having protruding isolation region structures

Abstract

Provided is a method for preparing a TBC solar cell having protruding isolation region structures. First, a prepared TBC solar cell having protruding isolation region structures can reduce not only the probability of a short circuit between a p-region (boron diffusion region) and a n-region (phosphorus diffusion region), but also the thickness of part of the boron diffusion layer or phosphorus diffusion layer to reduce the effect of parasitic absorption. Second, by optimizing process steps, the TBC solar cell can be obtained by a single deposition of an intrinsic polycrystalline silicon layer, effectively improving the performance and yield of products and significantly reducing production costs.

Description

Preparation method of TBC solar cell with convex isolation region structure TECHNICAL FIELD

[0001] The present application relates to the field of solar cells, in particular to a preparation method of TBC solar cell with convex isolation region structure. BACKGROUND

[0002] TBC solar cell combines the excellent tunneling oxide layer / doped polysilicon passivation contact technology of mainstream TOPCon cell and the back electrode contact characteristics, is the representative of the next generation of mainstream cells, has the characteristics of high efficiency, aesthetic appearance, etc. In the preparation process of TBC solar cell, the insulation isolation measure of p region (boron diffusion region) and n region (phosphorus diffusion region) is particularly critical, and the rationalization degree of the isolation region structure is significantly related to the level of cell leakage value, and also affects the conversion efficiency of the final cell. For the conventional isolation region structure, it is often formed by physical + wet chemical form "rectangle" isolation structure, if the isolation region structure is larger, although it can reduce the short circuit risk of p region and n region, but it will lead to the reduction of the transmission cross section of the silicon substrate carrier to the bottom poly-Si layer, resulting in the low FF value; if the isolation region structure is small, it will increase the risk of conduction of p region and n region, and the poly-Si area is too large, the parasitic absorption is also serious, resulting in the low I sc value.

[0003] In addition, first of all, the preparation of the current TBC solar cell usually needs to deposit boron diffusion layer and phosphorus diffusion layer on the back of the cell in turn, and then cooperate with multiple laser grooving and wet process. For example, patent CN116845140A discloses a preparation method of TBC solar cell, which roughly comprises the following steps: depositing a first tunneling oxide layer and a first intrinsic polysilicon layer on the back of the silicon wafer, forming a BSG layer by boron doping, first grooving and cleaning, depositing a second tunneling oxide layer and a second intrinsic polysilicon layer on the back, forming a PSG layer by phosphorus doping, second grooving, cleaning and simultaneously double-side texturing, double-side coating, screen printing and sintering. However, in the above-mentioned patent and similar solutions, since the intrinsic polysilicon layer needs to be deposited twice on the back of the silicon wafer, it is easy to cause uneven distribution of thermal stress, thereby causing problems such as silicon wafer warping and fragmentation, which will significantly affect the performance and yield of the product. In addition, the deposition of the intrinsic polysilicon layer twice will also greatly increase the consumption of special gas, thereby increasing the cost.

[0004] In summary, it is of great significance to study how to improve the isolation region structure of TBC solar cell to reduce the risk of cell leakage and improve the FF and I sc of the cell, and at the same time, to optimize the preparation process of TBC solar cell to improve the performance and yield of the product and reduce the cost. SUMMARY

[0005] In order to solve the above technical problems, the application provides a preparation method of a TBC solar cell with a convex isolation region structure. First, the application can prepare a TBC solar cell with a convex isolation region structure through a clever preparation method, which can not only reduce the probability of short circuit of the p region (boron diffusion region) and the n region (phosphorus diffusion region), but also reduce the thickness of part of the boron diffusion layer or the phosphorus diffusion layer to reduce the influence of parasitic absorption; second, the application realizes the TBC solar cell through single deposition of the intrinsic polycrystalline silicon layer by optimizing the process steps, which can effectively improve the performance and yield of the product, and significantly reduce the production cost.

[0006] The specific technical scheme of the application is as follows: a preparation method of a TBC solar cell with a convex isolation region structure, specifically comprising the following steps: S1, double-side polishing of a silicon wafer.

[0007] S2, sequentially forming a tunneling oxide layer, an intrinsic polycrystalline silicon layer and a mask layer on the back surface of the silicon wafer.

[0008] The purpose of setting the intrinsic polycrystalline silicon layer is to provide a basis for subsequent boron diffusion and phosphorus diffusion, and the purpose of setting the mask layer is to block the doping atoms from entering the intrinsic polycrystalline silicon layer at the bottom during the subsequent boron diffusion and phosphorus diffusion process.

[0009] S3, laser one-time patterning slotting to remove the mask layer in the design region of the boron diffusion layer.

[0010] The laser one-time patterning slotting region is the pre-designed boron diffusion layer region, and after removing the mask layer in this region, the boron atoms can diffuse to the intrinsic polycrystalline silicon layer in this region during the subsequent boron diffusion process.

[0011] S4, alkali cleaning to remove the residual mask layer in the slotting region to fully expose the intrinsic polycrystalline silicon layer in this region.

[0012] S5, boron diffusion, which converts the inner layer and the surface layer of the exposed intrinsic polycrystalline silicon layer into a boron diffusion layer and a BSG layer, respectively.

[0013] During the above boron diffusion process, the S3 unslotted region can effectively block the boron atoms from entering the intrinsic polycrystalline silicon layer due to the protection of the mask layer, and only the inner layer and the surface layer of the exposed intrinsic polycrystalline silicon layer are converted into a boron diffusion layer and a BSG layer, respectively.

[0014] S6, laser two-time patterning slotting to remove the mask layer in the remaining region.

[0015] The remaining mask layer region (i.e., the pre-designed phosphorus diffusion layer region) is slotted, and the purpose is to expose the surface of the remaining intrinsic polycrystalline silicon layer through subsequent alkali cleaning.

[0016] S7, the residual mask layer in the slot area of S6 is removed by alkali cleaning to expose the intrinsic polysilicon layer in the area.

[0017] S8, phosphorus diffusion, the inner layer and the surface layer of the exposed intrinsic polysilicon layer are respectively converted into phosphorus diffusion layer and PSG layer.

[0018] In the above phosphorus diffusion process, the surface of the boron diffusion layer is protected by the BSG layer, so the phosphorus atoms cannot diffuse to the boron diffusion layer, and only the inner layer and the surface layer of the remaining exposed intrinsic polysilicon layer are respectively converted into phosphorus diffusion layer and PSG layer.

[0019] S9, the BSG layer and the PSG layer at the junction of the boron diffusion layer (p region) and the phosphorus diffusion layer (n region) are removed by three times of green laser patterning slotting, and the deposited layers (tunneling oxide layer, boron diffusion layer, phosphorus diffusion layer) in the slotting area are loosened.

[0020] The green laser three times of patterning slotting area is the pre-designed isolation area (i.e. insulating Gap area). After removing the BSG layer and the PSG layer in this area, the isolation area can be formed after subsequent wet cleaning.

[0021] S10, the two side parts of the remaining BSG layer and the remaining PSG layer are removed by four times of ultraviolet laser patterning slotting, and the surface layer of the boron diffusion layer and the surface layer of the phosphorus diffusion layer in the slotting area are loosened.

[0022] The purpose of the four times of ultraviolet laser patterning slotting is to remove the two side parts of the remaining BSG layer and the remaining PSG layer, and to loosen the surface layer of the boron diffusion layer and the surface layer of the phosphorus diffusion layer at the bottom of the slotting area, so as to lay the foundation for forming the convex isolation area structure after subsequent wet cleaning.

[0023] It should be noted that the green laser is used in S9, and the ultraviolet laser is used in S10. The present application ingeniously uses the characteristic that the penetration depth of ultraviolet laser is shallower than that of green laser to loosen the deposited layers at different depths at the bottom of the slotting area on the basis of removing the BSG layer and the PSG layer. The deposited layers (tunneling oxide layer, boron diffusion layer, phosphorus diffusion layer) at the bottom of the slotting area can be loosened during the three times of green laser patterning slotting process, and thus can be completely removed during subsequent wet cleaning process. The depth of the four times of ultraviolet laser patterning slotting is shallow, and thus only the surface layer of the boron diffusion layer and the surface layer of the phosphorus diffusion layer at the bottom of the slotting area can be loosened, so that only the surface layer of the boron diffusion layer and the surface layer of the phosphorus diffusion layer in the area are corroded and removed during subsequent wet cleaning process, thereby forming the convex isolation area structure.

[0024] S11, the front and side wrap layers of the silicon wafer are removed.

[0025] S12, cleaning and texturing: the silicon wafer is subjected to wet cleaning and texturing in an alkaline solution. In the area covered by the BSG layer and the PSG layer, the bottom boron diffusion layer and the phosphorus diffusion layer are protected from being corroded by the alkaline solution. For other areas, due to the different depths of the laser loosening in S9 and S10, the rate of alkaline corrosion in different areas will be different, and the wet etching rate is V (激 光三次图形化区域) > V (激光四次图形化区域) Finally, by controlling the cleaning time, the deposited layer in the green laser three times patterned groove area on the back of the silicon wafer is removed, the boron diffusion layer surface layer and the phosphorus diffusion layer surface layer in the ultraviolet laser four times patterned groove area are removed, and a convex isolation area structure is formed. Among them, the width of the single side removed part of the boron diffusion layer surface layer and the phosphorus diffusion layer surface layer is 25-40% of the original whole layer, and the height is 30-80% of the original whole layer. At the same time, the front surface of the silicon wafer and the surface of the back isolation area are textured to form a pyramid texture; finally, the residual PSG layer and BSG layer on the back of the silicon wafer are removed by acid washing.

[0026] S13, double-sided coating: after double-sided coating, a passivation anti-reflection layer is formed on the front / back surface of the silicon wafer.

[0027] S14, screen printing, sintering, light injection, to obtain a TBC solar cell with a convex isolation area structure.

[0028] In summary, first of all, the TBC solar cell with a convex isolation area structure can be prepared by the ingenious preparation method. On the one hand, although the isolation size of the bottom p region (boron diffusion region) and the n region (phosphorus diffusion region) does not change much, the isolation size of the top p region and the n region increases, which can reduce the probability of short circuit and is beneficial to reduce the risk of battery leakage and improve the yield of the battery. On the other hand, the convex isolation area structure reduces the thickness of part of the boron diffusion layer or the phosphorus diffusion layer, which can reduce the influence of parasitic absorption.

[0029] Secondly, by optimizing the process steps, the TBC solar cell can be obtained by depositing an intrinsic polycrystalline silicon layer at a time, which can avoid the problems of uneven thermal stress distribution caused by multiple deposition of intrinsic polycrystalline silicon layer, resulting in reduced product performance and yield, etc. In addition, the use of one intrinsic polycrystalline silicon layer deposition can also greatly reduce the amount of special gas and production cost.

[0030] As a preferred, in S9, the conditions for the green laser three times patterned groove are: laser wavelength is 477-592 nm, frequency is 500-700 KHz, marking speed is 40,000-50,000 mm / s, power is 40-100 W, and processing time is 1-5 s.

[0031] Preferably, in S10, the conditions for the ultraviolet laser four-time patterning and slotting are as follows: laser wavelength is 200-400 nm, frequency is 500-700 KHz, marking speed is 40,000-50,000 mm / s, power is 10-40 W, and processing time is 1-3 s.

[0032] In addition to the ingenious use of the difference in laser wavelength penetration depth to assist in constructing the convex isolation region structure in S9 and S10, the power of the two laser treatments is also controlled. Specifically, the power of the green laser three-time patterning treatment is higher and the time is longer, while the power of the ultraviolet laser four-time patterning treatment is relatively lower and the time is shorter, so as to further form the differentiation of the processing depth.

[0033] Preferably, in S2, the mask layer is formed by the LPCVD method under the following conditions: O2 flow rate is 20,000-90,000 sccm, temperature is 500-700℃, time is 2,000-5,000 s, and mask layer thickness is 30-300 nm.

[0034] Preferably, in S2, the mask layer can also be formed by ultraviolet oxidation laser treatment: first, an embryonic mask layer is generated under the conditions of oxygen concentration of 20-40% and ultraviolet laser wavelength of 300-400 nm; and then a denser mask layer is formed under the conditions of oxygen concentration of 50-90% and ultraviolet laser wavelength of 200-300 nm.

[0035] In the previous experiments, it was found that the denseness of the mask layer obtained by conventional LPCVD or conventional one-step ultraviolet laser oxidation process is not ideal, which increases the risk of boron atoms and phosphorus atoms diffusing to the intrinsic polysilicon layer during subsequent boron diffusion and phosphorus diffusion, thereby causing battery leakage or performance degradation. Therefore, the above-mentioned special distributed and differentiated ultraviolet laser oxidation process is designed, and the principle is that different laser wavelengths penetrate to different depths inside the silicon. In the first step of the above-mentioned process of the present application, the wavelength is larger and the penetration depth is deeper, which can preliminarily form a relatively thick embryonic mask layer; in the second step, the wavelength is shorter and the penetration depth is shallower, which can make the embryonic mask layer become more dense in texture without changing the thickness; at the same time, different oxygen concentration treatment environments can make the formed mask layer more effectively block the internal diffusion of boron atoms and phosphorus atoms.

[0036] Further preferably, in S2, the conditions of the ultraviolet oxidation laser treatment are specifically as follows: first, generating a mask layer prototype under the conditions of O2 flow rate of 10-100 sccm, ambient oxygen concentration of 20-40%, ultraviolet laser wavelength of 300-400 nm, power of 10-500 W, and processing time of 1-30 s; and then forming a denser mask layer under the conditions of O2 flow rate of 100-500 sccm, ambient oxygen concentration of 50-90%, ultraviolet laser wavelength of 200-300 nm, power of 2-50 W, and processing time of 1-30 s; and the thickness of the mask layer is 30-300 nm.

[0037] Preferably, in S2, the deposition conditions of the tunneling oxide layer are as follows: O2 flow rate of 10000-80000 sccm, reaction temperature of 400-800℃, time of 200-1000 s, and thickness of the tunneling oxide layer of 2-10 nm.

[0038] Preferably, in S2, the deposition conditions of the intrinsic polysilicon layer are as follows: SiH4 flow rate of 300-2000 sccm, reaction temperature of 500-700℃, time of 2-4 h, working pressure of 100-500 mTorr, and thickness of the intrinsic polysilicon layer of 100-300 nm.

[0039] Preferably, in S5, the conditions of the boron diffusion are as follows: temperature of 800-900℃, diffusion time of 5-50 min, BCl3 flow rate of 50-500 sccm, and O2 flow rate of 500-2000 sccm; oxidation advancing temperature of 900-1050℃, O2 flow rate of 5000-30000 sccm, and advancing time of 30-80 min.

[0040] Preferably, in S5, the thickness of the BSG layer is 30-70 nm.

[0041] Preferably, in S8, the conditions of the phosphorus diffusion are as follows: temperature of 750-850℃, diffusion time of 5-30 min, POCl3 carried by nitrogen with a flow rate of 500-1200 sccm, and O2 flow rate of 500-1000 sccm; oxidation advancing temperature of 850-950℃, O2 flow rate of 1000-10000 sccm, and advancing time of 20-60 min.

[0042] Preferably, in S8, the thickness of the PSG layer is 30-70 nm.

[0043] Compared with the prior art, the present application has the following beneficial effects: (1) the TBC solar cell with a convex isolation region structure can be prepared by the ingenious preparation method of the present application, which can not only reduce the probability of short circuit of the p region (boron diffusion region) and the n region (phosphorus diffusion region), but also reduce the thickness of part of the boron diffusion layer or the phosphorus diffusion layer to reduce the parasitic absorption effect.

[0044] (2) The application realizes the TBC solar cell by optimizing the process steps, which can effectively improve the performance and yield of the product, and significantly reduce the production cost. BRIEF DESCRIPTION OF DRAWINGS

[0045] Figure 1 is a schematic diagram of the structure of the polished silicon wafer.

[0046] Figure 2 is a schematic diagram of the structure of the silicon wafer after depositing the tunneling oxide layer / intrinsic polycrystalline silicon layer / mask layer.

[0047] Figure 3 is a schematic diagram of the structure of the silicon wafer after laser patterning and slotting the mask layer once + alkali cleaning.

[0048] Figure 4 is a schematic diagram of the structure of the silicon wafer after boron diffusion.

[0049] Figure 5 is a schematic diagram of the structure of the silicon wafer after laser patterning and slotting the mask layer twice + alkali cleaning.

[0050] Figure 6 is a schematic diagram of the structure of the silicon wafer after phosphorus diffusion.

[0051] Figure 7 is a schematic diagram of the structure of the silicon wafer after laser patterning and slotting the p region and n region intersection three times + cleaning and texturing.

[0052] Figure 8 is a schematic diagram of the structure of the TBC solar cell.

[0053] The reference signs are: N-type monocrystalline silicon wafer 1; tunneling oxide layer 2; intrinsic polycrystalline silicon layer 3; mask layer 4; boron diffusion layer 5; BSG layer 6; phosphorus diffusion layer 7; PSG layer 8; pyramid texturing 9; passivation anti-reflection layer 10; electrode layer 11. DETAILED DESCRIPTION

[0054] The application will be further described below in combination with examples.

[0055] A preparation method of a TBC solar cell with a convex isolation region structure, specifically comprising the following steps: S1, polishing both sides of the silicon wafer.

[0056] In some specific embodiments, the N-type monocrystalline silicon wafer 1 after cutting with diamond wire is selected, the thickness is about 150 μm, and the size is 182.2 mm x 186.7 mm. The silicon wafer is placed into an alkali polishing tank, the temperature is maintained at 75-85℃, and the time for double-side polishing is 6-8 min, the polishing thickness is 3-7 μm, and the thinning amount is 0.35-0.45 g, as shown in Figure 1.

[0057] S2, sequentially forming a tunneling oxide layer 2 (adopting the LPCVD method), an intrinsic polycrystalline silicon layer 3 (adopting the LPCVD method), and a mask layer 4 on the back of the silicon wafer, as shown in Figure 2.

[0058] In some embodiments, the deposition conditions of the tunneling oxide layer are as follows: O2 flow rate 10000-80000 sccm, reaction temperature 400-800°C, time 200-1000 s, and thickness of the tunneling oxide layer 2-10 nm.

[0059] In some embodiments, the deposition conditions of the intrinsic polysilicon layer are as follows: SiH4 flow rate 300-2000 sccm, reaction temperature 500-700°C, time 2-4 h, working pressure 100-500 mTorr, and thickness of the intrinsic polysilicon layer 100-300 nm.

[0060] In some embodiments, the mask layer is formed by LPCVD, and the conditions are as follows: O2 flow rate 20000-90000 sccm, temperature 500-700°C, time 2000-5000 s, and thickness of the mask layer 30-300 nm.

[0061] In some more preferred embodiments, the mask layer can also be formed by ultraviolet oxidation laser treatment: first, under the conditions of oxygen concentration 20-40% and ultraviolet laser wavelength 300-400 nm, a mask layer prototype is formed; and then, under the conditions of oxygen concentration 50-90% and ultraviolet laser wavelength 200-300 nm, a denser mask layer is formed.

[0062] Further preferably, in S2, the conditions of the ultraviolet oxidation laser treatment are as follows: first, under the conditions of O2 flow rate 10-100 sccm, ambient oxygen concentration 20-40%, ultraviolet laser wavelength 300-400 nm, power 10-500 W, and processing time 1-30 s, a mask layer prototype is formed; and then, under the conditions of O2 flow rate 100-500 sccm, ambient oxygen concentration 50-90%, ultraviolet laser wavelength 200-300 nm, power 2-50 W, and processing time 1-30 s, a denser mask layer is formed; and the thickness of the mask layer is 30-300 nm.

[0063] S3, laser one-time patterning and slotting to remove the mask layer in the design region of the boron diffusion layer. The laser one-time patterning and slotting region is the pre-designed region of the boron diffusion layer, and after removing the mask layer in this region, boron atoms can diffuse to the intrinsic polysilicon layer in this region in the subsequent boron diffusion process.

[0064] In some embodiments, picosecond laser is used for one-time patterning and slotting, and the conditions are as follows: laser wavelength 400-600 nm, frequency 500-700 KHz, marking speed 40000-50000 mm / s, power 10-50 W, and processing time 1-5 s.

[0065] S4, alkali cleaning to remove the residual mask layer in the slotting region to fully expose the intrinsic polysilicon layer in this region, as shown in FIG. 3.

[0066] In some specific embodiments, the silicon wafer is cleaned in an alkaline solution at a temperature of 75-85°C. During the experiment, different cleaning times and other parameters are adjusted, and the thickness of the mask layer after cleaning is tested by an ellipsometer. The mask layer in the grooved area can be accurately removed without excessive removal of the intrinsic polysilicon layer at the bottom during the alkaline cleaning process.

[0067] S5, boron diffusion, the inner layer and the surface layer of the exposed intrinsic polysilicon layer 3 are respectively converted into a boron diffusion layer 5 and a BSG layer 6. During the above boron diffusion process, the S3 un-grooved area is effectively blocked from boron atoms entering the intrinsic polysilicon layer 3 due to the protection of the mask layer 4, and only the inner layer and the surface layer of the exposed intrinsic polysilicon layer 3 are respectively converted into a boron diffusion layer 5 and a BSG layer 6, as shown in FIG. 4.

[0068] In some specific embodiments, the boron diffusion conditions are: temperature 800-900°C, diffusion time 5-50min, BCl3 flow rate 50-500sccm, O2 flow rate 500-2000sccm; oxidation promotion temperature 900-1050°C, O2 flow rate 5000-30000sccm, promotion time 30-80min. The thickness of the BSG layer is 30-70nm.

[0069] S6, laser secondary patterning grooving to remove the mask layer in the remaining area. The remaining mask layer area (i.e. the pre-designed phosphorus diffusion layer area) is grooved, which is aimed at cooperating with the subsequent alkaline cleaning to expose the surface of the remaining intrinsic polysilicon layer.

[0070] In some specific embodiments, picosecond laser is used for secondary patterning grooving, and the conditions are: laser wavelength 400-600nm, frequency 500-700KHz, marking speed 40000-50000mm / s, power 10-50W, processing time 1-5s.

[0071] S7, alkaline cleaning to remove the residual mask layer in the S6 grooved area to fully expose the intrinsic polysilicon layer in the area, as shown in FIG. 5.

[0072] In some specific embodiments, the silicon wafer is cleaned in an alkaline solution at a temperature of 75-85°C. During the experiment, different cleaning times and other parameters are adjusted, and the thickness of the mask layer after cleaning is tested by an ellipsometer. The mask layer in the grooved area can be accurately removed without excessive removal of the intrinsic polysilicon layer at the bottom during the alkaline cleaning process. The boron diffusion layer area is protected by the BSG layer and is not damaged by alkaline cleaning.

[0073] S8, phosphorus diffusion, the inner layer and the surface layer of the exposed intrinsic polysilicon layer 3 are converted into phosphorus diffusion layer 7 and PSG layer 8 respectively. In the above phosphorus diffusion process, since the surface of the boron diffusion layer 5 is protected by the BSG layer 6, the phosphorus atoms cannot diffuse into the boron diffusion layer 5, and only the inner layer and the surface layer of the remaining exposed intrinsic polysilicon layer 3 are converted into phosphorus diffusion layer 7 and PSG layer 8 respectively, as shown in Figure 6.

[0074] In some specific embodiments, the conditions for phosphorus diffusion are: temperature 750-850℃, diffusion time 5-30min, POCI3 carried by nitrogen flow at 500-1200sccm, O2 flow 500-1000sccm; oxidation advancing temperature 850-950℃, O2 flow 1000-10000sccm, advancing time 20-60min. The thickness of the PSG layer is 30-70nm.

[0075] S9, green laser three times patterning slotting removes the BSG layer and PSG layer at the junction of the boron diffusion layer (p region) and the phosphorus diffusion layer (n region), and loosens the deposited layers (tunneling oxide layer, boron diffusion layer, phosphorus diffusion layer) in this slotting area. The green laser three times patterning slotting area is the pre-designed isolation area (i.e. insulating Gap area). After removing the BSG layer and PSG layer in this area, an isolation area can be formed after subsequent wet cleaning.

[0076] In some specific embodiments, the conditions for green laser three times patterning slotting are: laser wavelength 477-592nm, frequency 500-700KHz, marking speed 40000-50000mm / s, power 40-100W, processing time 1-5s.

[0077] S10, ultraviolet laser four times patterning slotting removes the two side parts of the remaining BSG layer and the remaining PSG layer, and loosens the surface layer of the boron diffusion layer and the surface layer of the phosphorus diffusion layer in this slotting area. The purpose of the ultraviolet laser four times patterning slotting area is to remove the two side parts of the remaining BSG layer and the remaining PSG layer, and to loosen the surface layer of the boron diffusion layer and the surface layer of the phosphorus diffusion layer at the bottom of the slotting area, which is a preparation for forming a convex isolation area structure after subsequent wet cleaning.

[0078] In some specific embodiments, the conditions for ultraviolet laser four times patterning slotting are: laser wavelength 200-400nm, frequency 500-700KHz, marking speed 40000-50000mm / s, power 10-40W, processing time 1-3s.

[0079] The S9 of the present application adopts green laser, and the S10 adopts ultraviolet laser. The present application ingeniously utilizes the characteristic that the penetration depth of ultraviolet laser is shallower than that of green laser, and on the basis of ensuring removal of the BSG layer and the PSG layer, the deposition layers at different depths of the bottom can be loosened. In the process of three times of green laser patterning and slotting, the deposition layers (tunneling oxide layer, boron diffusion layer, phosphorus diffusion layer) at the bottom of the slotting area can be loosened, and thus can be completely removed in the subsequent wet cleaning process; and the depth of four times of ultraviolet laser patterning and slotting is relatively shallow, and thus only the surface layers of the boron diffusion layer and the phosphorus diffusion layer at the bottom of the slotting area can be loosened, so that in the subsequent wet cleaning process, the surface layers of the boron diffusion layer and the phosphorus diffusion layer in the area are accurately controlled to be removed by corrosion, thereby forming a convex isolation area structure.

[0080] In addition, in the S9 and the S10, in addition to ingeniously utilizing the difference in penetration depth of laser wavelength to assist in constructing the convex isolation area structure, the power of the two times of laser treatment is also controlled. Since the three times of green laser patterning is deeper and the four times of ultraviolet laser patterning is slightly shallower, the power of the three times of green laser patterning is higher and the time is longer, and the power of the four times of ultraviolet laser patterning is relatively lower and the time is shorter.

[0081] S11, removing the front and side wrap layers of the silicon wafer.

[0082] In some specific embodiments, the silicon wafer is subjected to chain machine (acid corrosion) to remove the boron diffusion layer and the phosphorus diffusion layer and other wrap layers on the front and side of the silicon wafer.

[0083] S12, cleaning and texturing: the silicon wafer is subjected to wet cleaning and texturing under alkaline. In the area covered by the BSG layer and the PSG layer, the bottom boron diffusion layer and the phosphorus diffusion layer are protected and will not be corroded by alkali. For other areas, since the depths of laser loosening in the S9 and the S10 are different, the rates of alkali corrosion in different areas will be different, and the wet etching rate is V (激 光三次图形化区域) > V (激光四次图形化区域) Therefore, by controlling the reasonable cleaning time, the deposition layers in the green laser three times patterning and slotting area on the back of the silicon wafer are removed, and the ultraviolet laser four times patterning and slotting area is loosened, and the surface layers of the boron diffusion layer 5 and the phosphorus diffusion layer 7 are removed, thereby forming a convex isolation area structure. The width of the single-side removed part of the surface layers of the boron diffusion layer 5 and the phosphorus diffusion layer 7 is 25-40% of the original whole layer, and the height is 30-80% of the original whole layer. At the same time, the front and back isolation areas of the silicon wafer are textured to form a pyramid texture 9; then the residual PSG layer 8 and BSG layer 6 on the back of the silicon wafer are removed by acid washing, as shown in FIG. 7.

[0084] In some specific embodiments, the de-wound plated silicon wafer is placed in an alkaline texturing tank for wet cleaning and texturing integrated processing, wherein the temperature is maintained at 75-85°C, and the time is 6-12 min.

[0085] S13, double-sided coating: after double-sided coating, a passivation anti-reflection layer 10 is formed on the front / back surface of the silicon wafer.

[0086] S14, screen printing and sintering to form an electrode layer 11, and light injection, to obtain a TBC solar cell with a convex isolation region structure, as shown in the specific embodiments and comparative examples of FIG. 8.

[0087] Embodiment 1: a method for preparing a TBC solar cell with a convex isolation region structure, specifically comprising the following steps: S1, double-sided polishing of a silicon wafer: select an N-type monocrystalline silicon wafer 1 cut by a diamond wire, with a thickness of 150 μm and a size of 182.2 mm x 186.7 mm. Place the silicon wafer in an alkaline polishing tank, maintain the temperature at 75°C, and polish for 6 min to obtain a double-sided polished wafer with a polishing thickness of 4 μm and a thinning amount of 0.42 g, as shown in FIG. 1.

[0088] S2, sequentially form a tunneling oxide layer 2 (using an LPCVD method), an intrinsic polysilicon layer 3 (using an LPCVD method), and a mask layer 4 (using an LPCVD method) on the back surface of the silicon wafer, as shown in FIG. 2. The deposition conditions of the tunneling oxide layer are as follows: O2 flow rate 40000 sccm, reaction temperature 600°C, time 600 s, and the thickness of the tunneling oxide layer is about 3 nm.

[0089] The deposition conditions of the intrinsic polysilicon layer are as follows: SiH4 flow rate 920 sccm, reaction temperature 550°C, time 3.3 h, working pressure 300 mTorr, and the thickness of the intrinsic polysilicon layer is about 290 nm.

[0090] The LPCVD deposition conditions of the mask layer are as follows: O2 flow rate 50000 sccm, temperature 650°C, time 3000 s, and the thickness of the mask layer is about 52 nm.

[0091] S3, laser one-time patterning and slotting to remove the mask layer in the design region of the boron diffusion layer, with the following conditions: laser wavelength 532 nm, frequency 600 KHz, marking speed 45000 mm / s, power 25 W, and processing time 2.7 s.

[0092] S4, alkaline cleaning to remove the residual mask layer 4 in the slotted region to fully expose the intrinsic polysilicon layer 3 in this region, as shown in FIG. 3. The specific steps are as follows: place the silicon wafer in an alkaline solution for cleaning, with a temperature of 75°C. During the experiment, by adjusting different cleaning times and other parameters, the thickness of the mask layer after cleaning is tested by an ellipsometer, the mask layer in the slotted region can be accurately removed, and the intrinsic polysilicon layer at the bottom is not excessively removed during the alkaline cleaning process.

[0093] S5, boron diffusion, the inner layer and the surface layer of the exposed intrinsic polysilicon layer are converted into boron diffusion layer and BSG layer, respectively. The conditions of boron diffusion are: temperature 850℃, diffusion time 10min, BCl3flow rate 200sccm, O2flow rate 1200sccm; oxidation promotion temperature 950℃, O2flow rate 7000sccm, promotion time 30min. The thickness of the BSG layer is about 45nm. In the above boron diffusion process, the unslotted area S3 can effectively block boron atoms from entering the intrinsic polysilicon layer 3 due to the protection of the mask layer 4, and only the inner layer and the surface layer of the exposed intrinsic polysilicon layer 3 are converted into boron diffusion layer 5 and BSG layer 6, respectively, as shown in Figure 4.

[0094] S6, laser secondary patterning and slitting to remove the remaining area mask layer, the conditions are: laser wavelength 532nm, frequency 600KHz, marking speed 45000mm / s, power 25W, processing time 2.7s.

[0095] S7, alkali cleaning to remove the residual mask layer in the slotted area to fully expose the intrinsic polysilicon layer in the area, as shown in Figure 5. The specific steps are: placing the silicon wafer in an alkali solution for cleaning, temperature 75℃, during the experiment, by adjusting different cleaning time parameters, the thickness of the mask layer after cleaning is tested by ellipsometer, the mask layer in the slotted area can be accurately removed without excessive removal of the intrinsic polysilicon layer at the bottom during alkali cleaning.

[0096] S8, phosphorus diffusion, the inner layer and the surface layer of the exposed intrinsic polysilicon layer are converted into phosphorus diffusion layer and PSG layer, respectively. The conditions of phosphorus diffusion are: temperature 790℃, diffusion time 20min, POCl3carried by nitrogen flow rate 1100sccm, O2flow rate 700sccm; oxidation promotion temperature 890℃, O2flow rate 3000sccm, promotion time 40min. The thickness of the PSG layer is about 42nm. In the above phosphorus diffusion process, since the surface of the boron diffusion layer 5 is protected by the BSG layer 6, phosphorus atoms cannot diffuse to the boron diffusion layer 5, and only the inner layer and the surface layer of the remaining exposed intrinsic polysilicon layer 3 are converted into phosphorus diffusion layer 7 and PSG layer 8, respectively, as shown in Figure 6.

[0097] S9, green laser third patterning and slitting to remove the BSG layer and PSG layer at the junction of the boron diffusion layer (p region) and the phosphorus diffusion layer (n region), and to loosen the deposited layers (tunnel oxide layer, boron diffusion layer, phosphorus diffusion layer) in this slotted area. The conditions are: laser wavelength 532nm, frequency 600KHz, marking speed 45000mm / s, power 50W, processing time 3s. The green laser third patterning and slitting area is the pre-designed isolation area (i.e. insulating Gap area). After removing the BSG layer and PSG layer in this area, an isolation area can be formed after subsequent wet cleaning.

[0098] S10, the remaining BSG layer and the remaining PSG layer are removed by ultraviolet laser four times of patterned slotting, and the surface layer of the boron diffusion layer and the surface layer of the phosphorus diffusion layer in the slotting area are loosened. The conditions are: laser wavelength is 355 nm, frequency is 600 KHz, marking speed is 45000 mm / s, power is 20 W, and processing time is 1.5 s. The purpose of the ultraviolet laser four times of patterned slotting is to remove the remaining BSG layer and the remaining PSG layer, and to loosen the surface layer of the boron diffusion layer and the surface layer of the phosphorus diffusion layer at the bottom of the slotting area, so as to lay the foundation for forming a convex isolation area structure after subsequent wet cleaning.

[0099] S11, the front and side of the silicon wafer are removed: the silicon wafer is removed by a chain machine (acid etching) to remove the boron diffusion layer and the phosphorus diffusion layer and other plating layers on the front and side of the silicon wafer.

[0100] S12, cleaning and texturing: the silicon wafer is subjected to wet cleaning and texturing under alkaline conditions, and the temperature is maintained at 82℃ for 7 min. After the deposition layer in the green laser three times of patterned slotting area on the back of the silicon wafer is removed, the back of the silicon wafer is exposed, and the boron diffusion layer surface layer and the phosphorus diffusion layer surface layer in the ultraviolet laser four times of patterned slotting area are removed, forming a convex isolation area structure. Among them, the width of the boron diffusion layer surface layer and the phosphorus diffusion layer surface layer removed on one side is 30% of the original whole layer, and the height is 50% of the original whole layer. At the same time, after the texturing of the front and back isolation areas of the silicon wafer, a pyramid texture 9 is formed; then the residual PSG layer 8 and BSG layer 6 on the back of the silicon wafer are removed by acid washing, as shown in FIG. 7.

[0101] S13, double-sided film plating: after double-sided film plating, a passivation anti-reflection layer 10 is generated on the front / back of the silicon wafer. Specifically, it includes: first depositing AlO x The thin film is generated by the reaction of Al(CH3)3 and water vapor, and the thickness is 8 nm, and the process temperature is controlled at 250℃. Then, a tube PECVD device is used to deposit SiN x film on the front and back of the silicon wafer. The thickness of the front SiN x film is about 82 nm, and the refractive index is 2.1; the thickness of the back SiN x film is about 90 nm, and the refractive index is 2.0; the reaction gas in the tube cavity is SiH4 and NH3, the working pressure is 1600 mTorr, the power is 12000 W, the temperature is 440℃, the flow rate of SiH4 gas is 980 sccm, the flow rate of NH3 gas is 8000 sccm, the silicon-nitrogen ratio is 1:5, and the deposition time is 10 min.

[0102] S14, screen printing metal contact on the back surface of the coated silicon wafer, then sintering at 770°C to form Ag-Si ohmic contact (electrode layer 11), and finally repairing by photo injection to obtain TBC solar cell with convex isolation region structure, as shown in Figure 8.

[0103] Example 2 The difference between Example 2 and Example 1 is that the mask layer in S2 is formed by one-step UV laser oxidation treatment: first generating a mask layer with a thickness of about 52 nm under the conditions of O2 flow rate of 50 sccm, ambient oxygen concentration of 26% (volume concentration), UV laser wavelength of 355 nm, power of 12 W, and treatment time of 10 s.

[0104] Example 3 The difference between Example 3 and Example 1 is that the mask layer in S2 is formed by two-step UV laser oxidation treatment: first generating a mask layer with a thickness of about 52 nm under the conditions of O2 flow rate of 50 sccm, ambient oxygen concentration of 26% (volume concentration), UV laser wavelength of 355 nm, power of 12 W, and treatment time of 10 s; and then forming a denser mask layer under the conditions of O2 flow rate of 200 sccm, ambient oxygen concentration of 60% (volume concentration), UV laser wavelength of 266 nm, power of 3 W, and treatment time of 18 s.

[0105] Comparative Example 1 (using two intrinsic polycrystalline silicon deposition processes) S1, selecting N-type monocrystalline silicon wafer cut by diamond wire, with a thickness of 150 μm and a size of 182.2 mm x 186.7 mm. The cut silicon wafer is placed in an alkali polishing tank, and the temperature is maintained at 75°C for 6 min for double-sided polishing, with a polishing thickness of 4 μm and a thinning amount of 0.42 g.

[0106] S2, then growing a tunnel oxide layer on the back surface of the polished silicon wafer by LPCVD, with an O2 gas flow rate of 40000 sccm, a temperature of 600°C, and a time of 600 s, to form a tunnel oxide layer with a thickness of about 3 nm; and then growing an intrinsic polycrystalline silicon layer on the basis of the tunnel oxide layer, with a SiH4 gas flow rate of 920 sccm, a temperature of 550°C, a time of 3.3 h, and a working pressure of 300 mTorr, to form an intrinsic polycrystalline silicon layer with a thickness of about 290 nm.

[0107] S3, then using high-temperature boron diffusion to convert the inner layer and the surface layer of the intrinsic polycrystalline silicon layer into boron diffusion layer and BSG layer, respectively, with a boron diffusion temperature of 850°C, a diffusion time of 10 min, a BCl3 gas flow rate of 200 sccm, an O2 gas flow rate of 1200 sccm, an oxidation promotion temperature of 950°C, an O2 flow rate of 7000 sccm, and a promotion time of 30 min, to form a BSG layer with a thickness of about 45 nm.

[0108] S4, using picosecond laser to open groove BSG layer once patterning, the laser wavelength is 532 nm, the frequency is 600 KHZ, the marking speed is 45000 mm / s, the power is 50 W, and the processing time is 3 s.

[0109] S5, the silicon wafer after laser patterning is put into an alkali solution for cleaning, the temperature is 75℃, the time is 360 s, and the etching depth is 1.7 μm.

[0110] S6, then the back surface of the silicon wafer is secondarily grown with a tunnel oxide layer by LPCVD, the gas flow of O2 is 30000 sccm, the temperature is 600℃, and the time is 450 s, and the thickness of the grown tunnel oxide layer is about 2.5 nm; then the intrinsic polysilicon layer is grown again on the basis of the tunnel oxide layer, wherein the gas flow of SiH4 is 920 sccm, the temperature is 550℃, the time is 1.5 h, and the working pressure is 300 mTorr, and the thickness of the intrinsic polysilicon layer is about 180 nm.

[0111] S7, the inner layer and the surface layer of the intrinsic polysilicon layer are converted into phosphorus diffusion layer and PSG layer respectively by phosphorus diffusion, the phosphorus diffusion temperature is 790℃, the diffusion time is 15 min, POCI3 is carried by nitrogen with a flow rate of 1000 sccm, the flow rate of O2 is 650 sccm, the oxidation advancing temperature is 890℃, the flow rate of O2 is 3000 sccm, and the advancing time is 20 min, and the thickness of the PSG layer is about 39 nm.

[0112] S8, then the PSG layer is secondarily opened groove by picosecond laser patterning, so that the PSG layer at the bottom of the boron diffusion layer and the junction area between the p region and the n region is loosened, the laser wavelength is 532 nm, the frequency is 600 KHz, the marking speed is 45000 mm / s, the power is 25 W, and the processing time is 2.7 s.

[0113] S9, the above silicon wafer is removed by a chain machine to remove the boron diffusion layer and the phosphorus diffusion layer on the front surface and the side surface of the silicon wafer.

[0114] S10, the silicon wafer after the removal of the wrap layer is put into an alkali texturing tank for back laser grooving area wet cleaning and texturing integrated processing, the temperature is maintained at 82℃, the time is 7 min, the weight loss is 0.36 g, and the cleaning and texturing are performed. Since the front surface of the silicon wafer has been removed from the wrap layer and there is no oxidation area, an effective light trapping textured surface can be formed during the texturing process; and the alkali solution can effectively etch the bottom deposition layer in the laser patterning area on the back surface, so as to form an isolated insulating structure. Then, the subsequent acid cleaning tank of the texturing tank can further remove the residual PSG layer and BSG layer of the silicon wafer.

[0115] S11, AlO xThin film, which is generated by Al(CH3)3 reacting with water vapor, thickness is 8nm, process temperature is controlled at 250℃. Then use tube PECVD equipment to deposit SiN on both sides x Film, SiN on front side x The thickness of thin film is about 82nm, refractive index is 2.1; SiN on back side x The thickness of thin film is about 90nm, refractive index is 2.0; tube cavity reaction gas is SiH4, NH3, working pressure is 1600mTorr, power is 12000W, temperature is 440℃, SiH4 gas flow rate is 980sccm, NH3 gas flow rate is 8000sccm, silicon-nitrogen ratio is 1:5, deposition time is 10min.

[0116] S12, after the film is plated, the sheet is screen printed on the back side to form a metal contact, then sintered at 770℃ to form Ag-Si ohmic contact, and finally repaired by light injection to obtain the final TBC finished product battery.

[0117] Comparative Example 2 Compared with Example 1, the difference is that it does not include S10, i.e. directly performing S11-S14 after S9 of Example 1, and the final obtained TBC solar cell does not have a convex isolation zone structure.

[0118] Performance comparison table 1: different battery performance data From the above table data, it can be seen that: (1) Since Examples 1-3 all use a one-step deposition of intrinsic polycrystalline silicon layer, compared with Comparative Example 1, the poly-Si parasitic absorption of the battery is lower, because it has a higher short-circuit current density.

[0119] (2) Since Examples 1-3 use a convex isolation zone structure, compared with Comparative Example 2, the poly-Si parasitic absorption of the battery is further reduced, and the battery leakage value is also further improved compared with Comparative Example 2.

[0120] (3) The difference between Examples 1-3 is the preparation method of the mask layer. Specifically: Example 1 uses a more traditional LPCVD process, Example 2 uses a one-step ultraviolet laser oxidation process, and Example 3 uses a two-step differential ultraviolet laser oxidation process. The results show that the performance of the product prepared by the LPCVD process is not as good as that prepared by the ultraviolet laser oxidation process. At the same time, the oxidation barrier layer formed by the one-step ultraviolet laser oxidation process in Example 2 is often not ideal in density, which can easily increase the risk of boron and phosphorus atoms diffusing into the bottom intrinsic polysilicon layer during subsequent boron and phosphorus diffusion processes, thereby causing the battery performance to decline or to leak. The two-step differential ultraviolet laser oxidation process used in Example 3 can make the oxidation barrier layer denser without increasing the thickness, so it can more effectively block the subsequent diffusion of boron and phosphorus atoms, thereby improving the battery performance.

[0121] The raw materials and equipment used in the present application are conventional raw materials and equipment in the art unless otherwise specified; the methods used in the present application are conventional methods in the art unless otherwise specified.

[0122] The above is only a preferred embodiment of the present application, and does not limit the present application in any way. Any simple modification, change, and equivalent transformation of the above embodiment based on the technical essence of the present application are still within the protection scope of the technical solution of the present application.

Claims

1. A method for producing a TBC solar cell having a convex isolation region structure, characterized by It comprises: S1, polishing both sides of the silicon wafer; S2, forming a tunneling oxide layer, an intrinsic polysilicon layer and a mask layer on the back side; S3, slotting to remove the mask layer in the design area of the boron diffusion layer; S4, alkali cleaning; S5, boron diffusion, converting the exposed intrinsic polysilicon layer into a boron diffusion layer and a BSG layer; S6, slotting to remove the remaining mask layer; S7, alkali cleaning; S8, phosphorus diffusion, converting the exposed intrinsic polysilicon layer into a phosphorus diffusion layer and a PSG layer; S9, green laser slotting to remove the BSG layer and the PSG layer at the junction of the boron diffusion layer and the phosphorus diffusion layer, and loosening the bottom of each deposited layer; S10, ultraviolet laser slotting to remove the remaining BSG layer and the remaining PSG layer on both sides, and loosening the surface layer of the boron diffusion layer and the surface layer of the phosphorus diffusion layer at the bottom; S11, removing the plating layer; S12, synchronous wet cleaning and texturing of the silicon wafer in an alkaline solution, the loosened deposited layer in S9 and the loosened surface layer of the boron diffusion layer and the phosphorus diffusion layer in S10 are removed, forming a convex isolation region structure; at the same time, the front side and the back side of the silicon wafer form a pyramid textured surface; finally, acid washing removes the remaining PSG layer and BSG layer; S13, double-sided film plating; S14, screen printing, sintering and light injection.

2. The preparation method according to claim 1, characterized in that: in S9, the green laser slotting conditions are: laser wavelength 477-592 nm, power 40-100 W, and processing time 1-5 s; in S10, the ultraviolet laser slotting conditions are: laser wavelength 200-400 nm, power 10-40 W, and processing time 1-3 s.

3. The production method according to claim 1 or 2, characterized by: in S12, the width of the removed part of the boron diffusion layer surface layer and the phosphorus diffusion layer surface layer is 25-40% of the whole layer, and the height is 30-80% of the whole layer.

4. The method of claim 1, wherein: in S2, the mask layer is formed by LPCVD, and the conditions are: O2 flow rate 20000-90000 sccm, temperature 500-700℃, time 2000-5000 s, and mask layer thickness 30-300 nm.

5. The method of claim 1, wherein: in S2, the mask layer can also be formed by ultraviolet oxidation laser treatment: firstly, generate a mask layer prototype under the conditions of oxygen concentration 20-40% and ultraviolet laser wavelength 300-400 nm; then, form a denser mask layer under the conditions of oxygen concentration 50-90% and ultraviolet laser wavelength 200-300 nm.

6. The method of claim 5, wherein: in S2, the conditions of the ultraviolet oxidation laser treatment are: firstly, generate a mask layer prototype under the conditions of O2 flow rate 10-100 sccm, ambient oxygen concentration 20-40%, ultraviolet laser wavelength 300-400 nm, power 10-500 W, and processing time 1-30 s; then, form a denser mask layer under the conditions of O2 flow rate 100-500 sccm, ambient oxygen concentration 50-90%, ultraviolet laser wavelength 200-300 nm, power 2-50 W, and processing time 1-30 s; the thickness of the mask layer is 30-300 nm.

7. The method of claim 1, wherein: In S2, the deposition conditions of the tunneling oxide layer are as follows: O2 flow rate 10000-80000 sccm, reaction temperature 400-800 ℃, time 200-1000 s, and tunneling oxide layer thickness 2-10 nm.

8. The method of claim 1, wherein: In S2, the deposition conditions of the intrinsic polysilicon layer are as follows: SiH4 flow rate 300-2000 sccm, reaction temperature 500-700 ℃, time 2-4 h, working pressure 100-500 mTorr, and intrinsic polysilicon layer thickness 100-300 nm.

9. The method of claim 1, wherein: In S5, the boron diffusion conditions are as follows: temperature 800-900 ℃, diffusion time 5-50 min, BCl3 flow rate 50-500 sccm, and O2 flow rate 500-2000 sccm; oxidation advancing temperature 900-1050 ℃, O2 flow rate 5000-30000 sccm, advancing time 30-80 min, and BSG layer thickness 30-70 nm.

10. The method of claim 1, wherein: In S8, the phosphorus diffusion conditions are as follows: temperature 750-850 ℃, diffusion time 5-30 min, POCl3 carried by N2 flow rate 500-1200 sccm, and O2 flow rate 500-1000 sccm; oxidation advancing temperature 850-950 ℃, O2 flow rate 1000-10000 sccm, advancing time 20-60 min, and PSG layer thickness 30-70 nm.

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