Circuit board and electronic device

Abstract

A circuit board and an electronic device. The circuit board comprises a signal vertical interconnect structure group and a signal wire group; two signal vertical interconnect structures of the signal vertical interconnect structure group are respectively and electrically connected to two signal wires of the signal wire group, so as to construct a first signal path and a second signal path on which signals can be transmitted in the same direction; a first conductor portion on the first signal path is arranged adjacent to a second conductor portion on the second transmission path, the first conductor portion and the second conductor portion having opposite signal transmission directions, and being constructed as a crosstalk suppression structure. In this way, reverse mutual inductance can be formed on the basis of the first conductor portion and the second conductor portion. Compared with mutual inductance that generates crosstalk due to co-directional transmission between the first signal path and the second signal path, on the signal paths, the first conductor portion and the second conductor portion forming the reverse mutual inductance are constructed as the crosstalk suppression structure, such that the relative capacitive coupling and the relative inductive coupling of a full link can be adjusted, thereby effectively reducing full-link crosstalk and improving signal quality.

Description

Circuit board and electronic device

[0001] The present application claims priority to the Chinese Patent Application No. 202411334823.8, filed on September 23, 2024, and entitled "Circuit board and electronic device", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] Embodiments of the present application relate to the technical field of circuit boards, and in particular to a circuit board and an electronic device. BACKGROUND

[0003] With the continuous improvement of the signal rate of high-speed systems, the crosstalk between adjacent signals has a greater and greater impact when the signals propagate on the transmission line. Excessive crosstalk noise will lead to signal quality degradation, and even affect the realization of system functions.

[0004] In order to reasonably control the crosstalk noise, the related technology usually uses optimization means to suppress the generation of crosstalk in the node area with large crosstalk, thereby reducing the system crosstalk. For example, through a high signal-to-ground pin map scheme, the crosstalk influence between vias is improved; for another example, the thickness of the green oil layer of the surface microstrip line is adjusted to improve the crosstalk influence of the surface trace. However, the space available for arrangement in the node area with large crosstalk is limited, and the crosstalk suppression optimization means will limit the impedance optimization of the corresponding area, and cannot effectively solve the crosstalk bottleneck of the high-speed system architecture. SUMMARY

[0005] Embodiments of the present application provide a circuit board and an electronic device, which effectively improve the crosstalk influence of the signal transmission link through the structural optimization of the circuit board, and provide technical support for improving the signal quality and rate.

[0006] The first aspect of the embodiment of the present application provides a circuit board, which comprises a signal vertical interconnection structure group and a signal trace group, the signal vertical interconnection structure group comprises two signal vertical interconnection structures, and the signal trace group comprises two signal traces; wherein the two signal vertical interconnection structures of the signal vertical interconnection structure group are electrically connected with the two signal traces of the signal trace group, respectively, to construct a first signal path and a second signal path which can transmit signals in the same direction; a first conductor part on the first signal path is arranged adjacent to a second conductor part on the second transmission path, the signal transmission directions on the first conductor part and the second conductor part are opposite, and the first conductor part and the second conductor part are constructed as a crosstalk suppression structure. In this way, the opposite mutual inductance can be formed based on the first conductor part and the second conductor part, compared with the mutual inductance which generates crosstalk in the same direction transmission between the first signal path and the second signal path, on the signal path, the first conductor part and the second conductor part which form the opposite mutual inductance are constructed as the crosstalk suppression structure, the relative capacitive coupling and the relative inductive coupling of the whole link can be adjusted, the whole link crosstalk can be effectively reduced, and the signal quality can be improved. At the same time, good technical support is provided for the improvement of the signal rate.

[0007] Exemplarily, the circuit board can be a chip packaging substrate, and can also be a carrier plate or a carrier plate-like plate used to realize electrical connection between electronic elements.

[0008] Based on the first aspect, the first aspect of the embodiment of the present application further provides a first implementation manner of the first aspect: the signal vertical interconnection structure group comprises a first vertical interconnection structure and a second vertical interconnection structure, the signal trace group comprises a first signal trace and a second signal trace, the first signal trace comprises a first connection trace segment and a first lead-out trace segment connected with each other, the first connection trace segment is electrically connected with the first vertical interconnection structure, the second signal trace comprises a second connection trace segment and a second lead-out trace segment connected with each other, the second connection trace segment is electrically connected with the second vertical interconnection structure; wherein the first conductor part is formed by the first connection trace segment or the first lead-out trace segment; and the second conductor part is formed by the second connection trace segment or the second lead-out trace segment. Specifically, in different crosstalk scenarios, the arrangement position of the reverse suppression structure can be determined according to the overall design requirement of the product, and the adaptability is good.

[0009] In actual application, the signal trace group can be a surface layer signal trace, or can also be an inner layer signal trace.

[0010] Based on the first implementation manner of the first aspect, the second implementation manner of the first aspect is provided in the embodiments of the present application: the signal vertical interconnection structure group is a signal via group, the signal via group includes a first signal via and a second signal via, the first signal via and the second signal via are arranged at intervals in a first direction; the signal trace group includes a first signal trace and a second signal trace, the first signal trace includes a first connection trace segment and a first lead-out trace segment connected with each other, the first connection trace segment is electrically connected with the first signal via, the second signal trace includes a second connection trace segment and a second lead-out trace segment connected with each other, the second connection trace segment is electrically connected with the second signal via. In this way, for the signal trace connected with the signal via to construct a signal path, the reverse mutual inductance can be formed by arranging the reverse suppression structure, so as to reduce the full-link crosstalk. The structure is simple, and the process implementation cost is low.

[0011] Based on the second implementation manner of the first aspect, the third implementation manner of the first aspect is provided in the embodiments of the present application: the first connection trace segment and the second connection trace segment are located between the first signal via and the second signal via, the first connection trace segment extends from the first signal via towards the second signal via, and the second connection trace segment extends from the second signal via towards the first signal via; the first conductor part is formed by the first connection trace segment, and the second conductor part is formed by the second connection trace segment. In this way, the reverse suppression structure can be constructed by using the connection position of the signal via and the signal trace, so as to effectively reduce the full-link crosstalk without increasing the occupation of the board layout space.

[0012] Exemplarily, in the second direction, the first lead-out trace segment extends towards one side of the circuit board, and the second lead-out trace segment extends towards the other side of the circuit board. Here, the first direction and the second direction are two directions intersecting in the board surface of the circuit board.

[0013] Other exemplarily, in the second direction, the first lead-out trace segment extends towards one side of the circuit board; and the second lead-out trace segment extends towards the same side as the first lead-out trace segment in the second direction after wrapping around the first signal via.

[0014] Based on the second implementation manner of the first aspect, the fourth implementation manner of the first aspect is provided by the embodiments of the present application: the first connection wire segment and the second connection wire segment are located on one side of the first signal via hole and the second signal via hole in the second direction, the first lead-out wire segment is located on the side of the second signal via hole away from the first signal via hole, the second lead-out wire segment is located between the first signal via hole and the second signal via hole, and the first lead-out wire segment and the second lead-out wire segment are arranged to extend towards the other side of the first signal via hole and the second signal via hole in the second direction; the first conductor part is formed by the first connection wire segment, and the second conductor part is formed by the second connection wire segment. In this way, the first lead-out wire segment and the second lead-out wire segment of the signal wire group are arranged to extend towards the same side, which is beneficial to realize the layout on the board.

[0015] Based on the second implementation manner of the first aspect, the fifth implementation manner of the first aspect is provided by the embodiments of the present application: in the second direction, the first connection wire segment extends from the first signal via hole towards one side, the first signal wire is bent and extends towards the other side in the second direction to form the first lead-out wire segment, and the first lead-out wire segment is located between the first signal via hole and the second signal via hole; in the second direction, the second connection wire segment extends from the second signal via hole towards one side, the second signal wire is bent and extends towards the other side in the second direction to form the second lead-out wire segment, and the second lead-out wire segment is located on the side of the second signal via hole away from the first signal via hole; the first conductor part is formed by the first lead-out wire segment, and the second conductor part is formed by the second connection wire segment. In this way, the first lead-out wire segment and the second lead-out wire segment of the signal wire group are arranged to extend towards the same side, which is beneficial to realize the layout on the board.

[0016] Based on the second implementation manner of the first aspect, or the third implementation manner of the first aspect, or the fourth implementation manner of the first aspect, or the fifth implementation manner of the first aspect, the sixth implementation manner of the first aspect is provided by the embodiments of the present application: the signal via hole group can be a blind via hole, a buried via hole or a through via hole. In this way, in different crosstalk scenarios, the reverse suppression structure can be applied to reduce the influence of crosstalk according to the overall design requirements of the product, and the adaptability is good.

[0017] Based on the first implementation manner of the first aspect, or the second implementation manner of the first aspect, or the third implementation manner of the first aspect, or the fourth implementation manner of the first aspect, or the fifth implementation manner of the first aspect, or the sixth implementation manner of the first aspect, the seventh implementation manner of the first aspect is provided by the embodiments of the present application: a notch is formed in the dielectric layer between the wiring layer where the first conductor part and the second conductor part are located and the reference layer, and the notch is arranged opposite to the first conductor part and the second conductor part in the thickness direction of the circuit board. In this way, based on the arrangement of the notch in the dielectric layer, the mutual inductance value formed by the crosstalk suppression structure can be adjusted as needed, the reverse mutual inductance coupling is adjusted, and the crosstalk suppression effect is effectively improved.

[0018] Exemplarily, projections of the first connection wire segment and the second connection wire segment on the board surface of the circuit board at least partially coincide with a projection of the slot on the board surface of the circuit board.

[0019] In practical applications, the thickness of the adjacent dielectric layer between the crosstalk suppression structure and the reference layer can also be thinned to adjust the coupling design according to the overall design requirements of the product, and the inductance value of the introduced inductance term can also be adjusted to obtain a corresponding reverse suppression mutual inductance value, thereby optimizing the suppression effect.

[0020] Based on the second implementation manner of the first aspect, or the third implementation manner of the first aspect, or the fourth implementation manner of the first aspect, or the fifth implementation manner of the first aspect, or the sixth implementation manner of the first aspect, or the seventh implementation manner of the first aspect, the embodiments of the present application further provide an eighth implementation manner of the first aspect: the circuit board is a high-density interconnection circuit board, the first signal via includes a first top via segment, a first middle layer wire segment and a first bottom via segment connected in sequence, the first top via segment and the first bottom via segment are staggered, the second signal via includes a second top via segment, a second middle layer wire segment and a second bottom via segment connected in sequence, the second top via segment and the second bottom via segment are staggered; in the middle wire layer of the circuit board, the first middle layer wire segment extends from the first top via segment to the first bottom via segment, and the second middle layer wire segment extends from the second top via segment to the second bottom via segment; the first conductor part is formed by the first middle layer wire segment, and the second conductor part is formed by the second middle layer wire segment. In this way, the crosstalk suppression structure can be configured in the thickness direction of the circuit board, which can effectively reduce the full-link crosstalk without increasing the occupation of the layout space on the board surface, thereby meeting the design requirements of the high-density layout trend.

[0021] Based on the eighth implementation manner of the first aspect, the embodiments of the present application further provide a ninth implementation manner of the first aspect: the first top via segment and the second bottom via segment are oppositely arranged in the thickness direction of the board, and the second top via segment and the first bottom via segment are oppositely arranged in the thickness direction of the board. In this way, the layout density of the board surface on both sides of the circuit board is not affected on the basis of effectively reducing the full-link crosstalk.

[0022] Based on the first aspect, the embodiments of the present application further provide a tenth implementation of the first aspect: the signal vertical interconnection structure group is a signal pad group, the signal pad group includes a first signal pad and a second signal pad, the signal trace group includes a first signal trace and a second signal trace, the first signal trace includes a first connection trace segment and a first lead-out trace segment connected in sequence, the first connection trace segment is electrically connected with the first signal pad, the second signal trace includes a second connection trace segment and a second lead-out trace segment connected in sequence, the second connection trace segment is electrically connected with the second signal pad. In this way, for the signal trace that constructs a signal path with the signal pad, a reverse mutual inductance can be formed by arranging a reverse suppression structure to reduce the full-link crosstalk. This has the characteristics of simple structure and low process implementation cost.

[0023] Exemplarily, the signal trace group can be a surface layer signal trace; other exemplarily, the signal trace group can also be an inner layer signal trace, the first connection trace segment and the first signal pad are electrically connected through a via, and the second connection trace segment and the second signal pad are electrically connected through a via.

[0024] Based on the tenth implementation of the first aspect, the embodiments of the present application further provide an eleventh implementation of the first aspect: the first signal pad and the second signal pad of the signal pad group are arranged in a pad array, the first signal pad and the second signal pad are located in two adjacent rows of the pad array in the second direction and are staggered in the first direction; the first connection trace segment is bent from the first signal pad towards the second signal pad, and the first lead-out trace segment is arranged to extend in the second direction; the first lead-out trace segment is located on one side of the second signal pad in the first direction, the second connection trace segment extends from the second signal pad towards the first signal pad, the second lead-out trace segment is arranged to extend in the second direction after being bent, and the second lead-out trace segment is located on the other side of the second signal pad in the first direction; the first conductor part is formed by the first lead-out trace segment, and the second conductor part is formed by the second connection trace segment. In this way, based on the pad array layout, the full-link crosstalk can be effectively reduced without increasing the occupation of the board layout space, which meets the design requirements of high-density layout.

[0025] In addition, based on the pad array layout, the ground pads can be arranged at intervals. In actual application, in the first direction, the signal pads and the ground pads arranged in rows are arranged at intervals in sequence, and in the second direction, the signal pads of the two adjacent rows of pads are staggered to reduce the near-end crosstalk.

[0026] The second aspect of the embodiments of the present application provides an electronic device, which includes a shell and a circuit board arranged in the shell, and the circuit board adopts the circuit board as described above. Based on the circuit board, the crosstalk noise during high-speed signal transmission can be improved, and the crosstalk suppression effect of the full link can be improved.

[0027] Exemplarily, the circuit board can be a chip packaging substrate, and can also be a carrier board or a carrier-like board used for electrical connection between electronic components. BRIEF DESCRIPTION OF DRAWINGS

[0028] FIG. 1 is a schematic diagram of a circuit board packaging structure according to an embodiment of the present application;

[0029] FIG. 2 is a schematic diagram of a circuit board according to an embodiment of the present application;

[0030] FIG. 3 is a schematic diagram of a construction principle of a crosstalk suppression structure according to an embodiment of the present application;

[0031] FIG. 4 is a partial schematic diagram of a position relationship between a crosstalk suppression structure and a dielectric layer notch according to an embodiment of the present application;

[0032] FIG. 5 is a schematic diagram of another circuit board according to an embodiment of the present application;

[0033] FIG. 6 is a schematic diagram of still another circuit board according to an embodiment of the present application;

[0034] FIG. 7 is a schematic diagram of still another circuit board according to an embodiment of the present application;

[0035] FIG. 8 is a schematic diagram of still another circuit board according to an embodiment of the present application;

[0036] FIG. 9 is a schematic diagram of still another circuit board according to an embodiment of the present application;

[0037] FIG. 10 is a schematic diagram of a crosstalk suppression structure formed based on an HDI process according to an embodiment of the present application;

[0038] FIG. 11 is a schematic diagram of another crosstalk suppression structure formed based on an HDI process according to an embodiment of the present application;

[0039] FIG. 12 is a schematic diagram of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0040] The embodiments of the present application provide a circuit board implementation scheme for reducing system crosstalk, which optimizes a signal path on a board and reasonably controls crosstalk of a whole signal transmission link.

[0041] The circuit board is an important electronic component in electronic equipment and is a carrier for electrical connection of electronic components. According to different functional applications, it can be divided into circuit board types such as packaging substrates, carrier boards and carrier-like boards; according to the dielectric layer material and manufacturing process, it can be divided into circuit board types such as printed circuit boards (PCB), low-temperature co-fired ceramic (LTCC) circuit boards, high-temperature co-fired ceramic (HTCC) and flexible printed circuit boards (FPC).

[0042] Taking a memory signal interconnection system in a computing server as an example, a motherboard is used as a typical carrier board form to realize electrical connection between a processor and a memory bank. Please refer to FIG. 1, which is an interconnection link diagram of a memory system architecture provided by an embodiment of the present application. The memory system includes a processor (chip package) 10, a motherboard 20, a connector 30 and a memory bank (Dual-Inline-Memory-Modules, DIMM) 40, the chip 101 of the processor 10 is packaged on the packaging substrate 102, and can be welded with the interface on the motherboard 20 through the ball grid array (Ball Grid Array, BGA) solder ball 103, the chip 101 and the DIMM 40 are interconnected through the wire, via, solder ball and connector structure forms to build a signal transmission path. Among them, according to the arrangement direction of the interconnection structure, the wire 101 on the motherboard 10 and the wire 1021 on the packaging substrate 102 of the chip 101 are horizontal interconnection structures, and the via 202 on the motherboard 10 and the via 1022 on the packaging substrate 102 of the chip, the solder ball 103 and the connector 30 are vertical interconnection structures.

[0043] In order to reduce the crosstalk influence between adjacent signals, the related technology usually uses an optimization means to suppress crosstalk in a node area with large crosstalk. For example, a high signal-to-ground pin arrangement is used in chip packaging to improve the crosstalk influence between adjacent signal vias; for another example, the thickness of the green oil layer of the surface layer microstrip line of the board is adjusted to improve the crosstalk influence between adjacent surface layer wires. With the trend of product miniaturization, the arrangement space of the node area with large crosstalk is limited, which leads to a bottleneck in crosstalk suppression of the system architecture and cannot meet the evolution of signal rate.

[0044] Based on this, the embodiment of the present application provides a circuit board, which comprises a signal vertical interconnection structure group and a signal trace group, the signal vertical interconnection structure group comprises two signal vertical interconnection structures, the signal trace group comprises two signal traces, the two signal vertical interconnection structures of the signal vertical interconnection structure group are respectively electrically connected with the two signal traces of the signal trace group, and a first signal path and a second signal path capable of transmitting signals in the same direction are constructed.

[0045] In order to better understand the technical solutions and technical effects of the present application, without losing generality, specific embodiments will be described in detail below in combination with the drawings. Please refer to FIG. 2 and FIG. 3, wherein FIG. 2 is a schematic diagram of a circuit board provided by the embodiment of the present application, and FIG. 3 is a schematic diagram of a construction principle of a crosstalk suppression structure provided by the embodiment of the present application.

[0046] As shown in FIG. 2, the circuit board 1 comprises a signal via group 2 and a signal trace group 3, the signal via group 2 comprises a first signal via 21 and a second signal via 22, and the signal trace group 3 comprises a first signal trace 31 and a second signal trace 32. In order to clearly show the adaptation principle of the crosstalk suppression structure, only a part of the signal path connected with a group of signal vias is shown in FIG. 2.

[0047] In the first direction X, the first signal via 21 and the second signal via 22 are arranged at intervals. One end of the first signal trace 31 is electrically connected with the first signal via 21, and a first signal path is constructed; the second signal trace 32 is electrically connected with the second signal via 22, and a second signal path is constructed. In combination with FIG. 3, the first signal path P1 and the second signal path P2 can transmit signals in the same direction. Here, the "signals transmitted in the same direction" means that the signals are transmitted in the same direction on the two signal paths, for example, data signals are transmitted from the processor chip side to the memory stick side. Exemplarily, in the node region S adjacent to the first signal path P1 and the second signal path P2, crosstalk is generated between the signals transmitted in the same direction based on mutual inductance.

[0048] As shown in FIG. 2, the first signal trace 31 includes a first connecting trace segment 311 and a first leading trace segment 312 connected together, the first connecting trace segment 311 is electrically connected with the first signal via 21, and the second signal trace 32 includes a second connecting trace segment 321 and a second leading trace segment 322 connected together, the second connecting trace segment 321 is electrically connected with the second signal via 22; that is, the first signal trace 31 is electrically connected with the first signal via 21 through the first connecting trace segment 311, and the second signal trace 32 is electrically connected with the second signal via 22 through the second connecting trace segment 321, so as to lead out the signals from the corresponding signal vias and distribute to other parts (not shown in the figure) of the circuit board 1.

[0049] In the first direction X, the first connecting trace segment 311 and the second connecting trace segment 321 are located between the first signal via 21 and the second signal via 22, and the first connecting trace segment 311 is arranged to extend from the first signal via 21 towards the second signal via 22, and the second connecting trace segment 321 is arranged to extend from the second signal via 22 towards the first signal via 21. That is, the first connecting trace segment 311 and the second connecting trace segment 321 extend from the signal vias connected together in opposite directions, and are arranged adjacent to each other in the second direction Y. As shown by the arrows in FIG. 2, the signals on the first connecting trace segment 311 and the second connecting trace segment 321 are transmitted in opposite directions, thereby forming a reverse mutual inductance.

[0050] In the first direction X, the first connecting trace segment 311 and the second connecting trace segment 321 are located between the first signal via 21 and the second signal via 22, and the first connecting trace segment 311 is arranged to extend from the first signal via 21 towards the second signal via 22, and the second connecting trace segment 321 is arranged to extend from the second signal via 22 towards the first signal via 21. That is, the first connecting trace segment 311 and the second connecting trace segment 321 extend from the signal vias connected together in opposite directions, and are arranged adjacent to each other in the second direction Y. As shown by the arrows in FIG. 2, the signals on the first connecting trace segment 311 and the second connecting trace segment 321 are transmitted in opposite directions, thereby forming a reverse mutual inductance.

[0051] In the second direction Y, the first leading trace segment 312 is arranged to extend towards one side of the circuit board, and the second leading trace segment 322 is arranged to extend towards the other side of the circuit board, without affecting the connection wiring of the first signal via 21 and the second signal via 22 on the basis of constructing a reliable passive crosstalk suppression structure.

[0052] In a specific implementation, the signal via group 2 can be a buried via, a blind via or a through via. For the signal via group 2 in the form of a buried via, the signal trace group 3 can be an inner layer signal trace of the circuit board 1; for the signal via group 2 in the form of a blind via or a through via, the signal trace group 3 can be an inner layer signal trace of the circuit board 1 or a surface layer signal trace of the circuit board 1. The embodiments of the present application are not limited in this regard.

[0053] In the present embodiment, the signal trace connected with the signal via is in a bent shape to construct the passive crosstalk suppression structure. As a preferred, the crosstalk suppression structure on the circuit board trace structure in the link can be arranged in a relatively spacious area to avoid affecting the overall layout of the circuit board due to the introduction of the crosstalk suppression structure. In a specific implementation, the inductance value of the crosstalk suppression structure can be adjusted by adjusting the length or cross-sectional dimension (trace width) of the first conductor part and the second conductor part, or the spacing between the first conductor part and the second conductor part, to match the inductance value of other nodes in the link, thereby effectively reducing the overall crosstalk of the link.

[0054] To further optimize the reverse mutual inductance suppression effect, in addition to adjusting the self structure and relative position relationship of the first conductor part and the second conductor part, for the corresponding trace segments (the first connection trace segment 311 and the second connection trace segment 321) of the signal trace group constructing the crosstalk suppression structure, a slot can be opened in the adjacent dielectric layer between the crosstalk suppression structure and the reference layer, as shown in FIG. 4, which is a partial schematic view of the position relationship between the crosstalk suppression structure and the dielectric layer slot according to an embodiment of the present application.

[0055] As shown in FIG. 4, for the first connection trace segment 311 and the second connection trace segment 321 constructed as the passive crosstalk suppression structure, a slot 111 is opened in the adjacent dielectric layer 11 between the wiring layer where the first connection trace segment 311 and the second connection trace segment 321 are located and the reference layer, and the slot 111 is oppositely arranged in the thickness direction of the circuit board 1. In this way, based on the arrangement of the dielectric layer slot 111, the mutual inductance value formed by the crosstalk suppression structure is adjusted according to the overall design requirements of the product, the reverse mutual inductance coupling is adjusted, and the crosstalk suppression effect is effectively improved.

[0056] In a specific implementation, the projection of the first connection trace segment 311 and the second connection trace segment 321 on the board surface of the circuit board at least partially overlaps with the projection of the slot 111 on the board surface of the circuit board. The specific implementation can be determined as required, and the embodiments of the present application are not limited in this regard.

[0057] In other specific implementations, the adjacent dielectric layer 11 (not shown in the figure) between the crosstalk suppression structure and the reference layer can also be thinned to adjust the coupling design according to the overall design requirements of the product, to adjust the inductance value of the introduced inductance item to obtain the corresponding reverse suppression mutual inductance value, and to optimize the suppression effect.

[0058] In addition, in other possible implementations, the dielectric constant of the adjacent dielectric layer between the crosstalk suppression structure and the reference layer can also be adjusted, for example but not limited to, by increasing or reducing the dielectric constant of the dielectric layer adjacent to the crosstalk suppression structure, relative to the dielectric layer material of other regions, to adjust the mutual inductance value and further improve the crosstalk suppression effect.

[0059] For the signal traces, in other specific implementations, other forms of bent traces can also be used to construct the crosstalk suppression structure. Please refer to FIG. 5, which is a schematic diagram of another circuit board provided by an embodiment of the present application. In order to clearly show the differences and connections between different embodiments, the same functions and structures are shown in the figure with the same reference numerals as in FIG. 1.

[0060] As shown in FIG. 5, the first signal trace 31 and the second signal trace 32 of the circuit board 1 are constructed into passive crosstalk suppression structures in different forms of bent traces. In the first direction X, the first connection trace segment 311 and the second connection trace segment 321 are located between the first signal via 21 and the second signal via 22, and the first connection trace segment 311 and the second connection trace segment 321 are constructed into passive crosstalk suppression structures that can form a reverse mutual inductance. Compared with the scheme described in FIG. 2, the difference of the present embodiment is that the second lead-out trace segment 322 connected with the second connection trace segment 321 is wrapped around the first signal via 21 and arranged to extend towards the same side as the first lead-out trace segment 312 in the second direction Y. In this way, the layout requirements of the board surface in different scenarios can be adapted.

[0061] Other forms of construction and connection can be the same as those described in the foregoing embodiments. Here, no further description is given.

[0062] Please refer to FIG. 6, which is a schematic diagram of yet another circuit board provided by an embodiment of the present application.

[0063] As shown in FIG. 6, the first signal trace 31 and the second signal trace 32 of the circuit board 1 are also constructed into passive crosstalk suppression structures in different forms of bent traces. The first connection trace segment 311 of the first signal trace 31 and the second connection trace segment 321 of the first signal trace 31 are located on one side of the first signal via 21 and the second signal via 22 in the second direction Y, and the first connection trace segment 311 and the second connection trace segment 321 are constructed into passive crosstalk suppression structures that can form a reverse mutual inductance. The first lead-out trace segment 312 of the first signal trace 31 is located on the side of the second signal via 22 away from the first signal via 21, and the second lead-out trace segment 322 of the second signal trace 32 is located between the first signal via 21 and the second signal via 22, and the first lead-out trace segment 312 and the second lead-out trace segment 322 are arranged to extend towards the other side of the first signal via 21 and the second signal via 22 in the second direction Y.

[0064] Other configurations and connection manners can be the same as those in the foregoing embodiments. Details are not described herein.

[0065] Please refer to FIG. 7, which is a schematic diagram of another circuit board provided by an embodiment of the present application.

[0066] As shown in FIG. 7, the first signal trace 31 and the second signal trace 32 of the circuit board 1 have the same bending layout. In the second direction Y, the first connection trace segment 311 of the first signal trace 31 extends from the first signal via 21 towards one side, and the first signal trace 31 is bent to extend in the second direction Y towards the other side to form the first lead-out trace segment 312, which is located between the first signal via 21 and the second signal via 22. In the second direction Y, the second connection trace segment 321 of the second signal trace 32 extends from the second signal via 22 towards one side, and the second signal trace 32 is bent to extend in the second direction Y towards the other side to form the second lead-out trace segment 322, which is located on the side of the second signal via 22 away from the first signal via 21.

[0067] In this embodiment, the first lead-out trace segment 312 and the second connection trace segment 321 are configured to form a passive crosstalk suppression structure capable of forming a mutual inductance. In other words, the first conductor part is formed by the first lead-out trace segment 312, and the second conductor part is formed by the second connection trace segment 321.

[0068] Other configurations and connection manners can be the same as those in the foregoing embodiments. Details are not described herein.

[0069] In the foregoing embodiments, the signal trace is a horizontal interconnection structure on the signal path, and the signal via is a vertical interconnection structure on the signal path. In other specific implementations, the vertical interconnection structure electrically connected to the signal trace group 3 can also be a pad on the surface of the circuit board 1, such as a group of interface pads for connecting the pins of a connector, or a group of interface pads for connecting the solder balls of a chip package. Please refer to FIG. 8, which is a schematic diagram of another circuit board provided by an embodiment of the present application. In order to clearly show the differences and connections between this embodiment and the foregoing embodiments, the same functional configurations and structures are shown in the figure with the same reference numerals as in FIG. 1.

[0070] Compared with the foregoing embodiment, the difference of the present embodiment lies in that the vertical interconnection structure electrically connected with the signal trace group 3 is the signal pad group 2a, the signal pad group 2a comprises a first signal pad 21a and a second signal pad 22a, and the signal trace group 3 is a surface layer signal trace of the circuit board 1. The signal pads in the array are arranged at intervals with the ground pads 23, as shown in FIG. 8. In the first direction X, the signal pads in the array are arranged at intervals with the ground pads 23 in sequence, and in the second direction Y, the signal pads of the adjacent two rows of pads are arranged staggeredly to reduce the near-end crosstalk.

[0071] Exemplarily, only one signal pad group 2a is taken as an example in FIG. 8, and the signal trace group 3 electrically connected therewith is shown. The first signal pad 21a and the second signal pad 22a of the signal pad group 2a are located in the adjacent two rows of pads in the second direction Y and are arranged staggeredly in the first direction X. Correspondingly, the first signal trace 31 is electrically connected with the first signal pad 21a, the second signal trace 32 is electrically connected with the second signal pad 22a, and both are led out towards the same side in the second direction Y.

[0072] In the present embodiment, the first leading-out trace segment 312 of the first signal trace 31 is bent from the first signal pad 21a towards the second signal pad 22a, and the first leading-out trace segment 312 connected with the first leading-out trace segment 312 is arranged extending in the second direction Y, and the first leading-out trace segment 312 is located between the second signal pad 22a and the ground pad 23 adjacent to one side of the second signal pad 22a in the first direction X. The second connecting trace segment 321 of the second signal trace 32 is extended from the second signal pad 22a towards the first signal pad 21a, and the second leading-out trace segment 322 connected with the second connecting trace segment 321 is arranged extending in the second direction Y after being bent, and the second leading-out trace segment 322 is located between the second signal pad 22a and the ground pad 23 adjacent to the other side of the second signal pad 22a in the first direction X.

[0073] In the present embodiment, the first leading-out trace segment 312 and the second connecting trace segment 321 are constructed as passive crosstalk suppression structures capable of forming inverse mutual inductance; in other words, the first conductor part is formed by the first leading-out trace segment 312, and the second conductor part is formed by the second connecting trace segment 321. In a specific implementation, the signal pad group 2a of the circuit board 1 can be an interface pad for on-board assembly of a connector. The present embodiment is not limited thereto.

[0074] Other configurations and connection modes can be the same as those of the foregoing embodiment. Details are not described herein again.

[0075] The signal pads of the circuit board described in the foregoing Figure 8 can also be realized by vias to lead out signals. Please refer to Figure 9, which is a schematic diagram of another circuit board provided by an embodiment of the present application. In order to clearly show the differences and connections between the present embodiment and the embodiment described in Figure 8, the same functional components and structures are shown in the figure with the same reference numerals as in Figure 8.

[0076] As shown in Figure 9, the difference between the present embodiment and the embodiment described in Figure 8 is that the signal trace group 3 is an inner layer signal trace of the circuit board 1, and the first signal pad 21a and the second signal pad 22a of the signal pad group 2a are both electrically connected to the corresponding signal traces through signal vias 24. The ground pad 23 is electrically connected to a reference ground layer (not shown in the figure) through a ground via 25.

[0077] Similarly, the first lead-out trace segment 312 and the second connection trace segment 321 are constructed as passive crosstalk suppression structures that can form a reverse mutual inductance. Other components and connection manners can be the same as those of the embodiment described in Figure 8. Here, no further description is given.

[0078] For a circuit board with limited layout space in the horizontal trace layer, passive crosstalk suppression structures can also be constructed based on a high-density interconnection (HDI) process using the layoutable layers inside the board. Please refer to Figure 10, which is a schematic diagram of a crosstalk suppression structure constructed based on an HDI process provided by an embodiment of the present application. In order to clearly show the structural configuration relationship of the crosstalk suppression structure, only a group of signal via groups inside the circuit board are shown in the figure.

[0079] As shown in Figure 10, the first signal path P1 and the second signal path P2 can transmit signals in the same direction, and the main structures of the first signal path P1 and the second signal path P2 are vias, which can realize the interconnection between the top layer and the bottom layer of the circuit board. The first signal path P1 includes a first top via segment 11b, a first middle layer trace segment 12b, and a first bottom via segment 13b connected in sequence, and the second signal path P2 includes a second top via segment 21b, a second middle layer trace segment 22b, and a second bottom via segment 23b connected in sequence.

[0080] The first top via segment 11b and the second bottom via segment 23b can be oppositely arranged in the plate thickness direction, and the second top via segment 21b and the first bottom via segment 13b can be oppositely arranged in the plate thickness direction. In the middle wiring layer of the circuit board, the first middle layer wiring segment 12b is arranged to extend from the first top via segment 11b to the first bottom via segment 13b, and the second middle layer wiring segment 22b is arranged to extend from the second top via segment 21b to the second bottom via segment 23b, and the two can be constructed as a crosstalk suppression structure capable of forming a reverse mutual inductance. In other words, the first conductor part is formed by the first middle layer wiring segment 12b, and the second conductor part is formed by the second middle layer wiring segment 22b. On the basis of reducing the full-link crosstalk, the layout density of the two sides of the circuit board is not affected.

[0081] Here, in the plate thickness direction, the oppositely arranged first top via segment 11b and second bottom via segment 23b, and the oppositely arranged second top via segment 21b and first bottom via segment 13b, include the case of complete centering of the corresponding via segments, and also include the case of partial centering of the corresponding via segments. The embodiments of the present application are not limited.

[0082] Based on the characteristics of the HDI process, the first signal path P1 and the second signal path P2 exchange the opening positions in the middle layer of the circuit board, and construct a crosstalk suppression structure capable of forming a reverse mutual inductance through the wiring located in the middle layer. In specific implementation, the circuit board can be a first-order, second-order, third-order, fourth-order, fifth-order, etc. HDI, which can be configured according to the overall design requirements of the product, that is, for the first middle layer wiring segment and the second middle layer wiring segment constructed to form the crosstalk suppression structure, they can be arranged in the middle wiring layer between any two adjacent orders. The embodiments of the present application are not limited.

[0083] In order to obtain better crosstalk suppression effect, in specific implementation, crosstalk suppression structures can also be arranged between the wirings and between the vias in the signal transmission link. Please refer to FIG. 11, which is a schematic diagram of another crosstalk suppression structure constructed based on the HDI process according to an embodiment of the present application. In order to clearly show the difference and relationship between the present embodiment and the embodiment described in FIG. 10, the same function and structure are schematically shown in the figure with Figure 1 mark.

[0084] Compared with the embodiment described in FIG. 10, the present embodiment further includes a signal wiring group, which includes a first signal wiring 14b and a second signal wiring 24b. As shown in FIG. 11, the first signal path P1 includes the first signal wiring 14b, the first top via segment 11b, the first middle layer wiring segment 12b and the first bottom via segment 13b connected in sequence, and the second signal path P2 includes the second signal wiring 24b, the second top via segment 21b, the second middle layer wiring segment 22b and the second bottom via segment 23b connected in sequence.

[0085] The first signal trace 14b and the second signal trace 24b are surface layer signal traces of the circuit board, the first signal trace 14b is electrically connected with the first top via segment 11b through the first connecting trace segment 141b, and the second signal trace 24b is electrically connected with the second top via segment 21b through the second connecting trace segment 241b. The first connecting trace segment 141b and the second connecting trace segment 241b are constructed as a crosstalk suppression structure capable of forming mutual inductance. In a specific implementation, the first signal trace 14b and the second signal trace 24b as a signal trace group can be constructed as the crosstalk suppression structure described in the foregoing FIG. 2, FIG. 4 to FIG. 7. Details are not described herein again.

[0086] Meanwhile, in the middle trace layer, the first middle layer trace segment 12b and the second middle layer trace segment 22b are constructed as a crosstalk suppression structure capable of forming reverse mutual inductance. Overall, based on the crosstalk suppression structure between the signal trace groups and the crosstalk suppression structure between the vias, the inductance value of the formed reverse mutual inductance is cooperatively adjusted to further improve the crosstalk suppression effect of the whole link. Specifically, the arrangement position of the reverse suppression structure can be flexibly determined according to needs in different crosstalk scenarios. The embodiments of the present application are not limited.

[0087] The circuit board 1 described in the foregoing embodiments can be widely applied to electronic devices in different application scenarios. Please refer to FIG. 12, which is a schematic diagram of an electronic device provided by an embodiment of the present application.

[0088] As shown in FIG. 12, the electronic device 100 includes a housing 50 and the foregoing circuit board 1 arranged in the housing 50. Based on the circuit board, the crosstalk noise during high-speed signal transmission is improved, and the crosstalk suppression effect of the whole link is improved. In a specific implementation, the circuit board can be a chip packaging substrate, a carrier plate or a carrier-like plate used to realize electrical connection between electronic elements, and the like. The embodiments of the present application are not limited.

[0089] It should be understood that other functional components of the electronic device can be implemented by using the prior art, and thus details are not described herein again.

[0090] In addition, the ordinal numbers "first" and "second" and the like used herein are only used to describe the same function or structure in the technical solutions. It can be understood that the use of the ordinal numbers does not limit the understanding of the technical solutions claimed by the present application.

[0091] The above is only the preferred embodiments of the present application. It should be noted that, for those skilled in the art, without departing from the principle of the present application, a number of improvements and refinements can be made, which should also be considered as the protection scope of the present application.

Claims

1. A circuit board, characterized by, The circuit board comprises a signal vertical interconnection structure group and a signal trace group, the signal vertical interconnection structure group comprises two signal vertical interconnection structures, and the signal trace group comprises two signal traces; The two signal vertical interconnection structures of the signal vertical interconnection structure group are electrically connected with the two signal traces of the signal trace group respectively, to form a first signal path and a second signal path for transmitting signals in the same direction; a first conductor part on the first signal path is arranged adjacent to a second conductor part on the second transmission path, the signal transmission directions on the first conductor part and the second conductor part are opposite, and the first conductor part and the second conductor part are arranged as a crosstalk suppression structure.

2. The circuit board of claim 1, wherein The signal vertical interconnection structure group comprises a first vertical interconnection structure and a second vertical interconnection structure, the signal trace group comprises a first signal trace and a second signal trace, the first signal trace comprises a first connecting trace segment and a first lead-out trace segment connected with each other, the first connecting trace segment is electrically connected with the first vertical interconnection structure, and the second signal trace comprises a second connecting trace segment and a second lead-out trace segment connected with each other, the second connecting trace segment is electrically connected with the second vertical interconnection structure. The first conductor part is formed by the first connecting trace segment or the first lead-out trace segment. The second conductor part is formed by the second connecting trace segment or the second lead-out trace segment.

3. The circuit board of claim 2, wherein, The signal trace group is a surface layer signal trace or an inner layer signal trace.

4. The circuit board of claim 1, wherein The signal vertical interconnection structure group is a signal via group, the signal via group comprises a first signal via and a second signal via, and the first signal via and the second signal via are arranged at intervals in a first direction; the signal trace group comprises a first signal trace and a second signal trace, the first signal trace comprises a first connecting trace segment and a first lead-out trace segment connected with each other, the first connecting trace segment is electrically connected with the first signal via, and the second signal trace comprises a second connecting trace segment and a second lead-out trace segment connected with each other, the second connecting trace segment is electrically connected with the second signal via.

5. The circuit board of claim 4, wherein, The first connecting trace segment and the second connecting trace segment are located between the first signal via and the second signal via, the first connecting trace segment is arranged to extend from the first signal via towards the second signal via, and the second connecting trace segment is arranged to extend from the second signal via towards the first signal via; the first conductor part is formed by the first connecting trace segment, and the second conductor part is formed by the second connecting trace segment.

6. The circuit board of claim 5, wherein, In a second direction, the first lead-out trace segment is arranged to extend towards one side of the circuit board, and the second lead-out trace segment is arranged to extend towards the other side of the circuit board.

7. The circuit board of claim 5, wherein In a second direction, the first lead-out trace segment is arranged to extend towards one side of the circuit board; after wrapping around the first signal via, the second lead-out trace segment is arranged to extend towards the same side as the first lead-out trace segment in the second direction.

8. The circuit board of claim 4, wherein, The first connection trace segment and the second connection trace segment are located on one side of the first signal via and the second signal via in the second direction, the first lead-out trace segment is located on a side of the second signal via away from the first signal via, the second lead-out trace segment is located between the first signal via and the second signal via, and the first lead-out trace segment and the second lead-out trace segment are arranged to extend towards the other side of the first signal via and the second signal via in the second direction; the first conductor part is formed by the first connection trace segment, and the second conductor part is formed by the second connection trace segment.

9. The circuit board of claim 4, wherein, In the second direction, the first connection trace segment is arranged to extend from the first signal via towards one side, the first signal trace is bent and extends in the second direction towards the other side to form the first lead-out trace segment, and the first lead-out trace segment is located between the first signal via and the second signal via; in the second direction, the second connection trace segment is arranged to extend from the second signal via towards one side, the second signal trace is bent and extends in the second direction towards the other side to form the second lead-out trace segment, and the second lead-out trace segment is located on a side of the second signal via away from the first signal via; the first conductor part is formed by the first lead-out trace segment, and the second conductor part is formed by the second connection trace segment.

10. The circuit board according to any one of claims 4 to 9, characterized in that, The signal via group is a blind via, a buried via or a through via.

11. The circuit board according to any one of claims 2 to 9, characterized by A notch is formed in a medium layer between a wiring layer where the first conductor part and the second conductor part are located and a reference layer, and the notch is arranged opposite to the first conductor part and the second conductor part in the thickness direction of the circuit board.

12. The circuit board according to any one of claims 4 to 10, characterized by The circuit board is a high-density interconnection circuit board, the first signal via includes a first top via segment, a first intermediate layer trace segment and a first bottom via segment connected in sequence, the first top via segment and the first bottom via segment are arranged staggered, the second signal via includes a second top via segment, a second intermediate layer trace segment and a second bottom via segment connected in sequence, the second top via segment and the second bottom via segment are arranged staggered; in the intermediate layer trace of the circuit board, the first intermediate layer trace segment is arranged to extend from the first top via segment towards the first bottom via segment, and the second intermediate layer trace segment is arranged to extend from the second top via segment towards the second bottom via segment; the first conductor part is formed by the first intermediate layer trace segment, and the second conductor part is formed by the second intermediate layer trace segment.

13. The circuit board of claim 12, wherein, The first top via segment and the second bottom via segment are arranged opposite in the thickness direction of the board, and the second top via segment and the first bottom via segment are arranged opposite in the thickness direction of the board.

14. The circuit board of claim 1, wherein, The signal vertical interconnection structure group is a signal pad group, the signal pad group includes a first signal pad and a second signal pad, the signal trace group includes a first signal trace and a second signal trace, the first signal trace includes a first connecting trace segment and a first leading-out trace segment connected in sequence, the first connecting trace segment is electrically connected with the first signal pad, the second signal trace includes a second connecting trace segment and a second leading-out trace segment connected in sequence, the second connecting trace segment is electrically connected with the second signal pad.

15. The circuit board of claim 14, wherein, The signal trace group is a surface layer signal trace, or the signal trace group is an inner layer signal trace, the first connecting trace segment and the first signal pad are electrically connected through a via, and the second connecting trace segment and the second signal pad are electrically connected through a via.

16. The circuit board according to claim 14 or 15, characterized in that The first signal pad and the second signal pad of the signal pad group are arranged in a pad array, the first signal pad and the second signal pad are located in two adjacent rows of the pad array in the second direction and are staggered in the first direction; The first connecting trace segment is bent from the first signal pad towards the second signal pad, and the first leading-out trace segment is arranged to extend in the second direction; the first leading-out trace segment is located on one side of the second signal pad in the first direction, the second connecting trace segment extends from the second signal pad towards the first signal pad, and the second leading-out trace segment is arranged to extend in the second direction after being bent; the second leading-out trace segment is located on the other side of the second signal pad in the first direction; the first conductor part is formed by the first leading-out trace segment, and the second conductor part is formed by the second connecting trace segment.

17. An electronic device, comprising: The electronic device includes a housing and a circuit board arranged in the housing, and the circuit board is the circuit board according to any one of claims 1 to 16.

18. The circuit board of claim 17, wherein, The circuit board is a chip packaging substrate, a carrier plate or a carrier plate-like plate for electrical connection between electronic elements.

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