Communication method and apparatus

Abstract

A communication method and apparatus, which are suitable for multiplexing polar-code-based distribution matching. The method comprises: a first device performing distribution matching on a first sequence to obtain a second sequence, and outputting the second sequence, the distribution matching including polar coding and rate matching, wherein the first sequence comprises a first bit set and a second bit set, and the second sequence comprises a third bit set and a fourth bit set; corresponding to the rate matching being repeated, the third bit set is obtained by performing exclusive-OR processing on bits in the first bit set and bits in the fourth bit set; and the fourth bit set is determined on the basis of a result of polar coding for the second bit set. In the present application, a distribution matching result with the number of bits being E can be output by means of a polar code having a mother code length of N, wherein E is greater than or equal to N.

Description

Communication method and apparatus

[0001] Cross Reference to Related Applications

[0002] This application claims priority to the Chinese Patent Application No. 202411392183.6, filed on September 30, 2024, and entitled “A Communication Method and Apparatus”, the entire contents of which are incorporated herein by reference. TECHNICAL FIELD

[0003] The present application relates to the field of communication technology, and in particular to a communication method and apparatus. BACKGROUND

[0004] In a communication process, a sending end can perform distribution matching, encoding, modulation, etc. on information to be sent. Correspondingly, a receiving end performs demodulation, decoding, and de-distribution matching on the received information. Among them, the distribution matching based on a polar code can include two processes of polar encoding and rate matching.

[0005] The distribution matching based on a polar code is simple to implement and has low complexity. In a possible scenario, the number of bits E output by the distribution matching is required to be greater than the mother code length N of the polar code, and correspondingly, the rate matching mode is repetition. However, the number of bits supported by the distribution matching based on the polar code with the mother code length N is N, and therefore, the output with the number of bits E cannot be directly implemented. SUMMARY

[0006] Embodiments of the present application provide a communication method and apparatus, which implement distribution matching with the number of output bits E being E greater than or equal to N by using a polar code with the mother code length N.

[0007] To achieve the above object, the embodiments of the present application adopt the following technical solutions:

[0008] In a first aspect, a communication method is provided, which can be applied to a sending device. Unless otherwise specified, the sending device can be the sending device itself, or a module or unit configured to perform part of the function of the sending device, such as a circuit or a chip / chip system in the sending device, or a logic node, a logic module or software configured to perform all or part of the function of the sending device. In one specific example, the sending device is a terminal device, which can be a terminal device or a circuit or a chip / chip system (such as a modem chip, also known as a baseband chip, or a system on chip (SoC) chip or a system in package (SIP) chip containing a modem core) in the terminal device. In another example, the sending device is a network device, which can be a network device, a component (such as a circuit, a chip or a chip system, etc.) in the network device, or a module or unit configured to perform part or all of the function of the network device, such as a central unit (CU), a distributed unit (DU) or a radio unit (RU).

[0009] For the convenience of description, the method is described below by taking the method applied to a sending device (referred to as a sending device) as an example.

[0010] The method includes: performing distribution matching on a first sequence by the sending device to obtain a second sequence, and outputting the second sequence. The distribution matching includes polarization encoding and rate matching. The first sequence includes a first bit set and a second bit set. The second sequence includes a third bit set and a fourth bit set. Corresponding to the rate matching being repetition, the third bit set is obtained by performing XOR on bits in the first bit set and bits in the fourth bit set. The fourth bit set is determined according to a result of performing polarization encoding on the second bit set.

[0011] In the method, the first sequence can be part of a sequence to be sent by the sending device, for example, the sequence to be sent by the sending device includes the first sequence and a fifth bit set, wherein the fifth bit set is not subjected to distribution matching. The first sequence can be divided into two groups, one group being the first bit set and the other group being the second bit set. The first sequence is subjected to polarization encoding and rate matching to obtain the second sequence, which includes the third bit set and the fourth bit set. By constraining the relationship among the first bit set, the third bit set and the fourth bit set, and by constraining the relationship between the second bit set and the fourth bit set, distribution matching with an output bit number E can be realized by using a polar code with a mother code length N, wherein E is greater than or equal to N.

[0012] In an implementation, the first sequence includes K bits, S is an integer greater than 0, the first bit set includes E-N bits, the second bit set includes N-S bits, S = E-K, K is an integer greater than or equal to 0, N is a length of a mother code of the polar code, and E is a length of the second sequence. The third bit set includes E-N bits, the fourth bit set includes N bits, and E is greater than N.

[0013] In the method, the fourth bit set can have a predefined length, for example, the fourth bit set has a length of N, so that the third bit set has a length of E-N, the first bit set also has a length of E-N, and the second bit set has a length of N-S.

[0014] In an implementation, the sending device determines the fourth bit set according to a third sequence, the third sequence having a length of N. The third sequence is composed of a fourth sequence and the second bit set, the fourth sequence being carried in bit positions corresponding to a first bit number set, and the second bit set being carried in bit positions corresponding to a second bit number set. The first bit number set is used to indicate positions of information bits, the second bit number set is used to indicate positions of frozen bits, and the first bit number set and the second bit number set are disjoint.

[0015] In the method, a set of bits can be filled in the bit positions corresponding to the first bit number set to obtain the fourth sequence. The fourth sequence and the second bit set compose the third sequence, and the polar encoding is performed on the third sequence to obtain the fourth bit set.

[0016] In an implementation, the distribution matching further includes interleaving, which is between the polar encoding and the rate matching. The processing module 910 is specifically configured to perform polar code encoding on the third sequence to obtain a fifth sequence, and perform interleaving on the fifth sequence to obtain the fourth bit set. The third sequence and the fifth sequence satisfy: for the fifth sequence, for the third sequence, G N is a coding matrix of the polar code.

[0017] In the method, after the polar code encoding is performed on the third sequence, interleaving processing can also be performed to effectively improve fault tolerance in the data transmission process and be compatible with existing standard protocols.

[0018] In an implementation, the fourth bit set is composed of the first N bits of the second sequence , e k = d J(k) , k is an integer greater than or equal to 0 and less than N, J(k) is a sequence number after interleaving, or e k = d k .

[0019] In an implementation, the second set of bits is composed of the last N-S bits in the first sequence In an implementation, the third set of bits is composed of the last E-N bits in the second sequence

[0020] In an implementation, the fourth sequence is determined according to the first log likelihood ratio sequence.

[0021] Optionally, the first log likelihood ratio sequence is predefined or (pre)configured. Alternatively, the first log likelihood ratio sequence is determined according to a second log likelihood ratio sequence. The second log likelihood ratio sequence is predefined or (pre)configured.

[0022] In an implementation, the first set of bit indices includes S bit indices, and the second set of bit indices includes N-S bit indices.

[0023] In an implementation, the S bit indices are S bit indices with the highest reliability order among the N bit indices, and the N-S bit indices are N-S bit indices with the lowest reliability order among the N bit indices.

[0024] In a second aspect, a communication method is provided, which can be applied to a receiving device. In the absence of special description in the present application, the receiving device can be the receiving device itself, or a module or unit for completing part of the functions of the receiving device, for example, a circuit or chip / chip system in the receiving device. Alternatively, the receiving device can be a logic node, logic module or software module for implementing all or part of the functions of the receiving device. In a specific example, the receiving device is a terminal device or a network device. For the terminal device and the network device, reference can be made to the related description of the terminal device and the network device in the first aspect, which will not be described herein again. For the convenience of description, the method is taken as an example applied to a receiving device (referred to as a receiving device) below. When the sending device is a terminal device, the receiving device can be a network device; when the receiving device is a network device, the sending device can be a terminal device.

[0025] The method includes: receiving, by the receiving device, a to-be-decoded sequence, the to-be-decoded sequence including a second sequence, the second sequence including a third set of bits and a fourth set of bits; performing, by the receiving device, distributed match decoding on the second sequence to obtain a first sequence. The distributed match decoding includes rate de-matching and de-polarization encoding. The first sequence includes a first set of bits and a second set of bits. Corresponding to the rate de-matching being repetition, the first set of bits is obtained by exclusive-OR of bits in the third set of bits and bits in the fourth set of bits, and the second set of bits is determined according to a result of performing de-polarization encoding on the fourth set of bits.

[0026] ​In an implementation, the first sequence includes K bits, K is an integer greater than 0, the first bit set includes E-N bits, the second bit set includes N-S bits, S=E-K, S is an integer greater than or equal to 0, N is a length of a mother code of the polar code, and E is a length of the second sequence. The third bit set includes E-N bits, the fourth bit set includes N bits, and E is greater than or equal to N.

[0027] In an implementation, the receiving device performs the distribution matching decoding on the second sequence to obtain the first sequence, including: the receiving device performs depolarization encoding on the fourth bit set to obtain a third sequence; and the receiving device determines a set of bits carried in bit positions with bit sequence numbers in a second bit sequence number set in the third sequence as the second bit set. The second bit sequence number set is used to indicate positions of frozen bits.

[0028] In an implementation, the distribution matching decoding further includes deinterleaving between the rate matching and the depolarization encoding, and the receiving device performs the depolarization encoding on the fourth bit set to obtain the third sequence, including: the receiving device performs depolarization encoding processing on the fourth bit set to obtain a fifth sequence; and the receiving device performs depolarization encoding processing on the fifth sequence to obtain the third sequence. The third sequence and the fifth sequence satisfy: for the fifth sequence, for the third sequence, G N is an inverse matrix of a coding matrix of the polar code.

[0029] In an implementation, the third sequence is composed of the fourth sequence and the second bit set, the fourth sequence is carried in bit positions corresponding to a first bit sequence number set, the first bit sequence number set is used to indicate positions of information bits, and the first bit sequence number set and the second bit sequence number set are disjoint.

[0030] In an implementation, the fourth bit set is composed of the first N bits of the second sequence , e k =d J(k) , k is an integer greater than or equal to 0 and less than N, J(k) is a sequence number after interleaving, or e k =d k , e k is the kth element in the fourth bit set.

[0031] In an implementation, the second bit set is composed of the last N-S bits in the first sequence , and the third bit set is composed of the last E-N bits of the second sequence .

[0032] In an implementation, the first set of bit indices includes S bit indices, and the second set of bit indices includes N-S bit indices.

[0033] In an implementation, the S bit indices are S bit indices with the highest reliability order among the N bit indices, and the N-S bit indices are N-S bit indices with the lowest reliability order among the N bit indices.

[0034] The advantages of the second aspect and its various implementations can be referred to the advantages of the first aspect and its various implementations, which will not be repeated here.

[0035] In a third aspect, embodiments of the present disclosure provide a communication apparatus having the functions of implementing the behaviors in the method instances of the first aspect or the second aspect. The advantages can be referred to the related description of the first aspect or the second aspect, which will not be repeated here. For example, the communication apparatus can be the sending apparatus in the first aspect, or the communication apparatus can be an apparatus capable of supporting the functions required for the sending device to implement the method provided by the first aspect, for example, the communication apparatus can be a chip or a chip system in the sending device. The sending apparatus can be a terminal device or a network device. For another example, the communication apparatus can be the receiving apparatus in the second aspect, or the communication apparatus can be an apparatus capable of supporting the functions required for the receiving apparatus to implement the method provided by the second aspect, for example, the communication apparatus can be a chip or a chip system in the receiving device. The receiving apparatus can be a terminal device or a network device.

[0036] In a possible design, the communication apparatus includes a baseband apparatus and a radio frequency apparatus.

[0037] In a possible design, the communication apparatus includes corresponding means or modules or units for performing the methods of the first aspect or the second aspect. The modules or units or means can be implemented by software, or by hardware, or by a combination of software and hardware. For example, the communication apparatus includes a processing unit (also referred to as a processing module or a processor) and / or an input / output interface. The input / output interface includes an input interface and / or an output interface, and can be an interface circuit, an output circuit, an input circuit, a pin, or related circuitry, etc. Optionally, the communication apparatus further includes a transceiver unit (also referred to as a transceiver module or a transceiver). The transceiver unit can implement the sending function and the receiving function. When the transceiver unit implements the sending function, it can be referred to as a sending unit (also referred to as a sending module). When the transceiver unit implements the receiving function, it can be referred to as a receiving unit (also referred to as a receiving module). The sending unit and the receiving unit can be the same functional unit, which is referred to as a transceiver unit and can implement the sending function and the receiving function. Alternatively, the sending unit and the receiving unit can be different functional units, and the transceiver unit refers to these functional units in general. The input / output interface, the units (modules), and the like can perform the corresponding functions in the method examples of the first aspect or the second aspect, and details are described in the method examples, which are not described herein again.

[0038] For example, the communication apparatus is used to implement the corresponding functions in the method examples of the first aspect. Accordingly, the processing module can be used to perform distributed matching on the first sequence to obtain the second sequence. The input / output interface of the communication apparatus for distributed matching is configured to output the second sequence, and the distributed matching includes polarization encoding and rate matching. The first sequence includes a first bit set and a second bit set. The second sequence includes a third bit set and a fourth bit set. Corresponding to the rate matching being repetition, the third bit set is obtained by performing XOR on bits in the first bit set and bits in the fourth bit set. The fourth bit set is determined according to a result of performing polarization encoding on the second bit set.

[0039] For another example, the communication apparatus is used to implement the corresponding functions in the method examples of the second aspect. Accordingly, the input / output interface of the communication apparatus for distributed matching is configured to receive a to-be-decoded sequence, and the to-be-decoded sequence includes the second sequence, and the second sequence includes a third bit set and a fourth bit set. The processing module is configured to perform distributed matching decoding on the second sequence to obtain the first sequence. The distributed matching decoding includes rate de-matching and polarization de-encoding. The first sequence includes a first bit set and a second bit set. Corresponding to the rate matching being repetition, the first bit set is obtained by performing XOR on bits in the third bit set and bits in the fourth bit set. The second bit set is determined according to a result of performing polarization de-encoding on the fourth bit set.

[0040] In a fourth aspect, an embodiment of the present application provides a communication apparatus, which comprises a processor configured to cause the method in the first aspect or the second aspect or any implementation manner thereof to be performed. Optionally, the communication apparatus further comprises a communication interface. Optionally, the communication apparatus further comprises a memory for storing a computer program (which can also be referred to as code or instruction), data, etc. The processor is coupled with the memory and the communication interface. When the processor reads the computer program, data, etc. from the memory, the method in the first aspect or the second aspect or any implementation manner thereof is caused to be performed.

[0041] In a fifth aspect, an embodiment of the present application provides a communication apparatus, which comprises an input / output interface and a logic circuit. The input / output interface is configured to input and / or output information. The input / output interface can be an interface circuit, an output circuit, an input circuit, a pin or a related circuit, etc. The logic circuit is configured to perform the method in the first aspect or the second aspect.

[0042] In the fourth aspect and the fifth aspect, the communication apparatus can be the sending apparatus in the first aspect. Alternatively, the communication apparatus can be an apparatus capable of supporting the functions required for the sending apparatus to implement the method provided in the first aspect, for example, the communication apparatus can be a chip or a chip system in a sending device, and the sending device can comprise the sending apparatus. Alternatively, the communication apparatus can be the receiving apparatus in the second aspect. Alternatively, the communication apparatus can be an apparatus capable of supporting the functions required for the receiving apparatus to implement the method provided in the second aspect, for example, the communication apparatus can be a chip or a chip system in a receiving device, and the receiving device can comprise the sending apparatus. The chip can be a baseband chip and / or a radio frequency chip, and the chip system can be composed of the chip or can comprise the chip and other discrete devices.

[0043] In an implementation manner of the fifth aspect, when the communication apparatus is a terminal device, the interface circuit can be a radio frequency processing chip in the terminal device, and the processing circuit can be a baseband processing chip in the terminal device. When the communication apparatus is a network device, the interface circuit can be a radio frequency processing chip in the network device, and the processing circuit can be a baseband processing chip in the network device.

[0044] In an implementation process of the fifth aspect, when the communication apparatus is a chip or a chip system, the input circuit can be an input pin, the output circuit can be an output pin, and the logic circuit can be a transistor, a gate circuit, a flip-flop, various logic circuits, etc. The input signal received by the input circuit can be received and input by, for example but not limited to, a receiver, the output signal output by the output circuit can be output to and transmitted by, for example but not limited to, a transmitter, and the input circuit and the output circuit can be the same circuit which is used as the input circuit and the output circuit at different times. The specific implementation of the input / output interface and the logic circuit is not limited in the present application.

[0045] In a sixth aspect, an embodiment of the present application provides a communication system, including a terminal device and a network device. The terminal device is configured to implement the functions of the method in the first aspect, and the network device is configured to implement the functions of the method in the second aspect. Alternatively, the terminal device is configured to implement the functions of the method in the second aspect, and the network device is configured to implement the functions of the method in the first aspect.

[0046] In a seventh aspect, an embodiment of the present application provides a computer readable storage medium for storing a computer program or instructions, which, when executed, cause the method in the first aspect or the second aspect or any implementation manner thereof to be implemented.

[0047] In an eighth aspect, an embodiment of the present application further provides a computer program product including instructions, which, when executed on a computer, cause the method in the first aspect or the second aspect or any implementation manner thereof to be implemented.

[0048] The beneficial effects of the third aspect to the eighth aspect and the implementation manners thereof can refer to the beneficial effects of the first aspect or the second aspect and any implementation manner thereof. BRIEF DESCRIPTION OF DRAWINGS

[0049] FIG. 1 is a schematic diagram of an architecture of a communication system to which embodiments of the present application are applicable;

[0050] FIG. 2 is a schematic diagram of a polar code encoding process with a length of 8;

[0051] FIG. 3 is a schematic diagram of a shaping process;

[0052] FIG. 4 is a schematic diagram of an SC decoding calculation process;

[0053] FIG. 5 is a schematic diagram of a principle of implementing distribution matching based on an SC decoder;

[0054] FIG. 6 is a decoding example diagram taken as an example of FIG. 5;

[0055] FIG. 7 is a schematic diagram of a communication method provided by an embodiment of the present application;

[0056] FIG. 8 is a schematic diagram of implementing distribution matching based on a polar code according to an embodiment of the present application;

[0057] FIG. 9 is a schematic diagram of obtaining a third bit set according to an embodiment of the present application;

[0058] FIGS. 10-12 are schematic diagrams of exemplary structures of a communication device according to embodiments of the present application. DETAILED DESCRIPTION

[0059] The technical solutions provided by the embodiments of the present application can be applied to various communication systems, for example, a long term evolution (LTE) communication system, a 5th generation (5G) mobile communication system / new radio (NR) communication system, or can also be applied to a future mobile communication system or other similar communication systems. Other similar communication systems can include a vehicle to everything (V2X) system, an internet of things (IoT) system, a local area network (LAN), in particular a wireless local area network (WLAN), for example, a WLAN suitable for using any one of the institute of electrical and electronics engineers (IEEE) 802.11 series of protocols. Among them, the WLAN can include one or more basic service sets (BSSs), and the network nodes in the basic service set include access points (APs) and stations (STAs). The embodiments of the present application can also be applied to a wireless local area network system supporting the IEEE 802.11ax next generation wireless fidelity (Wi-Fi) protocol, such as the 802.11be, 802.11bn, Wi-Fi AI, and other 802.11 series of protocols, and can also be applied to a wireless personal area network system based on ultra wide band (UWB), a sensing system, etc.

[0060] Please refer to FIG. 1, which shows a communication system to which embodiments of the present application are applicable. The communication system includes a first device and a second device. The first device and the second device can communicate with each other, for example, the first device is a data sending end, and the second device is a data receiving end. The first device can perform encoding and other operations on data when sending data, and the second device can perform decoding and other operations on data after receiving data from the first device. The network architecture shown in FIG. 1 is only schematic, and the number of first devices and / or second devices can be less, or more. The communication system described in the embodiments of the present application is to make the technical solutions of the embodiments of the present application more clearly described, and does not constitute a limitation on the communication system to which the embodiments of the present application are applicable. For example, the communication system can also include other devices, which are not shown in FIG. 1. Those skilled in the art can know that, as the network architecture evolves, the technical solutions provided by the embodiments of the present application are also applicable to similar technical problems. When applying the technical solutions of the embodiments of the present application to other communication systems, the devices, components, modules, etc. in the embodiments can be replaced by corresponding devices, components, modules, etc. in other communication systems, without limitation.

[0061] In the embodiments of the present application, the network device refers to a (radio) access network ((R)AN) device / RAN node. The (R)AN can be replaced by RAN for convenience of description. The RAN can be a third generation partnership project (3GPP) related cellular system, for example, a 5G / NR mobile communication system, or a future-oriented evolution system. The RAN can also be an open RAN (O-RAN or ORAN), a cloud radio access network (CRAN), or a virtualized RAN (vRAN), a non-terrestrial network (NTN), etc. The RAN can also be a communication system in which two or more of the above systems are fused. The RAN device can also be referred to as a RAN node, a RAN entity, or an access node, etc.

[0062] In a possible scenario, the RAN node can be a base station, an evolved NodeB (eNodeB), an access point (AP), a transmission reception point (TRP), a next generation NodeB (gNB), a base station in a future mobile communication system, etc. The RAN node can be a macro base station, a micro base station, an indoor station, a relay node, a donor node / host node, or a radio controller, etc. The RAN node can also be a server, a wearable device, a vehicle or a vehicle-mounted device, etc. For example, the RAN node in the V2X technology can be a road side unit (RSU). Among them, the AP is equivalent to a bridge connecting wired and wireless networks, and its main function is to connect various wireless network clients together and then access the wireless network to the Ethernet. The AP can be used as the hub of the communication system, and can be a base station, router, gateway, repeater, communication server, switch or bridge, etc. communication equipment with Wi-Fi chip. The AP can support 802.11be standard or the next generation of 802.11be, such as Wi-Fi 8 and other WLAN standards. The AP can also support 802.11ax, 802.11ac, 802.11n, 802.11g, 802.11b, and 802.11a WLAN standards.

[0063] In another possible scenario, the RAN node can be a module or unit that completes part of the function of the base station; or multiple RAN nodes cooperate to assist the terminal device to implement wireless access, and different RAN nodes respectively implement part of the function of the base station. For example, the RAN node can be a CU, a DU, or an RU, etc. The functions of the CU can be implemented by one entity, or also by different entities. For example, the functions of the CU can be further divided, that is, the control plane and the user plane are separated and implemented by different entities, respectively, as a control plane CU entity (namely, a CU-control plane (CP) entity) and a user plane CU entity (namely, a CU-user plane (UP) entity). The CU-CP entity and the CU-UP entity can be coupled with the DU to jointly complete the function of the RAN node. The CU and the DU can be separately arranged, or can be included in the same network element, such as a baseband unit (BBU). Any one of the CU (or CU-CP, CU-UP), DU and RU in this application can be implemented by a software module, a hardware module, or a combination of a software module and a hardware module.

[0064] The CU (or CU-CP and CU-UP), DU or RU can also have different names in different systems, but those skilled in the art can understand their meanings. For example, in an ORAN system, the CU can also be referred to as an O-CU (open CU), the DU can also be referred to as an O-DU, the CU-CP can also be referred to as an O-CU-CP, the CU-UP can also be referred to as an O-CU-UP, and the RU can also be referred to as an O-RU. For the convenience of description, the CU, CU-CP, CU-UP, DU and RU are taken as examples for description in this application.

[0065] The CU and DU can be configured according to the protocol layer functions of the wireless network they implement: for example, the CU is configured to implement the functions of the packet data convergence protocol (PDCP) layer and above protocol layers (such as the radio resource control (RRC) layer and / or the service data adaptation protocol (SDAP) layer, etc.); the DU is configured to implement the functions of the protocol layer below the PDCP layer (such as the radio link control (RLC), the media access control (MAC) layer, and / or the physical (PHY) layer, etc.). For specific descriptions of the above-mentioned various protocol layers, reference can be made to the relevant technical specifications of 3GPP or other applicable communication protocol technical specifications.

[0066] The above-mentioned processing functions of the CU and DU according to the division of the protocol layers are only an example, and can also be divided in other ways, which is not limited by the present application. For example, in one design, the CU or DU can also be divided into partial processing functions with protocol layers. In one design, part of the functions of the RLC layer and the functions of the protocol layer above the RLC layer are arranged in the CU, and the remaining functions of the RLC layer and the functions of the protocol layer below the RLC layer are arranged in the DU.

[0067] In another possible design, the functions of the PHY layer are implemented by the cooperation of the DU and the RU, or described as moving part of the PHY layer functions of the DU to the RU. One DU can be connected with one or more RUs. The functions of the DU and the RU can be configured in multiple ways according to the design. For example, the DU is configured to implement the baseband functions, and the RU is configured to implement the radio frequency functions. For another example, the DU is configured to implement the high-layer functions in the PHY layer, and the RU is configured to implement the low-layer functions in the PHY layer or implement the low-layer functions and the radio frequency functions. The high-layer functions in the PHY layer can include part of the functions of the PHY layer that are closer to the MAC layer, and the low-layer functions in the PHY layer can include another part of the functions of the PHY layer that are closer to the radio frequency side. The specific functions of the DU and the RU are not limited in this application. The interface between the DU and the RU can be referred to as a front-haul interface. In one design, the CU can have no PDCP layer, for example, the CU only includes the RRC layer. The CU-CP has no PDCP-C. The CU-UP can have no PDCP-U, or have no CU-UP. In one design, the DU can have no RLC layer, for example, the DU only has the MAC and the higher PHY layer.

[0068] When the RAN is an O-RAN, it can also have an artificial intelligence (AI) function, for example, the O-RAN includes an intelligent controller. The intelligent controller can be a non-real-time RAN intelligent controller (non-real time RAN intelligent controller, non-RT RIC / NRT RIC), or a near-real-time RAN intelligent controller (near-real time RAN intelligent controller, near-RT RIC / nRT RIC). The non-real-time RIC can be used to implement non-real-time intelligent management of the RAN function, can implement a workflow including model training and model updating, and guide the application / function in the nRT RIC based on the policy. The near-real-time RIC can be used to implement near-real-time intelligent management of the RAN. Through data collection and related operations on the E2 interface, near-real-time control and optimization of modules and resources of the O-RAN are implemented.

[0069] In the embodiments of the present application, the device for implementing the function of the network device can be the network device itself, or a device capable of supporting the network device to implement the function, such as a chip system or a combination device or component that can implement the function of the network device, which can be installed in the network device. The embodiments of the present application do not limit the specific technology and specific device form adopted by the network device.

[0070] In the embodiments of the present application, all the terminal devices capable of communicating data with the base station can be regarded as terminal devices. The terminal device is also referred to as a terminal, a terminal device, a user equipment (UE), a user device, a mobile station, or a mobile terminal, etc. The terminal device can be widely applied to various scenarios, for example, the terminal device can be a mobile phone, a computer, a mobile internet device (MID), a wearable device, a virtual reality (VR) device, an augmented reality (AR) device, a station (STA), a mechanical arm, a camera, a robot, a vehicle, a drone, a helicopter, an airplane, a ship, or a smart home device (such as a television, an air conditioner, a sweeping machine, a sound box, a set-top box), a relay, a customer premise equipment (CPE), etc. Among them, the STA can be a mobile phone supporting Wi-Fi communication function, a tablet computer supporting Wi-Fi communication function, a set-top box supporting Wi-Fi communication function, a smart television supporting Wi-Fi communication function, a smart wearable device supporting Wi-Fi communication function, a vehicle-mounted communication device supporting Wi-Fi communication function, and a computer supporting Wi-Fi communication function, etc. The STA can be a router, a switch, a network bridge, etc. The STA can support 802.11be standard, and can also support 802.11ax, 802.11ac, 802.11n, 802.11g, 802.11b, 802.11a, 802.11be, Wi-Fi 7, Wi-Fi 8 or the next generation of 802.11 family such as WLAN standards.

[0071] The embodiments of the present application do not limit the specific technology and specific device form adopted by the terminal device. In addition, in the embodiments of the present application, the terminal device can also be a terminal device in an IoT system, for example, a water meter, an electricity meter, etc. IoT is an important part of future information technology development, and its main technical feature is to connect objects through communication technology and network, so as to realize the intelligent network of man-machine interconnection and object-object interconnection.

[0072] When the terminal device is applied to V2X, it can also be called a V2X device, such as a smart car, an unmanned car, a driverless car, a pilotless car, or an automobile, or a roadside unit (RSU). All the terminal devices described above, if located on a vehicle (e.g., placed / installed inside the vehicle), can be considered in-vehicle terminal devices. In-vehicle terminal devices can be built into a vehicle's on-board module, on-board unit, on-board component, on-board chip, or on-board unit as one or more components or units. The vehicle can implement the methods of this application through the built-in on-board module, on-board unit, on-board component, on-board chip, or on-board unit. In-vehicle terminal devices can be vehicle equipment, on-board modules, vehicles, on-board units (OBU), RSUs, in-vehicle infotainment systems (or on-board transmitting units) (telematics boxes, T-boxes), chips, or SoCs, etc., and the aforementioned chips or SoCs can be installed in the vehicle, OBU, RSU, or T-box.

[0073] In the embodiments of this application, the device for implementing the functions of the terminal device can be the network device itself, or it can be a device that supports the terminal device in implementing the functions, such as a chip system or a combination of devices or components that can implement the functions of the terminal device. This device can be installed in the terminal device. The embodiments of this application do not limit the specific technology or specific device form used in the terminal device.

[0074] During communication, the transmitting end typically performs encoding and modulation on the information to be transmitted. Correspondingly, the receiving end demodulates and decodes the received information. Optionally, the transmitting end may also perform rate matching before modulation. Encoding processes include source coding and channel coding. There are various channel coding methods, such as polar code coding. The scheme provided in this application embodiment can use polar code coding. To facilitate understanding of the technical solutions provided in this application embodiment, the relevant terms involved in this application embodiment will first be explained below.

[0075] (1) Polar code and polar code encoding

[0076] Polar codes are linear block codes with advantages such as good decoding performance and low complexity. Polar code encoding has been selected by 3GPP as the coding scheme for 5G control channels.

[0077] The polar code encoding process can be represented as follows: in, It is a bit sequence of length N to be encoded, where N is the code length of the polar code. G N It is an N×N matrix, and This is the Kronecker product of n = log N matrices F2. G N It can be called a polarization coding matrix or a polarization transformation matrix. This is the encoded bit sequence.

[0078] in, A portion of the bits in a set are used to carry information, while the other portion is set to fixed values ​​agreed upon by the sender and receiver beforehand. The bits carrying information are called information bits, and this portion forms the information bit set. The set of bit indices (also called bit sequence numbers) of these bits is denoted as A. It can be understood that set A determines the position of the information bits. The bits set to fixed values ​​are called fixed bits or frozen bits, and this portion forms the fixed bit set or frozen bit set. The set of bit indices (also called bit sequence numbers) of these bits is the complement A of set A. c It is understandable that set A... c This determines the position of the frozen bits.

[0079] Optionally, the freeze bit is set to 0. It should be understood that the freeze bit can be arbitrarily set, provided the receiver and transmitter agree beforehand. Therefore, the polar code encoding process can also be represented as: Among them, G N (A) is G N The submatrix is ​​obtained by taking the row corresponding to the bit index in set A. A for The set of information bits in the data is K in number; for The set of frozen bits in the data is NK in size and consists of known bits. This represents the XOR operation. Furthermore, the encoded output of the polar code can be simplified to: μ A Let G be a row vector of length K, i.e., |A| = K, where |A| represents the number of elements in set A, and K is the block size, or the number of information bits, or the size of the set of information bits. N (A) is G N G is the submatrix obtained by the row corresponding to the bit index in set A. N (A) is a K×N matrix, where K is the number / length of information bits.

[0080] The encoding process of the polar code also includes a construction process of the polar code. The construction of the polar code refers to a process of obtaining the polar code based on a given code length N and an information bit length K. The construction process of the polar code can also be regarded as a selection process of the set A or a process for determining information bit positions and frozen bit positions. Generally, the reliabilities of the sub-channels are sorted, and the bit sequence numbers of the K sub-channels with the highest reliabilities are taken as elements of the set A, and the bit sequence numbers of the remaining N-K sub-channels are taken as elements of the set A c . Alternatively, the bit positions with higher reliabilities are set as information bit positions (data), and the bit positions with lower reliabilities are set as frozen bit positions. In 5G NR, the reliabilities sequence is used to determine the frozen bit positions and the information bit positions of the polar code. Taking a polar code with a length of 8 as an example, assuming that the reliabilities sequence is [0 1 2 4 3 5 6 7], it is indicated that the reliabilities of the bit positions from high to low are the bit position corresponding to the bit sequence number 7, the bit position corresponding to the bit sequence number 6, the bit position corresponding to the bit sequence number 5, the bit position corresponding to the bit sequence number 3, the bit position corresponding to the bit sequence number 4, the bit position corresponding to the bit sequence number 2, the bit position corresponding to the bit sequence number 1, and the bit position corresponding to the bit sequence number 0. The bit position can be understood as a bit sub-channel. The bit sequence number can be understood as an index or an identifier of the bit position. When constructing a polar code with a code length of 8 and an information length of 4, four positions are selected from the back to the front, that is, the bit positions corresponding to the bit sequence numbers 7, 6, 5, and 3 are taken as information bit positions, and the bit positions corresponding to the bit sequence numbers 4, 2, 1, and 0 are taken as frozen bit positions. Alternatively, the reliabilities can be calculated by the mean value of the log likelihood ratio (LLR) distribution of the bit positions.

[0081] Please refer to FIG. 2, which shows a polar code encoding process with a length of 8. The left side of FIG. 2 is the to-be-encoded side, and the right side is the encoded side (or the codeword side). The process from left to right is the process of encoding the to-be-encoded bit sequence at the sending end. The bits on the left are denoted by u, and the to-be-encoded bit sequence {u0, u1, u2, u3, u4, u5, u6, u7} is composed of the bits on the left. The bits on the right are denoted by x, and the encoded bit sequence is {x0, x1, x2, x3, x4, x5, x6, x7}. Among them, the bit positions corresponding to the high channel reliabilities are used to map information bits, and the bit positions corresponding to the low channel reliabilities are used to map frozen bits. As shown in FIG. 2, {u0, u1, u2, u4} are frozen bit positions, that is, the positions of the frozen bits, and {u3, u5, u6, u7} are information bit positions, that is, the positions of the information bits. In the embodiments of the present application, the information bit positions are also referred to as information bits. The frozen bit positions are also referred to as frozen bits.

[0082] In Figure 2, each circle in each row represents an XOR operation (or modulo-2 addition) between the bits in the circle's row and the rows it reaches. The bits to the right of the circle represent the sum. During encoding, two adjacent columns form a coding layer. The left column of bits represents the input bits of the coding layer, and the right column represents the output bits. For example, in the leftmost coding layer, the input bit sequence is u{0, 0, 0, 0, 0, 0, 1, 1}, and the output bit sequence is x{0, 1, 0, 1, 0, 1, 0, 1}. The operation symbols in the middle of the coding layer are also shown. This represents the XOR operation, specifically... express The bits in the current row and A single XOR operation between the bits in the row. The bits on the right represent the result of the operation. For example, in the leftmost coding layer, the first input bit (value 0) and the second input bit (value 0) are processed... The operation yields the first output bit (value 0). The bit sequence to be encoded, u{0, 0, 0, 0, 0, 0, 1, 1}, is processed by the polarization coding matrix to obtain the encoded bit sequence x{0, 1, 0, 1, 0, 1, 0, 1}. Mapping x to a modulation symbol allows it to be transmitted in channel W.

[0083] (2) Rate matching.

[0084] The data block before encoding is called a transport block (TB). Because a TB has a large number of bits, the transmitter usually splits a TB into multiple code blocks (CBs), each of which is channel-coded independently. Since the length of the codeword output from the channel coding may not match the number of bits in the physical time-frequency resources of the code block to be transmitted, bit retransmission, puncturing, or shortening of the code block is necessary to match the capacity of the physical time-frequency resources. This process is called rate matching. Multiple channel-coded CBs need to undergo rate matching, interleaving, concatenation, and other processing before being transmitted as a single physical data block (codeword) to the receiver. The following sections further explain the rate matching methods in three categories.

[0085] (2-1) Punching: Punching refers to directly creating holes in certain positions of a Polar code of the encoded length without transmitting the data. This method generates Polar code bit sequences of arbitrary length. On the decoding side, since there is no information at the corresponding "punched" positions, the LLR of the corresponding bits is set to 0.

[0086] (2-2) Shortening: "Shortening" is another common rate matching method, which is designed by Polar code so that some positions in the coded bit sequence are fixed values, thus do not need to be sent. At the decoding side, since the positions corresponding to "shortening" are equivalent to known (usually 0) at the receiving end, the LLR of the corresponding bit position is set to infinity.

[0087] (2-3) Repetition: "Repetition" refers to transmitting a longer Polar code bit sequence by repeating part of the code word bits.

[0088] (3) Probability shaping

[0089] The shaping technique can make the transmitted modulation symbols conform to the Gaussian distribution, and the information amount transmitted per unit energy is maximum. Among them, the shaping technique includes geometric shaping and probability shaping, etc. The characteristics of geometric shaping are: keep the equal probability distribution of input symbols, but specially design the constellation points, the constellation points with low energy are distributed more densely, and the constellation points with high energy are distributed more sparsely. The characteristics of probability shaping are: keep the constellation distribution unchanged, adjust the probability of constellation points, the symbols with low energy have higher probability, and the symbols with high energy have lower probability.

[0090] As shown in FIG. 3, it is a flowchart of shaping. In FIG. 3, the information bit grouping means that the sending end can divide the information bit sequence with a length of K into three groups, denoted as and Among them, a distribution matcher (DM) is cascaded before the encoder in FIG. 3, the input of the distribution matcher is U2 and U3, U1, U3 and the output of the distribution matcher are input into the encoder together, and the output of the encoder is a bit sequence X. X is processed through interleaving, and then mapped to a modulation symbol, denoted as S. The symbol S obtained after modulation obeys a Gaussian-like distribution, and the effect of probability shaping can be achieved, and the spectral efficiency is improved.

[0091] In the above shaping and channel coding process, the process of mapping the bit sequence to a sequence obeying a specific distribution is called distribution match (DM), which can be realized through a distribution matcher.

[0092] (4) Distribution match DM

[0093] DM is also called signal shaping, which refers to mapping a uniformly distributed input sequence c to an output sequence e using a given target probability distribution. For example, through a distribution matcher, K uniformly distributed bits can be mapped to E biased bits The so-called bias means that The number of bit 0 is different from the number of bit 1, or e i The log-likelihood value r i Wherein, r i Greater than 0 means that the probability of e i 0 is greater than the probability of 1, r i Less than 0 means that the probability of e i 1 is greater than the probability of 0. r i The absolute value of r i | represents the degree of bias, | r i | The greater, the greater the difference between the probability of e i 0 and the probability of 1, for example, r i Can be all 1, which means that the probability of e 0 is greater than the probability of 1.

[0094] (5) Successive cancellation decoding (SC)

[0095] The SC decoding method is an effective decoding algorithm for Polar code. After the decoding device receives the signal, the LLR of each information bit is calculated. If the LLR of the information bit is greater than 0, the decoding result is 0, if the LLR of the information bit is less than 0, the decoding result is 1, and the frozen bit is set to 0 regardless of the LLR. Fig. 4 is a schematic diagram of SC decoding calculation process, taking 4 decoding bits as an example, there are 8 calculation nodes in Fig. 4, including 4 F nodes and 4 G nodes, which correspond to F function and G function respectively. The calculation of F node needs the input of 2 LLRs on the right side, and the calculation of G node needs the input of 2 LLRs on the right side and the output of the previous stage as input. Only after the input item is calculated, the output can be calculated. According to the above calculation rule, the signal is received from the right side in Fig. 4, and the 8 nodes are calculated in sequence to obtain the decoding bits in turn: ①→②→③→④, and the decoding is completed.

[0096] (6) In the embodiments of the present application, "transmit" includes "send" and / or "receive". Wherein, "send" and "receive" represent the direction of signal transmission. For example, "send information to XX" can be understood as that the destination of the information is XX, which can include direct sending through the air interface, and also includes indirect sending through the air interface by other units or modules. "Receive information from YY" can be understood as that the source of the information is YY, which can include direct receiving from YY through the air interface, and also includes indirect receiving from YY through the air interface by other units or modules. "Send" can also be understood as "output" of the chip interface, and "receive" can also be understood as "input" of the chip interface. In other words, sending and receiving can be carried out between devices, for example, between an access network device and a terminal device, or can be carried out within a device, for example, between components, between modules, between chips, between software modules or hardware modules in the device through a bus, a wire or an interface.

[0097] In the embodiments of the present application, the number of nouns represents "singular noun or plural noun", that is, "one or more" unless otherwise specified. "At least one" means one or more, and "multiple" means two or more. "And / or" describes the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the following three cases: A exists alone, A and B exist together, and B exists alone, wherein A / B can be singular or plural. The character " / " generally represents an "or" relationship between the associated objects. For example, A / B means A or B. "At least one of the following" or similar expressions means any combination of these items, including any combination of single item or multiple items. For example, at least one of a, b and / or c means the following combinations: a exists alone, b exists alone, c exists alone, a and b exist together, a and c exist together, b and c exist together, or a and b and c exist together, wherein a, b and c can be single or multiple.

[0098] In the embodiments of the present application, "when", "if" and "whether" all mean that the device will make corresponding processing under certain objective circumstances, and are not limited to time, and do not require the device to have a judgment action when it is implemented, nor mean that there are other limitations. Unless otherwise specified, "if" and "whether" can be replaced, and "when" and "in the case of" can be replaced. "When" and "if" / "whether" can be replaced.

[0099] In the embodiments of the present application, the word "exemplary" or "for example" is used to mean serving as an example, instance, or illustration. Any embodiment or design described in this application as "exemplary" or "for example" should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the embodied words are used to present concepts in a particular, concrete form that is easier to understand.

[0100] The ordinal numbers "first", "second", etc. mentioned in the embodiments of the present application are used to distinguish a plurality of objects, and are not used to limit the size, content, order, timing, priority or importance of the plurality of objects. For example, the first bit set and the second bit set refer to two different bit sets, and do not mean that the priority or importance of the two bit sets is different.

[0101] In the embodiments of the present application, the schemes in the embodiments can be reasonably combined, and the explanation or description of each term appearing in the embodiments, similar operations, or steps can be mutually referenced or explained in each embodiment, and this is not limited.

[0102] The polar code-based distribution matching can include polar encoding and rate matching. The rate matching is optional.

[0103] Please refer to FIG. 5, which is a schematic diagram of the principle of realizing distribution matching based on a polar code. The left side of FIG. 5 is a bit sequence to be encoded in the polar encoding process. The bit sequence to be encoded includes a first part and a second part, the first part can be referred to as a bit to be distributed and matched, and comes from a payload bit, and the second part can be referred to as an auxiliary bit, which is used to assist shaping. The right side of FIG. 5 is an output bit after distribution matching (also referred to as a distribution matching output bit), which can be regarded as a bit sequence after polar code encoding. It is assumed that the mother code length of the polar code is N, the length of the distribution matching output bit is E, and E=N. The bit positions of the distribution matching output bit corresponding to the bit to be distributed and matched are shown in the sequence number set as shown in the bit position (frozen bit), r i The log-likelihood ratio llr input to the SC decoder i The SC decoding is performed to obtain the sequence number set corresponding to the auxiliary bit The bit value in the bit carried by the sequence number set includes K elements, includes S elements, S=E-K. Taking E=N=4 and K=3 as an example, there can be as a frozen bit Then u0=c0=1, u1=c1=1, and u2=c2=2, the log-likelihood ratio llr input to the SC decoder i= r i = 1, u3 can be obtained by the SC decoder. Further, according to u3, the encoded bits For example, As shown in FIG. 6. Here, take For example, The elements in the element set come from the payload bits, which can be 0 and / or 1.

[0104] FIG. 5 takes E=N as an example. In a possible scenario, the number of bits output by the distribution matcher is greater than N, and accordingly, the rate matching is repetition. In this case, since the total number of the frozen bits and the information bits supported by the polar code is N, according to the procedure shown in FIG. 5, only N bits can be obtained by the polar encoding based on the mother code length N, and the output with the number of bits E cannot be directly implemented.

[0105] In view of this, the scheme provided in the embodiments of the present application is provided. The embodiments of the present application can implement the distribution matching with the number of output bits E based on the polar code with the mother code length N, and E is greater than or equal to N.

[0106] The communication method provided by the embodiments of the present application is introduced below.

[0107] In the following introduction process, the communication method provided by the embodiments of the present application is taken as an example applied to the network architecture shown in FIG. 1, and the communication method provided by the embodiments of the present application can be executed by the first device and the second device. The steps executed by the first device can be implemented by the first device itself, or can be implemented by the components (such as a baseband chip, or other processing units or processors, etc.) in the first device, or by a logic module or software that completes part or all of the functions of the first device. For example, the first device is a network device, and the steps executed by the first device can be implemented by the network device, or a CU, a DU, or a RU that completes part of the functions of the network device. The steps executed by the second device can be implemented by the second device itself, or can be implemented by the components (such as a baseband chip, or other processing units or processors, etc.) in the second device, or by a logic module or software that completes part or all of the functions of the second device. For example, the second device is a network device, and the steps executed by the second device can be implemented by a terminal device, or a baseband chip or a SoC chip containing a modem core in the terminal device.

[0108] The first device and the second device are two ends of communication. The first device can be a sending end or a receiving end. When the first device is a sending end and the second device is a receiving end; when the first device is a receiving end and the second device is a terminal device. It should be noted that the first device and the second device can also be the same type of device. For example, the embodiments of the present application can also be applied to the scenario of V2X, the first device is a first terminal device, and the second device is a second terminal device.

[0109] Please refer to FIG. 7, which is a flowchart of the communication method provided by the embodiments of the present application. FIG. 7 introduces the method from the perspective of the interaction between the first device and the second device. The first device is the sending end of the data, and the second device is the receiving end of the data. It should be understood that the communication method can also be implemented by other devices, such as a chip or a communication device with communication function. In addition, the processing performed by a single execution subject can also be divided into processing performed by multiple execution subjects, which can be logically and / or physically separated. For example, the second device is a network device, and the processing performed by the second device can be divided into processing performed by at least one of the CU, the DU, the RU, etc. As shown in FIG. 7, the flow of the communication method includes the following steps.

[0110] S701, the first device performs distribution matching on the first sequence to obtain a second sequence.

[0111] When the first device wants to send information, it can perform distribution matching, modulation, etc. on the information to be sent. The distribution matching can include polarization encoding and rate matching. In the embodiments of the present application, the first device can reuse the encoding and decoding unit of the polar code to implement distribution matching. In possible scenarios, the number of bits E output by the distribution matching is greater than the mother code length N supported by the encoding and decoding unit of the polar code, or the rate matching is repetition. In such scenarios, the distribution matching cannot be directly implemented through the encoding and decoding unit of the polar code. Therefore, the first device performs certain processing on the bit sequence to be sent, so as to implement distribution matching based on the polar code.

[0112] The first sequence is part of the bit sequence to be sent by the first device, or the bit sequence to be sent includes other bits in addition to the first sequence. For convenience of description, the set of bits other than the first sequence in the bit sequence to be sent is referred to as a fifth bit set, and the fifth bit set does not undergo distribution matching.

[0113] In the embodiments of the present application, the first sequence can include a first bit set and a second bit set. Alternatively, before S701, the first device can also determine the first bit set and the second bit set included in the first sequence. The first bit set and the second bit set are mutually exclusive. In other words, the intersection of the first bit set and the second bit set is an empty set. The first bit set and the second bit set are input to distribution matching, and the second sequence including a third bit set and a fourth bit set can be obtained through distribution matching. The third bit set and the fourth bit set are exclusive. By constraining the relationship among the first bit set, the third bit set and the fourth bit set, and by constraining the relationship between the second bit set and the fourth bit set, distribution matching can be implemented by supporting a polar code with a mother code length of N to achieve an output bit number of E, where E is greater than or equal to N. E is the length of the second sequence, and N is the mother code length.

[0114] For example, the fourth bit set is determined according to the result of polar encoding performed on the second bit set. For example, for an SC decoder, the fourth bit set can be obtained according to the input second bit set and the input LLR. In addition, the third bit set can be determined according to the first bit set and the fourth bit set. For example, the third bit set is obtained by performing XOR operation on the bits in the first bit set and the bits in the fourth bit set. Since the first bit set is known, the third bit set can be obtained according to the first bit set and the fourth bit set. In this way, even if the length E of the second sequence is greater than the mother code length N, or the rate matching is repetition, distribution matching can be implemented through polar encoding and rate matching.

[0115] For ease of understanding, please refer to FIG. 8, which is a schematic diagram of the principle of implementing distribution matching based on a polar code. On the left side of FIG. 8 is a bit sequence to be distributed and matched, wherein the SC decoder obtains the auxiliary bits according to the second bit set and the log-likelihood ratio sequence. On the right side of FIG. 8 is the output of distribution matching, for example, the fourth bit set output by the SC decoder. As can be seen from FIG. 8, the fourth bit set can be obtained by the SC decoder according to the input LLR and the second bit set. In addition, the third bit set can be obtained by performing XOR operation on the bits in the first bit set and the bits in the fourth bit set. For example, please refer to FIG. 9, which shows the process of obtaining the third bit set according to the fourth bit set and the first bit set. In FIG. 9, the first bit set is represented by the first bit sequence, the fourth bit set is represented by the second bit sequence, and the third bit set is represented by the third bit sequence. represents XOR operation (or binary addition). For details, please refer to the related content in the foregoing FIG. 2, which will not be described here again.

[0116] The bit in the fourth bit set that is XORed with the bits in the first bit set may change as the bits in the first bit set change. Taking the XOR operation between the i-th bit in the first bit set and the F(i)-th bit in the fourth bit set as an example, the 0-th bit in the first bit set is XORed with the F(0)-th bit in the fourth bit set, and the 1-th bit in the first bit set is XORed with the F(1)-th bit in the fourth bit set.

[0117] The fourth bit set includes N bits, the third bit set includes EN bits, the first bit set includes EN bits, and the second bit set may include NS bits. If the first sequence has K bits, then S = EK, where K is an integer greater than 0 and S is an integer greater than or equal to 0.

[0118] This application does not limit which bits from the first sequence constitute the first bit set. For example, the first bit set... It can be the first EN bits in the first sequence. Correspondingly, the second set of bits... The third bit set consists of the last NS bits of the first sequence. This application does not limit which bits from the second sequence constitute the third bit set. For example, the third bit set... It could be the last EN bits in the second sequence. Correspondingly, the fourth bit set... These are the first N bits in the second sequence.

[0119] Before the first device performs distribution matching on the first sequence, N can be determined. The first device can determine N based on E, S, and K. For example, with E=71, S=32, K=39, and N=64, n1 and n2 can be calculated sequentially to determine n based on n1 and n2, where N=2. n Where S / E < 9 / 16, and but otherwise, R min =1 / 8. n=max{min{n1, n2, n max}, n min}, where the minimum mother code length is 2. nmin The maximum mother code length is 2. nmax n min =5, n during uplink transmission max =10, n during downlink transmission max =9.

[0120] In addition, before the first device performs the distribution matching on the first sequence, the first device also needs to determine the rate matching manner. The first device can determine the rate matching manner according to the provisions of the NR standard. For example, the first device can determine the rate matching manner according to S, E and N. When E≥N, the rate matching is repetition; when S / E≤7 / 16, the rate matching is puncturing; and when S / E is greater than 7 / 16, the rate matching is shortening.

[0121] When the rate matching is repetition, the first device can determine the first sequence from the bit sequence to be transmitted, and then determine the first bit set and the second bit set. Alternatively, the first device performing the distribution matching on the first sequence further includes that the first device determines the first sequence from the bit sequence to be transmitted, and determines the first bit set and the second bit set. Alternatively, the first device performing the distribution matching on the first sequence further includes that the first device determines the first bit set and the second bit set from the bit sequence to be transmitted. The first device determining the first bit set and the second bit set includes that the first device acquires the first bit set and the second bit set.

[0122] In addition, the first device also needs to determine the first bit index set and the second bit index set The first bit index set is used to indicate the positions of the information bits, and the second bit index set is used to indicate the positions of the frozen bits, and the first bit index set and the second bit index set are disjoint. The first bit index set includes S bit indexes, and the S bit indexes are S bit indexes with the highest reliability order among N bit indexes. The second bit index set includes N-S bit indexes, and the N-S bit indexes are N-S bit indexes with the lowest reliability order among the N bit indexes . Here, the N bit indexes can be understood as N bit sequences included in the reliability sequence . The meaning of the bit index set can be referred to the description of the aforementioned term “polar code and polar code encoding”, which will not be described herein.

[0123] Taking N=64 as an example, The first bit index set The second bit index set , when E≥N, and are disjoint. For example, may be

[0124] The first device determines a first bit sequence set and a second bit sequence set After determining the first bit sequence set and the second bit sequence set the first device determines a third sequence for determining a fourth bit set The third sequence has a length of N. After determining the third sequence, the first device determines the fourth bit set according to the third sequence. The third sequence is composed of a bit sequence carried by a bit position corresponding to the first bit sequence set and a bit sequence carried by a bit position corresponding to the second bit sequence set In an embodiment of the present application, the bit sequence carried by the bit position corresponding to the first bit sequence set is referred to as a fourth sequence, and the second bit set is carried by the bit position corresponding to the second bit sequence set For example, the fourth bit set has an element e k =d k .

[0125] Optionally, the distribution matching includes interleaving, which is between the polar encoding and the rate matching. When the first device determines the fourth bit set according to the third sequence, the first device can perform polar encoding on the third sequence to obtain a fifth sequence, and perform interleaving on the fifth sequence to obtain the fourth bit set. The third sequence and the fifth sequence satisfy: y k is the fifth sequence, x J(k) is the third sequence, and G N is a coding matrix of the polar code. The fifth sequence can obtain y k after sub-block interleaving, k is an integer greater than or equal to 0 and less than N. The fourth bit set has an element e k =y J(k) .

[0126] After the first device determines the fourth bit set the first device can perform an exclusive or operation on bits in the first bit set and bits in the fourth bit set to obtain a third bit set For example, the third set of bits is obtained from the second set of bits The pseudo code for obtaining the third set of bits from the second set of bits is as follows. In the pseudo code below, mod denotes the modulo operation, c k-N denotes an element in the first set of bits.

[0127] For example,

[0128] It should be understood that the second set of bits carried by the frozen bits is not the only input to the SC decoder. In embodiments of the present application, the first sequence of log-likelihood ratios is taken as an example. The first sequence of log-likelihood ratios can be used to determine the fourth sequence, or the first sequence of log-likelihood ratios can be used to determine the fourth set of bits.

[0129] As an implementation, the first sequence of log-likelihood ratios can be determined according to the second sequence of log-likelihood ratios and the first set of bits. For example, the second sequence of log-likelihood ratios is [r0, …, r N-1 ], and r i can take values [1, 3, … 2 m -1], and the first sequence of log-likelihood ratios is [llr0, …, llr N-1 ]. The pseudo code for obtaining the first sequence of log-likelihood ratios from the second sequence of log-likelihood ratios and the first set of bits is as follows. In the pseudo code below, mod is the modulo operation, and J(k) is the interleaved index.

[0130] According to the pseudo code above, it is assumed that c6= 0, llr J(6) = llr8= r6+ r 70 .

[0131] Alternatively, the second sequence of log-likelihood ratios is (pre)configured, or the second sequence of log-likelihood ratios is predefined. The first device can store the second sequence of log-likelihood ratios. The first device can obtain the second sequence of log-likelihood ratios before performing the distribution matching on the first sequence, and then determine the first sequence of log-likelihood ratios according to the second sequence of log-likelihood ratios.

[0132] For example, the second sequence of log-likelihood ratios can be predefined as a sequence of all 1s, that is, r i = [1, 1, …, 1]. In this case, the pseudo code for obtaining the first sequence of log-likelihood ratios from the second sequence of log-likelihood ratios and the first set of bits is as follows.

[0133] According to the pseudo code above, it is assumed that c6= 0, llr J(6) = llr8= 2.

[0134] The second log-likelihood ratio sequence with all elements being 1 is only an example. Embodiments of the present application do not limit the size of the elements in the second log-likelihood ratio sequence and whether the elements are the same. In other words, the elements in the second log-likelihood ratio sequence can be the same, for example, all elements in the second log-likelihood ratio sequence are 1 or other possible values (e.g., 0.9). The elements in the second log-likelihood ratio sequence can be different, for example, the elements in the second log-likelihood ratio sequence include multiple different values, for example, 0.9, 0.8, and the like.

[0135] The first device performs distribution matching on the first sequence to obtain the second sequence, and then outputs the second sequence. The second sequence is sent to the second device after being processed by encoding, modulation, and the like.

[0136] S702, the second device receives a sequence to be decoded, which includes the second sequence.

[0137] The sequence to be decoded can be regarded as the sequence sent to the second device after the second sequence is encoded and modulated. It should be understood that the sequence to be decoded includes the second sequence. After receiving the sequence to be decoded, the second device can decode the sequence to be decoded to obtain the first sequence.

[0138] S703, the second device performs distribution matching decoding on the second sequence to obtain the first sequence.

[0139] The distribution matching decoding includes de-rate matching and de-polarization encoding. The second device performs distribution matching decoding on the second sequence to obtain the first sequence. As described above, the second sequence includes a third bit set and a fourth bit set, for example, the third bit set may be the last E-N bits in the second sequence. Correspondingly, the fourth bit set is the first N bits in the second sequence. After determining the third bit set and the fourth bit set, the second device can determine the second bit set according to the fourth bit set. For example, the second device determines the second bit set according to the result of de-polarization encoding performed on the fourth bit set.

[0140] As an example, the second device can perform de-polarization encoding on the fourth bit set to obtain a third sequence , for example The second device determines the second bit set by taking the bits carried in the bit positions with sequence numbers belonging to in the third sequence as the second bit set

[0141] If interleaving is performed during the acquisition of the fourth bit set, then the second device performs deinterleaving during the acquisition of the second bit set, where deinterleaving occurs between rate matching and polarization coding. For example, the second device can perform deinterleaving on the fourth bit set... Unintertwist to obtain the fifth sequence e k =d J(k) Perform depolarization encoding on the fifth sequence to obtain the third sequence. For example The sequence number in the third sequence belongs to The set of bits carried by the first bit position is the second bit set.

[0142] G in the depolarization coding process N In fact, it is the inverse matrix of the polar code's encoding matrix. Since the product of the polar code's encoding matrix and its inverse is an identity matrix, the inverse matrix of the polar code's encoding matrix here is also obtained through G. N Indication.

[0143] The second device can also determine the first bit set based on the third bit set and the fourth bit set, and thus determine the first sequence. The first bit set can be determined from the third bit set. The set of bits and the fourth bit The bits in the set are XORed to obtain the set. For example, the pseudocode for obtaining the first and second bit sets is as follows. In the following pseudocode, mod is the modulo operation, e k It is an element in the third bit set, e mod(k,N) It is an element in the fourth bit set, c k-N These are elements in the first bit set. The second bit set is... middle A set of bits that carry data.

[0144] The method provided in this application embodiment can achieve distribution matching of output bit number E through polar codes with a mother code length of N, where E is greater than or equal to N.

[0145] The method provided in the embodiments of the present application is introduced by taking the first device and the second device as an example. In the present application, each embodiment can be implemented independently or in combination based on certain internal relations. In each embodiment, different implementation manners can be implemented in combination or independently. In order to implement the functions in the method provided in the embodiments of the present application, the steps performed by the first device can be implemented by the first device itself, or can be implemented by a functional entity comprising the first device, or can be implemented by different functional entities constituting the first device. The steps performed by the second device can be implemented by the second device itself, or can be implemented by different functional entities constituting the second device, or can be implemented by a functional entity comprising the second device. In order to implement the functions in the method provided in the embodiments of the present application, the first device and the second device can comprise hardware structures and / or software modules, and the above functions are implemented in the form of hardware structure, software module, or hardware structure plus software module. Whether a certain function in the above functions is implemented in the form of hardware structure, software module, or hardware structure plus software module depends on the specific application and design constraints of the technical solution.

[0146] Based on the same inventive concept as the method embodiments, the embodiments of the present application provide a communication apparatus. The communication apparatus used to implement the above method in the embodiments of the present application is introduced below with reference to the drawings. The content in the above can be used in the subsequent embodiments, and the repeated content will not be described herein.

[0147] FIG. 10 is a schematic block diagram of a communication apparatus 1000 provided in the embodiments of the present application. The communication apparatus 1000 can correspond to the functions or steps implemented by the first device or the second device in the above method embodiments. For example, the communication apparatus 1000 can be the first device in FIG. 1; or the communication apparatus 1000 is a chip (system) in the first device; or the communication apparatus 1000 is a software module in the first device. Or, the communication apparatus 1000 can be the second device in FIG. 1; or the communication apparatus 1000 is a chip (system) in the second device; or the communication apparatus 1000 is a software module in the second device. Wherein, the first device or the second device can be a terminal device or a network device.

[0148] The communication apparatus 1000 can include a processing module 1010 and a transceiver module 1020. Optionally, it can also include a storage module, which can be used to store instructions (codes or programs) and / or data. The storage module can be, for example, a memory. The processing module 1010 and the transceiver module 1020 can be coupled with the storage module. For example, the processing module 1010 can read the instructions (codes or programs) and / or data in the storage module to implement corresponding methods. When the communication apparatus 1000 is a chip in a terminal device, the storage module can be a storage module in the chip, such as a register, a cache, etc. For example, the storage module can also be a storage module in the terminal device, which is located outside the chip, such as a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM), etc. The above-mentioned various units can be independently arranged, or partially or wholly integrated.

[0149] The processing module 1010 can be a processor or a controller, which can be, for example, a general-purpose central processing unit (CPU), a general-purpose processor, a digital signal processing (DSP), an application specific integrated circuits (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. It can implement or execute various exemplary logical blocks, modules and circuits described in combination with the disclosure. The processor can also be a combination for implementing computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, etc. The transceiver module 1020 is a transceiver, an interface circuit, a bus, a pin or other possible communication interface, which is used to receive signals from other apparatuses. For example, when the apparatus is implemented in the form of a chip, the transceiver module 1020 is an interface circuit of the chip for receiving signals from other chips or apparatuses, or is an interface circuit of the chip for sending signals to other chips or apparatuses.

[0150] In an implementation manner, the communication apparatus 1000 can correspond to the behaviors and functions of the first device in the above method embodiments. The communication apparatus 1000 can be a terminal device, a component (for example, a chip or a circuit) in the terminal device, a part in the chip or the chip set for executing the functions of the related method in the terminal device, or a software module in the terminal device capable of implementing the above communication method, without limitation. For details, reference can be made to the related content of the above method embodiments, which will not be described here.

[0151] For example, the processing module 1010 is configured to perform distribution matching on the first sequence, obtain the second sequence, and output the second sequence. The distribution matching includes polarization encoding and rate matching. The processing module 1010 outputs the second sequence can be that the processor outputs the second sequence through an input / output interface, and the input / output interface can be an output interface of the distribution matching. The first sequence includes a first bit set and a second bit set. The second sequence includes a third bit set and a fourth bit set. Corresponding to the rate matching being repetition, the third bit set is obtained by performing XOR operation on bits in the first bit set and bits in the fourth bit set. The fourth bit set is determined according to a result of performing polarization encoding on the second bit set.

[0152] As an optional implementation manner, the first sequence includes K bits, K is an integer greater than 0, the first bit set includes E-N bits, the second bit set includes N-S bits, S = E-K, S is an integer greater than or equal to 0, N is a mother code length of the polarization code, and E is a length of the second sequence. The third bit set includes E-N bits, the fourth bit set includes N bits, and E is greater than N.

[0153] As an optional implementation manner, the processing module 1010 is specifically configured to determine the fourth bit set according to a third sequence, and a length of the third sequence is N. The third sequence is composed of the fourth sequence and the second bit set, the fourth sequence is carried in bit positions corresponding to a first bit serial number set, and the second bit set is carried in bit positions corresponding to a second bit serial number set. The first bit serial number set is used to indicate positions of information bits, the second bit serial number set is used to indicate positions of frozen bits, and the first bit serial number set and the second bit serial number set are disjoint.

[0154] As an optional implementation manner, the distribution matching further includes interleaving, and the interleaving is between the polarization encoding and the rate matching. The processing module 1010 is specifically configured to perform polarization code encoding on a third sequence to obtain a fifth sequence, and perform interleaving on the fifth sequence to obtain the fourth bit set. The third sequence and the fifth sequence satisfy: is the fifth sequence, is the third sequence, and G N is a coding matrix of the polarization code.

[0155] As an optional implementation, the fourth bit set is composed of the first N bits of the second sequence e k =d J(k) , k is an integer greater than or equal to 0 and less than N, J(k) is the sequence number after sub-block interleaving, or e k =d k . e k is the kth element in the fourth bit set.

[0156] As an optional implementation, the second bit set is composed of the last N-K bits in the first sequence , and the third bit set is composed of the last E-N bits of the second sequence .

[0157] As an optional implementation, the fourth sequence is determined according to the first log-likelihood ratio sequence.

[0158] As an optional implementation, the first bit sequence number set includes S bit indexes, and the second bit sequence number set includes N-S bit indexes.

[0159] As an optional implementation, the S bit indexes are S bit indexes with the highest reliability sequence numbers in the N bit indexes, and the N-S bit indexes are N-S bit indexes with the lowest reliability sequence numbers in the N bit indexes.

[0160] In an implementation, the communication apparatus 1000 can correspondingly implement the behaviors and functions of the second device in the above method embodiments. The communication apparatus 1000 can be the second device, or a component (such as a chip or circuit) in the second device, or a part in a chip or chip set in the second device for executing related method functions, or a software module in the second device capable of implementing the above communication method, which is not limited. For details, reference can be made to the related content of the foregoing method embodiments, which will not be described here.

[0161] For example, the transceiver module 1020 is configured to receive a to-be-decoded sequence, the to-be-decoded sequence including a second sequence, the second sequence including a third bit set and a fourth bit set. The processing module 1010 is configured to perform distributed matching decoding on the second sequence to obtain a first sequence. The distributed matching decoding includes rate dematching and polar decoding. The first sequence includes a first bit set and a second bit set. Corresponding to the rate dematching being repetition, the first bit set is obtained by exclusive-OR of bits in the third bit set and bits in the fourth bit set, and the second bit set is determined according to a result of performing polar decoding on the fourth bit set.

[0162] As an optional implementation, the first sequence includes K bits, K is an integer greater than 0, the first bit set includes E-N bits, the second bit set includes N-S bits, S = E-K, S is an integer greater than or equal to 0, N is a length of a mother code of the polar code, and E is a length of the second sequence. The third bit set includes E-N bits, the fourth bit set includes N bits, and E is greater than or equal to N.

[0163] As an optional implementation, the processing module 1010 is specifically configured to: perform depolarization encoding processing on the fourth bit set to obtain a third sequence; and the second device determines a set of bits carried by bit positions with second bit sequence numbers in the third sequence as the second bit set. The second bit sequence numbers are used to indicate positions of frozen bits.

[0164] As an optional implementation, the distribution matching decoding further includes deinterleaving, the deinterleaving being between the rate matching and the depolarization encoding, and the processing module 1010 is further configured to: perform deinterleaving processing on the fourth bit set to obtain a fifth sequence; and perform depolarization encoding processing on the fifth sequence to obtain the third sequence. The third sequence and the fifth sequence satisfy: is the fifth sequence, is the third sequence, and G N is an inverse matrix of a coding matrix of the polar code.

[0165] As an optional implementation, the third sequence is composed of the fourth sequence and the second bit set, the fourth sequence is carried in bit positions corresponding to a first bit sequence number set, the first bit sequence number set is used to indicate positions of information bits, and the first bit sequence number set and the second bit sequence number set are disjoint.

[0166] As an optional implementation, the fourth bit set is composed of the first N bits of the second sequence , e k = d J(k) , k is an integer greater than or equal to 0 and less than N, J(k) is a sequence number after interleaving, or e k = d k , e k is the kth element in the fourth bit set.

[0167] As an optional implementation, the second bit set is composed of the last N-S bits in the first sequence , and the third bit set is composed of the last E-N bits of the second sequence .

[0168] As an optional implementation, the first bit sequence number set includes S bit indexes, and the second bit sequence number set includes N-S bit indexes.

[0169] As an optional implementation, the S bit indexes are the S bit indexes with the highest reliability sequence numbers among the N bit indexes, and the N-S bit indexes are the N-S bit indexes with the lowest reliability sequence numbers among the N bit indexes.

[0170] When the communication apparatus 1000 is a chip type apparatus or circuit, the transceiver module can be an input / output circuit and / or a communication interface; and the processing module is an integrated processor or microprocessor or integrated circuit.

[0171] FIG. 11 is a schematic block diagram of a communication apparatus 1100 according to an embodiment of the present application. The communication apparatus 1100 can be a terminal device or a network device in the above embodiments. For example, the communication apparatus 1100 can be the first device or a chip (system) in the first device in FIG. 1. For another example, the communication apparatus 1100 can be the second device or a chip (system) in the second device in FIG. 1. In the embodiments of the present application, the chip system can be composed of a chip, or can include a chip and other discrete devices. The specific functions can be referred to the description of the method embodiments. The first device or the second device is a terminal device or a network device.

[0172] The communication apparatus 1100 includes one or more processors 1101 for implementing or for supporting implementation of the functions of the first device or the second device in the methods according to the embodiments of the present application. The specific functions can be referred to the description of the method embodiments, which will not be repeated here. The processor 1101 can also be referred to as a processing unit or a processing module, and can implement certain control functions. The processor 1101 can be a general purpose processor or a special purpose processor. For example, it includes a baseband processor, a central processing unit, an application processor, a modem processor, a graphics processor, an image signal processor, a digital signal processor, a video coding and decoding processor, a controller, a memory, and / or a neural network processor, etc. The baseband processor can be used to process communication protocols and communication data. The central processing unit can be used to control the communication apparatus 1100 (e.g., a terminal device or a network device), execute software programs and / or process data. Different processors can be independent devices, or can be integrated into one or more processors, for example, integrated into one or more application specific integrated circuits.

[0173] In one design, the processor 1101 can include a program 1103 (which can also be referred to as code or instructions), which can be run on the processor 1101 to cause the communication apparatus 1100 to perform the methods described in the following embodiments. In another possible design, the communication apparatus 1100 includes a circuit (not shown in FIG. 11) for implementing the functions of the first device or the second device in the above embodiments.

[0174] In one design, the communication device 1100 can include one or more memories 1102 having program 1104 (which can also be referred to as code or instructions) stored thereon, which can be run on the processor 1101 to cause the communication device 1100 to perform the methods described in the above method embodiments.

[0175] In one possible design, the processor 1101 and / or the memory 1102 can also store data. The processor and the memory can be separately provided or integrated together.

[0176] In one possible design, the communication device 1100 can also include a transceiver and / or an antenna. The processor 1101 can also be referred to as a processing unit, which controls the communication device 1100. The transceiver can also be referred to as a transceiving unit, a transceiver, a transceiving circuit, or a transceiver, etc., which is used to realize the transceiving function of the communication device 1100 through the antenna.

[0177] In one possible design, the communication device 1100 can also include one or more of the following components: a wireless communication module, an audio module, an external memory interface, an internal memory, a universal serial bus (USB) interface, a power management module, an antenna, a speaker, a microphone, an input / output module, a sensor module, a motor, a camera, or a display screen, etc. It can be understood that, in some embodiments, the communication device 1100 can include more or less components, or some components can be integrated, or some components can be split. These components can be implemented in hardware, software, or a combination of software and hardware.

[0178] Based on the above embodiments, referring to FIG. 12, another communication device 1200 is provided in the embodiments of the present application, which includes: an input / output interface 1210 and a logic circuit 1220; the input / output interface 1210 is configured to receive code instructions and transmit the code instructions to the logic circuit 1220; the logic circuit 1220 is configured to run the code instructions to perform the method performed by the first device or the second device in any of the above embodiments. For details, refer to the above method embodiments, which will not be described here again.

[0179] When the communication apparatus 1200 can be applied to the first device, and performs the method performed by the first device, the logic circuit 1220 is configured to perform distribution matching on the first sequence to obtain the second sequence. The input and output interface 1210 is configured to output the second sequence. The first sequence includes a first bit set and a second bit set. The second sequence includes a third bit set and a fourth bit set. The third bit set is obtained by performing XOR operation on bits in the first bit set and bits in the fourth bit set, corresponding to the rate matching being repetition. The fourth bit set is determined according to a result of performing the polar encoding on the second bit set.

[0180] When the communication apparatus 1200 can be applied to the second device, and performs the method performed by the second device, the input and output interface 1210 is configured to receive a to-be-decoded sequence, the to-be-decoded sequence including the second sequence, the second sequence including a third bit set and a fourth bit set. The logic circuit 1220 is configured to perform distribution matching decoding on the second sequence to obtain the first sequence. The distribution matching decoding includes de-rate matching and de-polar encoding. The first sequence includes a first bit set and a second bit set. The first bit set is obtained by performing XOR operation on bits in the third bit set and bits in the fourth bit set, corresponding to the rate matching being repetition. The second bit set is determined according to a result of performing the de-polar encoding on the fourth bit set.

[0181] The communication apparatus in the above embodiments can be a terminal device or a network device, can be a circuit, can be a chip applied to the terminal device or the network device, or other combination devices, components, etc. having the terminal device or the network device. When the communication apparatus is a terminal device, the transceiver module can be a transceiver, and can include an antenna and a radio frequency circuit, etc. The processing module can be a processor, such as a CPU. When the communication apparatus is a chip system, the communication apparatus can be an FPGA, can be a special ASIC, can be a SoC, can be a CPU, can be a network processor (NP), can be a DSP, can be a micro controller unit (MCU), can be a programmable logic device (PLD), or other integrated chip. The processing module can be a processor of the chip system. The transceiver module or the communication interface can be an input and output interface or an interface circuit of the chip system. For example, the interface circuit can be a code / data read-write interface circuit. The interface circuit can be configured to receive code instructions (the code instructions are stored in a memory, and can be directly read from the memory or can be read from the memory through other devices) and transmit the code instructions to the processor. The processor can be configured to run the code instructions to perform the method in the above method embodiments. For another example, the interface circuit can also be a signal transmission interface circuit between a communication processor and a transceiver.

[0182] The embodiments of the present application also provide a communication system, which comprises at least one terminal device and at least one network device. The terminal device is a first device for implementing the functions related to the above communication method, and the network device is a second device for implementing the functions related to the above communication method. The network device is a first device for implementing the functions related to the above communication method, and the terminal device is a second device for implementing the functions related to the above communication method.

[0183] The embodiments of the present application also provide a computer readable storage medium, which comprises instructions, when the instructions are executed on a computer, the method executed by the first device or the second device in the above communication method is executed.

[0184] The embodiments of the present application also provide a computer program product, which comprises computer program codes, when the computer program codes are executed, the method executed by the first device or the second device in the above communication method is executed.

[0185] The embodiments of the present application provide a chip system, which comprises a processor, and can further comprise a memory, for implementing the functions of the first device or the second device in the above communication method. The chip system can be composed of a chip, or can contain a chip and other discrete devices.

[0186] In order to implement the functions of the communication apparatus in FIG. 10 to FIG. 12, the embodiments of the present application also provide a chip, which comprises a processor, for supporting the communication apparatus to implement the functions related to the first device or the second device in the above method embodiments. In a possible design, the chip is connected with a memory or the chip comprises a memory, and the memory is used to save the computer programs or instructions and data necessary for the communication apparatus.

[0187] It should be understood that, in various embodiments of the present application, the size of the serial number of each process does not mean the execution order, and the execution order of each process should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0188] Those skilled in the art can realize that the various illustrative logical blocks and steps described in connection with the embodiments disclosed herein can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether the functions are implemented in hardware or software depends on the specific application and design constraints of the technical solutions. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0189] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the system, device and unit described above can refer to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0190] In several embodiments provided in the present application, it should be understood that the disclosed system, device and method can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of the units is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units shown or discussed can be indirect coupling or communication connection through some interface, device or unit, and can be electrical, mechanical or other forms.

[0191] The units described as separate components can or can not be physically separated, and the components shown as units can or can not be physical units, that is, can be located in one place, or can be distributed on a plurality of network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the embodiment scheme.

[0192] If the functions are realized in the form of software function units and sold or used as independent products, they can be stored in a computer readable storage medium. Based on such understanding, the part essentially contributed by the technical scheme of the present application or the part of the technical scheme can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in the various embodiments of the present application. The foregoing storage medium includes: U disk, mobile hard disk, ROM, RAM, magnetic disk or optical disk and various program code storage media.

[0193] Obviously, those skilled in the art can make various modifications and variations to the present application without departing from the scope of the present application. Thus, if these modifications and variations of the present application belong to the scope of the claims of the present application and their equivalents, the present application also intends to include these modifications and variations.

Claims

1. A communication method characterized by comprising: The method comprises: performing distribution matching on the first sequence to obtain a second sequence, the distribution matching comprising polar encoding and rate matching; outputting the second sequence; wherein the first sequence comprises a first bit set and a second bit set, the second sequence comprises a third bit set and a fourth bit set, corresponding to the rate matching being repetition, the third bit set being obtained by exclusive-OR of bits in the first bit set and bits in the fourth bit set, and the fourth bit set being determined according to a result of performing the polar encoding on the second bit set.

2. The method of claim 1, wherein: the first sequence comprises K bits, K being an integer greater than 0, the first bit set comprises E-N bits, the second bit set comprises N-S bits, S = E-K, S being an integer greater than or equal to 0, N being a mother code length of a polar code, and E being a length of the second sequence; the third bit set comprises E-N bits, the fourth bit set comprises N bits, and E is greater than or equal to N.

3. The method of claim 1 or 2, wherein, The method comprises: determining the fourth bit set according to a third sequence, the third sequence having a length of N, the third sequence being composed of a fourth sequence and the second bit set, the fourth sequence being carried in bit positions corresponding to a first bit sequence number set, and the second bit set being carried in bit positions corresponding to a second bit sequence number set; wherein the first bit sequence number set is used to indicate positions of information bits, the second bit sequence number set is used to indicate positions of frozen bits, and the first bit sequence number set and the second bit sequence number set are disjoint.

4. The method of claim 3, wherein, The distribution matching further comprises interleaving, the interleaving being between the polar encoding and the rate matching, and the determining the fourth bit set according to the third sequence comprises: performing polar code encoding on the third sequence to obtain a fifth sequence; performing interleaving on the fifth sequence to obtain the fourth bit set; wherein the third sequence and the fifth sequence satisfy: for said fifth sequence, For the third sequence, G N is a polar code encoding matrix.

5. The method of claim 4, wherein, The fourth set of bits is the first N bits of the second sequence comprises e k = d J(k) , k is an integer greater than or equal to 0 and less than N, J(k) is the interleaved sequence number, or e k = d k , e k is the kth element in the fourth set of bits.

6. The method of any one of claims 1-5, wherein, The second set of bits consists of the last N-S bits in the first sequence The third set of bits consists of the last E-N bits in the second sequence ​ 7. The method of any one of claims 4-6, wherein, the fourth sequence being determined according to a first log-likelihood ratio sequence.

8. The method of any one of claims 1-7, wherein, The first bit sequence number set comprises S bit indexes, and the second bit sequence number set comprises N-S bit indexes.

9. The method of claim 8, wherein, The S bit indexes are S bit indexes with highest reliability order numbers in N bit indexes, and the N-S bit indexes are N-S bit indexes with lowest reliability order numbers in the N bit indexes.

10. A communication method characterized by comprising: The method comprises: receiving a sequence to be decoded, the sequence to be decoded comprising a second sequence, the second sequence comprising a third bit set and a fourth bit set; performing distribution matching decoding on the second sequence to obtain a first sequence; wherein the distribution matching decoding comprises de-rate matching and de-polar encoding, the first sequence comprises a first bit set and a second bit set, corresponding to the rate matching being repetition, the first bit set being obtained by exclusive-OR of bits in the third bit set and bits in the fourth bit set, and the second bit set being determined according to a result of performing de-polar encoding on the fourth bit set.

11. The method of claim 10, wherein: The first sequence includes K bits, K is an integer greater than 0, the first bit set includes E-N bits, the second bit set includes N-S bits, S = E-K, S is an integer greater than or equal to 0, N is a length of a polar code mother code, and E is a length of the second sequence. The third bit set includes E-N bits, the fourth bit set includes N bits, and E is greater than or equal to N.

12. The method of claim 10 or 11, wherein, The second sequence is subjected to distribution matching decoding to obtain a first sequence, including: The fourth bit set is subjected to de-polarization encoding to obtain a third sequence; The second bit set is determined as a set of bits carried by bit positions in the third sequence that belong to a second bit sequence number set, the second bit sequence number set being used to indicate positions of frozen bits.

13. The method of claim 12, wherein, The distribution matching decoding further includes de-interleaving, the de-interleaving being between the de-rate matching and the de-polarization encoding, the fourth bit set being subjected to de-interleaving processing to obtain a fifth sequence, and the third sequence being composed of the fourth sequence and the second bit set, the fourth sequence being carried in bit positions corresponding to a first bit sequence number set, the first bit sequence number set being used to indicate positions of information bits, and the first bit sequence number set and the second bit sequence number set being disjoint. The first bit sequence number set includes S bit indexes, and the second bit sequence number set includes N-S bit indexes. performing depolarization encoding processing on the fifth sequence to obtain the third sequence; wherein the third sequence and the fifth sequence satisfy: for said fifth sequence, For the third sequence, G N is the inverse matrix of the encoding matrix of the polar code.

14. The method of claim 12 or 13, wherein, The S bit indexes are S bit indexes with highest reliability sequence numbers in N bit indexes, and the N-S bit indexes are N-S bit indexes with lowest reliability sequence numbers in the N bit indexes.

15. The method of any one of claims 10-14, wherein, The fourth bit set is composed of the first N bits of the second sequence e k = d J(k) , k is an integer greater than or equal to 0 and less than N, J(k) is the sequence number after sub-block interleaving, or e k = d k , e k is the kth element in the fourth bit set.

16. The method of any one of claims 10-15, wherein, The second set of bits is comprised of the last N-S bits in the first sequence The third set of bits is comprised of the last E-N bits in the second sequence ​ 17. The method of any one of claims 10-16, wherein, The processing module is configured to perform distribution matching on a first sequence to obtain a second sequence, the distribution matching including polar encoding and rate matching.

18. The method of claim 17, wherein, The transceiver module is configured to output the second sequence.

19. A communications device, characterized by The first sequence includes a first bit set and a second bit set, the second sequence includes a third bit set and a fourth bit set, the rate matching corresponds to repetition, the third bit set is obtained by performing exclusive OR on bits in the first bit set and bits in the fourth bit set, and the fourth bit set is determined according to a result of the polar encoding performed on the second bit set.

20. The apparatus of claim 19, wherein The first sequence includes K bits, K is an integer greater than 0, the first bit set includes E-N bits, the second bit set includes N-S bits, S = E-K, S is an integer greater than or equal to 0, N is a length of a polar code mother code, and E is a length of the second sequence. The third bit set includes E-N bits, the fourth bit set includes N bits, and E is greater than or equal to N. The processing module is specifically configured to ​ ​ 21. The apparatus of claim 19 or 20, wherein, ​ The fourth bit set is determined according to a third sequence, the third sequence has a length of N, the third sequence is composed of a fourth sequence and the second bit set, the fourth sequence is carried in bit positions corresponding to a first bit serial number set, and the second bit set is carried in bit positions corresponding to a second bit serial number set; the first bit serial number set is used for indicating positions of information bits, the second bit serial number set is used for indicating positions of frozen bits, and the first bit serial number set and the second bit serial number set are disjoint.

22. The apparatus of claim 21, wherein, The distribution matching further includes interleaving, the interleaving being between the polarization encoding and the rate matching, and the processing module is specifically configured to: perform polarization code encoding on the third sequence to obtain a fifth sequence; perform interleaving on the fifth sequence to obtain the fourth bit set; wherein the third sequence and the fifth sequence satisfy: for said fifth sequence, For the third sequence, G N is a polar code encoding matrix.

23. The apparatus of claim 22, wherein, The fourth set of bits is the first N bits of the second sequence comprises e k = d J(k) , k is an integer greater than or equal to 0 and less than N, J(k) is the interleaved sequence number, or e k = d k , e k is the kth element in the fourth set of bits.

24. The apparatus of any one of claims 19-23, wherein, The second set of bits consists of the last N-S bits in the first sequence The third set of bits consists of the last E-N bits in the second sequence ​ 25. The apparatus of any one of claims 22-24, wherein, the fourth sequence is determined according to a first log-likelihood ratio sequence.

26. The apparatus of any one of claims 19-25, wherein, The first bit serial number set includes S bit indexes, and the second bit serial number set includes N-S bit indexes.

27. The apparatus of claim 26, wherein, The S bit indexes are S bit indexes with highest reliability order in N bit indexes, and the N-S bit indexes are N-S bit indexes with lowest reliability order in the N bit indexes.

28. A communications device, characterized by comprise: a transceiving module configured to receive a to-be-decoded sequence, the to-be-decoded sequence comprising a second sequence, the second sequence comprising a third bit set and a fourth bit set; a processing module configured to perform distribution matching decoding on the second sequence to obtain a first sequence; wherein the distribution matching decoding comprises de-rate matching and de-polarization encoding; the first sequence comprises a first bit set and a second bit set, the first bit set being obtained by exclusive-OR of bits in the third bit set and bits in the fourth bit set, and the second bit set being determined according to a result of performing de-polarization encoding on the fourth bit set.

29. The apparatus of claim 28, wherein: the first sequence comprises K bits, K being an integer greater than 0, the first bit set comprises E-N bits, the second bit set comprises N-S bits, S = E-K, S being an integer greater than or equal to 0, N being a length of a mother code of the polar code, and E being a length of the second sequence; the third bit set comprises E-N bits, the fourth bit set comprises N bits, and E is greater than or equal to N.

30. The apparatus of claim 28 or 29, wherein, the processing module is specifically configured to: perform de-polarization encoding on the fourth bit set to obtain a third sequence; determine, as the second bit set, bits carried in bit positions with serial numbers belonging to a second bit serial number set in the third sequence, the second bit serial number set being used for indicating positions of frozen bits.

31. The apparatus of claim 30, wherein, the distribution matching decoding further includes de-interleaving, the de-interleaving being between the de-rate matching and the de-polarization encoding, and the processing module is specifically configured to: perform de-interleaving processing on the fourth bit set to obtain a fifth sequence; performing depolarization encoding processing on the fifth sequence to obtain the third sequence; wherein the third sequence and the fifth sequence satisfy: for said fifth sequence, For the third sequence, G N is the inverse matrix of the encoding matrix of the polar code.

32. The apparatus of claim 30 or 31, wherein, The third sequence is composed of a fourth sequence and the second bit set, the fourth sequence is carried in bit positions corresponding to a first bit serial number set, the first bit serial number set is used to indicate positions of information bits, and the first bit serial number set and the second bit serial number set are disjoint.

33. The apparatus of any one of claims 28-32, wherein, The fourth set of bits is the first N bits of the second sequence comprises e k = d J(k) , k is an integer greater than or equal to 0 and less than N, J(k) is the sequence number after sub-block interleaving, or e k = d k , e k is the kth element in the fourth set of bits.

34. The apparatus of any one of claims 28-33, wherein, The second set of bits consists of the last N-S bits in the first sequence The third set of bits consists of the last E-N bits in the second sequence ​ 35. The apparatus of any one of claims 28-34, wherein, The first bit serial number set includes S bit indexes, and the second bit serial number set includes N-S bit indexes.

36. The apparatus of claim 35, wherein, The S bit indexes are S bit indexes with highest reliability serial numbers in N bit indexes, and the N-S bit indexes are N-S bit indexes with lowest reliability serial numbers in the N bit indexes.

37. A communications device, characterized by The communication device includes at least one processor configured to cause the method of any one of claims 1-9 to be performed by the communication device, or the at least one processor is configured to cause the communication device to perform the method of any one of claims 10-18.

38. A computer-readable storage medium, characterized in that, The computer readable storage medium is used to store a computer program, when the computer program runs on a computer, causes the method of any one of claims 1-9 to be performed, or causes the method of any one of claims 10-18 to be performed.

39. A computer program product, characterised in that, The computer program product includes a computer program, when the computer program runs on a computer, causes the method of any one of claims 1-9 to be performed, or causes the method of any one of claims 10-18 to be performed.

40. A chip or chip system, characterized by The chip or chip system includes: At least one processor and an interface, the at least one processor is used to call and run instructions from the interface, when the at least one processor executes the instructions, the method of any one of claims 1-9 is implemented, or the method of any one of claims 10-18 is implemented.

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