Semiconductor device manufacturing method and semiconductor device

The method of using a metal mask layer and CO2 laser irradiation addresses the challenge of forming small-diameter vias in inorganic material insulating layers, enhancing semiconductor device interconnects for higher density and performance.

WO2026083531A1PCT designated stage Publication Date: 2026-04-23RESONAC CORP
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Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
RESONAC CORP
Filing Date
2024-10-16
Publication Date
2026-04-23

AI Technical Summary

Technical Problem

Existing semiconductor manufacturing methods struggle to efficiently form small-diameter vias in insulating layers containing inorganic materials, particularly in multilayer wiring structures, which are crucial for high-density interconnects between semiconductor chips.

Method used

A method involving the use of a metal mask layer with openings corresponding to via positions, followed by irradiation with laser light larger than the openings to create through-holes in the insulating layer, utilizing a CO2 laser for inorganic material processing, with specific thickness and diameter ratios to form small-diameter vias.

Benefits of technology

Enables the simple formation of small-diameter vias in insulating layers with inorganic materials, facilitating high-density interconnects and improving semiconductor device performance.

✦ Generated by Eureka AI based on patent content.

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Abstract

This semiconductor device manufacturing method is for manufacturing a semiconductor device having a multilayer wiring in which wiring layers and insulation layers containing an inorganic material are alternately stacked, in such a manner that wiring layers adjacent to each other in the stacking direction while intermediated by an insulation layer are electrically connected via a conductor present in a through hole provided in the insulation layer. The multilayer wiring is formed by providing the insulation layer on a substrate, providing, on a surface of the insulation layer, a metal mask layer having an opening corresponding to the position of the through hole, and forming the through hole in the insulation layer by irradiating the opening with laser light having a diameter larger than the diameter of the opening.
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Description

Method for manufacturing a semiconductor device and semiconductor device

[0001] This disclosure relates to a method for manufacturing a semiconductor device and to a semiconductor device.

[0002] To achieve higher density and performance in semiconductor packages, mounting configurations have been proposed in which chips with different performance characteristics are mixed together in a single package. In this case, cost-effective high-density interconnect technology between chips is crucial (see, for example, Patent Document 1).

[0003] Non-patent documents 1 and 2 describe a package-on-package (PoP) configuration in which different packages are connected by stacking them on top of each other using flip-chip mounting. This PoP configuration is widely used in smartphones, tablet devices, and the like.

[0004] Other proposed forms for high-density mounting of multiple chips include packaging technologies using organic substrates with high-density wiring, fan-out type packaging technologies (FO-WLP) with through-molded vias (TMV), packaging technologies using silicon or glass interposers, packaging technologies using through-silicon vias (TSV), and packaging technologies that use chips embedded in the substrate for inter-chip transmission.

[0005] In particular, when semiconductor chips are mounted on semiconductor wiring layers and FO-WLP, a fine wiring layer is required to conduct electricity between the semiconductor chips at high density (see, for example, Patent Document 2).

[0006] Patent Document 1: Japanese Patent Publication No. 2012-529770 Patent Document 2: U.S. Patent Application Publication No. 2011 / 0221071

[0007] Non-Patent Document 1: Jinseong Kim et al. , “Application of Through Mold Via (TMV) as PoP Base Package”, Electronic Components and Technology Conference (ECTC), p. 1089-1092 (2008) Non-patent document 2: S. W. Yoon et al. , “Advanced Low Profile PoP Solution with Embedded Wafer Level PoP (eWLB-PoP) Technology”, ECTC, p. 1250-1254 (2012)

[0008] In build-up substrates, wafer-level packages (WLPs), and bottom packages of fan-out type pop-ups, wiring layers (semiconductor wiring layers) are sometimes used to mount multiple semiconductor chips. The wiring layer is constructed as a multilayer wiring structure in which wiring layers and insulating layers are alternately stacked. The insulating material constituting the insulating layer often contains inorganic materials such as inorganic fillers and glass cloth to improve the heat resistance and dimensional stability of the insulating layer. Methods for creating vias in the insulating layer include photolithography and laser drilling. While photolithography allows for the formation of smaller diameter vias compared to laser drilling, it requires more steps for via formation, making the simpler laser drilling method preferable. Laser types applicable to laser drilling include CO2. 2 Examples include lasers and UV lasers. Using a UV laser makes it possible to form smaller diameter vias. On the other hand, for processing insulating materials containing inorganic materials, CO 2 Laser use is preferable.

[0009] This disclosure is made in view of the above-mentioned conventional circumstances and aims to provide a method for manufacturing a semiconductor device that can form small-diameter vias in an insulating layer containing an inorganic material in a simple manner. Furthermore, this disclosure aims to provide a semiconductor device having multilayer wiring including an insulating layer containing an inorganic material on which small-diameter vias are formed.

[0010] The specific means for achieving the above objectives are as follows: <1> A method for manufacturing a semiconductor device having multilayer wiring in which wiring layers and insulating layers containing an inorganic material are alternately laminated, and adjacent wiring layers in the lamination direction are electrically connected via conductors present in through holes provided in the insulating layer, the method comprising: providing the insulating layer on a substrate; providing a metal mask layer on the surface of the insulating layer having openings corresponding to the positions of the through holes; and irradiating the openings with laser light having a diameter larger than the diameter of the openings to form the through holes in the insulating layer, thereby forming the multilayer wiring. <2> The method for manufacturing a semiconductor device according to <1>, wherein the average thickness of the metal mask layer is 1.0 μm or less. <3> The method for manufacturing a semiconductor device according to <1> or <2>, wherein the content of the inorganic material in the insulating layer is 30 volume% to 90 volume%. <4> The method for manufacturing a semiconductor device according to any one of <1> to <3>, wherein the inorganic material includes at least one of glass cloth and an inorganic filler. <5> The method for manufacturing a semiconductor device according to any one of <1> to <4>, wherein the laser light is a carbon dioxide laser light. <6> The method for manufacturing a semiconductor device according to any one of <1> to <5>, wherein the ratio of the diameter of the laser light to the diameter of the aperture is greater than 1.0 and less than or equal to 10.0. <7> The method for manufacturing a semiconductor device according to any one of <1> to <6>, wherein the average diameter of the through-hole is 5 μm to 10 μm. <8> The method for manufacturing a semiconductor device according to any one of <1> to <7>, wherein the aspect ratio of the through-hole is 1.0 to 5.0. <9> The method for manufacturing a semiconductor device according to any one of <1> to <8>, wherein the etching amount in the thickness direction of the metal mask layer per shot of laser light is X μm, the thickness of the metal mask layer is Z μm, and the number of times the laser light is irradiated for the formation of the through-hole is M, and the relationship expressed by the following formula (1) holds true.X × M < Z Formula (1) <10> A method for manufacturing a semiconductor device according to any one of <1> to <9>, wherein the insulating layer comprises at least one selected from the group consisting of polyimide resin, acrylic resin, epoxy resin and polyparaphenylenebenzobisoxazole. <11> A semiconductor device comprising a semiconductor element and a multilayer wiring in which wiring layers and insulating layers are alternately laminated and electrically connected to the semiconductor element, wherein adjacent wiring layers in the lamination direction are electrically connected via the insulating layer through conductors present in through holes provided in the insulating layer, the insulating layer contains an inorganic material, and the average diameter of the through holes is 10 μm or less. <12> The semiconductor device according to <11>, wherein the content of the inorganic material in the insulating layer is 30 product% to 90 volume%. <13> The semiconductor device according to <11> or <12>, wherein the inorganic material comprises at least one of glass cloth and an inorganic filler.

[0011] According to this disclosure, it is possible to provide a method for manufacturing a semiconductor device that can form small-diameter vias in an insulating layer containing an inorganic material in a simple manner. Furthermore, according to this disclosure, it is possible to provide a semiconductor device having multilayer wiring including an insulating layer containing an inorganic material on which small-diameter vias are formed.

[0012] This is a cross-sectional view showing an insulating layer 14 containing an inorganic filler 12, which is an inorganic material, on a semiconductor substrate 10. This is a cross-sectional view showing a metal mask layer 16 on the surface of the insulating layer 14. This is a cross-sectional view showing a dry film resist 18 laminated on the metal mask layer 16. This is a cross-sectional view showing a state in which a part of the metal mask layer 16 has been etched to form an opening 22. This figure shows a state in which a laser beam with a diameter larger than the diameter of the opening 22 is irradiated onto the opening 22 of the metal mask layer 16 in which the opening 22 has been formed. This is a cross-sectional view showing a through hole 24 on the surface of the insulating layer 14. This is an SEM image of the through hole for Reference Example 1. This is an SEM image of the through hole for Reference Example 2.

[0013] The embodiments of this disclosure are described in detail below. However, this disclosure is not limited to the embodiments described below. In the embodiments described below, the components (including elemental steps, etc.) are not essential unless otherwise specified. The same applies to numerical values ​​and their ranges, and do not limit this disclosure.

[0014] In this disclosure, numerical ranges indicated using "~" include the numbers before and after "~" as the minimum and maximum values, respectively. In numerical ranges described in stages in this disclosure, the upper or lower limit of one numerical range may be replaced by the upper or lower limit of another numerical range described in stages. Also, in numerical ranges described in this disclosure, the upper or lower limit of that numerical range may be replaced by the values ​​shown in the examples. In this disclosure, each component may contain multiple types of the corresponding substance. If multiple types of the substance corresponding to each component are present in the composition, the content or amount of each component means the total content or amount of the multiple types of substances present in the composition, unless otherwise specified. In this disclosure, each particle corresponding to each component may contain multiple types of particles. If multiple types of particles corresponding to each component are present in the composition, the particle size of each component means the value for the mixture of the multiple types of particles present in the composition, unless otherwise specified. In this disclosure, the terms “layer” or “film” include cases where the layer or film is formed over the entire region when observed, as well as cases where it is formed only on a portion of the region. In this disclosure, the term “laminated” refers to stacking layers, and two or more layers may be bonded together, or two or more layers may be detachable. In this disclosure, the average thickness of a layer or film is given as the arithmetic mean of measuring the thickness at five points on the layer or film in question. The thickness of a layer or film can be measured using a micrometer or the like. In this disclosure, if the thickness of a layer or film can be measured directly, it shall be measured using a micrometer. On the other hand, when measuring the thickness of a single layer or the total thickness of multiple layers, it may be measured by observing a cross-section of the object to be measured using an electron microscope.

[0015] <Method for Manufacturing a Semiconductor Device> The present disclosure relates to a method for manufacturing a semiconductor device having multilayer wiring, in which wiring layers and insulating layers containing an inorganic material are alternately stacked, and adjacent wiring layers in the stacking direction are electrically connected via conductors located in through-holes provided in the insulating layer. In the method for manufacturing a semiconductor device of the present disclosure, multilayer wiring is formed by providing an insulating layer on a substrate, providing a metal mask layer on the surface of the insulating layer having openings corresponding to the positions of the through-holes, and irradiating the openings with laser light having a diameter larger than the diameter of the openings to form through-holes in the insulating layer. According to the method for manufacturing a semiconductor device of the present disclosure, it is possible to provide a method for manufacturing a semiconductor device that can form small-diameter vias in an insulating layer containing an inorganic material in a simple manner.

[0016] The method for manufacturing the semiconductor device described herein will be described in detail below. Note that the sizes of the components in each figure are conceptual, and the relative sizes of the components are not limited thereto. Furthermore, components having substantially the same function are given the same reference numeral throughout all drawings, and redundant explanations may be omitted.

[0017] Figure 1 is a cross-sectional view showing a state in which an insulating layer 14 containing an inorganic filler 12, which is an inorganic material, is provided on a semiconductor substrate 10, which is an example of a substrate. Examples of substrates include semiconductor substrates such as silicon substrates, as well as FO-WLP, WLCSP (Wafer Level Chip Scale Package), FI-WLP (Fan In Wafer Level Package), glass substrates, glass epoxy substrates such as FR-4 substrates, polyester substrates, polyimide substrates, BT resin substrates, and polyphenylene ether substrates. The insulating layer 14 is not particularly limited as long as it contains an inorganic material, and may contain an inorganic material and a thermoplastic resin or a thermosetting resin. If the insulating layer 14 contains a thermosetting resin, the insulating layer 14 may also contain a cured product of the thermosetting resin. The insulating layer 14 may include, for example, at least one selected from the group consisting of polyimide resin, acrylic resin, epoxy resin, and poly(p-phenylenebenzobisoxazole). The insulating layer 14 is preferably a cured epoxy resin composition because it offers a good balance of electrical properties, moisture resistance, heat resistance, mechanical properties, and adhesive properties. Details of the epoxy resin composition will be described later.

[0018] From the viewpoint of ensuring insulation, the average thickness of the insulating layer 14 is preferably 5 μm or more, more preferably 10 μm or more, and even more preferably 20 μm or more. From the viewpoint of thinning the semiconductor device, the average thickness of the insulating layer 14 is preferably 200 μm or less, more preferably 100 μm or less, and even more preferably 50 μm or less. The average thickness of the insulating layer 14 is preferably 5 μm to 200 μm, more preferably 10 μm to 100 μm, and even more preferably 20 μm to 50 μm.

[0019] When the insulating layer 14 is composed of a cured epoxy resin composition, the composition of the epoxy resin composition is not particularly limited, but an epoxy resin composition that is solid at 25°C is preferred. The epoxy resin composition contains, for example, an epoxy resin, a curing agent, and an inorganic material, and may contain other components as needed.

[0020] The epoxy resin composition contains an epoxy resin. The type of epoxy resin is not particularly limited as long as it has two or more epoxy groups in one molecule. Specifically, novolac-type epoxy resins (phenol novolac-type epoxy resins, orthocresol novolac-type epoxy resins, etc.) are obtained by condensing or co-condensing a novolac resin obtained by condensing or co-condensing a novolac resin obtained by phenol compounds selected from the group consisting of phenol compounds such as phenol, cresol, xylenol, resorcinol, catechol, bisphenol A, bisphenol F, and naphthol compounds such as α-naphthol, β-naphthol, and dihydroxynaphthalene under an acidic catalyst with an aliphatic aldehyde compound such as formaldehyde, acetaldehyde, or propionaldehyde, and then epoxidizing the novolac resin. Copolymer epoxy resins that have been modified; diphenylmethane type epoxy resins which are diglycidyl ethers of bisphenol A, bisphenol F, etc.; biphenyl type epoxy resins which are diglycidyl ethers of alkyl-substituted or unsubstituted biphenols; stilbene type epoxy resins which are diglycidyl ethers of stilbene-based phenol compounds; sulfur atom-containing epoxy resins which are diglycidyl ethers of bisphenol S, etc.; epoxy resins which are glycidyl ethers of alcohols such as butanediol, polyethylene glycol, and polypropylene glycol; glycidyl ester type epoxy resins which are glycidyl esters of polycarboxylic acid compounds such as phthalic acid, isophthalic acid, and tetrahydrophthalic acid; glycidylamine type epoxy resins in which the active hydrogen bonded to the nitrogen atom of aniline, diaminodiphenylmethane, isocyanuric acid, etc. is substituted with a glycidyl group; dicyclopentadiene type epoxy resins which are epoxidized from a co-condensation resin of dicyclopentadiene and a phenol compound;Alicyclic epoxy resins such as vinylcyclohexene diepoxide, 3,4-epoxycyclohexylmethyl-3,4-epoxycyclohexanecarboxylate, and 2-(3,4-epoxy)cyclohexyl-5,5-spiro(3,4-epoxy)cyclohexane-m-dioxane, which have epoxidized olefin bonds within the molecule; paraxylylene-modified epoxy resins, which are glycidyl ethers of paraxylylene-modified phenol resins; metaxylylene-modified epoxy resins, which are glycidyl ethers of metaxylylene-modified phenol resins; terpene-modified epoxy resins, which are glycidyl ethers of terpene-modified phenol resins; and dicyclopentadiene-modified phenol resins, which are glycidyl ethers of dicyclopentadiene-modified phenol resins. Examples of epoxy resins include: pentadiene-modified epoxy resins; cyclopentadiene-modified epoxy resins, which are glycidyl ethers of cyclopentadiene-modified phenolic resins; polycyclic aromatic ring-modified epoxy resins, which are glycidyl ethers of polycyclic aromatic ring-modified phenolic resins; naphthalene-type epoxy resins, which are glycidyl ethers of naphthalene ring-containing phenolic resins; halogenated phenol novolac-type epoxy resins; hydroquinone-type epoxy resins; trimethylolpropane-type epoxy resins; linear aliphatic epoxy resins obtained by oxidizing olefin bonds with peracids such as peracetic acid; and aralkyl-type epoxy resins, which are epoxidized aralkyl-type phenolic resins such as phenol aralkyl resins and naphthol aralkyl resins. Furthermore, epoxides of silicone resins and aminophenol-type epoxy resins, which are glycidyl ethers of aminophenols, can also be cited as epoxy resins. These epoxy resins may be used individually or in combination of two or more types.

[0021] The epoxy resin compositions used in this disclosure contain a curing agent. The type of curing agent is not particularly limited, as long as it is a compound that undergoes a curing reaction with the epoxy resin used in combination. For example, examples of curing agents used in combination with epoxy resins include phenolic curing agents, amine curing agents, acid anhydride curing agents, polymercaptan curing agents, polyaminoamide curing agents, isocyanate curing agents, and blocked isocyanate curing agents. One type of curing agent may be used alone, or two or more types may be used in combination. The curing agent may be solid or liquid at room temperature and pressure (e.g., 25°C, atmospheric pressure), but it is preferable to be solid. From the viewpoint of heat resistance, phenolic curing agents or amine curing agents are preferred. Examples of phenolic curing agents include phenolic resins and polyhydric phenolic compounds having two or more phenolic hydroxyl groups in one molecule.Specifically, polyhydric phenolic compounds such as resorcinol, catechol, bisphenol A, bisphenol F, and substituted or unsubstituted biphenols; novolac-type phenolic resins obtained by condensing or co-condensing at least one phenolic compound selected from the group consisting of phenolic compounds such as phenol, cresol, xylenol, resorcinol, catechol, bisphenol A, bisphenol F, phenylphenol, aminophenol, and naphthol compounds such as α-naphthol, β-naphthol, and dihydroxynaphthalene, with aldehyde compounds such as formaldehyde, acetaldehyde, and propionaldehyde under an acidic catalyst; and phenols synthesized from the above phenolic compounds with dimethoxyp-xylene, bis(methoxymethyl)biphenyl, etc. Examples of phenolic resins include aralkyl resins such as aralkyl resins and naphthol aralkyl resins; paraxylylene-modified phenolic resins; metaxylylene-modified phenolic resins; melamine-modified phenolic resins; terpene-modified phenolic resins; dicyclopentadiene-type phenolic resins and dicyclopentadiene-type naphthol resins synthesized by copolymerization of the above phenolic compounds with dicyclopentadiene; cyclopentadiene-modified phenolic resins; polycyclic aromatic ring-modified phenolic resins; biphenyl-type phenolic resins; triphenylmethane-type phenolic resins obtained by condensation or co-condensation of the above phenolic compounds with aromatic aldehyde compounds such as benzaldehyde and salicylaldehyde under an acidic catalyst; and phenolic resins obtained by copolymerizing two or more of these. Furthermore, monovalent phenolic compounds having one phenolic hydroxyl group in one molecule can also be used as phenolic curing agents. These phenolic curing agents may be used individually or in combination of two or more types.

[0022] Examples of amine-based curing agents include aliphatic amine compounds such as diethylenetriamine, triethylenetetramine, n-propylamine, 2-hydroxyethylaminopropylamine, cyclohexylamine, and 4,4'-diamino-dicyclohexylmethane; aromatic amine compounds such as diethyltoluenediamine, 3,3'-diethyl-4,4'-diaminodiphenylmethane, dimethylthiotoluenediamine, and 2-methylaniline; and imidazoline compounds such as imidazoline, 2-methylimidazoline, and 2-ethylimidazoline. Among these, aromatic amine compounds are preferred from the viewpoint of storage stability, and diethyltoluenediamine, 3,3'-diethyl-4,4'-diaminodiphenylmethane, and dimethylthiotoluenediamine are more preferred.

[0023] The functional group equivalent of the curing agent (hydroxyl group equivalent in the case of phenol curing agents, and active hydrogen equivalent in the case of amine curing agents) is not particularly limited. From the viewpoint of balancing various properties such as moldability, heat resistance, and electrical reliability, it is preferably 10 g / eq to 1000 g / eq, and more preferably 30 g / eq to 500 g / eq. In the case of phenol curing agents, the hydroxyl group equivalent refers to the value calculated based on the hydroxyl value measured in accordance with JIS K0070:1992. In the case of amine curing agents, the active hydrogen equivalent refers to the value calculated based on the amine value measured in accordance with JIS K7237:1995.

[0024] In epoxy resin compositions, if the curing agent includes a phenolic curing agent, the epoxy resin composition may or may not include a curing accelerator. The type of curing accelerator is not particularly limited and can be selected according to the type of epoxy resin, the desired properties of the epoxy resin composition, etc. The curing accelerator is not particularly limited. For example, the curing accelerator may be at least one selected from the group consisting of amine-based curing accelerators, imidazole-based curing accelerators, urea-based curing accelerators, and phosphorus-based curing accelerators. Examples of amine-based curing accelerators include 1,8-diazabicyclo[5.4.0]-7-undecene and 1,5-diazabicyclo[4.3.0]-5-nonene. Examples of imidazole-based curing accelerators include 2-phenyl-4-methylimidazole, 2-ethyl-4-methylimidazole, 1-cyanoethyl-2-ethyl-4-methylimidazole, 2-methylimidazole, 1-cyanoethyl-2-phenylimidazole, 1-cyanoethyl-2-phenylimidazolium trimellitate, and 2-phenyl-4-methyl-5-hydroxymethylimidazole. Examples of urea-based curing accelerators include 3-phenyl-1,1-dimethylurea. Examples of phosphorus-based curing accelerators include triphenylphosphine and its addition products, diphenyl(p-tolyl)phosphine, tris(alkylphenyl)phosphine, tris(alkoxyphenyl)phosphine, tris(alkylalkoxyphenyl)phosphine, tris(dialkylphenyl)phosphine, tris(trialkylphenyl)phosphine, tris(tetraalkylphenyl)phosphine, tris(dialkoxyphenyl)phosphine, tris(trialkoxyphenyl)phosphine, tris(tetraalkoxyphenyl)phosphine, trialkylphosphine, dialkylarylphosphine, alkyldiarylphosphine, (4-hydroxyphenyl)diphenylphosphine, bis(4-hydroxyphenyl)phenylphosphine, tris(4-hydroxyphenyl)phosphine, and the like.

[0025] When the epoxy resin composition contains a curing accelerator, the content of the curing accelerator is preferably 0.1% by mass to 8% by mass, more preferably 0.3% by mass to 6% by mass, and even more preferably 0.5% by mass to 5% by mass, based on the total amount of the epoxy resin and the curing agent.

[0026] The epoxy resin composition used in the present disclosure may contain at least one of a glass cloth and an inorganic filler as an inorganic material. When the epoxy resin composition contains a glass cloth, the average thickness of the glass cloth is not particularly limited and is appropriately set in view of the average thickness of the insulating layer 14. The average thickness of the glass cloth is preferably, for example, 30 μm to 80 μm, and more preferably 35 μm to 50 μm.

[0027] The total volume of the gaps between the weaves of the glass cloth is 20 cm 3 / m 2 ~70 cm 3 / m 2 may be, 24 cm 3 / m 2 ~60 cm 3 / m 2 may be, 24 cm 3 / m 2 ~56 cm 3 / m 2 may be.

[0028] The glass cloth used in the present disclosure may be surface-treated. Examples of the surface treatment method of the glass cloth include treatment with a silane coupling agent. A part of the glass cloth may be made of fibers composed of an organic material. The fibers composed of an organic material that constitute a part of the glass cloth are not particularly limited, and examples include fibers such as aramid, polyamide, polyimide, and polyester. When using some fibers composed of an organic material, they may be used as warp threads, weft threads, or both. When some fibers composed of an organic material are used in the glass cloth, the proportion of the fibers composed of an organic material in the glass cloth is preferably 0.1% by mass to 0.2% by mass.

[0029] When the epoxy resin composition contains an inorganic filler, the type of the inorganic filler is not particularly limited. Specifically, examples of the inorganic filler include silica such as spherical silica and crystalline silica, glass, alumina, calcium carbonate, zirconium silicate, calcium silicate, silicon nitride, aluminum nitride, boron nitride, aluminum nitride, boehmite, beryllia, magnesium oxide, zirconia, zircon, forsterite, steatite, spinel, mullite, titania, talc, clay, mica, titanate and other inorganic materials. An inorganic filler having a flame retardant effect may be used. Examples of the inorganic filler having a flame retardant effect include composite metal hydroxides such as aluminum hydroxide, magnesium hydroxide, and composite hydroxide of magnesium and zinc, and zinc borate. Among them, spherical silica is preferable from the viewpoint of reducing the linear expansion coefficient, and alumina is preferable from the viewpoint of high thermal conductivity. The inorganic filler may be used alone or in combination of two or more. Examples of the state of the inorganic filler include powder, beads obtained by spheroidizing the powder, fibers, and the like.

[0030] The average particle diameter of the inorganic filler is not particularly limited. For example, the volume average particle diameter is preferably 30 μm or less, more preferably 0.1 μm to 30 μm, still more preferably 0.2 μm to 25 μm, and particularly preferably 0.5 μm to 20 μm. When the volume average particle diameter is 30 μm or less, the filling property tends to be improved. Further, when the volume average particle diameter is 0.1 μm or more, the increase in the viscosity of the epoxy resin composition tends to be more suppressed. The volume average particle diameter of the inorganic filler can be measured as the volume average particle diameter (D50) by a laser diffraction scattering method particle size distribution measuring device.

[0031] From the viewpoint of the fluidity of the epoxy resin composition, the particle shape of the inorganic filler is preferably spherical rather than angular, and the particle size distribution of the inorganic filler is preferably widely distributed.

[0032] The content rate of the inorganic material in the epoxy resin composition is not particularly limited. From the viewpoint of the strength of the insulating layer 14, it is preferably 30% by volume or more, more preferably 30% by volume to 90% by volume, and still more preferably 60% by volume to 88% by volume of the total solid content of the epoxy resin composition. When the content rate of the inorganic material is 30% by volume or more of the total solid content of the epoxy resin composition, the properties such as the thermal expansion coefficient, thermal conductivity, and elastic modulus of the cured product tend to be further improved. When the content rate of the inorganic material is 90% by volume or less of the total solid content of the epoxy resin composition, the thermosetting property of the epoxy resin composition tends to be ensured.

[0033] (Colorant) The epoxy resin composition used in the present disclosure may contain a colorant. Examples of the colorant include known colorants such as carbon black, black titanium oxide, organic dyes, organic pigments, red lead, and red iron oxide. The content rate of the colorant can be appropriately selected according to the purpose and the like. The colorant may be used alone or in combination of two or more kinds.

[0034] When the epoxy resin composition contains a colorant, the content rate is preferably 0.01% by mass to 5% by mass, and more preferably 0.05% by mass to 3% by mass.

[0035] (Ion exchanger) The epoxy resin composition used in the present disclosure may contain an ion exchanger. In particular, from the viewpoint of improving the moisture resistance and high-temperature storage characteristics of the semiconductor device, it is preferable to contain an ion exchanger. The ion exchanger is not particularly limited, and conventionally known ones can be used. Specifically, for example, hydrotalcite compounds and hydrated oxides of at least one element selected from the group consisting of magnesium, aluminum, titanium, zirconium, and bismuth can be mentioned. The ion exchanger may be used alone or in combination of two or more kinds. Among them, hydrotalcite represented by the following general formula (A) is preferable.

[0036] Mg (1-X) Al X (OH) 2 (CO 3 ) X/2 · mH 2O ……(A) (0 < X ​​≤ 0.5, m is a positive number)

[0037] If the epoxy resin composition contains an ion exchanger, the amount is not particularly limited as long as it is sufficient to capture ions such as halogen ions. For example, it is preferably 0.1 to 30 parts by mass, and more preferably 1 to 5 parts by mass, per 100 parts by mass of epoxy resin.

[0038] (Release Agent) The epoxy resin composition used in this disclosure may contain a release agent from the viewpoint of obtaining good release properties. The release agent is not particularly limited and conventionally known ones can be used. Specifically, examples include carnauba wax, higher fatty acids such as montanic acid and stearic acid, higher fatty acid metal salts, ester waxes such as montanic acid esters, and polyolefin waxes such as oxidized polyethylene and non-oxidized polyethylene. One type of release agent may be used alone or two or more types may be used in combination.

[0039] When the epoxy resin composition contains a release agent, the amount is preferably 0.01 to 15 parts by mass, and more preferably 0.1 to 10 parts by mass, per 100 parts by mass of epoxy resin. When the amount of release agent is 0.01 parts by mass or more per 100 parts by mass of epoxy resin, sufficient release properties tend to be obtained. When the amount of release agent is 15 parts by mass or less per 100 parts by mass of epoxy resin, better adhesion tends to be obtained.

[0040] (Flame retardant) The epoxy resin composition used in this disclosure may contain a flame retardant. The flame retardant is not particularly limited and conventionally known ones can be used. Specifically, examples include organic or inorganic compounds containing halogen atoms, antimony atoms, nitrogen atoms, or phosphorus atoms, metal hydroxides, etc. The flame retardant may be used alone or in combination of two or more types.

[0041] If the epoxy resin composition contains a flame retardant, the amount is not particularly limited as long as it is sufficient to obtain the desired flame retardant effect. For example, it is preferably 1 to 30 parts by mass, and more preferably 2 to 20 parts by mass, per 100 parts by mass of epoxy resin.

[0042] (Stress Relief Agent) The epoxy resin composition used in this disclosure may contain a stress relief agent such as silicone rubber particles. By including a stress relief agent in the epoxy resin composition, warping deformation of the insulating layer and the occurrence of cracks in the insulating layer can be further reduced. Examples of stress relief agents include commonly used known stress relief agents (flexible agents). Specifically, examples include thermoplastic elastomers such as silicone-based, styrene-based, olefin-based, urethane-based, polyester-based, polyether-based, polyamide-based, and polybutadiene-based materials, which may be epoxy-modified; rubber particles such as NR (natural rubber), NBR (acrylonitrile-butadiene rubber), acrylic rubber, urethane rubber, and silicone powder; rubber particles having a core-shell structure such as methyl methacrylate-styrene-butadiene copolymer (MBS), methyl methacrylate-silicone copolymer, and methyl methacrylate-butyl acrylate copolymer; and indene-containing copolymers, which are copolymer resins of indenes such as indene and alkylindene, styrenes such as styrene and alkylstyrene, and other monomers used as needed. One type of stress relief agent may be used alone, or two or more types may be used in combination.

[0043] If the epoxy resin composition contains a stress-relaxing agent, its content is preferably 0.1 to 30 parts by mass, and more preferably 1 to 25 parts by mass, per 100 parts by mass of epoxy resin.

[0044] (Coupling Agent) The epoxy resin composition used in this disclosure may contain a coupling agent. The type of coupling agent is not particularly limited, and known coupling agents can be used. Examples of coupling agents include silane coupling agents and titanium coupling agents. One type of coupling agent may be used alone, or two or more types may be used in combination.

[0045] When the epoxy resin composition contains a coupling agent, the content of the coupling agent is preferably 0.001 to 10 parts by mass, more preferably 0.01 to 8 parts by mass, and even more preferably 0.05 to 5 parts by mass, per 100 parts by mass of the inorganic filler, from the viewpoint of adhesion at the interface between the epoxy resin and the inorganic filler.

[0046] The method for forming an insulating layer 14 on a semiconductor substrate 10 using an epoxy resin composition is not particularly limited. If the epoxy resin composition contains an inorganic filler as an inorganic material, a solvent may be added to the epoxy resin composition to prepare a liquid epoxy resin composition, and the liquid epoxy resin composition may be applied to the semiconductor substrate 10 using a bar coating method, a spin coating method, or the like, and dried to form the insulating layer 14. Alternatively, an adhesive film including a support and an epoxy resin composition layer provided on the support may be laminated onto the semiconductor substrate 10 such that the epoxy resin composition layer is in contact with the semiconductor substrate 10 to form the insulating layer 14.

[0047] As a support, there are no particular restrictions on its shape or material, as long as an epoxy resin composition layer can be formed on it, and metal foil or resin film is preferred. Examples of metal foil include copper foil, aluminum foil, nickel foil, etc. As for resin film, plastic films such as polyethylene terephthalate film, polyimide film, polyethylene film, polypropylene film, polytetrafluoroethylene film, polymethylpentene film, polyamideimide film, polyetherimide film, polyethersulfone film, all aromatic polyester film, polytetrafluoroethylene film, ethylene-tetrafluoroethylene copolymer film, tetrafluoroethylene-hexafluoropropylene copolymer film, and tetrafluoroethylene-perfluoroalkyl vinyl ether copolymer film can be used, and these plastic films can also be used after their surfaces have been released.

[0048] Alternatively, an epoxy resin composition may be applied to a support and dried to form an epoxy resin composition layer, after which a protective film may be laminated on the epoxy resin composition layer. Providing a protective film on the epoxy resin composition layer improves the handling properties of the adhesive film. The same type of protective film as the support can be used. Among these, when the adhesive film is wound up by a highly productive roll coating method, polyolefin films such as polyethylene film and polypropylene film, which are more flexible than polyethylene terephthalate film, are suitable as protective films.

[0049] Known methods can be used to apply the epoxy resin composition to the support, including dip coating, flow coating, spin coating, curtain coating, knife coating, roll coating, wire bar coating, doctor blade coating, comma blade coating, spray coating, ultrasonic coating, inkjet coating, die coating, gravure coating, screen printing, trowel application, brush application, and sponge application. Among these, the comma blade coating or kiss-touch roll coating method is preferred because it offers high productivity and enables precise coating with uniform thickness.

[0050] There are no particular restrictions on the drying temperature of the epoxy resin composition applied to the support. When a varnish-like epoxy resin composition is obtained by dissolving or dispersing each component in an organic solvent, drying at a temperature 10°C to 50°C lower than the boiling point of the organic solvent used is preferable from the viewpoint of suppressing the generation of bubbles in the adhesive film due to foaming of the organic solvent during drying. In this sense, the drying temperature is preferably 15°C to 45°C lower than the boiling point of the organic solvent, and more preferably 20°C to 40°C lower.

[0051] When the epoxy resin composition contains glass cloth as an inorganic material, the epoxy resin composition may be a prepreg. The method for producing the prepreg is not particularly limited, and may be, for example, a method in which a film-like epoxy resin composition (hereinafter also called "resin film") is laminated to both sides of the glass cloth (hereinafter also called the "lamination method"), or a method in which the glass cloth is immersed in an epoxy resin composition diluted with an organic solvent (hereinafter also called "resin varnish") and then dried (hereinafter also called the "immersion method").

[0052] The resin film used in the lamination method can be manufactured in the same manner as the adhesive film described above. Next, a method for laminating the resin film to both sides of a fiber substrate will be described. First, two resin films with supports are prepared and placed on both sides of the fiber substrate, with the resin film in contact with the fiber substrate. Then, the placed resin films with supports are laminated to the fiber substrate to impregnate it with the resin film. The lamination method is not particularly limited; for example, roll lamination may be used, or press lamination using a hot plate may be used. After the resin film has been impregnated into the fiber substrate, it can be cooled as needed, and then the supports can be peeled off from the resulting prepreg with supports to obtain a prepreg of the epoxy resin composition.

[0053] Examples of resin varnishes used in the immersion method include those similar to the liquid epoxy resin compositions used to produce resin films in the lamination method described above. The drying temperature and drying time after immersing the fiber substrate in the resin varnish are not particularly limited and can be set appropriately considering the type of organic solvent, etc.

[0054] Lamination of the semiconductor substrate 10 with a prepreg or adhesive film may be carried out by a vacuum lamination method. In the vacuum lamination method, the heat-pressure temperature is preferably 60°C to 160°C, and more preferably 80°C to 140°C. The pressure is preferably 0.1 MPa to 2 MPa, and more preferably 0.3 MPa to 1.5 MPa. The pressure is preferably 10 seconds to 500 seconds, and more preferably 20 seconds to 400 seconds. Lamination is preferably carried out under reduced pressure conditions of 30 hPa or less.

[0055] The curing conditions for the epoxy resin composition layer are not particularly limited. The heat treatment temperature is preferably 120°C to 200°C, more preferably 130°C to 180°C, and even more preferably 140°C to 170°C. The heat treatment time is preferably 5 minutes to 3 hours, and more preferably 10 minutes to 2 hours. By curing the epoxy resin composition layer, an insulating layer 14 is formed on the semiconductor substrate 10. Other methods for forming the insulating layer 14 on the semiconductor substrate 10 may include transfer molding, injection molding, compression molding, etc., which are methods for sealing electronic component devices using epoxy resin compositions.

[0056] Figure 2 is a cross-sectional view showing a state in which a metal mask layer 16 is provided on the surface of an insulating layer 14. The method for forming the metal mask layer 16 on the surface of the insulating layer 14 is not particularly limited and may be either a dry method or a wet method, which is appropriately selected depending on the type of metal constituting the metal mask layer 16. Examples of metals constituting the metal mask layer 16 include copper, copper alloys, and titanium. Examples of dry metal deposition methods include vacuum deposition and sputtering as physical methods, and chemical vapor deposition (CVD) as a chemical method. Vacuum deposition is a method in which a film deposition material is heated and evaporated by resistance heating or electron gun irradiation to form a thin film on an object. Sputtering is a method in which a voltage is applied between the anode and cathode to ionize an inert gas such as Ar, and the inert gas ions collide with a target material placed on the cathode side to scatter the target material, and the scattered target material is laminated onto an object placed on the anode side. Examples of wet methods include electroless plating and electrolytic plating. Electroless plating and electrolytic plating may be combined. The metal mask layer is preferably formed by at least one selected from the group consisting of metal vapor deposition, electroless plating, and electroplating. The metal mask layer may consist of one layer or two or more layers. If the metal mask layer consists of two or more layers, the types of metals contained in each layer may be the same or different.

[0057] The average thickness of the metal mask layer 16 is preferably 1.0 μm or less, more preferably 0.1 μm to 1.0 μm, and even more preferably 0.1 μm to 0.5 μm. When the metal mask layer 16 is composed of two or more layers, the average thickness of the metal mask layer 16 refers to the average thickness of the entire metal mask layer 16 composed of two or more layers.

[0058] The surface of the insulating layer 14 may be roughened before forming the metal mask layer 16. The method of roughening the insulating layer 14 is not particularly limited and may be a dry method or a wet method. Dry roughening methods include mechanical polishing such as buffing and sandblasting, grinding using grinding wheels, etc. 4 Gas, SF 6Examples include plasma etching using gases, etc. Wet roughening methods include chemical treatment using oxidizing agents such as permanganate, dichromate, ozone, hydrogen peroxide / sulfuric acid, nitric acid, strong bases, and resin swelling solvents. The wet roughening method may also be the wet desmear treatment described later. The surface of the insulating layer 14 is preferably roughened by at least one selected from the group consisting of grinding, chemical treatment, and plasma etching.

[0059] The surface roughness Ra of the roughened insulating layer 14 is preferably 0.1 μm to 2.0 μm, more preferably 0.2 μm to 0.5 μm, even more preferably 0.2 μm to 0.4 μm, and particularly preferably 0.2 μm to 0.3 μm. In this disclosure, the surface roughness Ra refers to a value measured in accordance with JIS B0601:2013.

[0060] Next, a known dry film resist (DFR) is laminated onto the metal mask layer 16. The type of DFR and the lamination method are not particularly limited, and known materials and methods can be applied.

[0061] Figure 3 is a cross-sectional view showing a state in which a dry film resist 18 is laminated onto a metal mask layer 16. In Figure 3, a portion of the dry film resist 18 is removed by photolithography to create an opening 20. The opening 20 can be formed by a standard method, for example, by irradiating the laminated DFR with ultraviolet light through a photomask to photo-cure the irradiated area, and then developing the DFR with a developer to remove the unexposed portion of the DFR. The position of the opening 20 is the same as the position where the through-holes are provided in the insulating layer 14.

[0062] Figure 4 is a cross-sectional view showing a state in which a part of the metal mask layer 16 has been etched to form an opening 22. The position of the opening 22 is the same as the position where the through-hole is provided in the insulating layer 14, depending on the position where the through-hole is provided. The etching method for the metal mask layer 16 is not particularly limited and includes wet etching, which involves immersion in an etching solution, and dry etching, such as plasma etching. For wet etching, an acidic or alkaline etching solution can be appropriately selected depending on the object to be etched. After forming the opening 22 in the metal mask layer 16, it is preferable to remove the remaining dry film resist 18. The method for removing the dry film resist 18 is not particularly limited and includes methods of removal by chemical treatment, with a method of removal using a removal solution being preferred. Examples of removal solutions include a removal solution obtained by dissolving an inorganic alkaline component or an organic alkaline component in water, dimethyl sulfoxide, N-methylpyrrolidone, or a mixture thereof. Examples of inorganic alkaline components include sodium hydroxide and potassium hydroxide. Examples of organic alkaline components include primary amine compounds, secondary amine compounds, tertiary amine compounds, and quaternary ammonium salt compounds. The dry film resist 18 can be removed using a removal solution, and known methods such as the spray method, shower method, or paddle method can be applied.

[0063] Figure 5 shows a state in which a laser beam L with a diameter larger than the diameter of the opening 22 is irradiated onto the opening 22 of a metal mask layer 16 in which the opening 22 is formed. By irradiating the opening 22 with a laser beam L with a diameter larger than the diameter of the opening 22, the metal mask layer 16 functions as a protective film (metal mask) for the insulating layer 14, and the diameter of the opening provided in the insulating layer 14 can be made to be approximately the same size as the diameter of the opening 22. The ratio of the diameter of the laser beam L (beam spot diameter) to the diameter of the opening 22 is preferably greater than 1.0 and 10.0 or less, more preferably greater than 1.0 and 5.0 or less, and even more preferably greater than 1.0 and 2.0 or less.

[0064] Types of laser light include carbon dioxide laser light (CO2). 2Examples include laser light, UV laser light, etc. Among these, CO 2 Laser light is preferred. 2 The beam spot diameter of a laser beam is generally 40 μm or larger. On the other hand, the beam spot diameter of a UV laser beam is generally 10 μm or larger. Thus, CO 2 Because the beam spot diameter of the laser light is larger compared to UV laser light, CO 2 Laser light is generally unsuitable for small-diameter via formation. However, by using the metal mask layer 16 as a metal mask, CO 2 Even when using laser light, it becomes possible to form vias with a relatively small diameter.

[0065] The wavelength, pulse count, pulse width, and output of the laser light are not particularly limited. For example, when the etching amount in the thickness direction of the metal mask layer 16 per laser shot is X μm, the thickness of the metal mask layer 16 is Z μm, and the number of laser light irradiations for forming through holes is M, it is preferable that the following relationship expressed by equation (1) holds: X × M < Z Equation (1) By adjusting the wavelength, pulse count, pulse width, and output of the laser light to satisfy the relationship expressed by equation (1), small diameter vias can be easily formed. The number of laser light irradiations M for forming through holes is set appropriately in consideration of the wavelength, pulse width, and output of the laser light, the components of the insulating layer, the thickness of the insulating layer, etc.

[0066] Figure 6 is a cross-sectional view showing a state in which through holes 24 are provided on the surface of the insulating layer 14. The average diameter of the through holes 24 is set in view of the intended use of the semiconductor device, but may be, for example, 5 μm to 10 μm. In the semiconductor device manufacturing method of this disclosure, even if carbon dioxide laser light is used as the laser light, it is possible to form through holes with a diameter smaller than the beam spot diameter of the carbon dioxide laser light (approximately 40 μm or more). The average diameter of the through holes 24 refers to the value obtained by observing the through holes 24 with an electron microscope and taking the average value of 10 through holes 24. If the through holes 24 have a tapered shape with a smaller lower diameter than the upper diameter, the diameter of the through holes 24 is the average of the top diameter and bottom diameter of the through holes 24.

[0067] The aspect ratio of the through-hole 24 is set in consideration of the intended use of the semiconductor device, but may be, for example, 1.0 to 5.0. The aspect ratio of the through-hole 24 is determined as the ratio of the average thickness of the insulating layer 14 to the average diameter of the through-hole 24 (thickness / diameter). The method for measuring the average diameter and average thickness of the through-hole 24 is as described above.

[0068] Next, a wiring layer is formed on the insulating layer 14. The wiring layer can be formed using a known metal pattern formation method in the field of printed circuit boards, such as the subtractive method or the semi-additive method. When forming the wiring layer on the insulating layer 14, the wiring layer may be formed after removing the metal mask layer 16, or the wiring layer may be formed on the metal mask layer 16 by the method described above. When forming the wiring layer on the metal mask layer 16, the metal mask layer 16 constitutes a part of the wiring layer. By forming the wiring layer on the insulating layer 14, a wiring layer is also formed on the side of the through hole 24. The wiring layer on the side of the through hole 24 functions as a conductor present within the through hole 24. Examples of metals that constitute the wiring layer include copper, titanium, silver, gold, and alloys thereof. By repeating the formation of the insulating layer 14 and the wiring layer, a multilayer wiring is formed in which adjacent wiring layers are electrically connected via the insulating layer 14 through conductors in the through hole 24.

[0069] <Method for Manufacturing Printed Wiring Boards> The method for manufacturing a semiconductor device of this disclosure can also be applied to the manufacture of printed wiring boards. That is, the method for manufacturing a printed wiring board of this disclosure is a method for manufacturing a printed wiring board having multilayer wiring in which wiring layers and insulating layers containing an inorganic material are alternately stacked, and adjacent wiring layers in the stacking direction are electrically connected via conductors present in through holes provided in the insulating layers, wherein the multilayer wiring is formed by providing an insulating layer on a substrate, providing a metal mask layer on the surface of the insulating layer having openings corresponding to the positions of the through holes, and irradiating the openings with laser light having a diameter larger than the diameter of the openings to form through holes in the insulating layer. In the method for manufacturing a printed wiring board of this disclosure, for example, a printed wiring board as a multilayer wiring board can be obtained by forming multilayer wiring in the same manner except that the semiconductor substrate 10 in Figure 1 is changed to a core substrate. Examples of core substrates include glass epoxy substrates such as FR-4 substrates, polyester substrates, polyimide substrates, BT resin substrates, and polyphenylene ether substrates.

[0070] <Semiconductor Device> The semiconductor device of this disclosure comprises semiconductor elements and multilayer wiring in which wiring layers and insulating layers are alternately stacked and electrically connected to the semiconductor elements. In the stacking direction, adjacent wiring layers are electrically connected via the insulating layer through conductors present in through holes provided in the insulating layer. The insulating layer contains an inorganic material, and the average diameter of the through holes is 10 μm or less. Because the insulating layer contains an inorganic material and the average diameter of the through holes is 10 μm or less, the semiconductor device of this disclosure has high wiring density and excellent reliability. The average diameter of the through holes may be 5 μm to 10 μm. The method for forming the multilayer wiring of the semiconductor device and the materials used for forming the multilayer wiring are not particularly limited and are the same as in the case of the manufacturing method of the semiconductor device of this disclosure, and preferred examples are also the same. The semiconductor elements are not particularly limited and include, for example, active elements such as semiconductor chips, transistors, diodes, and thyristors, and passive elements such as capacitors, resistors, and coils.

[0071] The present disclosure will be described in detail below with reference to examples, but the scope of the present disclosure is not limited to these examples.

[0072] <Reference Example 1> [Formation of Insulating Layer] An insulating layer, which is a cured epoxy resin composition (without inorganic fillers added), was molded on the side of a substrate with copper wiring formed on its surface, obtained from a copper-clad laminate (Resonac Co., Ltd., MCL-E-679FG) with a base material thickness of 0.81 mm and a copper thickness of 18 μm, using a compression molding apparatus (TOWA Corporation, CMP-1000) under the conditions of a load of 3 MPa, a pressurizing time of 600 seconds, a temperature of 150°C, and an average molding thickness of 0.1 mm.

[0073] [Formation of Metal Mask Layer] On the insulating layer obtained above, titanium and copper were deposited in that order using a sputtering apparatus (ULVAC, Inc., SIC-500) under conditions of titanium thickness of 25 nm and copper thickness of 150 nm to form a metal mask layer.

[0074] [Partial Removal of Metal Mask Layer] A dry film resist (Rezonac Co., Ltd., RD-1215) was laminated onto the surface of a metal mask layer provided on an insulating layer using a vacuum laminator (Nikko Materials Co., Ltd., CV-300) under conditions of a load of 0.5 MPa and a temperature of 60°C. Next, it was exposed using a photomask and a UV exposure machine (Mikasa Corporation, ML-320), and developed with a 1% by mass sodium carbonate aqueous solution to form φ10 μm openings at the same positions as the through holes in the insulating layer. Subsequently, the portion of the dry film resist in the metal mask layer with openings was removed using a seed etching solution (Mitsubishi Gas Chemical Co., Ltd., WLC-C2). Then, the dry film resist was peeled off using a stripping solution (Mitsubishi Gas Chemical Co., Ltd., R-100S, R-100) to obtain an insulating layer having a metal mask layer with φ10 μm openings on its surface.

[0075] [Formation of through-holes] CO2 is injected into the area where the Φ10 μm opening is formed. 2A through-hole was formed by laser processing using a laser processing machine (beam spot diameter: 30 μm) under the condition that the laser penetrated the insulating layer but not the copper wiring on the copper-clad laminate. Next, the metal mask layer was completely removed using a seed etching solution (Mitsubishi Gas Chemical Co., Ltd., WLC-C2). Figure 7 shows an SEM image of the obtained through-hole. The top diameter and bottom diameter of this through-hole were 13.2 μm and 7.0 μm, respectively.

[0076] <Reference Example 2> [Formation of Insulating Layer] An insulating layer, which is a cured epoxy resin composition (without inorganic fillers added), was molded on the side of a substrate with copper wiring formed on its surface, obtained from a copper-clad laminate (Resonac Co., Ltd., MCL-E-679FG) with a base material thickness of 0.81 mm and a copper thickness of 18 μm, using a compression molding device (TOWA Corporation, CMP-1000) under the conditions of a load of 3 MPa, a pressurizing time of 600 seconds, a temperature of 150°C, and an average molding thickness of 0.1 mm.

[0077] [Through-hole formation] CO 2 A through-hole was formed by laser processing using a laser processing machine (beam spot diameter: 30 μm) under the condition that the laser penetrated the insulating layer but not the copper wiring on the copper-clad laminate. Figure 8 shows an SEM image of the obtained through-hole. The top diameter and bottom diameter of this through-hole were 41.9 μm and 23.8 μm, respectively.

Claims

1. A method for manufacturing a semiconductor device having multilayer wiring, wherein wiring layers and insulating layers containing an inorganic material are alternately stacked, and adjacent wiring layers in the stacking direction are electrically connected via conductors located in through holes provided in the insulating layers, the method comprising: providing the insulating layers on a substrate; providing a metal mask layer on the surface of the insulating layers having openings corresponding to the positions of the through holes; and irradiating the openings with laser light having a diameter larger than the diameter of the openings to form the through holes in the insulating layers.

2. The method for manufacturing a semiconductor device according to claim 1, wherein the average thickness of the metal mask layer is 1.0 μm or less.

3. The method for manufacturing a semiconductor device according to claim 1 or claim 2, wherein the content of the inorganic material in the insulating layer is 30% to 90% by volume.

4. The method for manufacturing a semiconductor device according to claim 1 or claim 2, wherein the inorganic material comprises at least one of glass cloth and an inorganic filler.

5. The method for manufacturing a semiconductor device according to claim 1 or claim 2, wherein the laser light is carbon dioxide laser light.

6. The method for manufacturing a semiconductor device according to claim 1 or claim 2, wherein the ratio of the diameter of the laser beam to the diameter of the aperture is greater than 1.0 and less than or equal to 10.

0.

7. The method for manufacturing a semiconductor device according to claim 1 or claim 2, wherein the average diameter of the through-holes is 5 μm to 10 μm.

8. The method for manufacturing a semiconductor device according to claim 1 or claim 2, wherein the aspect ratio of the through hole is 1.0 to 5.

0.

9. A method for manufacturing a semiconductor device according to claim 1 or 2, wherein the etching amount in the thickness direction of the metal mask layer per laser beam shot is X μm, the thickness of the metal mask layer is Z μm, and the number of laser beam irradiations for forming the through hole is M, such that the relationship expressed by the following formula (1) holds true. X × M < Z Formula (1) 10. A method for manufacturing a semiconductor device according to claim 1 or claim 2, wherein the insulating layer comprises at least one selected from the group consisting of polyimide resin, acrylic resin, epoxy resin, and poly(p-phenylenebenzobisoxazole).

11. A semiconductor device comprising a semiconductor element and a multilayer wiring in which wiring layers and insulating layers are alternately stacked and electrically connected to the semiconductor element, wherein adjacent wiring layers in the stacking direction are electrically connected via the insulating layer through conductors present in through holes provided in the insulating layer, the insulating layer contains an inorganic material, and the average diameter of the through holes is 10 μm or less.

12. The semiconductor device according to claim 11, wherein the content of the inorganic material in the insulating layer is 30% by volume to 90% by volume.

13. The semiconductor device according to claim 11 or claim 12, wherein the inorganic material comprises at least one of glass cloth and an inorganic filler.

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