Preparation method for mercury cadmium telluride infrared detector chip

Abstract

Disclosed in the present invention is a preparation method for a mercury cadmium telluride infrared detector chip. The method comprises the steps of: providing a substrate, which comprises a photoelectric material layer; sequentially forming a passivation layer and a dielectric layer on the photoelectric material layer; etching the dielectric layer to form a first through hole, so as to expose the passivation layer; etching the passivation layer within the first through hole to form a second through hole, so as to expose the photoelectric material layer; forming a metal layer on the photoelectric material layer side of the substrate, so as to cover the dielectric layer, the passivation layer within the first through hole and the photoelectric material layer within the second through hole; etching the metal layer to form a patterned metal electrode; and removing the dielectric layer to form a mercury cadmium telluride infrared detector chip. The preparation method for an infrared detector chip provided by the present disclosure can effectively avoid a residue of a photoresist film on a metal surface and the reaction between a solution and metal, and can also reduce the risk of leakage current through a passivation layer during the subsequent preparation process, and can thus significantly improve the electrical conductivity of a metal layer.

Description

A method for fabricating a mercury cadmium telluride infrared detector chip Technical Field

[0001] This application relates to the field of infrared detector technology, and in particular to a method for fabricating a mercury cadmium telluride infrared detector chip. Background Technology

[0002] With the continuous promotion and development of infrared applications, advanced infrared detection technology requires detectors to have higher spatial resolution and better target recognition capabilities. An infrared detector is an optoelectronic device that converts infrared radiation into electronic signals. The photoelectric reaction occurs only on the photosensitive element, while the subsequent signal processing involves only electronic technology. Therefore, the infrared detection chip is the core component of an infrared detector.

[0003] In the production process of infrared detection chips, when etching metal layers to form metal electrodes, the existing technology uses a stripping process. The part that needs to be retained is protected by a mask layer such as photoresist, and then the metal material on the photoresist is stripped off using a specific chemical solution or physical method to obtain the desired pattern. However, solvent residue may cause some damage to the substrate material, thereby affecting the product performance. Summary of the Invention

[0004] To address the problems existing in the prior art, this invention provides a method for fabricating a mercury cadmium telluride infrared detector chip.

[0005] This invention provides a method for fabricating a mercury cadmium telluride (HCd) infrared detector chip, comprising the steps of: providing a substrate including a photoelectric material layer; sequentially forming a passivation layer and a dielectric layer on the photoelectric material layer; etching the dielectric layer to form a first via, exposing the passivation layer; etching the passivation layer in the first via to form a second via, exposing the photoelectric material layer; forming a metal layer on one side of the photoelectric material layer on the substrate, covering the dielectric layer, the passivation layer in the first via, and the photoelectric material layer in the second via; etching the metal layer to form an imaged metal electrode; and removing the dielectric layer to form the HCd infrared detector chip.

[0006] Optionally, the optoelectronic material layer is a mercury cadmium telluride layer.

[0007] Optionally, the passivation layer may be made of zinc sulfide.

[0008] Optionally, the material of the dielectric layer includes silicon dioxide.

[0009] Optionally, removing the dielectric layer includes: etching the dielectric layer with a hydrofluoric acid solution.

[0010] Optionally, the metal layer includes a stacked structure of a first metal layer and a second metal layer, wherein the material of the first metal layer is platinum and the material of the second metal layer is chromium.

[0011] Optionally, etching the metal layer to form an imaged metal electrode includes the steps of: covering the metal layer with a patterned positive photoresist; and performing wet etching on the metal layer to form a patterned metal electrode.

[0012] Optionally, the wet etching of the metal layer includes: etching the first metal layer and the second metal layer by a wet etching process; wherein the etching solution for etching the first metal layer includes a solution of hydrochloric acid and water in a ratio of 1:3, and the etching solution for etching the second metal layer includes a solution of iodine and potassium iodide mixed with water in a ratio of 1:2:20.

[0013] Optionally, etching the metal layer to form an imaged metal electrode includes: etching the first metal layer and the second metal layer using a dry etching process; wherein the dry etching includes ICP etching, the power range of the ICP etching is 200-600W, the radio frequency range of the dry etching is 10-100W, and the pressure range of the dry etching is 1-10Pa.

[0014] Optionally, the gases used in the dry etching include Cl2, BCl3, and Ar, wherein the flow rate of Cl2 is in the range of 5-10 sccm, the flow rate of BCl3 is in the range of 1-3 sccm, and the flow rate of Ar is in the range of 5-10 sccm.

[0015] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0016] The present invention provides a method for fabricating a mercury cadmium telluride infrared detector chip. By forming a dielectric layer on the passivation layer, the metal layer is prevented from directly contacting the photoresist on the passivation layer. This avoids the photoresist film on the passivation layer remaining on the metal surface and the solution reacting with the metal, thereby greatly improving the conductivity between the two metal layers of the mercury cadmium telluride infrared detector chip. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 is a schematic diagram of the intermediate structure in the process of fabricating an infrared detection chip using existing technology;

[0019] Figure 2 is a schematic flowchart of a method for fabricating a mercury cadmium telluride infrared detector chip according to an embodiment of this disclosure.

[0020] Figure 3 is a schematic diagram of the first intermediate structure of a mercury cadmium telluride infrared detector chip forming process according to an embodiment of the present disclosure;

[0021] Figure 4 is a schematic diagram of the second intermediate structure of a mercury cadmium telluride infrared detector chip forming process according to an embodiment of the present disclosure;

[0022] Figure 5 is a schematic diagram of the third intermediate structure in the formation process of a mercury cadmium telluride infrared detector chip according to an embodiment of the present disclosure.

[0023] Figure 6 is a schematic diagram of the fourth intermediate structure in the formation process of a mercury cadmium telluride infrared detector chip according to an embodiment of the present disclosure. Detailed Implementation

[0024] Preferred embodiments of the invention will now be described in more detail. While preferred embodiments of the invention are described below, it should be understood that the invention can be implemented in various forms and should not be limited to the embodiments set forth herein.

[0025] In this invention, unless otherwise stated, directional terms such as "upper" and "lower" generally refer to the upper and lower parts of the device in its normal operating state, while "inner" and "outer" refer to the parts relative to the outline of the device. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first," "second," or "third" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified. Since this invention pertains to electrical devices, connection and interconnection both refer to conductive interconnections. Because the accompanying drawings describe the same device, the same reference numerals denote the same components.

[0026] As described in the background section, existing technologies employ a lift-off process to fabricate infrared detector chips. This involves protecting the desired portions with a mask layer such as photoresist, and then using specific chemical solutions or physical methods to peel off the metal material from the photoresist. However, residual chemical reagents and solvents may cause damage to the substrate material. As shown in Figure 1, in the existing infrared detector chip fabrication process, photolithography is used to form vias in the passivation layer 120, within which patterned metal electrodes 140 are formed. During etching, the vias in the passivation layer 120 are easily contaminated by solvents, forming an oxide film within the vias. Further treatment of this oxide film is required, and etching it can affect the passivation layer 120 surrounding the vias, increasing the risk of leakage. Simultaneously, during the formation of the metal electrodes, the metal layer can easily come into contact with the photoresist 160 on the surface of the passivation layer 120, thereby corroding the metal layer 140.

[0027] Therefore, this disclosure provides a method for fabricating a mercury cadmium telluride infrared detector chip, which can effectively solve the above problems and greatly improve the performance of the mercury cadmium telluride infrared detector chip.

[0028] This disclosure provides a method for fabricating a mercury cadmium telluride (HCd) infrared detector chip, comprising the steps of: providing a substrate including a photoelectric material layer; sequentially forming a passivation layer and a dielectric layer on the photoelectric material layer; etching the dielectric layer to form a first via, exposing the passivation layer; etching the passivation layer in the first via to form a second via, exposing the photoelectric material layer; forming a metal layer on one side of the photoelectric material layer on the substrate, covering the dielectric layer, the passivation layer in the first via, and the photoelectric material layer in the second via; etching the metal layer to form an imaged metal electrode; and removing the dielectric layer to form the HCd infrared detector chip.

[0029] The present invention will now be described in further detail with reference to the accompanying drawings. In addition, any substances not listed in detail in the embodiments can be any commercially available substance that can achieve the corresponding function.

[0030] This embodiment provides a method for fabricating a mercury cadmium telluride infrared detector chip. The specific steps are shown in Figure 2. Figures 3 to 6 are schematic diagrams of the intermediate structure during the formation process of the mercury cadmium telluride infrared detector chip according to this embodiment. Referring to the accompanying drawings, the method for fabricating the mercury cadmium telluride infrared detector chip includes the following steps:

[0031] S1: Provides a substrate, which includes a photoelectric material layer.

[0032] As shown in Figure 3, a substrate 100 is provided, which includes a photoelectric material layer 110. In this embodiment of the present disclosure, the substrate 100 is a zinc cadmium telluride substrate, and the photoelectric material layer 110 is a mercury cadmium telluride layer.

[0033] S2: A passivation layer and a dielectric layer are sequentially formed on the optoelectronic material layer.

[0034] As shown in Figure 3, a passivation layer 120 is first formed on the surface of the photoelectric material layer 110. The passivation layer 120 can be formed by thermal evaporation and serves as a protective layer for the cooled infrared detector device to prevent damage to the device surface during subsequent processes, thus facilitating better subsequent processes. For example, the device surface will not be contaminated or damaged during subsequent processes. In this embodiment, the material of the passivation layer 120 is preferably zinc sulfide. Next, a dielectric layer 130 is formed on the surface of the passivation layer 120. In some embodiments, the dielectric layer 130 can be formed using plasma-enhanced chemical vapor deposition. In this embodiment, the material of the dielectric layer 130 is preferably silicon dioxide. During the subsequent metal etching process, the silicon dioxide film serving as the dielectric layer 130 directly contacts the metal layer of the mercury cadmium telluride infrared detector chip, preventing the metal layer from contacting the photoresist above the passivation layer and avoiding corrosion of the metal layer by the photoresist layer above the passivation layer.

[0035] S3: Etch the dielectric layer to form a first via, exposing the passivation layer.

[0036] In this embodiment of the present disclosure, referring to FIG3, a positive first photoresist is spin-coated on the surface of the dielectric layer 130, and then exposed and developed to form a patterned first photoresist layer; then, the dielectric layer 130 is etched by relying on the masking of the patterned first photoresist layer, and a first via is formed on the dielectric layer 130 using an etching process to expose the passivation layer 120; then the patterned first photoresist layer is removed and dried with nitrogen gas. The first via is a groove structure in the device fabrication process, and the bottom of the groove is the exposed passivation layer 120.

[0037] S4: Etch the passivation layer in the first via to form a second via, exposing the photoelectric material layer.

[0038] In this embodiment, the passivation layer 120 in the first via is first etched using an overlay etching process. When etching the passivation layer 120 in the first via, only the passivation layer 120 in the central region of the first via is etched to form the second via, while the passivation layer 120 in the edge region of the first via remains unetched. The second via exposes the photoelectric material layer 110, as shown in Figure 3. During device fabrication, the second via presents a groove and mesa structure. The bottom of the groove is the exposed photoelectric material layer 110, and the sides of the groove and the mesa are the passivation layer 120. The overlay etching process can improve chip manufacturing precision, chip performance, and process efficiency.

[0039] S5: A metal layer is formed on one side of the photoelectric material layer of the substrate, covering the dielectric layer, the passivation layer in the first via, and the photoelectric material layer in the second via.

[0040] Specifically, as shown in Figure 4, a first metal layer 141 is formed on the surfaces of the dielectric layer 130, the passivation layer 120 in the first via, and the photoelectric material layer 110 in the second via using a thermal evaporation apparatus. Next, a second metal layer 142 is formed on the surface of the first metal layer 141 using the thermal evaporation apparatus. The metal layer 140, formed by the first metal layer 141 and the second metal layer 142, is used to form a metal electrode in the subsequent process.

[0041] In some embodiments, the metal layer comprises a stacked structure of a first metal layer and a second metal layer. In embodiments of this disclosure, the first metal layer is preferably made of platinum, and the second metal layer is preferably made of chromium.

[0042] S6: Etch the metal layer to form an imaged metal electrode.

[0043] Specifically, referring to Figure 5, a second photoresist, which is a positive photoresist, is first spin-coated onto the second metal layer 142. After exposure and development, a patterned second photoresist layer 150 is formed. Next, the patterned second photoresist is used to cover the second metal layer 142, thereby etching the second metal layer 142 and the first metal layer 141 to form a patterned metal electrode 140. The patterned second photoresist 150 protects the patterned metal electrode area, preventing the photoelectric material layer 110 from coming into contact with the photoresist development solvent during the photolithography process to etch excess metal layers, thus avoiding contamination of the fabricated mercury cadmium telluride infrared detector chip. Simultaneously, the patterned second photoresist protects the patterned metal electrode area, making it less likely for an oxide film to form in the second via formed in the passivation layer, preventing the risk of leakage around the passivation layer via.

[0044] In different embodiments, different etching methods can be used to form the metal electrodes. For example, in the first embodiment of this disclosure, a wet etching process is used to etch the first metal layer and the second metal layer. The etching solution for etching the first metal layer includes a solution of hydrochloric acid and water in a 1:3 ratio, and the etching solution for etching the second metal layer includes a solution of iodine and potassium iodide mixed with water in a 1:2:20 ratio.

[0045] In some other embodiments, the first and second metal layers can also be etched using a dry etching process. Specifically, when using a dry etching process, in the ICP etching process, the power range of the ICP etching is 200-600W, the radio frequency range used for the dry etching of the first and second metal layers is 10-100W, and the pressure range used for the dry etching of the first and second metal layers is 1-10Pa.

[0046] Preferably, in the second embodiment of this disclosure, a dry etching process is used to form the metal electrode, the power of the ICP etching is 400W, the radio frequency is 60W, and the pressure is 6Pa.

[0047] In some embodiments, the gases used in the dry etching include Cl2, BCl3, and Ar, wherein the flow rate of Cl2 is in the range of 5-10 sccm, the flow rate of BCl3 is in the range of 1-3 sccm, and the flow rate of Ar is in the range of 5-10 sccm. In a second embodiment of this disclosure, the flow rate of Cl2 is preferably 8 sccm, the flow rate of BCl3 is preferably 2 sccm, and the flow rate of Ar is preferably 8 sccm.

[0048] S7: Remove the dielectric layer to form the mercury cadmium telluride infrared detector chip.

[0049] In some embodiments, as shown in FIG6, the dielectric layer 130 is etched with hydrofluoric acid solution to remove the dielectric layer 130, thereby forming the mercury cadmium telluride infrared detector chip.

[0050] The method for fabricating a mercury cadmium telluride infrared detector chip disclosed herein can effectively avoid photoresist film residue on the metal surface and reaction between the solution and the metal. It also avoids the risk of leakage current in the passivation layer during subsequent fabrication processes, and can greatly improve the conductivity of the contact between the two metals.

[0051] The above description is merely an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, such as the combination of technical features between embodiments, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A method for preparing a tellurium cadmium mercury infrared detector chip, characterized in that, Including the following steps: A substrate is provided, which includes a photoelectric material layer; A passivation layer and a dielectric layer are sequentially formed on the optoelectronic material layer; The dielectric layer is etched to form a first via, exposing the passivation layer; The passivation layer in the first via is etched to form a second via, exposing the photoelectric material layer; A metal layer is formed on one side of the photoelectric material layer of the substrate, covering the dielectric layer, the passivation layer in the first via and the photoelectric material layer in the second via, wherein the metal layer includes a stacked structure of a first metal layer and a second metal layer; The metal layer is covered with patterned positive photoresist, and the metal layer is wet-etched to form a patterned metal electrode. The etching solution for etching the first metal layer includes a solution of hydrochloric acid and water in a 1:3 ratio, and the etching solution for etching the second metal layer includes a solution of iodine and potassium iodide mixed with water in a 1:2:20 ratio. The dielectric layer is removed to form the mercury cadmium telluride infrared detector chip.

2. The method of claim 1, wherein the HgCdTe infrared detector chip is prepared by the steps of: The optoelectronic material layer is a mercury cadmium telluride layer. ​ 3. The method of claim 1, wherein the HgCdTe infrared detector chip is prepared by the steps of: The passivation layer is made of zinc sulfide. ​ 4. The method of claim 1, wherein the HgCdTe infrared detector chip is prepared by the steps of: The material of the dielectric layer includes silicon dioxide. ​ 5. The method of claim 4, wherein the mercury cadmium telluride infrared detector chip is prepared by the steps of: The removal of the dielectric layer includes: etching the dielectric layer with a hydrofluoric acid solution. ​ 6. The method of claim 1, wherein the mercury cadmium telluride infrared detector chip is prepared by the steps of: The first metal layer is made of platinum, and the second metal layer is made of chromium. ​

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