Mixer and distributed mixer
By adding capacitance and a signal generation unit to control phase differences, the mixer enhances USB signal gain and reduces LSB signal gain, addressing the limitations of conventional DSB mixers in signal selectivity and bandwidth.
Patent Information
- Application Number
- PCT/JP2024/037540
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-10-22
- Publication Date
- 2026-04-30
AI Technical Summary
Conventional single balanced double sideband (DSB) mixers face challenges in selectively enhancing the conversion gain of the upper sideband (USB) signal while reducing the conversion gain of the lower sideband (LSB) signal, often resulting in insufficient removal of LSB signals due to insertion loss in high-pass filters.
The mixer incorporates a capacitance at the emitter terminals of transistors and a signal generation unit that adjusts the phase difference between LO signals to 180° or a phase offset, allowing adaptive control of conversion gains, enhancing USB signal gain and reducing LSB signal gain.
This configuration improves the conversion gain of the USB signal and reduces the LSB signal gain, achieving better signal selectivity and maintaining equivalent performance in wide bandwidths.
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Figure JP2024037540_30042026_PF_FP_ABST
Abstract
Description
Mixers and Distributed Mixers
[0001] The present invention relates to a single balanced double sideband mixer composed of differential pairs.
[0002] A mixer is an element that plays a role in frequency conversion and is essential in various fields such as optical communication and wireless communication. As an up-conversion mixer that can achieve a high conversion gain over a wide band and has a low required LO (Local Oscillator) power, there is a single balanced double sideband (DSB) mixer as shown in FIG. 13 (Non-Patent Document 1).
[0003] The DSB mixer includes a transistor Q1 with a positive-phase LO signal LOp input to its base terminal and a positive-phase RF (Radio Frequency) signal RFp output from its collector terminal, a transistor Q2 with a negative-phase LO signal LOn input to its base terminal and a negative-phase RF signal RFn output from its collector terminal, a transistor Q3 with an IF (Intermediate Frequency) signal IFs input to its base terminal and its collector terminal connected to the emitter terminals of transistors Q1 and Q2, and a resistor R1 with one end connected to the emitter of transistor Q3 and the other end connected to the power supply voltage VEE.
[0004] In a DSB mixer, generally, by designing the impedance of the connection point Nc of the emitter terminals of transistors Q1 and Q2 forming a differential pair to be high, a design is adopted to increase the gain of the differential signal and lower the gain of the common-phase signal. In a DSB mixer, as shown in FIG. 14, by inputting differential LO signals LOp and LOn having a 180° phase difference, it is possible to obtain a high conversion gain for both the upper sideband (USB: Upper side Band) and the lower sideband (LSB: Lower Side Band).
[0005] When using a DSB mixer in a communication system, it is necessary to select either the LSB signal or the USB signal from the RF signal output from the mixer and reject the other, in accordance with the LO signal frequency used in the system. For example, when using the USB signal, a high-pass filter (HPF) element is generally connected after the mixer to remove the LSB signal. However, this configuration has the problem that the strength of the USB signal is reduced due to the insertion loss of the filter element, and the removal of the LSB signal may be insufficient.
[0006] To mitigate this problem, it is desirable for the mixer to have a function that adaptively changes its characteristics so that, for example, when using a USB signal in the system, the conversion gain of the USB signal is as high as possible, while the conversion gain of the LSB signal is low. However, there are limits to the conversion gain of the USB signal that can be achieved with conventional mixers, and it has been difficult to adaptively change the characteristics of the mixer so that the LSB signal is removed.
[0007] T. Jyo et al., “A DC to 194-GHz Distributed Mixer in 250-nm InP DHBT Technology”, 2020 IEEE / MTT-S International Microwave Symposium (IMS), Los Angeles, CA, USA, 2020, pp.771-774, doi:10.1109 / IMS30576.2020.9223832
[0008] The present invention was made to solve the above problems, and aims to provide a mixer and a distributed mixer that can improve the conversion gain of the USB signal and lower the conversion gain of the LSB signal among the RF signals output from the mixer.
[0009] The mixer of the present invention comprises: a first transistor to which a positive-phase LO signal is input to the base terminal and which outputs a positive-phase RF signal from its collector terminal; a second transistor to which an inverse-phase LO signal is input to the base terminal and which outputs an inverse-phase RF signal from its collector terminal; a third transistor to which an IF signal is input to the base terminal and whose collector terminal is connected to the emitter terminals of the first and second transistors; a resistor to which one end is connected to the emitter terminal of the third transistor and the other end is connected to the power supply voltage; a capacitor to which one end is connected to the emitter terminals of the first and second transistors and the other end is connected to ground; and a signal generation unit configured to generate the positive-phase LO signal and the inverse-phase LO signal, wherein the signal generation unit is capable of setting the phase difference between the positive-phase LO signal and the inverse-phase LO signal to either 180° or a value obtained by adding a phase offset greater than 0° and less than or equal to 180° to 180°.
[0010] According to the present invention, by adding capacitance to the emitter terminals of the first and second transistors, and by providing a signal generation unit that can set the phase difference between the positive-phase LO signal and the negative-phase LO signal to either 180° or a value obtained by adding a phase offset greater than 0° and less than or equal to 180° to 180°, the characteristics of the mixer can be adaptively changed. In the present invention, it is possible to improve the conversion gain of the USB signal and lower the conversion gain of the LSB signal among the RF signals output from the mixer.
[0011] Figure 1 is a circuit diagram showing the configuration of a mixer according to the first embodiment of the present invention. Figures 2A and 2B are waveform diagrams of the differential LO signal input to the mixer according to the first embodiment of the present invention. Figure 3 is a block diagram showing an example configuration of the signal generation unit according to the first embodiment of the present invention. Figure 4 is a diagram showing the simulation results of the conversion gain of the mixer according to the first embodiment of the present invention and a conventional mixer. Figure 5 is a diagram showing the simulation results of the conversion gain when a phase offset is applied to the differential LO signal in a conventional mixer. Figure 6 is a circuit diagram showing the configuration of a mixer according to the second embodiment of the present invention. Figure 7 is a circuit diagram showing another configuration of the mixer according to the second embodiment of the present invention. Figure 8 is a diagram showing the simulation results of the conversion gain of the mixers according to the first and second embodiments of the present invention. Figure 9 is a circuit diagram showing the configuration of a mixer according to the third embodiment of the present invention. Figure 10 is a circuit diagram showing another configuration of the mixer according to the third embodiment of the present invention. Figure 11 is a diagram showing the simulation results of the conversion gain of the mixers according to the first and third embodiments of the present invention. Figure 12 is a circuit diagram showing the configuration of a distributed mixer according to a fourth embodiment of the present invention. Figure 13 is a circuit diagram showing the configuration of a conventional mixer. Figure 14 is a waveform diagram of a differential LO signal input to a conventional mixer.
[0012] [First Embodiment] Embodiments of the present invention will be described below with reference to the drawings. Figure 1 is a circuit diagram of a mixer according to the first embodiment of the present invention. The mixer of this embodiment consists of a transistor Q1 to which a positive-phase LO signal Lop is input to the base terminal and which outputs a positive-phase RF signal RFp from its collector terminal, a transistor Q2 to which an inverse-phase LO signal LOn is input to the base terminal and which outputs an inverse-phase RF signal RFn from its collector terminal, a transistor Q3 to which an IF signal IFs is input to the base terminal and whose collector terminal is connected to the emitter terminals of transistors Q1 and Q2, a resistor R1 to which one end is connected to the emitter terminal of transistor Q3 and the other end is connected to the power supply voltage VEE, a capacitor Cc to which one end is connected to the emitter terminals of transistors Q1 and Q2 and the other end is connected to ground, and a signal generation unit 1 that generates differential LO signals Lop and LOn.
[0013] In this embodiment, as shown in Figure 1, a capacitance Cc is added to the node Nc of a conventional mixer (the connection point of the emitter terminals of transistors Q1 and Q2). Furthermore, by changing the phase difference between the positive-phase LO signal LOp and the negative-phase LO signal LOn input to transistors Q1 and Q2 by the signal generation unit 1, it is possible to realize two modes: UE mode and WB mode. In WB mode, the signal generation unit 1 inputs differential LO signals LOp and LOn with a phase difference of 180° to transistors Q1 and Q2, similar to a conventional mixer (Figure 2A). This makes it possible to obtain characteristics similar to a conventional mixer, namely, characteristics with conversion gain for both LSB and USB signals.
[0014] In UE mode, the signal generation unit 1 inputs differential LO signals LOp and LOn, which have a phase difference of 180° + Po (180° + phase offset Po (0° < Po ≤ 180°)), to transistors Q1 and Q2 (Figure 2B). This improves the conversion gain of the USB signal and lowers the conversion gain of the LSB signal.
[0015] As shown in Figure 3, the signal generation unit 1 consists of an oscillator 10 that generates a single-phase sine wave signal, a single-phase to differential converter 11 which converts the sine wave signal output from the oscillator 10 into a differential signal (for example, a balun), and a phase shifter 12 which changes the phase of either the positive-phase sine wave signal or the negative-phase sine wave signal output from the single-phase to differential converter 11. The phase shifter 12 is configured to select either one of two paths: one through which the negative-phase sine wave signal output from the single-phase to differential converter 11 passes through a delay line, or one through which it does not pass through a delay line. The selection operation of the phase shifter 12 can be controlled by an external control signal. By changing the operation of the phase shifter 12 in this way, the phase difference between the positive-phase LO signal LOp and the negative-phase LO signal LOn output from the phase shifter 12 can be set to either 180° or 180° + Po.
[0016] The principle of the mixer in this embodiment will be explained with reference to the simulation results. By adding a capacitance Cc to node Nc of the mixer, the impedance at node Nc increases on the high-frequency side, and the common-mode gain on the high-frequency side increases. In UE mode, giving a phase difference of 180° + Po to the positive-sequence LO signal LOp and the negative-sequence LO signal LOn corresponds to increasing the ratio of the common-mode component to the differential component in the differential LO signals LOp and LOn. By adding a phase offset Po, both the differential gain and the common-mode gain can contribute to the conversion gain of the mixer, and by further increasing the common-mode gain on the high-frequency side by adding a capacitance Cc, it is possible to improve the conversion gain of the USB signal of the mixer compared to conventional methods.
[0017] On the other hand, at low frequencies, the common-mode gain remains small, and as the differential component in the differential LO signals LOp and LOn decreases, the conversion gain of the mixer's LSB signal decreases, making it possible to obtain the effect of removing the LSB signal. Figure 4 shows the simulation results of the conversion gain of this embodiment and the conventional mixer shown in Figure 13. In Figure 4, 100 shows the conversion gain of the mixer in this embodiment in UE mode, 101 shows the conversion gain of the conventional mixer, and 102 shows the conversion gain of the mixer in this embodiment in WB mode. In the UE mode of this embodiment, the phase difference between signals LOp and LOn is 180° + Po, while in WB mode and the conventional mixer, the phase difference is 180°. In the example in Figure 4, the frequencies of the differential LO signals LOp and LOn are set to 75 GHz.
[0018] In this embodiment, compared to the characteristics of a conventional mixer, it can be seen that the conversion gain of the USB signal in UE mode is increased, and the conversion gain of the LSB signal is decreased. On the other hand, in the WB mode of this embodiment, the differential gain on the high-frequency side is slightly reduced by the capacitance Cc added to node Nc. However, by appropriately setting the value of capacitance Cc, it is possible to obtain conversion gain characteristics equivalent to those of a conventional mixer, as shown in Figure 4.
[0019] For reference, Figure 5 shows the simulation results of the conversion gain in a conventional mixer when a phase offset Po is applied to signals LOp and LOn (phase difference between signals LOp and LOn is 180° + Po). Figure 5, column 103, shows the conversion gain when the phase difference between signals LOp and LOn is 180° + Po. It can be seen that in a conventional mixer, there is no capacitance Cc, so there is no common-mode gain, and characteristics like the UE mode in this embodiment cannot be obtained.
[0020] [Second Embodiment] Figure 6 is a circuit diagram of a mixer according to a second embodiment of the present invention. The mixer in this embodiment has a transmission line TL1 inserted between the emitter terminals of transistors Q1 and Q2 and the collector terminal of transistor Q3, compared to the configuration of the first embodiment. This makes it possible to increase the conversion gain on the high-frequency side and expand the bandwidth in UE mode. As shown in Figure 7, an inductor L1 may be inserted instead of the transmission line TL1.
[0021] Figure 8 shows the simulation results of the conversion gain of the mixer in this embodiment when the inductor L1 is inserted as shown in Figure 7. In Figure 8, 100 represents the conversion gain in UE mode in the first embodiment as described above, and 104 represents the conversion gain in UE mode in this embodiment. In this embodiment, it can be seen that the conversion gain on the high-frequency side has increased and the bandwidth has been expanded compared to the first embodiment.
[0022] [Third Embodiment] Figure 9 is a circuit diagram of a mixer according to a third embodiment of the present invention. The mixer of this embodiment has the same configuration as the first embodiment, but with a transmission line TL1 inserted between the emitter terminals of transistors Q1 and Q2 and the collector terminal of transistor Q3, a transmission line TL2 inserted between the emitter terminal of transistor Q1 and one end of transmission line TL1, and a transmission line TL3 inserted between the emitter terminal of transistor Q2 and one end of transmission line TL1. This makes it possible to increase the conversion gain on the high-frequency side and expand the bandwidth in UE mode. As shown in Figure 10, inductors L1, L2, and L3 may be inserted instead of transmission lines TL1, TL2, and TL3.
[0023] Figure 11 shows the simulation results of the conversion gain of the mixer in this embodiment when inductors L1, L2, and L3 are inserted as shown in Figure 10. In Figure 11, 100 represents the conversion gain in UE mode in the first embodiment as described above, and 105 represents the conversion gain in UE mode in this embodiment. In this embodiment, it can be seen that the conversion gain on the high-frequency side has increased and the bandwidth has been expanded compared to the first embodiment.
[0024] [Fourth Embodiment] Figure 12 is a circuit diagram of a distributed mixer according to the fourth embodiment of the present invention. The distributed mixer includes a transmission line CPW10 to which the IF signal IFs is input, transmission lines CPW20p and CPW20n for RF signal output, transmission lines CPW30p and CPW30n to which the LO signals Lop and Loon from the signal generation unit 1 are input, a resistor R2 with one end connected to the bias voltage V1 and the other end connected to the end of transmission line CPW10, a resistor R3 with one end connected to the end of transmission line CPW10 and the other end connected to the power supply voltage VEE, a resistor R4p with one end connected to the input terminal of transmission line CPW20p and the other end connected to ground, a resistor R4n with one end connected to the input terminal of transmission line CPW20n and the other end connected to ground, and a resistor R with one end connected to the end of transmission line CPW20n and the other end connected to ground. 5 is composed of a resistor R6p, one end of which is connected to a bias voltage V2 and the other end of which is connected to the termination of the transmission line CPW30p; a resistor R6n, one end of which is connected to a bias voltage V2 and the other end of which is connected to the termination of the transmission line CPW30n; a resistor R7p, one end of which is connected to the termination of the transmission line CPW30p and the other end of which is connected to ground; a resistor R7n, one end of which is connected to the termination of the transmission line CPW30n and the other end of which is connected to ground; and a plurality of unit cells 2 arranged along the transmission lines CPW10, CPW20p, CPW20n, CPW30p, and CPW30n, with an IF input terminal connected to the transmission line CPW10, an LO input terminal connected to the transmission lines CPW30p and CPW30n, and RF output terminals connected to the transmission lines CPW20p and CPW20n.
[0025] The transmission line CPW10 consists of a configuration in which multiple transmission lines CPW1_a, CPW1, and CPW1_b are connected in series. The characteristic impedance of the transmission line CPW1 between unit cells and the input-side transmission line CPW1_a are different. This is because, in the case of transmission line CPW1_a, it is necessary to absorb the effect of the parasitic capacitance of the preceding circuit. Similarly, the characteristic impedance of transmission lines CPW1 and CPW1_b are different. This is because, in the case of transmission line CPW1_b, it is necessary to absorb the effect of the parasitic capacitance of resistors R2 and R3.
[0026] The transmission line CPW20p consists of multiple transmission lines CPW2p_a, CPW2p, and CPW2p_b connected in series. The characteristic impedance of the transmission line CPW2p between unit cells and the input-side transmission line CPW2p_a are different. This is because, in the case of transmission line CPW2p_a, the effect of the parasitic capacitance of resistor R4p must be absorbed by transmission line CPW2p_a. Similarly, the characteristic impedance of transmission lines CPW2p and CPW2p_b are different. This is because, in the case of transmission line CPW2p_b, the effect of the parasitic capacitance of the subsequent circuit must be absorbed by transmission line CPW2p_b. Similar to transmission line CPW20p, the transmission line CPW20n consists of multiple transmission lines CPW2n_a, CPW2n, and CPW2n_b connected in series.
[0027] The transmission line CPW30p consists of multiple transmission lines CPW3p_a, CPW3p, and CPW3p_b connected in series. The characteristic impedance of the transmission line CPW3p between unit cells and the input-side transmission line CPW3p_a are different. This is because, in the case of transmission line CPW3p_a, the effect of the parasitic capacitance of the preceding signal generation unit 1 must be absorbed by transmission line CPW3p_a. Similarly, the characteristic impedance of transmission lines CPW3p and CPW3p_b are different. This is because, in the case of transmission line CPW3p_b, the effect of the parasitic capacitance of resistors R6p and R7p must be absorbed by transmission line CPW3p_b. Similar to transmission line CPW30p, the transmission line CPW30n consists of multiple transmission lines CPW3n_a, CPW3n, and CPW3n_b connected in series.
[0028] In this embodiment, a case using a CPW (coplanar waveguide) as the transmission line is shown, but other transmission lines such as microstop lines may be used instead of CPW.
[0029] In this embodiment, the mixer described in the first to third embodiments is used as unit cell 2. Specifically, the base terminal (IF input terminal) of transistor Q3 is connected to transmission line CPW10, the base terminal (positive phase LO input terminal) of transistor Q1 is connected to transmission line CPW30p, the base terminal (negative phase LO input terminal) of transistor Q2 is connected to transmission line CPW30n, the collector terminal (positive phase RF output terminal) of transistor Q1 is connected to transmission line CPW20p, and the collector terminal (negative phase RF output terminal) of transistor Q2 is connected to transmission line CPW20n.
[0030] In the first to third embodiments, the base terminals of transistors Q1 and Q2 are directly connected to the signal generation unit 1. In contrast, in this embodiment, one common signal generation unit 1 is provided for each unit cell 2, and the differential LO signals Lop and Lon generated by the signal generation unit 1 are input to the input terminals of the transmission lines CPW30p and CPW30n.
[0031] In this embodiment, by using the mixers of the first to third embodiments as the unit cells of the distributed mixer, it is possible to further enhance the gain improvement effect of the USB signal and the LSB signal rejection effect in UE mode.
[0032] Some or all of the above examples may also be described as follows, but are not limited to the following:
[0033] (Note 1) The mixer of the present invention comprises a first transistor to which a positive-phase LO signal is input to the base terminal and which outputs a positive-phase RF signal from the collector terminal; a second transistor to which an inverse-phase LO signal is input to the base terminal and which outputs an inverse-phase RF signal from the collector terminal; a third transistor to which an IF signal is input to the base terminal and whose collector terminal is connected to the emitter terminals of the first and second transistors; a resistor to which one end is connected to the emitter terminal of the third transistor and the other end is connected to the power supply voltage; a capacitor to which one end is connected to the emitter terminals of the first and second transistors and the other end is connected to ground; and a signal generation unit configured to generate the positive-phase LO signal and the inverse-phase LO signal, wherein the signal generation unit can set the phase difference between the positive-phase LO signal and the inverse-phase LO signal to either 180° or a value obtained by adding a phase offset greater than 0° and less than or equal to 180° to 180°.
[0034] (Note 2) The mixer described in Note 1 is characterized in that a transmission line or inductor is further inserted between the emitter terminals of the first and second transistors and the collector terminal of the third transistor.
[0035] (Note 3) The mixer described in Note 1 is characterized in that a first transmission line is further inserted between the emitter terminals of the first and second transistors and the collector terminal of the third transistor, a second transmission line is further inserted between the emitter terminal of the first transistor and the first transmission line, and a third transmission line is further inserted between the emitter terminal of the second transistor and the first transmission line, or a first inductor is further inserted between the emitter terminals of the first and second transistors and the collector terminal of the third transistor, a second inductor is further inserted between the emitter terminal of the first transistor and the first inductor, and a third inductor is further inserted between the emitter terminal of the second transistor and the first inductor.
[0036] (Note 4) The distributed mixer of the present invention comprises: a first transmission line configured to receive an IF signal at its input terminal; a second transmission line configured to receive a positive-phase LO signal at its input terminal; a third transmission line configured to receive an inverse-phase LO signal at its input terminal; a fourth transmission line configured to output a positive-phase RF signal from its termination; a fifth transmission line configured to output an inverse-phase RF signal from its termination; and a third transmission line arranged along the first to fifth transmission lines, with an IF input terminal connected to the first transmission line, an LO input terminal connected to the second and third transmission lines, and an RF output terminal connected to the fourth and fifth transmission lines. The system comprises a plurality of unit cells, each unit cell being provided with a mixer as described in any one of appendices 1 to 3, the base terminal of the third transistor being connected to the first transmission line, the base terminal of the first transistor being connected to the second transmission line, the base terminal of the second transistor being connected to the third transmission line, the collector terminal of the first transistor being connected to the fourth transmission line, and the collector terminal of the second transistor being connected to the fifth transmission line, and the signal generation unit common to each unit cell inputs the positive-phase LO signal and the negative-phase LO signal to the input terminals of the second and third transmission lines.
[0037] 1...Signal generation unit, 2...Unit cell, Q1-Q3...Transistors, R1-R3, R4p, R4n, R5, R6p, R6n, R7p, R7n...Resistors, Cc...Capacitance, TL1-TL3, CPW1, CPW1_a, CPW1_b, CPW2p, CPW2p_a, CPW2p_b, CPW2n, CPW2n_a, CPW2n_b, CPW3p, CPW3p_a, CPW3p_b, CPW3n, CPW3n_a, CPW3n_b, CPW10, CPW20p, CPW20n, CPW30p, CPW30n...Transmission lines, L1-L3...Inductors.
Claims
1. A mixer comprising: a first transistor to which a positive-phase LO signal is input to the base terminal and which outputs a positive-phase RF signal from its collector terminal; a second transistor to which an inverse-phase LO signal is input to the base terminal and which outputs an inverse-phase RF signal from its collector terminal; a third transistor to which an IF signal is input to the base terminal and whose collector terminal is connected to the emitter terminals of the first and second transistors; a resistor to which one end is connected to the emitter terminal of the third transistor and the other end is connected to the power supply voltage; a capacitor to which one end is connected to the emitter terminals of the first and second transistors and the other end is connected to ground; and a signal generation unit configured to generate the positive-phase LO signal and the inverse-phase LO signal, wherein the signal generation unit can set the phase difference between the positive-phase LO signal and the inverse-phase LO signal to either 180° or a value obtained by adding a phase offset greater than 0° and less than or equal to 180° to 180°.
2. The mixer according to claim 1, characterized in that a transmission line or inductor is further inserted between the emitter terminals of the first and second transistors and the collector terminal of the third transistor.
3. A mixer according to claim 1, characterized in that a first transmission line is further inserted between the emitter terminals of the first and second transistors and the collector terminal of the third transistor, a second transmission line is further inserted between the emitter terminal of the first transistor and the first transmission line, and a third transmission line is further inserted between the emitter terminal of the second transistor and the first transmission line, or a first inductor is further inserted between the emitter terminals of the first and second transistors and the collector terminal of the third transistor, a second inductor is further inserted between the emitter terminal of the first transistor and the first inductor, and a third inductor is further inserted between the emitter terminal of the second transistor and the first inductor.
4. A first transmission line configured to receive an IF signal at its input terminal; a second transmission line configured to receive a positive-phase LO signal at its input terminal; a third transmission line configured to receive an inverse-phase LO signal at its input terminal; a fourth transmission line configured to output a positive-phase RF signal from its termination; a fifth transmission line configured to output an inverse-phase RF signal from its termination; and a plurality of unit cells arranged along the first to fifth transmission lines, each having an IF input terminal connected to the first transmission line, an LO input terminal connected to the second and third transmission lines, and an RF output terminal connected to the fourth and fifth transmission lines, wherein each unit cell is provided with a mixer as described in any one of claims 1 to 3. A distributed mixer characterized in that the base terminal of the third transistor is connected to the first transmission line, the base terminal of the first transistor is connected to the second transmission line, the base terminal of the second transistor is connected to the third transmission line, the collector terminal of the first transistor is connected to the fourth transmission line, and the collector terminal of the second transistor is connected to the fifth transmission line, and the signal generation unit common to each unit cell inputs the positive-phase LO signal and the negative-phase LO signal to the input terminals of the second and third transmission lines.
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