Processor fault detection method and apparatus, device, medium, and product

Abstract

Embodiments of the present application relate to the field of fault detection, and provide a processor fault detection method and apparatus, a device, a medium, and a product. The method is applied to a basic input / output system of a server, and comprises: in a power-on self-test stage of a basic input / output system, reading a processor type and processor microcode; when the processor type is inconsistent with a preset type, or when the processor microcode is not read, or when the processor microcode fails to be loaded, determining that a processor is faulty, reporting error information corresponding to the described problem to a baseboard management controller of a server, and displaying an error information result by means of a screen, or parsing the result by means of the baseboard management controller of the server. By means of the method, when a processor fault occurs, the problem of the processor fault can be efficiently and quickly detected, and a detection result displayed to a user, thereby not only improving work efficiency, but also improving the use experience of the user.

Description

A processor fault detection method, apparatus, device, medium, and product.

[0001] Cross-references to related applications

[0002] This application claims priority to Chinese Patent Application No. 202411533549.7, filed on October 30, 2024, entitled "A Processor Fault Detection Method, Apparatus, Device, Medium and Product", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of fault detection, and in particular to a method, apparatus, device, medium and product for processor fault detection. Background Technology

[0004] The BIOS (Basic Input Output System) is a crucial component of a server, responsible for booting the computer and initializing its hardware. During server startup, the BIOS runs first, detecting and initializing hardware devices before handing control over to the operating system. The BIOS plays a vital role in a server, and its stability and reliability significantly impact the overall system operation.

[0005] The BIOS POST (Power On Self Test) phase is a crucial step in the server startup process. The POST process begins when the server power button is pressed. This phase primarily checks and initializes the server's main hardware components to ensure they are functioning correctly. If the CPU (Central Processing Unit) startup process fails during the BIOS POST phase, it means the server cannot correctly recognize or initialize the CPU. This can lead to the server failing to boot at all; without a properly functioning CPU, the server cannot execute basic operating instructions; or it may cause the server to repeatedly attempt to boot but remain stuck in the same position, creating a restart loop; or it may suddenly freeze during the startup process; or the CPU may fail the test, preventing the server from outputting any video signals to the monitor, resulting in a blank screen.

[0006] The above problems may occur individually or simultaneously, but the most troublesome problem for users is that when a CPU failure occurs, there is no display on the monitor, making it impossible to locate and diagnose the fault. This not only has a great impact on normal use, but also greatly hinders troubleshooting after the problem occurs. Summary of the Invention

[0007] Based on the above-mentioned technical problems, this application provides a processor fault detection method, apparatus, device, medium and product, aiming to provide a convenient, accurate and visual way to detect processor faults, so that when a processor fault occurs during the power-on self-test phase, the fault can be located in a timely manner.

[0008] The first aspect of this application provides a processor fault detection method, applied to a server's basic input / output system, the method comprising:

[0009] During the power-on self-test phase of the basic input / output system, the processor type and processor microcode of the server are read. The processor type is used to describe the basic information of the processor, and the processor microcode is used to describe the operating mode of the processor.

[0010] The processor type is compared with the preset type. If the processor type is inconsistent with the preset type, it is determined that the processor is faulty, and the error message of processor type mismatch is reported to the baseboard management controller of the server.

[0011] The processor microcode is read. If the processor microcode is not read, an error message indicating that the microcode reading was unsuccessful is reported to the baseboard management controller of the server.

[0012] The system determines whether the processor microcode loading was successful. If the processor microcode loading fails, the system reports the error message of unsuccessful microcode loading to the baseboard management controller of the server.

[0013] Optionally, the method further includes:

[0014] Print the error messages reported by the basic input / output system on the self-test page;

[0015] The error messages reported by the Basic Input / Output System are displayed on the screen. The error messages reported by the Basic Input / Output System include at least one of the following: processor type mismatch error message, microcode reading failure error message, and microcode loading failure error message.

[0016] Optionally, the method further includes:

[0017] When a screen malfunctions, the server's baseboard management controller parses the error messages reported by the basic input / output system. The error messages reported by the basic input / output system include at least one of the following: processor type mismatch error messages, microcode reading failure error messages, and microcode loading failure error messages.

[0018] The parsing results are displayed through the user interface of the server's baseboard management controller.

[0019] Optionally, the processor type is compared with a preset type. If the processor type does not match the preset type, a processor fault is determined, and an error message indicating a processor type mismatch is reported to the server's baseboard management controller. The method includes:

[0020] The processor type is compared with the corresponding preset type in sequence. The processor types include the first processor type, the second processor type, the third processor type, and the fourth processor type.

[0021] When the first processor type is inconsistent with the first preset type, it is determined that the processor is faulty, and the error message of the first processor type mismatch is reported to the baseboard management controller of the server.

[0022] When the second processor type is inconsistent with the second preset type, it is determined that the processor is faulty, and the error message of the mismatch between the second processor type is reported to the baseboard management controller of the server.

[0023] When the third processor type is inconsistent with the third preset type, it is determined that the processor is faulty, and the error message of the third processor type mismatch is reported to the baseboard management controller of the server.

[0024] When the fourth processor type is inconsistent with the fourth preset type, it is determined that the processor is faulty, and the error message of the fourth processor type mismatch is reported to the baseboard management controller of the server.

[0025] Optionally, before comparing the processor type with the corresponding preset type in sequence, the method further includes:

[0026] During the power-on self-test phase of the basic input / output system, the initial value of the flag bit is set to "no". The flag bit is used to indicate whether to report the processor type mismatch error information to the server's baseboard management controller.

[0027] The processor type is compared with the corresponding preset type in turn, and the flag is assigned a value according to the comparison result;

[0028] Read the current value of the flag;

[0029] When the flag is set to no, the processor has no fault and continues to execute the power-on self-test phase of the basic input / output system;

[0030] When the flag is set to "yes", a processor fault is identified, and an error message indicating a processor type mismatch is reported to the server's baseboard management controller.

[0031] Optionally, the processor type is compared sequentially with the corresponding preset type, and a flag is assigned a value based on the comparison result. The method includes:

[0032] Read the first processor type, compare the first processor type with the first preset type, and if the first processor type and the first preset type are the same, continue to the next step of comparing the processor type with the preset type;

[0033] When the first processor type and the first preset type are inconsistent, the flag bit is set to yes, and the next step of comparing the processor type with the preset type is continued.

[0034] Read the flag assignment;

[0035] When the flag is set to "yes", a processor fault is identified, and an error message indicating a first processor type mismatch is reported to the server's baseboard management controller.

[0036] Optionally, the process continues with the next step of comparing the processor type with the preset type, including:

[0037] Read the second processor type and compare it with the second preset type.

[0038] When the second processor type matches the second preset type, continue to the next step of comparing the processor type with the preset type;

[0039] If the second processor type is inconsistent with the second preset type, the flag is set to "yes", and the process continues to the next step of comparing the processor type with the preset type.

[0040] Read the flag assignment;

[0041] When the flag is set to "yes", a processor fault is identified, and an error message indicating a mismatch between the second processor type is reported to the server's baseboard management controller.

[0042] Optionally, it is determined whether the processor microcode loading was successful. When the processor microcode loading fails, an error message indicating unsuccessful microcode loading is reported to the baseboard management controller of the server. The method includes:

[0043] Read the processor microcode and set its address and size.

[0044] Determine whether the processor microcode was successfully loaded based on its address and size.

[0045] When processor microcode loading fails, the error message indicating unsuccessful microcode loading is reported to the server's baseboard management controller.

[0046] Optionally, the method further includes:

[0047] When multiple processors are present, during the power-on self-test phase of the basic input / output system, read the processor type and processor microcode.

[0048] The processor type of each processor is compared with the preset type. When the processor type is inconsistent with the preset type, it is determined that the processor is faulty, and the error message of processor type mismatch is reported to the baseboard management controller of the server.

[0049] Optionally, the method further includes:

[0050] The processor microcode of each processor is read. If the processor microcode is not read, an error message indicating that the microcode reading was unsuccessful is reported to the baseboard management controller of the server.

[0051] It determines whether the processor microcode loading of each processor is successful. When the processor microcode loading fails, the error message of unsuccessful microcode loading is reported to the baseboard management controller of the server.

[0052] Optionally, after reporting the error information to the baseboard management controller of the server, the method further includes:

[0053] After receiving an error message, the server's baseboard management controller logs the problem.

[0054] Based on the problem log, read the error information and locate the fault.

[0055] A second aspect of this application provides a processor fault detection device, the device comprising:

[0056] The read module is configured to read the server's processor type and processor microcode during the power-on self-test phase of the basic input / output system.

[0057] The processor type comparison module is configured to compare the processor type with a preset type. When the processor type is inconsistent with the preset type, it determines that the processor is faulty and reports the processor type mismatch error information to the baseboard management controller of the server.

[0058] The processor microcode reading module is configured to read the processor microcode. When the processor microcode is not read, an error message indicating that the microcode reading was unsuccessful is reported to the baseboard management controller of the server.

[0059] The processor microcode loading module determines whether the processor microcode loading is successful. When the processor microcode loading fails, it reports the error message of unsuccessful microcode loading to the baseboard management controller of the server.

[0060] Optionally, the processor fault detection device further includes:

[0061] The error message printing module is configured to print error messages reported by the basic input / output system on the self-test page;

[0062] The error message display module is configured to display error messages reported by the basic input / output system on the screen. The error messages reported by the basic input / output system include at least one of the following: processor type mismatch error message, microcode reading failure error message, and microcode loading failure error message.

[0063] Optionally, the processor fault detection device further includes:

[0064] The error message parsing module is configured to parse the error messages reported by the basic input / output system when a screen failure occurs. The error messages reported by the basic input / output system include at least one of the following: processor type mismatch error messages, microcode reading failure error messages, and microcode loading failure error messages.

[0065] The parsing result display module is configured to display the parsing results through the user interface of the server's baseboard management controller.

[0066] Optionally, the processor type comparison module also includes:

[0067] The processor type comparison submodule is configured to compare the processor type with the corresponding preset type in sequence. The processor types include the first processor type, the second processor type, the third processor type, and the fourth processor type.

[0068] The first processor fault determination submodule is configured to determine that the processor is faulty when the first processor type is inconsistent with the first preset type, and to report the error information of the first processor type mismatch to the baseboard management controller of the server.

[0069] The second processor fault determination submodule is configured to determine that the processor is faulty when the second processor type is inconsistent with the second preset type, and to report the error message of the second processor type mismatch to the baseboard management controller of the server.

[0070] The third processor fault determination submodule is configured to determine that the processor is faulty when the third processor type is inconsistent with the third preset type, and to report the error message of the third processor type mismatch to the baseboard management controller of the server.

[0071] The fourth processor fault determination submodule is configured to determine that the processor is faulty when the fourth processor type is inconsistent with the fourth preset type, and to report the error information of the fourth processor type mismatch to the baseboard management controller of the server.

[0072] Optionally, the processor type comparison module also includes:

[0073] The flag setting submodule is configured to set the initial value of the flag to No during the power-on self-test phase of the basic input / output system. The flag is used to indicate whether to report the processor type mismatch error information to the baseboard management controller of the server.

[0074] The flag assignment submodule is configured to compare the processor type with the corresponding preset type in sequence, and assign a value to the flag bit according to the comparison result;

[0075] The flag reading submodule is configured to read the current value of the flag.

[0076] The first fault judgment submodule is configured such that when the flag bit is set to no, the processor does not have a fault and continues to execute the power-on self-test phase of the basic input / output system.

[0077] The second fault determination submodule is configured to determine that the processor has a fault when the flag bit is set to "yes", and report the processor type mismatch error information to the baseboard management controller of the server.

[0078] Optionally, the flag assignment submodule also includes:

[0079] The first processor type reading unit is configured to read the first processor type, compare the first processor type with the first preset type, and when the first processor type and the first preset type are consistent, continue to the next processor type and preset type comparison step.

[0080] The first flag assignment unit is configured to assign the flag to "yes" when the first processor type and the first preset type are inconsistent, and continue to the next step of comparing the processor type with the preset type.

[0081] The flag reading unit is configured to read the flag assignment.

[0082] The first error information reporting unit is configured to determine that the processor has a fault when the flag bit is set to "yes", and report the error information of the first processor type mismatch to the baseboard management controller of the server.

[0083] Optionally, the flag assignment submodule also includes:

[0084] The second processor type reading unit is configured to read the second processor type, compare the second processor type with the second preset type, and when the second processor type and the second preset type are the same, continue to the next processor type and preset type comparison step.

[0085] The second flag assignment unit is configured to assign a value of "yes" to the flag when the second processor type is inconsistent with the second preset type, and then continue to the next step of comparing the processor type with the preset type.

[0086] The flag reading unit is configured to read the flag assignment.

[0087] The second error information reporting unit is configured to determine that the processor has a fault when the flag bit is set to "yes", and report the error information of the second processor type mismatch to the baseboard management controller of the server.

[0088] Optionally, the processor microcode loading module includes:

[0089] The configuration submodule is set to read the processor microcode and set the address and size of the processor microcode;

[0090] The processor microcode loading judgment submodule is configured to determine whether the processor microcode has been successfully loaded based on the address and size of the processor microcode.

[0091] The microcode loading failure reporting submodule is configured to report the error message of unsuccessful microcode loading to the baseboard management controller of the server when the processor microcode loading fails.

[0092] Optional:

[0093] The read module is also configured to read the processor type and processor microcode during the power-on self-test phase of the basic input / output system when multiple processors are present.

[0094] The processor type comparison module is also configured to compare the processor type of each processor with a preset type. When the processor type is inconsistent with the preset type, it is determined that the processor is faulty and the error message of processor type mismatch is reported to the baseboard management controller of the server.

[0095] Optional:

[0096] The processor microcode reading module is also configured to read the processor microcode of each processor. When the processor microcode is not read, an error message indicating that the microcode reading was unsuccessful is reported to the baseboard management controller of the server.

[0097] The processor microcode loading module is also configured to determine whether the processor microcode loading of each processor is successful. When the processor microcode loading fails, the error message of unsuccessful microcode loading is reported to the baseboard management controller of the server.

[0098] Optionally, the processor fault detection device further includes:

[0099] The problem logging module is configured to record problem logs after the server's baseboard management controller receives error information;

[0100] The problem log reading module is configured to read error information from the problem log and locate the fault location.

[0101] A third aspect of this application provides an electronic device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the computer program is executed by the processor, it implements the processor fault detection method as described in the first aspect of this application.

[0102] The fourth aspect of this application provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the processor fault detection method of the first aspect of this application.

[0103] The fifth aspect of this application provides a computer program product, including a computer program that, when executed by a processor, implements the processor fault detection method of the first aspect of this application.

[0104] The processor fault detection method of this application reads the processor type and processor microcode during the power-on self-test phase of the basic input / output system. When the processor type is inconsistent with the preset type, or when the processor microcode is not read, or when the processor microcode loading fails, it is determined that the processor has a fault. The error information corresponding to the above problems is reported to the baseboard management controller of the server. The error information results can be displayed on the screen, or the results can be parsed through the user interface of the baseboard management controller of the server.

[0105] This application addresses the issue of existing technologies being unable to locate and display processor faults during the power-on self-test (POST) phase. It proposes a method for detecting processor problems using a basic input / output system (PIS), and when a processor fault occurs, the detection results can be displayed on a screen or through the user interface of the server's baseboard management controller. This method eliminates the inability to accurately locate server faults due to a lack of information, enabling efficient and rapid fault location and resolution. This not only improves work efficiency but also enhances the user experience. Attached Figure Description

[0106] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0107] Figure 1 is a flowchart of a processor fault detection method according to an embodiment of this application;

[0108] Figure 2 is a schematic diagram of a hardware architecture proposed in an embodiment of this application;

[0109] Figure 3 is a flowchart of a processor type determination method according to an embodiment of this application;

[0110] Figure 4 is a flowchart of a processor microcode judgment method provided in an embodiment of this application;

[0111] Figure 5 is a structural block diagram of a processor fault detection device provided in an embodiment of this application;

[0112] Figure 6 is a schematic diagram of an electronic device according to an embodiment of this application. Detailed Implementation

[0113] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0114] In the accompanying drawings, the size of constituent elements, the thickness of layers, or areas may sometimes be exaggerated for clarity. Therefore, any implementation of this disclosure is not necessarily limited to the dimensions shown in the drawings, and the shapes and sizes of the components in the drawings do not reflect true proportions. Furthermore, the drawings schematically illustrate ideal examples, and any implementation of this disclosure is not limited to the shapes or values ​​shown in the drawings.

[0115] Please refer to Figure 1, which is a flowchart of a processor fault detection method according to this application. As shown in Figure 1, the method is applied to the basic input / output system of a server and may include steps S101 to S104:

[0116] Step 101: During the power-on self-test phase of the basic input / output system, read the server's processor type and processor microcode. The processor type describes the processor's basic information, and the processor microcode describes the processor's operating mode.

[0117] Step 102: Compare the processor type with the preset type. If the processor type is inconsistent with the preset type, determine that the processor is faulty and report the processor type mismatch error information to the server's baseboard management controller.

[0118] Step 103: Read the processor microcode. If the processor microcode is not read, report the error message of unsuccessful microcode reading to the baseboard management controller of the server.

[0119] Step 104: Determine whether the processor microcode loading was successful. If the processor microcode loading fails, report the error message of unsuccessful microcode loading to the baseboard management controller of the server.

[0120] In related technologies, if a processor malfunctions during the power-on self-test (POST) phase of a basic input / output system (PIS), it may prevent the processor from being correctly identified or initialized. As a core component, a malfunction or failure to boot the processor can cause the server hosting it to fail to start, execute basic operating instructions, or attempt repeated server restarts, resulting in a vicious cycle of repeated restarts or sudden system freezes. Furthermore, processor malfunctions are often accompanied by the display interface failing to receive signals from the processor, resulting in no display output. Therefore, processor failures not only affect normal operation but also make fault localization difficult due to the lack of a display.

[0121] Therefore, this application proposes a method for detecting processor faults. This method can detect potential problems during processor startup by reading the processor type and microcode during the power-on self-test (POST) phase of the basic input / output system. If no processor problem is detected, the POST phase continues. However, if a potential processor problem is detected, the corresponding error information is reported to the server's baseboard management controller. Furthermore, the detection results can be displayed to the user via a screen or the server's baseboard management controller's user interface. This avoids the problem of difficulty in locating and handling processor faults during system startup due to the inability to display fault information. In this way, users can more promptly and accurately locate faults when they occur and take appropriate action.

[0122] In one optional implementation, as shown in Figure 2, which is a schematic diagram of a hardware architecture proposed in an embodiment of this application, the processor fault detection method proposed in this application is applied to a server and implemented through the Basic Input / Output System (BIOS) firmware stored on the server motherboard. During the server startup process, the BIOS begins the self-test (POST) phase when the server starts. In this phase, the processor fault detection method proposed in this application is used to detect faults in the processor (i.e., CPU) installed in the server. The BIOS determines whether the CPU type is consistent with the preset type stored in the server and whether the CPU microcode can be obtained and loaded normally by obtaining the CPU type and CPU microcode. This determines whether a CPU fault exists. Once the BIOS determines that a CPU fault exists, it will send the fault and specific error information to the Baseboard Management Controller (BMC) in the server. The BMC will back up the error information, and the user can see the error information through the display screen connected to the server and can also see the specific error information by accessing the user interface (BMC WEB) corresponding to the BMC.

[0123] Step S101: During the power-on self-test phase of the basic input / output system, read the processor type and processor microcode of the server. The processor type is used to describe the basic information of the processor, and the processor microcode is used to describe the operating mode of the processor.

[0124] In this embodiment, during the startup process of a user's device (such as a server), the Power-On Self-Test (POST) phase of the Basic Input / Output System (PIS) is a crucial step. The POST begins as soon as the device starts up, checking and initializing the server's main hardware components to ensure they are functioning correctly. During the POST, the PIS reads the processor type, which describes various attribute values ​​representing basic processor information, used to determine if the processor is compatible with the server. The PIS also reads the processor microcode, a type of processor firmware that describes the processor's operating mode. Different processors have different microcodes, but they must be compatible with the server system. Detecting the processor microcode helps determine if the processor is compatible with the server.

[0125] Step 102: Compare the processor type with the preset type. If the processor type is inconsistent with the preset type, determine that the processor is faulty and report the processor type mismatch error information to the server's baseboard management controller.

[0126] In this embodiment, after reading the processor types related to the processor, it is necessary to compare them with preset types. The preset types are stored in the server and used to determine whether the connected processor matches the server. When the processor type matches the preset type, it indicates that the processor matches the server, and subsequent self-test operations can continue. When the processor type does not match the preset type, it is determined that the processor is faulty, and the corresponding processor type mismatch error information is reported to the server's baseboard management controller. The server's baseboard management controller will continue to store these error information and display them through the screen or user interface.

[0127] Step 103: Read the processor microcode. If the processor microcode is not read, report the error message of unsuccessful microcode reading to the baseboard management controller of the server.

[0128] In this embodiment of the application, when reading the processor microcode, there are two situations: readable or unreadable. When the processor microcode can be read, subsequent verification work is performed based on the read processor microcode. When the processor microcode cannot be read, it is determined that the processor is faulty, and the specific fault cause, i.e. the error message of unsuccessful microcode reading, is reported to the baseboard management controller of the server for subsequent storage and display.

[0129] Step 104: Determine whether the processor microcode loading was successful. If the processor microcode loading fails, report the error message of unsuccessful microcode loading to the baseboard management controller of the server.

[0130] In this embodiment, after reading the processor microcode, it is necessary to load and verify the processor microcode. When the processor microcode is successfully loaded, it is determined that the relevant information of the processor microcode is correct and other self-test steps are continued. When the processor microcode fails to load, it is determined that the processor has a fault and the specific fault cause, i.e. the error message of unsuccessful microcode loading, is reported to the baseboard management controller of the server for subsequent storage and display.

[0131] In one optional embodiment, the processor can be a CPU, the basic input / output system can be a BIOS, and the power-on self-test (POST) phase can be the POST phase after the server powers on. That is, during the POST phase, the BIOS reads and judges the CPU's processor type and microcode to determine if the CPU is faulty. The server's baseboard management controller can be a BMC, used to parse and record various error messages, and can also display the recorded error messages to users via the BMC web interface.

[0132] In conjunction with the above embodiments, in one implementation, this application also provides a processor fault detection method, including the following:

[0133] First, upon receiving the above error information, print the error information reported by the basic input / output system on the self-test page.

[0134] In this embodiment of the application, according to the method in steps S101-S104, when a processor fault is detected and error information such as processor type mismatch, microcode reading failure, or microcode loading failure is obtained, the obtained error information is first printed on the self-test page and transmitted to the baseboard management controller of the server. The baseboard management controller of the server processes the error information and stores or displays it accordingly.

[0135] Then, the error messages reported by the Basic Input / Output System are displayed on the screen. The error messages reported by the Basic Input / Output System include at least one of the following: processor type mismatch error message, microcode reading failure error message, and microcode loading failure error message.

[0136] In this embodiment, after the server's baseboard management controller receives error messages such as processor type mismatch, microcode reading failure, or microcode loading failure transmitted by the basic input / output system, it will prioritize displaying these error messages on the screen. This allows for quick and efficient display of these error messages to the user when a processor malfunctions during the power-on self-test phase, facilitating specific troubleshooting by the user based on the error messages, and making it easier to locate and repair the fault.

[0137] It should be noted that the screen mentioned in this application may refer to the monitor connected to the personal host, or it may be a remote display, etc. The specific display method corresponding to this screen should not be a limitation of this application.

[0138] In conjunction with the above embodiments, in one implementation, this application also provides a processor fault detection method, including the following:

[0139] First, when a screen malfunctions, the server's baseboard management controller parses the error messages reported by the basic input / output system. The error messages reported by the basic input / output system include at least one of the following: processor type mismatch error messages, microcode reading failure error messages, and microcode loading failure error messages.

[0140] The parsing results are then displayed through the user interface of the server's baseboard management controller.

[0141] In this embodiment, as described above, after the server's baseboard management controller receives error information reported by the basic input / output system, it first performs preliminary processing on error information such as processor type mismatch, microcode reading failure, or microcode loading failure, and then displays the error information to the user through the display screen. However, when the screen also malfunctions, this embodiment also proposes a method where the server's baseboard management controller parses the error information and displays the parsing result, which is the error information, to the user through a user-accessible user interface.

[0142] In an alternative embodiment, as described above, users can access BMC's BMC WEB to obtain server fault information and records such as the time of the fault. This information can also be obtained through the BMC WEB, facilitating users to fully analyze potential problems.

[0143] It should be noted that the visualization of error information proposed in this application includes both displaying error information on the screen and displaying error information through the user interface of the server's baseboard management controller. Both can coexist and serve as backups for each other to ensure the reliability of the processor fault detection method proposed in this application.

[0144] In conjunction with the above embodiments, in one implementation, this application also provides a processor fault detection method, which compares the processor type with a preset type, determines that the processor is faulty when the processor type is inconsistent with the preset type, and reports the processor type mismatch error information to the server's baseboard management controller, including the following:

[0145] First, the processor type is compared with the corresponding preset type in turn. The processor types include the first processor type, the second processor type, the third processor type, and the fourth processor type.

[0146] In this embodiment of the application, there is more than one type of processor. For each processor type, the server stores a corresponding preset type. Therefore, it is necessary to compare each processor type with the preset type to determine whether the processor is faulty. When a fault exists, the error information that a specific processor type does not match the preset type is reported to the baseboard management controller of the server.

[0147] Then, when the first processor type is inconsistent with the first preset type, it is determined that the processor is faulty, and the error message of the first processor type mismatch is reported to the baseboard management controller of the server; when the second processor type is inconsistent with the second preset type, it is determined that the processor is faulty, and the error message of the second processor type mismatch is reported to the baseboard management controller of the server; when the third processor type is inconsistent with the third preset type, it is determined that the processor is faulty, and the error message of the third processor type mismatch is reported to the baseboard management controller of the server; when the fourth processor type is inconsistent with the fourth preset type, it is determined that the processor is faulty, and the error message of the fourth processor type mismatch is reported to the baseboard management controller of the server.

[0148] In this embodiment, each processor type is compared with a preset type. If any processor type is inconsistent with the preset type, the processor is identified as faulty, and the inconsistent processor type information is reported to the baseboard management controller of the server for more accurate fault location in the future.

[0149] In one alternative embodiment, the first processor type can be CBO Count / List, the second processor type can be M3KTI Count, the third processor type can be Processor Socket Ways, and the fourth processor type can be Stepping.

[0150] In conjunction with the above embodiments, in one implementation, this application also provides a processor fault detection method, which further includes the following before sequentially comparing the processor type with the corresponding preset type:

[0151] First, during the power-on self-test phase of the basic input / output system, the initial value of the flag is set to "no". The flag is used to indicate whether to report the error message of processor type mismatch to the server's baseboard management controller.

[0152] In this embodiment, after determining whether the processor type does not match a preset type, the basic input / output system needs to determine whether the above information needs to be reported to the server's baseboard management controller. Therefore, this application determines whether it needs to report to the server's baseboard management controller by judging the value of a flag bit. First, during the power-on self-test phase, the basic input / output system needs to set the initial value of the flag bit to "no," indicating that it is not necessary to report processor fault information to the server's baseboard management controller at this time.

[0153] Then, the processor type is compared with the corresponding preset type in turn, and the flag bit is assigned a value according to the comparison result;

[0154] In this embodiment of the application, as described above, after comparing each processor type with its corresponding preset type, it is determined whether the processor is faulty based on the comparison result. Based on the determination result of whether the processor is faulty, a flag bit is assigned a value, which serves as the basis for subsequent determination of whether the baseboard management controller needs to report the processor fault information to the server.

[0155] Finally, read the current value of the flag bit: when the flag bit is set to no, the processor has no fault and continues to execute the power-on self-test phase of the basic input / output system; when the flag bit is set to yes, it is determined that the processor has a fault and the processor type mismatch error message is reported to the baseboard management controller of the server.

[0156] In this embodiment, after comparing the expected preset types of each processor type, a check is performed on the flag bit assignment. If the flag bit is set to no, it means that the comparison results of each processor type with its preset type are consistent, and the processor is not faulty. Then, other detection contents of the power-on self-test stage of the basic input / output system can continue to be executed. However, if the flag bit is set to yes, it means that there is a situation where the comparison results of the processor type with its preset type are inconsistent. This indicates that the processor is faulty, and the error information of one or more processor types not matching needs to be reported to the baseboard management controller of the server for subsequent user problem analysis.

[0157] In conjunction with the above embodiments, in one implementation, this application also provides a processor fault detection method, which compares the processor type sequentially with a corresponding preset type, assigns a value to a flag bit based on the comparison result, and further includes the following:

[0158] First, read the first processor type and compare it with the first preset type. When the first processor type and the first preset type are the same, continue to the next step of comparing the processor type with the preset type.

[0159] Then, when the first processor type and the first preset type are inconsistent, the flag bit is set to yes, and the next step of comparing the processor type with the preset type continues;

[0160] Finally, the flag bit is read and assigned a value. When the flag bit is assigned a value of "yes", it is determined that there is a fault in the processor, and the error message of the first processor type mismatch is reported to the baseboard management controller of the server.

[0161] In this embodiment of the application, as described above, it is necessary to compare each processor type with its corresponding preset type in sequence. Taking the first processor type as an example, when the first processor type is consistent with the first preset type, it means that the first processor type is matched, and the judgment of the second processor type continues. When the first processor type is inconsistent with the first preset type, it is determined that the first processor type is mismatched, and the mismatch information is recorded and the initial value of the flag is changed to yes. When the flag is yes, it is determined that the first processor has a fault, and the corresponding mismatch information needs to be reported to the baseboard management controller of the server for further analysis.

[0162] In conjunction with the above embodiments, in one implementation, this application also provides a processor fault detection method, which, in continuing the next step of comparing the processor type with a preset type, further includes the following:

[0163] First, read the second processor type and compare it with the second preset type. When the second processor type matches the second preset type, continue to the next step of comparing the processor type with the preset type.

[0164] Then, when the second processor type is inconsistent with the second preset type, the flag is set to "yes", and the process continues to the next step of comparing the processor type with the preset type.

[0165] Finally, the flag bit is read and assigned a value. When the flag bit is assigned a value of "yes", it is determined that there is a fault in the processor, and the error message of the second processor type mismatch is reported to the baseboard management controller of the server.

[0166] In this embodiment of the application, as described above, each processor type needs to be compared and judged with its corresponding preset type in turn. After the first processor type is judged, the second processor type needs to be judged. The specific implementation process is similar to the first processor type judgment process, and will not be described again here.

[0167] For example, the implementation process is shown in Figure 3, which is a flowchart of a processor type determination method proposed in an embodiment of this application. First, the initial value of the flag bit is set to "No". Then, each processor type is determined sequentially. If the processor type does not match the preset type, the flag bit is changed to "Yes", and the next processor type matching determination is performed. If the processor type matches the preset type, the next processor type matching determination is performed directly. After the matching determination of each processor type is completed, the flag bit is reassigned. If the flag bit is set to "No", the process ends; if the flag bit is set to "Yes", the specific processor mismatch information is reported to the baseboard management controller of the server.

[0168] In conjunction with the above embodiments, in one implementation, this application also provides a processor fault detection method to determine whether processor microcode loading is successful. When processor microcode loading fails, the error message of unsuccessful microcode loading is reported to the baseboard management controller of the server. The method further includes the following:

[0169] First, read the processor microcode and set its address and size.

[0170] In this embodiment of the application, as described above, when the processor microcode can be read, it is still necessary to continue loading and judging the processor microcode. First, the processor microcode needs to be read, and the address and size of the processor microcode are set according to the read processor microcode for subsequent judgment processes.

[0171] In one alternative embodiment, the PcdCpuMicrocodePatchAddress and PcdCpuMicrocodePatchRegionSize are set via the basic input / output system according to different operating systems to represent the address and size of the processor microcode, and subsequent judgments are made based on the settings.

[0172] Then, based on the address and size of the processor microcode, it is determined whether the processor microcode has been successfully loaded; when the processor microcode fails to load, the error message of unsuccessful microcode loading is reported to the baseboard management controller of the server.

[0173] In this embodiment, after setting the address and size of the processor microcode, it is necessary to use the relevant information of the set processor microcode to determine whether the processor microcode has been successfully loaded. When the processor microcode can be successfully loaded, it is determined that the processor microcode has passed the verification and can proceed to other steps in the power-on self-test. When the processor microcode fails to load, it is determined that the processor has a fault and the error message of unsuccessful microcode loading needs to be reported to the baseboard management controller of the server.

[0174] For example, the implementation process is shown in Figure 4. Figure 4 is a flowchart of a processor microcode judgment process proposed in an embodiment of this application. First, the processor microcode needs to be read. If the processor microcode cannot be read successfully, it is determined that the processor is faulty, and the error message of unsuccessful microcode reading is reported to the baseboard management controller of the server. If the microcode is read successfully, the address and size need to be set according to the read processor microcode. After the setting is completed, the processor microcode loading judgment is performed. If the processor microcode can be loaded successfully, it is determined that the processor microcode has passed the verification and can proceed to other steps in the power-on self-test. If the processor microcode loading fails, it is determined that the processor is faulty, and the error message of unsuccessful microcode loading needs to be reported to the baseboard management controller of the server.

[0175] In conjunction with the above embodiments, in one implementation, this application also provides a processor fault detection method, which further includes the following:

[0176] When multiple processors are present, during the power-on self-test phase of the basic input / output system, read the processor type and processor microcode.

[0177] The processor type of each processor is compared with the preset type. When the processor type is inconsistent with the preset type, it is determined that the processor is faulty, and the error message of processor type mismatch is reported to the baseboard management controller of the server.

[0178] Following the above content, it also includes:

[0179] The processor microcode of each processor is read. If the processor microcode is not read, an error message indicating that the microcode reading was unsuccessful is reported to the baseboard management controller of the server.

[0180] It determines whether the processor microcode loading of each processor is successful. When the processor microcode loading fails, the error message of unsuccessful microcode loading is reported to the baseboard management controller of the server.

[0181] In this embodiment, a server environment may contain multiple different processors, each performing its own corresponding function. Similarly, during the power-on self-test (POST) phase of the basic input / output system, processor fault detection needs to be performed on each processor to ensure the system can function normally and to specifically identify which processor is malfunctioning and what kind of fault it is. The specific method is as described above: each processor is compared with a preset type, its microcode is read, and its microcode loading is checked. If all the above detection steps pass, the subsequent POST steps continue. If any processor detection step fails, its specific error information needs to be reported to the server's baseboard management controller for subsequent problem localization and diagnosis.

[0182] In conjunction with the above embodiments, in one implementation, this application also provides a processor fault detection method, which, after reporting the error information to the server's baseboard management controller, specifically includes the following:

[0183] After receiving an error message, the server's baseboard management controller records a problem log; based on the problem log, it reads the error message and locates the fault.

[0184] In this embodiment, after the server's baseboard management controller receives an error message, it can not only display the error message to the user through a screen or user interface, facilitating timely fault location and analysis, but also store the error message in a problem log. When subsequent analysis of processor faults is needed, the problem log stored in the server's baseboard management controller can be used to review past processor faults, facilitating information integration, finding commonalities among multiple historical problems, and more accurately locating the fault, which is beneficial for subsequent use by the user.

[0185] Based on the same design concept, one embodiment of this application provides a processor fault detection device. Referring to FIG5, FIG5 is a structural block diagram of a processor fault detection device provided in an embodiment of this application. As shown in FIG5, the device includes:

[0186] The read module is configured to read the server's processor type and processor microcode during the power-on self-test phase of the basic input / output system.

[0187] The processor type comparison module is configured to compare the processor type with a preset type. When the processor type is inconsistent with the preset type, it determines that the processor is faulty and reports the processor type mismatch error information to the baseboard management controller of the server.

[0188] The processor microcode reading module is configured to read the processor microcode. When the processor microcode is not read, an error message indicating that the microcode reading was unsuccessful is reported to the baseboard management controller of the server.

[0189] The processor microcode loading module determines whether the processor microcode loading is successful. When the processor microcode loading fails, it reports the error message of unsuccessful microcode loading to the baseboard management controller of the server.

[0190] Optionally, the processor fault detection device further includes:

[0191] The error message printing module is configured to print error messages reported by the basic input / output system on the self-test page;

[0192] The error message display module is configured to display error messages reported by the basic input / output system on the screen. The error messages reported by the basic input / output system include at least one of the following: processor type mismatch error message, microcode reading failure error message, and microcode loading failure error message.

[0193] Optionally, the processor fault detection device further includes:

[0194] The error message parsing module is configured to parse the error messages reported by the basic input / output system when a screen failure occurs. The error messages reported by the basic input / output system include at least one of the following: processor type mismatch error messages, microcode reading failure error messages, and microcode loading failure error messages.

[0195] The parsing result display module is configured to display the parsing results through the user interface of the server's baseboard management controller.

[0196] Optionally, the processor type comparison module also includes:

[0197] The processor type comparison submodule is configured to compare the processor type with the corresponding preset type in sequence. The processor types include the first processor type, the second processor type, the third processor type, and the fourth processor type.

[0198] The first processor fault determination submodule is configured to determine that the processor is faulty when the first processor type is inconsistent with the first preset type, and to report the error information of the first processor type mismatch to the baseboard management controller of the server.

[0199] The second processor fault determination submodule is configured to determine that the processor is faulty when the second processor type is inconsistent with the second preset type, and to report the error information of the second processor type mismatch to the baseboard management controller of the server.

[0200] The third processor fault determination submodule is configured to determine that the processor is faulty when the third processor type is inconsistent with the third preset type, and to report the error message of the third processor type mismatch to the baseboard management controller of the server.

[0201] The fourth processor fault determination submodule is configured to determine that the processor is faulty when the fourth processor type is inconsistent with the fourth preset type, and to report the error information of the fourth processor type mismatch to the baseboard management controller of the server.

[0202] Optionally, the processor type comparison module also includes:

[0203] The flag setting submodule is configured to set the initial value of the flag to No during the power-on self-test phase of the basic input / output system. The flag is used to indicate whether to report the processor type mismatch error information to the baseboard management controller of the server.

[0204] The flag assignment submodule is configured to compare the processor type with the corresponding preset type in sequence, and assign a value to the flag bit according to the comparison result;

[0205] The flag reading submodule is configured to read the current value of the flag.

[0206] The first fault judgment submodule is configured such that when the flag bit is set to no, the processor does not have a fault and continues to execute the power-on self-test phase of the basic input / output system.

[0207] The second fault determination submodule is configured to determine that the processor has a fault when the flag bit is set to "yes", and report the processor type mismatch error information to the baseboard management controller of the server.

[0208] Optionally, the flag assignment submodule also includes:

[0209] The first processor type reading unit is configured to read the first processor type, compare the first processor type with the first preset type, and when the first processor type and the first preset type are consistent, continue to the next processor type and preset type comparison step.

[0210] The first flag assignment unit is configured to assign the flag to "yes" when the first processor type and the first preset type are inconsistent, and continue to the next step of comparing the processor type with the preset type.

[0211] The flag reading unit is configured to read the flag assignment.

[0212] The first error information reporting unit is configured to determine that the processor has a fault when the flag bit is set to "yes", and report the error information of the first processor type mismatch to the baseboard management controller of the server.

[0213] Optionally, the flag assignment submodule also includes:

[0214] The second processor type reading unit is configured to read the second processor type, compare the second processor type with the second preset type, and when the second processor type and the second preset type are the same, continue to the next processor type and preset type comparison step.

[0215] The second flag assignment unit is configured to assign a value of "yes" to the flag when the second processor type is inconsistent with the second preset type, and then continue to the next step of comparing the processor type with the preset type.

[0216] The flag reading unit is configured to read the flag assignment.

[0217] The second error information reporting unit is configured to determine that the processor has a fault when the flag bit is set to "yes", and report the error information of the second processor type mismatch to the baseboard management controller of the server.

[0218] Optionally, the processor microcode loading module includes:

[0219] The configuration submodule is set to read the processor microcode and set the address and size of the processor microcode;

[0220] The processor microcode loading judgment submodule is configured to determine whether the processor microcode has been successfully loaded based on the address and size of the processor microcode.

[0221] The microcode loading failure reporting submodule is configured to report the error message of unsuccessful microcode loading to the baseboard management controller of the server when the processor microcode loading fails.

[0222] Optional:

[0223] The read module is also configured to read the processor type and processor microcode during the power-on self-test phase of the basic input / output system when multiple processors are present.

[0224] The processor type comparison module is also configured to compare the processor type of each processor with a preset type. When the processor type is inconsistent with the preset type, it is determined that the processor is faulty and the error message of processor type mismatch is reported to the baseboard management controller of the server.

[0225] Optional:

[0226] The processor microcode reading module is also configured to read the processor microcode of each processor. When the processor microcode is not read, an error message indicating that the microcode reading was unsuccessful is reported to the baseboard management controller of the server.

[0227] The processor microcode loading module is also configured to determine whether the processor microcode loading of each processor is successful. When the processor microcode loading fails, the error message of unsuccessful microcode loading is reported to the baseboard management controller of the server.

[0228] Optionally, the processor fault detection device further includes:

[0229] The problem logging module is configured to record problem logs after the server's baseboard management controller receives error information;

[0230] The problem log reading module is configured to read error information from the problem log and locate the fault location.

[0231] Based on the same design concept, another embodiment of this application provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps in the processor fault detection method of any of the above embodiments of this application.

[0232] Based on the same design concept, another embodiment of this application provides an electronic device, as shown in FIG6. FIG6 is a schematic diagram of an electronic device according to an embodiment of this application. The electronic device includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When executed by the processor, the program implements the steps of the processor fault detection method in any of the above embodiments of this application.

[0233] As the device embodiment is basically similar to the method embodiment, the description is relatively simple, and relevant parts can be found in the description of the method embodiment.

[0234] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0235] Those skilled in the art will understand that embodiments of this application can be provided as methods, apparatus, or computer program products. Therefore, embodiments of this application can take the form of entirely hardware embodiments, entirely software embodiments, or embodiments combining software and hardware aspects. Furthermore, embodiments of this application can take the form of computer program products implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The storage medium can be a non-volatile readable storage medium.

[0236] This application describes embodiments with reference to flowchart illustrations and / or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of this application. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, create means for implementing the functions specified in one or more blocks of the flowchart illustrations and / or one or more blocks of the block diagrams.

[0237] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing terminal device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means that implement the functions specified in one or more flowcharts and / or one or more block diagrams.

[0238] These computer program instructions may also be loaded onto a computer or other programmable data processing terminal equipment to cause a series of operational steps to be performed on the computer or other programmable terminal equipment to produce a computer-implemented process, such that the instructions, which execute on the computer or other programmable terminal equipment, provide steps for implementing the functions specified in one or more flowcharts and / or one or more block diagrams.

[0239] Although optional embodiments of the present application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the optional embodiments as well as all changes and modifications falling within the scope of the embodiments of the present application.

[0240] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or terminal device. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or terminal device that includes said element.

[0241] The present application provides a detailed description of a processor fault detection method, apparatus, device, medium, and product. Specific examples have been used to illustrate the principles and implementation methods of the present application. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present application. At the same time, those skilled in the art will recognize that there will be changes in the specific implementation methods and application scope based on the ideas of the present application. Therefore, the content of this specification should not be construed as a limitation of the present application.

Claims

1. [Amended according to Rule 26, 07.08.2025] A processor fault detection method, characterized in that, Basic input / output systems used in servers include: During the power-on self-test phase of the basic input / output system, the processor type and processor microcode of the server are read. The processor type is used to describe the basic information of the processor, and the processor microcode is used to describe the operating mode of the processor. The processor type is compared with a preset type. If the processor type is inconsistent with the preset type, it is determined that the processor is faulty, and the error message of the processor type mismatch is reported to the baseboard management controller of the server. The processor microcode is read, and if the processor microcode is not read, an error message indicating that the microcode reading was unsuccessful is reported to the baseboard management controller of the server. The system determines whether the processor microcode loading was successful. If the processor microcode loading fails, the error message indicating that the microcode loading was unsuccessful is reported to the baseboard management controller of the server.

2. [Revised according to Rule 26, 07.08.2025] A processor fault detection method according to claim 1, characterized in that, Also includes: Print the error messages reported by the basic input / output system on the self-test page; The error messages reported by the Basic Input / Output System are displayed on the screen. The error messages reported by the Basic Input / Output System include at least one of the following: processor type mismatch error message, microcode reading failure error message, and microcode loading failure error message.

3. [Amended according to Rule 26, 07.08.2025] A processor fault detection method according to claim 2, characterized in that, Also includes: When a screen malfunctions, the server's baseboard management controller parses the error information reported by the basic input / output system. The error information reported by the basic input / output system includes at least one of the following: processor type mismatch error information, microcode reading failure error information, and microcode loading failure error information. The parsing results are displayed through the user interface of the baseboard management controller on the server.

4. [Amended according to Rule 26, 07.08.2025] A processor fault detection method according to claim 1, characterized in that, The processor type is compared with a preset type. If the processor type does not match the preset type, a processor fault is determined, and the error message indicating the processor type mismatch is reported to the baseboard management controller of the server. This includes: The processor type is compared sequentially with the corresponding preset type, and the processor type includes a first processor type, a second processor type, a third processor type, and a fourth processor type; When the first processor type is inconsistent with the first preset type, it is determined that the processor is faulty, and the error message of the first processor type mismatch is reported to the baseboard management controller of the server. When the second processor type is inconsistent with the second preset type, it is determined that the processor is faulty, and the error message of the mismatch between the second processor type is reported to the baseboard management controller of the server. When the third processor type is inconsistent with the third preset type, it is determined that the processor is faulty, and the error message of the third processor type mismatch is reported to the baseboard management controller of the server. When the fourth processor type is inconsistent with the fourth preset type, it is determined that the processor is faulty, and the error message of the fourth processor type mismatch is reported to the baseboard management controller of the server.

5. [Amended according to Rule 26, 07.08.2025] A processor fault detection method according to claim 4, characterized in that, Before comparing the processor type with the corresponding preset type in sequence, the process also includes: During the power-on self-test phase of the basic input / output system, the initial value of the flag bit is set to "no". The flag bit is used to indicate whether to report the error information of processor type mismatch to the baseboard management controller of the server. The processor type is compared sequentially with the corresponding preset type, and the flag bit is assigned a value based on the comparison result; Read the current value of the flag bit; When the flag bit is set to no, the processor has no fault and continues to execute the power-on self-test phase of the basic input / output system; When the flag is set to "yes", a processor fault is determined, and an error message indicating a processor type mismatch is reported to the baseboard management controller of the server.

6. [Amended according to Rule 26 07.08.2025] A processor fault detection method according to claim 5, characterized in that, The processor type is compared sequentially with the corresponding preset type, and the flag bit is assigned a value based on the comparison result, including: Read the first processor type, compare the first processor type with the first preset type, and when the first processor type and the first preset type are the same, continue to the next step of comparing the processor type with the preset type; When the first processor type and the first preset type are inconsistent, the flag bit is set to yes, and the next step of comparing the processor type with the preset type is continued. Read the flag bit and assign a value; When the flag is set to "yes", a processor fault is determined, and an error message indicating a first processor type mismatch is reported to the baseboard management controller of the server.

7. [Amended according to Rule 26, 07.08.2025] A processor fault detection method according to claim 6, characterized in that, Continue with the next step of comparing the processor type with the preset type, including: Read the second processor type, compare the second processor type with the second preset type, and when the second processor type and the second preset type are the same, continue to the next step of comparing the processor type with the preset type; When the second processor type and the second preset type are inconsistent, the flag bit is set to "yes", and the process continues to the next step of comparing the processor type with the preset type. Read the flag bit and assign a value; When the flag is set to "yes", a processor fault is determined, and an error message indicating a mismatch between the second processor type is reported to the baseboard management controller of the server.

8. [Amended according to Rule 26, 07.08.2025] A processor fault detection method according to claim 5, characterized in that, Assigning a value to the flag bit based on the comparison result includes: determining whether the processor is faulty based on the comparison result; and assigning a value to the flag bit based on the determination result of whether the processor is faulty.

9. [Amended according to Rule 26, 07.08.2025] A processor fault detection method according to claim 1, characterized in that, Determine whether the processor microcode loading was successful. If the processor microcode loading fails, report the error message of unsuccessful microcode loading to the baseboard management controller of the server, including: Read the processor microcode and set the address and size of the processor microcode; Based on the address and size of the processor microcode, determine whether the processor microcode has been successfully loaded; When the processor microcode loading fails, the error message indicating unsuccessful microcode loading is reported to the baseboard management controller of the server.

10. [Amended according to Rule 26 07.08.2025] A processor fault detection method according to claim 1, characterized in that, After determining whether the processor microcode has been successfully loaded based on its address and size, the method further includes: when the processor microcode is successfully loaded, determining that the processor microcode has passed verification, and proceeding to determine other steps in the power-on self-test.

11. [Amended according to Rule 26 07.08.2025] A processor fault detection method according to claim 1, characterized in that, Also includes: When multiple processors are present, during the power-on self-test phase of the basic input / output system, read the processor type and processor microcode. The processor type of each processor is compared with a preset type. If the processor type is inconsistent with the preset type, it is determined that the processor is faulty, and the error message of processor type mismatch is reported to the baseboard management controller of the server.

12. [Amended according to Rule 26, 07.08.2025] A processor fault detection method according to claim 11, characterized in that, Also includes: The processor microcode of each processor is read. If the processor microcode is not read, an error message indicating that the microcode reading was unsuccessful is reported to the baseboard management controller of the server. The system determines whether the processor microcode loading of each processor is successful. If the processor microcode loading fails, the error message of unsuccessful microcode loading is reported to the baseboard management controller of the server.

13. [Amended according to Rule 26 07.08.2025] A processor fault detection method according to any one of claims 1-12, characterized in that, After reporting the error information to the baseboard management controller of the server, the following is also included: Upon receiving the error message, the server's baseboard management controller records a problem log. Based on the problem log, read the error information and locate the fault location.

14. [Amended according to Rule 26 07.08.2025] A processor fault detection method according to claim 1, characterized in that, After comparing the processor type with a preset type, the method further includes: when the processor type matches the preset type, determining that the processor matches the server, and continuing subsequent self-test operations.

15. [Amended according to Rule 26 07.08.2025] A processor fault detection method according to claim 1, characterized in that, After determining whether the processor microcode loading is successful, the method further includes: when the processor microcode loading is successful, determining that the processor microcode-related information is correct, and continuing to perform other self-test steps.

16. [Amended according to Rule 26, 07.08.2025] A processor fault detection device, characterized in that, The device includes: The read module is configured to read the server's processor type and processor microcode during the power-on self-test phase of the basic input / output system. The processor type comparison module is configured to compare the processor type with a preset type. When the processor type is inconsistent with the preset type, it is determined that the processor is faulty, and the error information of the processor type mismatch is reported to the baseboard management controller of the server. The processor microcode reading module is configured to read the processor microcode, and when the processor microcode is not read, it reports an error message indicating that the microcode reading was unsuccessful to the baseboard management controller of the server. The processor microcode loading module determines whether the processor microcode loading is successful. When the processor microcode loading fails, it reports the error message of unsuccessful microcode loading to the baseboard management controller of the server.

17. [Amended according to Rule 26, 07.08.2025] A processor fault detection device according to claim 16, characterized in that, The processor fault detection device further includes: The error message printing module is configured to print error messages reported by the basic input / output system on the self-test page; The error message display module is configured to display error messages reported by the basic input / output system on the screen. The error messages reported by the basic input / output system include at least one of the following: processor type mismatch error message, microcode reading failure error message, and microcode loading failure error message.

18. [Amended according to Rule 26, 07.08.2025] An electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the computer program is executed by the processor, it implements the processor fault detection method as described in any one of claims 1 to 15.

19. [Amended according to Rule 26, 07.08.2025] A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the processor fault detection method as described in any one of claims 1 to 15.

20. [Amended according to Rule 26, 07.08.2025] A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the processor fault detection method as described in any one of claims 1-15.

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