Display device driving circuit and display panel

Abstract

A display device driving circuit and a display panel. The display device driving circuit comprises: a first light-emitting unit (OLED1), a second light-emitting unit (OLED2) and a third light-emitting unit (OLED3), which are partially stacked; and a pixel driving circuit (100), which is connected to the first light-emitting unit (OLED1), the second light-emitting unit (OLED2) and the third light-emitting unit (OLED3), and is used for driving the first light-emitting unit (OLED1), the second light-emitting unit (OLED2) and the third light-emitting unit (OLED3) to emit light in a time-division manner. The pixel driving circuit (100) comprises: a driving circuit (10), which is connected to anodes of the first light-emitting unit (OLED1), the second light-emitting unit (OLED2) and the third light-emitting unit (OLED3), and is used for providing a driving signal; and a switching circuit (20), which is arranged between the driving circuit (10) and the anodes of the first light-emitting unit (OLED1), the second light-emitting unit (OLED2) and the third light-emitting unit (OLED3), and is used for controlling the driving circuit (10) to sequentially drive the first light-emitting unit (OLED1), the second light-emitting unit (OLED2) and the third light-emitting unit (OLED3) to emit light. The display device driving circuit reduces the occupied area of a pixel driving circuit (100), and improves the luminous efficiency of a display panel.

Description

Display device driving circuit and display panel

[0001] Cross-referencing of related applications

[0002] This application claims priority to Chinese Patent Application No. 2024115587591, filed on November 4, 2024, the entire contents of which are incorporated herein by reference. [Technical Field]

[0003] This invention relates to the field of display panels, and in particular to display device driving circuits and display panels. [Background Technology]

[0004] Tandem OLED, or stacked evaporation display technology, is a device structure that connects multiple light-emitting units in series through a charge generation layer. Tandem OLED is a novel display technology. Its principle is to use a transparent connecting layer to connect several light-emitting devices in series. Specifically, an OLED pixel consists of an anode, a cathode, and multiple layers of organic material sandwiched in between. When current flows, the anode emits holes, and the cathode emits electrons. These holes and electrons meet and recombine in the organic layers, producing light. In a tandem OLED, this structure is replicated twice, forming two light-emitting layers connected by a charge generation layer (CGL). When current flows, some holes and electrons recombine in the first light-emitting layer to emit light, while the remaining holes and electrons pass through the CGL and recombine again in the second light-emitting layer to emit light.

[0005] Compared to traditional single-layer OLEDs, Tandem OLEDs offer several advantages. First, they achieve more than double the brightness. Second, Tandem OLEDs consume less power; compared to single-layer OLEDs, they are more efficient and consume less energy when displaying the same brightness. Third, their device lifespan is more than four times longer, effectively mitigating the common "burn-in" problem in OLED screens. Furthermore, while achieving high brightness, Tandem OLEDs can reduce the number of optical components and simplify circuitry, resulting in reduced weight and thickness.

[0006] Furthermore, OLED-related technical documents explore color-mixing stacking from multiple perspectives: by stacking two or more light-emitting materials from RGB pixels, and utilizing the transparency of OLEDs during their non-emissive phase, when only one RGB color OLED emits light, the emitted colored light passes through the transparent OLED light-emitting material in the light-emitting path. In scenarios requiring light mixing, different duty cycles of RGB or the desired optical primary colors are emitted sequentially at different times within the same cycle, enabling pixel groups to display different colors. Using this color-mixing stacked OLED structure in conjunction with time-division multiplexing light-emitting logic can effectively increase display resolution. However, with market demands, especially in the micro-display field, the requirements for display resolution are increasing, making miniaturization of pixel driving circuits difficult. When using color-mixing stacked OLED technology, the space for the original RGB-corresponding pixel circuits is further compressed. Therefore, the need to develop entirely new driving solutions is attracting the attention of engineers. [Summary of the Invention]

[0007] The main technical problem addressed by this application is to provide a display device driving circuit and a display panel to improve the resolution of stacked OLEDs.

[0008] To address the aforementioned problems, this application provides a display device driving circuit in a first aspect, comprising: a first light-emitting unit, a second light-emitting unit, and a third light-emitting unit partially stacked; a pixel driving circuit connected to the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit, for time-division multiplexing the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit to emit light; the pixel driving circuit comprising: a driving circuit connected to the anodes of the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit, for providing driving signals to the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit; and a switching circuit comprising a first switching transistor, a second switching transistor, and a third switching transistor, respectively disposed between the driving circuit and the anodes of the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit, for controlling the driving circuit to sequentially drive the first light-emitting unit to emit light, the second light-emitting unit to emit light, and the third light-emitting unit to emit light.

[0009] The driving circuit includes: a driving transistor, the first electrode of which is connected to a power supply line, and the second electrode of which is connected to the anode of the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit through the switching circuit; and a storage circuit, which is connected to the gate of the driving transistor and is used to store the gate voltage charged into the driving transistor.

[0010] The storage circuit includes a first capacitor storing a first data voltage, a second capacitor storing a second data voltage, and a third capacitor storing a third data voltage, so as to drive the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit to emit light respectively during the light-emitting stage.

[0011] The light-emitting stages include a first light-emitting stage, a second light-emitting stage, and a third light-emitting stage; the first plate of the first capacitor is connected to the power line, and the second plate of the first capacitor is connected to the first data line, for storing a first data voltage during the storage stage; the first plate of the second capacitor is connected to the power line, and the second plate of the second capacitor is connected to the second data line, for storing a second data voltage during the storage stage; the first plate of the third capacitor is connected to the power line, and the second plate of the third capacitor is connected to the third data line, for storing a third data voltage during the storage stage.

[0012] The storage circuit further includes: a fourth switching transistor disposed between the second plate of the first capacitor and the gate of the driving transistor, used to control the second plate of the first capacitor to be connected to the gate of the driving transistor during the first light-emitting phase, so as to transmit a driving voltage containing the first data voltage to the gate of the driving transistor; a fifth switching transistor disposed between the second plate of the second capacitor and the gate of the driving transistor, used to control the second plate of the second capacitor to be connected to the gate of the driving transistor during the second light-emitting phase, so as to transmit a driving voltage containing the second data voltage to the gate of the driving transistor; and a sixth switching transistor disposed between the third plate of the third capacitor and the gate of the driving transistor, used to control the second plate of the third capacitor to be connected to the gate of the driving transistor during the third light-emitting phase, so as to transmit a driving voltage containing the third data voltage to the gate of the driving transistor.

[0013] The fourth, fifth, and sixth switching transistors are time-divisionally turned on during the light-emitting phase.

[0014] The fourth switching transistor is connected to the gate of the first switching transistor via a first scan line, and is simultaneously turned on during the first light-emitting stage to drive the first light-emitting unit to emit light under a first driving voltage; the fifth switching transistor is connected to the gate of the second switching transistor via a second scan line, and is simultaneously turned on during the second light-emitting stage to drive the second light-emitting unit to emit light under a second driving voltage; the sixth switching transistor is connected to the gate of the third switching transistor via a third scan line, and is simultaneously turned on during the third light-emitting stage to drive the third light-emitting unit to emit light under a third driving voltage.

[0015] The storage circuit further includes a storage capacitor; the first plate of the storage capacitor is connected to the power line, and the second plate of the storage capacitor is connected to the gate of the driving transistor and the second electrode of the driving transistor, respectively, so that the storage capacitor stores a driving voltage containing the threshold voltage of the driving transistor during the sampling phase.

[0016] The second plate of the storage capacitor is also connected to the first plates of the first capacitor, the second capacitor, and the third capacitor, respectively, for use in series with the first capacitor, the second capacitor, and the third capacitor during the light-emitting stage, so as to transmit a driving voltage containing the threshold voltage and data voltage of the driving transistor to the gate of the driving transistor; wherein the data voltage includes a first data voltage, a second data voltage, and a third data voltage.

[0017] The storage circuit further includes: a seventh switching transistor disposed between the first plate of the storage capacitor and the power line, wherein the gate of the seventh switching transistor is connected to the first control line, the first electrode is connected to the power line, and the second electrode is connected to the first plate of the storage capacitor, for controlling the storage capacitor to have a storage function; and an eighth switching transistor disposed between the second plate of the storage capacitor and the gate of the driving transistor, wherein the gate of the eighth switching transistor is connected to the second control line, the first electrode is connected to the second plate of the storage capacitor and the second electrode of the driving transistor, and the second electrode is connected to the gate of the driving transistor, for controlling the power line, the driving transistor, and the storage capacitor to form a sampling loop during the sampling phase, so that the storage capacitor stores the threshold voltage of the driving transistor during the sampling phase.

[0018] The storage circuit further includes a ninth switching transistor, disposed between the power line and the first plate of the first capacitor, the second capacitor, and the third capacitor, for controlling the first capacitor, the second capacitor, and the third capacitor to have a storage function during the storage phase.

[0019] In the storage phase, the first data line, the second data line, and the third data line transmit data signals to the first capacitor, the second capacitor, and the third capacitor, respectively, so that the first capacitor stores a first data voltage, the second capacitor stores a second data voltage, and the third capacitor stores a third data voltage.

[0020] The gate of the ninth switching transistor is connected to the first control line, and the ninth switching transistor and the seventh switching transistor are a pair of transistors with opposite driving characteristics; wherein, during the storage phase, the first control line controls the ninth switching transistor to be turned on and controls the seventh switching transistor to be turned off.

[0021] The seventh switching transistor is in an on state during the light-emitting phase, so that the storage capacitor and the first capacitor can transmit a driving voltage containing the threshold voltage of the driving transistor and the first data voltage to the gate of the driving transistor during the first light-emitting phase; the storage capacitor and the second capacitor can transmit a driving voltage containing the threshold voltage of the driving transistor and the second data voltage to the gate of the driving transistor during the second light-emitting phase; and the storage capacitor and the third capacitor can transmit a driving voltage containing the threshold voltage of the driving transistor and the third data voltage to the gate of the driving transistor during the third light-emitting phase.

[0022] The driving circuit further includes a reset transistor; the gate of the reset transistor is connected to a reset control line, the first electrode of the reset transistor is connected to a reset signal line, and the second electrode of the reset transistor is connected to the gate of the driving transistor and the anode of the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit, for charging a reset voltage to the gate of the driving transistor and the anode of the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit during the reset phase.

[0023] The driving transistor is a P-type transistor.

[0024] The pixel driving circuit further includes a tenth switching transistor disposed between the driving circuit and the switching circuit; the gate of the tenth switching transistor is connected to the switching signal line, the first electrode of the tenth switching transistor is connected to the driving circuit, and the second electrode of the tenth switching transistor is connected to the switching circuit.

[0025] The switching signal is a periodic switching signal, and the tenth switching transistor is used to control the brightness of the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit during the light-emitting phase.

[0026] To address the aforementioned issues, this application provides a display panel in a second aspect, wherein the display panel includes a substrate and a display device driving circuit disposed on the substrate as described in any embodiment of the first aspect.

[0027] The first light-emitting unit is stacked with the second light-emitting unit and / or the third light-emitting unit in the direction of the substrate.

[0028] The beneficial effects of this application are: the driving circuits for driving the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit are combined into one, and periodically turned on in a time-division multiplexing manner, thereby providing driving signals to the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit for display. By utilizing the low-pass effect of the human eye for imaging, the backplane area occupied by the driving circuit is effectively reduced, the resolution is improved, and the problem of power consumption increase caused by the threshold voltage of the driving transistor or multiple sampling of the threshold voltage is avoided. [Attached Image Description]

[0029] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 is a schematic diagram of an embodiment of the display device driving circuit provided in this application;

[0031] Figure 2 is a schematic diagram of the structure of a first specific embodiment of the display device driving circuit provided in this application;

[0032] Figure 3 is a schematic diagram of the structure of a second specific embodiment of the display device driving circuit provided in this application;

[0033] Figure 4 is a schematic diagram of the structure of a third specific embodiment of the display device driving circuit provided in this application;

[0034] Figure 5 is a timing control signal diagram of a third specific embodiment of the display device driving circuit provided in this application;

[0035] Figure 6 is an equivalent circuit diagram of the display device driving circuit in the reset phase of this application;

[0036] Figure 7 is an equivalent circuit diagram of the display device driving circuit in the sampling stage of this application;

[0037] Figure 8 is an equivalent circuit diagram of the display device driving circuit in the storage stage of this application;

[0038] Figure 9 is an equivalent circuit diagram of the display device driving circuit of this application in the first light-emitting stage;

[0039] Figure 10 is an equivalent circuit diagram of the display device driving circuit in the second light-emitting stage of this application;

[0040] Figure 11 is an equivalent circuit diagram of the display device driving circuit in the third light-emitting stage of this application;

[0041] Figure 12 is a cross-sectional structural schematic diagram of an embodiment of the display panel provided in this application;

[0042] Figure 13 is a schematic diagram of an embodiment of the OLED stacking structure of this application.

[0043] First light-emitting unit OLED1; Second light-emitting unit OLED2; Third light-emitting unit OLED3; Driving circuit 10; Switching circuit 20; Reset transistor T0; First switching transistor T1; Second switching transistor T2; Third switching transistor T3; Fourth switching transistor T4; Fifth switching transistor T5; Sixth switching transistor T6; Seventh switching transistor T7; Eighth switching transistor T8; Ninth switching transistor T9; Tenth switching transistor T10; First capacitor C1; Second capacitor C2; Third capacitor C3; Driving transistor DT; Switching signal line EM; Power supply line VDD; Reset signal line Vint; First data line Data1; Second data line Data2; Third data line Data3; First scan line Scan1; Second scan line Scan2; Third scan line Scan3; Reset control line Scan(n-2); First control line Scan(n-1); Second control line Scan(n).

Detailed Implementation Methods

[0044] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0045] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to limit the application. The singular forms “a,” “said,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms, unless otherwise clearly indicated above. “Multiple” generally includes at least two, but does not exclude the inclusion of at least one.

[0046] It should be understood that the term "and / or" used herein is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Furthermore, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship. The terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0047] It should be understood that the terms "comprising," "including," or any other variations used herein are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0048] It should be noted that if the embodiments of this application involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of the components in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicators will also change accordingly.

[0049] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in every place in the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0050] This application provides a display device driving circuit, specifically referring to Figure 1, which is a structural schematic diagram of an embodiment of the display device driving circuit provided in this application. As shown in Figure 1, the display device driving circuit includes: a first light-emitting unit OLED1, a second light-emitting unit OLED2, and a third light-emitting unit OLED3 partially stacked, and a pixel driving circuit 100. The pixel driving circuit 100 is connected to the anode of the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3, and is used to drive the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3 to emit light at different brightness levels. That is, different driving signals are provided to the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3 respectively, so as to drive the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3 to emit light of different brightness levels.

[0051] The pixel driving circuit 100 includes a driving circuit 10 and a switching circuit 20. The driving circuit 10 generates driving signals to drive the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3 to emit light. Specifically, the driving circuit 10 is connected to the anodes of the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3, and provides driving signals to the anodes of the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3.

[0052] The switching circuit 20 is disposed between the driving circuit 10 and the anodes of the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3. It is used to sequentially control the driving circuit 10 to conduct with the first light-emitting unit OLED1 to drive the first light-emitting unit OLED1 to emit light; control the driving circuit 10 to conduct with the second light-emitting unit OLED2 to drive the second light-emitting unit OLED2 to emit light; and control the driving circuit 10 to conduct with the third light-emitting unit OLED3 to drive the third light-emitting unit OLED3 to emit light.

[0053] Specifically, the switching circuit 20 includes a first switching transistor T1, a second switching transistor T2, and a third switching transistor T3. The first switching transistor T1 is disposed between the driving circuit 10 and the first light-emitting unit OLED1, and is used to control the driving circuit 10 to conduct with the first light-emitting unit OLED1, thereby providing a driving signal to the first light-emitting unit OLED1. The second switching transistor T2 is disposed between the driving circuit 10 and the second light-emitting unit OLED2, and is used to control the driving circuit 10 to conduct with the second light-emitting unit OLED2, thereby providing a driving signal to the second light-emitting unit OLED2. The third switching transistor T3 is disposed between the driving circuit 10 and the third light-emitting unit OLED3, and is used to control the driving circuit 10 to conduct with the third light-emitting unit OLED3, thereby providing a driving signal to the third light-emitting unit OLED3.

[0054] Among them, the first switching transistor T1, the second switching transistor T2 and the third switching transistor T3 are not turned on at the same time (that is, they are turned on in a time-division manner), thereby controlling the first light-emitting unit OLED1, the second light-emitting unit OLED2 and the third light-emitting unit OLED3 to emit light respectively.

[0055] In this specific embodiment, the pixel driving circuit includes a reset stage, an energy storage stage, and an emission stage. In the reset stage, a reset signal is provided to the driving circuit 10 to eliminate the signal influence of the previous frame. In the energy storage stage, a driving signal is provided to the driving circuit 10, which stores and holds the driving signal. In the emission stage, the driving circuit 10 transmits the driving signal to the emission unit to drive the emission unit to emit light.

[0056] In this embodiment, the light-emitting stage includes a first light-emitting stage, a second light-emitting stage, and a third light-emitting stage. In the first light-emitting stage, the driving circuit 10 provides a driving signal to the first light-emitting unit OLED1. In the second light-emitting stage, the driving circuit 10 provides a driving signal to the second light-emitting unit OLED2. In the third light-emitting stage, the driving circuit 10 provides a driving signal to the third light-emitting unit OLED3. In this embodiment, only one storage operation is required before each of the first, second, and third light-emitting stages. Compared to a circuit structure that requires separate storage before each light-emitting stage, the circuit structure in this embodiment saves energy storage operation steps, improves energy storage efficiency, and simplifies the circuit structure.

[0057] Furthermore, to enable the driving circuit 10 to provide different driving signals to the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3 during the light-emitting stage, the driving circuit 10 includes a first storage circuit, a second storage circuit, and a third storage circuit. In other pixel driving circuits, the same driving signal can also be provided to the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3.

[0058] Please refer to Figure 2 for details. Figure 2 is a schematic diagram of the structure of a first specific embodiment of the display device driving circuit provided in this application. As shown in Figure 2, the driving circuit 10 includes a driving transistor DT and a storage circuit.

[0059] The storage circuit is connected to the gate of the driving transistor DT and is used to store the gate voltage charged into the driving transistor DT.

[0060] In this specific embodiment, the storage circuit includes a first capacitor C1, a second capacitor C2, and a third capacitor C3. The first capacitor C1 stores a first data voltage, the second capacitor C2 stores a second data voltage, and the third capacitor C3 stores a third data voltage. In the first light-emitting stage, the first capacitor C1 operates to provide the first data voltage to the gate of the driving transistor DT, thereby providing a first data current to the first light-emitting unit OLED1. In the second light-emitting stage, the second capacitor C2 operates to provide the second data voltage to the gate of the driving transistor DT, thereby providing a second data current to the second light-emitting unit OLED1. In the third light-emitting stage, the third capacitor C3 operates to provide the third data voltage to the gate of the driving transistor DT, thereby providing a third data current to the third light-emitting unit OLED3. In this embodiment, three storage circuits (three capacitors) transmit different driving voltages to the driving transistor DT in the first, second, and third light-emitting stages, respectively, so that the driving transistor DT generates different driving currents under different driving voltages, thereby driving the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3 to emit different colors of light.

[0061] Drive current I = K(V) gs -V th ) 2 , where V gs To drive the gate-source voltage (the voltage difference between the gate and source) of transistor DT, V th Let K be the threshold voltage of the driving transistor DT, and K be the dielectric constant of the driving transistor DT. Therefore, the driving current is related to the gate-source voltage and the threshold voltage of the driving transistor DT. When its gate-source voltage includes the threshold voltage, the effect of threshold voltage drift of the driving transistor DT can be eliminated.

[0062] Specifically, the first plates of the first capacitor C1, the second capacitor C2, and the third capacitor C3 are connected to the power line VDD to enable them to perform storage functions. The second plate of the first capacitor C1 is connected to the first data line data1 and the gate of the driving transistor DT, providing a first data voltage to the gate of the driving transistor DT. The second plate of the second capacitor C2 is connected to the second data line data2 and the gate of the driving transistor DT, providing a second data voltage to the gate of the driving transistor DT. The second plate of the third capacitor C3 is connected to the third data line data3 and the gate of the driving transistor DT, providing a third data voltage to the gate of the driving transistor DT. In some embodiments, the driving signal can be transmitted to the gate of the driving transistor DT via the first data line data1, the second data line data2, and the third data line data3 in a time-division multiplexing manner.

[0063] In this embodiment, the storage circuit further includes a fourth switching transistor T4, a fifth switching transistor T5, and a sixth switching transistor T6. The fourth switching transistor T4 is disposed between the first capacitor C1 and the gate of the driving transistor DT, and is used to control the timing of the driving voltage supplied by the first capacitor C1 to the gate of the driving transistor DT. The fifth switching transistor T5 is disposed between the second capacitor C2 and the gate of the driving transistor DT, and is used to control the timing of the driving voltage supplied by the second capacitor C2 to the gate of the driving transistor DT. The sixth switching transistor T6 is disposed between the third capacitor C3 and the gate of the driving transistor DT, and is used to control the timing of a driving voltage supplied by the third capacitor C3 to the gate of the driving transistor DT. In this embodiment, the data voltage is first stored by the first capacitor C1, the second capacitor C2, and the third capacitor C3, and then the fourth switching transistor T4, the fifth switching transistor T5, and the sixth switching transistor T6 provide driving voltages to the gate of the driving transistor DT in a time-division multiplexing manner.

[0064] Specifically, the fourth switching transistor T4 is disposed between the second plate of the first capacitor C1 and the gate of the driving transistor DT, and is used to control the second plate of the first capacitor C1 to be connected to the gate of the driving transistor DT during the first light-emitting stage, so as to transmit a driving voltage containing the first data voltage to the gate of the driving transistor DT. The fifth switching transistor T5 is disposed between the second plate of the second capacitor C2 and the gate of the driving transistor DT, and is used to control the second plate of the second capacitor C2 to be connected to the gate of the driving transistor DT during the second light-emitting stage, so as to transmit a driving voltage containing the second data voltage to the gate of the driving transistor DT. The sixth switching transistor T6 is disposed between the second plate of the third capacitor C3 and the gate of the driving transistor DT, and is used to control the second plate of the third capacitor C3 to be connected to the gate of the driving transistor DT during the third light-emitting stage, so as to transmit a driving voltage containing the third data voltage to the gate of the driving transistor DT.

[0065] In this specific embodiment, the gates of the fourth switching transistor T4 and the first switching transistor T1 are connected to the same first scan line Scan1, and are simultaneously turned on during the first light-emitting stage to drive the first light-emitting unit OLED1 to emit light under the drive of the first data voltage Vdata1. The gates of the fifth switching transistor T5 and the second switching transistor T2 are connected to the same second scan line Scan2, and are simultaneously turned on during the second light-emitting stage to drive the second light-emitting unit OLED2 to emit light under the drive of the second data voltage Vdata2. The gates of the sixth switching transistor T6 and the third switching transistor T3 are connected to the same third scan line Scan3, and are simultaneously turned on during the third light-emitting stage to drive the third light-emitting unit OLED3 to emit light under the drive of the third data voltage Vdata3.

[0066] The driving circuit 10 also includes a reset transistor T0 connected to the gate of the driving transistor DT. The gate of the reset transistor T0 is connected to the reset control line Scan(n-2), its first electrode is connected to the reset signal line Vint, and its second electrode is connected to the gate of the driving transistor DT. This reset transistor T0 is used to provide a reset signal to the gate of the driving transistor DT during the reset phase, thereby eliminating the signal influence of the previous frame. Furthermore, the second electrode of the reset transistor T0 is also connected to the anodes of the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3, allowing P1 to charge a reset voltage to the anodes of these units during the reset phase. The driving transistor DT is a low-potential P-type transistor, ensuring that it remains in a conducting state after the reset phase, facilitating the subsequent charging of a threshold voltage to its gate.

[0067] Further, please refer to Figure 3, which is a schematic diagram of the structure of a second specific embodiment of the display device driving circuit provided in this application. As shown in Figure 3, the storage circuit also includes a storage capacitor Cst, which stores a voltage containing the threshold voltage Vth of the driving transistor DT, thereby providing a driving voltage containing the threshold voltage to the gate of the driving transistor DT during the driving light emission stage, thereby eliminating the influence of the threshold voltage drift of the driving transistor DT and improving the driving stability of the driving transistor DT.

[0068] Specifically, the first plate of the storage capacitor Cst is connected to the power supply line VDD, and the second plate is connected to the gate of the driving transistor DT and the second electrode of the driving transistor DT, respectively, so that the storage capacitor Cst stores a voltage containing the threshold voltage Vth of the driving transistor DT during the sampling phase.

[0069] In a further embodiment, the second plate of the storage capacitor Cst is also connected to the first plates of the first capacitor C1, the second capacitor C2, and the third capacitor C3, respectively, to form a series circuit with the first capacitor C1, the second capacitor C2, and the third capacitor C3 during the light-emitting stage, so as to transmit a driving voltage including the threshold voltage and data voltage of the driving transistor DT to the gate of the driving transistor DT. The data voltage includes a first data voltage, a second data voltage, and a third data voltage. Specifically, in the first light-emitting stage, a driving voltage including the threshold voltage Vth and the first data voltage Vdata1 is transmitted to the gate of the driving transistor DT; in the second light-emitting stage, a driving voltage including the threshold voltage Vth and the second data voltage Vdata2 is transmitted to the gate of the driving transistor DT; and in the third light-emitting stage, a driving voltage including the threshold voltage Vth and the third data voltage Vdata3 is transmitted to the gate of the driving transistor DT.

[0070] It should be noted that, in the first embodiment, during the light-emitting stage, the gate voltage of the driving transistor DT is a driving voltage containing a first data voltage, a second data voltage, and a third data voltage. In the second embodiment, the gate voltage of the driving transistor DT is a driving voltage containing a threshold voltage and the first data voltage, the threshold voltage and the second data voltage, and the threshold voltage and the third data voltage.

[0071] In other embodiments, the storage circuit may also directly provide a driving voltage containing a threshold voltage to the gate of the driving transistor DT. In this case, the gate voltage of the driving transistor DT does not have the function of time-division control of the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3, which is not limited here.

[0072] Further, please refer to Figure 4, which is a structural schematic diagram of a third specific embodiment of the display device driving circuit provided in this application.

[0073] Specifically, the storage circuit also includes a seventh switching transistor T7, which is disposed between the first plate of the storage capacitor Cst and the power supply line VDD. This transistor connects the storage capacitor Cst to the operating circuit, enabling it to perform a storage function. Specifically, the gate of the seventh switching transistor T7 is connected to the first control line Scan(n-1), the first electrode is connected to the power supply line VDD, and the second electrode is connected to the first plate of the storage capacitor Cst. This connects the first plate of the storage capacitor Cst to the circuit, enabling its second plate to perform a storage function. If the first plate of the storage capacitor Cst is left floating, the storage capacitor Cst does not operate and does not perform a storage function.

[0074] The eighth switching transistor T8 is disposed between the second plate of the storage capacitor Cst and the gate of the driving transistor DT. It connects the gate of the driving transistor DT to its second electrode, enabling the storage capacitor Cst to store the threshold voltage of the driving transistor DT during the sampling phase. Specifically, the gate of the eighth switching transistor T8 is connected to the second control line Scan(n), its first electrode is connected to the second plate of the storage capacitor Cst and the second electrode of the driving transistor DT, and its second electrode is connected to the gate of the driving transistor DT. This allows the power supply line, the driving transistor, and the storage capacitor to form a sampling circuit during the sampling phase, enabling the storage capacitor Cst to store the threshold voltage of the driving transistor DT during the sampling phase.

[0075] Specifically, the storage circuit also includes a ninth switching transistor T9, disposed between the power supply line VDD and the first plates of the first capacitor C1, the second capacitor C2, and the third capacitor C3. This transistor controls the first capacitor C1, the second capacitor C2, and the third capacitor C3 to perform their storage function during the storage phase. The gate of the ninth switching transistor T9 is connected to the first control line Scan(n-1), its first electrode is connected to the power supply line VDD, and its second electrode is connected to the first plates of the first capacitor C1, the second capacitor C2, and the third capacitor C3, thus connecting these capacitors to the storage circuit and enabling them to perform their storage function.

[0076] During the storage phase, the first data line data1, the second data line data2, and the third data line data3 store the first data voltage Vdata1, the second data voltage Vdata2, and the third data voltage Vdata3 respectively through the first capacitor C1, the second capacitor C2, and the third capacitor C3. In a further embodiment, a switching transistor can be provided between the first data line data1 and the first capacitor C1, the second data line data2 and the second capacitor C2, and the third data line data3 and the third capacitor C3 to control the switching transistor to conduct the data lines and capacitors during the storage phase, thereby storing the data voltages.

[0077] In one specific embodiment, the gate of the ninth switching transistor T9 is also connected to the first control line Scan(n-1). The ninth switching transistor T9 and the seventh switching transistor T7 are a pair of transistors with opposite driving characteristics, thereby saving the number of control lines. In other embodiments, the ninth switching transistor T9 can also be controlled by a single control line, which is not limited here. In this embodiment, the first control line Scan(n-1) is a pulse signal at a normal high potential, the seventh switching transistor T7 is an N-type transistor, and the ninth switching transistor T9 is a P-type transistor. During the storage phase, the first control line Scan(n-1) is at a low potential, controlling the ninth switching transistor T9 to conduct and the seventh switching transistor T7 to turn off. In another embodiment, the first control line Scan(n-1) is a pulse signal at a normal low potential, then the seventh switching transistor T7 is a P-type transistor, and the ninth switching transistor T9 is an N-type transistor. During the storage phase, the first control line Scan(n-1) is at a high potential, controlling the ninth switching transistor T9 to conduct and the seventh switching transistor T7 to turn off, which is not specifically limited here.

[0078] During the light-emitting phase, the seventh switching transistor T7 is in the on state, allowing the capacitor in the storage circuit to be connected to the working circuit, providing a driving voltage to the gate of the driving transistor DT. Specifically, the storage capacitor Cst and the first capacitor C1 are connected to the gate of the driving transistor DT during the first light-emitting phase, transmitting a driving voltage containing the threshold voltage and the first data voltage of the driving transistor DT to the gate of the driving transistor DT; the storage capacitor Cst and the second capacitor C2 are connected to the gate of the driving transistor DT during the second light-emitting phase, transmitting a driving voltage containing the threshold voltage and the second data voltage of the driving transistor DT to the gate of the driving transistor DT; and the storage capacitor Cst and the third capacitor C3 are connected to the gate of the driving transistor DT during the third light-emitting phase, transmitting a driving voltage containing the threshold voltage and the third data voltage of the driving transistor DT to the gate of the driving transistor DT.

[0079] It should be noted that if one plate of the capacitor is left floating, the voltage stored in it cannot be connected to the driving circuit, and therefore cannot control the driving transistor DT to work.

[0080] In the above embodiment, the driving circuit 10 further includes a reset transistor T0. The gate of the reset transistor T0 is connected to the reset control line Scan(n-2), the first electrode is connected to the reset signal line Vint, and the second electrode is connected to the gate of the driving transistor DT. This reset transistor T0 is used to provide a reset signal to the gate of the driving transistor DT during the reset phase, thereby eliminating the signal influence of the previous frame. Further, the second electrode of the reset transistor T0 is also connected to the anodes of the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3, for charging a reset voltage to the anodes of these units during the reset phase. The driving transistor DT is a low-potential P-type transistor, ensuring that it remains in a conducting state after the reset phase, facilitating the subsequent charging of a threshold voltage to the gate of the driving transistor DT.

[0081] The pixel driving circuit also includes a tenth switching transistor T10 disposed between the driving circuit 10 and the switching circuit 20. The gate of the tenth switching transistor T10 is connected to the switching signal line, the first electrode is connected to the driving circuit 10, and the second electrode is connected to the switching circuit 20. It is used to control the driving circuit 10 to transmit driving signals to the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3. In one embodiment, the switching signal transmitted on the switching signal line EM is a periodic switching signal, which can be a periodic low-potential switching according to PWM. The tenth switching transistor T10 is a P-type transistor that is turned on at a low potential. It is used to control the duty cycle of transmitting driving signals to the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3 during the light-emitting stage, thereby adjusting their brightness.

[0082] Further, please refer to Figure 5, which is a timing control signal diagram of a third specific embodiment of the display device driving circuit provided in this application. As shown in Figure 5, the pixel driving circuit includes a reset stage, a sampling stage, a storage stage, and a light-emitting stage. The light-emitting stage includes a first light-emitting stage, a second light-emitting stage, and a third light-emitting stage. The pixel driving circuit can be seen in Figure 4.

[0083] During the reset phase, please refer to Figure 6, which is an equivalent circuit diagram of the display device driving circuit in the reset phase of this application. The reset control line Scan(n-2) controls the reset transistor T0 to turn on, and the reset signal line Vint provides a reset voltage to the gate of the driving transistor DT through the reset transistor T0. At the same time, it can provide reset voltages to the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3 through the switching circuit 20. Among them, the driving transistor DT is a P-type transistor to keep the driving transistor DT in a conduction state, which facilitates the acquisition of the threshold voltage of the driving transistor DT during the sampling phase.

[0084] During the reset phase, the first control line Scan(n-1) also controls the seventh switching transistor T7 to turn on, so that the first plate of the storage capacitor Cst is connected to the power supply line VDD, putting it in the storage state.

[0085] Furthermore, during the reset phase, the second control line Scan(n) also controls the eighth switching transistor T8 to turn on, so that the second plate of the storage capacitor Cst is connected to the gate of the driving transistor, enabling it to store the reset signal charged to the gate of the driving transistor DT during the reset phase.

[0086] It should be noted that, in another preferred embodiment, the eighth switching transistor T8 may also be disposed between the second electrode of the driving transistor DT and the second plate of the storage capacitor Cst, for controlling the storage capacitor Cst to acquire the threshold voltage of the driving transistor DT during the sampling phase. During the reset phase, the eighth switching transistor T8 may not be turned on. During the reset phase, the storage capacitor Cst stores the reset voltage.

[0087] During the sampling phase, please refer to Figure 7, which is an equivalent circuit diagram of the driving circuit of the display device in this application during the sampling phase. The reset control line Scan(n-2) controls the reset transistor T0 to turn off, stopping the charging of the reset voltage Vint to the gate of the driving transistor DT. During this phase, the first control line Scan(n-1) also controls the seventh switching transistor T7 to turn on, and the second control line Scan(n) controls the eighth switching transistor T8 to turn on, connecting the gate of the driving transistor DT to its second electrode, charging the gate of the driving transistor DT with the threshold voltage Vth. Specifically, during this phase, the storage capacitor Cst is in an open circuit state (i.e., a storage state), and the power supply line VDD, the driving transistor DT, and the storage capacitor Cst form a sampling loop. The voltage of the power supply line VDD is transmitted through the driving transistor DT to the second plate of the storage capacitor Cst and the gate of the driving transistor. It should be noted that when the gate voltage of the driving transistor DT is equal to the threshold voltage, the driving transistor DT is turned off, which means the sampling ends. Therefore, after this stage, the second plate (point A) of the storage capacitor Cst stores the threshold voltage Vth, and the potential difference (that is, the stored voltage) on the storage capacitor Cst is Vth-VDD (or VDD-Vth).

[0088] During the storage phase, please refer to Figure 8, which is an equivalent circuit diagram of the display device driving circuit in the storage phase of this application. In this phase, the first control line Scan(n-1) controls the seventh switching transistor T7 to be off and the ninth switching transistor T9 to be on, while the second control line Scan(n) controls the eighth switching transistor T8 to be off. At this time, the first capacitor C1, the second capacitor C2, and the third capacitor C3 are connected to the power supply line VDD through the ninth switching transistor T9, enabling them to perform storage. The first data line data1 charges the second plate of the first capacitor C1 with a first data voltage Vdata1, the second data line data2 charges the second plate of the second capacitor C2 with a second data voltage Vdata2, and the third data line data3 charges the second plate of the third capacitor C3 with a third data voltage Vdata3, and these are stored.

[0089] It should be noted that during this stage, the first plate of the storage capacitor Cst is in a floating state, and the charge stored inside the storage capacitor Cst has no loop for exchange and flow. The potential difference between its two plates will not change, therefore, the storage voltage on the second plate of the storage capacitor Cst will not change.

[0090] During the light-emitting stage, the first control line Scan(n-1) controls the seventh switching transistor T7 to turn on, so that the storage capacitor Cst sequentially provides the first light-emitting unit OLED1, the second light-emitting unit OLED2 and the third light-emitting unit OLED3 with a driving signal containing the threshold voltage Vth of the driving transistor DT.

[0091] In the first light-emitting stage, please refer to Figure 9, which is an equivalent circuit diagram of the display device driving circuit of this application in the first light-emitting stage. In this stage, the first scan line Scan1 controls the first switching transistor T1 and the fourth switching transistor T4 to be turned on simultaneously, so that the storage capacitor Cst and the first capacitor C1 provide a driving signal containing the threshold voltage Vth and the first data voltage Vdata1 to the gate of the driving transistor DT through the fourth switching transistor T4.

[0092] In the second light-emitting stage, please further refer to Figure 10, which is an equivalent circuit diagram of the display device driving circuit of this application in the second light-emitting stage. In this stage, the second scan line Scan2 controls the second switching transistor T2 and the fifth switching transistor T5 to be turned on simultaneously, so that the storage capacitor Cst and the second capacitor C2 provide a driving signal containing the threshold voltage Vth and the second data voltage Vdata2 to the gate of the driving transistor DT through the fifth switching transistor T5.

[0093] In the third light-emitting stage, please refer further to Figure 11, which is an equivalent circuit diagram of the display device driving circuit in the third light-emitting stage of this application. In this stage, the third scan line Scan3 controls the third switching transistor T3 and the sixth switching transistor T6 to be turned on simultaneously, so that the storage capacitor Cst and the third capacitor C3 provide a driving signal containing the threshold voltage Vth and the third data voltage Vdata3 to the gate of the driving transistor DT through the sixth switching transistor T6.

[0094] During the light-emitting stage, the switching signal EM is a periodic low-potential switching signal. By controlling the duty cycle of the switching signal EM, the charging duration of the first light-emitting unit OLED1, the second light-emitting unit OLED2, and the third light-emitting unit OLED3 can be controlled, thereby controlling the light-emitting brightness of the light-emitting unit.

[0095] It should be noted that grayscale is the data of the image itself, controlled by data; brightness is the overall brightness of the display, which can be controlled interactively, that is, by the charging duty cycle.

[0096] It should be noted that in the above embodiments, except for the seventh switching transistor T7, which is an N-type transistor, the other switching transistors are P-type transistors.

[0097] This application also provides a display panel, which includes a substrate and a display device driving circuit disposed on the substrate. The circuit structure of the display device driving circuit is as shown in any of the above embodiments. Further, please refer to FIG12 for the cross-sectional structure of the display panel, which is a schematic cross-sectional structure diagram of an embodiment of the display panel provided in this application. As shown in FIG12, the display panel includes a substrate 11, a pixel driving circuit layer disposed on the substrate 11, a pixel driving circuit 100 disposed in the pixel driving circuit layer, and a display device 30 disposed on the side of the pixel driving circuit layer away from the substrate 11. The display device 30 includes a first light-emitting unit OLED1, a second light-emitting unit OLED2, and a third light-emitting unit OLED3.

[0098] In this configuration, the first light-emitting unit OLED1 is stacked with the second light-emitting unit OLED2 and the third light-emitting unit OLED3. Specifically, this includes: the first light-emitting unit OLED1 and the second light-emitting unit OLED2 are stacked, and the third light-emitting unit OLED3 is set separately; or, the first light-emitting unit OLED1 and the third light-emitting unit OLED3 are stacked, and the second light-emitting unit OLED2 is set separately; or, the third light-emitting unit OLED3 and the second light-emitting unit OLED2 are stacked, and the first light-emitting unit OLED1 is set separately; or, the first light-emitting unit OLED1 is stacked with the second light-emitting unit OLED2 and the third light-emitting unit OLED3.

[0099] Specifically, as shown in Figure 12, the first light-emitting unit OLED1 and the second light-emitting unit OLED2 are stacked on the substrate 11, and the third light-emitting unit OLED3 is disposed separately. The first light-emitting unit OLED1 and the second light-emitting unit OLED2 share a common cathode, and the light-emitting layers are stacked. The anodes are disposed on opposite sides of the stacked light-emitting layers. The anode of the second light-emitting unit OLED2 is disposed on the side away from the substrate 11 and is connected to the lower pixel driving circuit 100 through a via on the pixel definition layer.

[0100] Further reference can be made to Figure 13, which is a schematic diagram of an embodiment of the OLED stacked structure of this application. As shown in Figure 13, the OLED stacked structure includes, in the direction perpendicular to the substrate 11, an anode, a hole injection layer (HIL), a hole transport layer (HTL), an emitting layer (EM), an electron transport layer (ETL), an electron injection layer (EIL), a cathode, an electron injection layer (EIL), an electron transport layer (ETL), an emitting layer (EM), a hole transport layer (HTL), a hole injection layer (HIL), and an anode, which respectively form a stacked first emitting unit OLED1 and a second emitting unit OLED2. The anode on the side away from the substrate 11 is connected to the lower pixel driving circuit through a via on the pixel definition layer. The first emitting unit OLED1, the second emitting unit OLED2, and the third emitting unit OLED3 are respectively one of an R pixel, a G pixel, and a B pixel, which are not specifically limited here.

[0101] The beneficial effects of this application are: the driving circuits for driving the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit are combined into one, and periodically turned on in a time-division multiplexing manner, thereby providing driving signals to the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit for display. By utilizing the low-pass effect of the human eye for imaging, the backplane area occupied by the driving circuit is effectively reduced, the resolution is improved, and the influence of the threshold voltage of the driving transistor or the problem of increased power consumption caused by multiple sampling of the threshold voltage is avoided.

[0102] The above are merely embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A display device driving circuit, characterized in that, include: The first light-emitting unit, the second light-emitting unit, and the third light-emitting unit are partially stacked. A pixel driving circuit is connected to the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit, and is used to drive the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit to emit light in a time-division manner; The pixel driving circuit includes: A driving circuit, connected to the anodes of the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit, is used to provide driving signals to the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit; A switching circuit, including a first switching transistor, a second switching transistor, and a third switching transistor, is respectively disposed between the driving circuit and the anodes of the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit, and is used to control the driving circuit to sequentially drive the first light-emitting unit to emit light, the second light-emitting unit to emit light, and the third light-emitting unit to emit light.

2. The display device driving circuit according to claim 1, characterized in that, The driving circuit includes: A driving transistor, wherein the first electrode of the driving transistor is connected to a power supply line, and the second electrode of the driving transistor is connected to the anode of the first light-emitting unit, the second light-emitting unit and the third light-emitting unit through the switching circuit; A storage circuit, connected to the gate of the driving transistor, is used to store the gate voltage charged into the driving transistor.

3. The display device driving circuit according to claim 2, characterized in that, The storage circuit includes a first capacitor storing a first data voltage, a second capacitor storing a second data voltage, and a third capacitor storing a third data voltage, so as to drive the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit to emit light respectively during the light-emitting stage.

4. The display device driving circuit according to claim 3, characterized in that, The light-emitting stage includes a first light-emitting stage, a second light-emitting stage, and a third light-emitting stage; The first plate of the first capacitor is connected to the power line, and the second plate of the first capacitor is connected to the first data line, for storing the first data voltage during the storage stage. The first plate of the second capacitor is connected to the power line, and the second plate of the second capacitor is connected to the second data line, for storing the second data voltage during the storage stage; The first plate of the third capacitor is connected to the power line, and the second plate of the third capacitor is connected to the third data line, for storing the third data voltage during the storage stage.

5. The display device driving circuit according to claim 4, characterized in that, The storage circuit also includes: A fourth switching transistor is disposed between the second plate of the first capacitor and the gate of the driving transistor, and is used to control the second plate of the first capacitor to be connected to the gate of the driving transistor during the first light-emitting stage, so as to transmit a driving voltage containing the first data voltage to the gate of the driving transistor. A fifth switching transistor is disposed between the second plate of the second capacitor and the gate of the driving transistor, and is used to control the second plate of the second capacitor to connect with the gate of the driving transistor during the second light-emitting stage, so as to transmit a driving voltage containing the second data voltage to the gate of the driving transistor. A sixth switching transistor is disposed between the third plate of the third capacitor and the gate of the driving transistor, and is used to control the connection between the second plate of the third capacitor and the gate of the driving transistor during the third light-emitting stage, so as to transmit a driving voltage containing the third data voltage to the gate of the driving transistor.

6. The display device driving circuit according to claim 5, characterized in that, The fourth, fifth, and sixth switching transistors are turned on in a time-division manner during the light-emitting phase.

7. The display device driving circuit according to claim 6, characterized in that, The fourth switching transistor is connected to the gate of the first switching transistor via the first scan line, and is used to simultaneously conduct during the first light-emitting stage to drive the first light-emitting unit to emit light under the first driving voltage. The fifth switching transistor and the gate of the second switching transistor are connected to the second scan line, and are used to be turned on simultaneously in the second light-emitting stage to drive the second light-emitting unit to emit light under the second driving voltage; The gate of the sixth switching transistor is connected to the third scanning line, and is used to simultaneously turn on during the third light-emitting stage to drive the third light-emitting unit to emit light under the third driving voltage.

8. The display device driving circuit according to claim 4, characterized in that, The storage circuit also includes a storage capacitor; The first plate of the storage capacitor is connected to the power line, and the second plate of the storage capacitor is connected to the gate of the driving transistor and the second electrode of the driving transistor, respectively, so that the storage capacitor stores a driving voltage containing the threshold voltage of the driving transistor during the sampling phase.

9. The display device driving circuit according to claim 8, characterized in that, The second plate of the storage capacitor is also connected to the first plates of the first capacitor, the second capacitor, and the third capacitor, respectively, for use in series with the first capacitor, the second capacitor, and the third capacitor during the light-emitting stage, so as to transmit a driving voltage containing the threshold voltage and data voltage of the driving transistor to the gate of the driving transistor; wherein, the data voltage includes a first data voltage, a second data voltage, and a third data voltage.

10. The display device driving circuit according to claim 9, characterized in that, The storage circuit also includes: A seventh switching transistor is disposed between the first plate of the storage capacitor and the power line. The gate of the seventh switching transistor is connected to the first control line, the first electrode of the seventh switching transistor is connected to the power line, and the second electrode of the seventh switching transistor is connected to the first plate of the storage capacitor. It is used to control the storage capacitor to have a storage function. An eighth switching transistor is disposed between the second plate of the storage capacitor and the gate of the driving transistor. The gate of the eighth switching transistor is connected to the second control line. The first electrode of the eighth switching transistor is connected to the second plate of the storage capacitor and the second electrode of the driving transistor. The second electrode is connected to the gate of the driving transistor. It is used to control the power line, the driving transistor and the storage capacitor to form a sampling circuit during the sampling phase, so that the storage capacitor stores the threshold voltage of the driving transistor during the sampling phase.

11. The display device driving circuit according to claim 10, characterized in that, The storage circuit also includes: A ninth switching transistor is disposed between the power line and the first plate of the first capacitor, the second capacitor, and the third capacitor, and is used to control the first capacitor, the second capacitor, and the third capacitor to have a storage function during the storage phase.

12. The display device driving circuit according to claim 11, characterized in that, During the storage phase, the first data line, the second data line, and the third data line transmit data signals to the first capacitor, the second capacitor, and the third capacitor, so that the first capacitor stores a first data voltage, the second capacitor stores a second data voltage, and the third capacitor stores a third data voltage.

13. The display device driving circuit according to claim 12, characterized in that, The gates of the ninth switching transistor and the seventh switching transistor are both connected to the first control line. The ninth switching transistor and the seventh switching transistor are a pair of transistors with opposite driving characteristics. During the storage phase, the first control line controls the ninth switching transistor to turn on and controls the seventh switching transistor to turn off.

14. The display device driving circuit according to claim 13, characterized in that, The seventh switching transistor is in the on state during the light-emitting phase, so that the storage capacitor and the first capacitor can transmit a driving voltage containing the threshold voltage of the driving transistor and the first data voltage to the gate of the driving transistor during the first light-emitting phase; the storage capacitor and the second capacitor can transmit a driving voltage containing the threshold voltage of the driving transistor and the second data voltage to the gate of the driving transistor during the second light-emitting phase; and the storage capacitor and the third capacitor can transmit a driving voltage containing the threshold voltage of the driving transistor and the third data voltage to the gate of the driving transistor during the third light-emitting phase.

15. The display device driving circuit according to any one of claims 2-14, characterized in that, The driving circuit also includes a reset transistor; The gate of the reset transistor is connected to the reset control line, the first electrode of the reset transistor is connected to the reset signal line, and the second electrode of the reset transistor is connected to the gate of the driving transistor and the anode of the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit, for charging a reset voltage to the gate of the driving transistor and the anode of the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit during the reset phase.

16. The display device driving circuit according to claim 15, characterized in that, The driving transistor is a P-type transistor.

17. The display device driving circuit according to any one of claims 1-16, characterized in that, The pixel driving circuit further includes a tenth switching transistor disposed between the driving circuit and the switching circuit; The gate of the tenth switching transistor is connected to the switching signal line, the first electrode of the tenth switching transistor is connected to the driving circuit, and the second electrode of the tenth switching transistor is connected to the switching circuit.

18. The display device driving circuit according to claim 17, characterized in that, The switching signal is a periodic switching signal, and the tenth switching transistor is used to control the brightness of the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit during the light-emitting phase.

19. A display panel, characterized in that, The display panel includes: a substrate and a display device driving circuit as described in any one of claims 1 to 18 disposed on the substrate.

20. The display device driving circuit according to claim 19, characterized in that, The first light-emitting unit is stacked with the second light-emitting unit and / or the third light-emitting unit in the direction of the substrate.

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