Display device, manufacturing method therefor, and electronic device

The display device addresses resistance issues by using varying volumes of organic conductive particle-based repair bonding materials to connect electrodes, ensuring reliable bonding without additional processes.

WO2026095528A1PCT designated stage Publication Date: 2026-05-07SAMSUNG DISPLAY CO LTD
View PDF 5 Cites 0 Cited by

Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
SAMSUNG DISPLAY CO LTD
Filing Date
2025-10-27
Publication Date
2026-05-07

AI Technical Summary

Technical Problem

Existing display devices face challenges in minimizing the risk of resistance increase between contact electrodes and light-emitting elements without adding additional process steps.

Method used

A display device design featuring different volumes of repair bonding materials, with the second repair bonding material being larger than the first, made of organic materials with conductive particles, to connect contact electrodes to common electrodes, and a method of applying these materials at varying heights to ensure effective bonding.

Benefits of technology

Minimizes the risk of resistance increase and disconnection failure between pixel and common electrodes without requiring extra process steps, enhancing the reliability of the display device.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure KR2025017196_07052026_PF_FP_ABST
    Figure KR2025017196_07052026_PF_FP_ABST
Patent Text Reader

Abstract

Provided are a display device, a manufacturing method therefor, and an electronic device. A display device according to an embodiment comprises: a substrate; a pixel electrode and a common electrode disposed on the substrate and spaced apart from each other; a light-emitting element including a first contact electrode in contact with the pixel electrode and a second contact electrode in contact with the common electrode; a first repair bonding material disposed between the pixel electrode and the first contact electrode; and a second repair bonding material disposed between the common electrode and the second contact electrode, wherein a volume of the second repair bonding material is greater than a volume of the first repair bonding material, and the first repair bonding material and the second repair bonding material may be made of an organic material including conductive particles.
Need to check novelty before this filing date? Find Prior Art

Description

Display device, method of manufacturing the same, and electronic device

[0001] The present invention relates to a display device, a method of manufacturing the same, and an electronic device.

[0002] As the information society develops, the demand for display devices to display images is increasing in various forms. Display devices may be flat panel displays such as Liquid Crystal Displays, Field Emission Displays, and Light Emitting Displays.

[0003] The light-emitting display device may include an organic light-emitting display device comprising an organic light-emitting diode element as a light-emitting element, and a micro light-emitting display device comprising a micro light-emitting diode element (hereinafter referred to as a micro light-emitting element) as a light-emitting element. Since the micro light-emitting diode element is made of inorganic material, it has the advantage of having a long lifespan with fewer degradation issues compared to organic light-emitting diode elements.

[0004] The problem that the present invention aims to solve is to provide a display device and a manufacturing method that minimize the risk of resistance increase between the contact electrode of the repair bonding material and the light-emitting element without adding process steps.

[0005] The problems of the present invention are not limited to the technical problems mentioned above, and other unmentioned technical problems will be clearly understood by those skilled in the art from the description below.

[0006] A display device according to one embodiment for solving the above problem comprises a substrate, a pixel electrode and a common electrode disposed on the substrate and spaced apart from each other, a light-emitting element including a first contact electrode in contact with the pixel electrode and a second contact electrode in contact with the common electrode, a first repair bonding material disposed between the pixel electrode and the first contact electrode and a second repair bonding material disposed between the common electrode and the second contact electrode, wherein the volume of the second repair bonding material is larger than the volume of the first repair bonding material, and the first repair bonding material and the second repair bonding material may be made of an organic material including conductive particles.

[0007] The volume of the second repair bonding material may be 1.1 to 3.0 times the volume of the first repair bonding material.

[0008] The above conductive particles may be particles formed of conductive metal or carbon black.

[0009] The light-emitting element further comprises a semiconductor stack, a conductive layer disposed on one side of the semiconductor stack, sides of the conductive layer, and a protective film disposed on the side of the semiconductor stack and the sides of the semiconductor stack, wherein the first contact electrode is disposed on the protective film and is connected to the conductive layer exposed without being covered by the protective film, and the second contact electrode is disposed on the protective film. The light-emitting element further comprises a semiconductor stack, a conductive layer disposed on one side of the semiconductor stack, sides of the conductive layer, and a protective film disposed on the side of the semiconductor stack and the sides of the semiconductor stack, wherein the first contact electrode is disposed on the protective film and is connected to the conductive layer exposed through a hole defined by the protective film, and the second contact electrode is disposed on the protective film and is disposed in a hole penetrating the conductive layer and a part of the semiconductor stack, and the second repair bonding material can be filled into the hole.

[0010] The semiconductor stack may further include a first semiconductor layer disposed on the conductive layer and doped with a first conductive type dopant, an active layer disposed on the first semiconductor layer, and a second semiconductor layer disposed on the active layer and doped with a second conductive type dopant.

[0011] The semiconductor stack may further include an undoped third semiconductor layer disposed on the second semiconductor layer.

[0012] The above semiconductor stack may further include a light extraction pattern having a concave pattern on its upper surface.

[0013] The above display device may further include an organic layer disposed between the pixel electrode and the common electrode.

[0014] The above organic layer may not be disposed on the pixel electrode and the common electrode.

[0015] The hole penetrating the conductive layer and a part of the semiconductor stack can penetrate the conductive layer, the first semiconductor layer, and the active layer to expose the second semiconductor layer.

[0016] The above second repair bonding material can be filled higher than the active layer within the hole penetrating the conductive layer and a part of the semiconductor stack.

[0017] A method for manufacturing a display device according to one embodiment for solving the above problem comprises the steps of transferring light-emitting elements onto a pixel electrode and a common electrode, inspecting the lighting state of the light-emitting elements, removing a defective light-emitting element, and bonding a repair light-emitting element at a position corresponding to the removed defective light-emitting element using a repair bonding material, wherein a first repair bonding material is applied onto the pixel electrode and a second repair bonding material is applied onto the common electrode, wherein the amount of the first repair bonding material applied and the amount of the second repair bonding material applied are different, and the first repair bonding material and the second repair bonding material may be organic materials containing conductive particles.

[0018] The step of bonding the above repair light-emitting element may involve applying a first repair bonding material to a first height using a dispenser or inkjet, and applying a second repair bonding material to a second height higher than the first height.

[0019] The above repair light-emitting element comprises a semiconductor stack, a conductive layer disposed on one side of the semiconductor stack, sides of the conductive layer and a protective film disposed on the side of the semiconductor stack and on the side of the conductive layer, a first contact electrode disposed on the protective film and connected to the conductive layer exposed through a hole defined by the protective film, and a second contact electrode disposed on the protective film and disposed in a hole penetrating a portion of the conductive layer and the semiconductor stack, and the repair light-emitting element can be bonded to the pixel electrode and the common electrode by aligning the first contact electrode on the first repair bonding material and aligning the second contact electrode on the second repair bonding material.

[0020] The above second repair bonding material can fill the hole penetrating the conductive layer and a part of the semiconductor stack.

[0021] The step of transferring light-emitting elements onto the pixel electrode and the common electrode may include the step of placing an organic layer on the pixel electrode and the common electrode, the step of placing a light-emitting element on the organic layer, and the step of forming a first connecting electrode connecting the first contact electrode and the pixel electrode, and a second connecting electrode connecting the second contact electrode and the common electrode.

[0022] The amount of the second repair bonding material applied may be 1.1 to 3.0 times the amount of the first repair bonding material applied.

[0023] The above conductive particles may be particles formed of conductive metal or carbon black.

[0024] In the step of transferring light-emitting elements onto the pixel electrode and the common electrode, the method may further include the step of contacting one of the light-emitting elements onto the pixel electrode and the common electrode using a bonding metal.

[0025] In another embodiment for solving the above problem, an electronic device that provides an image comprises, wherein the electronic device includes a display device that displays an image, and the display device comprises a substrate, a pixel electrode and a common electrode disposed on the substrate and spaced apart from each other, a light-emitting element comprising a first contact electrode in contact with the pixel electrode and a second contact electrode in contact with the common electrode, a first repair bonding material disposed between the pixel electrode and the first contact electrode and a second repair bonding material disposed between the common electrode and the second contact electrode, wherein the volume of the second repair bonding material is larger than the volume of the first repair bonding material, and the first repair bonding material and the second repair bonding material may be made of an organic material comprising conductive particles.

[0026] Specific details of other embodiments are included in the detailed description and drawings.

[0027] According to the display device and the method of manufacturing the same according to the embodiments, the risk of resistance increase between the repair bonding material and the contact electrode of the light-emitting element can be minimized without a separate additional process. In addition, the risk of disconnection failure between the pixel electrode and the common electrode can be minimized.

[0028] The effects according to the embodiments are not limited to those exemplified above, and a wider variety of effects are included in this specification.

[0029] FIG. 1 is a perspective view showing a display device according to one embodiment.

[0030] FIG. 2 is a layout diagram showing a display device according to one embodiment.

[0031] FIG. 3 is a block diagram showing a display device according to one embodiment.

[0032] FIG. 4 is an equivalent circuit diagram showing a subpixel according to one embodiment.

[0033] FIG. 5 is a layout diagram showing pixels of a display area according to one embodiment.

[0034] FIG. 6 is a cross-sectional view showing an example of a cross-section of a display panel corresponding to the line I-I' of FIG. 5.

[0035] Figure 7 is a cross-sectional view showing in detail an example of area A of Figure 6.

[0036] Figure 8 is a cross-sectional view showing in detail an example of area B of Figure 6.

[0037] FIG. 9 is a cross-sectional view showing another example of a cross-section of a display panel corresponding to the line I1-I1' of FIG. 5.

[0038] FIG. 10 is a cross-sectional view showing another example of area A2 of FIG. 9 in detail.

[0039] FIG. 11 includes the repair light-emitting element and repair bonding material of FIG. 9.

[0040] FIG. 12 is a flowchart showing a method for manufacturing a display device according to one embodiment.

[0041] FIGS. 13 to 19 are exemplary drawings for explaining a method of manufacturing a display device according to one embodiment.

[0042] FIG. 20 is a graph showing the magnitude of the current versus the voltage of a light-emitting element bonded using a repair bonding material according to one embodiment.

[0043] Figure 21 is a graph showing the magnitude of the current versus the voltage of a light-emitting device bonded using a conventional bonding metal.

[0044] FIG. 22 is an image of a repair light-emitting element using a repair bonding material according to one embodiment.

[0045] Figure 23 is an image of a repair light-emitting element using a conventional bonding metal.

[0046] FIG. 24 is an example drawing showing a smart watch including a display device according to one embodiment.

[0047] FIGS. 25 and FIGS. 26 are exemplary drawings showing a virtual reality device including a display device according to one embodiment.

[0048] FIG. 27 is an example drawing showing a virtual reality device including a display device according to another embodiment.

[0049] FIG. 28 is an exemplary drawing showing an automobile instrument panel and center fascia including display devices according to one embodiment.

[0050] FIG. 29 is an exemplary drawing showing a transparent display device including a display device according to one embodiment.

[0051] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims.

[0052] When elements or layers are referred to as being "on" another element or layer, this includes cases where another layer or element is interposed directly on or in the middle of another element. Throughout the specification, the same reference numerals refer to the same components. Shapes, sizes, ratios, angles, numbers, etc., disclosed in the drawings for describing embodiments are exemplary and therefore the invention is not limited to the depicted details.

[0053] The features of each of the various embodiments of the present invention may be combined or combined with one another, either partially or wholly, and may technically enable various interlocking and operation. Each embodiment may be implemented independently of one another or may be implemented together in an associated relationship.

[0054] Specific embodiments will be described below with reference to the attached drawings.

[0055] FIG. 1 is a perspective view showing a display device according to one embodiment.

[0056] Referring to FIG. 1, the display device (10) is a device for displaying video or still images and can be used as a display screen for various products such as televisions, laptops, monitors, billboards, and the Internet of Things (IOT), as well as portable electronic devices such as mobile phones, smartphones, tablet PCs, smart watches, watch phones, mobile communication terminals, electronic notebooks, electronic books, PMPs (portable multimedia players), navigation systems, and UMPCs (Ultra Mobile PCs).

[0057] The display device (10) may be a light-emitting display device such as an organic light-emitting display device using an organic light-emitting diode, a quantum dot light-emitting display device including a quantum dot light-emitting layer, an inorganic light-emitting display device including an inorganic semiconductor, and a micro light-emitting display device using a micro or nano light-emitting diode (micro LED or nano LED). Hereinafter, the display device (10) has been described with a focus on being a micro light-emitting display device, but the present invention is not limited thereto. Meanwhile, for convenience of explanation, a micro light-emitting diode has been described as a light-emitting element below.

[0058] The display device (10) includes a display panel (100), a display driving circuit (250), a circuit board (300), and a power supply circuit (500).

[0059] The display panel (100) may be formed as a rectangular plane having a short side in a first direction (DR1) and a long side in a second direction (DR2) that intersects the first direction (DR1). The corner where the short side in the first direction (DR1) and the long side in the second direction (DR2) meet may be formed rounded to have a predetermined curvature or formed at a right angle. The plane shape of the display panel (100) is not limited to a rectangle and may be formed as other polygons, circles, or ellipses. The display panel (100) may be formed flat, but is not limited thereto. For example, the display panel (100) may include curved surfaces formed at the left and right ends that have a constant curvature or a changing curvature. In addition, the display panel (100) may be formed flexibly so that it can be bent, curved, folded, or rolled.

[0060] The substrate (SUB) of the display panel (100) may include a main area (MA) and a sub area (SBA).

[0061] The main area (MA) may include a display area (DA) that displays an image and a non-display area (NDA) which is a surrounding area of ​​the display area (DA). The display area (DA) may include a plurality of pixels that display an image. Each of the pixels may include a plurality of subpixels. For example, each of the pixels may include a first subpixel emitting light of a first color, a second subpixel emitting light of a second color, and a third subpixel emitting light of a third color, but the embodiments of the present specification are not limited thereto.

[0062] A sub-region (SBA) may protrude in a second direction (DR2) from one side of a main region (MA). Although FIG. 1 illustrates a sub-region (SBA) unfolded, the sub-region (SBA) may be bent, in which case it may be placed on the lower surface of the display panel (100). When the sub-region (SBA) is bent, it may overlap with the main region (MA) in a third direction (DR3), which is the thickness direction of the display panel (100). A display driving circuit (250) may be placed in the sub-region (SBA).

[0063] The display driving circuit (250) can generate signals and voltages to drive the display panel (100). The display driving circuit (250) may be formed as an integrated circuit (IC) and attached to the display panel (100) using a COG (chip on glass) method, a COP (chip on plastic) method, or an ultrasonic bonding method, but is not limited thereto. As an example, the display driving circuit (250) may be attached to the circuit board (300) using a COF (chip on film) method.

[0064] A circuit board (300) can be attached to one end of a sub-region (SBA) of a display panel (100). As a result, the circuit board (300) can be electrically connected to the display panel (100) and the display driving circuit (250). The display panel (100) and the display driving circuit (250) can receive digital video data, timing signals, and driving voltages through the circuit board (300). The circuit board (300) may be a flexible printed circuit board, a printed circuit board, or a flexible film such as a chip-on-film.

[0065] The power supply circuit (500) can generate multiple panel driving voltages according to the power supply voltage from an external source. The power supply circuit (500) can be formed as an integrated circuit (IC) and attached to the circuit board (300) in a COF manner.

[0066] FIG. 2 is a layout diagram showing a display device according to one embodiment. FIG. 2 illustrates a sub-region (SBA) that is unfolded without being bent.

[0067] Referring to FIG. 2, the display panel (100) may include a main area (MA) and a sub area (SBA).

[0068] The main area (MA) may include a display area (DA) for displaying an image and a non-display area (NDA) which is the surrounding area of ​​the display area (DA). The display area (DA) may occupy most of the main area (MA). The display area (DA) may be positioned in the center of the main area (MA).

[0069] A display area (DA) includes a plurality of pixels (PX) for displaying an image, and each of the plurality of pixels (PX) may include a plurality of subpixels (SPX). A pixel (PX) may be defined as a minimum unit of subpixel group capable of expressing a white gradation.

[0070] The non-display area (NDA) may be positioned adjacent to the display area (DA). The non-display area (NDA) may be an outer area of ​​the display area (DA). The non-display area (NDA) may be positioned to surround the display area (DA). The non-display area (NDA) may be an edge area of ​​the display panel (100).

[0071] The first scan drive unit (SDC1) (e.g., the first scan drive driver) and the second scan drive unit (SDC2) (e.g., the second scan drive driver) may be placed in a non-display area (NDA). The first scan drive unit (SDC1) may be placed on one side (e.g., the left side) of the display panel (100), and the second scan drive unit (SDC2) may be placed on the other side (e.g., the right side) of the display panel, but the embodiments of the present specification are not limited thereto.

[0072] Each of the first scan driver (SDC1) and the second scan driver (SDC2) can be electrically connected to the display driver circuit (250) through scan fan out lines. Each of the first scan driver (SDC1) and the second scan driver (SDC2) receives a scan control signal from the display driver circuit (250) and can generate scan signals according to the scan control signal and output them to the scan lines.

[0073] A sub-region (SBA) may protrude in a second direction (DR2) from one side of a main region (MA). The length of the second direction (DR2) of the sub-region (SBA) may be shorter than the length of the second direction (DR2) of the main region (MA). The length of the first direction (DR1) of the sub-region (SBA) may be shorter than the length of the first direction (DR1) of the main region (MA) or substantially equal to the length of the first direction (DR1) of the main region (MA). The sub-region (SBA) may be bent and may be positioned at the bottom of the display panel (100). In this case, the sub-region (SBA) may overlap with the main region (MA) in a third direction (DR3).

[0074] The sub-region (SBA) may include a connection region (CA), a pad region (PA), and a bending region (BA).

[0075] The connection area (CA) is an area protruding in a second direction (DR2) from one side of the main area (MA). One side of the connection area (CA) is in contact with the non-display area (NDA) of the main area (MA), and the other side of the connection area (CA) may be in contact with the bending area (BA).

[0076] The pad area (PA) is an area where pads (PDs) and a display driving circuit (250) are placed. The display driving circuit (250) can be attached to the driving pads of the pad area (PA) using a conductive adhesive material such as an anisotropic conductive film. The circuit board (300) can be attached to the pads (PDs) of the pad area (PA) using a conductive adhesive material such as an anisotropic conductive film. One side of the pad area (PA) may be in contact with the bending area (BA).

[0077] The bending area (BA) is a bending area. When the bending area (BA) is bent, the pad area (PA) may be positioned below the connecting area (CA) and below the main area (MA). The bending area (BA) may be positioned between the connecting area (CA) and the pad area (PA). One side of the bending area (BA) is in contact with the connecting area (CA), and the other side of the bending area (BA) may be in contact with the pad area (PA).

[0078] FIG. 3 is a block diagram showing a display device according to one embodiment.

[0079] Referring to FIG. 3, the display area (DA) includes a plurality of pixels (PX), a plurality of scan lines (SL), a plurality of light emission control lines (EL), and a plurality of data lines (DL).

[0080] Multiple pixels (PX) may be arranged in a matrix form in a first direction (DR1) and a second direction (DR2). Multiple scan lines (SL) and multiple light emission control lines (EL) may extend in the first direction (DR1) and be arranged in the second direction (DR2). Multiple data lines (DL) may extend in the second direction (DR2) and be arranged in the first direction (DR1). Multiple scan lines (SL) include multiple write scan lines (GWL), multiple control scan lines (GCL), multiple initialization scan lines (GIL), and multiple bias scan lines (GBL).

[0081] Each of the plurality of subpixels (SPX) can be connected to one of the plurality of write scan lines (GWL), one of the plurality of control scan lines (GCL), one of the plurality of initialization scan lines (GIL), one of the plurality of bias scan lines (GBL), one of the plurality of light emission control lines (EL), and one of the plurality of data lines (DL). Each of the plurality of subpixels (SPX) receives a data voltage of the data line (DL) according to the write scan signal of the write scan line (GWL), and can emit light from the light-emitting element according to the data voltage.

[0082] The non-display area (NDA) includes a first scan drive unit (SDC1), a second scan drive unit (SDC2), and a display drive circuit (250).

[0083] Each of the first scan drive unit (SDC1) and the second scan drive unit (SDC2) may include a write scan signal output unit (611), a control scan signal output unit (612), an initialization scan signal output unit (613), a bias scan signal output unit (614), and a light emission signal output unit (615). Each of the write scan signal output unit (611), the control scan signal output unit (612), the initialization scan signal output unit (613), the bias scan signal output unit (614), and the light emission signal output unit (615) may receive a scan timing control signal (SCS) from the timing control circuit (400). The write scan signal output unit (611) may generate write scan signals according to the scan timing control signal (SCS) of the timing control circuit (400) and sequentially output them to the write scan lines (GWL). The control scan signal output unit (612) can generate control scan signals according to the scan timing control signal (SCS) and output them sequentially to the control scan lines (GCL). The initialization scan signal output unit (613) can generate initialization scan signals according to the scan timing control signal (SCS) and output them sequentially to the initialization scan lines (GIL). The bias scan signal output unit (614) can generate bias scan signals according to the scan timing control signal (SCS) and output them sequentially to the bias scan lines (EBL). The light emission signal output unit (615) can generate light emission control signals according to the scan timing control signal (SCS) and output them sequentially to the light emission control lines (EL).

[0084] The display driving circuit (250) (e.g., display driver) includes a timing control circuit (251) (e.g., timing controller) and a data driving circuit (252).

[0085] The data driving circuit (252) can receive digital video data (DATA) and a data timing control signal (DCS) from the timing control circuit (251). The data driving circuit (252) converts the digital video data (DATA) into analog data voltages according to the data timing control signal (DCS) and outputs them to the data lines (DL). In this case, subpixels (SPX) are selected by the write scan signals of the first scan driving unit (SDC1) and the second scan driving unit (SDC2), and data voltages can be supplied to the selected subpixels (SPX).

[0086] The timing control circuit (251) can receive digital video data and timing signals from an external source. The timing control circuit (251) can generate a scan timing control signal (SCS) and a data timing control signal (DCS) to control the display panel (100) according to the timing signals. The timing control circuit (400) can output the scan timing control signal (SCS) to the first scan driving unit (SDC1) and the second scan driving unit (SDC2). The timing control circuit (251) can output digital video data (DATA) and the data timing control signal (DCS) to the data driving circuit (252).

[0087] A power supply circuit (500) (e.g., a power supply) can generate a plurality of panel driving voltages according to a power supply voltage from an external source. For example, the power supply circuit (500) can generate a first driving voltage (VDD), a second driving voltage (VSS), and a third driving voltage (VINT) and supply them to the display panel (100).

[0088] FIG. 4 is an equivalent circuit diagram showing a subpixel according to one embodiment.

[0089] Referring to FIG. 4, a subpixel (SPX) according to one embodiment may be connected to scan lines (GWL, GIL, GCL, GBL), an emitting line (EL), and a data line (DL). For example, the subpixel (SPX) may be connected to a write scan line (GWL), an initialization scan line (GIL), a control scan line (GCL), a bias scan line (GBL), an emitting line (EL), and a data line (DL).

[0090] A subpixel (SPX) according to one embodiment includes a driving transistor (DT), switching elements, a capacitor (C1), and a light-emitting element (LE). The switching elements include first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6).

[0091] The driving transistor (DT) includes a gate electrode, a conductive layer, and a second electrode. The driving transistor (DT) controls the drain-source current (Ids, hereinafter referred to as "driving current") flowing between the conductive layer and the second electrode according to the data voltage applied to the gate electrode.

[0092] The light-emitting element (LE) may be a micro light-emitting diode. The light-emitting element (LE) emits light according to the driving current (Ids). The amount of light emitted by the light-emitting element (LE) may be proportional to the driving current (Ids). The anode electrode of the light-emitting element (LE) is connected to the conductive layer of the fourth transistor (ST4) and the second electrode of the sixth transistor (ST6), and the cathode electrode may be connected to a second power line (VSL) to which a second power supply voltage is applied.

[0093] A capacitor (C1) is formed between the second electrode of a driving transistor (DT) and a first power line (VDL) to which a first power supply voltage is applied. The first power supply voltage may be a voltage level higher than the second power supply voltage. One electrode of the capacitor (C1) may be connected to the second electrode of the driving transistor (DT), and the other electrode may be connected to the first power line (VDL).

[0094] As shown in FIG. 4, the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) can all be formed as p-type MOSFETs. In this case, the active layer of each of the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) can be formed of polysilicon.

[0095] The gate electrode of the first transistor (ST1) and the gate electrode of the second transistor (ST2) may be connected to the write scan line (GWL), the gate electrode of the third transistor (ST3) may be connected to the initialization scan line (GIL), and the gate electrode of the fourth transistor (ST4) may be connected to the bias scan line (GBL). Since the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) are formed as p-type MOSFETs, they may be turned on when a scan signal of gate low voltage and a light emission signal are applied to the control scan line (GCL), the initialization scan line (GIL), the write scan line (GWL), the bias scan line (GBL), and the light emission line (EL), respectively. One electrode of the third transistor (ST3) and one electrode of the fourth transistor (ST4) may be connected to the initialization voltage line (VIL).

[0096] Alternatively, the driving transistor (DT), the second transistor (ST2), the fourth transistor (ST4), the fifth transistor (ST5), and the sixth transistor (ST6) may be formed as p-type MOSFETs, and the first transistor (ST1) and the third transistor (ST3) may be formed as n-type MOSFETs. The active layer of each of the driving transistor (DT), the second transistor (ST2), the fourth transistor (ST4), the fifth transistor (ST5), and the sixth transistor (ST6) formed as p-type MOSFETs may be formed of polysilicon, and the active layer of each of the first transistor (ST1) and the third transistor (ST3) formed as n-type MOSFETs may be formed of an oxide semiconductor.

[0097] In this case, since the first transistor (ST1) and the third transistor (ST3) are formed as n-type MOSFETs, the first transistor (ST1) can be turned on when a gate high voltage scan signal is applied, and the third transistor (ST3) can be turned on when an initialization scan signal of a gate high voltage is applied. In contrast, since the second transistor (ST2), the fourth transistor (ST4), the fifth transistor (ST5), and the sixth transistor (ST6) are formed as p-type MOSFETs, they can be turned on when a gate low voltage scan signal and a light emission signal are applied.

[0098] Alternatively, the fourth transistor (ST4) is formed as an n-type MOSFET, and thus the active layer of each of the fourth transistors (ST4) can be formed as an oxide semiconductor. When the fourth transistor (ST4) is formed as an n-type MOSFET, it can be turned on when a scan signal of gate high voltage is applied.

[0099] Alternatively, the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) may all be formed as n-type MOSFETs. In this case, the active layer of each of the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) may be formed as an oxide semiconductor.

[0100] FIG. 5 is a layout diagram showing pixels of a display area according to one embodiment.

[0101] Referring to FIG. 5, each of the plurality of pixels (PX) of the display area (DA) may include three subpixels (SPX1, SPX2, SPX3), but the embodiments of the present specification are not limited thereto and may include four subpixels. When each of the plurality of pixels (PX) includes three subpixels (SPX1, SPX2, SPX3), it may include a first subpixel (SPX1), a second subpixel (SPX2), and a third subpixel (SPX3).

[0102] Multiple pixels (PX) can be arranged in a matrix form. In each of the multiple pixels (PX), the first sub-pixel (SPX1), the second sub-pixel (SPX2), and the third sub-pixel (SPX3) can be arranged in a first direction (DR1).

[0103] In the case where each of the plurality of pixels (PX) includes three subpixels (SPX1, SPX2, SPX3), the first subpixel (SPX1) may emit light of a first color, the second subpixel (SPX2) may emit light of a second color, and the third subpixel (SPX3) may emit light of a third color. Here, the first color light may be light in the green wavelength band, the second color light may be light in the red wavelength band, and the third color light may be light in the blue wavelength band. For example, the blue wavelength band may refer to a wavelength band in which the main peak wavelength of the light is included in the wavelength band of approximately 370 nm to 460 nm, the green wavelength band may refer to a wavelength band in which the main peak wavelength of the light is included in the wavelength band of approximately 480 nm to 560 nm, and the red wavelength band may refer to a wavelength band in which the main peak wavelength of the light is included in the wavelength band of approximately 600 nm to 750 nm.

[0104] Alternatively, if each of the plurality of pixels (PX) includes four subpixels, the first subpixel may emit light of a first color, the second subpixel and the fourth subpixel may emit light of a second color, and the third subpixel may emit light of a third color. Alternatively, the first subpixel may emit light of a first color, the second subpixel may emit light of a second color, the third subpixel may emit light of a third color, and the fourth subpixel may emit light of a fourth color. In this case, the light of the fourth color may be white light.

[0105] A first subpixel (SPX1) comprises a first pixel electrode (PXE1), one or more light-emitting elements (LE), and a first light-converting layer (QDL1). A second subpixel (SPX2) comprises a second pixel electrode (PXE2), one or more light-emitting elements (LE), and a second light-converting layer (QDL2). A third subpixel (SPX3) comprises a third pixel electrode (PXE3), one or more light-emitting elements (LE), and a third light-converting layer (QDL3).

[0106] Each of the first pixel electrode (PXE1), the second pixel electrode (PXE2), and the third pixel electrode (PXE3) may have a rectangular planar shape having a short side in the first direction (DR1) and a long side in the second direction (DR2). The area of ​​the first subpixel (SPX1), the area of ​​the second subpixel (SPX2), and the area of ​​the third subpixel (SPX3) may be set according to the light conversion efficiency of the first light conversion layer (QDL1) and the light conversion efficiency of the second light conversion layer (QDL2). For example, the area of ​​the subpixel may be larger as the light conversion efficiency decreases.

[0107] For example, as shown in FIG. 5, if the light conversion efficiency of the second light conversion layer (QDL2) is lower than the light conversion efficiency of the first light conversion layer (QDL1), the area of ​​the second pixel electrode (PXE2) may be larger than the area of ​​the first pixel electrode (PXE1). Additionally, while the light transmission layer (TPL) transmits the light of the light-emitting element (LE) as is, the first light conversion layer (QDL1) must convert the light, so the area of ​​the first pixel electrode (PXE1) may be larger than the area of ​​the third pixel electrode (PXE3).

[0108] When the light conversion efficiency of the second light conversion layer (QDL2) is lower than the light conversion efficiency of the first light conversion layer (QDL1), the number of light-emitting elements disposed on the second pixel electrode (PXE2) may be greater than the number of light-emitting elements disposed on the first pixel electrode (PXE1). For example, one light-emitting element may be disposed on the first pixel electrode (PXE1), and two light-emitting elements, a first type light-emitting element (LE1T) and a second type light-emitting element (LE2T), may be disposed on the second pixel electrode (PXE2). The first type light-emitting element (LE1T) and the second type light-emitting element (LE2T) may be connected in series.

[0109] Each of the pixel electrodes (PXE1, PXE2, PXE3) can be electrically connected to at least one transistor through a pixel connection hole (CT1 / CT2 / CT3). For example, each of the pixel electrodes (PXE1, PXE2, PXE3) can be electrically connected to the second electrode of the fourth transistor (ST4 in FIG. 4) and the second electrode of the sixth transistor (ST6 in FIG. 4) of the corresponding subpixel.

[0110] Pixel electrodes (PXE1 / PXE2 / PXE3) and common electrodes (CE1 / CE2 / CE3) may be arranged in a second direction (DR2) at each of the first subpixel (SPX1), the second subpixel (SPX2), and the third subpixel (SPX3). Each of the pixel electrodes (PXE1, PXE2, PXE3) and the common electrodes (CE1, CE2, CE3) may have a rectangular planar shape, but the embodiments of the present specification are not limited thereto. The area of ​​the first pixel electrode (PXE1) may be the same as the area of ​​the first common electrode (CE1), the area of ​​the second pixel electrode (PXE2) may be the same as the area of ​​the second common electrode (CE2), and the area of ​​the third pixel electrode (PXE3) may be the same as the area of ​​the third common electrode (CE3), but the embodiments of the present specification are not limited thereto.

[0111] For example, as shown in FIG. 5, when the light conversion efficiency of the second light conversion layer (QDL2) is lower than the light conversion efficiency of the first light conversion layer (QDL1), the area of ​​the second pixel electrode (PXE2) may be larger than the area of ​​the first pixel electrode (PXE1), and the area of ​​the second common electrode (CE2) may be larger than the area of ​​the first common electrode (CE1). In addition, since the light transmission layer (TPL) transmits the light of the light-emitting element (LE) as is, while the first light conversion layer (QDL1) must convert the light, the area of ​​the first pixel electrode (PXE1) may be larger than the area of ​​the third pixel electrode (PXE3), and the area of ​​the first common electrode (CE1) may be larger than the area of ​​the third common electrode (CE3).

[0112] Each of the pixel electrodes (PXE1, PXE2, PXE3) can be electrically connected to at least one transistor through a pixel connection hole (CT1 / CT2 / CT3). For example, each of the pixel electrodes (PXE1, PXE2, PXE3) can be electrically connected to the second electrode of the fourth transistor (ST4 in FIG. 4) and the second electrode of the sixth transistor (ST6 in FIG. 4) of the corresponding subpixel.

[0113] The first common electrode (CE1) can be connected to a second power line (VSL) to which a second driving voltage (VSS) is applied through a first common connection hole (CT4). The second common electrode (CE2) can be connected to the second power line (VSL) through a second common connection hole (CT5). The third common electrode (CE3) can be connected to the second power line (VSL) through a third common connection hole (CT6). Thus, the second driving voltage (VSS) can be applied to each of the common electrodes (CE1, CE2, CE3). The pixel electrodes (PXE1, PXE2, PXE3) may be referred to as the anode electrode or the first electrode, and the common electrodes (CE1, CE2, CE3) may be referred to as the cathode electrode or the second electrode.

[0114] A plurality of light-emitting elements (LEs) may be disposed on pixel electrodes (PXE1 / PXE2 / PXE3) and common electrodes (CE1 / CE2 / CE3). Each of the plurality of light-emitting elements (LEs) may have a rectangular planar shape, but the embodiments of this specification are not limited thereto. For example, each of the plurality of light-emitting elements (LEs) may have a circular planar shape.

[0115] The first light conversion layer (QDL1) can completely overlap with a plurality of light-emitting elements (LE) of the first subpixel (SPX1). The first light conversion layer (QDL1) can convert or shift the peak wavelength of incident light to light of another specific peak wavelength and emit it. For example, the first light conversion layer (QDL1) can convert or shift third light emitted from a plurality of light-emitting elements (LE) of the first subpixel (SPX1) into first light.

[0116] The second light conversion layer (QDL2) can completely overlap with the plurality of light-emitting elements (LE) of the second subpixel (SPX2). The area of ​​the second light conversion layer (QDL2) may be larger than the area of ​​the second pixel electrode (PXE2). The second light conversion layer (QDL2) can convert or shift the peak wavelength of the incident light to light of another specific peak wavelength and emit it. For example, the second light conversion layer (QDL2) can convert or shift the third light emitted from the plurality of light-emitting elements (LE) of the second subpixel (SPX2) into the second light.

[0117] The light-transmitting layer (TPL) can completely overlap with the plurality of light-emitting elements (LE) of the third subpixel (SPX3). The light-transmitting layer (TPL) can transmit incident light as is. For example, the light-transmitting layer (TPL) can transmit the third light emitted from the plurality of light-emitting elements (LE) of the third subpixel (SPX3) as is.

[0118] When the light-emitting element (LE) of the first subpixel (SPX1) emits light of the first color, the light-emitting element (LE) of the second subpixel (SPX2) emits light of the second color, and the light-emitting element (LE) of the third subpixel (SPX3) emits light of the third color, the light conversion layers (QDL1, QDL2) and the light transmission layer (TPL) may be omitted.

[0119] FIG. 6 is a cross-sectional view showing an example of a cross-section of a display panel corresponding to the line I-I' of FIG. 5. FIG. 7 is a cross-sectional view showing in detail an example of region A of FIG. 6. FIG. 8 is a cross-sectional view showing in detail an example of region B of FIG. 6. FIG. 8 includes a repair light-emitting element and a repair bonding material of FIG. 6.

[0120] Referring to FIGS. 6 and FIGS. 7, the substrate (SUB) may be made of an insulating material such as glass or a polymer resin. If the substrate (SUB) is made of a polymer resin, it may be a stretchable flexible substrate. The polymer resin may be an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0121] A barrier film (BR) may be disposed on a substrate (SUB). The barrier film (BR) is a film intended to protect the transistors of the thin-film transistor layer (TFTL) from moisture penetrating through the substrate (SUB), which is susceptible to moisture permeability. The barrier film (BR) may be composed of multiple inorganic films stacked alternately.

[0122] A thin-film transistor (TFT1) may be disposed on the barrier film (BR). The thin-film transistor (TFT1) may be either the fourth transistor (ST4) or the sixth transistor (ST6) shown in FIG. 4. The thin-film transistor (TFT1) may include a first active layer (ACT1) and a first gate electrode (G1).

[0123] A first active layer (ACT1) of a thin-film transistor (TFT1) may be disposed on a barrier film (BR). The first active layer (ACT1) of the thin-film transistor (TFT1) may include polycrystalline silicon, single-crystal silicon, low-temperature polycrystalline silicon, or amorphous silicon. Alternatively, the first active layer (ACT1) of the thin-film transistor (TFT1) may be made of an oxide semiconductor including IGZO (indium (In), gallium (Ga), zinc (Zn), and oxygen (O)), IGZTO (indium (In), gallium (Ga), zinc (Zn), tin (Sn), and oxygen (O)), or IGTO (indium (In), gallium (Ga), tin (Sn), and oxygen (O)).

[0124] The first active layer (ACT1) may include a first channel region (CHA1), a first source region (S1), and a first drain region (D1). The first channel region (CHA1) may be a region that overlaps with the first gate electrode (G1) in the third direction (DR3), which is the thickness direction of the substrate (SUB). The first source region (S1) may be disposed on one side of the first channel region (CHA1), and the first drain region (D1) may be disposed on the other side of the first channel region (CHA1). The first source region (S1) and the first drain region (D1) may be regions that do not overlap with the first gate electrode (G1) in the third direction (DR3). The first source region (S1) and the first drain region (D1) may be regions that have conductivity by doping ions into a semiconductor material.

[0125] A first gate insulating film (131) may be disposed on the first channel region (CHA1), the first source region (S1), and the first drain region (D1) of the thin film transistor (TFT1).

[0126] A first gate metal layer may be disposed on the first gate insulating film (131). The first gate metal layer may include a first gate electrode (G1) and a first capacitor electrode (CAE1) of a thin-film transistor (TFT1). The first gate electrode (G1) may overlap with the first active layer (ACT1) in the third direction (DR3). Although the first gate electrode (G1) and the first capacitor electrode (CAE1) are shown as being separated from each other in FIG. 6, the first gate electrode (G1) and the first capacitor electrode (CAE1) may be connected to each other.

[0127] A second gate insulating film (132) may be disposed on the first gate electrode (G1) and the first capacitor electrode (CAE1) of the thin-film transistor (TFT1).

[0128] A second gate metal layer may be disposed on the second gate insulating film (132). The second gate metal layer may include a second capacitor electrode (CAE2). The second capacitor electrode (CAE2) may overlap with the first capacitor electrode (CAE1) of the thin film transistor (TFT1) in the third direction (DR3). Since the second gate insulating film (132) has a predetermined dielectric constant, a capacitor (C1 in FIG. 4) may be formed by the first capacitor electrode (CAE1), the second capacitor electrode (CAE2), and the second gate insulating film (132) disposed between them.

[0129] A first interlayer insulating film (141) may be disposed on the second capacitor electrode (CAE2).

[0130] A first data metal layer may be disposed on the interlayer insulating film (141). The first data metal layer may include a first source connection electrode (PCE1). The first source connection electrode (PCE1) may be connected to a first drain region (D1) of a first active layer (ACT1) through a first source contact hole (PCT1) penetrating the first gate insulating film (131), the second gate insulating film (132), and the interlayer insulating film (141).

[0131] A first flattening organic film (160) for flattening the step difference caused by a thin film transistor (TFT1) may be disposed on the first source connection electrode (PCE1).

[0132] A second data metal layer may be disposed on the first planarization organic film (160). The second data metal layer may include a second source connection electrode (PCE2). The second source connection electrode (PCE2) may be connected to the first source connection electrode (PCE1) through a second pixel contact hole (PCT2) that penetrates the first planarization organic film (160).

[0133] A second planarizing organic film (180) may be placed on the second source connection electrode (PCE2).

[0134] The barrier film (BR), the first gate insulating film (131), the second gate insulating film (132), the third gate insulating film (133), and the interlayer insulating film (141) are inorganic films, for example, silicon nitride (SiN x ), silicon nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ), or aluminum oxide (AlO x It can be formed as ).

[0135] The first gate metal layer, the second gate metal layer, the first data metal layer, and the second data metal layer may be formed as a single layer or a multilayer composed of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0136] The first flattening organic film (160) and the second flattening organic film (180) can be formed from organic films such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

[0137] A light-emitting element layer may be disposed on the second planarized organic film (180). The light-emitting element layer may include pixel electrodes (PXE1, PXE2, PXE3), light-emitting elements (LE), a common electrode (CE), and an organic layer (210).

[0138] A pixel electrode layer comprising pixel electrodes (PXE1, PXE2, PXE3) and common electrodes (CE1, CE2, CE3) can be disposed on a second planarization organic film (180).

[0139] Each of the first pixel electrode (PXE1), the second pixel electrode (PXE2), and the third pixel electrode (PXE3) can be connected to the second source connection electrode (PCE2) through a connection hole (CT1 / CT2 / CT3 in FIG. 5) penetrating the second planarization organic film (180). Each of the pixel electrodes (PXE1, PXE2, PXE3) can be connected to the first source region (S1) or the first drain region (D1) of the thin-film transistor (TFT1) through the first source connection electrode (PCE1) and the second source connection electrode (PCE2). Therefore, a voltage controlled by the thin-film transistor (TFT1) can be applied to each of the pixel electrodes (PXE1, PXE2, PXE3).

[0140] Common electrodes (CE1, CE2, CE3) can be connected to a second power line (VSL in FIG. 4) to which a second driving voltage (VSS in FIG. 3) is applied through a common connection hole (CT4 / CT5 / CT6 in FIG. 5). The second common electrode (CE2) can be connected to the second power line (VSL) through a second common connection hole (CT5). The third common electrode (CE3) can be connected to the second power line (VSL) through a third common connection hole (CT6). Therefore, the second driving voltage (VSS) can be applied to each of the common electrodes (CE1, CE2, CE3).

[0141] The pixel electrode layer may be formed as a single layer or a multilayer composed of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. For example, to lower the resistance of each of the pixel electrodes (PXE1, PXE2, PXE3), the pixel electrode layer may be made of copper (Cu), which has low sheet resistance.

[0142] An organic layer (210) may be disposed on each of the pixel electrode layers. For example, the organic layer (210) may cover at least a portion of the pixel electrodes (PXE1, PXE2) and at least a portion of the common electrodes (CE1, CE2).

[0143] The organic layer (210) serves to temporarily fix or adhere an upper member (e.g., a light-emitting element (LE)). For example, the organic layer (210) may be a film for temporarily adhering an upper member (e.g., a light-emitting element (LE)) onto each of the pixel electrodes (PXE1, PXE2, PXE3) and common electrodes (CE1, CE2, CE3). To facilitate temporary adhesion, the thickness of the organic layer (210) may be greater than the thickness of each of the pixel electrodes (PXE1, PXE2) and common electrodes (CE1, CE2), and greater than the thickness of the contact electrode (CTE). The thickness of the organic layer (210) may be about 2 μm, but is not limited thereto.

[0144] The organic layer (210) may be a photosensitive organic film such as a photoresist. Alternatively, the organic layer (210) may be formed from acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc.

[0145] Multiple light-emitting elements (LE) can be disposed on an organic layer (210). In FIGS. 6 and 7, the light-emitting element (LE) is exemplified as a flip-type micro LED. A flip-type micro LED refers to an LED having contact electrodes (CTE1, CTE2) formed on one side (e.g., the bottom side) of the light-emitting element (LE).

[0146] The light-emitting element (LE) may include substantially vertical sides as shown in FIG. 7. For example, the light-emitting element (LE) may be patterned through vertical etching and may have a rectangular or square cross-sectional shape in which the width of the top surface and the width of the bottom surface are substantially the same.

[0147] Each of the multiple light-emitting elements (LEs) can be formed from an inorganic material such as gallium nitride (GaN).

[0148] Each of the plurality of light-emitting elements (LE) can be formed by growing on a semiconductor substrate such as a silicon substrate or a sapphire substrate. The plurality of light-emitting elements (LE) can be transferred directly from the semiconductor substrate or via a relay substrate onto the pixel electrode layer of the display panel (100). Alternatively, the plurality of light-emitting elements (LE) can be transferred onto the pixel electrodes (PXE1, PXE2, PXE3) of the display panel (100) via an electrostatic method using an electrostatic head or a stamp method using an elastic polymer material such as PDMS (Polydimethylsiloane) or silicon as a transfer substrate.

[0149] The light-emitting element (LE) may include a conductive layer (E1), a semiconductor stack (STC), a first contact electrode (CTE1), a second contact electrode (CTE2), and a protective film (INS). The semiconductor stack (STC) may include a first semiconductor layer (SEM1), an active layer (MQW), a second semiconductor layer (SEM2), and a third semiconductor layer (SEM3) arranged sequentially in a third direction (DR3).

[0150] A conductive layer (E1) may be disposed on the lower surface of a first semiconductor layer (SEM1). Although FIG. 7 illustrates a case where the conductive layer (E1) covers the entire lower surface of the first semiconductor layer (SEM1), the embodiments of this specification are not limited thereto. As an example, the conductive layer (E1) may be disposed on a part of the lower surface of the first semiconductor layer (SEM1). The conductive layer (E1) may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu).

[0151] The first semiconductor layer (SEM1) can be placed on the conductive layer (E1). The first semiconductor layer (SEM1) may be made of a semiconductor material layer doped with a first conductive type dopant such as magnesium (Mg), zinc (Zn), calcium (Ca), strontium (Sr), barium (Ba), etc., for example, gallium nitride (GaN).

[0152] The active layer (MQW) can be placed on the first semiconductor layer (SEM1). The active layer (MQW) can emit light through the coupling of electron-hole pairs according to an electric signal applied through the first semiconductor layer (SEM1) and the second semiconductor layer (SEM2).

[0153] The active layer (MQW) may include a material having a single or multiple quantum well structure. When the active layer (MQW) includes a material having a multiple quantum well structure, it may have a structure in which multiple well layers and barrier layers are alternately stacked. In this case, the well layers may be formed of indium gallium nitride (InGaN), and the barrier layers may be formed of gallium nitride (GaN) or aluminum gallium nitride (AlGaN), but the embodiments of this specification are not limited thereto.

[0154] Alternatively, the active layer (MQW) may have a structure in which semiconductor materials with large band gap energy and semiconductor materials with small band gap energy are alternately stacked, or it may include different group 3 to group 5 semiconductor materials depending on the wavelength of the emitted light.

[0155] For example, when the active layer (MQW) contains indium gallium nitride (InGaN), the color of the emitted light may vary depending on the content of indium (In). For example, as the content of indium (In) increases, the wavelength band of the light emitted by the active layer shifts to a red wavelength band, and as the content of indium (In) decreases, the wavelength band of the light emitted by the active layer shifts to a blue wavelength band. For example, the content of indium (In) in the active layer (MQW) of a light-emitting device (LE) that emits a third light (light in the blue wavelength band) may be approximately 10 wt% to 20 wt%.

[0156] A second semiconductor layer (SEM2) may be disposed on a first semiconductor layer (SEM1). The second semiconductor layer (SEM2) may be a semiconductor material layer doped with a second conductivity type dopant, such as silicon (Si), germanium (Ge), tin (Sn), etc., for example, gallium nitride (GaN).

[0157] The third semiconductor layer (SEM3) is a semiconductor material layer in which the n-type dopant is lower than a predetermined threshold value and may be referred to as an un-doped semiconductor layer. For example, the third semiconductor layer (SEM3) may be indium aluminum gallium nitride (InAlGaN), gallium nitride (GaN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), aluminum nitride (AlN), or indium nitride (InN), in which the n-type dopant is lower than a predetermined threshold value.

[0158] Light extraction patterns (LEPs) can be formed on the upper surface of the semiconductor stack (STC). For example, light extraction patterns (LEPs) can be formed on the upper surface of the third semiconductor layer (SEM3).

[0159] Light extraction patterns (LEPs) may be patterns for increasing the efficiency of light emitted from the upper surface of the light-emitting element (LE). Light extraction patterns (LEPs) may be concave patterns formed as hemispheres or semi-ellipses. Light extraction patterns (LEPs) may be concave patterns having a cross-sectional shape of a semicircle or semi-ellipse. The maximum length (Lmax) of the third direction (DR3) of the light extraction patterns (LEPs) may be approximately 100 nm. Additionally, the distance between adjacent light extraction patterns (LEPs) may be approximately 100 nm or less.

[0160] An electron blocking layer may be placed between the first semiconductor layer (SEM1) and the active layer (MQW). The electron blocking layer may be a layer for suppressing or preventing too many electrons from flowing into the active layer (MQW). For example, the electron blocking layer may be aluminum gallium nitride (AlGaN) or p-type aluminum gallium nitride (AlGaN) doped with p-type magnesium (Mg). The electron blocking layer may be omitted.

[0161] A superlattice layer may be disposed between the active layer (MQW) and the second semiconductor layer (SEM2). The superlattice layer may be a layer for relieving stress between the second semiconductor layer (SEM2) and the active layer (MQW). For example, the superlattice layer may be formed of indium gallium nitride (InGaN) or gallium nitride (GaN). The superlattice layer may be omitted.

[0162] The protective film (INS) may be a film for protecting the bottom surface and side surface of the light-emitting element (LE). The protective film (INS) may be disposed on the bottom surface and side surface of the conductive layer (E1) and on the side surface of the semiconductor stack (STC). Specifically, the protective film (INS) may be disposed on the bottom surface and side surface of the conductive layer (E1), on the side surface of the first semiconductor layer (SEM1), on the side surface of the active layer (MQW), and on the side surface of the second semiconductor layer (SEM2). The protective film (INS) may be an inorganic film, for example, silicon nitride (SiN x ), silicon nitride (SiON), silicon oxide (SiO x), titanium oxide (TiO x ), or aluminum oxide (AlO x It can be formed as ). It is preferable that the protective film (INS) be placed from one end to the other end of the side of the light-emitting element (LE), but it may be placed spaced apart from one end due to process error.

[0163] A hole (LEH) may be formed that penetrates the conductive layer (E1), the first semiconductor layer (SEM1), and the active layer (MQW) of the light-emitting element (LE) to expose the second semiconductor layer (SEM2). The hole (LEH) may have a rectangular planar shape, but the embodiments of this specification are not limited thereto. As an example, the hole (LEH) may have a polygonal planar shape such as a circle, an ellipse, or a square.

[0164] Additionally, the protective film (INS) may be disposed on the sidewall of the conductive layer (E1) exposed in the hole (LEH), the sidewall of the first semiconductor layer (SEM1), and the sidewall of the active layer (MQW). The protective film (INS) may not cover the second semiconductor layer (SEM2) in the hole (LEH). Therefore, the second semiconductor layer (SEM2) may be exposed without being covered by the protective film (INS).

[0165] The first contact electrode (CTE1) may be disposed on at least one side of the semiconductor stack (STC) and on at least one side of the conductive layer (E1) and on the lower surface. The first contact electrode (CTE1) may be disposed on the lower surface of the conductive layer (E1) that is exposed and not covered by a protective film (INS). Therefore, the first contact electrode (CTE1) may be electrically connected to the conductive layer (E1).

[0166] The second contact electrode (CTE2) may be disposed on at least one side of the semiconductor stack (STC), at least one side of the conductive layer (E1), and on the lower surface. In this case, while the first contact electrode (CTE1) is disposed on the first side of the semiconductor stack (STC) and the first side of the conductive layer (E1), the second contact electrode (CTE2) may be disposed on the second side of the semiconductor stack (STC) and the second side of the conductive layer (E1).

[0167] The second contact electrode (CTE2) can be placed on a protective film (INS) placed in the hole (LEH) and on a second semiconductor layer (SEM2) exposed in the hole (LEH) without being covered by the protective film (INS). Therefore, the second contact electrode (CTE2) can be electrically connected to the second semiconductor layer (SEM2) in the hole (LEH).

[0168] The first contact electrode (CTE1) and the second contact electrode (CTE2) may be disposed on at least a portion of the side of the semiconductor stack (STC). Among the sides of the semiconductor stack (STC), at least the area adjacent to the upper surface of the semiconductor stack (STC) may be exposed and not covered by the first contact electrode (CTE1) and the second contact electrode (CTE2). For example, the first contact electrode (CTE1) and the second contact electrode (CTE2) are spaced apart from the upper surface of the semiconductor stack (STC) in a third direction (DR3). The first contact electrode (CTE1) and the second contact electrode (CTE2) may be formed lower than at least one end of the protective film (INS). For example, the distance between the first contact electrode (CTE1) and the second contact electrode (CTE2) and the upper surface of the semiconductor stack (STC) may be greater than the distance between the protective film (INS) and the upper surface of the semiconductor stack (STC).

[0169] The first contact electrode (CTE1) and the second contact electrode (CTE2) may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Specifically, to increase reflectivity, the first contact electrode (CTE1) and the second contact electrode (CTE2) may be formed with a two-layer structure of chromium (Cr) and gold (Au), a three-layer structure of titanium (Ti), aluminum (Al), and titanium (Ti), or a three-layer structure of ITO (Indium Tin Oxide), silver (Ag), and ITO (Indium Tin Oxide).

[0170] Each of the first contact electrode (CTE1) and the second contact electrode (CTE2) may be placed on three sides of the semiconductor stack (STC). For example, if the semiconductor stack (STC) includes first to fourth sides, the first contact electrode (CTE1) may be placed on the first side, the second side, and the third side, and the second contact electrode (CTE2) may be placed on the second side, the third side, and the fourth side.

[0171] The connecting electrodes (BE1, BE2) electrically connect the light-emitting element (LE) and the pixel electrode layer.

[0172] The first connecting electrode (BE1) connects the first contact electrode (CTE1) of the light-emitting element (LE) and the pixel electrode (PXE1 / PXE2). The first connecting electrode (BE1) can be connected to the exposed pixel electrode (PXE1 / PXE2) through a first connecting hole (BH1) penetrating the first organic layer (210). Additionally, the first connecting electrode (BE1) can be placed on the upper surface of the first organic layer (210) and on the first contact electrode (CTE1).

[0173] The first connecting electrode (BE1) may include a first sub-connecting electrode (BE11) and a second sub-connecting electrode (BE12) disposed on the first sub-connecting electrode (BE11). The first sub-connecting electrode (BE11) and the second sub-connecting electrode (BE12) may include the same material or different materials. Each of the first sub-connecting electrode (BE11) and the second sub-connecting electrode (BE12) may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Alternatively, each of the first sub-connecting electrode (BE11) and the second sub-connecting electrode (BE12) may be made of a transparent conductive material (TCO), such as indium tin oxide (ITO) and indium zinc oxide (IZO).

[0174] The second connecting electrode (BE2) connects the second contact electrode (CTE2) of the light-emitting element (LE) and the common electrode (CE1 / CE2). The second connecting electrode (BE2) can be connected to the common electrode (CE1 / CE2) exposed through a second connecting hole (BH2) penetrating the first organic layer (210). Additionally, the second connecting electrode (BE2) can be placed on the upper surface of the first organic layer (210) and on the second contact electrode (CTE2).

[0175] The second connecting electrode (BE2) may include a third sub-connecting electrode (BE21) and a fourth sub-connecting electrode (BE22) disposed on the third sub-connecting electrode (BE21). The third sub-connecting electrode (BE21) and the fourth sub-connecting electrode (BE22) may include the same material or different materials. Each of the third sub-connecting electrode (BE21) and the fourth sub-connecting electrode (BE22) may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Alternatively, each of the third sub-connecting electrode (BE21) and the fourth sub-connecting electrode (BE22) may be made of a transparent conductive material (TCO), such as indium tin oxide (ITO) and indium zinc oxide (IZO).

[0176] The conductive layer (E1) of the light-emitting element (LE) can be connected to the pixel electrode (PXE1 / PXE2) through the first contact electrode (CTE1) and the first connecting electrode (BE1). Additionally, the second semiconductor layer (SEM2) of the light-emitting element (LE) can be connected to the common electrode (CE1 / CE2) through the second contact electrode (CTE2) and the second connecting electrode (BE2) formed in the hole (LEH).

[0177] Additionally, at each of the sides of the semiconductor stack (STC), the area adjacent to the upper surface of the semiconductor stack (STC) may be exposed without being covered by the first connecting electrode (BE1) or the second connecting electrode (BE2).

[0178] The second organic film (211) may be positioned to cover a portion of the side of a plurality of light-emitting elements (LE). Additionally, the second organic film (211) may be positioned to cover the first connecting electrode (BE1) and the second connecting electrode (BE2).

[0179] A third organic film (212) may be disposed on the second organic film (211). The third organic film (212) may be disposed to cover another portion of the side of each of the plurality of light-emitting elements (LE). The third organic film (212) may be disposed on the protective film (INS), the first connecting electrode (BE1), and the second connecting electrode (BE2) that are exposed and not covered by the second organic film (211), as shown in FIG. 7, but the embodiments of the present specification are not limited thereto. The upper surface of each of the plurality of light-emitting elements (LE) may be exposed and not covered by the third organic film (212).

[0180] The second organic film (211) and the third organic film (212) are layers for flattening the step difference caused by the plurality of light-emitting elements (LE). If the height of the second organic film (211) is arranged to cover most of the side of each of the plurality of light-emitting elements (LE), the third organic film (212) may be omitted.

[0181] The second organic film (211) and the third organic film (212) can be formed from organic films such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

[0182] The first capping layer (CAP1) can be placed on the third organic film (212) and the light-emitting element (LE).

[0183] A light-blocking layer (BM), a first light-converting layer (QDL1), a second light-converting layer (QDL2), and a light-transmitting layer (TPL) may be disposed on the first capping layer (CAP1). The first light-converting layer (QDL1), the second light-converting layer (QDL2), and the light-transmitting layer (TPL) may be formed by the partitions of the light-blocking layer (BM). Therefore, the first light-converting layer (QDL1) may be disposed on the first capping layer (CAP1) in the first subpixel (SPX1), the second light-converting layer (QDL2) may be disposed on the first capping layer (CAP1) in the second subpixel (SPX2), and the light-transmitting layer (TPL) may be disposed on the first capping layer (CAP1) in the third subpixel (SPX3). The light-blocking layer (BM) may not overlap with a plurality of light-emitting elements (LE) in the third direction (DR3).

[0184] The first light conversion layer (QDL1) can convert a portion of the third light (light in the blue wavelength band) incident from the light-emitting element (LE) into the first light (light in the red wavelength band). The first light conversion layer (QDL1) may include a first base resin (BRS1) and a first wavelength conversion particle (WCP1). The first base resin (BRS1) may include a transparent organic material. The first wavelength conversion particle (WCP1) can convert a portion of the third light (light in the blue wavelength band) incident from the light-emitting element (LE) into the first light (light in the red wavelength band).

[0185] The second light conversion layer (QDL2) can convert a portion of the third light (light in the blue wavelength band) incident from the light-emitting element (LE) into second light (light in the green wavelength band). It may include a second base resin (BRS2) and a second wavelength conversion particle (WCP2). The second base resin (BRS2) may include a transparent organic material. The second wavelength conversion particle (WCP2) can convert a portion of the third light (light in the blue wavelength band) incident from the light-emitting element (LE) into second light (light in the green wavelength band).

[0186] The light-transmitting layer (TPL) may include a light-transmitting organic material.

[0187] For example, the first base resin (BRS1), the second base resin (BRS2), and the light-transmitting layer (TPL) may include epoxy resin, acrylic resin, cardo resin, or imide resin, etc. The first and second wavelength conversion particles (WCP1, WCP2) may be quantum dots (QD), quantum rods, fluorescent materials, or phosphorescent materials.

[0188] The light-blocking layer (BM) may include a first light-blocking layer (BM1) and a second light-blocking layer (BM2) that are sequentially stacked. The length of the first direction (DR1) or the length of the second direction (DR2) of the first light-blocking layer (BM1) may be wider than the length of the first direction (DR1) or the length of the second direction (DR2) of the second light-blocking layer (BM2). The first light-blocking layer (BM1) and the second light-blocking layer (BM2) may be formed from organic films such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin. The first light-blocking layer (BM1) and the second light-blocking layer (BM2) may include a light-blocking material to prevent light from a light-emitting element (LE) of one subpixel from proceeding to an adjacent subpixel. For example, the first light-blocking layer (BM1) and the second light-blocking layer (BM2) may include an inorganic black pigment such as carbon black or an organic black pigment.

[0189] The second capping layer (CAP2) can be disposed on the first capping layer (CAP1) and the light-blocking layer (BM). The second capping layer (CAP2) can be disposed on the side and top surface of the light-blocking layer (BM). That is, the second capping layer (CAP2) can be disposed on the side of the first light-blocking layer (BM1) and on the side and top surface of the second light-blocking layer (BM2).

[0190] A reflective film (RF) may be disposed between the light-blocking layer (BM) and the first light-converting layer (QDL1), between the light-blocking layer (BM) and the second light-converting layer (QDL2), and between the light-blocking layer (BM) and the light-transmitting layer (TPL). The reflective film (RF) may be disposed on a second capping layer (CAP2) disposed on the side of the first light-blocking layer (BM1) and the side of the second light-blocking layer (BM2). The reflective film (RF) serves to reflect light traveling in a lateral direction from the first light-converting layer (QDL1), the second light-converting layer (QDL2), and the light-transmitting layer (TPL).

[0191] The reflective film (RF) may include a highly reflective metallic material such as aluminum (Al). The thickness of the reflective film (RF) may be approximately 0.1 μm.

[0192] Alternatively, the reflective film (RF) may comprise a pair of first and second layers, M (where M is an integer greater than or equal to 2), having different refractive indices to function as Distributed Bragg Reflectors (DBRs). In this case, M first layers and M second layers may be arranged alternately. The first and second layers may be inorganic films, for example, silicon nitride (SiN x ), silicon nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ), or aluminum oxide (AlO x It can be formed as ).

[0193] The third capping layer (CAP3) can be disposed on the second capping layer (CAP2), the first light conversion layer (QDL1), the second light conversion layer (QDL2), and the light transmission layer (TPL).

[0194] The first capping layer (CAP1), the second capping layer (CAP2), and the third capping layer (CAP3) are inorganic films, for example, silicon nitride (SiN x ), silicon nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiOx ), or aluminum oxide (AlO x It can be formed as follows. The first light conversion layer (QDL1), the second light conversion layer (QDL2), and the light transmission layer (TPL) can be encapsulated by the first capping layer (CAP1), the second capping layer (CAP2), and the third capping layer (CAP3).

[0195] A fourth organic film (213) may be disposed on the second capping layer (CAP2). A plurality of color filters (CF1, CF2, CF3) may be disposed on the fourth organic film (213). The plurality of color filters (CF1, CF2, CF3) may include first color filters (CF1), second color filters (CF2), and third color filters (CF3).

[0196] A first color filter (CF1) disposed in a first subpixel (SPX1) can transmit a first light (light in the red wavelength band) and absorb or block a third light (light in the blue wavelength band). Therefore, the first color filter (CF1) can transmit the first light (light in the red wavelength band) converted by the first light conversion layer (QDL1) among the third light (light in the blue wavelength band) emitted from the light-emitting element (LE), and can absorb or block the third light (light in the blue wavelength band) that is not converted by the first light conversion layer (QDL1). Accordingly, the first subpixel (SPX1) can emit the first light (light in the red wavelength band).

[0197] A second color filter (CF2) placed in the second subpixel (SPX2) can transmit second light (light in the green wavelength band) and absorb or block third light (light in the blue wavelength band). Therefore, the second color filter (CF2) can transmit second light (light in the green wavelength band) converted by the first light conversion layer (QDL1) among the third light (light in the blue wavelength band) emitted from the light-emitting element (LE), and can absorb or block third light (light in the blue wavelength band) that is not converted by the first light conversion layer (QDL1). Accordingly, the second subpixel (SPX2) can emit second light (light in the green wavelength band).

[0198] A third color filter (CF3) placed in a third subpixel (SPX3) can transmit third light (light in the blue wavelength band). Therefore, the third color filter (CF3) can transmit third light (light in the blue wavelength band) emitted from a light-emitting element (LE) passing through a light-transmitting layer (TPL). Accordingly, the third subpixel (SPX3) can emit third light (light in the blue wavelength band).

[0199] The first color filter (CF1), the second color filter (CF2), and the third color filter (CF3) that overlap in the third direction (DR3) can overlap with the light-blocking layer (BM) in the third direction (DR3).

[0200] A fifth organic film (214) for flattening can be placed on a plurality of color filters (CF1, CF2, CF3).

[0201] The fourth organic film (213) and the fifth organic film (214) can be formed from acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc.

[0202] Referring to FIGS. 6 and 8, a repairing light-emitting element (RLP) is illustrated as being placed in a third subpixel (SPX3), but is not limited thereto. The repairing light-emitting element (RLE) can be transferred to a location where the light-emitting element (LE) has been removed due to defects or other reasons. To transfer the repairing light-emitting element (RLP) to a location where the light-emitting element (LE) has been removed, a repair bonding material (RM) is placed between the repairing light-emitting element (RLP) and the pixel electrode layer. The repairing light-emitting element (RLE) has the same structure as the light-emitting element (LE) described in FIG. 7. Accordingly, the repairing light-emitting element (RLP) may include a conductive layer (E1), a semiconductor stack (STC), a first contact electrode (CTE1), a second contact electrode (CTE2), and a protective film (INS). Detailed descriptions of the conductive layer (E1), the semiconductor stack (STC), the first contact electrode (CTE1), the second contact electrode (CTE2), and the protective film (INS) are redundant and therefore will not be described repeatedly.

[0203] When removing a defective light-emitting element (RLP), a portion of the organic layer (210) is removed, so that only a portion remains between the pixel electrode (PXE3) and the common electrode (CE3). The organic layer (210) thus left is not placed on the pixel electrode (PXE3) and the common electrode (CE3).

[0204] Repair bonding materials (RM1, RM2) are disposed between the pixel electrode (PXE3) and the common electrode (CE3). For example, a first repair bonding material (RM1) may be disposed between the pixel electrode (PXE3) and the first contact electrode (CTE1), and a second repair bonding material (RM2) may be disposed between the common electrodes (CE3). The second repair bonding material (RM2) may fill a hole (LEH) that exposes the second semiconductor layer (SEM2). The second repair bonding material (RM2) may be filled higher than the active layer (MQW) within the hole (LEH), but is not limited thereto.

[0205] The volume of the second repair bonding material (RM2) is larger than the volume of the first repair bonding material (RM1). For example, the volume of the second repair bonding material (RM2) may have a range of 1.1 to 3.0 relative to the volume of the first repair bonding material (RM1).

[0206] The repair bonding material (RM1, RM2) may be a conductive ink, conductive paste, conductive photoresist, etc. For example, the repair bonding material (RM1, RM2) may be an organic material containing conductive particles such as a conductive metal or carbon black. The conductive metal may be particles formed of, for example, silver (Ag), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), copper (Cu), etc., but is not limited thereto.

[0207] According to one embodiment, by applying different volume amounts to the second repair bonding material (RM2) and the first repair bonding material (RM1), the risk of resistance increase between the second repair bonding material (RM2) with the hole (LEH) and the light-emitting element (LE) can be minimized, while minimizing the risk of short circuit failure between the pixel electrode (PXE3) and the common electrode (CE3).

[0208] FIG. 9 is a cross-sectional view showing another example of a cross-section of a display panel corresponding to the line I1-I1' of FIG. 5. FIG. 10 is a cross-sectional view showing another example of region A2 of FIG. 9 in detail. FIG. 11 includes a repair light-emitting element and a repair bonding material of FIG. 9.

[0209] The embodiments of FIGS. 9 to 11 differ from the embodiments of FIGS. 6 to 8 in that the light-emitting element (LE) is bonded to the pixel electrode layer using a bonding metal (BOM) instead of an organic layer (210), and the contact electrode (CTE) is not placed on the side of the semiconductor stack (STC). In FIGS. 9 to 11, descriptions that overlap with the embodiments of FIGS. 6 to 8 are omitted, and the explanation focuses on the differences from the embodiments of FIGS. 6 to 8.

[0210] Referring to FIGS. 9 and FIGS. 10, bonding metals (BOM1, BOM2) can be placed between the light-emitting element (LE) and the pixel electrode layer.

[0211] A first bonding metal (BOM1) may be disposed on pixel electrodes (PXE1, PXE2) and a second bonding metal (BOM2) may be disposed on common electrodes (CE1, CE2). A first contact electrode (CTE1) may be disposed on the first bonding metal (BOM1), and a second contact electrode (CTE2) may be disposed on the second bonding metal (BOM2).

[0212] The first contact electrode (CTE1) can be placed on one side of the semiconductor stack (STC). The first contact electrode (CTE1) can be placed on the lower surface of the exposed conductive layer (E1) without being covered by a protective film (INS). Therefore, the first contact electrode (CTE1) can be electrically connected to the conductive layer (E1).

[0213] The second contact electrode (CTE2) may be disposed on one side of the same semiconductor stack (STC) as the first contact electrode (CTE1), but spaced apart from the first contact electrode (CTE1).

[0214] The second contact electrode (CTE2) can be placed on a protective film (INS) placed in the hole (LEH) and on a second semiconductor layer (SEM2) exposed in the hole (LEH) without being covered by the protective film (INS). Therefore, the second contact electrode (CTE2) can be electrically connected to the second semiconductor layer (SEM2) in the hole (LEH).

[0215] The bonding metal (BOM1, BOM2) may include at least one of gold (Au), copper (Cu), aluminum (Al), and tin (Sn), or may include a transparent conductive oxide such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). Alternatively, the connecting electrode (126) may include a first layer including any one of gold (Au), copper (Cu), aluminum (Al), and tin (Sn), and a second layer including the other of gold (Au), copper (Cu), aluminum (Al), and tin (Sn).

[0216] Referring to FIG. 11, a repairing light-emitting element (RLP) is exemplified as being placed in the third subpixel (SPX3), but is not limited thereto. The embodiment of FIG. 10 differs from FIG. 8 in that the organic layer (210) is not placed therein.

[0217] The bonding metals (BOM1, BOM2) in Figs. 9 and 10 have a lower melting point compared to the repair bonding materials (RM1, RM2), so they can be called low-melting point bonding metals (BOM).

[0218] The repair bonding material (RM1, RM2) may have slightly lower electrical properties than the low-melting point bonding metal (BOM1, BOM2). Accordingly, the repair bonding material (RM1, RM2) can contribute to improving electrical properties by filling the hole (LEH) that exposes the second semiconductor layer (SEM2).

[0219] In addition, the repair bonding materials (RM1, RM2) may have a higher melting point than the low-melting-point bonding metal generally used for transferring light-emitting diodes (LEs). While low-melting-point bonding metals are advantageous for bonding multiple light-emitting diodes at once over a large area, they are difficult to apply to repair processes for selectively re-bonding fine-sized light-emitting diodes (LEs).

[0220] The repair bonding material (RM1, RM2) uses conductive ink, conductive paste, conductive photoresist, etc., so it is easy to place the desired amount in a localized area, making it advantageous for application in the repair process.

[0221] FIG. 12 is a flowchart showing a method for manufacturing a display device according to one embodiment. FIG. 13 to 19 are exemplary drawings for explaining a method for manufacturing a display device according to one embodiment.

[0222] Hereinafter, a method for manufacturing a display device according to one embodiment will be described in detail by combining FIG. 12 with FIG. 13 to 19. FIG. 13 to 16 and FIG. 18 and 19 are illustrated to correspond to the display device according to the embodiment of FIG. 8 for convenience of explanation.

[0223] First, a plurality of light-emitting elements (LE) are transferred onto the pixel electrode (PXE3) and the common electrode (CE3) (S100 of FIG. 12).

[0224] Referring to FIG. 13, an organic layer (210) is formed on the pixel electrode (PXE3) and the common electrode (CE3).

[0225] The organic layer (210) can be formed to cover at least a portion of the pixel electrode (PXE3) and the common electrode (CE3) on one side of the substrate (SUB).

[0226] If the organic layer (210) is a photosensitive organic film such as a photoresist, the organic layer (210) can be cured (soft baked) at a first temperature.

[0227] Referring to FIG. 14, a plurality of light-emitting elements (LEs) are transferred onto an organic layer (210). Each of the plurality of light-emitting elements (LEs) can be formed by growing on a semiconductor substrate, such as a silicon substrate or a sapphire substrate. The plurality of light-emitting elements (LEs) can be transferred directly from the semiconductor substrate onto the pixel electrodes (PXE3) of the display panel (100). Alternatively, the plurality of light-emitting elements (LEs) can be transferred onto the pixel electrodes (PXE3) of the display panel (100) via an electrostatic method using an electrostatic head or a stamp method using an elastic polymer material such as PDMS or silicon as a transfer substrate.

[0228] After placing a plurality of light-emitting elements (LE) on each organic layer (210), the light-emitting elements (LE) are heat-pressed onto the organic layer (210). Accordingly, at least a portion of the light-emitting elements (LE) can be temporarily fixed by being embedded in the organic layer (210). If the fluidity of the organic layer (210) is low or the organic layer (210) is hard, the depth to which the light-emitting elements (LE) are inserted or embedded into the organic layer (210) is very small, or the light-emitting elements (LE) may be placed on the organic layer (210) without being inserted or embedded into the organic layer (210). Then, the organic layer (210) can be completely cured at a second temperature higher than the first temperature. The first temperature may be approximately 100 degrees and the second temperature may be approximately 230 degrees, but the embodiments of this specification are not limited thereto. Additionally, the process of completely curing the organic layer (210) at the second temperature may be carried out for approximately 30 minutes.

[0229] Then, referring to FIG. 15, first connecting electrodes (BE1) for connecting the first contact electrode (CTE1) of the light-emitting element (LE) and the pixel electrode (PXE3), and second connecting electrodes (BE2) for connecting the second contact electrode (CTE2) and the common electrode (CE3) are formed. For example, a connecting electrode material layer is deposited to cover the side of the light-emitting element (LE). A portion of the connecting electrode material layer is patterned and etched by photoresist to form the first connecting electrode (BE1) and the second connecting electrode (BE2) on the side of the light-emitting element (LE).

[0230] The first connecting electrodes (BE1) can directly contact the first contact electrode (CTE1) on the side of the light-emitting element (LE) and can directly contact the pixel electrode (PXE3). The second connecting electrodes (BE2) can directly contact the second contact electrode (CTE2) on the side of the light-emitting element (LE) and can directly contact the common electrode (CE3).

[0231] According to another embodiment, in the display device described with reference to FIG. 10, a light-emitting element (LE) can be bonded onto a pixel electrode (PXE3) and a common electrode (CE3) using a bonding metal without an organic layer (210).

[0232] Secondly, the lighting status of a plurality of light-emitting elements (LE) is inspected, and defective light-emitting elements (LE) are removed (S110 of FIG. 12).

[0233] Referring to FIGS. 16 and 17, photoluminescence testing and / or electroluminescence testing may be performed to detect whether or not a defective light-emitting element (LE) is present. For example, part C of FIG. 16 shows two defective light-emitting elements identified at corresponding positions P and Q. After identifying the corresponding positions of the defective light-emitting elements, a repair process will be performed to replace the defective light-emitting elements with new light-emitting elements.

[0234] A first device (EP) may be employed to remove a defective light-emitting element from a corresponding position P. The first device (EP) can adsorb and hold the defective light-emitting element by vacuum pressure. To this end, the first device (EP) may have a single vacuum chuck (EPC).

[0235] In some embodiments, the first equipment (EP) may include an electrostatic device, an electromagnetic device, or an adhesive stamp to replace the vacuum chuck (EPC). In one embodiment, since the first equipment (EP) has one vacuum chuck (EPC), one defective light-emitting element is removed in one removal procedure. In other embodiments, two or more defective light-emitting elements may be removed simultaneously, which means that both defective light-emitting elements at corresponding positions P and Q may be removed together.

[0236] Third, a repair light-emitting element (RLE) is bonded using a repair bonding material (RM1, RM2) (S120 in FIG. 12).

[0237] Referring to FIG. 18, a first repair bonding material (RM1) and a second repair bonding material (RM2) are applied respectively to the pixel electrode (PXE3) and the common electrode (CE3) from which the defective light-emitting element (LE) has been removed.

[0238] The first repair bonding material (RM1) and the second repair bonding material (RM2) may be conductive ink, conductive paste, or conductive photoresist, so they may be applied to local areas by means such as a dispenser or inkjet.

[0239] The amount of the second repair bonding material (RM2) applied on the common electrode (CE3) is made different from the amount of the first repair bonding material (RM1) applied on the pixel electrode (PXE3). By methods such as inkjet, the amount of repair bonding material (RM1, RM2) applied on the pixel electrode (PXE3) and the common electrode (CE3) can be made different without additional processes. On the other hand, additional processes may be required to form bonding metal, etc., on the pixel electrode (PXE3) and the common electrode (CE3) with different thicknesses.

[0240] The thickness (h1) of the first repair bonding material (RM1) applied on the pixel electrode (PXE3) may be smaller than the thickness (h2) of the second repair bonding material (RM2). For example, the amount of the second repair bonding material (RM2) applied on the common electrode (CE3) may be about 1.1 to 3.0 times greater than the amount of the first repair bonding material (RM1) applied on the pixel electrode (PXE3). Accordingly, the volume of the second repair bonding material (RM2) may have a range of 1.1 to 3.0 relative to the volume of the first repair bonding material (RM1).

[0241] If the amount of the first repair bonding material (RM1) applied is relatively large, such as the amount of the second repair bonding material (RM2), the first repair bonding material (RM1) and the second repair bonding material (RM2) may be connected to each other, and a short risk may occur.

[0242] In addition, if the amount of the second repair bonding material (RM1) applied is relatively small, similar to the amount of the first repair bonding material (RM1), the second repair bonding material (RM2) may not fill the hole (LEH) of the repair light-emitting element (RLE in FIG. 19), and thus a risk of increased resistance may occur.

[0243] As shown in FIG. 19, a repair light-emitting element (RLE) is placed on the first repair bonding material (RM1) and the second repair bonding material (RM2) to bond the repair light-emitting element (RLE) onto the pixel electrode layer.

[0244] A first contact electrode (CTE1) of a repair light-emitting element (RLE) may be placed on a first repair bonding material (RM1), and a second contact electrode (CTE2) of a repair light-emitting element (RLE) may be placed on a second repair bonding material (RM2).

[0245] The second repair bonding material (RM2) can fill the hole (LEH) that exposes the second semiconductor layer (SEM2) of the light-emitting element (LE). Accordingly, the contact resistance of the interface between the second repair bonding material (RM2) and the second semiconductor layer (SEM2) can be adjusted.

[0246] FIG. 20 is a graph showing the magnitude of current versus voltage of a light-emitting element bonded using a repair bonding material according to one embodiment, and FIG. 21 is a graph showing the magnitude of current versus voltage of a light-emitting element bonded using a conventional bonding metal.

[0247] Graphs in Figures 20 and 21, respectively, show the electrical conductivity with respect to the contact rate between the repair bonding material and the light-emitting element.

[0248] For example, in the case of FIG. 20, a represents the current with respect to voltage when the contact rate between the repair bond and the light-emitting element is large, and d represents the current with respect to voltage when the contact rate between the repair bond and the light-emitting element is smallest. b represents the current with respect to voltage when the contact rate between the repair bond and the light-emitting element is smaller than a and larger than c, and c represents the current with respect to voltage when the contact rate between the repair bond and the light-emitting element is smaller than b and larger than d. The greater the current with respect to voltage, the higher the electrical conductivity. Thus, it can be seen that in the case of the repair bond, the electrical conductivity is significantly affected by the contact rate between the repair bond and the light-emitting element.

[0249] In the case of FIG. 21, a represents the current with respect to voltage when the contact ratio between the bonding metal and the light-emitting element is large, and d represents the current with respect to voltage when the contact ratio between the bonding metal and the light-emitting element is smallest. b represents the current with respect to voltage when the contact ratio between the bonding metal and the light-emitting element is smaller than a and larger than c, and c represents the current with respect to voltage when the contact ratio between the bonding metal and the light-emitting element is smaller than b and larger than d. The greater the current with respect to voltage, the higher the electrical conductivity. Thus, it can be seen that in the case of the bonding metal, the electrical conductivity is not significantly affected by the contact ratio between the bonding metal and the light-emitting element.

[0250] Referring to Figures 20 and 21, it can be seen that the electrical conductivity of the repair bonding material is significantly affected by the contact rate compared to the bonding metal.

[0251] FIG. 22 is an image of a repair light-emitting element using a repair bonding material according to one embodiment, and FIG. 23 is an image of a repair light-emitting element using a conventional bonding metal.

[0252] Referring to FIG. 22, the repair bonding material (RM1, RM2) fills the inside of the hole (LEH) of the light-emitting element (LE), showing the repair bonding material in a state where it is in full contact with the second contact electrode (CTE2) without any voids.

[0253] Referring to FIG. 23, when the bonding metal is filled into the hole (LEH) of the light-emitting element (LE), there is a high probability that a void (V) will occur.

[0254] FIG. 24 is an example drawing showing a smart watch including a display device according to one embodiment.

[0255] Referring to FIG. 24, a display device (10_1) according to one embodiment can be applied to a smart watch (1000_1), which is one of the smart devices.

[0256] FIGS. 25 and FIGS. 26 are exemplary drawings showing a virtual reality device including a display device according to one embodiment.

[0257] Referring to FIGS. 25 and 26, a head-mounted display device (1000_2) according to one embodiment includes a first display device (10_2), a second display device (10_3), a display device storage unit (1100), a storage unit cover (1200), a first eyepiece (1210), a second eyepiece (1220), a head-mounted band (1300), a middle frame (1400), a first optical member (1510), a second optical member (1520), and a control circuit board (1600).

[0258] The first display device (10_2) provides an image to the user's left eye, and the second display device (10_3) provides an image to the user's right eye. Since each of the first display device (10_2) and the second display device (10_3) is substantially the same as the display device (10) described in conjunction with FIG. 1 and FIG. 2, the description of the first display device (10_2) and the second display device (10_3) is omitted.

[0259] The first optical member (1510) may be positioned between the first display device (10_2) and the first eyepiece (1210). The second optical member (1520) may be positioned between the second display device (10_3) and the second eyepiece (1220). Each of the first optical member (1510) and the second optical member (1520) may include at least one convex lens.

[0260] The middle frame (1400) is positioned between the first display device (10_2) and the control circuit board (1600), and may be positioned between the second display device (10_3) and the control circuit board (1600). The middle frame (1400) serves to support and fix the first display device (10_2), the second display device (10_3), and the control circuit board (1600).

[0261] The control circuit board (1600) may be placed between the middle frame (1400) and the display device housing (1100). The control circuit board (1600) may be connected to the first display device (10_2) and the second display device (10_3) through a connector. The control circuit board (1600) may convert an image source input from the outside into digital video data (DATA) and transmit the digital video data (DATA) to the first display device (10_2) and the second display device (10_3) through the connector.

[0262] The control circuit board (1600) can transmit digital video data (DATA) corresponding to a left-eye image optimized for the user's left eye to the first display device (10_2) and digital video data (DATA) corresponding to a right-eye image optimized for the user's right eye to the second display device (10_3). Alternatively, the control circuit board (1600) can transmit the same digital video data (DATA) to the first display device (10_2) and the second display device (10_3).

[0263] The display device housing (1100) serves to house the first display device (10_2), the second display device (10_3), the middle frame (1400), the first optical member (1510), the second optical member (1520), and the control circuit board (1600). The housing cover (1200) is positioned to cover an open side of the display device housing (1100). The housing cover (1200) may include a first eyepiece (1210) in which the user's left eye is positioned and a second eyepiece (1220) in which the user's right eye is positioned. Although FIGS. 25 and 26 illustrate the first eyepiece (1210) and the second eyepiece (1220) being positioned separately, the embodiments of this specification are not limited thereto. The first eyepiece (1210) and the second eyepiece (1220) may be combined into one.

[0264] The first eyepiece (1210) is aligned with the first display device (10_2) and the first optical member (1510), and the second eyepiece (1220) can be aligned with the second display device (10_3) and the second optical member (1520). Accordingly, the user can view an image of the first display device (10_2) magnified into a virtual image by the first optical member (1510) through the first eyepiece (1210), and can view an image of the second display device (10_3) magnified into a virtual image by the second optical member (1520) through the second eyepiece (1220).

[0265] The head mounting band (1300) serves to secure the display device storage unit (1100) to the user's head so that the first eyepiece (1210) and the second eyepiece (1220) of the storage unit cover (1200) can be maintained in a state where they are positioned on the user's left and right eyes, respectively. When the display device storage unit (1200) is implemented as a lightweight and compact unit, the head-mounted display device (1000) may be equipped with an eyeglass frame as shown in FIG. 27 instead of the head mounting band (800).

[0266] In addition, the head-mounted display device (1000) may further be equipped with a battery for supplying power, an external memory slot for storing external memory, an external connection port for receiving video sources, and a wireless communication module. The external connection port may be a USB (universe serial bus) terminal, a display port, or an HDMI (high-definition multimedia interface) terminal, and the wireless communication module may be a 5G communication module, a 4G communication module, a Wi-Fi module, or a Bluetooth module.

[0267] FIG. 27 is an example drawing showing a virtual reality device including a display device according to another embodiment. FIG. 28 shows a virtual reality device (1000_3) to which a display device (10_4) according to one embodiment is applied.

[0268] Referring to FIG. 27, a virtual reality device (1000_3) according to one embodiment may be a device in the form of glasses. A virtual reality device (1000_3) according to one embodiment may have a display device (10_4), a left eye lens (10a), a right eye lens (10b), a support frame (20), eyeglass frame legs (30a, 30b), a reflective member (40), and a display device housing (50).

[0269] FIG. 27 illustrates a virtual reality device (1000_3) that is an eyeglass-type display device including eyeglass frame temples (30a, 30b). That is, the virtual reality device (1000_3) according to one embodiment is not limited to that shown in FIG. 27 and can be applied in various forms in various other electronic devices.

[0270] The display device housing (50) may include a display device (10_4) and a reflective member (40). An image displayed on the display device (10_4) may be reflected from the reflective member (40) and provided to the user's right eye through the right eye lens (10b). As a result, the user can view the virtual reality image displayed on the display device (10_4) through their right eye.

[0271] FIG. 27 illustrates that the display device housing (50) is positioned at the right end of the support frame (20), but the embodiments of this specification are not limited thereto. For example, the display device housing (50) may be positioned at the left end of the support frame (20), in which case the image displayed on the display device (10_4) may be reflected from the reflective member (40) and provided to the user's left eye through the left eye lens (10a). As a result, the user can view the virtual reality image displayed on the display device (10_4) through the left eye. Alternatively, the display device housing (50) may be positioned at both the left end and the right end of the support frame (20), in which case the user can view the virtual reality image displayed on the display device (10_4) through both the left eye and the right eye.

[0272] FIG. 28 is an exemplary drawing showing an automobile instrument panel and a center fascia including display devices according to one embodiment. FIG. 28 shows an automobile with display devices (10_a, 10_b, 10_c, 10_d, 10_e) according to one embodiment applied.

[0273] Referring to FIG. 28, display devices (10_a, 10_b, 10_c) according to one embodiment may be applied to an instrument panel of a vehicle, to a center fascia of a vehicle, or to a Center Information Display (CID) placed on the dashboard of a vehicle. Additionally, display devices (10_d, 10_e) according to one embodiment may be applied to a room mirror display that replaces a side mirror of a vehicle.

[0274] FIG. 29 is an exemplary drawing showing a transparent display device including a display device according to one embodiment.

[0275] Referring to FIG. 29, a display device (10_5) according to one embodiment can be applied to a transparent display device. The transparent display device can display an image (IM) and transmit light at the same time. Therefore, a user located in front of the transparent display device can not only view the image (IM) displayed on the display device (10_5), but also see an object (RS) or background located on the back of the transparent display device. When the display device (10_5) is applied to a transparent display device, the substrate of the display device (10_5) may include a light-transmitting portion capable of transmitting light, or be formed of a material capable of transmitting light.

[0276] Although embodiments of the present invention have been described above with reference to the attached drawings, those skilled in the art will understand that the present invention may be implemented in other specific forms without changing the technical concept or essential features thereof. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive.

Claims

1. Substrate; Pixel electrodes and common electrodes disposed on the above substrate and spaced apart from each other; A light-emitting element comprising a first contact electrode in contact with the pixel electrode and a second contact electrode in contact with the common electrode; A first repair bonding material disposed between the pixel electrode and the first contact electrode; and It includes a second repair bonding material disposed between the common electrode and the second contact electrode. The volume of the second repair bonding material is larger than the volume of the first repair bonding material, and A display device comprising the first repair bonding material and the second repair bonding material, which are organic materials containing conductive particles.

2. In Paragraph 1, A display device in which the volume of the second repair bonding material is 1.1 to 3.0 times the volume of the first repair bonding material.

3. A display device according to claim 1, wherein the conductive particles are particles formed of conductive metal or carbon black.

4. In Paragraph 1, The above light-emitting element is, Semiconductor stack; A conductive layer disposed on one side of the semiconductor stack; and It further includes a protective film disposed on the sides and one side of the conductive layer and on the sides of the semiconductor stack, and The first contact electrode is disposed on the protective film and is connected to the conductive layer exposed through a hole defined by the protective film, and A display device in which the second contact electrode is disposed on the protective film and is disposed in a hole penetrating the conductive layer and a part of the semiconductor stack, and the second repair bonding material is filled into the hole.

5. In Paragraph 4, The above semiconductor stack is, A first semiconductor layer disposed on the above conductive layer and doped with a first conductive type dopant; An active layer disposed on the first semiconductor layer; and A display device comprising a second semiconductor layer disposed on the above active layer and doped with a second conductivity type dopant.

6. In Paragraph 5, The above semiconductor stack is, A display device further comprising an undoped third semiconductor layer disposed on the second semiconductor layer.

7. In Paragraph 6, The above semiconductor stack is a display device further comprising a light extraction pattern having a concave pattern on the upper side.

8. In Paragraph 1, A display device further comprising an organic layer disposed between the pixel electrode and the common electrode.

9. In Paragraph 8, The above organic layer is a display device that is not disposed on the pixel electrode and the common electrode.

10. In Paragraph 5, A display device in which the hole penetrating the conductive layer and a part of the semiconductor stack penetrates the conductive layer, the first semiconductor layer, and the active layer to expose the second semiconductor layer.

11. In Paragraph 10, The above second repair bonding material is a display device that fills a higher portion of the active layer within the hole penetrating the conductive layer and a portion of the semiconductor stack.

12. A step of transferring light-emitting elements onto a pixel electrode and a common electrode; A step of inspecting the lighting status of the above-mentioned light-emitting elements; Step of removing a defective light-emitting element; and The method includes the step of bonding a repair light-emitting element at a position corresponding to the removed defective light-emitting element using a repair bonding material, A method for manufacturing a display device, wherein a first repair bonding material is applied on the pixel electrode and a second repair bonding material is applied on the common electrode, wherein the amount of the first repair bonding material applied and the amount of the second repair bonding material applied are different, and the first repair bonding material and the second repair bonding material are organic materials containing conductive particles.

13. In Paragraph 12, The step of joining the above-mentioned repair light-emitting element is, A method for manufacturing a display device, wherein a first repair bonding material is applied to a first height using a dispenser or inkjet, and a second repair bonding material is applied to a second height higher than the first height.

14. In Paragraph 13, The above-mentioned maintenance light-emitting element is, Semiconductor stack; A conductive layer disposed on one side of the above semiconductor stack; A protective film disposed on the sides and one side of the conductive layer and on the sides of the semiconductor stack; A first contact electrode disposed on the protective film and connected to the conductive layer exposed through a hole defined by the protective film; and It includes a second contact electrode disposed on the protective film and disposed in a hole penetrating the conductive layer and a part of the semiconductor stack, and A method for manufacturing a display device by aligning the first contact electrode on the first repair bonding material and aligning the second contact electrode on the second repair bonding material, thereby bonding the repair light-emitting element onto the pixel electrode and the common electrode.

15. In Paragraph 14, A method for manufacturing a display device in which the above-mentioned second repair bonding material fills the hole penetrating the above-mentioned conductive layer and a part of the above-mentioned semiconductor stack.

16. In Paragraph 14, The step of transferring light-emitting elements onto the pixel electrode and the common electrode is, A step of placing an organic layer on the pixel electrode and the common electrode; Step of placing a light-emitting element on the above organic layer A method for manufacturing a display device, comprising the step of forming a first connecting electrode connecting a first contact electrode and a pixel electrode, and a second connecting electrode connecting a second contact electrode and a common electrode.

17. In Paragraph 12, A method for manufacturing a display device in which the amount of the second repair bonding material applied is 1.1 to 3.0 times the amount of the first repair bonding material applied.

18. In Paragraph 12, A method for manufacturing a display device in which the conductive particles are particles formed of conductive metal or carbon black.

19. In Paragraph 12, In the step of transferring light-emitting elements onto the pixel electrode and the common electrode, A method for manufacturing a display device, further comprising the step of contacting one of the light-emitting elements on the pixel electrode and the common electrode using a bonding metal.

20. Includes a display device for displaying images, The above display device is, substrate, Pixel electrodes and common electrodes disposed on the above substrate and spaced apart from each other; A light-emitting element comprising a first contact electrode in contact with the pixel electrode and a second contact electrode in contact with the common electrode; A first repair bonding material disposed between the pixel electrode and the first contact electrode; and It includes a second repair bonding material disposed between the common electrode and the second contact electrode. The volume of the second repair bonding material is larger than the volume of the first repair bonding material, and The electronic device comprising the first repair bonding material and the second repair bonding material, which are made of an organic material containing conductive particles.

Citation Information

Patent Citations

  • Anisotropic conductive adhesive and method for producing same, and light-emitting device and method for producing same

    KR1020140084076A

  • Display device using semiconductor light emitting diode

    KR1020170096471A

  • Cement Composition for ultra high strength PHC pile and ultra high strength PHC pile manufactured thereby

    KR102376104B1

  • A structure for fixing the riser pipe

    KR102498406B1

  • Lamp for vehicle

    KR102956520B1