Display device, display device manufacturing method, and electronic device

Abstract

A display device, according to one embodiment, may comprise: a substrate; a first organic layer disposed on a pixel electrode and a common electrode; a first lower connection electrode disposed on the first organic layer and connected to the pixel electrode; a second lower connection electrode connected to the common electrode on the first organic layer; a first protection layer covering the first lower connection electrode and the second lower connection electrode; a reflective layer disposed on the first protection layer and overlapping an inclined surface of the first organic layer; a second protection layer covering the reflective layer; a second organic layer disposed in a first opening area; a light-emitting device disposed on the second organic layer; a first upper connection electrode connecting a first contact electrode of the light-emitting device and the first lower connection electrode; and a second upper connection electrode connecting a second contact electrode and the second lower connection electrode.

Description

Display device, method of manufacturing a display device, and electronic device

[0001] The present invention relates to a display device, a method for manufacturing a display device, and an electronic device.

[0002] As the information society develops, the demand for display devices to display images is increasing in various forms. Display devices may be flat panel displays such as Liquid Crystal Displays, Field Emission Displays, and Light Emitting Displays.

[0003] The light-emitting display device may include an organic light-emitting display device comprising an organic light-emitting diode element as a light-emitting element, and a micro light-emitting display device comprising a micro light-emitting diode element (hereinafter referred to as a micro light-emitting element) as a light-emitting element. Since the micro light-emitting diode element is made of inorganic material, it has the advantage of having a long lifespan with fewer degradation issues compared to organic light-emitting diode elements.

[0004] The problem that the present invention aims to solve is to provide a display device capable of increasing light emission efficiency, a method for manufacturing the same, and an electronic device.

[0005] The problems of the present invention are not limited to the technical problems mentioned above, and other unmentioned technical problems will be clearly understood by those skilled in the art from the description below.

[0006] A display device according to one embodiment for solving the above problem may include a substrate, a pixel electrode and a common electrode disposed on the substrate, a first organic layer disposed on the pixel electrode and the common electrode and having a first aperture region, a first lower connecting electrode disposed on the first organic layer and electrically connected to the pixel electrode, a second lower connecting electrode electrically connected to the common electrode on the first organic layer, a first protective layer covering the first lower connecting electrode and the second lower connecting electrode, a reflective layer disposed on the first protective layer and overlapping with an inclined surface of the first organic layer, a second protective layer covering the reflective layer, a second organic layer disposed in the first aperture region, a light-emitting element disposed on the second organic layer and including a semiconductor stack, a first contact electrode and a second contact electrode, a first upper connecting electrode connecting the first contact electrode of the light-emitting element and the first lower connecting electrode, and a second upper connecting electrode connecting the second contact electrode and the second lower connecting electrode.

[0007] In one embodiment, the reflective layer may surround the light-emitting element.

[0008] In one embodiment, one end of the reflective layer may be positioned further below the lower part of the light-emitting element.

[0009] In one embodiment, a portion of the reflective layer may overlap with the second organic layer.

[0010] In one embodiment, the upper part of the reflective layer may be positioned higher than the active layer of the light-emitting element.

[0011] In one embodiment, it may include a first reflective film disposed on the pixel electrode and a second reflective film disposed on the common electrode.

[0012] In one embodiment, the first lower connecting electrode may extend to the upper surface of the first reflective film on the first organic layer, and the second lower connecting electrode may extend to the upper surface of the second reflective film on the first organic layer.

[0013] In one embodiment, the first protective layer and the second protective layer may have a first contact hole exposing the first lower connecting electrode on the upper surface of the first organic layer and a second contact hole exposing the second lower connecting electrode on the upper surface of the first organic layer.

[0014] In one embodiment, the first upper connecting electrode may contact the first lower connecting electrode through the first contact hole, and the second upper connecting electrode may contact the second lower connecting electrode through the second contact hole.

[0015] In one embodiment, the light-emitting element further comprises a conductive layer disposed between the organic layer and the semiconductor stack and a protective film disposed on one side and sides of the conductive layer and on sides of the semiconductor stack, wherein the first contact electrode is disposed on the protective film and connected to the conductive layer exposed and not covered by the protective film, and the second contact electrode is disposed on the protective film and may be disposed in a hole penetrating the conductive layer and a part of the semiconductor stack.

[0016] In one embodiment, the semiconductor stack comprises a first semiconductor layer, an active layer, and a second semiconductor layer stacked in order, and the first contact electrode and the second contact electrode are disposed on the entire side of the conductive layer and the first semiconductor layer and the entire side of the active layer, and may be disposed on a part of the side of the second semiconductor layer.

[0017] In one embodiment, the first contact electrode and the second contact electrode may be in contact with the first protective layer.

[0018] A display device according to one embodiment may include a substrate, a pixel electrode disposed on the substrate, a first organic layer disposed on the pixel electrode and having a first opening region, a first lower connecting electrode and a second lower connecting electrode disposed on the first organic layer and electrically connected to the pixel electrode, a first protective layer covering the first lower connecting electrode and the second lower connecting electrode, a reflective layer disposed on the first protective layer and overlapping with an inclined surface of the first organic layer, a second protective layer covering the reflective layer, a second organic layer disposed in the first opening region, a light-emitting element disposed on the second organic layer and including a contact electrode, a first upper connecting electrode and a second upper connecting electrode connecting the contact electrode of the light-emitting element and the first lower connecting electrode and the second lower connecting electrode, and a common electrode disposed on the upper side of the light-emitting element.

[0019] In one embodiment, the display device may include a reflective film disposed on the pixel electrode.

[0020] In one embodiment, the first lower connecting electrode and the second lower connecting electrode may extend on the first organic layer to the upper surface of the reflective film.

[0021] In one embodiment, the first protective layer and the second protective layer have a contact hole that exposes the first lower connecting electrode on the upper surface of the first organic layer, and the first upper connecting electrode can contact the first lower connecting electrode through the first contact hole.

[0022] In one embodiment, the display device comprises a substrate, a pixel electrode and a common electrode disposed on the substrate, a first reflective film disposed on the pixel electrode and a second reflective film disposed on the common electrode, a first organic layer disposed on the pixel electrode and the common electrode and having a first opening region, a first protective layer disposed on the first organic layer, a reflective layer disposed on the first protective layer and overlapping with an inclined surface of the first organic layer, a second protective layer covering the reflective layer, a second organic layer disposed in the first opening region, a light-emitting element disposed on the second organic layer and including a semiconductor stack, a first contact electrode and a second contact electrode, a first upper connecting electrode connecting the first contact electrode of the light-emitting element and the pixel electrode, and a second upper connecting electrode connecting the second contact electrode and the common electrode, wherein the first protective layer and the second protective layer have a first contact hole exposing the first reflective film on the upper surface of the first organic layer and a second contact hole exposing the common electrode on the upper surface of the first organic layer, and the first upper connecting electrode is the The first reflective film can be contacted through the first contact hole, and the second upper connecting electrode can be contacted through the second contact hole.

[0023] In one embodiment, a method for manufacturing a display device may include the steps of forming a pixel electrode and a common electrode on a circuit board, forming a first reflective film on the pixel electrode and a second reflective film on the common electrode, forming a first organic layer disposed on the pixel electrode and the common electrode and having a first opening region, forming a first lower connecting electrode disposed on the first organic layer and electrically connected to the pixel electrode and a second lower connecting electrode electrically connected to the common electrode on the first organic layer, forming a first protective layer covering the first lower connecting electrode and the second lower connecting electrode, a reflective layer disposed on the first protective layer and overlapping with an inclined surface of the first organic layer, and forming a second protective layer covering the reflective layer, forming a second organic layer in the first opening region and placing a light-emitting element on the second organic layer, and forming a first upper connecting electrode connecting a first contact electrode of the light-emitting element and the first lower connecting electrode, and a second upper connecting electrode connecting a second contact electrode and the second lower connecting electrode.

[0024] In one embodiment, in the step of forming the second protective layer, a contact hole can be formed that penetrates the first protective layer and the second protective layer to expose a lower connecting electrode.

[0025] In one embodiment, in the step of forming a first upper connecting electrode connecting the first contact electrode of the light-emitting element and the first lower connecting electrode, and a second upper connecting electrode connecting the second contact electrode and the second lower connecting electrode, the first upper connecting electrode may be contacted to the first lower connecting electrode through the contact hole.

[0026] In one embodiment, the electronic device includes a display device for displaying an image, and the display device may include a substrate, a pixel electrode and a common electrode disposed on the substrate, a first organic layer disposed on the pixel electrode and the common electrode and having a first aperture region, a first lower connecting electrode disposed on the first organic layer and electrically connected to the pixel electrode, a second lower connecting electrode disposed on the first organic layer and electrically connected to the common electrode, a first protective layer covering the first lower connecting electrode and the second lower connecting electrode, a reflective layer disposed on the first protective layer and overlapping with an inclined surface of the first organic layer, a second protective layer covering the reflective layer, a second organic layer disposed in the first aperture region, a light-emitting element disposed on the second organic layer and including a first contact electrode and a second contact electrode, a first upper connecting electrode connecting the first contact electrode of the light-emitting element and the first lower connecting electrode, and a second upper connecting electrode connecting the second contact electrode and the second lower connecting electrode.

[0027] Specific details of other embodiments are included in the detailed description and drawings.

[0028] According to the display device and the method of manufacturing the same according to the embodiments, light propagating in the lateral direction can be reflected by the organic layer and the reflective layer on the side of the light-emitting element, thereby increasing the light emission efficiency.

[0029] The effects according to the embodiments are not limited to those exemplified above, and a wider variety of effects are included in this specification.

[0030] FIG. 1 is a perspective view showing a display device according to one embodiment.

[0031] FIG. 2 is a layout diagram showing a display device according to one embodiment.

[0032] FIG. 3 is a block diagram showing a display device according to one embodiment.

[0033] FIG. 4 is an equivalent circuit diagram showing a subpixel according to one embodiment.

[0034] FIG. 5 is a layout diagram showing pixels of a display area according to one embodiment.

[0035] FIG. 6 is a cross-sectional view showing an example of a cross-section of a display panel corresponding to the line I-I' of FIG. 5.

[0036] Figure 7 is a cross-sectional view showing in detail an example of area A of Figure 6.

[0037] Figure 8 is an enlarged view of a part of Figure 7.

[0038] Figure 9 is a cross-sectional view showing another example of area A of Figure 6 in detail.

[0039] Figure 10 is a cross-sectional view showing another example of area A of Figure 6 in detail.

[0040] FIG. 11 is an image showing a cross-section of a display panel according to a conventional embodiment.

[0041] FIG. 12 is a layout diagram showing pixels of a display area according to another embodiment.

[0042] FIG. 13 is a cross-sectional view showing an example of a cross-section of a display panel corresponding to the line I2-I2' of FIG. 12.

[0043] FIG. 14 is a cross-sectional view showing in detail an example of region B of FIG. 13.

[0044] FIG. 15 is a flowchart showing a method for manufacturing a display device according to one embodiment.

[0045] FIGS. 16 to 25 are exemplary drawings for explaining a method of manufacturing a display device according to one embodiment.

[0046] FIG. 26 is an example drawing showing a smart watch including a display device according to one embodiment.

[0047] FIGS. 27 and FIGS. 28 are exemplary drawings showing a virtual reality device including a display device according to one embodiment.

[0048] FIG. 29 is an exemplary drawing showing a virtual reality device including a display device according to another embodiment.

[0049] FIG. 30 is an exemplary drawing showing an automobile instrument panel and center fascia including display devices according to one embodiment.

[0050] FIG. 31 is an exemplary drawing showing a transparent display device including a display device according to one embodiment.

[0051] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims.

[0052] When elements or layers are referred to as being "on" another element or layer, this includes cases where another layer or element is interposed directly on or in the middle of another element. Throughout the specification, the same reference numerals refer to the same components. Shapes, sizes, ratios, angles, numbers, etc., disclosed in the drawings for describing embodiments are exemplary and the invention is not limited to the depicted details.

[0053] The features of each of the various embodiments of the present invention may be combined or combined with one another, either partially or wholly, and may technically enable various interlocking and operation. Each embodiment may be implemented independently of one another or may be implemented together in an associated relationship.

[0054] Specific embodiments will be described below with reference to the attached drawings.

[0055] FIG. 1 is a perspective view showing a display device according to one embodiment.

[0056] Referring to FIG. 1, the display device (10) is a device for displaying video or still images and can be used as a display screen for various products such as televisions, laptops, monitors, billboards, and Internet of Things (IOT) devices, as well as portable electronic devices such as mobile phones, smartphones, tablet PCs, smart watches, watch phones, mobile communication terminals, electronic notebooks, electronic books, PMPs (portable multimedia players), navigation systems, and UMPCs (Ultra Mobile PCs).

[0057] The display device (10) may be a light-emitting display device such as an organic light-emitting display device using an organic light-emitting diode, a quantum dot light-emitting display device including a quantum dot light-emitting layer, an inorganic light-emitting display device including an inorganic semiconductor, and a micro light-emitting display device using a micro or nano light-emitting diode (micro LED or nano LED). Hereinafter, the display device (10) has been described with a focus on being a micro light-emitting display device, but the present invention is not limited thereto. Meanwhile, for convenience of explanation, a micro light-emitting diode has been described as a light-emitting element below.

[0058] The display device (10) includes a display panel (100), a display driving circuit (250), a circuit board (300), and a power supply circuit (500).

[0059] The display panel (100) may be formed as a rectangular plane having a short side in a first direction (DR1) and a long side in a second direction (DR2) that intersects the first direction (DR1). The corner where the short side in the first direction (DR1) and the long side in the second direction (DR2) meet may be formed rounded to have a predetermined curvature or formed at a right angle. The plane shape of the display panel (100) is not limited to a rectangle and may be formed as other polygons, circles, or ellipses. The display panel (100) may be formed flat, but is not limited thereto. For example, the display panel (100) may include curved surfaces formed at the left and right ends that have a constant curvature or a changing curvature. In addition, the display panel (100) may be formed flexibly so that it can be bent, curved, folded, or rolled.

[0060] The display panel (100) may include a main area (MA) and a sub-area (SBA).

[0061] The main area (MA) may include a display area (DA) that displays an image and a non-display area (NDA) which is a surrounding area of ​​the display area (DA). The display area (DA) may include a plurality of pixels that display an image. Each of the pixels may include a plurality of subpixels. For example, each of the pixels may include a first subpixel that emits a first light, a second subpixel that emits a second light, and a third subpixel that emits a third light, but the embodiments of the present specification are not limited thereto.

[0062] A sub-region (SBA) may protrude in a second direction (DR2) from one side of a main region (MA). Although FIG. 1 illustrates a sub-region (SBA) unfolded, the sub-region (SBA) may be bent, in which case it may be placed on the lower surface of the display panel (100). When the sub-region (SBA) is bent, it may overlap with the main region (MA) in a third direction (DR3), which is the thickness direction of the display panel (100). A display driving circuit (250) may be placed in the sub-region (SBA).

[0063] The display driving circuit (250) can generate signals and voltages to drive the display panel (100). The display driving circuit (250) may be formed as an integrated circuit (IC) and attached to the display panel (100) using a COG (chip on glass) method, a COP (chip on plastic) method, or an ultrasonic bonding method, but is not limited thereto. For example, the display driving circuit (250) may be attached to the circuit board (300) using a COF (chip on film) method.

[0064] A circuit board (300) can be attached to one end of a sub-region (SBA) of a display panel (100). As a result, the circuit board (300) can be electrically connected to the display panel (100) and the display driving circuit (250). The display panel (100) and the display driving circuit (250) can receive digital video data, timing signals, and driving voltages through the circuit board (300). The circuit board (300) may be a flexible printed circuit board, a printed circuit board, or a flexible film such as a chip-on-film.

[0065] The power supply circuit (500) can generate multiple panel driving voltages according to the power supply voltage from an external source. The power supply circuit (500) can be formed as an integrated circuit (IC) and attached to the circuit board (300) in a COF manner.

[0066] FIG. 2 is a layout diagram showing a display device according to one embodiment. FIG. 2 illustrates a sub-region (SBA) that is unfolded without being bent.

[0067] Referring to FIG. 2, the display panel (100) may include a main area (MA) and a sub area (SBA).

[0068] The main area (MA) may include a display area (DA) for displaying an image and a non-display area (NDA) which is the surrounding area of ​​the display area (DA). The display area (DA) may occupy most of the main area (MA). The display area (DA) may be positioned in the center of the main area (MA).

[0069] A display area (DA) includes a plurality of pixels (PX) for displaying an image, and each of the plurality of pixels (PX) may include a plurality of subpixels (SPX). A pixel (PX) may be defined as a minimum unit of subpixel group capable of expressing a white gradation.

[0070] The non-display area (NDA) may be positioned adjacent to the display area (DA). The non-display area (NDA) may be an outer area of ​​the display area (DA). The non-display area (NDA) may be positioned to surround the display area (DA). The non-display area (NDA) may be an edge area of ​​the display panel (100).

[0071] The first scan driver (SDC1) and the second scan driver (SDC2) may be placed in a non-display area (NDA). The first scan driver (SDC1) may be placed on one side (e.g., the left side) of the display panel (100), and the second scan driver (SDC2) may be placed on the other side (e.g., the right side) of the display panel, but is not limited thereto. Each of the first scan driver (SDC1) and the second scan driver (SDC2) may be electrically connected to the display driving circuit (250) through scan fan-out lines. Each of the first scan driver (SDC1) and the second scan driver (SDC2) may receive a scan control signal from the display driving circuit (250), generate scan signals according to the scan control signal, and output them to the scan lines.

[0072] A sub-region (SBA) may protrude in a second direction (DR2) from one side of a main region (MA). The length of the second direction (DR2) of the sub-region (SBA) may be shorter than the length of the second direction (DR2) of the main region (MA). The length of the first direction (DR1) of the sub-region (SBA) may be shorter than the length of the first direction (DR1) of the main region (MA) or substantially equal to the length of the first direction (DR1) of the main region (MA). The sub-region (SBA) may be bent and may be positioned at the bottom of the display panel (100). In this case, the sub-region (SBA) may overlap with the main region (MA) in a third direction (DR3).

[0073] The sub-region (SBA) may include a connection region (CA), a pad region (PA), and a bending region (BA).

[0074] The connection area (CA) is an area protruding in a second direction (DR2) from one side of the main area (MA). One side of the connection area (CA) is in contact with the non-display area (NDA) of the main area (MA), and the other side of the connection area (CA) may be in contact with the bending area (BA).

[0075] The pad area (PA) is an area where pads (PDs) and a display driving circuit (250) are placed. The display driving circuit (250) can be attached to the driving pads of the pad area (PA) using a conductive adhesive material such as an anisotropic conductive film. The circuit board (300) can be attached to the pads (PDs) of the pad area (PA) using a conductive adhesive material such as an anisotropic conductive film. One side of the pad area (PA) may be in contact with the bending area (BA).

[0076] The bending area (BA) is a bending area. When the bending area (BA) is bent, the pad area (PA) may be positioned below the connecting area (CA) and below the main area (MA). The bending area (BA) may be positioned between the connecting area (CA) and the pad area (PA). One side of the bending area (BA) is in contact with the connecting area (CA), and the other side of the bending area (BA) may be in contact with the pad area (PA).

[0077] FIG. 3 is a block diagram showing a display device according to one embodiment.

[0078] Referring to FIG. 3, the display area (DA) includes a plurality of pixels (PX), a plurality of scan lines (SL), a plurality of light emission control lines (EL), and a plurality of data lines (DL).

[0079] Multiple pixels (PX) may be arranged in a matrix form in a first direction (DR1) and a second direction (DR2). Multiple scan lines (SL) and multiple light emission control lines (EL) may extend in the first direction (DR1) and be arranged in the second direction (DR2). Multiple data lines (DL) may extend in the second direction (DR2) and be arranged in the first direction (DR1). Multiple scan lines (SL) include multiple write scan lines (GWL), multiple control scan lines, multiple initialization scan lines (GIL), and multiple bias scan lines (GBL).

[0080] Each of the plurality of subpixels (SPX) can be connected to one of the plurality of write scan lines (GWL), one of the plurality of control scan lines, one of the plurality of initialization scan lines (GIL), one of the plurality of bias scan lines (GBL), one of the plurality of light emission control lines (EL), and one of the plurality of data lines (DL). Each of the plurality of subpixels (SPX) receives a data voltage of the data line (DL) according to the write scan signal of the write scan line (GWL), and can emit light from the light-emitting element according to the data voltage.

[0081] The non-display area (NDA) includes a first scan drive unit (SDC1), a second scan drive unit (SDC2), and a display drive circuit (250).

[0082] Each of the first scan drive unit (SDC1) and the second scan drive unit (SDC2) may include a write scan signal output unit (611), an initial scan signal output unit (612), a bias scan signal output unit (613), and a light emission control signal output unit (614). Each of the write scan signal output unit (611), the initial scan signal output unit (612), the bias scan signal output unit (613), and the light emission control signal output unit (614) may receive a scan timing control signal (SCS) from the timing control circuit (251).

[0083] The write scan signal output unit (611) can generate write scan signals according to the scan timing control signal (SCS) of the timing control circuit (251) and output them sequentially to the write scan lines (GWL).

[0084] The initialization scan signal output unit (612) can generate initialization scan signals according to the scan timing control signal (SCS) and output them sequentially to the initialization scan lines (GIL).

[0085] The bias scan signal output unit (613) can generate bias scan signals according to the scan timing control signal (SCS) and output them sequentially to the bias scan lines (GBL). The light emission control signal output unit (614) can generate light emission control signals according to the scan timing control signal (SCS) and output them sequentially to the light emission control lines (EL). In another embodiment, the first scan driving unit (SDC1) and the second scan driving unit (SDC2) each further include a control scan signal output unit, and the control scan signal output unit can generate control scan signals according to the scan timing control signal (SCS) and output them sequentially to the control scan lines. The display driving circuit (250) includes a timing control circuit (251) and a data driving circuit (252).

[0086] The data driving circuit (252) can receive digital video data (DATA) and a data timing control signal (DCS) from the timing control circuit (251). The data driving circuit (252) converts the digital video data (DATA) into analog data voltages according to the data timing control signal (DCS) and outputs them to the data lines (DL). In this case, subpixels (SPX) are selected by the write scan signals of the first scan driving unit (SDC1) and the second scan driving unit (SDC2), and data voltages can be supplied to the selected subpixels (SPX).

[0087] The timing control circuit (251) can receive digital video data (DATA) and timing signals from an external source. The timing control circuit (251) can generate a scan timing control signal (SCS) and a data timing control signal (DCS) to control the display panel (100) according to the timing signals. The timing control circuit (251) can output the scan timing control signal (SCS) to the first scan driving unit (SDC1) and the second scan driving unit (SDC2). The timing control circuit (251) can output the digital video data (DATA) and the data timing control signal (DCS) to the data driving circuit (252).

[0088] The power supply circuit (500) can generate a plurality of panel driving voltages according to the power voltage supplied from the outside. For example, the power supply circuit (500) can generate a first power voltage (VDD), a second power voltage (VSS), a third power voltage (VINT), and a fourth power voltage (VAINT) and supply them to the display panel (100).

[0089] FIG. 4 is an equivalent circuit diagram showing a subpixel according to one embodiment.

[0090] Referring to FIG. 4, a subpixel (SPX) according to one embodiment may be connected to scan lines (GWL, GIL, GBL), a light emission control line (EL), and a data line (DL). For example, the subpixel (SPX) may be connected to a write scan line (GWL), an initialization scan line (GIL), a bias scan line (GBL), a light emission control line (EL), and a data line (DL).

[0091] A subpixel (SPX) according to one embodiment includes a driving transistor (DT), switching elements, a capacitor (C1), and a light-emitting element (LE). The switching elements include first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6).

[0092] The driving transistor (DT) includes a gate electrode, a first electrode, and a second electrode. The driving transistor (DT) controls the drain-source current (Ids, hereinafter referred to as "driving current") flowing between the first electrode and the second electrode according to the data voltage applied to the gate electrode.

[0093] The light-emitting element (LE) can be a micro light-emitting diode.

[0094] The light-emitting element (LE) emits light according to the driving current (Ids). The amount of light emitted by the light-emitting element (LE) may be proportional to the driving current (Ids). The anode electrode of the light-emitting element (LE) is connected to the first electrode of the fourth transistor (ST4) and the second electrode of the sixth transistor (ST6), and the cathode electrode may be connected to a second power supply line (VSL) to which a second power supply voltage is applied.

[0095] A capacitor (C1) is formed between the gate electrode of a driving transistor (DT) and a first power line (VDL) to which a first power supply voltage is applied. The first power supply voltage may be a voltage level higher than the second power supply voltage. One electrode of the capacitor (C1) may be connected to the gate electrode of the driving transistor (DT), and the other electrode may be connected to the first power line (VDL).

[0096] As shown in FIG. 4, the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) can all be formed as p-type MOSFETs. In this case, the active layer of each of the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) can be formed of polysilicon.

[0097] The gate electrode of the first transistor (ST1) and the gate electrode of the second transistor (ST2) may be connected to the write scan line (GWL), the gate electrode of the third transistor (ST3) may be connected to the initialization scan line (GIL), and the gate electrode of the fourth transistor (ST4) may be connected to the bias scan line (GBL). Since the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) are formed as p-type MOSFETs, they may be turned on when a scan signal of gate low voltage and a light emission control signal are applied to the initialization scan line (GIL), the write scan line (GWL), the bias scan line (GBL), and the light emission line (EL), respectively. One electrode of the third transistor (ST3) may be connected to a first initialization voltage line (VIL) to which a third power supply voltage (VINT in FIG. 3) is applied, and one electrode of the fourth transistor (ST4) may be connected to a second initialization voltage line (VAIL) to which a fourth power supply voltage (VAINT in FIG. 3) is applied. The third power supply voltage (VINT in FIG. 3) and the fourth power supply voltage (VAINT in FIG. 3) may be different voltages. Additionally, the third power supply voltage (VINT in FIG. 3) and the fourth power supply voltage (VAINT in FIG. 3) may be voltages at a lower level than the first power supply voltage (VDD) and voltages at a higher level than the second power supply voltage (VSS).

[0098] Alternatively, the driving transistor (DT), the second transistor (ST2), the fourth transistor (ST4), the fifth transistor (ST5), and the sixth transistor (ST6) may be formed as p-type MOSFETs, and the first transistor (ST1) and the third transistor (ST3) may be formed as n-type MOSFETs. In this case, the active layer of each of the driving transistor (DT), the second transistor (ST2), the fourth transistor (ST4), the fifth transistor (ST5), and the sixth transistor (ST6) formed as p-type MOSFETs may be formed of polysilicon, and the active layer of each of the first transistor (ST1) and the third transistor (ST3) formed as n-type MOSFETs may be formed of oxide semiconductor. Additionally, since the first transistor (ST1) and the third transistor (ST3) are formed as n-type MOSFETs, the first transistor (ST1) may be turned on when a gate high voltage scan signal is applied, and the third transistor (ST3) may be turned on when an initialization scan signal of a gate high voltage is applied. In contrast, the second transistor (ST2), the fourth transistor (ST4), the fifth transistor (ST5), and the sixth transistor (ST6) are formed as p-type MOSFETs, so they can be turned on when a scan signal of the gate low voltage and a light emission control signal are applied.

[0099] Alternatively, if the fourth transistor (ST4) is formed as an n-type MOSFET and the remaining transistors (DT, ST1, ST2, ST3, ST5, ST6) are formed as p-type MOSFETs, the active layer of the fourth transistor (ST4) may be formed as an oxide semiconductor, and the active layer of each of the remaining transistors (DT, ST1, ST2, ST3, ST5, ST6) may be formed as polysilicon. In addition, the fourth transistor (ST4) may be turned on when a scan signal of gate high voltage is applied, whereas the remaining transistors (DT, ST1, ST2, ST3, ST5, ST6) may be turned on when a scan signal of gate low voltage and a light emission control signal are applied.

[0100] Alternatively, the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) may all be formed as n-type MOSFETs. In this case, the active layer of each of the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) is formed of an oxide semiconductor and can be turned on when a scan signal of gate high voltage and a light emission control signal are applied.

[0101] FIG. 5 is a layout diagram showing pixels of a display area according to one embodiment.

[0102] Referring to FIG. 5, each of the plurality of pixels (PX) of the display area (DA) may include three subpixels (SPX1, SPX2, SPX3), but the embodiments of the present specification are not limited thereto and may include four subpixels. When each of the plurality of pixels (PX) includes three subpixels (SPX1, SPX2, SPX3), it may include a first subpixel (SPX1), a second subpixel (SPX2), and a third subpixel (SPX3).

[0103] Multiple pixels (PX) can be arranged in a matrix form. In each of the multiple pixels (PX), the first sub-pixel (SPX1), the second sub-pixel (SPX2), and the third sub-pixel (SPX3) can be arranged in a first direction (DR1).

[0104] In the case where each of the plurality of pixels (PX) includes three subpixels (SPX1, SPX2, SPX3), the first subpixel (SPX1) may emit light of a first color, the second subpixel (SPX2) may emit light of a second color, and the third subpixel (SPX3) may emit light of a third color. Here, the first color light may be light in the red wavelength band, the second color light may be light in the green wavelength band, and the third color light may be light in the blue wavelength band. For example, the blue wavelength band may refer to a wavelength band in which the main peak wavelength of the light is included in the wavelength band of approximately 370 nm to 460 nm, the green wavelength band may refer to a wavelength band in which the main peak wavelength of the light is included in the wavelength band of approximately 480 nm to 560 nm, and the red wavelength band may refer to a wavelength band in which the main peak wavelength of the light is included in the wavelength band of approximately 600 nm to 750 nm.

[0105] Alternatively, if each of the plurality of pixels (PX) includes four subpixels, the first subpixel may emit light of a first color, the second subpixel and the fourth subpixel may emit light of a second color, and the third subpixel may emit light of a third color. Alternatively, the first subpixel may emit light of a first color, the second subpixel may emit light of a second color, the third subpixel may emit light of a third color, and the fourth subpixel may emit light of a fourth color. In this case, the light of the fourth color may be white light.

[0106] The first subpixel (SPX1) includes a first pixel electrode (PXE1), a light-emitting element (LE), a common electrode (CE), and a first light conversion layer (QDL1). The second subpixel (SPX2) includes a second pixel electrode (PXE2), a light-emitting element (LE), a common electrode (CE), and a second light conversion layer (QDL2). The third subpixel (SPX3) includes a third pixel electrode (PXE3), a light-emitting element (LE), a common electrode (CE), and a light-transmitting layer (TPL).

[0107] Each of the pixel electrodes (PXE1, PXE2, PXE3) and the common electrode (CE) may have a rectangular planar shape, but the embodiments of this specification are not limited thereto.

[0108] The areas of the first light conversion layer (QDL1), the second light conversion layer (QDL2), and the light transmission layer (TPL) may be the same, but are not limited thereto. For example, if the light conversion efficiency of the second light conversion layer (QDL2) is lower than the light conversion efficiency of the first light conversion layer (QDL1), the area of ​​the second pixel electrode (PXE2) may be larger than the area of ​​the first pixel electrode (PXE1). In addition, while the light transmission layer (TPL) transmits the light of the light-emitting element (LE) as is, the first light conversion layer (QDL1) must convert the light, so the area of ​​the first pixel electrode (PXE1) may be larger than the area of ​​the third pixel electrode (PXE3).

[0109] Each of the pixel electrodes (PXE1, PXE2, PXE3) can be electrically connected to at least one transistor through a pixel connection hole (CT1 / CT2 / CT3). For example, each of the pixel electrodes (PXE1, PXE2, PXE3) can be electrically connected to the second electrode of the fourth transistor (ST4 in FIG. 4) and the second electrode of the sixth transistor (ST6 in FIG. 4) of the corresponding subpixel.

[0110] A common electrode (CE) may be connected to a second power line (VSL) to which a second driving voltage (VSS) is applied. Referring to FIG. 5, the common electrode (CE) may be an electrode commonly disposed in the first subpixel (SPX1), the second subpixel (SPX2), and the third subpixel (SPX3) arranged along the first direction, but is not limited thereto. For example, a first common electrode, a second common electrode, and a third common electrode may be disposed in the first subpixel (SPX1), the second subpixel (SPX2), and the third subpixel (SPX3), respectively.

[0111] Pixel electrodes (PXE1, PXE2, PXE3) are referred to as anode electrodes or first electrodes, and common electrodes (CE) may be referred to as cathode electrodes or second electrodes.

[0112] A plurality of light-emitting elements (LEs) may be disposed on pixel electrodes (PXE1 / PXE2 / PXE3) and a common electrode (CE). Each of the plurality of light-emitting elements (LEs) may have a rectangular planar shape, but the embodiments of this specification are not limited thereto. For example, each of the plurality of light-emitting elements (LEs) may have a circular planar shape.

[0113] The first light conversion layer (QDL1) can completely overlap with a plurality of light-emitting elements (LE) of the first subpixel (SPX1). The first light conversion layer (QDL1) can convert or shift the peak wavelength of incident light to light of another specific peak wavelength and emit it. For example, the first light conversion layer (QDL1) can convert or shift third light emitted from a plurality of light-emitting elements (LE) of the first subpixel (SPX1) into first light.

[0114] The second light conversion layer (QDL2) can completely overlap with the plurality of light-emitting elements (LE) of the second subpixel (SPX2). The area of ​​the second light conversion layer (QDL2) may be larger than the area of ​​the second pixel electrode (PXE2). The second light conversion layer (QDL2) can convert or shift the peak wavelength of the incident light to light of another specific peak wavelength and emit it. For example, the second light conversion layer (QDL2) can convert or shift the third light emitted from the plurality of light-emitting elements (LE) of the second subpixel (SPX2) into the second light.

[0115] The light-transmitting layer (TPL) can completely overlap with the plurality of light-emitting elements (LE) of the third subpixel (SPX3). The light-transmitting layer (TPL) can transmit incident light as is. For example, the light-transmitting layer (TPL) can transmit the third light emitted from the plurality of light-emitting elements (LE) of the third subpixel (SPX3) as is.

[0116] When the light-emitting element (LE) of the first subpixel (SPX1) emits light of the first color, the light-emitting element (LE) of the second subpixel (SPX2) emits light of the second color, and the light-emitting element (LE) of the third subpixel (SPX3) emits light of the third color, the light conversion layers (QDL1, QDL2) and the light transmission layer (TPL) may be omitted.

[0117] FIG. 6 is a cross-sectional view showing an example of a cross-section of a display panel corresponding to the line I-I' of FIG. 5. FIG. 7 is a cross-sectional view showing in detail an example of area A of FIG. 6. FIG. 8 is an enlarged view of a part of FIG. 7. FIG. 9 is a cross-sectional view showing in detail another example of area A of FIG. 6.

[0118] Referring to FIGS. 6 and 7, the substrate (SUB) may be made of an insulating material such as glass or a polymer resin. If the substrate (SUB) is made of a polymer resin, it may be a stretchable flexible substrate. The polymer resin may be an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0119] A barrier film (BR) may be disposed on the substrate (SUB). The barrier film (BR) is a film intended to protect the thin-film transistor layer (TFTL) from moisture penetrating through the substrate (SUB), which is susceptible to moisture permeability. The barrier film (BR) may be composed of multiple inorganic films stacked alternately.

[0120] A thin-film transistor (TFT1) may be disposed on the barrier film (BR). The thin-film transistor (TFT1) may be either the fourth transistor (ST4) or the sixth transistor (ST6) shown in FIG. 4. The thin-film transistor (TFT1) may include a first active layer (ACT1) and a first gate electrode (G1).

[0121] A first active layer (ACT1) of a thin-film transistor (TFT1) may be disposed on a barrier film (BR). The first active layer (ACT1) of the thin-film transistor (TFT1) may include polycrystalline silicon, single-crystal silicon, low-temperature polycrystalline silicon, or amorphous silicon. Alternatively, the first active layer (ACT1) of the thin-film transistor (TFT1) may be made of an oxide semiconductor including IGZO (indium (In), gallium (Ga), zinc (Zn), and oxygen (O)), IGZTO (indium (In), gallium (Ga), zinc (Zn), tin (Sn), and oxygen (O)), or IGTO (indium (In), gallium (Ga), tin (Sn), and oxygen (O)).

[0122] The first active layer (ACT1) may include a first channel region (CHA1), a first source region (S1), and a first drain region (D1). The first channel region (CHA1) may be a region that overlaps with the first gate electrode (G1) in the third direction (DR3), which is the thickness direction of the substrate (SUB). The first source region (S1) may be disposed on one side of the first channel region (CHA1), and the first drain region (D1) may be disposed on the other side of the first channel region (CHA1). The first source region (S1) and the first drain region (D1) may be regions that do not overlap with the first gate electrode (G1) in the third direction (DR3). The first source region (S1) and the first drain region (D1) may be regions that have conductivity by doping ions into a semiconductor material.

[0123] A first gate insulating film (131) may be disposed on the first channel region (CHA1), the first source region (S1), and the first drain region (D1) of the thin film transistor (TFT1).

[0124] A first gate metal layer may be disposed on the first gate insulating film (131). The first gate metal layer may include a first gate electrode (G1) and a first capacitor electrode (CAE1) of a thin-film transistor (TFT1). The first gate electrode (G1) may overlap with the first active layer (ACT1) in the third direction (DR3). Although the first gate electrode (G1) and the first capacitor electrode (CAE1) are shown as being separated from each other in FIG. 6, the first gate electrode (G1) and the first capacitor electrode (CAE1) may be connected to each other.

[0125] A second gate insulating film (132) may be disposed on the first gate electrode (G1) and the first capacitor electrode (CAE1) of the thin-film transistor (TFT1).

[0126] A second gate metal layer may be disposed on the second gate insulating film (132). The second gate metal layer may include a second capacitor electrode (CAE2). The second capacitor electrode (CAE2) may overlap with the first capacitor electrode (CAE1) of the thin film transistor (TFT1) in the third direction (DR3). Since the second gate insulating film (132) has a predetermined dielectric constant, a capacitor (C1 in FIG. 4) may be formed by the first capacitor electrode (CAE1), the second capacitor electrode (CAE2), and the second gate insulating film (132) disposed between them.

[0127] A first interlayer insulating film (141) may be disposed on the second capacitor electrode (CAE2).

[0128] A first data metal layer may be disposed on the first interlayer insulating film (141). The first data metal layer may include a first source connection electrode (PCE1). The first source connection electrode (PCE1) may be connected to a first drain region (D1) of the first active layer (ACT1) through a first source contact hole (PCT1) penetrating the first gate insulating film (131), the second gate insulating film (132), and the interlayer insulating film (141).

[0129] A first flattening organic film (160) for flattening the step difference caused by a thin film transistor (TFT1) may be disposed on the first source connection electrode (PCE1).

[0130] A second data metal layer may be disposed on the first planarization organic film (160). The second data metal layer may include a second source connection electrode (PCE2). The second source connection electrode (PCE2) may be connected to the first source connection electrode (PCE1) through a second pixel contact hole (PCT2) that penetrates the first planarization organic film (160).

[0131] A second planarizing organic film (180) may be placed on the second source connection electrode (PCE2).

[0132] The barrier film (BR), the first gate insulating film (131), the second gate insulating film (132), and the interlayer insulating film (141) are inorganic films, for example, silicon nitride (SiN x ), silicon nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ), or aluminum oxide (AlO x It can be formed as ).

[0133] The first gate metal layer, the second gate metal layer, the first data metal layer, and the second data metal layer may be formed as a single layer or a multilayer composed of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0134] The first flattening organic film (160) and the second flattening organic film (180) can be formed from organic films such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

[0135] A light-emitting element layer may be disposed on the second planarized organic film (180). The light-emitting element layer may include pixel electrodes (PXE1, PXE2, PXE3), light-emitting elements (LE), a common electrode (CE), and a second organic layer (210).

[0136] A pixel electrode layer comprising pixel electrodes (PXE1, PXE2, PXE3) and a common electrode (CE) can be disposed on a second planarization organic film (180).

[0137] Each of the first pixel electrode (PXE1), the second pixel electrode (PXE2), and the third pixel electrode (PXE3) can be connected to the second source connection electrode (PCE2) through a connection hole (CT1 / CT2 / CT3 in FIG. 5) penetrating the second planarization organic film (180). Each of the pixel electrodes (PXE1, PXE2, PXE3) can be connected to the first source region (S1) or the first drain region (D1) of the thin-film transistor (TFT1) through the first source connection electrode (PCE1) and the second source connection electrode (PCE2). Therefore, a voltage controlled by the thin-film transistor (TFT1) can be applied to each of the pixel electrodes (PXE1, PXE2, PXE3).

[0138] The common electrode (CE) can be connected to a second power line (VSL in FIG. 4) to which a second driving voltage (VSS in FIG. 3) is applied in an unmarked area.

[0139] The pixel electrode layer may be formed as a single layer or a multilayer composed of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. For example, to lower the resistance of each of the pixel electrodes (PXE1, PXE2, PXE3) and the common electrode (CE), the pixel electrode layer may be made of copper (Cu), which has low sheet resistance.

[0140] Reflective films (RF-P, RF-C) may be further included on pixel electrodes (PXE1, PXE2, PXE3) and a common electrode (CE). The reflective films (RF-P, RF-C) may include a metallic material with high reflectivity, such as aluminum (Al). The thickness of the reflective films (RF-P, RF-C) may be approximately 0.1 μm. The reflective film (RF-P) disposed on the pixel electrodes (PXE1, PXE2, PXE3) may be referred to as the first reflective film (RF-P), and the reflective film (RF-C) disposed on the common electrode (CE) may be referred to as the second reflective film (RF-C).

[0141] A first organic layer (190) may be disposed on the pixel electrode layer. The first organic layer (190) may include an inclined portion (190-S) and an upper portion (190-T) extending from the inclined portion (190-S).

[0142] A first aperture region (OP-A) may be defined by an inclined portion (190-S). The first aperture region (OP-A) overlaps with the area between the pixel electrodes (PXE1, PXE2, PXE3) and the common electrode (CE), and may overlap with at least a portion of the pixel electrodes (PXE1, PXE2, PXE3) and the common electrode (CE). Accordingly, at least a portion of the pixel electrodes (PXE1, PXE2, PXE3) and the common electrode (CE) may be exposed by the first aperture region (OP-A). The area exposed by the first aperture region (OP-A) may be larger than the area of ​​the light-emitting element (LE).

[0143] The first organic layer (190) can be formed from an organic film such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0144] Referring to FIG. 8 in addition to FIG. 7, a first lower connecting electrode (BBE1) and a second lower connecting electrode (BBE2) may be disposed on the first organic layer (190) on the inclined portion (190-S) and the upper portion (190-T) of the first organic layer (190).

[0145] The first lower connecting electrode (BBE1) extends from one side of the inclined portion (190-S) to the upper surface of the first reflective film (RF-P). Thus, the first lower connecting electrode (BBE1) is electrically connected to the first reflective film (RF-P). The second lower connecting electrode (BBE2) extends from one side of the inclined portion (190-S) to the upper surface of the second reflective film (RF-C). Thus, the second lower connecting electrode (BBE2) is electrically connected to the second reflective film (RF-C).

[0146] The first lower connecting electrode (BBE1) and the second lower connecting electrode (BBE2) are spaced apart from each other and are not electrically connected.

[0147] The first lower connecting electrode (BBE1) and the second lower connecting electrode (BBE2) may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Specifically, to increase reflectivity, each of the first lower connecting electrode (BBE1) and the second lower connecting electrode (BBE2) may be formed with a two-layer structure of chromium (Cr) and gold (Au), a three-layer structure of titanium (Ti), aluminum (Al), and titanium (Ti), or a three-layer structure of ITO (Indium Tin Oxide), silver (Ag), and ITO (Indium Tin Oxide).

[0148] A first protective layer (INS1) is disposed on the first organic layer (190) and the first opening region (OP-A). The first protective layer (INS1) covers both the first lower connecting electrode (BBE1) and the second lower connecting electrode (BBE2).

[0149] The upper part of the first organic layer (190) may be higher than the active layer (MQW) of the light-emitting element (LE) and lower than the upper part of the light-emitting element (LE).

[0150] A reflective layer (RF) is placed on the first protective layer (INS1) that overlaps with the inclined portion (190-S).

[0151] The reflective layer (RF) may be a closed-loop shape that is spaced apart from the light-emitting element (LE) and surrounds the side of the light-emitting element (LE). The reflective layer (RF) can reflect light traveling in a lateral direction from the light-emitting element (LE) and emit it to the upper surface of the light-emitting element (LE). Therefore, since the loss of light from the light-emitting element (LE) can be reduced, the light efficiency of the light-emitting element (LE) can be increased.

[0152] When the height of the first organic layer (190) is positioned higher than the active layer (MQW) of the light-emitting element (LE), the top of the reflective layer (RF) may be positioned higher than the active layer (MQW) of the light-emitting element (LE). The bottom of the reflective layer (RF) may be positioned lower than or equal to the light-emitting element (LE). The reflective layer (RF) may include a metal material with high reflectivity, such as aluminum (Al).

[0153] The slope (θ1) of the inclined portion (190-S) may be approximately 120° to 130°. The slope (θ1) of the inclined portion (190-S) may be defined by the first reflective film (RF-P) and the virtual plane (VS1) of the first organic layer (190) in contact with the first reflective film (RF-P). Since the reflective layer (RF) is disposed on the inclined portion (190-S), the reflective layer (RF) also has a slope (θ2) equal to the slope (θ1) of the inclined portion (190-S). Therefore, the slope (θ2) of the reflective layer (RF) may be approximately 120° to 130°. The greater the slope (θ2) of the reflective layer (RF), the greater the frontal light emission efficiency may be.

[0154] A second protective layer (INS2) is disposed on the first organic layer (190) and the reflective layer (RF). The second protective layer (INS2) can be disposed to cover the entire reflective layer (RF).

[0155] Accordingly, the reflective layer (RF) can be surrounded by a first protective layer (INS1) and a second protective layer (INS2). The reflective layer (RF) is electrically isolated from external components.

[0156] The first protective layer (INS1) and the second protective layer (INS2) are inorganic films, for example, silicon nitride (SiN x ), silicon nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ), or aluminum oxide (AlO x It can be formed as ).

[0157] A contact hole (INS-H) penetrating the first protective layer (INS1) and the second protective layer (INS2) is located in an area overlapping with the upper portion (190-T) of the first organic layer (190). At least a portion of the first lower connecting electrode (BBE1) and the second lower connecting electrode (BBE2) on the upper surface of the upper portion (190-T) of the first organic layer (190) is exposed by the contact hole (INS-H). The contact hole (INS-H) may have a planar shape such as a circle, an ellipse, or a polygon.

[0158] A second organic layer (210) may be disposed within the first aperture region (OP-A). The second organic layer (210) serves to temporarily fix or adhere an upper member (e.g., a light-emitting element (LE)). For example, the second organic layer (210) may be a film for temporarily adhering an upper member (e.g., a light-emitting element (LE)) onto each of the pixel electrodes (PXE1, PXE2, PXE3) and the common electrode (CE). To facilitate temporary adhesion, the thickness of the second organic layer (210) may be greater than the thickness of each of the pixel electrodes (PXE1, PXE2, PXE3) and the common electrode (CE), and greater than the thickness of the contact electrode (CTE). For example, the thickness of the second organic layer (210) may be 1.2 μm, but is not limited thereto.

[0159] The second organic layer (210) may partially overlap with the reflective layer (RF).

[0160] The second organic layer (210) may be a photosensitive organic film such as a photoresist. Alternatively, the second organic layer (210) may be formed from acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc.

[0161] A plurality of light-emitting elements (LE) may be disposed on the second organic layer (210). In FIGS. 6 and 7, the light-emitting element (LE) is exemplified as a flip-type micro LED. A flip-type micro LED refers to an LED having contact electrodes (CTE1, CTE2) formed on one side (e.g., the bottom side) of the light-emitting element (LE). The light-emitting element (LE) may include a substantially vertical side as shown in FIG. 7. For example, the light-emitting element (LE) may be patterned through vertical etching and may have a rectangular or square cross-sectional shape in which the width of the top side and the width of the bottom side are substantially the same. Each of the plurality of light-emitting elements (LE) may be formed from an inorganic material such as gallium nitride (GaN). The shape of the light-emitting element (LE) may vary depending on the embodiments. For example, the light-emitting element (LE) may have a reverse taper cross-sectional shape. For example, the light-emitting element (LE) may have an inverted trapezoidal cross-sectional shape in which the width of the top surface is wider than the width of the bottom surface.

[0162] Each of the plurality of light-emitting elements (LE) can be formed by growing on a semiconductor substrate such as a silicon substrate or a sapphire substrate. The plurality of light-emitting elements (LE) can be transferred directly from the semiconductor substrate or via a relay substrate onto the pixel electrode layer of the display panel (100). Alternatively, the plurality of light-emitting elements (LE) can be transferred onto the pixel electrodes (PXE1, PXE2, PXE3) of the display panel (100) via an electrostatic method using an electrostatic head or a stamp method using an elastic polymer material such as PDMS or silicon as a transfer substrate.

[0163] As illustrated in FIGS. 7 to 9, the light-emitting element (LE) may include a conductive layer (E1), a semiconductor stack (STC), a first contact electrode (CTE1), a second contact electrode (CTE2), and a protective film (INS). The semiconductor stack (STC) may include a first semiconductor layer (SEM1), an active layer (MQW), and a second semiconductor layer (SEM2) arranged sequentially in a third direction (DR3).

[0164] A conductive layer (E1) may be disposed on the lower surface of a first semiconductor layer (SEM1). Although FIG. 7 illustrates a case where the conductive layer (E1) covers the entire lower surface of the first semiconductor layer (SEM1), the embodiments of this specification are not limited thereto. As an example, the conductive layer (E1) may be disposed on a part of the lower surface of the first semiconductor layer (SEM1). The conductive layer (E1) may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu).

[0165] The first semiconductor layer (SEM1) can be placed on the conductive layer (E1). The first semiconductor layer (SEM1) may be made of a semiconductor material layer doped with a first conductive type dopant such as magnesium (Mg), zinc (Zn), calcium (Ca), strontium (Sr), barium (Ba), etc., for example, gallium nitride (GaN).

[0166] In one embodiment, the first semiconductor layer (SEM1) may have a multilayer structure. For example, the first semiconductor layer (SEM1) may include a P-GaN layer and a P+GaN layer. The P+GaN layer may be disposed below the P-GaN layer. The P+GaN layer may be a layer over-doped with the first conductivity type dopant. The P+GaN layer may be formed on top with a thickness of several nanometers to tens of nanometers to aid in ohmic formation. P+GaN is very useful for lowering the operating voltage by improving ohmic characteristics with the top metal through the tunneling effect.

[0167] The active layer (MQW) can be placed on the first semiconductor layer (SEM1). The active layer (MQW) can emit light through the coupling of electron-hole pairs according to an electric signal applied through the first semiconductor layer (SEM1) and the second semiconductor layer (SEM2).

[0168] The active layer (MQW) may include a material having a single or multiple quantum well structure. When the active layer (MQW) includes a material having a multiple quantum well structure, it may have a structure in which multiple well layers and barrier layers are alternately stacked. In this case, the well layers may be formed of indium gallium nitride (InGaN), and the barrier layers may be formed of gallium nitride (GaN) or aluminum gallium nitride (AlGaN), but the embodiments of this specification are not limited thereto.

[0169] Alternatively, the active layer (MQW) may have a structure in which semiconductor materials with large band gap energy and semiconductor materials with small band gap energy are alternately stacked, or it may include different group 3 to group 5 semiconductor materials depending on the wavelength of the emitted light.

[0170] For example, when the active layer (MQW) contains indium gallium nitride (InGaN), the color of the emitted light may vary depending on the content of indium (In). For example, as the content of indium (In) increases, the wavelength band of the light emitted by the active layer shifts to a red wavelength band, and as the content of indium (In) decreases, the wavelength band of the light emitted by the active layer shifts to a blue wavelength band. For example, the content of indium (In) in the active layer (MQW) of a light-emitting device (LE) that emits a third light (light in the blue wavelength band) may be approximately 10 wt% to 20 wt%.

[0171] The second semiconductor layer (SEM2) can be disposed on the active layer (MQW). The second semiconductor layer (SEM2) may be a semiconductor material layer doped with a second conductivity type dopant, such as silicon (Si), germanium (Ge), tin (Sn), etc., for example, gallium nitride (GaN).

[0172] In one embodiment, the second semiconductor layer (SEM2) may have a multilayer structure. For example, the second semiconductor layer (SEM2) may have an N-GaN layer and an N+GaN layer disposed on the N-GaN layer. The N+GaN layer may be a layer over-doped with the second conductivity type dopant. The N+GaN layer can lower electrical resistance and improve current distribution when forming an ohmic electrode, thereby increasing the overall uniform luminescence of the light-emitting element (LE).

[0173] An electron blocking layer may be placed between the first semiconductor layer (SEM1) and the active layer (MQW). The electron blocking layer may be a layer for suppressing or preventing too many electrons from flowing into the active layer (MQW). For example, the electron blocking layer may be aluminum gallium nitride (AlGaN) or p-type aluminum gallium nitride (AlGaN) doped with p-type magnesium (Mg). The electron blocking layer may be omitted.

[0174] A superlattice layer may be disposed between the active layer (MQW) and the second semiconductor layer (SEM2). The superlattice layer may be a layer for relieving stress between the second semiconductor layer (SEM2) and the active layer (MQW). For example, the superlattice layer may be formed of indium gallium nitride (InGaN) or gallium nitride (GaN). The superlattice layer may be omitted.

[0175] The protective film (INS) may be a film for protecting the bottom surface and side surface of the light-emitting element (LE). The protective film (INS) may be placed on the bottom surface and side surface of the conductive layer (E1) and on the side surface of the semiconductor stack (STC). Specifically, the protective film (INS) may be placed on the bottom surface and side surface of the conductive layer (E1), on the side surface of the first semiconductor layer (SEM1), on the side surface of the active layer (MQW), and on the side surface of the second semiconductor layer (SEM2).

[0176] The protective layer (INS) is an inorganic film, for example, silicon nitride (SiN x ), silicon nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ), or aluminum oxide (AlO x It can be formed as ).

[0177] A hole (LEH) may be formed that penetrates the conductive layer (E1), the first semiconductor layer (SEM1), and the active layer (MQW) of the light-emitting element (LE) to expose the second semiconductor layer (SEM2). The hole (LEH) may have a rectangular planar shape, but the embodiments of this specification are not limited thereto. As an example, the hole (LEH) may have a polygonal planar shape such as a circle, an ellipse, or a square.

[0178] The first contact electrode (CTE1) may be disposed on at least one side of the semiconductor stack (STC) and on at least one side of the conductive layer (E1) and on the lower surface. The first contact electrode (CTE1) may be disposed on the lower surface of the conductive layer (E1) that is exposed and not covered by a protective film (INS). Therefore, the first contact electrode (CTE1) may be electrically connected to the conductive layer (E1).

[0179] The second contact electrode (CTE2) may be disposed on at least one side of the semiconductor stack (STC), at least one side of the conductive layer (E1), and on the lower surface. In this case, while the first contact electrode (CTE1) is disposed on the first side of the semiconductor stack (STC) and the first side of the conductive layer (E1), the second contact electrode (CTE2) may be disposed on the second side of the semiconductor stack (STC) and the second side of the conductive layer (E1).

[0180] The second contact electrode (CTE2) can be placed on a protective film (INS) placed in the hole (LEH) and on a second semiconductor layer (SEM2) exposed in the hole (LEH) without being covered by the protective film (INS). Therefore, the second contact electrode (CTE2) can be electrically connected to the second semiconductor layer (SEM2) in the hole (LEH).

[0181] The first contact electrode (CTE1) and the second contact electrode (CTE2) may be disposed on at least a portion of the side of the semiconductor stack (STC). Among the sides of the semiconductor stack (STC), at least the area adjacent to the upper surface of the semiconductor stack (STC) may be exposed and not covered by the first contact electrode (CTE1) and the second contact electrode (CTE2). For example, the first contact electrode (CTE1) and the second contact electrode (CTE2) may be spaced apart from the upper surface of the semiconductor stack (STC) in a third direction (DR3).

[0182] The first contact electrode (CTE1) and the second contact electrode (CTE2) may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Specifically, to increase reflectivity, the first contact electrode (CTE1) and the second contact electrode (CTE2) may be formed with a two-layer structure of chromium (Cr) and gold (Au), a three-layer structure of titanium (Ti), aluminum (Al), and titanium (Ti), or a three-layer structure of ITO (Indium Tin Oxide), silver (Ag), and ITO (Indium Tin Oxide).

[0183] The first upper connecting electrode (UBE1) connects the first contact electrode (CTE1) and the first lower connecting electrode (BBE1). For example, the first upper connecting electrode (UBE1) can be connected to the first lower connecting electrode (BBE1) exposed through a contact hole (INS-H1) penetrating the protective layer (INS1, INS2). Additionally, the first upper connecting electrode (UBE1) can be placed on the upper surface of the second protective layer (INS2) and on the first contact electrode (CTE1).

[0184] The second upper connecting electrode (UBE2) connects the second contact electrode (CTE2) and the second lower connecting electrode (BBE2). For example, the second upper connecting electrode (UBE2) can be connected to the second lower connecting electrode (BBE2) exposed through a contact hole (INS-H2) penetrating the protective layer (INS1, INS2). Additionally, the second upper connecting electrode (UBE2) can be placed on the upper surface of the second protective layer (INS2) and on the second contact electrode (CTE2).

[0185] The first upper connecting electrode (UBE1) and the second upper connecting electrode (UBE2) may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Specifically, the first connecting electrode (BE1) and the second connecting electrode (BE2) may each be formed with a two-layer structure of chromium (Cr) and gold (Au), a three-layer structure of titanium (Ti), aluminum (Al), and titanium (Ti), or a three-layer structure of ITO (Indium Tin Oxide), silver (Ag), and ITO (Indium Tin Oxide) to increase reflectivity.

[0186] The third organic layer (211) may be arranged to cover a plurality of light-emitting elements (LE). Additionally, the third organic layer (211) may be arranged to cover the first upper connecting electrode (UBE1) and the second upper connecting electrode (UBE2).

[0187] The third organic layer (211) is a layer for flattening the step difference caused by the plurality of light-emitting elements (LE). When the height of the third organic layer (211) is arranged to cover only a portion of the side of each of the plurality of light-emitting elements (LE), an additional organic film may be disposed on the third organic layer (211). The third organic layer (211) may be formed from an organic film such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0188] Meanwhile, if the second organic layer (210) is made of a photosensitive organic material such as photoresist, the second organic layer (210) is soft-baked at a first temperature, and then a light-emitting element (LE) is placed on the second organic layer (210). As shown in FIG. 7, when the light-emitting element (LE) is placed on the second organic layer (210), the light-emitting element (LE) is embedded in the second organic layer (210) in a soft-baked state by the pressure applied. At least one part of each of the plurality of light-emitting elements (LE) is inserted into the second organic layer (210).

[0189] In another embodiment, as shown in FIG. 9, the light-emitting element (LE) is embedded relatively deeply into the second organic layer (210), and at this time, the first protective layer (INS1) can serve as an insertion layer. One side of the first contact electrode (CTE1) and the second contact electrode (CTE2) of the light-emitting element (LE) can come into contact with the first protective layer (INS1). That is, the light-emitting element (LE) can be inserted into the second organic layer (210) until it comes into contact with the first protective layer (INS1).

[0190] Referring again to FIGS. 6 and 7, the third organic layer (211) may be arranged to cover the sides of a plurality of light-emitting elements (LE), the second organic layer (210), and the upper connecting electrodes (BE1, BE2). For example, the second organic layer (210) and the upper connecting electrodes (BE1, BE2) may be covered by the third organic layer (211). The upper surface of each of the plurality of light-emitting elements (LE) may be exposed and not covered by the third organic layer (211). In another example, the third organic layer (211) may include a plurality of stacked organic films. The third organic layer (211) is a layer for flattening the step difference caused by the plurality of light-emitting elements (LE).

[0191] The third organic layer (211) can be formed from an organic film such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0192] A light-blocking layer (BM), a first light-converting layer (QDL1), a second light-converting layer (QDL2), and a light-transmitting layer (TPL) may be disposed on the third organic layer (211). The first light-converting layer (QDL1), the second light-converting layer (QDL2), and the light-transmitting layer (TPL) may be formed by the partitions of the light-blocking layer (BM). Therefore, the first light-converting layer (QDL1) may be disposed on the first capping layer (CAP1) in the first subpixel (SPX1), the second light-converting layer (QDL2) may be disposed on the first capping layer (CAP1) in the second subpixel (SPX2), and the light-transmitting layer (TPL) may be disposed on the first capping layer (CAP1) in the third subpixel (SPX3). The light-blocking layer (BM) may not overlap with a plurality of light-emitting elements (LE) in the third direction (DR3).

[0193] The first light conversion layer (QDL1) can convert a portion of the third light (light in the blue wavelength band) incident from the light-emitting element (LE) into the first light (light in the red wavelength band). The first light conversion layer (QDL1) may include a first base resin (BRS1) and a first wavelength conversion particle (WCP1). The first base resin (BRS1) may include a transparent organic material. The first wavelength conversion particle (WCP1) can convert a portion of the third light (light in the blue wavelength band) incident from the light-emitting element (LE) into the first light (light in the red wavelength band).

[0194] The second light conversion layer (QDL2) can convert a portion of the third light (light in the blue wavelength band) incident from the light-emitting element (LE) into second light (light in the green wavelength band). It may include a second base resin (BRS2) and a second wavelength conversion particle (WCP2). The second base resin (BRS2) may include a transparent organic material. The second wavelength conversion particle (WCP2) can convert a portion of the third light (light in the blue wavelength band) incident from the light-emitting element (LE) into second light (light in the green wavelength band).

[0195] The light-transmitting layer (TPL) may include a light-transmitting organic material.

[0196] For example, the first base resin (BRS1), the second base resin (BRS2), and the light-transmitting layer (TPL) may include epoxy resin, acrylic resin, cardo resin, or imide resin, etc. The first and second wavelength conversion particles (WCP1, WCP2) may be quantum dots (QD), quantum rods, fluorescent materials, or phosphorescent materials.

[0197] The light-blocking layer (BM) may include a first light-blocking layer (BM1) and a second light-blocking layer (BM2) that are sequentially stacked. The length of the first direction (DR1) or the length of the second direction (DR2) of the first light-blocking layer (BM1) may be wider than the length of the first direction (DR1) or the length of the second direction (DR2) of the second light-blocking layer (BM2). The first light-blocking layer (BM1) and the second light-blocking layer (BM2) may be formed from organic films such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin. The first light-blocking layer (BM1) and the second light-blocking layer (BM2) may include a light-blocking material to prevent light from a light-emitting element (LE) of one subpixel from proceeding to an adjacent subpixel. For example, the first light-blocking layer (BM1) and the second light-blocking layer (BM2) may include an inorganic black pigment such as carbon black or an organic black pigment.

[0198] The first capping layer (CAP1) can be disposed on the third organic layer (211) and the light-blocking layer (BM). The first capping layer (CAP1) can be disposed on the side and top surface of the light-blocking layer (BM). That is, the first capping layer (CAP1) can be disposed on the side of the first light-blocking layer (BM1) and on the side and top surface of the second light-blocking layer (BM2).

[0199] The upper reflective film (RF2) may be disposed between the light-blocking layer (BM) and the first light-converting layer (QDL1), between the light-blocking layer (BM) and the second light-converting layer (QDL2), and between the light-blocking layer (BM) and the light-transmitting layer (TPL). The upper reflective film (RF2) may be disposed on the first capping layer (CAP1) disposed on the side of the first light-blocking layer (BM1) and the side of the second light-blocking layer (BM2). The upper reflective film (RF2) serves to reflect light traveling in the lateral direction from the first light-converting layer (QDL1), the second light-converting layer (QDL2), and the light-transmitting layer (TPL).

[0200] The upper reflective film (RF2) may include a highly reflective metallic material such as aluminum (Al). The thickness of the upper reflective film (RF2) may be approximately 0.1 μm.

[0201] Alternatively, the upper reflective film (RF2) may comprise a first layer and a second layer in pairs of M (where M is an integer greater than or equal to 2) having different refractive indices to serve as Distributed Bragg Reflectors (DBRs). In this case, M first layers and M second layers may be arranged alternately. The first layer and the second layer may be inorganic films, for example, silicon nitride (SiN x ), silicon nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ), or aluminum oxide (AlO x It can be formed as ).

[0202] The second capping layer (CAP2) can be disposed on the first capping layer (CAP1), the first light conversion layer (QDL1), the second light conversion layer (QDL2), and the light transmission layer (TPL).

[0203] The first capping layer (CAP1) and the second capping layer (CAP2) are inorganic films, for example, silicon nitride (SiN x ), silicon nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ), or aluminum oxide (AlO x It can be formed as follows. The first light conversion layer (QDL1), the second light conversion layer (QDL2), and the light transmission layer (TPL) can be encapsulated by the first capping layer (CAP1) and the second capping layer (CAP2).

[0204] A fourth organic layer (212) may be disposed on the second capping layer (CAP2). A plurality of color filters (CF1, CF2, CF3) may be disposed on the fourth organic layer (212). The plurality of color filters (CF1, CF2, CF3) may include first color filters (CF1), second color filters (CF2), and third color filters (CF3).

[0205] A first color filter (CF1) disposed in a first subpixel (SPX1) can transmit a first light (light in the red wavelength band) and absorb or block a third light (light in the blue wavelength band). Therefore, the first color filter (CF1) can transmit the first light (light in the red wavelength band) converted by the first light conversion layer (QDL1) among the third light (light in the blue wavelength band) emitted from the light-emitting element (LE), and can absorb or block the third light (light in the blue wavelength band) that is not converted by the first light conversion layer (QDL1). Accordingly, the first subpixel (SPX1) can emit the first light (light in the red wavelength band).

[0206] A second color filter (CF2) placed in the second subpixel (SPX2) can transmit second light (light in the green wavelength band) and absorb or block third light (light in the blue wavelength band). Therefore, the second color filter (CF2) can transmit second light (light in the green wavelength band) converted by the second light conversion layer (QDL2) among the third light (light in the blue wavelength band) emitted from the light-emitting element (LE), and can absorb or block third light (light in the blue wavelength band) that is not converted by the second light conversion layer (QDL2). Accordingly, the second subpixel (SPX2) can emit second light (light in the green wavelength band).

[0207] A third color filter (CF3) placed in a third subpixel (SPX3) can transmit third light (light in the blue wavelength band). Therefore, the third color filter (CF3) can transmit third light (light in the blue wavelength band) emitted from a light-emitting element (LE) passing through a light-transmitting layer (TPL). Accordingly, the third subpixel (SPX3) can emit third light (light in the blue wavelength band).

[0208] The first color filter (CF1), the second color filter (CF2), and the third color filter (CF3) that overlap in the third direction (DR3) can overlap with the light-blocking layer (BM) in the third direction (DR3).

[0209] A fifth organic film (213) for flattening can be placed on a plurality of color filters (CF1, CF2, CF3).

[0210] The fourth organic layer (212) and the fifth organic film (213) can be formed from acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc.

[0211] Figure 10 is a cross-sectional view showing another example of area A of Figure 6 in detail.

[0212] The embodiment of FIG. 10 differs from the embodiment of FIG. 7 in that the first lower connecting electrode (BBE1) and the second lower connecting electrode (BBE2) are omitted, and the contact hole (INS-H) is formed deeply so that the upper connecting electrodes (UBE1, UBE2) and the reflective films (RF-P, RF-C) come into direct contact. In FIG. 10, descriptions that overlap with the embodiments described with reference to FIG. 6 and FIG. 7 are not repeated, and the description focuses on the differences from the embodiment of FIG. 7.

[0213] Referring to FIG. 10, reflective films (RF-P, RF-C) may be further included on the pixel electrodes (PXE1, PXE2, PXE3) and the common electrode (CE).

[0214] A reflective film (RF-P) placed on pixel electrodes (PXE1, PXE2, PXE3) can be referred to as the first reflective film (RF-P), and a reflective film (RF-C) placed on the common electrode (CE) can be referred to as the second reflective film (RF-C).

[0215] A first organic layer (190) may be disposed on the pixel electrode layer. The first organic layer (190) may include an inclined portion (190-S) and an upper portion (190-T) extending from the inclined portion (190-S).

[0216] A first aperture region (OP-A) may be defined by an inclined portion (190-S). The first aperture region (OP-A) overlaps with the area between the pixel electrodes (PXE1, PXE2, PXE3) and the common electrode (CE), and may overlap with at least a portion of the pixel electrodes (PXE1, PXE2, PXE3) and the common electrode (CE). Accordingly, at least a portion of the pixel electrodes (PXE1, PXE2, PXE3) and the common electrode (CE) may be exposed by the first aperture region (OP-A). The area exposed by the first aperture region (OP-A) may be larger than the area of ​​the light-emitting element (LE).

[0217] A first protective layer (INS1) is disposed on the first organic layer (190) and the first opening region (OP-A).

[0218] A reflective layer (RF) is placed on the first protective layer (INS1) that overlaps with the inclined portion (190-S).

[0219] The reflective layer (RF) is spaced apart from the light-emitting element (LE) and surrounds the side of the light-emitting element (LE). The reflective layer (RF) can increase light emission efficiency by reflecting light traveling in a lateral direction from the light-emitting element (LE). Since the height of the first organic layer (190) is higher than the active layer (MQW) of the light-emitting element (LE), the top of the reflective layer (RF) can be positioned higher than the active layer (MQW) of the light-emitting element (LE). The bottom of the reflective layer (RF) can be positioned lower than or equal to the light-emitting element (LE). The reflective layer (RF) may include a metallic material with high reflectivity, such as aluminum (Al).

[0220] A second protective layer (INS2) is disposed on the first organic layer (190) and the reflective layer (RF). The second protective layer (INS2) can be disposed to cover the entire reflective layer (RF).

[0221] Accordingly, the reflective layer (RF) can be surrounded by a first protective layer (INS1) and a second protective layer (INS2). The reflective layer (RF) is electrically isolated from external components.

[0222] A contact hole (INS-H1) penetrating the first protective layer (INS1), the second protective layer (INS2), and the first organic layer (190) is located in an area overlapping with the upper portion (190-T) of the first organic layer (190). At least a portion of the reflective film (RF-P, RF-C) is exposed by the contact hole (INS-H1). The contact hole (INS-H1) may have a planar shape such as a circle, an ellipse, or a polygon.

[0223] The first upper connecting electrode (UBE1) connects the first contact electrode (CTE1) and the first reflective film (RF-P). For example, the first upper connecting electrode (UBE1) can be connected to the first reflective film (RF-P) exposed through a contact hole (INS-H1) penetrating the protective layer (INS1, INS2) and the first organic layer (190). Additionally, the first upper connecting electrode (UBE1) can be placed on the upper surface of the second protective layer (INS2) and on the first contact electrode (CTE1).

[0224] The second upper connecting electrode (UBE2) connects the second contact electrode (CTE2) and the second reflective film (RF-C). For example, the second upper connecting electrode (UBE2) can be connected to the second reflective film (RF-C) exposed through a contact hole (INS-H2) penetrating the protective layer (INS1, INS2) and the first organic layer (190). Additionally, the second upper connecting electrode (UBE2) can be placed on the upper surface of the second protective layer (INS2) and on the second contact electrode (CTE2).

[0225] The third organic layer (211) may be arranged to cover a plurality of light-emitting elements (LE). Additionally, the third organic layer (211) may be arranged to cover the first upper connecting electrode (UBE1) and the second upper connecting electrode (UBE2). The third organic layer (211) may fill the inside of the contact holes (INS-H1, INS-H2).

[0226] FIG. 11 is an image showing a cross-section of a display panel according to a conventional embodiment.

[0227] Referring to FIG. 11, the distance (D2) from the center of the first light-emitting element (LE1) to the center of the adjacent second light-emitting element (LE2) is about 26 μm, and the distance (D1) between the first light-emitting element (LE1) and the second light-emitting element (LE2) may be about 5.5 μm.

[0228] As such, since the distance between the light-emitting elements (LE1, LE2) is very narrow, considering that the alignment margin of the light-emitting elements (LE1, LE2) is about 2 μm, the space available to form the first organic layer (190) is about 3 μm. Since the space available to form the first organic layer (190) is very narrow, the shape of the first organic layer (190) may be formed irregularly. Accordingly, the reflective layer located on the inclined surface of the organic layer is often formed abnormally. This problem may become more severe with higher resolution display devices.

[0229] Accordingly, in one embodiment, a first organic layer (190) is formed, and a reflective layer (RF) is formed on the inclined surface of the first organic layer (190). Subsequently, by positioning a light-emitting element (LE) between the first organic layer (190), the first organic layer (190) and the reflective layer (RF) can be formed normally. This manufacturing method will be described in detail with reference to FIGS. 14 to 24.

[0230] FIG. 12 is a layout diagram showing pixels of a display area according to another embodiment.

[0231] The embodiment of FIG. 12 differs from the embodiment of FIG. 5 in that a light-emitting element (LE) is disposed on the pixel electrodes (PXE1 / PXE2 / PXE3) for each of the first subpixel (SPX1), the second subpixel (SPX2), and the third subpixel (SPX3). In FIG. 12, descriptions that overlap with the embodiment of FIG. 5 are omitted, and the explanation focuses on the differences from the embodiment of FIG. 5.

[0232] Referring to FIG. 12, the first subpixel (SPX1) includes a first pixel electrode (PXE1), a plurality of light-emitting elements (LE), and a first light conversion layer (QDL1). The second subpixel (SPX2) includes a second pixel electrode (PXE2), a plurality of light-emitting elements (LE), and a second light conversion layer (QDL2). The third subpixel (SPX3) includes a third pixel electrode (PXE3), a plurality of light-emitting elements (LE), and a light-transmitting layer (TPL).

[0233] Each of the first pixel electrode (PXE1), the second pixel electrode (PXE2), and the third pixel electrode (PXE3) may have a rectangular planar shape having a short side in the first direction (DR1) and a long side in the second direction (DR2). The area of ​​the first subpixel (SPX1), the area of ​​the second subpixel (SPX2), and the area of ​​the third subpixel (SPX3) may be set according to the light conversion efficiency of the first light conversion layer (QDL1) and the light conversion efficiency of the second light conversion layer (QDL2). For example, the area of ​​the subpixel may be larger as the light conversion efficiency decreases.

[0234] For example, as shown in FIG. 12, if the light conversion efficiency of the second light conversion layer (QDL2) is lower than the light conversion efficiency of the first light conversion layer (QDL1), the area of ​​the second pixel electrode (PXE2) may be larger than the area of ​​the first pixel electrode (PXE1). Also, since the light transmission layer (TPL) transmits the light of the light-emitting element (LE) as is, whereas the first light conversion layer (QDL1) must convert the light, the area of ​​the first pixel electrode (PXE1) may be larger than the area of ​​the third pixel electrode (PXE3).

[0235] Each of the pixel electrodes (PXE1, PXE2, PXE3) can be electrically connected to at least one transistor through a pixel connection hole (CT1 / CT2 / CT3). For example, each of the pixel electrodes (PXE1, PXE2, PXE3) can be electrically connected to the second electrode of the fourth transistor (ST4 in FIG. 4) and the second electrode of the sixth transistor (ST6 in FIG. 4) of the corresponding subpixel.

[0236] A plurality of light-emitting elements (LEs) may be disposed on each of the pixel electrodes (PXE1, PXE2, PXE3). An equal number of light-emitting elements (LEs) may be disposed on each of the pixel electrodes (PXE1, PXE2, PXE3). For example, two light-emitting elements (LEs) may be disposed on each of the pixel electrodes (PXE1, PXE2, PXE3). The plurality of light-emitting elements (LEs) may emit light of a third color, namely light in the blue wavelength band, but the embodiments of this specification are not limited thereto.

[0237] Each of the plurality of light-emitting elements (LEs) may have a circular planar shape, but the embodiments of this specification are not limited thereto. For example, each of the plurality of light-emitting elements (LEs) may have a rectangular planar shape.

[0238] The first light conversion layer (QDL1) can completely overlap with the plurality of light-emitting elements (LE) of the first pixel electrode (PXE1) and the first subpixel (SPX1). The area of ​​the first light conversion layer (QDL1) may be larger than the area of ​​the first pixel electrode (PXE1). The first light conversion layer (QDL1) can convert or shift the peak wavelength of incident light to light of another specific peak wavelength and emit it. For example, the first light conversion layer (QDL1) can convert or shift third light emitted from the plurality of light-emitting elements (LE) of the first subpixel (SPX1) into first light.

[0239] The second light conversion layer (QDL2) can completely overlap with the plurality of light-emitting elements (LE) of the second pixel electrode (PXE2) and the second subpixel (SPX2). The area of ​​the second light conversion layer (QDL2) may be larger than the area of ​​the second pixel electrode (PXE2). The second light conversion layer (QDL2) can convert or shift the peak wavelength of incident light to light of another specific peak wavelength and emit it. For example, the second light conversion layer (QDL2) can convert or shift third light emitted from the plurality of light-emitting elements (LE) of the second subpixel (SPX2) into second light.

[0240] The light-transmitting layer (TPL) can completely overlap with the plurality of light-emitting elements (LE) of the third pixel electrode (PXE3) and the third subpixel (SPX3). The light-transmitting layer (TPL) can transmit incident light as is. For example, the light-transmitting layer (TPL) can transmit the third light emitted from the plurality of light-emitting elements (LE) of the third subpixel (SPX3) as is.

[0241] FIG. 13 is a cross-sectional view showing an example of a cross-section of a display panel corresponding to the line I2-I2' of FIG. 12. FIG. 14 is a cross-sectional view showing in detail an example of area B of FIG. 13.

[0242] The embodiments of FIGS. 13 and 14 differ from the embodiments of FIGS. 6 and 7 in that each of the plurality of light-emitting elements (LE) is a vertical type micro LED extending in a third direction (DR3). A vertical type micro LED refers to an LED having a structure in which a first semiconductor layer (SEM1), an active layer (MQW), and a second semiconductor layer (SEM2) are sequentially arranged in a third direction (DR3) which is a vertical direction. Each of the plurality of light-emitting elements (LE) may have a cross-sectional shape with an inverse taper. For example, each of the plurality of light-emitting elements (LE) may have a trapezoidal cross-sectional shape in which the width of the top surface is wider than the width of the bottom surface. The shape of the light-emitting elements (LE) may vary depending on the embodiments. For example, each of the plurality of light-emitting elements (LE) may include a substantially vertical side. The light-emitting elements (LE) may be patterned through vertical etching and may have a rectangular or square cross-sectional shape in which the width of the top surface and the width of the bottom surface are substantially the same.

[0243] In the embodiments of FIGS. 13 and FIGS. 14, descriptions that overlap with the embodiments of FIGS. 6 to FIGS. 8 are omitted.

[0244] Referring to FIGS. 13 and 14, pixel electrodes (PXE1, PXE2, PXE3) can be placed on a second planarizing organic film (180).

[0245] A first reflective film (RF-P) may be disposed on each of the pixel electrodes (PXE1, PXE2, PXE3).

[0246] The first reflective film (RF-P) may include a metallic material with high reflectivity, such as aluminum (Al). The thickness of the reflective film (RF-P) may be approximately 0.1 μm.

[0247] A first organic layer (190) may be disposed on the pixel electrodes (PXE1, PXE2, PXE3). The first organic layer (190) may include an inclined portion (190-S) and an upper portion (190-T) extending from the inclined portion (190-S).

[0248] A first aperture region (OP-A) can be defined by an inclined portion (190-S). The first aperture region (OP-A1) may overlap with pixel electrodes (PXE1, PXE2, PXE3). Accordingly, at least a portion of the pixel electrodes (PXE1, PXE2, PXE3) may be exposed by the first aperture region (OP-A1). The area exposed by the first aperture region (OP-A1) may be larger than the area of ​​the light-emitting element (LE).

[0249] A first lower connecting electrode (BBE1) and a second lower connecting electrode (BBE2) may be disposed on the inclined portion (190-S) and upper portion (190-T) of the first organic layer (190).

[0250] The first lower connecting electrode (BBE1) and the second lower connecting electrode (BBE2) extend from one side of the inclined portion (190-S) to the upper surface of the first reflective film (RF-P). Accordingly, the first lower connecting electrode (BBE1) and the second lower connecting electrode (BBE2) are electrically connected to the first reflective film (RF-P).

[0251] A first protective layer (INS1) is disposed on the first organic layer (190) and the first opening region (OP-A). The first protective layer (INS1) covers both the first lower connecting electrode (BBE1) and the second lower connecting electrode (BBE2).

[0252] The upper part of the first organic layer (190) may be higher than the active layer (MQW) of the light-emitting element (LE) and lower than the upper part of the light-emitting element (LE).

[0253] A reflective layer (RF) is placed on the first protective layer (INS1) that overlaps with the inclined portion (190-S).

[0254] The reflective layer (RF) may be a closed-loop shape that is spaced apart from the light-emitting element (LE) and surrounds the side of the light-emitting element (LE). The reflective layer (RF) can reflect light traveling in a lateral direction from the light-emitting element (LE) and emit it to the upper surface of the light-emitting element (LE). Therefore, since the loss of light from the light-emitting element (LE) can be reduced, the light efficiency of the light-emitting element (LE) can be increased.

[0255] When the height of the first organic layer (190) is positioned higher than the active layer (MQW) of the light-emitting element (LE), the top of the reflective layer (RF) may be positioned higher than the active layer (MQW) of the light-emitting element (LE). The bottom of the reflective layer (RF) may be positioned lower than or equal to the light-emitting element (LE). The reflective layer (RF) may include a metal material with high reflectivity, such as aluminum (Al).

[0256] The slope (θ1) of the inclined portion (190-S) may be approximately 120° to 130°. The slope (θ1) of the inclined portion (190-S) may be defined by the first reflective film (RF-P) and the virtual plane (VS1) of the first organic layer (190) in contact with the first reflective film (RF-P). Since the reflective layer (RF) is disposed on the inclined portion (190-S), the reflective layer (RF) also has a slope (θ2) equal to the slope (θ1) of the inclined portion (190-S). Therefore, the slope (θ2) of the reflective layer (RF) may be approximately 120° to 130°. The greater the slope (θ2) of the reflective layer (RF), the greater the frontal light emission efficiency may be.

[0257] A second protective layer (INS2) is disposed on the first organic layer (190) and the reflective layer (RF). The second protective layer (INS2) can be disposed to cover the entire reflective layer (RF).

[0258] Accordingly, the reflective layer (RF) can be surrounded by a first protective layer (INS1) and a second protective layer (INS2). The reflective layer (RF) is electrically isolated from external components.

[0259] The first protective layer (INS1) and the second protective layer (INS2) are inorganic films, for example, silicon nitride (SiN x ), silicon nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ), or aluminum oxide (AlO x It can be formed as ).

[0260] A contact hole (INS-H) penetrating the first protective layer (INS1) and the second protective layer (INS2) is located in an area overlapping with the upper portion (190-T) of the first organic layer (190). At least a portion of the first lower connecting electrode (BBE1) and the second lower connecting electrode (BBE2) on the upper surface of the upper portion (190-T) of the first organic layer (190) is exposed by the contact hole (INS-H). The contact hole (INS-H) may have a planar shape such as a circle, an ellipse, or a polygon.

[0261] A second organic layer (210) may be disposed within the first aperture region (OP-A). The second organic layer (210) serves to temporarily fix or adhere an upper member (e.g., a light-emitting element (LE)). For example, the second organic layer (210) may be a film for temporarily adhering an upper member (e.g., a light-emitting element (LE)) onto each of the pixel electrodes (PXE1, PXE2, PXE3). To facilitate temporary adhesion, the thickness of the second organic layer (210) may be greater than the thickness of the pixel electrodes (PXE1, PXE2, PXE3) and greater than the thickness of the contact electrode (CTE). For example, the thickness of the second organic layer (210) may be 1.2 μm, but is not limited thereto.

[0262] Multiple light-emitting elements (LE) can be placed on the second organic layer (210).

[0263] Each of the plurality of light-emitting elements (LE) may have a length in the first direction (DR1), a length in the second direction (DR2), and a length in the third direction (DR3), each ranging from several to several hundred μm. For example, each of the plurality of light-emitting elements (LE) may have a length in the first direction (DR1), a length in the second direction (DR2), and a length in the third direction (DR3), each ranging from approximately 100 μm or less.

[0264] The light-emitting element (LE) may include a conductive layer (E1), a semiconductor stack (STC), a contact electrode (CTE), and a protective film (INS). The semiconductor stack (STC) may include a first semiconductor layer (SEM1), an active layer (MQW), and a second semiconductor layer (SEM2) arranged sequentially in a third direction (DR3).

[0265] Light extraction patterns (LEPs) can be formed on the upper surface of the semiconductor stack (STC). For example, light extraction patterns (LEPs) can be formed on the upper surface of the second semiconductor layer (SEM2).

[0266] Light extraction patterns (LEPs) may be patterns designed to increase the efficiency of light emitted from the upper surface of a light-emitting element (LE). Light extraction patterns (LEPs) may be concave patterns formed as hemispheres or semi-ellipses.

[0267] A protective film (INS) may be disposed on the side of the first semiconductor layer (SEM1), the side of the active layer (MQW), and the side of the second semiconductor layer (SEM2). The protective film (INS) may be a film for protecting the side of the light-emitting element (LE). The protective film (INS) may be formed of an inorganic film, for example, silicon nitride (SiNx), silicon nitride oxide (SiON), silicon oxide (SiOx), titanium oxide (TiOx), or aluminum oxide (AlOx).

[0268] The contact electrode (CTE) can be positioned outside the light-emitting element (LE) than the protective film (INS). The contact electrode (CTE) can be connected to the exposed conductive layer (E1) that is not covered by the protective film (INS).

[0269] When the contact electrode (CTE) is formed of a metal with high reflectivity, light traveling in the lateral direction of the light-emitting element (LE) among the light emitted from the active layer (MQW) of the light-emitting element (LE) can be reflected by the contact electrode (CTE) and emitted to the upper surface of the light-emitting element (LE). Therefore, since the loss of light from the light-emitting element (LE) can be reduced, the light efficiency of the light-emitting element (LE) can be increased.

[0270] The contact electrode (CTE) may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Specifically, to increase reflectivity, the contact electrode (CTE) may be formed as a two-layer structure of chromium (Cr) and gold (Au), a three-layer structure of titanium (Ti), aluminum (Al), and titanium (Ti), or a three-layer structure of ITO (Indium Tin Oxide), silver (Ag), and ITO (Indium Tin Oxide).

[0271] The first upper connecting electrode (UBE1) connects the first contact electrode (CTE1) and the first lower connecting electrode (BBE1). For example, the first upper connecting electrode (UBE1) can be connected to the first lower connecting electrode (BBE1) exposed through a contact hole (INS-H1) penetrating the protective layer (INS1, INS2). Additionally, the first upper connecting electrode (UBE1) can be placed on the upper surface of the second protective layer (INS2) and on the first contact electrode (CTE1).

[0272] The second upper connecting electrode (UBE2) connects the second contact electrode (CTE2) and the second lower connecting electrode (BBE2). For example, the second upper connecting electrode (UBE2) can be connected to the second lower connecting electrode (BBE2) exposed through a contact hole (INS-H2) penetrating the protective layer (INS1, INS2). Additionally, the second upper connecting electrode (UBE2) can be placed on the upper surface of the second protective layer (INS2) and on the second contact electrode (CTE2).

[0273] The third organic layer (211) may be arranged to cover a portion of the side of a plurality of light-emitting elements (LE). Additionally, the third organic layer (211) may be arranged to cover a first upper connecting electrode (UBE1) and a second upper connecting electrode (UBE2). The third organic layer (211) does not cover the upper surface of each of the plurality of light-emitting elements (LE). Therefore, the upper surface of each of the plurality of light-emitting elements (LE) may be exposed and not covered by the third organic layer (211).

[0274] The third organic layer (211) is a layer for flattening the step difference caused by a plurality of light-emitting elements (LE).

[0275] A common electrode (CE) may be disposed on the upper surface of each of the plurality of light-emitting elements (LE) and on the upper surface of the third organic layer (211). The common electrode (CE) may be a common layer formed in common on the first subpixel (SPX1), the second subpixel (SPX2), and the third subpixel (SPX3). The common electrode (CE) may be made of a transparent conductive material (TCO) such as Indium Tin Oxide (ITO) and Indium Zinc Oxide (IZO) that can transmit light.

[0276] The pixel electrodes (PXE1, PXE2, PXE3) are referred to as the anode electrode or the first electrode, and the common electrode (CE) may be referred to as the cathode electrode or the second electrode.

[0277] The device capping layer (CAP) can be placed on the common electrode (CE).

[0278] A light-blocking layer (BM), a first light-converting layer (QDL1), a second light-converting layer (QDL2), and a light-transmitting layer (TPL) may be disposed on the device capping layer (CAP).

[0279] FIG. 15 is a flowchart showing a method for manufacturing a display device according to one embodiment.

[0280] FIGS. 16 to 25 are exemplary drawings for explaining a method of manufacturing a display device according to one embodiment.

[0281] Hereinafter, a method for manufacturing a display device according to one embodiment is described in detail by combining FIG. 15 with FIG. 16 to 25. The method for manufacturing a display device described with reference to FIG. 16 to 25 may be a display device comprising a light-emitting element and a display panel described with reference to FIG. 5 to 7. FIG. 16 to 25 are cross-sectional views of a display panel corresponding to FIG. 7. In some drawings, a plan view corresponding to the cross-sectional view is also shown for convenience of explanation.

[0282] First, a pixel electrode (PXE), a common electrode (CE), and a reflective film (RF-P, RF-C) are formed on a circuit board (110). (S110 of FIG. 15)

[0283] Referring to FIG. 16, a conductive material layer and a reflective material layer are deposited entirely on a circuit board (110), a mask pattern is formed on the conductive material layer, and the conductive material layer not covered by the mask pattern is etched. Afterward, the mask pattern can be removed by an ashing process. In this way, a pixel electrode (PXE), a common electrode (CE), and reflective films (RF-P, RF-C) can be formed on the circuit board (110). Here, the circuit board (110) may include the thin film transistor layer (TFTL) of FIG. 6.

[0284] Secondly, a first organic layer (190) having a first opening region (OP-A) is formed (S120 of FIG. 15).

[0285] Referring to FIG. 17, the first organic layer (190) having a first opening region (OP-A) may be formed by an inkjet process using an organic material, but is not limited thereto. At least a portion of the first reflective film (RF-P) and the second reflective film (RF-C) may be exposed by the first opening region (OP-A).

[0286] Third, lower connecting electrodes (BBE1, BBE2), a first protective layer (INS1), a reflective layer (RF), and a second protective layer (INS2) are formed (S130 of FIG. 15).

[0287] Referring to FIG. 18, a conductive material layer is deposited on the front surface of a circuit board (110) and patterned using a mask to form a first lower connecting electrode (BBE1) and a second lower connecting electrode (BBE2). The first lower connecting electrode (BBE1) is placed on the first organic layer (190) and the first reflective film (RF-P) and overlaps with the pixel electrode (PXE). The second lower connecting electrode (BBE2) is placed on the first organic layer (190) and the second reflective film (RF-C) and overlaps with the common electrode (CE). The first lower connecting electrode (BBE1) and the second lower connecting electrode (BBE2) are spaced apart from each other.

[0288] Referring to FIG. 19, a protective material layer is deposited on the front surface of a circuit board (110) to form a first protective layer (INS1).

[0289] Then, referring to FIG. 20, a reflective layer (RF) is formed overlapping the inclined portion (190-S) of the first organic layer (190).

[0290] After depositing a reflective material layer over the entire circuit board, a reflective layer (RF) is formed by patterning using a mask.

[0291] Referring to FIG. 21, the second protective layer (INS2) can be formed to cover the reflective layer (RF). The reflective layer (RF) can be surrounded by the first protective layer (INS1) and the second protective layer (INS2).

[0292] Referring to FIG. 22, a contact hole (INS-H) is formed that exposes lower connecting electrodes (BBE1, BBE2) by penetrating the second protective layer (INS2) and the first protective layer (INS1) that overlap the inclined portion (190-S).

[0293] Fourth, a second organic layer (210) is formed, and a light-emitting element (LE) is placed on the second organic layer (210). (S140 of FIG. 15)

[0294] Light-emitting diodes (LEs) can be grown on a semiconductor substrate. The semiconductor substrate can be a silicon wafer substrate or a sapphire substrate.

[0295] A plurality of semiconductor layers can be formed on a semiconductor substrate through an epitaxial growth process. As an epitaxial growth process, electron beam deposition, physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma laser deposition (PLD), dual-type thermal evaporation, sputtering, metal-organic chemical vapor deposition (MOCVD), etc., may be used. Preferably, metal-organic chemical vapor deposition (MOCVD) may be used, but the embodiments of this specification are not limited thereto. A plurality of semiconductor layers may include a first semiconductor layer (SEM1), an active layer (MQW), and a second semiconductor layer (SEM2).

[0296] After forming a semiconductor layer, a conductive layer and a contact electrode can be formed on the semiconductor layer.

[0297] In FIG. 23, a second organic layer (210) is formed in a first opening region (OP-A) defined by a first organic layer (190). Subsequently, light-emitting elements (LE) can be transferred onto the second organic layer (210).

[0298] At this time, the light-emitting elements (LE) can be temporarily fixed by being embedded in the second organic layer (210). Although the first contact electrode (CTE1) and the second contact electrode (CTE2) of each of the light-emitting elements (LE) are exemplified as being disposed on the second organic layer (210), the embodiments of this specification are not limited thereto. In one example, the second organic layer (210) may be disposed on the lower surface and part of the side of the first contact electrode (CTE1) of each of the light-emitting elements (LE) and on the lower surface and part of the side of the second contact electrode (CTE2). Alternatively, the second organic layer (210) may be disposed on the sides of the conductive layer (E1) of each of the light-emitting elements (LE). Alternatively, the second organic layer (210) may be disposed on the sides of the first semiconductor layer (SEM1), the sides of the active layer (MQW), and the sides of the second semiconductor layer (SEM2) of each of the light-emitting elements (LE). In this case, the second organic layer (210) may be disposed on a part of each of the sides of the second semiconductor layer (SEM2).

[0299] If the fluidity of the second organic layer (210) is low or the second organic layer (210) is hard, the depth to which the light-emitting element (LE) is inserted or embedded in the second organic layer (210) is very small, or the light-emitting element (LE) may not be inserted or embedded in the second organic layer (210) but may be placed on the second organic layer (210).

[0300] When the second organic layer (210) is a photosensitive organic film such as a photoresist, the second organic layer (210) is soft-baked at a first temperature, and then at least one portion of each of the plurality of light-emitting elements (LE) is inserted into the second organic layer (210). Then, the second organic layer (210) can be completely cured at a second temperature higher than the first temperature. The first temperature may be approximately 100 degrees and the second temperature may be approximately 230 degrees, but the embodiments of this specification are not limited thereto. Additionally, the process of completely curing the second organic layer (210) at the second temperature may be carried out for approximately 30 minutes.

[0301] Fifth, upper connecting electrodes (UBE1, UBE2) are formed (S150 in FIG. 15).

[0302] Referring to FIG. 24, first upper connecting electrodes (UBE1) for connecting the first contact electrode (CTE1) and the pixel electrode (PXE) of the light-emitting element (LE) disposed on the second organic layer (210) and second upper connecting electrodes (UBE2) for connecting the second contact electrode (CTE2) and the common electrode (PXE) are formed.

[0303] For example, a first upper connecting electrode (UBE1) covers the first contact electrode (CTE1) of the light-emitting element (LE) and extends along the second protective layer (INS2) to be connected to the first lower connecting electrode (BBE1) exposed through the contact hole (INS-H). A second upper connecting electrode (UBE2) covers the second contact electrode (CTE2) of the light-emitting element (LE) and extends along the second protective layer (INS2) to be connected to the second lower connecting electrode (BBE2) exposed through the contact hole (INS-H). Thus, the first contact electrode (CTE1) of the light-emitting element (LE) is connected to the pixel electrode (PXE), and the second contact electrode (CTE2) is electrically connected to the common electrode (CE).

[0304] Sixth, a third organic layer (211) is formed (S160 of FIG. 15).

[0305] Referring to FIG. 25, a third organic layer (211) is formed to fix the light-emitting elements (LE) and flatten the step difference caused by the light-emitting elements (LE).

[0306] Subsequently, a light-blocking layer, a wavelength conversion layer, a light-transmitting layer, and a color filter layer are sequentially formed as shown in FIG. 7.

[0307] FIG. 26 is an example drawing showing a smart watch including a display device according to one embodiment.

[0308] Referring to FIG. 26, a display device (10_1) according to one embodiment can be applied to a smart watch (1000_1), which is one of the smart devices.

[0309] FIGS. 27 and FIGS. 28 are exemplary drawings showing a virtual reality device including a display device according to one embodiment.

[0310] Referring to FIGS. 27 and 28, a head-mounted display device (1000_2) according to one embodiment includes a first display device (10_2), a second display device (10_3), a display device storage unit (1100), a storage unit cover (1200), a first eyepiece (1210), a second eyepiece (1220), a head-mounted band (1300), a middle frame (1400), a first optical member (1510), a second optical member (1520), and a control circuit board (1600).

[0311] The first display device (10_2) provides an image to the user's left eye, and the second display device (10_3) provides an image to the user's right eye. Since each of the first display device (10_2) and the second display device (10_3) is substantially the same as the display device (10) described in conjunction with FIG. 1 and FIG. 2, the description of the first display device (10_2) and the second display device (10_3) is omitted.

[0312] The first optical member (1510) may be positioned between the first display device (10_2) and the first eyepiece (1210). The second optical member (1520) may be positioned between the second display device (10_3) and the second eyepiece (1220). Each of the first optical member (1510) and the second optical member (1520) may include at least one convex lens.

[0313] The middle frame (1400) is positioned between the first display device (10_2) and the control circuit board (1600), and may be positioned between the second display device (10_3) and the control circuit board (1600). The middle frame (1400) serves to support and fix the first display device (10_2), the second display device (10_3), and the control circuit board (1600).

[0314] The control circuit board (1600) may be placed between the middle frame (1400) and the display device housing (1100). The control circuit board (1600) may be connected to the first display device (10_2) and the second display device (10_3) through a connector. The control circuit board (1600) may convert an image source input from the outside into digital video data (DATA) and transmit the digital video data (DATA) to the first display device (10_2) and the second display device (10_3) through the connector.

[0315] The control circuit board (1600) can transmit digital video data (DATA) corresponding to a left-eye image optimized for the user's left eye to the first display device (10_2) and digital video data (DATA) corresponding to a right-eye image optimized for the user's right eye to the second display device (10_3). Alternatively, the control circuit board (1600) can transmit the same digital video data (DATA) to the first display device (10_2) and the second display device (10_3).

[0316] The display device housing (1100) serves to house the first display device (10_2), the second display device (10_3), the middle frame (1400), the first optical member (1510), the second optical member (1520), and the control circuit board (1600). The housing cover (1200) is positioned to cover an open side of the display device housing (1100). The housing cover (1200) may include a first eyepiece (1210) in which the user's left eye is positioned and a second eyepiece (1220) in which the user's right eye is positioned. Although FIGS. 27 and 28 illustrate the first eyepiece (1210) and the second eyepiece (1220) being positioned separately, the embodiments of this specification are not limited thereto. The first eyepiece (1210) and the second eyepiece (1220) may be combined into one.

[0317] The first eyepiece (1210) is aligned with the first display device (10_2) and the first optical member (1510), and the second eyepiece (1220) can be aligned with the second display device (10_3) and the second optical member (1520). Accordingly, the user can view an image of the first display device (10_2) magnified into a virtual image by the first optical member (1510) through the first eyepiece (1210), and can view an image of the second display device (10_3) magnified into a virtual image by the second optical member (1520) through the second eyepiece (1220).

[0318] The head mounting band (1300) serves to secure the display device storage unit (1100) to the user's head so that the first eyepiece (1210) and the second eyepiece (1220) of the storage unit cover (1200) can be maintained in a state where they are positioned on the user's left and right eyes, respectively. When the display device storage unit (1200) is implemented as a lightweight and compact unit, the head-mounted display device (1000) may be equipped with an eyeglass frame as shown in FIG. 29 instead of the head mounting band (1300).

[0319] In addition, the head-mounted display device (1000) may further be equipped with a battery for supplying power, an external memory slot for storing external memory, an external connection port for receiving video sources, and a wireless communication module. The external connection port may be a USB (universe serial bus) terminal, a display port, or an HDMI (high-definition multimedia interface) terminal, and the wireless communication module may be a 5G communication module, a 4G communication module, a Wi-Fi module, or a Bluetooth module.

[0320] FIG. 29 is an exemplary drawing showing a virtual reality device including a display device according to another embodiment. FIG. 29 shows a virtual reality device (1000_3) to which a display device (10_4) according to one embodiment is applied.

[0321] Referring to FIG. 29, a virtual reality device (1000_3) according to one embodiment may be a device in the form of glasses. A virtual reality device (1000_3) according to one embodiment may have a display device (10_4), a left eye lens (10a), a right eye lens (10b), a support frame (20), eyeglass frame legs (30a, 30b), a reflective member (40), and a display device housing (50).

[0322] FIG. 29 illustrates a virtual reality device (1000_3) that is an eyeglass-type display device including eyeglass frame temples (30a, 30b). That is, the virtual reality device (1000_3) according to one embodiment is not limited to that shown in FIG. 29 and can be applied in various forms in various other electronic devices.

[0323] The display device housing (50) may include a display device (10_4) and a reflective member (40). An image displayed on the display device (10_4) may be reflected from the reflective member (40) and provided to the user's right eye through the right eye lens (10b). As a result, the user can view the virtual reality image displayed on the display device (10_4) through their right eye.

[0324] FIG. 29 illustrates that the display device housing (50) is positioned at the right end of the support frame (20), but the embodiments of this specification are not limited thereto. For example, the display device housing (50) may be positioned at the left end of the support frame (20), in which case the image displayed on the display device (10_4) may be reflected from the reflective member (40) and provided to the user's left eye through the left eye lens (10a). As a result, the user can view the virtual reality image displayed on the display device (10_4) through the left eye. Alternatively, the display device housing (50) may be positioned at both the left end and the right end of the support frame (20), in which case the user can view the virtual reality image displayed on the display device (10_4) through both the left eye and the right eye.

[0325] FIG. 30 is an exemplary drawing showing an automobile instrument panel and a center fascia including display devices according to one embodiment. FIG. 30 shows an automobile with display devices (10_a, 10_b, 10_c, 10_d, 10_e) according to one embodiment applied.

[0326] Referring to FIG. 30, display devices (10_a, 10_b, 10_c) according to one embodiment may be applied to an instrument panel of a vehicle, to a center fascia of a vehicle, or to a Center Information Display (CID) placed on the dashboard of a vehicle. Additionally, display devices (10_d, 10_e) according to one embodiment may be applied to a room mirror display that replaces a side mirror of a vehicle.

[0327] FIG. 31 is an exemplary drawing showing a transparent display device including a display device according to one embodiment.

[0328] Referring to FIG. 31, a display device (10_5) according to one embodiment can be applied to a transparent display device. The transparent display device can display an image (IM) and transmit light simultaneously. Therefore, a user located in front of the transparent display device can not only view the image (IM) displayed on the display device (10_5) but also see an object (RS) or background located on the back of the transparent display device. When the display device (10_5) is applied to a transparent display device, the substrate of the display device (10_5) may include a light-transmitting portion capable of transmitting light or be formed of a material capable of transmitting light.

[0329] Although embodiments of the present invention have been described above with reference to the attached drawings, those skilled in the art will understand that the present invention may be implemented in other specific forms without changing the technical concept or essential features thereof. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive.

Claims

1. Substrate; Pixel electrodes and common electrodes disposed on the above substrate; A first organic layer disposed on the pixel electrode and the common electrode and having a first opening region; A first lower connecting electrode disposed on the first organic layer and electrically connected to the pixel electrode, and a second lower connecting electrode electrically connected to the common electrode on the first organic layer; A first protective layer covering the first lower connecting electrode and the second lower connecting electrode; A reflective layer disposed on the first protective layer and overlapping with the inclined surface of the first organic layer; A second protective layer covering the above-mentioned reflective layer; A second organic layer disposed in the first opening region; A light-emitting element disposed on the second organic layer and comprising a semiconductor stack, a first contact electrode and a second contact electrode; and A display device comprising a first upper connecting electrode connecting the first contact electrode of the light-emitting element and the first lower connecting electrode, and a second upper connecting electrode connecting the second contact electrode and the second lower connecting electrode.

2. In Paragraph 1, The above reflective layer is a display device surrounding the light-emitting element.

3. In Paragraph 2, A display device in which one end of the above-mentioned reflective layer is positioned further below the lower part of the above-mentioned light-emitting element.

4. In Paragraph 1, A display device in which a portion of the above-mentioned reflective layer overlaps with the above-mentioned second organic layer.

5. In Paragraph 1, A display device in which the upper part of the above-mentioned reflective layer is positioned higher than the active layer of the above-mentioned light-emitting element.

6. In Paragraph 1, A display device further comprising a first reflective film disposed on the pixel electrode and a second reflective film disposed on the common electrode.

7. In Paragraph 6, The first lower connecting electrode extends from the first organic layer to the upper surface of the first reflective film, and The second lower connecting electrode is a display device extending from the first organic layer to the upper surface of the second reflective film.

8. In Paragraph 6, The first protective layer and the second protective layer have a first contact hole exposing the first lower connecting electrode on the upper surface of the first organic layer and a second contact hole exposing the second lower connecting electrode on the upper surface of the first organic layer, The first upper connecting electrode contacts the first lower connecting electrode through the first contact hole. The second upper connecting electrode is a display device that contacts the second lower connecting electrode through the second contact hole.

9. In Paragraph 1, The above light-emitting element A conductive layer disposed between the organic layer and the semiconductor stack; and It further includes a protective film disposed on one side and sides of the conductive layer and on the sides of the semiconductor stack, and A display device wherein the first contact electrode is disposed on the protective film and connected to the conductive layer exposed without being covered by the protective film, and the second contact electrode is disposed on the protective film and disposed in a hole penetrating the conductive layer and a part of the semiconductor stack.

10. In Paragraph 9, The above semiconductor stack includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked in order, A display device wherein the first contact electrode and the second contact electrode are disposed on the entire side surface of the conductive layer and the first semiconductor layer and the entire side surface of the active layer, and disposed on a part of the side surface of the second semiconductor layer.

11. In Paragraph 10, The first contact electrode and the second contact electrode are a display device in contact with the first protective layer.

12. Substrate; Pixel electrodes and common electrodes disposed on the above substrate; A first reflective film disposed on the pixel electrode and a second reflective film disposed on the common electrode; A first organic layer disposed on the pixel electrode and the common electrode and having a first opening region; A first protective layer disposed on the first organic layer; A reflective layer disposed on the first protective layer and overlapping with the inclined surface of the first organic layer; A second protective layer covering the above-mentioned reflective layer; A second organic layer disposed in the first opening region; A light-emitting element disposed on the second organic layer and comprising a semiconductor stack, a first contact electrode and a second contact electrode; and It includes a first upper connecting electrode connecting the first contact electrode of the light-emitting element and the pixel electrode, and a second upper connecting electrode connecting the second contact electrode and the common electrode. The first protective layer and the second protective layer have a first contact hole exposing the first reflective film on the upper surface of the first organic layer and a second contact hole exposing the common electrode on the upper surface of the first organic layer, A display device in which the first upper connecting electrode contacts the first reflective film through the first contact hole, and the second upper connecting electrode contacts the second reflective film through the second contact hole.

13. Substrate; Pixel electrodes disposed on the above substrate; A first organic layer disposed on the pixel electrode and having a first opening region; A first lower connecting electrode and a second lower connecting electrode disposed on the first organic layer and electrically connected to the pixel electrode; A first protective layer covering the first lower connecting electrode and the second lower connecting electrode; A reflective layer disposed on the first protective layer and overlapping with the inclined surface of the first organic layer; A second protective layer covering the above-mentioned reflective layer; A second organic layer disposed in the first opening region; A light-emitting element disposed on the second organic layer and including a contact electrode; A first upper connecting electrode and a second upper connecting electrode connecting the contact electrode of the light-emitting element and the first lower connecting electrode and the second lower connecting electrode; and A display device comprising a common electrode disposed on top of the light-emitting element.

14. In Paragraph 13, A display device comprising a reflective film disposed on the pixel electrode.

15. In Paragraph 14, The first lower connecting electrode and the second lower connecting electrode are a display device extending to the upper surface of the reflective film on the first organic layer.

16. In Paragraph 15, The first protective layer and the second protective layer have a contact hole that exposes the first lower connecting electrode on the upper surface of the first organic layer, and The first upper connecting electrode is a display device that contacts the first lower connecting electrode through the first contact hole.

17. A step of forming a pixel electrode and a common electrode on a circuit board, and forming a first reflective film on the pixel electrode and a second reflective film on the common electrode; A step of forming a first organic layer disposed on the pixel electrode and the common electrode and having a first opening region; A step of forming a first lower connecting electrode disposed on the first organic layer and electrically connected to the pixel electrode, and a second lower connecting electrode electrically connected to the common electrode on the first organic layer; A step of forming a first protective layer covering the first lower connecting electrode and the second lower connecting electrode, a reflective layer disposed on the first protective layer and overlapping with the inclined surface of the first organic layer, and a second protective layer covering the reflective layer; A step of forming a second organic layer in the first opening region and placing a light-emitting element on the second organic layer; and A method for manufacturing a display device comprising the step of forming a first upper connecting electrode connecting the first contact electrode of the light-emitting element and the first lower connecting electrode, and a second upper connecting electrode connecting the second contact electrode and the second lower connecting electrode.

18. In Paragraph 17, In the step of forming the second protective layer, A method for manufacturing a display device that forms a contact hole through which a lower connecting electrode is exposed by penetrating the first protective layer and the second protective layer.

19. In Paragraph 18, In the step of forming a first upper connecting electrode connecting the first contact electrode of the light-emitting element and the first lower connecting electrode, and a second upper connecting electrode connecting the second contact electrode and the second lower connecting electrode, A method for manufacturing a display device in which the first upper connecting electrode contacts the first lower connecting electrode through the contact hole.

20. Includes a display device for displaying images, The above display device is, Substrate; Pixel electrodes and common electrodes disposed on the above substrate; A first organic layer disposed on the pixel electrode and the common electrode and having a first opening region; A first lower connecting electrode disposed on the first organic layer and electrically connected to the pixel electrode, and a second lower connecting electrode electrically connected to the common electrode on the first organic layer; A first protective layer covering the first lower connecting electrode and the second lower connecting electrode; A reflective layer disposed on the first protective layer and overlapping with the inclined surface of the first organic layer; A second protective layer covering the above-mentioned reflective layer; A second organic layer disposed in the first opening region; A light-emitting element disposed on the second organic layer and comprising a first contact electrode and a second contact electrode; and An electronic device comprising a first upper connecting electrode connecting the first contact electrode of the light-emitting element and the first lower connecting electrode, and a second upper connecting electrode connecting the second contact electrode and the second lower connecting electrode.

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