Rapid analysis method and apparatus for power integrity based on grid cutting

Abstract

The present invention provides a rapid analysis method and apparatus for power integrity based on Grid cutting. The method comprises: determining a target network; adding ports on the target network; performing Grid cutting on the target network; respectively extracting S-parameters of a layout after the cutting; cascading sub-modules to obtain final S-parameters. In the present invention, the integrity of a power network can be quickly and accurately analyzed, so as to improve the analysis efficiency and reduce costs.

Description

A rapid power integrity analysis method and apparatus based on grid cutting Technical Field

[0001] This invention relates to the field of power integrity analysis, and more specifically, to a method and apparatus for rapid power integrity analysis based on grid cutting. Background Technology

[0002] In the field of power integrity analysis, traditional methods often require detailed simulations and calculations of the entire power network, which is not only time-consuming but also computationally expensive. As the complexity of electronic devices increases, the scale and complexity of power networks also grow, making traditional methods inadequate for handling large-scale power networks. Existing technologies often require significant computational resources and time to handle large-scale networks, limiting their feasibility in practical engineering applications. Furthermore, traditional methods struggle to guarantee the accuracy of analysis results when dealing with complex networks, especially those with complex structures or a large number of ports.

[0003] In the process of implementing the embodiments of the present invention, the inventors have discovered that the prior art has at least the following problems or defects: the existing power integrity analysis methods are inefficient when dealing with large-scale and complex networks, and it is difficult to guarantee the accuracy of the analysis results. This has resulted in the failure to meet the demand for fast, efficient and accurate analysis methods in practical applications. Summary of the Invention

[0004] This invention provides a method and apparatus for rapid power integrity analysis based on grid cutting.

[0005] In a first aspect of the present invention, a method for rapid power integrity analysis based on grid segmentation is provided, comprising:

[0006] Determine the target network;

[0007] Add a port to the target network;

[0008] Perform grid segmentation on the target network;

[0009] Extract the S-parameters of the cut layouts respectively;

[0010] The final S-parameters are obtained by cascading the sub-modules.

[0011] Furthermore, the Grid cutting includes at least one of the following:

[0012] Get the row and column parameters of the external Grid;

[0013] Extract the entire rectangular area;

[0014] The entire page was initially divided into rows and columns;

[0015] Extract port locations and avoid those ports;

[0016] Extract via information from pads on the cutting boundary;

[0017] Determine the sub-mesh to which the pad via on the boundary belongs based on the density size;

[0018] Remove floating isolated graphics;

[0019] Add a port at the cut point;

[0020] Complete the grid cutting.

[0021] Further, the extraction of the S-parameters of the cut layout includes:

[0022] After completing the Grid cutting, extract the S-parameters of each sub-module;

[0023] The S-parameters are cascaded to obtain the final S-parameters.

[0024] Furthermore, the cascaded S-parameters include:

[0025] Based on the interconnection relationship between submodules, cascade the S-parameters of each submodule;

[0026] By cascading operations, the S-parameters of sub-modules are merged to obtain the S-parameters of the entire network.

[0027] Furthermore, the step of cascading the S-parameters of each submodule according to their interconnection relationships includes:

[0028] Determine the connection ports between submodules;

[0029] Based on the port connection relationships, establish a cascading model between submodules;

[0030] The S-parameters of submodules are calculated and merged using a cascaded model.

[0031] Furthermore, after calculating and merging the S-parameters of the sub-modules through the cascaded model, the process also includes:

[0032] Verify the accuracy of the merged S-parameters;

[0033] If necessary, adjust the S-parameters of the submodules or re-perform the cascading operation to improve the accuracy of the analysis.

[0034] Furthermore, before extracting the S-parameters of the cut layout, the following steps are also included:

[0035] Obtain sample data associated with the target network;

[0036] Based on the sample data, the analysis method was fine-tuned to improve the accuracy of the analysis.

[0037] Furthermore, the grid segmentation of the target network includes:

[0038] Determine the boundaries and internal structure of the target network;

[0039] Design a grid segmentation scheme based on the complexity of the network and the distribution of ports;

[0040] Perform Grid cutting to divide the target network into multiple sub-modules.

[0041] In a second aspect of the invention, a power integrity analysis apparatus is provided, comprising:

[0042] The first determining module is used to determine the target network;

[0043] The second determining module is used to add ports on the target network;

[0044] The cutting module is used to cut the target network into grids.

[0045] The extraction module is used to extract the S-parameters of the cut layout separately;

[0046] Cascade modules are used to cascade various sub-modules to obtain the final S-parameters.

[0047] Furthermore, the cutting module includes at least one of the following:

[0048] The Grid parameter retrieval unit is used to retrieve the row and column parameters of the external Grid.

[0049] The region extraction unit is used to extract rectangular regions from the entire page.

[0050] Divide into units, used to initially divide the entire page into rows and columns;

[0051] The port extraction unit is used to extract port locations and avoid ports.

[0052] The pad via information extraction unit is used to extract pad via information on the cutting boundary;

[0053] Submesh determination cells are used to determine the submesh to which pads and vias belong on the boundary based on the density size.

[0054] The graphic removal unit is used to remove floating, isolated graphics.

[0055] Port addition unit, used to add ports at the cut point;

[0056] The cut completion unit is used to complete the grid cutting.

[0057] The embodiments of the present invention have at least the following beneficial effects: The grid-based power integrity rapid analysis method can significantly improve the efficiency of power network analysis. By dividing the target network into multiple sub-modules and extracting the S-parameters of each sub-module, and then merging these parameters through cascading operations to obtain the S-parameters of the entire network, this method can greatly reduce the computational load and the required time. Furthermore, this method can perform rapid analysis of power networks without sacrificing analysis accuracy, enabling the rapid identification and correction of potential power integrity problems during the design phase.

[0058] Furthermore, the design of this power integrity analysis device automates the analysis process, reducing manual intervention and the possibility of human error. The various modules within the device work collaboratively, from determining the target network to obtaining the S-parameters through cascading submodules, the entire process can be completed efficiently and accurately. This approach provides strong support for the design and verification of power networks, especially in situations requiring rapid iteration and design optimization, significantly improving work efficiency and design quality. Attached Figure Description

[0059] The above and other objects, features, and advantages of exemplary embodiments of the present invention will become readily apparent from the following detailed description taken in conjunction with the accompanying drawings. Several embodiments of the invention are illustrated in the drawings by way of example and not limitation, wherein:

[0060] Figure 1 is a flowchart illustrating a fast power integrity analysis method based on grid cutting according to an embodiment of the present invention;

[0061] Figure 2 is a schematic diagram of the power integrity analysis device provided in an embodiment of the present invention;

[0062] Figure 3 schematically illustrates the structure of an electronic device according to an embodiment of the present invention. Detailed Implementation

[0063] The principles and spirit of the invention will now be described with reference to several exemplary embodiments. It should be understood that these embodiments are provided merely to enable those skilled in the art to better understand and implement the invention, and are not intended to limit the scope of the invention in any way. Rather, these embodiments are provided to make the invention more thorough and complete, and to fully convey the scope of the invention to those skilled in the art.

[0064] Those skilled in the art will understand that embodiments of the present invention can be implemented as a system, apparatus, device, method, or computer program product. Therefore, the present invention can be specifically implemented in the following forms: entirely hardware, entirely software (including firmware, resident software, microcode, etc.), or a combination of hardware and software.

[0065] It should be noted that the number of any elements in the accompanying drawings is for illustrative purposes only and not as a limitation, and any naming is for distinction only and has no limiting meaning.

[0066] Referring to Figure 1 below, Figure 1 is a flowchart illustrating a fast power integrity analysis method based on grid cutting according to an embodiment of the present invention. As shown in Figure 1, a fast power integrity analysis method 100 based on grid cutting includes:

[0067] Determine the target network;

[0068] Add a port to the target network;

[0069] Perform grid segmentation on the target network;

[0070] Extract the S-parameters of the cut layouts respectively;

[0071] The final S-parameters are obtained by cascading the sub-modules.

[0072] It's important to note that the first step in this method is identifying the target network, which refers to the specific circuit network that needs to be analyzed during power integrity analysis. The target network can be a power distribution network on a circuit board or a power network within an integrated circuit. Identifying the target network requires recognizing all components and connections within the network for subsequent analysis and processing. This step is fundamental to the entire analysis method, as it determines the accuracy and effectiveness of the subsequent analysis.

[0073] Specifically, determining the target network involves a detailed analysis of the circuit design, including identifying components such as power lines, ground lines, decoupling capacitors, inductors, and resistors in the power network. The parameters of these components, such as resistance, capacitance, and inductance values, need to be accurately measured or estimated.

[0074] In addition, it is necessary to identify the connection points in the network, including pads, vias, and connectors, as these connection points will play a crucial role in subsequent grid cutting. In practice, circuit simulation software can be used to assist in this step, as the software can automatically read the design file and extract the required network information.

[0075] Preferably, the process of determining the target network can be further refined. For example, machine learning algorithms can be used to automatically identify and classify components and connection points in the network, improving the accuracy and efficiency of identification.

[0076] Furthermore, the method for extracting component parameters can be optimized based on the network's operating frequency and application scenario. For example, in high-frequency applications, more precise measurement equipment may be needed to obtain component parameters to ensure the accuracy of the analysis results. In low-frequency applications, simplified models can be used to approximate the component's behavior to improve analysis efficiency.

[0077] More specifically, the process of identifying the target network can also include analyzing its topology. This involves identifying branches, loops, and key nodes in the network, as well as the connections between them. By analyzing the network's topology, we can better understand its behavior and provide guidance for subsequent grid segmentation. For example, the network's topology can be used to determine which areas require finer grid divisions and which areas can be divided more coarsely.

[0078] In addition, the process of determining the target network may also include analyzing the network's physical layout. This involves identifying the network's physical location on the circuit board, including the placement of components and the routing of interconnects.

[0079] Furthermore, analyzing the physical layout allows for a better understanding of the network's electromagnetic properties and provides a reference for subsequent grid segmentation. For example, the physical layout can be used to determine which areas may experience electromagnetic interference, thus requiring finer grid divisions to capture this interference.

[0080] Finally, the process of identifying the target network may also include analyzing the network's operating conditions. This involves identifying the network's behavior under different operating conditions, including load variations, temperature variations, and power supply variations.

[0081] Furthermore, analyzing operating conditions allows for a better understanding of the network's behavior in practical applications, providing a basis for subsequent grid segmentation. For example, operating conditions can be used to determine which areas might exhibit anomalies under certain conditions, thus requiring finer grid divisions to analyze these anomalies.

[0082] In some embodiments, the Grid cutting includes at least one of the following:

[0083] Get the row and column parameters of the external Grid;

[0084] Extract the entire rectangular area;

[0085] The entire page was initially divided into rows and columns;

[0086] Extract port locations and avoid those ports;

[0087] Extract via information from pads on the cutting boundary;

[0088] Determine the sub-mesh to which the pad via on the boundary belongs based on the density size;

[0089] Remove floating isolated graphics;

[0090] Add a port at the cut point;

[0091] Complete the grid cutting.

[0092] It should be noted that the grid cutting step in this method involves a series of specific operations designed to divide the target network into smaller, more manageable sub-modules. Grid cutting is a technique for dividing a circuit layout into small, grid-like regions for more detailed analysis. This step is crucial for subsequent S-parameter extraction and cascading, as it directly impacts the accuracy and efficiency of the analysis.

[0093] Specifically, the Grid cutting step includes obtaining the row and column parameters of the external Grid, which involves determining the size and spacing of the Grid. These parameters can be set according to the characteristics and design requirements of the circuit; for example, for high-frequency circuits, a finer Grid may be needed to capture subtle signal changes. Extracting the entire rectangular area of ​​the layout refers to determining the overall boundary of the circuit layout. This is usually done using automated tools that can identify all components and connections in the layout and determine the layout boundaries accordingly.

[0094] More specifically, the initial division of the entire layout into rows and columns involves dividing the layout into small, grid-like areas based on the set Grid parameters. Port location extraction and avoidance refers to identifying and preserving port locations during Grid cutting to ensure they are not incorrectly cut. Extracting pad and via information on the cutting boundaries involves identifying pads and vias on the Grid boundaries; these components connect different parts of the circuit and therefore require special attention during cutting.

[0095] Furthermore, determining the sub-mesh to which pads and vias belong on the boundary based on density refers to assigning them to the corresponding sub-mesh according to their distribution density. Removing floating isolated graphics means deleting isolated parts that are not connected to any other graphics, as these parts may affect the accuracy of the analysis. Adding ports at the cut points ensures that each submodule can be analyzed independently; adding ports simulates actual connection conditions. Completing the grid cut involves finalizing all cut operations to ensure that each submodule has been correctly segmented.

[0096] Preferably, the Grid cutting step can be further refined. For example, when obtaining the row and column parameters of the external Grid, an adaptive algorithm can be used to dynamically adjust the size of the Grid to adapt to the characteristics of different circuits. When extracting the entire rectangular area, image recognition technology can be used to improve the accuracy of recognition.

[0097] Furthermore, when initially dividing the entire layout into rows and columns, a multi-level cutting strategy can be adopted, starting with a coarse cut and then gradually refining it. When extracting port locations and avoiding ports, specific rules can be set to prioritize protecting critical ports from being cut. When extracting pad and via information on the cutting boundaries, machine learning algorithms can be used to automatically identify the positions of pads and vias. When determining the sub-grid to which pads and vias belong on the boundary based on density size, a density threshold can be introduced to automatically determine the affiliation of pads and vias.

[0098] Specifically, when removing floating isolated graphics, a threshold can be set to determine which graphics are truly isolated, thus avoiding incorrect removal. When adding ports at the cut points, automated scripts can be used to quickly add ports, improving efficiency. After completing the grid cutting, a comprehensive check can be performed to ensure that all sub-modules meet the analysis requirements.

[0099] More specifically, the Grid cutting step can also include optimizing the cut sub-modules. For example, the shape of the sub-modules can be adjusted to reduce the computational load during analysis. The boundaries of the sub-modules can be smoothed to reduce errors caused by boundary irregularities.

[0100] Furthermore, pre-analysis of submodules can be performed to identify which submodules may have problems, allowing for greater attention in subsequent analyses. These optimization measures can further improve the efficiency and accuracy of the analysis.

[0101] In some embodiments, extracting the S-parameters of the cut layout includes:

[0102] After completing the Grid cutting, extract the S-parameters of each sub-module;

[0103] The S-parameters are cascaded to obtain the final S-parameters.

[0104] It should be noted that extracting the S-parameters of the cut layout is a crucial step in power integrity analysis. S-parameters, or scattering parameters, are parameters used to describe the signal transmission characteristics of a circuit network between different ports.

[0105] In this step, the S-parameters of each sub-module obtained by grid cutting need to be extracted individually for subsequent cascade analysis. This process involves measuring or simulating the electromagnetic behavior of each sub-module to obtain its transmission and reflection characteristics at different frequencies.

[0106] Specifically, the process of extracting S-parameters from submodules first requires determining the test ports for each submodule. These ports can be physical connection points or virtual ports in the simulation model. Next, it is necessary to select appropriate test frequency ranges and frequency points, which typically depend on the circuit's operating frequency and design requirements. For example, for an RF circuit operating at the GHz level, testing may need to be performed within a range of tens of GHz.

[0107] Then, each submodule is tested using a network analyzer or circuit simulation software, and its S-parameters at different frequencies are recorded. These parameters include S11 (reflection coefficient), S21 (forward gain), S12 (reverse gain), and S22 (reverse reflection coefficient). During the testing process, it is necessary to ensure the stability and accuracy of the test signal to guarantee the reliability of the S-parameters.

[0108] Preferably, the process of extracting S-parameters can be further refined. For example, when determining the test ports, the physical layout and electrical characteristics of the submodules can be considered, and the most representative ports can be selected for testing.

[0109] Furthermore, when setting the test frequency range, an adaptive algorithm can be used to dynamically adjust the frequency points according to the characteristics of the submodules to cover all key frequencies. During the testing process, various testing techniques, such as time domain reflectance measurement (TDR) and frequency domain scanning (FDS), can be employed to improve the accuracy and efficiency of the test.

[0110] In addition, error correction mechanisms can be introduced, such as calibrating the system error of the network analyzer and compensating for the loss of the test cable, to further improve the accuracy of the S-parameters.

[0111] More specifically, the process of extracting S-parameters can also include post-processing of the test data. For example, statistical analysis methods can be used to average the results of multiple tests to reduce the impact of random errors. Data fitting techniques, such as curve fitting or model fitting, can be used to extract the S-parameters of the submodule over a wider frequency range.

[0112] Furthermore, machine learning algorithms can be used to analyze test data to identify potential outliers or trends, and to optimize the testing process accordingly. These post-processing steps help improve the quality and reliability of S-parameters, thereby providing more accurate input data for subsequent cascade analysis.

[0113] In some embodiments, the cascaded S-parameters include:

[0114] Based on the interconnection relationship between submodules, cascade the S-parameters of each submodule;

[0115] By cascading operations, the S-parameters of sub-modules are merged to obtain the S-parameters of the entire network.

[0116] It's important to note that the step of cascading the S-parameters of each submodule is the process of merging the S-parameters of each submodule into the S-parameters of the entire network. Cascading is a mathematical operation that combines the S-parameters of multiple subnetworks using a specific algorithm to simulate the electromagnetic behavior of these subnetworks as a whole. This step is crucial for understanding the signal transmission and reflection characteristics of the entire network.

[0117] Specifically, cascading operations first require determining the connections between submodules. This typically involves identifying the physical connection points between submodules, such as pads, vias, or other types of electrical interfaces. Then, based on these connections, a cascading model is built that describes how the submodules are interconnected and how they collectively affect the electromagnetic performance of the entire network.

[0118] More specifically, when building the model, it may be necessary to consider the signal propagation path, reflection and transmission characteristics, as well as the interactions between different sub-modules. Next, the S-parameters of the sub-modules are calculated and combined using a cascaded model. This process involves complex mathematical operations, such as matrix multiplication or other linear algebra operations, to ensure that the combined S-parameters accurately reflect the behavior of the entire network.

[0119] Preferably, the cascading operation can be implemented using various algorithms and techniques. For example, a recursive algorithm can be used to merge the S-parameters of sub-modules one by one until the S-parameters of the entire network are calculated. In some cases, parallel computing techniques can also be used to accelerate the cascading process, especially when the network is large.

[0120] Furthermore, optimization techniques can be introduced to reduce numerical errors during the computation process and improve the accuracy of the merged S-parameters. For example, regularization techniques can be used to suppress the influence of noise, or adaptive algorithms can be used to dynamically adjust computational parameters to adapt to different network structures and characteristics.

[0121] More specifically, cascading operations can also include verifying and adjusting the merged S-parameters. For example, after the cascading operation is completed, the accuracy of the merged S-parameters can be checked by comparing them with known benchmark data or by conducting additional experiments. If significant deviations are found, the S-parameters of the submodules can be adjusted, or the cascading operation can be repeated until satisfactory results are obtained.

[0122] Furthermore, statistical analysis methods can be used to assess the uncertainty of the merged S-parameters and their impact on overall network performance. These subsequent steps help ensure that the final S-parameters are not only accurate but also reliable, providing a solid foundation for power integrity analysis.

[0123] In some embodiments, the step of cascading the S-parameters of each submodule according to their interconnection relationships includes:

[0124] Determine the connection ports between submodules;

[0125] Based on the port connection relationships, establish a cascading model between submodules;

[0126] The S-parameters of submodules are calculated and merged using a cascaded model.

[0127] It's important to note that this step details how to cascade the various S-parameters based on the interconnections between submodules. In power integrity analysis, the connections between submodules determine how they interact, which is crucial for the electromagnetic performance of the entire network. The cascading model is central to power integrity analysis, simulating the behavior of each submodule within the overall network.

[0128] Specifically, determining the connection ports between submodules first requires identifying the interfaces of each submodule, which are the points where submodules connect to each other. For example, in circuit board design, these interfaces might be pads, vias, or connectors. Building a cascade model based on port connections involves using network equivalence methods from circuit theory, such as Y-Δ transformation and port impedance matching, to construct a mathematical model that describes how each submodule interacts through its connection ports. Calculating and combining the S-parameters of the submodules using the cascade model requires applying network analysis techniques, such as matrix operations, to integrate the S-parameters of each submodule, thus obtaining the S-parameters of the entire network. This process involves complex mathematical calculations and requires precise handling of signal transmission and reflection.

[0129] Preferably, the establishment and computation process of the cascade model can be optimized using various techniques and methods. For example, high-performance computing platforms can be used to accelerate complex matrix operations, especially when dealing with large-scale networks.

[0130] Furthermore, parallel computing techniques can be introduced to process the S-parameters of multiple sub-modules simultaneously, thereby improving overall analysis efficiency. During the computation process, numerical stability analysis can be employed to ensure the accuracy of the results, avoiding inaccuracies caused by numerical errors. To enhance the model's adaptability, adaptive algorithms can be used to dynamically adjust the parameters of the cascaded model to adapt to different network structures and operating conditions.

[0131] More specifically, the computation and validation process of cascaded models can also include robustness analysis of the models. For example, Monte Carlo simulations can be used to evaluate the model's performance under different random perturbations, thereby assessing the model's robustness.

[0132] In addition, advanced optimization algorithms, such as genetic algorithms or particle swarm optimization, can be used to find the optimal parameters of the cascaded model to minimize the difference between model predictions and actual measurements.

[0133] Furthermore, during the model validation phase, cross-validation techniques can be employed to evaluate the model's generalization ability, ensuring that the model maintains good performance across different test sets. These detailed operational steps and alternatives ensure the accuracy and reliability of the cascaded model, providing a solid foundation for power integrity analysis.

[0134] In some embodiments, after calculating and merging the S-parameters of the submodules through the cascaded model, the method further includes:

[0135] Verify the accuracy of the merged S-parameters;

[0136] If necessary, adjust the S-parameters of the submodules or re-perform the cascading operation to improve the accuracy of the analysis.

[0137] It should be noted that this step involves verification and adjustment after calculating and merging the S-parameters of the submodules using the cascaded model. The purpose of this step is to ensure that the merged S-parameters accurately reflect the electromagnetic characteristics of the entire network, thus providing reliable data for power integrity analysis. Verifying the accuracy of the merged S-parameters is a crucial step in power integrity analysis, as it helps identify and correct potential analytical errors.

[0138] Specifically, verifying the accuracy of the merged S-parameters typically involves comparing the calculated S-parameters with results obtained from experimental measurements or other analytical methods. This process may require specialized testing equipment, such as a network analyzer, to measure the S-parameters of the actual circuit.

[0139] Furthermore, if a significant discrepancy is found between the calculated and measured results, it may be necessary to adjust the S-parameters of the submodule or re-execute the cascading operation. Adjustments may include correcting model parameters, improving measurement techniques, or employing more accurate calculation methods. This step may require multiple iterations until the calculated results are sufficiently close to the actual measurement results.

[0140] Preferably, the verification and adjustment process can employ various techniques and methods to improve efficiency and accuracy. For example, statistical analysis methods can be used to assess the difference between the calculated results and the measured results, and to determine whether further adjustments are needed.

[0141] Furthermore, machine learning algorithms can be introduced to automatically identify potential sources of error and propose corresponding adjustments. In addition, advanced optimization algorithms, such as gradient descent or Newton's method, can be used to automatically adjust model parameters to minimize the difference between calculated and measured results.

[0142] More specifically, the verification and tuning process can also include sensitivity analysis of the merged S-parameters. For example, the impact of changes in parameters of different sub-modules on the overall network S-parameters can be analyzed to identify the key parameters that have the greatest impact on network performance.

[0143] Furthermore, Monte Carlo simulations can be used to assess the impact of parameter uncertainties on overall network performance, thus providing guidance for design optimization. When adjusting the S-parameters of submodules or re-cascading operations, adaptive algorithms can be used to dynamically adjust the calculated parameters to adapt to different network structures and operating conditions. Through these refined operational steps and alternatives, the accuracy and reliability of the merged S-parameters can be ensured, providing a solid foundation for power integrity analysis.

[0144] In some embodiments, before extracting the cut layout S parameters, the method further includes:

[0145] Obtain sample data associated with the target network;

[0146] Based on the sample data, the analysis method was fine-tuned to improve the accuracy of the analysis.

[0147] It should be noted that this step involves fine-tuning the analysis method before extracting the S-parameters of the cut layout. The purpose of this step is to optimize the analysis method using sample data associated with the target network, thereby improving the accuracy of the analysis. Sample data refers to data obtained from actual circuits or simulations, which can be used to calibrate and adjust the analysis method to better reflect real-world conditions.

[0148] Specifically, acquiring sample data associated with the target network may include data collected from actual circuit testing or data generated from high-precision simulations. This data may include the circuit's S-parameters, transmission line characteristics, component parameters, etc.

[0149] More specifically, based on this sample data, the analytical methods can be fine-tuned, such as adjusting model parameters, improving algorithms, or optimizing computational processes. The purpose of fine-tuning is to make the analytical results closer to the sample data, thereby improving the accuracy of the analysis. This involves statistical analysis, such as regression analysis, or machine learning techniques, such as neural networks, to identify the optimal adjustment strategy.

[0150] Preferably, the process of fine-tuning the analysis method can be further refined. For example, cross-validation can be used to evaluate the effectiveness of different fine-tuning strategies, thereby selecting the optimal adjustment scheme. Adaptive algorithms can be introduced to dynamically adjust the analysis method based on changes in sample data to adapt to different circuit designs and operating conditions.

[0151] In addition, advanced optimization algorithms, such as genetic algorithms or particle swarm optimization, can be used to automatically find the optimal fine-tuning parameters to minimize the difference between the analysis results and the sample data.

[0152] More specifically, the fine-tuning process can also include preprocessing of the sample data. For example, data cleaning techniques can be used to remove outliers or noise to improve the quality of the sample data. Feature selection techniques can be used to identify the sample data features that have the greatest impact on the analysis results.

[0153] Furthermore, data augmentation techniques, such as interpolation or extrapolation, can be employed to expand the sample dataset, especially when the sample data is sparse. When fine-tuning the analysis method, the physical characteristics of the circuit, such as material properties and temperature variations, can also be considered to more comprehensively adjust the analysis method. Through these refined operational steps and alternatives, the accuracy and adaptability of the analysis method can be ensured, providing a solid foundation for power integrity analysis.

[0154] In some embodiments, the grid cutting of the target network includes:

[0155] Determine the boundaries and internal structure of the target network;

[0156] Design a grid segmentation scheme based on the complexity of the network and the distribution of ports;

[0157] Perform Grid cutting to divide the target network into multiple sub-modules.

[0158] It should be noted that this step details the process of grid cutting the target network. Grid cutting is a technique for dividing a complex circuit network into smaller, more easily analyzed sub-modules. This process involves identifying the network's boundaries and internal structure, as well as designing a cutting scheme based on the network's complexity and port distribution. Performing grid cutting is a critical step in power integrity analysis, directly impacting the accuracy and efficiency of subsequent S-parameter extraction.

[0159] Specifically, determining the boundaries and internal structure of the target network involves identifying the location and connections of all components in the circuit. This may include identifying power lines, ground lines, decoupling capacitors, inductors, resistors, and their interconnections. Designing a grid dicing scheme based on the network's complexity and port distribution requires considering the component density, signal propagation paths, and potential sources of electromagnetic interference. Performing grid dicing, dividing the target network into multiple sub-modules, involves using automated tools to assist in the dicing operation. These tools can optimize the dicing process based on preset rules and parameters.

[0160] Preferably, the grid cutting process can be further refined. For example, when determining the boundaries of the target network, image recognition technology can be used to automatically identify the edges of the circuit layout. When designing the grid cutting scheme, algorithms can be used to optimize the size and shape of the grid to adapt to different circuit designs and operating frequencies.

[0161] Furthermore, when performing Grid cutting, a multi-level cutting strategy can be adopted, first performing a coarse cut and then gradually refining it, in order to improve the accuracy and efficiency of cutting.

[0162] More specifically, the grid slicing process can also include optimizing the sliced ​​sub-modules. For example, the shape of the sub-modules can be adjusted to reduce the computational load during analysis. The boundaries of the sub-modules can be smoothed to reduce errors caused by boundary irregularities.

[0163] Furthermore, pre-analysis of submodules can be performed to identify which submodules may have problems, allowing for greater attention in subsequent analyses. In practice, adaptive algorithms can be used to dynamically adjust grid cutting parameters to adapt to different network structures and characteristics. These refined operational steps and alternatives ensure the accuracy and efficiency of grid cutting, providing a solid foundation for power integrity analysis.

[0164] The various embodiments of the present invention have the following beneficial effects: The power integrity rapid analysis method based on grid cutting described in the present invention can significantly improve the efficiency and accuracy of the analysis. This method, by determining the target network, adding ports, performing grid cutting, and extracting and cascading the S-parameters of sub-modules, not only simplifies the analysis process but also reduces computational complexity through modular processing. Furthermore, this method allows for the consideration of pad via information and floating isolated patterns during the cutting process, ensuring the accuracy of the analysis results.

[0165] Furthermore, this method can improve the accuracy of the analysis by verifying the accuracy of the merged S-parameters after grid cutting, and adjusting the S-parameters of submodules or re-cascading operations if necessary. This method can also fine-tune the analysis method based on sample data associated with the target network before extracting S-parameters, further improving the reliability of the analysis results. These improvements ensure that the integrity of the power network is effectively evaluated, providing a powerful tool for design optimization and fault diagnosis.

[0166] As shown in Figure 2, a power integrity analysis device 200 according to some embodiments includes:

[0167] The first determining module 201 is used to determine the target network;

[0168] The second determining module 202 is used to add ports on the target network;

[0169] Cutting module 203 is used to cut the target network into grids;

[0170] Extraction module 204 is used to extract the S-parameters of the cut layout respectively;

[0171] Cascade module 205 is used to cascade each submodule to obtain the final S-parameters.

[0172] It is understood that the modules described in the power integrity analysis device 200 correspond to the steps in the grid-based rapid power integrity analysis method described with reference to FIG1. ​​Therefore, the operations, features, and beneficial effects described above for the grid-based rapid power integrity analysis method also apply to the power integrity analysis device 200 and its included modules, and will not be repeated here.

[0173] In some embodiments, the cutting module includes at least one of the following:

[0174] The Grid parameter retrieval unit is used to retrieve the row and column parameters of the external Grid.

[0175] The region extraction unit is used to extract rectangular regions from the entire page.

[0176] Divide into units, used to initially divide the entire page into rows and columns;

[0177] The port extraction unit is used to extract port locations and avoid ports.

[0178] The pad via information extraction unit is used to extract pad via information on the cutting boundary;

[0179] Submesh determination cells are used to determine the submesh to which pads and vias belong on the boundary based on the density size.

[0180] The graphic removal unit is used to remove floating, isolated graphics.

[0181] Port addition unit, used to add ports at the cut point;

[0182] The cut completion unit is used to complete the grid cutting.

[0183] It should be noted that this step involves the design of a power integrity analysis device, which includes multiple modules for performing a rapid power integrity analysis method based on grid cutting. This device improves the efficiency and accuracy of the analysis by integrating different functional modules and automating the entire analysis process. Each module in the device undertakes a specific task, such as identifying the target network, adding ports, performing grid cutting, extracting S-parameters, and cascading sub-modules.

[0184] Specifically, the first determination module is responsible for identifying and defining the power network to be analyzed. This module may contain algorithms to read circuit design documents and automatically identify power lines, ground lines, and other relevant circuit components in the network.

[0185] Furthermore, the second determination module is responsible for adding ports to the identified network, which are crucial for subsequent S-parameter extraction and network simulation. The slicing module is responsible for performing grid slicing, dividing the large network into smaller, more manageable sub-modules.

[0186] Furthermore, the extraction module is used to obtain S-parameters from each submodule, which describe the electromagnetic behavior of the submodule. Finally, the cascade module integrates the S-parameters of all submodules to obtain the electromagnetic properties of the entire network.

[0187] Preferably, the various modules of this device can be further refined and optimized. For example, the first determining module can integrate advanced image recognition algorithms to improve the accuracy of identifying circuit components.

[0188] Specifically, the second determining module can be designed to automatically detect and add necessary ports without manual intervention. The cutting module can employ adaptive grid cutting technology, dynamically adjusting the cutting strategy based on the complexity of the circuit and the component density.

[0189] Furthermore, the extraction module can integrate high-performance computing resources to accelerate the S-parameter extraction process. The cascade module can employ advanced algorithms to optimize the parameter merging process, ensuring the accuracy of the merged S-parameters.

[0190] More specifically, the device can also include additional modules to enhance its functionality. For example, an optimization module can be added to automatically adjust parameters during the analysis process to adapt to different circuit designs and operating conditions. A verification module can be integrated to automatically compare the analysis results with actual measurement data to ensure the accuracy of the analysis. Furthermore, the device can be equipped with a user interface that allows users to monitor the analysis progress, adjust analysis parameters, and view the analysis results.

[0191] Referring now to Figure 3, a structural schematic diagram of an electronic device structure 300 suitable for implementing some embodiments of the present invention is shown. The electronic devices in some embodiments of the present invention may include, but are not limited to, mobile terminals such as mobile phones, laptops, digital broadcast receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), in-vehicle terminals (e.g., in-vehicle navigation terminals), and fixed terminals such as digital TVs and desktop computers. The terminal device shown in Figure 3 is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments of the present invention.

[0192] As shown in Figure 3, the electronic device 300 may include a processing unit (e.g., a central processing unit, a graphics processing unit, etc.) 301, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 302 or a program loaded from a storage device 308 into a random access memory (RAM) 303. The RAM 303 also stores various programs and data required for the operation of the electronic device 300. The processing unit 301, ROM 302, and RAM 303 are interconnected via a bus 304. An input / output (I / O) interface 305 is also connected to the bus 304.

[0193] Typically, the following devices can be connected to I / O interface 305: input devices 306 including, for example, touchscreens, touchpads, keyboards, mice, cameras, microphones, accelerometers, gyroscopes, etc.; output devices 307 including, for example, liquid crystal displays (LCDs), speakers, vibrators, etc.; storage devices 308 including, for example, magnetic tapes, hard disks, etc.; and communication devices 309. Communication device 309 allows electronic device 300 to communicate wirelessly or wiredly with other devices to exchange data. Although Figure 3 shows electronic device 300 with various devices, it should be understood that it is not required to implement or possess all of the devices shown. More or fewer devices may be implemented or possessed alternatively. Each box shown in Figure 3 may represent one device, or multiple devices may be represented as needed.

[0194] Furthermore, the storage medium in the embodiments of this application stores program instructions capable of implementing all the above methods. These program instructions can be stored in the storage medium in the form of a software product, including several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks, or terminal devices such as computers, servers, mobile phones, and tablets.

[0195] The above description is merely a selection of preferred embodiments of the present invention and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of the invention as described in the embodiments is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the inventive concept. For example, technical solutions formed by substituting the above-described features with (but not limited to) technical features with similar functions disclosed in the embodiments of the present invention.

Claims

1. A fast power integrity analysis method based on grid cutting, comprising: Determine the target network; Add a port to the target network; Perform grid segmentation on the target network; Extract the S-parameters of the cut layout respectively; The final S-parameters are obtained by cascading the sub-modules.

2. The method as described in claim 1, wherein, The grid cutting includes at least one of the following: Get the row and column parameters of the external Grid; Extract the entire rectangular area; The entire page was initially divided into rows and columns; Extract port locations and avoid those ports; Extract via information from pads on the cutting boundary; Determine the sub-mesh to which the pad via on the boundary belongs based on the density size; Remove floating isolated graphics; Add a port at the cut point; Complete the grid cutting.

3. The method as described in claim 1 or 2, wherein, The extraction of the S-parameters of the cut layout includes: After completing the Grid cutting, extract the S-parameters of each sub-module; The S-parameters are cascaded to obtain the final S-parameters.

4. The method of claim 3, wherein, The cascaded S-parameters include: Based on the interconnection relationship between submodules, cascade the S-parameters of each submodule; By cascading operations, the S-parameters of sub-modules are merged to obtain the S-parameters of the entire network.

5. The method of claim 4, wherein, The S-parameters of each cascaded submodule based on their interconnection relationships include: Determine the connection ports between submodules; Based on the port connection relationships, establish a cascading model between submodules; The S-parameters of submodules are calculated and merged using a cascaded model.

6. The method of claim 5, wherein, After calculating and merging the S-parameters of the submodules through the cascaded model, the following is also included: Verify the accuracy of the merged S-parameters; If necessary, adjust the S-parameters of the submodules or re-perform the cascading operation to improve the accuracy of the analysis.

7. The method of claim 3, wherein, Before extracting the S-parameters of the cut layout, the following is also included: Obtain sample data associated with the target network; Based on the sample data, the analysis method was fine-tuned to improve the accuracy of the analysis.

8. The method as claimed in claim 1 or 2, wherein, The grid segmentation of the target network includes: Determine the boundaries and internal structure of the target network; Design a grid segmentation scheme based on the complexity of the network and the distribution of ports; Perform Grid cutting to divide the target network into multiple sub-modules.

9. A power integrity analysis device, comprising: The first determining module is used to determine the target network; The second determining module is used to add ports on the target network; The cutting module is used to cut the target network into grids. The extraction module is used to extract the S-parameters of the cut layout separately; Cascade modules are used to cascade various sub-modules to obtain the final S-parameters.

10. The apparatus of claim 9, wherein, The cutting module includes: The Grid parameter retrieval unit is used to retrieve the row and column parameters of the external Grid. The region extraction unit is used to extract rectangular regions from the entire page. Divide into units, used to initially divide the entire page into rows and columns; The port extraction unit is used to extract port locations and avoid ports. The pad via information extraction unit is used to extract pad via information on the cutting boundary; Submesh determination cells are used to determine the submesh to which pads and vias belong on the boundary based on the density size. The graphic removal unit is used to remove floating, isolated graphics. Port addition unit, used to add ports at the cut point; The cut completion unit is used to complete the grid cutting.

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