Encoding or decoding method and apparatus

Abstract

The present application provides an encoding or decoding method and a communication apparatus. A base matrix applied to LDPC provided in the method is different from a base matrix in an existing solution. Compared with two columns in the base matrix in the existing solution that have a relatively large absolute value of the difference between column weights, in the design of the base matrix provided in the present application, the two columns have more regular column weights. In addition, elements of the two columns in a row region other than a given row region are the same. When the two columns are from a column region of the base matrix that satisfies corresponding characteristics, and the given row region is from a row region of the base matrix that satisfies corresponding characteristics, the base matrix can generally reduce the error floor under the application of different code lengths and code rates in a wireless system, so that the base matrix can be applied to a high-reliability communication scenario.

Description

Encoding or decoding methods and apparatus

[0001] This application claims priority to Chinese patent application filed on November 6, 2024, with application number 202411586083.7 and entitled "Method and apparatus for encoding or decoding", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of channel coding, and more specifically, to a method and apparatus for channel coding or decoding. Background Technology

[0003] Low-density parity-check (LDPC) codes are channel coding schemes very close to the Shannon limit and have been chosen as the data channel coding scheme for fifth-generation (5G) systems. Mainstream LDPCs have a quasi-cyclic (QC) structure, and practical QC-LDPCs are represented using a base graph (BG). The base graph can also be written in matrix form, called the base matrix. By boosting the elements in the base matrix using boosting values, the base matrix can be expanded into a complete parity-check matrix for encoding or decoding.

[0004] 5G LDPC performs poorly when applied to ultra-reliable and low-latency communication (URLLC), exhibiting a significant error floor and failing to support high-reliability scenarios. Furthermore, due to the high flexibility of code length and code rate in wireless systems, there are numerous combinations of different code lengths and rates, making independent optimization for each combination extremely difficult.

[0005] Therefore, in high-reliability scenarios, how to universally improve the performance of LDPC at different code lengths and code rates is an urgent problem to be solved. Summary of the Invention

[0006] This application provides a method and apparatus for encoding or decoding, applied to LDPC, which can generally reduce the error plane under different code lengths and code rates.

[0007] Firstly, an encoding method is provided, which can be executed by a communication device or a module applied to the communication device (e.g., a processor, chip, circuit, etc., or a logic module, hardware, and / or software capable of implementing all or part of the functions of the communication device). The communication device is also referred to as an encoding device. The method includes: obtaining a first basis matrix, which corresponds to a second basis matrix. The first basis matrix includes a first column and a second column, which respectively correspond to the third and fourth columns of the second basis matrix. The absolute value of the difference between the column weights of the first and second columns is less than the absolute value of the difference between the column weights of the third and fourth columns. The second basis matrix is ​​a basis matrix applicable to a first condition, which is related to the code length and / or code rate. Both the second and first basis matrices contain X rows and Y columns. The first and second columns belong to a column set Q, which contains at least two columns from the Y column. The elements of the first and third columns are the same in other row regions outside the row region corresponding to the row set R. The elements of the second and fourth columns are the same in other row regions outside the row region corresponding to the row set R. The row set R contains at least one row from the X rows, where X and Y are both positive integers. The method also includes: determining a first matrix based on the first basis matrix and the shift values ​​corresponding to the elements in the first basis matrix; encoding based on the first matrix to obtain an encoded bit sequence; and outputting the encoded bit sequence.

[0008] In this technical solution, the basis matrix used for LDPC differs from that in existing solutions (e.g., BG1 or BG2 in NR). Compared to the two columns with larger absolute differences in column weights in existing basis matrices, the column weights of the two columns in the basis matrix provided in this application are more regular. Furthermore, the elements of these two columns are identical in all row regions outside the given row region. When these two columns originate from column regions of the basis matrix that satisfy the corresponding characteristics, and the given row region originates from row regions of the basis matrix that satisfy the corresponding characteristics, this basis matrix can generally reduce the error plane under different code lengths and code rates in wireless systems, thus enabling its application in high-reliability communication scenarios.

[0009] Regarding the characteristics that the column or row area should meet, please refer to the implementation methods or specific implementations below, which will not be elaborated here.

[0010] In this embodiment, the numbers "first column," "second column," etc., refer to columns in the first base matrix that meet certain requirements. The numbers "first" and "second" are only for clear description of the scheme and do not represent the first or second column of the first base matrix in the natural index order of the columns. The third or fourth column is similar and will not be described further.

[0011] Secondly, a decoding method is provided, which can be executed by a communication device or a module applied to the communication device (e.g., a processor, chip, circuit, etc., or a logic module, hardware, and / or software capable of implementing all or part of the functions of the communication device). The communication device is also called a decoding device. The method includes: obtaining a first basis matrix, the first basis matrix corresponding to a second basis matrix, the first basis matrix including a first column and a second column, the first column and the second column respectively corresponding to the third column and the fourth column of the second basis matrix, the absolute value of the difference between the column weight of the first column and the column weight of the second column being less than the absolute value of the difference between the column weight of the third column and the column weight of the fourth column, the second basis matrix being a basis matrix applicable to a first condition, the first condition being related to code length and / or code rate, both the first basis matrix and the second basis matrix containing X rows and Y columns, the first column and the second column belonging to... A column set Q contains at least two columns from column Y. The first and third columns have the same elements in other row regions outside the row region corresponding to the row set R. The second and fourth columns have the same elements in other row regions outside the row region corresponding to the row set R. The row set R contains at least one row from row X. X and Y are both positive integers. A first matrix is ​​determined based on the first base matrix and the translation values ​​corresponding to the elements in the first base matrix. Based on the first matrix, the received value sequence is decoded to obtain a decoded bit sequence. The decoded bit sequence is then output.

[0012] In some implementations of the first or second aspect, the second basis matrix may include one of the following: BG1 of the 5G system, BG2 of the 5G system, a submatrix of BG1 of the 5G system, or a submatrix of BG2 of the 5G system.

[0013] Among them, the submatrix of BG1 or BG2 of the 5G system refers to the submatrix extracted from BG1 or BG2 of the 5G system based on different code rates.

[0014] In some implementations of the first or second aspect, obtaining the first basis matrix includes: modifying the second basis matrix based on a first rule to obtain the first basis matrix, wherein the first rule includes: swapping elements at corresponding positions of at least two columns contained in the column set Q within the row region corresponding to the row set R.

[0015] In this implementation, the complexity of the basis matrix design can be reduced by modifying the second basis matrix to obtain the first basis matrix. For example, based on 5G's BG1 or BG2, without changing the overall structure of 5G's BG1 or BG2, the first basis matrix can be obtained by swapping its local columns based on the first rule.

[0016] In some implementations of the first or second aspect, the first base matrix includes submatrix A, submatrix B, submatrix C, submatrix D, and submatrix E, wherein: submatrix A is the first base matrix in rows 1 to x1 and columns 1 to y1; submatrix B is the first base matrix in rows 1 to x1 and columns y1+1 to y2; submatrix C is the first base matrix in rows 1 to x1 and columns y2+1 to Y; submatrix D is the first base matrix in rows x1+1 to X and columns 1 to y2; submatrix E is the first base matrix in rows x1+1 to X and columns y2+1 to Y; the row region corresponding to the row set R is located within the range of the first submatrix in rows x1+1 to X; and 1 ≤ x1 ≤ X, 1 ≤ y1 ≤ y2 ≤ Y, where x1, y1, and y2 are all integers.

[0017] In this implementation, by dividing the first base matrix into submatrices, it can be applied to encoding at different bit rates, offering flexibility and ease of implementation. Furthermore, it also supports hybrid automatic repeat request (HARQ) retransmissions.

[0018] In some implementations of the first or second aspect, the row set R contains at least one row, which includes a first row corresponding to a first threshold. The first threshold is an upper limit threshold for the number of columns in the Y column of the first base matrix corresponding to the first row that belong to the column set Q. The first threshold is related to one or more of the following information: the current bitrate; the row weight of the first row; the row weight of the remaining columns in the first row excluding the punctured columns; and the connection structure between the first row and the punctured columns, wherein the connection structure includes one of the following: the first row is not connected to any of the punctured columns, or the first row is connected to at least one of the punctured columns.

[0019] In some implementations of the first or second aspect, the row set R contains at least two rows, the at least two rows are divided into at least two segments, the at least two segments correspond one-to-one with at least two thresholds, wherein the threshold corresponding to the second segment of the at least two segments indicates an upper limit threshold for the number of columns belonging to the column set Q in the Y column of the first base matrix corresponding to the second segment, the second segment is any one of the at least two segments, and the first threshold corresponding to the first row is the threshold corresponding to the first segment to which the first row belongs.

[0020] In this implementation, by dividing the row region corresponding to the row set R into at least two segments, the requirements of different code rates can be matched, so that each code rate has a better decoding threshold, reducing the error plane without sacrificing the performance of the waterfall region.

[0021] In some implementations of the first or second aspect, the index of the second segment is greater than the index of the first segment, the threshold corresponding to the second segment is less than the threshold corresponding to the first segment, and the first segment is any one of the at least two segments.

[0022] In some implementations of the first or second aspect, the first column corresponds to column index Y1 in the first base matrix, and the third column corresponds to column index Y1 in the second base matrix, where 1 ≤ Y1 ≤ Y, and Y1 is an integer; the column weight of the third column in the row region of the second base matrix is ​​d1, and the column weight in other regions outside the row region is d′1; the column weight of the first column in the row region of the first base matrix is ​​d2, and the column weight in other regions outside the row region is d′2; d1 is not less than d2, and d′1 is greater than d′2.

[0023] In some implementations of the first or second aspect, d1, d′1, d2, and d′2 satisfy any one of the following:

[0024] d1>d2 and d′1>d′2; or,

[0025] d1>d2 and d′1>2d′2; or,

[0026] d1 = d2 and d′1 > d′2; or,

[0027] d1 = d2 and d′1 > 2d′2.

[0028] In the above implementation, compared with the first basis matrix and the second basis matrix (such as BG1, BG2 or submatrices of BG1 / BG2 in 5G system), the column weight of the corresponding column in the row region corresponding to the row set R, and the column weight in other regions outside the row region, meet certain characteristics. This can ensure that the decoding threshold is not lost as much as possible, and at the same time, it can specifically strengthen the weak properties of the error flat layer, so as to better achieve the effect of reducing the error flat layer.

[0029] In some implementations of the first or second aspect, the first column corresponds to column index Y1 in the first base matrix, and the third column corresponds to column index Y1 in the second base matrix, 1 ≤ Y1 ≤ X, where Y1 is an integer; the column weight of the third column in the region outside the lower triangular check row of the second base matrix is ​​d1, the column weight in the lower triangular check row of the second base matrix is ​​d′1, and / or the row weight of the third column in other regions of the second base matrix besides the row region is d′1, the column weight of the first column in the region outside the lower triangular check row of the first base matrix is ​​d2, the column weight in the lower triangular check row of the first base matrix is ​​d′2, and / or the row weight of the first column in other regions besides the row region of the first base matrix is ​​d′2, where d1 > d2 and d′1 > d′2.

[0030] In some implementations of the first or second aspect, d′1>2d′2.

[0031] In the above implementation, compared with the first basis matrix and the second basis matrix (e.g., BG1, BG2 or sub-matrices of BG1 / BG2 in 5G system), the column weights of the corresponding columns outside the lower triangular parity row, as well as the column weights of the lower triangular parity row and / or the column weights of the regions outside the row regions corresponding to the row set R, satisfy certain characteristics. This can ensure that the decoding threshold is not lost as much as possible, while specifically strengthening the weak properties of the error flatness, and better achieving the effect of reducing the error flatness.

[0032] In some implementations of the first or second aspect, the column region corresponding to the column set Q is located within the range of the (y1+1)th to (y2)th columns of the first base matrix.

[0033] In some implementations of the first or second aspect, the column set Q includes at least one column from the column region corresponding to the submatrix B of the first base matrix.

[0034] In some implementations of the first or second aspect, at least one column in the column region corresponding to the submatrix B includes a column with column index Y2, the column with column index Y2 having an even weight, or the column with column index Y2 being the column with the smallest weight in the column region corresponding to the submatrix B; and the column weight of the column with column index Y2 in the first base matrix is ​​greater than the column weight of the column with column index Y2 in the second base matrix.

[0035] In some implementations of the first or second aspect, the column set Q further includes a column with column index Y3 and an odd column weight;

[0036] Furthermore, the column weight of the column with column index Y3 in the first base matrix is ​​less than the column weight of the column with column index Y3 in the second base matrix.

[0037] In some implementations of the first or second aspect, the column set Q contains columns with an even number of column weights in the column region corresponding to the submatrix B.

[0038] In some implementations of the first or second aspect, the column set Q includes at least one column in the column region corresponding to the submatrix A and at least one column in the column region corresponding to the submatrix B; and the column weight of the at least one column in the column region corresponding to the submatrix A in the first base matrix is ​​less than the column weight of the at least one column in the column region corresponding to the submatrix A in the second base matrix; the column weight of the at least one column in the column region corresponding to the submatrix B in the first base matrix is ​​greater than the column weight of the at least one column in the column region corresponding to the submatrix B in the second base matrix.

[0039] In the above implementation methods, the column region corresponding to the column set Q is the set of columns in the first basis matrix that meet the corresponding characteristics (or requirements), which can greatly reduce the error plane and improve decoding performance.

[0040] In some implementations of the first or second aspect, the method further includes: obtaining translation values ​​corresponding to elements in a first base matrix, wherein the first column of the first base matrix includes a first element, the first element corresponds to the row index i and column index j of the first base matrix, the row index i belongs to any row of the row region corresponding to the row set R, and the column index j belongs to any column of the column region corresponding to the column set Q, the translation value corresponding to the first element is the same as the translation value corresponding to the second element in the second base matrix, the second element is the element corresponding to the row index i and column index k in the second base matrix, and the column index k is the same as the index of the second column of the first base matrix.

[0041] In some implementations of the first or second aspect, the method further includes: determining, based on at least one sequence, translation values ​​corresponding to elements of the first basis matrix at each position in a first position set, the first position set being a set of positions indicated by the first basis matrix in the column region corresponding to the column set Q and the row region corresponding to the row set R, the first position set including a first position, and the translation values ​​corresponding to elements of the first position being determined based on the correspondence between the at least one sequence and the rows and / or columns of the first basis matrix.

[0042] In some implementations of the first or second aspect, the at least one sequence includes a first sequence, where the element P(i,j) in the first sequence corresponds to the row index i and column index j in the first base matrix, and the translation value corresponding to the element at the first position is determined based on the element P(i,j); or, the at least one sequence includes a first sequence and a second sequence, where the element R(i) in the first sequence corresponds to the row index i in the first base matrix, and the element C(j) in the second sequence corresponds to the column index j in the first base matrix, and the translation value corresponding to the element at the first position is determined based on the R(i) and the C(j), where i and j are both integers.

[0043] Thirdly, a communication device is provided, which has the function of implementing the method in the first aspect or any possible implementation of the first aspect. The function can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more units corresponding to the above-described function.

[0044] Fourthly, a communication device is provided, which has the function of implementing the method in the second aspect or any possible implementation of the second aspect. The function can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more units corresponding to the above-described function.

[0045] Fifthly, a communication device is provided, comprising at least one processor configured to cause the communication device to execute the method of the first aspect or any possible implementation thereof; or to execute the method of the second aspect or any possible implementation thereof. Optionally, the at least one processor is coupled to at least one memory for storing computer programs or instructions, and the at least one processor is configured to call and run the computer program or instructions from the at least one memory, causing the communication device to execute the method of the first aspect or any possible implementation thereof; or to execute the method of the second aspect or any possible implementation thereof. Optionally, the at least one processor may be included in the communication device or may be configured outside the communication device. Optionally, the communication device further includes the at least one memory. Optionally, the communication device further includes at least one communication interface. As an example, the communication interface may include an input interface and / or an output interface, or may be an interface circuit.

[0046] Sixthly, a communication device is provided, comprising a communication interface and a circuit. The communication interface is configured to receive a signal to be processed and transmit the signal to the circuit. The circuit is configured to process the signal to perform a method as described in the first aspect or any possible implementation thereof; or to perform a method as described in the second aspect or any possible implementation thereof. Optionally, the communication interface is further configured to output a signal processed by the circuit. Optionally, the signal may include information and / or data. Optionally, the communication device may be a chip (e.g., a baseband chip) or a chip system.

[0047] A seventh aspect provides a computer-readable storage medium storing computer program code or instructions that, when executed on a computer, cause the method of the first aspect or any possible implementation thereof to be implemented; or, the method of the second aspect or any possible implementation thereof to be implemented.

[0048] Eighthly, a computer program product is provided, the computer program product comprising computer program code or instructions, which, when executed on a computer, cause the method in the first aspect or any possible implementation thereof to be implemented; or, as in the second aspect or any possible implementation thereof, the method to be implemented.

[0049] Ninth aspect, a wireless communication system is provided, including the communication device as described in the third aspect and the communication device as described in the fourth aspect. Attached Figure Description

[0050] Figure 1 is a schematic diagram of the base matrix structure of 5G LDPC.

[0051] Figure 2 is a schematic diagram of the incremental redundancy region of the basis matrix of LDPC.

[0052] Figure 3 shows an example of a communication system applicable to the technical solution of this application.

[0053] Figure 4 is a schematic diagram of the basic process of wireless communication.

[0054] Figure 5 is a schematic flowchart of the channel coding or decoding method 200 provided in this application.

[0055] Figure 6 is a schematic diagram of the basis matrix of an embodiment of this application.

[0056] Figure 7 is a schematic diagram of one method for obtaining the first basis matrix.

[0057] Figure 8 shows an example of a region division of the basis matrix provided in this application.

[0058] Figure 9 is an example of a row region corresponding to the row set R in an embodiment of this application.

[0059] Figure 10 is a schematic diagram of the method for obtaining the basis matrix provided in this application.

[0060] Figure 11 is another schematic diagram of the row region corresponding to the row set R provided in this application.

[0061] Figure 12 is a schematic diagram of the number of columns based on segmented swapping.

[0062] Figure 13 is a schematic diagram of the characteristics of column set Q.

[0063] Figure 14 is a schematic diagram illustrating the characteristics of the column set Q.

[0064] Figure 15 is an example of obtaining the translation values ​​corresponding to the elements of the first basis matrix based on an embodiment of this application.

[0065] Figure 16 is another example of obtaining the translation values ​​corresponding to the elements of the first basis matrix based on an embodiment of this application.

[0066] Figure 17 shows the performance simulation results of the base matrix and NR BG2 provided in this application when applied to encoding at different code rates.

[0067] Figure 18 is a schematic structural diagram of the communication device 1000 provided in this application.

[0068] Figure 19 is a schematic structural diagram of another communication device provided in this application.

[0069] Figure 20 is a schematic structural diagram of the chip provided in this application. Detailed Implementation

[0070] The technical solutions in this application will now be described with reference to the accompanying drawings.

[0071] First, the relevant technologies involved in the embodiments of this application will be introduced.

[0072] The base graph (BG) model of quasi-cyclic LDPC (QC-LDPC) is BG = (X, Y, F), where X corresponds to variables, Y corresponds to check equations, F represents the edge relationships, and the expansion factor is Z. c After QC expansion, we obtain the Tanner graph, which is a bipartite graph G = (V, C, E), where V is the variable node, C is the check node, and E is its edge relationship, corresponding to the number of columns in the check matrix N = |V| = Z. c |X|, the number of rows in the parity check matrix M = |C| = Z c|Y|, the number of non-zero elements in the parity check matrix is ​​|E|=Z|F|. BG can also be written in matrix form H. BG Based on the basis matrix and the lifting value Z c (Lifting size) can expand the basis matrix into a complete parity-check matrix for encoding or decoding. c It can also be called the expansion factor, lifting factor, expansion value, expansion coefficient, or lifting size, etc. The lifting process involves lifting the elements in the basis matrix to a value of Z. c ×Z c The basis matrix is ​​a square matrix. The elements in the basis matrix take values ​​of 0 and 1. A value of 0 represents an empty element, and a value of 1 represents an edge in the basis graph, or an association between a corresponding check and a variable. Element 0 in the basis matrix is ​​promoted to Z. c ×Z c The 0 matrix is ​​promoted to an identity matrix by its element 1, and then cyclically shifted based on the corresponding shifting value (SV). Each element 1 in the base matrix corresponds to a shifting value. For example, with a 4x4 identity matrix, if the shifting values ​​are 0, 1, and 3, and the shift is cyclically to the right, the resulting cyclically shifted matrix is ​​as follows:

[0073] If the translation value is 0, the corresponding cyclically shifted matrix is:

[0074] If the shift value is 1, the corresponding cyclically shifted matrix is:

[0075] If the shift value is 3, the corresponding cyclically shifted matrix is:

[0076] In 5G systems, the parity check matrix of the LDPC described in the standard has two corresponding BGs: BG1 and BG2. BG1 and BG2 have a common matrix structure, as shown in Figure 1.

[0077] Figure 1 shows a schematic diagram of the basis matrix structure of 5G LDPC. The basis matrix includes: part A corresponding to the information column region at high code rates; part B corresponding to the core check region at high code rates; part C, an all-zero region; part D, an incremental redundancy region corresponding to the low code rate matrix; and part E, a raptor-like region, which is an identity matrix structure. The basis matrix takes values ​​of 0 and 1, where 0 represents an empty element and 1 represents an edge in the basis graph or an association between the check and the corresponding variable. The columns within the dashed boxes in Figure 1 represent punched columns. In the 5G system, the first two columns of BG1 and BG2 are punched columns. In terms of matrix characteristics, their column weight (also called column weight, which is the number of all 1s in the column) is very large; in terms of transmission characteristics, the bits corresponding to the punched positions are not transmitted. On the decoding side, there is no information at the "punched" position, so its log-likelihood ratio is set to 0 for decoding. The entire matrix shown in Figure 1 is designed for the lowest bit rate. When different bit rates need to be supported, the upper left part of the matrix is ​​used, as shown in Figure 1. Regions A and B constitute the highest bit rate matrix. In 5G peak throughput scenarios (longer code length, different number of information in different scenarios, such as 1k~2k, or greater than 8k), it is completely implemented by BG1. The number of columns in part A of BG1 is 22, the number of columns in part B is 4, and the number of punched columns is 2. The supported bit rate is 22 / (22+4-2)=11 / 12≈0.917, or a slightly higher bit rate can be supported by additional punched parity bits.

[0078] Figure 2 is a schematic diagram of the incremental redundancy region of the LDPC base matrix. Region E in Figure 1 adopts a Raptor-like structure in Figure 2, which can be progressively expanded to low bitrates from a high-bitrate core matrix. Within Region E, the row weight (the number of 1s in each row) is equal to 1, and the column weight (the number of 1s in each column) is equal to 1. In other words, Region E is an identity matrix, or can be transformed into an identity matrix through row and column permutations. The advantage of this is that the parity check position of any row in E can be encoded quickly. The dashed lines in Figure 2 represent regions of the matrix truncation at different bitrates.

[0079] As mentioned in the background section, 5G LDPC performs poorly in high-reliability scenarios, such as ultra-reliable and low-latency communication (URLLC) or hyper-reliable and low-latency communication (HRLLC), exhibiting a significant error floor. The error floor refers to the phenomenon where, after the signal-to-noise ratio (SNR) increases to a certain level, the bit error rate (BER) no longer decreases significantly with further increases in SNR, but rather decreases at a more gradual rate. Furthermore, code length and code rate are highly flexible in wireless systems, making it extremely difficult to optimize LDPC performance individually for different code lengths and rates.

[0080] Therefore, this application provides an encoding or decoding scheme. When the base matrix provided in this scheme is applied to LDPC, it has the performance of significantly reducing error planes and can be applied to the performance requirements of LDPC in high reliability scenarios.

[0081] The technical solutions of this application can be applied to various existing and future communication systems, including but not limited to: satellite communication systems, fifth-generation (5G) systems or new radio (NR) systems, long-term evolution (LTE) systems, LTE frequency division duplex (FDD) systems, LTE time division duplex (TDD) systems, and future communication systems. Furthermore, they can also be applied to sidelink (SL) communication, vehicle-to-everything (V2X) communication, machine-to-machine (M2M) communication, machine-type communication (MTC), and Internet of Things (IoT) communication systems, or other communication systems, etc., which are not limited herein.

[0082] Figure 3 illustrates an example of a communication system applicable to the technical solution of this application. As shown in Figure 3, the communication system may include one or more transmitters and one or more receivers. Optionally, one of the transmitters and receivers may be a terminal device, and the other may be a network device. The channel coding or decoding method provided in this application is applicable to communication between the network device and the terminal device shown in Figure 3, i.e., uplink communication or downlink communication. For example, in downlink communication, the transmitter in this embodiment is a network device, and the receiver is a terminal device; in uplink communication, the transmitter is a terminal device, and the receiver is a network device.

[0083] For example, a terminal device may also be referred to as user equipment (UE), access terminal, user unit, user station, mobile station, mobile station, mobile terminal (MT), remote station, remote terminal, mobile device, user terminal, terminal, wireless communication device, user agent, or user apparatus. In the embodiments of this application, the terminal device may be a device that provides voice and / or data connectivity to a user, and can be used to connect people, objects, and machines, such as a handheld device with wireless connectivity, in-vehicle equipment, etc. The terminal device in the embodiments of this application may be a mobile phone, tablet computer, laptop computer, PDA, mobile internet device (MID), wearable device, virtual reality (VR) device, augmented reality (AR) device, wireless terminal in industrial control, wireless terminal in self-driving, wireless terminal in remote medical surgery, wireless terminal in smart grid, wireless terminal in transportation safety, wireless terminal in smart city, wireless terminal in smart home, etc. Optionally, the UE may be used as a base station. For example, the UE may act as a scheduling entity, providing sidelink signals between UEs in V2X or SL, etc.

[0084] In this embodiment, the device used to implement the functions of the terminal device can be the terminal device itself, or any device capable of supporting the terminal device in implementing the corresponding functions, such as a chip, processor, circuit, hardware, and / or software combination. This device is located on the terminal side and can be configured within or used in conjunction with the terminal device. The chip system can consist of chips or include chips and other discrete components. In this embodiment, the terminal device is used as an example to illustrate the device for implementing the corresponding functions of the terminal device.

[0085] The network device in this application embodiment may include a device for communicating with a terminal device. This network device may include an access network device or a radio access network device; for example, the network device may be a base station. In this application embodiment, the access network device may refer to a radio access network (RAN) node (or device) that connects the terminal device to the wireless network. A base station can broadly encompass, or be replaced by, various names such as: NodeB, evolved NodeB (eNB), next-generation NodeB (gNB), relay station, access point, transmitting and receiving point (TRP), transmitting point (TP), master station, auxiliary station, motor slide retainer (MSR) node, home base station, network controller, access node, wireless node, access point (AP), transmission node, transceiver node, baseband unit (BBU), remote radio unit (RRU), active antenna unit (AAU), remote radio head (RRH), central unit (CU), distributed unit (DU), radio unit (RU), positioning node, etc. A base station can be a macro base station, micro base station, relay node, donor node, or a combination thereof. A base station can also refer to a communication module, modem, or chip installed within the aforementioned equipment or apparatus. A base station can also be a mobile switching center, a device performing base station functions in D2D, V2X, and M2M communications, a network device (e.g., a base station) in a future communication network, or a device performing network device functions. A base station can support networks using the same or different access technologies. Optionally, a RAN node can also be a server, wearable device, vehicle, or in-vehicle equipment. For example, the access network equipment in vehicle-to-everything (V2X) technology can be a roadside unit (RSU). The embodiments of this application do not limit the specific technology or device form used in the network equipment.

[0086] Base stations can be fixed or mobile. For example, a helicopter or drone can be configured to act as a mobile base station, and one or more cells can move depending on the location of the mobile base station. In other examples, a helicopter or drone can be configured as a device to communicate with another base station.

[0087] In some deployments, the network device in this application embodiment may be a device including a CU, or a DU, or a device including both CU and DU, or a control plane CU node (central unit-control plane (CU-CP)) and a user plane CU node (central unit-user plane (CU-UP)) and a DU node. For example, the network device may include gNB-CU-CP, gNB-CU-UP, and gNB-DU.

[0088] In some deployments, multiple RAN nodes collaborate to assist terminals in achieving wireless access, with different RAN nodes each implementing some of the base station's functions. For example, RAN nodes can be CUs, DUs, CU-CPs, CU-UPs, or RUs. CUs and DUs can be configured separately or included in the same network element, such as a BBU. RUs can be included in radio frequency equipment or radio frequency units, such as RRUs, AAUs, or RRHs.

[0089] In different systems, CU (or CU-CP and CU-UP), DU, or RU may have different names, but those skilled in the art will understand their meaning. For example, in an open radio access network (ORAN / O-RAN) system, CU can also be called an open CU (open CU, O-CU), and DU can also be called an open DU (open DU, O-DU). CU-CP can also be called O-CU-CP, CU-UP can also be called O-CU-UP, and RU can also be called O-RU. Any of the units among CU (or CU-CP, CU-UP), DU, and RU in this application can be implemented through software modules, hardware modules, or a combination of software modules and hardware modules.

[0090] In this embodiment, the device used to implement the functions of the network device can be the network device itself; it can also be a device capable of supporting the network device in implementing the corresponding functions, such as a chip, processor, circuit, hardware, and / or software combination. This device is located on the network side and can be configured within or used in conjunction with the network device. In this embodiment, only the network device is used as an example to illustrate the implementation of the corresponding functions of the network device.

[0091] Figure 4 illustrates the basic process of wireless communication. As shown in Figure 4, at the signal transmitting end, the signal source sequentially undergoes source coding, channel coding, and digital modulation before being transmitted. At the signal receiving end, the received signal undergoes digital demodulation, channel decoding, and source decoding before being output to the destination. Among these processes, channel coding and decoding are one of the core technologies in the field of wireless communication.

[0092] The channel coding or decoding methods provided in this application can be used in dedicated network devices or general-purpose devices, and can be applied to the various network devices (e.g., base stations) and the various terminal devices mentioned above. Specifically, the channel coding scheme is mainly implemented by the channel coding unit (e.g., encoder or device that supports the coding device to perform the corresponding function) in these devices; the channel decoding scheme is mainly implemented by the channel decoding unit (e.g., decoder or device that supports the decoding device to perform the corresponding function) in these devices.

[0093] Optionally, the functions of the encoding or decoding device can be implemented by application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or by software (e.g., computer program code or instructions in memory), or by a combination of both, without limitation.

[0094] The channel coding or channel decoding methods provided in this application are described in detail below.

[0095] Figure 5 is a schematic flowchart of the channel coding or decoding method 200 provided in this application. Method 200 relates to an encoding method, which can be implemented by an encoding-side device (or an information transmitting-side device) performing steps 210-240. The encoding-side device can be an encoding device or a device applied to an encoding device (e.g., a chip, processor, or circuit), and is not limited thereto. Optionally, method 200 also relates to a decoding method, which can be implemented by a decoding-side device (or an information receiving-side device) performing steps 250-280. The decoding-side device can be a decoding device or a device applied to a decoding device (e.g., a chip, processor, or circuit). In the following embodiments, a first device and a second device are used as examples of an encoding-side device and a decoding-side device, respectively, for illustration.

[0096] 210. The first device obtains a first basis matrix, which contains X rows and Y columns, where X and Y are both positive integers.

[0097] The first basis matrix corresponds to the second basis matrix. The first basis matrix includes a first column and a second column, which correspond to the third and fourth columns of the second basis matrix, respectively. The absolute value of the difference between the column weights of the first and second columns is less than the absolute value of the difference between the column weights of the third and fourth columns. The first and second basis matrices have the same size; that is, the second basis matrix also contains X rows and Y columns. The first and second columns belong to column set Q, which contains at least two columns from the Y columns of the first basis matrix. As mentioned above, the first column corresponds to the third column, and the second column corresponds to the fourth column. Therefore, the elements of the first and third columns are identical in all row regions outside the row region corresponding to the row set R, and the elements of the second and fourth columns are identical in all row regions outside the row region corresponding to the row set R. The row set R contains at least one row from the X rows.

[0098] Optionally, the column set Q contains at least two columns that are either consecutive or non-consecutive in the first or second base matrix. Alternatively, the column set Q contains at least two column indices that correspond one-to-one with at least two columns that are either consecutive or non-consecutive in the first or second base matrix.

[0099] Optionally, the row set R contains one or more rows from the X rows of the first or second basis matrix. When the row set R contains multiple rows, these multiple rows may be consecutive or non-consecutive in the first basis matrix. Alternatively, the row set R contains one or more row indices. When it contains multiple row indices, the multiple rows corresponding to these multiple row indices may be consecutive or non-consecutive in the first or second basis matrix.

[0100] Therefore, the column region corresponding to the column set Q can be a continuous column region in the first base matrix, or it can consist of multiple non-contiguous sub-regions, each of which may contain one or more columns. As an example, the number of columns in the column set Q is even. Similarly, when the row set R contains multiple rows, the row region corresponding to the row set R can be a continuous row in the first base matrix, or it can consist of multiple non-contiguous sub-regions, each of which may contain one or more rows.

[0101] The elements in the first and third columns are the same in all other row regions outside the row region corresponding to the row set R, and the elements in the second and fourth columns are the same in all other row regions outside the row region corresponding to the row set R.

[0102] In this embodiment, the first column is a column in the first basis matrix, and the third column is a column in the second basis matrix. Therefore, the elements in the corresponding regions of the first and third columns refer to the elements in the corresponding regions of the first column in the first basis matrix and the elements in the corresponding regions of the third column in the second basis matrix. Similarly, the elements in the corresponding regions of the second and fourth columns refer to the elements in the corresponding regions of the second column in the first basis matrix and the elements in the corresponding regions of the fourth column in the second basis matrix, respectively.

[0103] Figure 6 is a schematic diagram of the base matrix according to an embodiment of this application. As shown in Figure 6, comparing the first column of the first base matrix and the third column of the second base matrix, the column indices of the first and third columns are the same, and the elements in other regions outside the row region corresponding to the row set R are the same. In Figure 6, the row region corresponding to the first or third column in the row set R is the region marked "2", and the other regions outside the row region corresponding to the first or third column in the row set R include the regions marked "1" and the regions marked "3". It should be understood that Figure 6 only uses the example of column set Q containing two columns and row region corresponding to row set R containing multiple consecutive rows. Column set Q can contain two or more columns from column Y of the base matrix. Row set R can contain one row, or multiple non-consecutive rows, etc., without limitation.

[0104] As an example, the second basis matrix can be any element of the following matrix:

[0105] BG1 of the LDPC code in NR;

[0106] The BG1 submatrix of the LDPC code in NR;

[0107] BG2 of the LDPC code in NR;

[0108] The BG2 submatrix of the LDPC code in NR;

[0109] Other basis matrices or their submatrices used for LDPC codes.

[0110] The submatrix of BG1 / BG2 refers to the submatrix extracted from BG1 / BG2 based on different bitrates (as shown by the dashed boxes in Figure 2, different dashed boxes correspond to submatrixes with different bitrates).

[0111] In one implementation, the first basis matrix may be pre-stored. In step 210, the first device obtains the first basis matrix, specifically by obtaining the pre-stored first basis matrix. Compared with the second basis matrix, the first basis matrix and the second basis matrix satisfy the above-mentioned characteristics in the row region corresponding to the row set R and the column region corresponding to the column set Q. For example, a certain column (e.g., the first column or the second column) in the first basis matrix belonging to the column set Q has the same elements in other row regions outside the row region corresponding to the row set R as the corresponding column (e.g., the third column or the fourth column) in the second basis matrix; and the absolute value of the difference between the column weight of the first column and the column weight of the second column in the column set Q of the first basis matrix is ​​less than the absolute value of the difference between the column weight of the third column and the column weight of the fourth column in the second basis matrix.

[0112] In the embodiments of this application, "first column," "second column," etc., simply refer to any two columns belonging to column set Q in the first base matrix. The designations "first" and "second" are merely for ease of description and do not represent the first or second column of the first base matrix in column index order. The third or fourth column is similar and will not be described further.

[0113] In another implementation, the first basis matrix can be obtained by modifying the second basis matrix. In this implementation, in step 210, the first device obtains the first basis matrix by modifying the second basis matrix based on a first rule. The first rule may include: swapping elements at corresponding positions in at least two columns contained in the column set Q within the row region corresponding to the row set R.

[0114] Figure 7 is a schematic diagram of a method for obtaining a first basis matrix. As shown in Figure 7, the first device obtains a second basis matrix by swapping the elements at corresponding positions of at least two columns contained in the column set Q within the row region corresponding to the row set R. For example, the column set Q contains two columns, and the row region corresponding to the row set R contains multiple rows. In each of these multiple rows, the elements of the two columns are swapped respectively. The new matrix obtained after the swap is the first basis matrix. It should be understood that the above-mentioned "swapping the elements at corresponding positions of at least two columns" refers to the elements at the same row index in the two columns. As an example, when the row set R contains one row, there is only one set of corresponding positions in the two columns, and the two elements corresponding to the corresponding positions in this set are swapped. For example, if column set Q contains columns with column indices 11 and 12, and row set R contains a row with row index 5, then the "corresponding position" refers to the element in the row with row index 5 for each of the columns with column indices 11 and 12. Therefore, the element corresponding to (row index 5, column index 11) and the two elements in (row index 5, column index 12) are swapped. When row set R contains more than one row, there are multiple sets of corresponding positions in these two columns. For example, if column set Q contains columns with column indices 11 and 12, and row set R contains rows with row indices 5 to 10, then the "corresponding position" refers to the element in the rows with row indices 5 to 10 for each of the columns with column indices 11 and 12. Each row corresponds to one set of corresponding positions, and there are 6 rows corresponding to row indices 5 to 10. Therefore, there are 6 sets of corresponding positions for the two columns with column indices 11 and 12. Specifically, the two elements in each of these 6 sets of corresponding positions are swapped. As can be seen, the corresponding position refers to the position where the row indices of the two columns are the same. When the column set Q contains more than two columns, since every two columns are swapped, the two swapped columns are grouped together, and their corresponding positions in each row of the row set R are swapped.

[0115] As mentioned above, in one implementation, the number of columns in column set Q is even; therefore, the columns in column set Q are grouped in pairs. For the second basis matrix, the two columns belonging to the same group in column set Q are swapped, and their corresponding elements in the row region of the row set R are exchanged. The third and fourth columns of the second basis matrix described above can be seen as an example of two columns belonging to the same group. After the swap, the first basis matrix is ​​obtained. The column index of the third column corresponds to the first column in the first basis matrix, and the column index of the fourth column corresponds to the second column in the first basis matrix; that is, the first column corresponds to the third column, and the second column corresponds to the fourth column.

[0116] The determination of the row region corresponding to the row set R and the column region corresponding to the column set Q will be described in detail in the following examples.

[0117] 220. The first device determines the first matrix based on the first basis matrix and the translation values ​​corresponding to the elements in the first basis matrix.

[0118] In step 220, the first device is based on the boost value Z c Expand each element of the first basis matrix into a matrix of the corresponding size, specifically Z. c ×Z c The matrix is ​​obtained by cyclically shifting the elements whose translation values ​​(or offset values ​​or cyclic shift values, etc.) are non-zero, thus obtaining the first matrix.

[0119] The method by which the first device obtains the translation values ​​of the elements in the first basis matrix is ​​described in the following embodiments.

[0120] 230. The first device encodes based on the first matrix to obtain an encoded bit sequence.

[0121] 240. The first device outputs the encoded bit sequence.

[0122] After encoding is complete, the first device outputs the encoded bit sequence.

[0123] Optionally, method 200 may also include a decoding method on the decoding side, as described in steps 250-280 below.

[0124] 250. The second device acquires the first basis matrix.

[0125] See the explanation in step 210, which will not be repeated here.

[0126] 260. The second device determines the first matrix based on the first basis matrix and the translation values ​​corresponding to the elements in the first basis matrix.

[0127] See the instructions in step 220.

[0128] 270. The second device decodes the received value sequence based on the first matrix to obtain the decoded bit sequence.

[0129] The received value sequence can be: the encoded bit sequence output by the encoding side after channel transmission, or the received message at the decoding side.

[0130] 280. The second device outputs the decoded bit sequence.

[0131] The characteristics of the first basis matrix provided in this application have been described above. Applying the first basis matrix to LDPC can significantly reduce error planes under different code lengths and code rates.

[0132] The first basis matrix provided in this application differs from the basis matrices in existing schemes (corresponding to the second basis matrices, such as BG1 and BG2 in 5G systems). In one of the aforementioned implementations, the first basis matrix can be obtained by modifying the second basis matrix. For example, the first basis matrix is ​​obtained by swapping the elements at corresponding positions in the row regions corresponding to the columns belonging to column set Q in the second basis matrix. The following describes how to determine the column set Q and the row set R, or in other words, which columns in the second basis matrix are swapped, and specifically which rows' elements are swapped, if the method of modifying the second basis matrix to obtain the first basis matrix is ​​used; or, compared to the second basis matrix, the elements at these positions corresponding to the columns belonging to column set Q and the rows belonging to row set R in the first basis matrix provided in this application satisfy certain characteristics, enabling LDPC based on this basis matrix to achieve a wide range of error reduction performance.

[0133] The row set R and column set Q are explained below.

[0134] (1) The row region corresponding to row set R

[0135] In one implementation, the row region corresponding to the row set R is related to the partitioning of the region of the first basis matrix, or in other words, to the partitioning of the submatrices of the first basis matrix.

[0136] Figure 8 shows an example of a region partitioning of the basis matrix provided in this application. As shown in Figure 8, the first basis matrix includes submatrix A, submatrix B, submatrix C, submatrix D, and submatrix E, wherein:

[0137] Submatrix A is the first x1th row and the first y1th column of the first basis matrix;

[0138] Submatrix B is the first to x1 rows and the y1+1 to y2 columns of the first basis matrix;

[0139] Submatrix C is the first to x1 rows and the y2+1 to Y columns of the first basis matrix;

[0140] Submatrix D is the x1+1 to Xth row and the 1 to y2th column of the first basis matrix;

[0141] Submatrix E is the x1+1 to Xth row and y2+1 to Yth column of the first basis matrix;

[0142] Columns 1 to y1 are called information columns, columns y1+1 to y2 are called core check columns, columns 1 to y2 are called core columns, and columns y2+1 to Y are called extended check columns. The regions corresponding to submatrix B and submatrix E are both check regions, hereinafter referred to as region B and region E, respectively. Region B can be defined as a core check region; it can be a non-lower triangular coding region, or a coding region with a column weight greater than 1. Region E is defined as a lower triangular coding region, or a diagonal matrix.

[0143] Based on the above division of the first base matrix into regions, the row region corresponding to the row set R is located within the range of the x1+1 to Xth row of the submatrix D, where 1≤x1≤X, 1≤y1≤y2≤Y, and x1, y1, and y2 are all integers.

[0144] In one example, the range of the row region corresponding to the row set R is smaller than the range of the row region corresponding to the submatrix D, as shown in Figure 9.

[0145] Figure 9 shows an example of the row region corresponding to the row set R in an embodiment of this application. As shown in Figure 9, the row region corresponding to the row set R is contained in the row regions corresponding to rows x1+1 to X of the first base matrix. The region corresponding to the submatrix D can be called the extended region. In this embodiment, the extended region refers to a region where the column set is the core column (wherein, the information column and the core check column constitute the core column), and the row set is the check row corresponding to the raptor-like check bits (non-core check bits).

[0146] As mentioned above, the elements in the row regions outside the row region corresponding to row region R of the first and third columns are the same, and the elements in the row regions outside the row region corresponding to row region R of the second and fourth columns are the same. In other words, the first basis matrix can be obtained by locally swapping some columns of the second basis matrix. During the swapping process, only the elements of the columns of the second basis matrix belonging to column set Q at the phase positions in the row region corresponding to row region R are swapped. The elements in the third and fourth columns outside the row region corresponding to row set R remain unchanged, as shown in Figure 10. When the row region corresponding to row set R is located within the range of row x1+1 to X, the elements in other regions outside the row region of each column in column set Q remain unchanged, as shown in Figure 10.

[0147] Figure 10 is a schematic diagram of the method for obtaining the basis matrix provided in this application. In Figure 10, taking the row region corresponding to the row set R as an example, which is located within the range of rows x1+1 to X of the second basis matrix, the two columns contained in the column set Q belong to the column region corresponding to the submatrix B. When performing a local exchange on some columns of the second basis matrix (specifically, the two columns contained in the column set Q) (specifically, the exchange is performed within the row region corresponding to the row set R), the elements at the phase positions of each row in the row set R of these two columns are interchanged, but the elements at the corresponding positions outside the row region remain unchanged. After the exchange, the first basis matrix is ​​obtained.

[0148] Figure 11 is another schematic diagram of the row region corresponding to the row set R provided in this application. As shown in Figure 11, the row region corresponding to the row set R can be the row region corresponding to the submatrix D, or in other words, the row region corresponding to the row set R completely overlaps with the row region corresponding to the submatrix D. It should be understood that in Figure 11, the column region corresponding to the column set Q is part of the column region corresponding to the submatrix B.

[0149] As an example, suppose the row set R is the row set corresponding to the extended region of the first basis matrix, and the row set R is divided into s groups, R1∪…∪R s =R, In this case, increasing i corresponds to a decrease in the code rate, i.e., R i The order is strictly in accordance with the row index order of the parity matrix. As i increases, the number of columns swapped generally decreases.

[0150] In one implementation, the row set R contains at least one row, which contains a first row corresponding to a first threshold. The first threshold is an upper limit threshold for the number of columns in the Y column of the first basis matrix corresponding to the first row that belong to the column set Q. The first threshold is related to one or more of the following information:

[0151] Current bitrate;

[0152] Line weight in the first line;

[0153] The row weight of the remaining columns in the first row, excluding the columns with punched holes;

[0154] The connection structure between the first row and the punched column includes: the first row is not connected to any of the punched columns, or the first row is connected to at least one of the punched columns.

[0155] Taking BG1 or BG2 in a 5G system as an example, the columns that are punched are the first two columns of the base matrix. Therefore, the connection structure between the first column and the two columns that are punched includes one of the following cases: the first row is connected to both columns that are punched, the first row is connected to one of the two columns that are punched, or the first row is not connected to either of the two columns that are punched.

[0156] In other words, the number of columns swapped in each row of the row set R is less than a threshold α, which is determined based on one or more of the information mentioned above.

[0157] In one implementation, the number of columns swapped within the row region corresponding to the row set R can be segmented according to the row index.

[0158] As an example, a row set R contains at least two rows, which are divided into at least two segments. Each of these segments corresponds to at least two thresholds. The threshold corresponding to the second segment of the at least two segments indicates the upper limit threshold of the number of columns in column Y of the first base matrix corresponding to the second segment that belong to column set Q. The second segment is any one of the at least two segments, and the first threshold corresponding to the first row is the threshold corresponding to the first segment to which the first row belongs. For example, suppose the row set R includes row indices i1, i2, and i3. Rows with row indices less than i1 belong to segment 1, rows with row indices greater than or equal to i1 and less than i2 belong to segment 2, and rows with row indices greater than or equal to i2 and less than i3 belong to segment 3. The number of columns exchanged in each segment can be a fixed value, and the number of columns exchanged in each segment decreases as the segment index increases. As an example, segments 1, 2, and 3 correspond to thresholds α of 2, 1, and 0, respectively. Then the number of columns exchanged in the three segments are 2, 1, and 0, respectively. If there are rows in the row set R with row indices greater than i3, then the number of columns swapped in these rows is 0.

[0159] Taking a row set R containing at least two rows as an example, these at least two rows are divided into at least two segments, where the index of the second segment is greater than the index of the first segment, the threshold corresponding to the second segment is less than the threshold corresponding to the first segment, and the first and second segments are any two segments from the at least two segments. In other words, as the segment index increases, the number of columns swapped corresponding to each segment decreases.

[0160] Figure 12 illustrates the number of columns swapped based on segmentation. As shown in Figure 12, the row set R corresponds to the row region of the submatrix D. The row region corresponding to the row set R is divided into multiple segments, including segment 1, segment 2, segment 3, etc. Segment 1 has 2 swapped columns; for example, the column labeled 1 is swapped with the column labeled 2, and the column labeled 3 is swapped with the column labeled 4. Segment 2 has 1 swapped column; for example, the column labeled 1 is swapped with the column labeled 2. Segment 3 has 0 swapped columns. The number of swapped columns in segments after segment 3 is 0.

[0161] (2) The column range corresponding to column set Q

[0162] Taking the exchange of a local column in the second basis matrix to obtain the first basis matrix as an example, the column set Q is characterized by a more regular column weight after the exchange. That is, the column weight of the first basis matrix is ​​more regular than that of the second basis matrix. Specifically, if we exchange the elements at corresponding positions in the row regions corresponding to the third and fourth columns of the second basis matrix in the row set R, before the exchange, the absolute value of the difference between the column weights of the third and fourth columns is 1. After the exchange, we obtain the first basis matrix, where the absolute value of the difference between the column weights of the first and second columns is 2, which is less than 1. As mentioned above, the first and second basis matrices are of equal size, the column index of the first column in the first basis matrix is ​​the same as the column index of the third column in the second basis matrix, and the column index of the second column in the first basis matrix is ​​the same as the column index of the fourth column in the second basis matrix.

[0163] Assume the first column corresponds to column index Y1 in the first base matrix, and the third column corresponds to column index Y1 in the second base matrix, where 1 ≤ Y1 ≤ Y, and Y1 is an integer.

[0164] In one implementation, the column weight of the third column within the row region corresponding to the row set R is d1, and the column weight of the column in other regions outside the row region is d′1. The column weight of the first column within the row region corresponding to the row set R is d2, and the column weight of the column in other regions outside the row region is d′2, wherein d1 is not less than d2, and d′1 is greater than d′2.

[0165] As examples, d1, d′1, d2, and d′2 satisfy any one of the following conditions:

[0166] d1>d2 and d′1>d′2; or,

[0167] d1>d2 and d′1>2d′2; or,

[0168] d1 = d2 and d′1 > d′2; or,

[0169] d1 = d2 and d′1 > 2d′2.

[0170] Figure 13 is a schematic diagram illustrating the characteristics of the column set Q. As shown in Figure 13, the example of obtaining the first basis matrix by modifying the second basis matrix is ​​used for illustration. Before swapping the row regions corresponding to the third and fourth columns of the second basis matrix in the row set R, the column weight of the third column within the row region is greater than that of the fourth column within the row region, and the column weight of the third column outside the row region is greater than that of the fourth column outside the row region. After the swap, the first basis matrix is ​​obtained. The absolute value of the difference between the column weight of the first column and the column weight of the second column in the first basis matrix is ​​less than the absolute value of the difference between the column weight of the third column and the column weight of the fourth column in the second basis matrix before the swap.

[0171] In another implementation, the selection of the column set is related to the connectivity of the extended check nodes. For example, the column weight of the third column outside the lower triangular check row of the second base matrix is ​​d1, the column weight of the lower triangular check row of the second base matrix is ​​d′1, and / or the row weight of the third column in other regions besides the row region corresponding to row set R is d′1. The column weight of the first column outside the lower triangular check row of the first base matrix is ​​d2, the column weight of the lower triangular check row of the first base matrix is ​​d′2, and / or the row weight of the first column in other regions besides the row region corresponding to row set R is d′2, where d1>d2 and d′1>d′2 are satisfied. The lower triangular check row can have a connection to the lower triangle of the region corresponding to the extended check column in submatrix E, or the column weight of the extended check column is greater than 1.

[0172] Alternatively, d′1>2d′2.

[0173] Figure 14 is a schematic diagram illustrating the characteristics satisfied by the column region corresponding to column set Q. As shown in Figure 14, as previously described, the region corresponding to submatrix E of the first or second basis matrix can be a lower triangular matrix. The lower triangular check rows are associated with more than one column in the extended check column set (i.e., the column set corresponding to submatrix E). In the example in Figure 14, submatrix E contains columns 15-20 and rows 5-10 of the first or second basis matrix. Taking the row index range of the first basis matrix as 0-9 as an example, the rows corresponding to row indices 6 and 8 (corresponding to rows 3 and 5 of submatrix E) are the lower triangular check rows, as marked by the dashed boxes in Figure 14.

[0174] In one implementation, the columns in the first basis matrix that are included in the column set Q can be determined based on the types of the columns in the first basis matrix. Some examples are given below.

[0175] As an example, the columns in column set Q fall within the range of the information columns corresponding to submatrix A and the core verification columns corresponding to submatrix B. For instance, column set Q contains at least one column from the core verification columns of the first base matrix. That is, column set Q contains at least one column from the column region corresponding to submatrix B. As an example, at least one column from the column region corresponding to submatrix B contained in column set Q may include:

[0176] The columns with an even number of column weights in the column region corresponding to submatrix B; and / or,

[0177] The column with the smallest column weight in the column region corresponding to submatrix B.

[0178] For ease of description, assume that the column index of the column belonging to the column region corresponding to the submatrix B in the column set Q is Y2 (or column x0).

[0179] In another example, the column weight of the column with index Y2 in the first base matrix is ​​greater than the column weight of the column with index Y2 in the second base matrix. In other words, if submatrix B of the second base matrix contains the column with index Y2, after column swapping, the column weight of the column with index Y2 increases.

[0180] In another example, column set Q contains the column with column index Y2, and also contains the column with column index Y3 in the column region corresponding to submatrix B. The column with column index Y3 is an odd-weighted column. The column weight of the column with column index Y3 in the first base matrix is ​​less than the column weight of the column with column index Y3 in the second base matrix. In other words, submatrix B of the second base matrix contains both the column with column index Y2 and the column with column index Y3. After column swapping, the column weight of the column with column index Y2 increases, and the column weight of the column with column index Y3 decreases.

[0181] In another example, the column set Q contains columns that are all columns with an even weight in the column region corresponding to the submatrix B.

[0182] In another example, column set Q contains at least one column from the column region corresponding to submatrix A and at least one column from the column region corresponding to submatrix B. The column weight of at least one column from the column region corresponding to submatrix A in the first basis matrix is ​​less than the column weight of at least one column from the column region corresponding to submatrix A in the second basis matrix; and the column weight of at least one column from the column region corresponding to submatrix B in the first basis matrix is ​​greater than the column weight of at least one column from the column region corresponding to submatrix B in the second basis matrix. Alternatively, after performing the above column swap on the second basis matrix, the first basis matrix is ​​obtained, where the column weight of the information columns contained in column set Q decreases, and the column weight of the columns belonging to the column region corresponding to submatrix B contained in column set Q increases.

[0183] In another implementation, region B of the base matrix has an irregular repeat-accumulate (IRA) structure, but the shift value is not an IRA feature; instead, it is obtained using calculation method 1. The shift value feature of the IRA itself can be called calculation method 2. In one example, the column set Q contains a column with column index Y2 (or the aforementioned column x0), which can be a double column of the IRA.

[0184] In step 220 or 260 above, before determining the first matrix based on the first basis matrix and the translation values ​​corresponding to the elements in the first basis matrix, the first device or the second device obtains the translation values ​​corresponding to the elements in the first basis matrix. As an example, the following implementation is possible.

[0185] In one implementation, the translation values ​​of the elements in the first basis matrix are determined based on the translation values ​​of the elements in the second basis matrix. As an example, the first column of the first basis matrix includes a first element, which corresponds to row index i and column index j in the first basis matrix. Row index i belongs to any row of the row region corresponding to row set R, and column index j belongs to any column of the column region corresponding to column set Q. The translation value corresponding to the first element is the same as the translation value corresponding to the second element in the second basis matrix. The second element is the element corresponding to row index i and column index k in the second basis matrix, where column index k indicates the index of the second column. In this implementation, the first column and the second column of the first basis matrix are the first column and the second column described in the above embodiment, respectively.

[0186] Figure 15 illustrates an example of obtaining the translation values ​​corresponding to the elements of the first basis matrix based on an embodiment of this application. As shown in Figure 15, taking the modification of the second basis matrix to obtain the first basis matrix as an example, the method for obtaining the translation values ​​corresponding to the elements in the first basis matrix is ​​illustrated. For instance, the two columns corresponding to the identifiers "3" and "4" in the second basis matrix have their elements swapped in the row region corresponding to the row set R. After the swap, the translation values ​​corresponding to each position in the row region corresponding to the identifiers "3" and "4" (i.e., the first basis matrix below) are also swapped along with the elements. For example, after the swap, the first basis matrix is ​​obtained, where the translation values ​​corresponding to the 6 elements in the row region corresponding to the identifier "2" are one-to-one correspondences with and equal to the translation values ​​corresponding to the 6 positions in the row region corresponding to the identifier "3"; the translation values ​​corresponding to the 6 elements in the row region corresponding to the identifier "1" are one-to-one correspondences with and equal to the translation values ​​corresponding to the 6 positions in the row region corresponding to the identifier "4".

[0187] Taking Figure 15 as an example, it can be seen that the first element can be any element in the row region corresponding to the column of the row set R that identifies "1". As an example, the position of the first element is row index 5 and column index 11. The translation value of the first element is the translation value of the element with row index 5 and column index 12 (an example of column index k) in the second base matrix.

[0188] As mentioned above, the elements of the first and second basis matrices outside the column region corresponding to column set Q and the row region corresponding to row set R can be the same, and the translation values ​​corresponding to these elements are also the same.

[0189] In another implementation, the first device determines the translation values ​​corresponding to the elements of the first basis matrix at each position in the first position set based on at least one sequence. The first position set is the set of positions indicated by the first basis matrix in the column region corresponding to the column set Q and the row region corresponding to the row set R. The first position set includes the first position, and the translation values ​​corresponding to the elements of the first position are determined based on the correspondence between the at least one sequence and the rows and / or columns of the first basis matrix.

[0190] As an example, the at least one sequence includes a first sequence, in which elements P(i,j) correspond to row indices i and column indices j in a first base matrix, and the shift value corresponding to the element at the first position in the first base matrix is ​​determined based on element P(i,j). For example, the element at the first position corresponds to a combination of row indices i and column indices j in the first base matrix, and the shift value corresponding to the element at the first position can be the value of element P(i,j) in the first sequence.

[0191] As another example, the at least one sequence includes a first sequence and a second sequence, where an element R(i) in the first sequence corresponds to a row index i in a first base matrix, and an element C(j) in the second sequence corresponds to a column index j in the first base matrix. The shift value corresponding to the element at the first position is determined based on R(i) and C(j), where i and j are both integers. For example, the shift value can be R(i)*C(j) or R(i)*C(j). 2 Alternatively, the shift value can be R(i) + C(j), or it can be the result of the above calculations modulo a prime number. For example, the shift value can be (i) * C(j) mod p, where p is a prime number.

[0192] Figure 16 illustrates another example of obtaining the translation values ​​corresponding to the elements of the first basis matrix based on an embodiment of this application. As shown in Figure 16, taking the modification of the second basis matrix to obtain the first basis matrix as an example, before some columns of the second basis matrix are swapped in the row region corresponding to the row set R, the translation value corresponding to each element in the second basis matrix is ​​determined according to at least one sequence. As an example, the at least one sequence includes sequence 1 and sequence 2, where sequence 1 corresponds to the row index of the basis matrix and sequence 2 corresponds to the column index of the basis matrix. Each element in the second basis matrix corresponds to a combination of row index i and column index j, where row index i corresponds to an element in sequence 1 and column index j corresponds to an element in sequence 2. Based on the method described in the above embodiment, some columns of the second basis matrix are swapped in the row region corresponding to the row set R to obtain the first basis matrix. The translation value corresponding to each element in the first basis matrix can still be determined by sequence 1 and sequence 2. Each element in the first basis matrix corresponds to a combination of row index i and column index j, where row index i corresponds to an element in sequence 1 and column index j corresponds to an element in sequence 2. After the swap, the elements in sequence 2 can be swapped along with the columns, or they can remain unchanged; there is no restriction. For example, in Figure 16, columns 12 and 13 of the second basis matrix are swapped within the row region corresponding to row set R. Column 12 corresponds to element 12 in sequence 2, and column 13 corresponds to element 13 in sequence 2. After the swap, in the first example, the positions of elements 12 and 13 in sequence 2 are swapped along with these two columns; in the second example, the positions of elements 12 and 13 in sequence 2 are not swapped along with these two columns, but remain unchanged.

[0193] The above is a detailed description of the encoding or decoding method provided in this application. Based on the base matrix provided in this application (such as the first base matrix in the above embodiment), a parity check matrix is ​​obtained by expanding it. Applying this parity check matrix to the encoding or decoding of LDPC can generally reduce the error level.

[0194] Figure 17 shows the performance simulation results of the basis matrix provided in this application and NR's BG2 when applied to coding at different code rates. Figure 17(a) compares the performance when the code length N = 1280 and the information length K = 640, and Figure 17(b) compares the performance when the code length N = 1472 and the information length K = 640. The horizontal axis represents the signal-to-noise ratio, specifically the ratio of bit energy to noise power spectral density, denoted as EsN0; the vertical axis represents the block error rate (BLER). It can be seen that, under different code lengths and code rates, the basis matrix provided in this application reduces the error plane compared to NR's BG2. Furthermore, in Figure 17, the basis matrix of the existing scheme uses NR's BG2 as an example. In fact, the basis matrix provided in this application, compared to the basis matrices in existing schemes, such as BG1 and the basis matrices of LDPC involved in other standards besides NR, has a wide range of performance in reducing the error plane.

[0195] It should be noted that the values ​​of the elements in the basis matrix shown in the accompanying drawings of the above embodiments are only examples and are not limited to the design of the elements in the basis matrix as shown in the accompanying drawings.

[0196] The communication device provided in this application is described below.

[0197] Figure 18 is a schematic structural diagram of the communication device 1000 provided in this application. The communication device 1000 can be an encoding-side device, or a device applied to the encoding-side device and capable of implementing the corresponding functions of the encoding-side device in the method embodiments of this application, such as a chip, processor, or circuit. Alternatively, the communication device 1000 can be a decoding-side device, or a device applied to the decoding-side device and capable of implementing the corresponding functions of the decoding-side device in the method embodiments of this application, such as a chip, processor, or circuit.

[0198] Optionally, the communication device 1000 includes a processing module 1001, which may be a processor, a processing board, a processing unit, or a processing device, etc. When the communication device 1000 is an encoding-side device or a device applied to an encoding-side device, the processing module 1001 is used to: obtain a first base matrix; determine a first matrix based on the first base matrix and the translation values ​​corresponding to the elements in the first base matrix; and encode based on the first matrix to obtain an encoded bit sequence, etc. Specific processes can be found in the detailed descriptions of the corresponding steps in the method embodiments, and will not be repeated here. When the communication device 1000 is a decoding-side device or a device applied to a decoding-side device, the processing module 1001 is used to: obtain a first base matrix; determine a first matrix based on the first base matrix and the translation values ​​corresponding to the elements in the first base matrix; and decode the received value sequence based on the first matrix to obtain a decoded bit sequence, etc. Specific processes can be found in the detailed descriptions of the corresponding steps in the method embodiments, and will not be repeated here.

[0199] Optionally, the communication device 1000 further includes a communication module 1002, which may also be referred to as a transceiver module, transceiver, transceiver unit, or transceiver device, etc., for performing receiving (or input) and / or sending (or output) operations. For example, when the communication device 1000 is an encoding-side device or a device applied to an encoding-side device, the communication module 1002 can be used to acquire a bit sequence to be encoded and transmit the bit sequence to be encoded to the processing module 1001; and output the encoded bit sequence obtained by the processing module 1001. When the communication device 1000 is a decoding-side device or a device applied to a decoding-side device, the communication module 1002 can be used to receive a received value sequence and send the received value sequence to the processing module 1001; and output the decoded bit sequence obtained by the processing module 1001 decoding the received value sequence. Furthermore, it should be noted that the aforementioned communication module and / or processing module can be implemented through virtual modules. For example, the processing module can be implemented through a software functional unit or a virtual device, and the communication module can be implemented through a software function or a virtual device. Alternatively, the processing module or communication module can also be implemented by a physical device, such as a chip / circuit (e.g., an integrated circuit or logic circuit). The communication module can be an input / output circuit and / or a communication interface, performing input operations (corresponding to the aforementioned receiving operation) and output operations (corresponding to the aforementioned sending operation); the processing module is an integrated processor, microprocessor, or circuit (e.g., an integrated circuit, logic circuit).

[0200] The module division in this application is illustrative and represents only one logical functional division. In actual implementation, other division methods are possible. Furthermore, the functional modules in the various examples of this application can be integrated into a single processor, exist as separate physical entities, or be integrated into a single module. The integrated modules described above can be implemented in hardware, as software functional modules, or a combination of hardware and software.

[0201] Figure 19 is a schematic structural diagram of another communication device provided in this application. The communication device 1100 can be used to implement the functions of any communication device (e.g., an encoding-side device or a decoding-side device) in the communication system described in the foregoing examples. The communication device 1100 may include at least one processor 1110. Optionally, the processor 1110 (or processing device) is coupled to a memory, which may be located within the communication device, integrated with the processor, or located outside the communication device. For example, the communication device 1100 may also include at least one memory 1120. The memory 1120 stores computer programs, instructions, or data necessary for implementing any of the above method embodiments; the processor 1110 may execute the computer programs, instructions, or data stored in the memory 1120 to perform the corresponding functions of the encoding-side device or decoding-side device in any of the above embodiments.

[0202] Optionally, the communication device 1100 may further include a communication interface 1130, through which the communication device 1100 can interact with other devices. For example, the communication interface 1130 may be a transceiver, circuit, bus, module, pin, or other type of communication interface. When the communication device 1100 is a chip-type device or circuit, the communication interface 1130 in the device 1100 may also be an input / output circuit, capable of inputting information (or receiving information) and / or outputting information (or sending information). The processor may be an integrated circuit or logic circuit, etc., and the processor can determine the output information based on the input information.

[0203] The coupling in this application refers to indirect coupling or communication connection between devices, units, or modules, which can be electrical, mechanical, or other forms, used for information exchange between devices, units, or modules. The processor 1110 may operate in conjunction with the memory 1120 and the communication interface 1130. This application does not limit the connection medium between the processor 1110, the memory 1120, and the communication interface 1130.

[0204] Figure 20 is a schematic structural diagram of the chip provided in this application. Chip 30 includes circuit 31 and communication interface 32. Circuit 31 can be a logic circuit, integrated circuit, etc., and communication interface 32 can also be called input / output circuit, input / output interface, interface circuit, etc., which can input information (or receive information) or output information (or send information). Chip 30 can execute the methods executed by the encoding-side device or decoding-side device in the various embodiments of this application.

[0205] In addition, this application also provides a computer-readable storage medium storing computer instructions that, when executed on a computer, cause operations and / or processes performed by an encoding-side device or a decoding-side device in the various method embodiments of this application to be executed.

[0206] This application also provides a computer program product, which includes computer program code or instructions. When the computer program code or instructions are run on a computer, the operations and / or processes performed by the encoding-side device or decoding-side device in the various method embodiments of this application are executed.

[0207] Furthermore, this application also provides a chip including a processor. A memory for storing a computer program is provided independently of the chip, and the processor is used to execute the computer program stored in the memory, such that operations and / or processes performed by an encoding-side device or a decoding-side device in any method embodiment are executed. Further, the chip may also include a communication interface. The communication interface may be an input / output interface or an interface circuit, etc. Further, the chip may also include the memory.

[0208] This application provides a communication system, including the encoding-side device and decoding-side device in the above method embodiments.

[0209] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0210] In the embodiments of this application, "instruction" can include direct instruction, indirect instruction, explicit instruction, and implicit instruction. When describing a certain instruction information for instructing A, it can be understood that the instruction information carries A, which can be a direct instruction to A or an indirect instruction to A. Indirect instruction can refer to directly instructing B through the instruction information, and the correspondence between B and A, to achieve the purpose of instructing A through the instruction information. The correspondence between B and A can be predefined by the protocol, pre-stored, or obtained through configuration between network elements.

[0211] The processor in this application embodiment has signal processing capabilities and can be a central processing unit (CPU), or a general-purpose processor, digital signal processor (DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA), or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component. It can implement or execute the methods, steps, and logic block diagrams disclosed in this application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in this application can be directly embodied in the execution of the hardware processor, or executed by a combination of hardware and software modules within the processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory; the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above methods.

[0212] In the embodiments of this application, the memory can be volatile memory or non-volatile memory, or it can include both volatile and non-volatile memory. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM). The memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0213] The technical solutions provided in this application can be implemented in whole or in part through software, hardware, firmware, or any combination thereof. When implemented using software, they can be implemented in whole or in part as a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a terminal device, an access network device, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available media may be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., digital video discs (DVDs)), or semiconductor media, etc.

[0214] In the embodiments of this application, "at least one" refers to one or more items. "More than one" means two or more items. "And / or" is used to describe the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can represent three situations: A exists alone, A and B exist simultaneously, and B exists alone.

[0215] The term "comprising" and any variations thereof used in the embodiments of this application are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the steps or units listed, but may optionally include other steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.

[0216] In this application, examples may reference each other without logical contradiction. For example, methods and / or terms between method embodiments may reference each other, functions and / or terms between device embodiments may reference each other, and functions and / or terms between device examples and method examples may reference each other.

[0217] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0218] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0219] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0220] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0221] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0222] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. An encoding method, characterized in that, include: Obtain a first basis matrix, which corresponds to a second basis matrix. The first basis matrix includes a first column and a second column. The first column and the second column correspond to the third column and the fourth column of the second basis matrix, respectively. The absolute value of the difference between the column weight of the first column and the column weight of the second column is less than the absolute value of the difference between the column weight of the third column and the column weight of the fourth column. The second basis matrix is ​​a basis matrix applicable to a first condition, which is related to the code length and / or code rate. Both the second basis matrix and the first basis matrix contain X rows and Y columns. The first column and the second column belong to a column set Q. The column set Q contains at least two columns from the Y column. The elements of the first column and the third column are the same in other row regions outside the row region corresponding to the row set R. The elements of the second column and the fourth column are the same in other row regions outside the row region corresponding to the row set R. The row set R contains at least one row from the X rows. X and Y are both positive integers. The first matrix is ​​determined based on the first basis matrix and the translation values ​​corresponding to the elements in the first basis matrix; Encode the first matrix to obtain an encoded bit sequence; as well as, Output the encoded bit sequence.

2. A decoding method, characterized in that, include: Obtain a first basis matrix, which corresponds to a second basis matrix. The first basis matrix includes a first column and a second column. The first column and the second column correspond to the third column and the fourth column of the second basis matrix, respectively. The absolute value of the difference between the column weight of the first column and the column weight of the second column is less than the absolute value of the difference between the column weight of the third column and the column weight of the fourth column. The second basis matrix is ​​a basis matrix applicable to a first condition, which is related to the code length and / or code rate. Both the first basis matrix and the second basis matrix contain X rows and Y columns. The first column and the second column belong to a column set Q. The column set Q contains at least two columns from the Y column. The first column and the third column have the same elements in other row regions outside the row region corresponding to the row set R. The second column and the fourth column have the same elements in other row regions outside the row region corresponding to the row set R. The row set R contains at least one row from the X rows. X and Y are both positive integers. The first matrix is ​​determined based on the first basis matrix and the translation values ​​corresponding to the elements in the first basis matrix; Based on the first matrix, the received value sequence is decoded to obtain the decoded bit sequence; as well as, Output the decoded bit sequence.

3. The method according to claim 1 or 2, characterized in that, The process of obtaining the first basis matrix includes: Based on the first rule, the second base matrix is ​​modified to obtain the first base matrix, wherein the first rule includes: swapping the elements at corresponding positions of at least two columns contained in the column set Q within the row region corresponding to the row set R.

4. The method according to any one of claims 1 to 3, characterized in that, The first basis matrix includes submatrix A, submatrix B, submatrix C, submatrix D, and submatrix E, where: The submatrix A is the first to x1 rows and the first to y1 columns of the first base matrix; The submatrix B is the first to x1 rows and the y1+1 to y2 columns of the first base matrix; The submatrix C is the first to x1 rows and the y2+1 to Y columns of the first base matrix; The submatrix D is the x1+1 to Xth row and the 1st to y2th column of the first basis matrix; The submatrix E is the x1+1 to Xth row and y2+1 to Yth column of the first basis matrix; The row region corresponding to the row set R is located within the range of the x1+1 to Xth rows corresponding to the submatrix D; and, 1≤x1≤X, 1≤y1≤y2≤Y, where x1, y1, and y2 are all integers.

5. The method according to any one of claims 1 to 4, characterized in that, The row set R contains at least one row, which includes a first row. This first row corresponds to a first threshold, which is an upper limit threshold for the number of columns in the Y column of the first base matrix corresponding to the first row that belong to the column set Q. The first threshold is related to one or more of the following information: Current bitrate; The line density of the first row; The row weight of the remaining columns in the first row, excluding the columns with punched holes; The connection structure between the first row and the punched column includes one of the following: the first row is not connected to any of the punched columns, or the first row is connected to at least one of the punched columns.

6. The method according to any one of claims 1 to 5, characterized in that, The row set R contains at least two rows, which are divided into at least two segments. Each of the at least two segments corresponds to at least two thresholds. The threshold corresponding to the second segment of the at least two segments indicates the upper limit threshold of the number of columns belonging to the column set Q in the Y column of the first base matrix corresponding to the second segment. The second segment is any one of the at least two segments, and the first threshold corresponding to the first row is the threshold corresponding to the first segment to which the first row belongs.

7. The method according to claim 6, characterized in that, The index of the second segment is greater than the index of the first segment, the threshold corresponding to the second segment is less than the threshold corresponding to the first segment, and the first segment is any one of the at least two segments.

8. The method according to any one of claims 1 to 7, characterized in that, The first column corresponds to column index Y1 in the first base matrix, and the third column corresponds to column index Y1 in the second base matrix, where 1 ≤ Y1 ≤ Y, and Y1 is an integer; Wherein, the column weight of the third column within the row region of the second base matrix is ​​d1, and the column weight of the first column within the row region of the first base matrix is ​​d2, and the column weight of the first column within the row region of the first base matrix is ​​d′2, and the column weight of the first column within the row region of the first base matrix is ​​d′2, wherein d1 is not less than d2, and d′1 is greater than d′2.

9. The method according to claim 8, characterized in that, The following conditions must be met between d1, d′1, d2, and d′2: d1>d2 and d′1>d′2; or, d1>d2 and d′1>2d′2; or, d1 = d2 and d′1 > d′2; or, d1 = d2 and d′1 > 2d′2.

10. The method according to any one of claims 1 to 7, characterized in that, The first column corresponds to column index Y1 in the first base matrix, and the third column corresponds to column index Y1 in the second base matrix, where 1 ≤ Y1 ≤ X, and Y1 is an integer; Wherein, the column weight of the third column in the region outside the lower triangular parity row of the second base matrix is ​​d1, the column weight in the lower triangular parity row of the second base matrix is ​​d′1, and / or the row weight of the third column in other regions of the second base matrix besides the row region is d′1, the column weight of the first column in the region outside the lower triangular parity row of the first base matrix is ​​d2, the column weight in the lower triangular parity row of the first base matrix is ​​d′2, and / or the row weight of the first column in other regions besides the row region of the first base matrix is ​​d′2, d1>d2 and d′1>d′2.

11. The method according to claim 10, characterized in that, d′1>2d′2.

12. The method according to any one of claims 4 to 11, characterized in that, The column region corresponding to the column set Q is located within the range of the (y1+1)th to (y2)th columns of the first base matrix.

13. The method according to any one of claims 4 to 12, characterized in that, The column set Q contains at least one column from the column region corresponding to the submatrix B of the first base matrix.

14. The method according to claim 13, characterized in that, At least one column in the column region corresponding to the submatrix B contains a column with column index Y2, wherein the column with column index Y2 has an even weight, or the column with column index Y2 is the column with the smallest weight in the column region corresponding to the submatrix B; and, The column weight of the column with column index Y2 in the first base matrix is ​​greater than the column weight of the column with column index Y2 in the second base matrix.

15. The method according to claim 13 or 14, characterized in that, The column set Q also includes a column with column index Y3 and an odd column weight; and, The column weight of the column with column index Y3 in the first base matrix is ​​less than the column weight of the column with column index Y3 in the second base matrix.

16. The method according to any one of claims 4 to 11, characterized in that, The column set Q contains columns with an even number of column weights in the column region corresponding to the submatrix B.

17. The method according to any one of claims 4 to 11, characterized in that, The column set Q includes at least one column from the column region corresponding to the submatrix A and at least one column from the column region corresponding to the submatrix B; Furthermore, the column weight of at least one column in the column region corresponding to submatrix A in the first base matrix is ​​less than the column weight of at least one column in the column region corresponding to submatrix A in the second base matrix; The column weight of at least one column in the column region corresponding to the submatrix B in the first base matrix is ​​greater than the column weight of at least one column in the column region corresponding to the submatrix B in the second base matrix.

18. An encoding device, characterized in that, include: Processing module, used for: Obtain a first basis matrix, which corresponds to a second basis matrix. The first basis matrix includes a first column and a second column. The first column and the second column correspond to the third column and the fourth column of the second basis matrix, respectively. The absolute value of the difference between the column weight of the first column and the column weight of the second column is less than the absolute value of the difference between the column weight of the third column and the column weight of the fourth column. The second basis matrix is ​​a basis matrix applicable to a first condition, which is related to the code length and / or code rate. Both the second basis matrix and the first basis matrix contain X rows and Y columns. The first column and the second column belong to a column set Q. The column set Q contains at least two columns from the Y column. The elements of the first column and the third column are the same in other row regions outside the row region corresponding to the row set R. The elements of the second column and the fourth column are the same in other row regions outside the row region corresponding to the row set R. The row set R contains at least one row from the X rows. X and Y are both positive integers. The first matrix is ​​determined based on the first basis matrix and the translation values ​​corresponding to the elements in the first basis matrix; as well as, Encode the first matrix to obtain an encoded bit sequence; A communication module is used to output the encoded bit sequence.

19. A decoding device, characterized in that, include: Processing module, used for: Obtain a first basis matrix, which corresponds to a second basis matrix. The first basis matrix includes a first column and a second column. The first column and the second column correspond to the third column and the fourth column of the second basis matrix, respectively. The absolute value of the difference between the column weight of the first column and the column weight of the second column is less than the absolute value of the difference between the column weight of the third column and the column weight of the fourth column. The second basis matrix is ​​a basis matrix applicable to a first condition, which is related to the code length and / or code rate. Both the second basis matrix and the first basis matrix contain X rows and Y columns. The first column and the second column belong to a column set Q. The column set Q contains at least two columns from the Y column. The elements of the first column and the third column are the same in other row regions outside the row region corresponding to the row set R. The elements of the second column and the fourth column are the same in other row regions outside the row region corresponding to the row set R. The row set R contains at least one row from the X rows. X and Y are both positive integers. The first matrix is ​​determined based on the first basis matrix and the translation values ​​corresponding to the elements in the first basis matrix; as well as, Based on the first matrix, the received value sequence is decoded to obtain the decoded bit sequence; A communication module is used to output the decoded bit sequence.

20. A communication device, characterized in that, The system includes a communication interface and circuitry. The communication interface is used to acquire information required to perform the method as described in any one of claims 1, 3-17, and to send the information to the circuitry, which is used to perform the method as described in any one of claims 1, 3-17 based on the received information; or... The communication interface is used to acquire information required to perform the method as described in any one of claims 2-17, and to send the information to the circuit, which is used to perform the method as described in any one of claims 2-17 based on the received information.

21. A communication device, characterized in that, Includes modules or units for performing the method as described in any one of claims 1-17.

22. A communication device, characterized in that, The device includes a processor coupled to a memory, the processor being configured to execute a computer program or instructions stored in the memory to cause the communication device to perform the method as described in any one of claims 1-17.

23. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that, when executed on a computer, implement the method as described in any one of claims 1-17.

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