Coding method and apparatus

Abstract

A coding / decoding method and apparatus are disclosed, relating to the multimedia field. The method includes: dividing an 11B7T sequence into four groups, namely 3B2T, 3B2T, 3B2T, and 2B1T; using a 2-bit data pattern, setting feature combinations in specific regions of the 7 symbols mapped to the 11 bits; using these feature combinations as identifiers to indicate the encoding method; and at the decoding end, mapping the 7 symbols to 11 bits according to the encoding method indicated by the feature combinations of the specific regions. This divides a long sequence into multiple short sequences, performs PAM3 coding / decoding on these short sequences, and combines the feature combinations of the specific regions to indicate the encoding method, reducing the complexity of long-sequence PAM3 coding / decoding, thereby reducing the circuit implementation complexity of long-sequence PAM3 coding / decoding and improving PAM3 coding / decoding performance.

Description

Technical Field

[0001] This application relates to the field of multimedia, and more particularly to an encoding / decoding method and apparatus. Background Technology

[0002] Currently, compared to signals modulated by Pulse Amplitude Modulation (PAM)2 or Non-Return-to-Zero (NRZ), signals modulated by PAM3 can carry more bits of data. PAM3 encoding maps the binary sequence to a ternary sequence, using multiple ternary symbols to represent multiple binary bits, improving encoding efficiency and reducing bandwidth. Different encoding and decoding schemes offer the possibility of different combinations of the number of binary bits and the number of ternary symbols. However, current encoding and decoding schemes have complex circuit implementations and relatively low performance. Summary of the Invention

[0003] This application provides an encoding / decoding method and apparatus, thereby reducing the circuit implementation complexity of the encoding / decoding scheme and improving the performance of encoding / decoding.

[0004] Firstly, an encoding / decoding method is provided. The method includes: acquiring a sequence to be encoded; dividing the 11 bits contained in the sequence into four groups: a first group containing 3 bits, a second group containing 3 bits, a third group containing 3 bits, and a fourth group containing 2 bits; when the data pattern of the 2 bits in the fourth group is a specific bit combination, encoding the 11 bits into 7 symbols: mapping the 3 bits of the first group to 2 symbols, mapping the 3 bits of the second group to 2 symbols, mapping the 3 bits of the third group to 2 symbols, and the 7 symbols including one symbol from the 2 symbols mapped from the 3 bits of the third group, the 2 symbols mapped from the 3 bits of the first group, the 2 symbols mapped from the 3 bits of the second group, and a feature combination of a specific bit field, to obtain a first encoded sequence; and sending the first encoded sequence. The first encoded sequence includes 7 symbols. Symbols are represented using ternary data, and bits are represented using binary data. The specific bit field is any two bit fields from the bit fields of the 7 symbols. The feature combination is any one of the nine symbol combinations, which are obtained by combining ternary data in two bit fields.

[0005] This application provides an 11-bit-7-symbol encoding / decoding (11B7T) binary sequence mapping ternary sequence encoding / decoding technique. It divides a long sequence into multiple short sequences, performs PAM3 encoding / decoding on these short sequences, and combines a feature combination of a specific positioning field with a set of 3 bits for encoding. This reduces the complexity of PAM3 encoding / decoding for long sequences, thereby reducing the circuit implementation complexity and improving PAM3 encoding / decoding performance. Since the encoding efficiency of long sequences is generally higher than that of short sequences (e.g., 3B2T, 4B3T, 8B6T), for example, 11B7T has a encoding efficiency of 99%. Therefore, by utilizing long sequences for PAM3 encoding / decoding, it achieves the effect of simple PAM3 encoding / decoding circuit implementation while ensuring encoding efficiency.

[0006] Optionally, the seven symbols include one of the two symbols from the three-bit mapping of the second group, two symbols from the three-bit mapping of the third group, two symbols from the three-bit mapping of the second group, and a feature combination of the specific positioning domain.

[0007] Optionally, the seven symbols include one of the two symbols from the three-bit mapping of the first group, two symbols from the three-bit mapping of the third group, two symbols from the three-bit mapping of the second group, and a feature combination of the specific positioning domain.

[0008] In one possible implementation, the method further includes: when the data pattern of the 2 bits in the fourth group is a non-specific bit combination, encoding 11 bits into 7 symbols, mapping the 2 bits of the fourth group to 1 symbol, mapping the 3 bits of the first group to 2 symbols, mapping the 3 bits of the second group to 2 symbols, mapping the 3 bits of the third group to 2 symbols, and the 7 symbols including the 1 symbol mapped from the 2 bits of the fourth group, the 2 symbols mapped from the 3 bits of the first group, the 2 symbols mapped from the 3 bits of the second group, and the 2 symbols mapped from the 3 bits of the third group, to obtain a first encoded sequence, and sending the first encoded sequence. The first encoded sequence includes 7 symbols.

[0009] By dividing a long sequence into multiple short sequences and performing PAM3 encoding and decoding on each short sequence separately, the complexity of PAM3 encoding and decoding for long sequences is reduced, thereby reducing the circuit implementation complexity of PAM3 encoding and decoding for long sequences and improving PAM3 encoding and decoding performance.

[0010] In another possible implementation, the feature combination of a particular localization domain is associated with two symbols of any set of three-bit mappings.

[0011] In another possible implementation, if one of the two symbols in the three-bit mapping of the third group has a first value, the feature combination is the first feature combination; if one of the two symbols in the three-bit mapping of the third group has a second value, the feature combination is the second feature combination; if one of the two symbols in the three-bit mapping of the third group has a third value, the feature combination is the third feature combination; wherein the first feature combination, the second feature combination, and the third feature combination are the same or different, and the first specific location domain of the first feature combination, the second specific location domain of the second feature combination, and the third specific location domain of the third feature combination are different.

[0012] In another possible implementation, the first feature combination, the second feature combination, and the third feature combination may all be the same or all different.

[0013] In another possible implementation, two of the first, second, and third feature combinations are the same, and the third feature combination is different from the other two feature combinations.

[0014] By setting feature combinations in different specific domains, the diversity of encoding methods can be improved.

[0015] In another possible implementation, the first specific location field includes a first feature combination or one of the eight symbol combinations other than the first feature combination among the nine symbol combinations to which the first feature combination belongs, the first feature combination being associated with three bits of the first group; and / or, the second specific location field includes a second feature combination or one of the eight symbol combinations other than the second feature combination among the nine symbol combinations to which the second feature combination belongs, the second feature combination being associated with three bits of the second group.

[0016] This allows the decoding end to accurately decode the received sequence based on the encoding method indicated by the feature combination of specific positioning fields.

[0017] In another possible implementation, binary data combinations on 3 bit fields yield 8 bit combinations, ternary data combinations on 2 bit fields yield 9 symbol combinations, and the 8 bit combinations are mapped one-to-one to 8 of the 9 symbol combinations. The other symbol combination among the 9 symbol combinations is used as a feature combination. The mapping of 3 bits to 2 symbols includes: when the 3-bit data pattern is one of the 8 bit combinations, the 3 bits are mapped to one of the 8 symbol combinations corresponding to the 8 bit combinations.

[0018] By utilizing the combination of spare symbols, the encoded sequence can carry more data, thereby improving encoding efficiency and performance.

[0019] In another possible implementation, the feature combination is 00, 11, or 22.

[0020] In another possible implementation, binary data combinations on two bit fields yield four bit combinations, with three of these four bit combinations mapping one-to-one to three symbols on one bit field; non-specific bit combinations include three bit combinations, and specific bit combinations include one bit combination other than the three bit combinations among the four bit combinations; mapping two bits to one symbol includes: when the two bit data pattern is one of the three bit combinations, mapping two bits to one of the three symbols corresponding to the three bit combinations.

[0021] In another possible implementation, the 3 bits of the first group, the 3 bits of the second group, the 3 bits of the third group, and the 2 bits of the fourth group are bits in any bit field of the 11-bit space. In the 11-bit space, the bit fields of the 3 bits of the first group, the 3 bits of the second group, the 3 bits of the third group, and the 2 bits of the fourth group are different.

[0022] In another possible implementation, the 11-bit field corresponds to any bit field of the 7 symbols.

[0023] This application does not limit the grouping method of the 11 bits and the bit field correspondence of the binary sequence to the ternary sequence, thereby improving the flexibility of circuit design.

[0024] Secondly, a decoding method is provided, comprising: receiving a sequence of 7 symbols to be decoded; wherein, if the 7 symbols include feature combinations of specific bit fields, decoding the 7 symbols into 11 bits based on the feature combinations of the specific bit fields; the 11 bits include 3 bits from a first group, 3 bits from a second group, 3 bits from a third group, and 2 bits, where the 2 bits are specific bit combinations; mapping the feature combinations and one symbol among the 7 symbols to the 3 bits of the third group; mapping the 2 symbols from the other two groups of the 7 symbols to the 3 bits of the second group and the 3 bits of the first group, resulting in a first decoded sequence comprising 11 bits. Symbols are represented using ternary data, bits are represented using binary data, the specific bit field is any two bit fields from the bit fields of the 7 symbols, and the feature combination is any one of nine symbol combinations, which are obtained by combining ternary data from two bit fields.

[0025] In one possible implementation, the method includes: decoding the 7 symbols into 11 bits, where the 7 symbols do not include feature combinations of specific positioning domains. These 11 bits consist of 2 bits, a group of 3 bits, and two other groups of 3 bits. One symbol out of the 7 symbols is mapped to 2 bits, one group of 2 symbols out of the 7 symbols is mapped to one group of 3 bits, and the other two groups of 2 symbols out of the 7 symbols are mapped to two other groups of 3 bits. The 2-bit data pattern is a non-specific bit combination, resulting in a second decoded sequence, which also consists of 11 bits.

[0026] In another possible implementation, the feature combination includes one of a first feature combination, a second feature combination, or a third feature combination, wherein the first feature combination, the second feature combination, or the third feature combination are the same or different, and the first feature domain of the first feature combination, the second feature domain of the second feature combination, and the third feature domain of the third feature combination are different.

[0027] In another possible implementation, the feature combination of the 7 symbols and 1 symbol are mapped to a group of 3 bits, including: when the first feature domain includes the first feature combination, the 1 symbol associated with the first feature combination and 1 symbol of the 7 symbols are mapped to a third group of 3 bits.

[0028] In another possible implementation, the first feature combination and the second feature combination are different; the feature combination and one symbol in the seven symbols are mapped to a group of three bits, including: when the first feature combination is contained in the first specific location field and the second feature combination is not contained in the second specific location field, the one symbol associated with the first feature combination and one symbol in the seven symbols are mapped to a third group of three bits.

[0029] In another possible implementation, the first feature combination, the second feature combination, and the third feature combination are all different; the feature combination and one symbol in the seven symbols are mapped to a group of three bits, including: when the first feature combination is included in the first specific location field, the second feature combination is not included in the second specific location field, and the third feature combination is not included in the third specific location field, the one symbol associated with the first feature combination and one symbol in the seven symbols are mapped to the third group of three bits.

[0030] In another possible implementation, the feature combination of the 7 symbols and 1 symbol are mapped to a set of 3 bits, including: when the second feature domain includes the second feature combination, the 1 symbol associated with the second feature combination and 1 symbol of the 7 symbols are mapped to a set of 3 bits in the third group.

[0031] In another possible implementation, the feature combination of the 7 symbols and 1 symbol are mapped to a group of 3 bits, including: when the third feature domain includes the third feature combination, the 1 symbol associated with the third feature combination and 1 symbol of the 7 symbols are mapped to the third group of 3 bits.

[0032] In another possible implementation, ternary data combinations on 2 bit fields yield 9 symbol combinations, binary data combinations on 3 bit fields yield 8 bit combinations, 8 of the 9 symbol combinations are mapped one-to-one to 8 bit combinations, and the other symbol combination among the 9 symbol combinations is used as a feature combination; 2 symbols are mapped to 3 bits, including: when the data pattern of 2 symbols is one of the 8 symbol combinations, 2 symbols are mapped to one of the 8 bit combinations corresponding to the 8 symbol combinations.

[0033] In another possible implementation, binary data combinations on two bit fields yield four bit combinations, and three symbols on one bit field are mapped one-to-one to three of the four bit combinations; non-specific bit combinations include three bit combinations, and specific bit combinations include one bit combination other than the three bit combinations among the four bit combinations; one symbol is mapped to two bits, including: when the data pattern of one symbol is one of the three symbols, one symbol is mapped to one of the three bit combinations corresponding to the three symbols.

[0034] Thirdly, a coding / decoding apparatus is provided, comprising modules for performing the methods of the first aspect or any possible design of the first aspect. For example, the coding / decoding apparatus includes a communication module and an encoding module.

[0035] The communication module acquires the sequence to be encoded, which contains 11 bits. The encoding module divides the 11 bits into four groups: the first group contains 3 bits, the second group contains 3 bits, the third group contains 3 bits, and the fourth group contains 2 bits. Given a specific bit combination in the 2-bit data pattern of the fourth group, the 11 bits are encoded into 7 symbols. The 3 bits from the first group are mapped to 2 symbols, the 3 bits from the second group are mapped to 2 symbols, and the 3 bits from the third group are mapped to 2 symbols. The 7 symbols include one of the 2 symbols mapped from the 3 bits of the third group, the 2 symbols mapped from the 3 bits of the first group, the 2 symbols mapped from the 3 bits of the second group, and a feature combination of specific bit fields, resulting in the first encoded sequence, which contains 7 symbols. Symbols are represented using ternary data, and bits are represented using binary data. The specific bit field is any two bit fields from the 7 symbols, and the feature combination is any one of nine symbol combinations, obtained by combining ternary data from two bit fields. The communication module is also used to send the first encoded sequence.

[0036] In one possible implementation, the encoding module is further configured to encode 11 bits into 7 symbols when the 2-bit data pattern of the fourth group is a non-specific bit combination; the 2 bits of the fourth group are mapped to 1 symbol, the 3 bits of the first group are mapped to 2 symbols, the 3 bits of the second group are mapped to 2 symbols, and the 3 bits of the third group are mapped to 2 symbols, resulting in a first encoded sequence, which is then transmitted. The first encoded sequence includes 7 symbols, comprising 1 symbol mapped from the 2 bits of the fourth group, 2 symbols mapped from the 3 bits of the first group, 2 symbols mapped from the 3 bits of the second group, and 2 symbols mapped from the 3 bits of the third group.

[0037] In another possible implementation, the feature combination of a particular localization domain is associated with two symbols of any set of three-bit mappings.

[0038] In another possible implementation, if one of the two symbols in the three-bit mapping of the third group has a first value, the feature combination is the first feature combination; if one of the two symbols in the three-bit mapping of the third group has a second value, the feature combination is the second feature combination; if one of the two symbols in the three-bit mapping of the third group has a third value, the feature combination is the third feature combination; wherein the first feature combination, the second feature combination, and the third feature combination are the same or different, and the first specific location domain of the first feature combination, the second specific location domain of the second feature combination, and the third specific location domain of the third feature combination are different.

[0039] In another possible implementation, the first feature combination, the second feature combination, and the third feature combination may all be the same or all different.

[0040] In another possible implementation, two of the first, second, and third feature combinations are the same, and the third feature combination is different from the other two feature combinations.

[0041] In another possible implementation, the three bits of any group are the three bits of the third group, the first specific positioning field includes a combination of eight symbol combinations other than the first feature combination among the nine symbol combinations to which the first feature combination belongs, the first feature combination being associated with the three bits of the first group; and / or, the second specific positioning field includes a combination of eight symbol combinations other than the second feature combination among the nine symbol combinations to which the second feature combination belongs, the second feature combination being associated with the three bits of the second group.

[0042] In another possible implementation, binary data combinations on 3 bit fields yield 8 bit combinations, ternary data combinations on 2 bit fields yield 9 symbol combinations, and the 8 bit combinations are mapped one-to-one to 8 of the 9 symbol combinations. The other symbol combination among the 9 symbol combinations is used as a feature combination. The mapping of 3 bits to 2 symbols includes: when the 3-bit data pattern is one of the 8 bit combinations, the 3 bits are mapped to one of the 8 symbol combinations corresponding to the 8 bit combinations.

[0043] In another possible implementation, the feature combination is 00, 11, or 22.

[0044] In another possible implementation, binary data combinations on two bit fields yield four bit combinations, with three of these four bit combinations mapping one-to-one to three symbols on one bit field; non-specific bit combinations include three bit combinations, and specific bit combinations include one bit combination other than the three bit combinations among the four bit combinations; mapping two bits to one symbol includes: when the two bit data pattern is one of the three bit combinations, mapping two bits to one of the three symbols corresponding to the three bit combinations.

[0045] In another possible implementation, the 3 bits of the first group, the 3 bits of the second group, the 3 bits of the third group, and the 2 bits of the fourth group are bits in any bit field of the 11-bit space. In the 11-bit space, the bit fields of the 3 bits of the first group, the 3 bits of the second group, the 3 bits of the third group, and the 2 bits of the fourth group are different.

[0046] In another possible implementation, the 11-bit field corresponds to any bit field of the 7 symbols.

[0047] Fourthly, a coding / decoding apparatus is provided, the apparatus comprising modules for performing the methods of the second aspect or any possible design of the second aspect. For example, the coding / decoding apparatus includes a communication module and a decoding module.

[0048] The communication module receives a sequence of 7 symbols to be decoded. The decoding module decodes the 7 symbols into 11 bits based on the feature combinations of specific bit fields. These 11 bits include 3 bits from the first group, 3 bits from the second group, 3 bits from the third group, and 2 bits from the third group. The 2 bits represent a specific bit combination. The feature combination and one symbol from the 7 symbols are mapped to the 3 bits of the third group. The two symbols from the other two groups of 7 symbols are mapped to the 3 bits of the second group and the 3 bits of the first group, resulting in a first decoded sequence of 11 bits. Symbols are represented using ternary data, bits are represented using binary data, the specific bit field is any two bit fields from the bit fields of the 7 symbols, and the feature combination is any one of nine symbol combinations, obtained by combining ternary data from two bit fields.

[0049] In one possible implementation, the decoding module is further configured to: decode the 7 symbols into 11 bits, where the 7 symbols do not include feature combinations of specific positioning fields. These 11 bits include 2 bits, a group of 3 bits, and two other groups of 3 bits. One symbol out of the 7 symbols is mapped to 2 bits, one group of 2 symbols out of the 7 symbols is mapped to one group of 3 bits, and the other two groups of 2 symbols out of the 7 symbols are mapped to two other groups of 3 bits. The 2-bit data pattern is a non-specific bit combination, resulting in a second decoded sequence, which includes 11 bits.

[0050] In another possible implementation, the feature combination includes one of a first feature combination, a second feature combination, or a third feature combination, wherein the first feature combination, the second feature combination, or the third feature combination are the same or different, and the first feature domain of the first feature combination, the second feature domain of the second feature combination, and the third feature domain of the third feature combination are different.

[0051] In another possible implementation, the feature combination of the 7 symbols and 1 symbol are mapped to a group of 3 bits, including: when the first feature field includes the first feature combination, the 1 symbol associated with the first feature combination and 1 symbol of the 7 symbols are mapped to a third group of 3 bits.

[0052] In another possible implementation, the first feature combination and the second feature combination are different; the feature combination and one symbol in the seven symbols are mapped to a group of three bits, including: when the first feature combination is contained in the first specific location field and the second feature combination is not contained in the second specific location field, the one symbol associated with the first feature combination and one symbol in the seven symbols are mapped to a third group of three bits.

[0053] In another possible implementation, the first feature combination, the second feature combination, and the third feature combination are all different; the feature combination and one symbol in the seven symbols are mapped to a group of three bits, including: when the first feature combination is included in the first specific location field, the second feature combination is not included in the second specific location field, and the third feature combination is not included in the third specific location field, the one symbol associated with the first feature combination and one symbol in the seven symbols are mapped to the third group of three bits.

[0054] In another possible implementation, the feature combination of the 7 symbols and 1 symbol are mapped to a group of 3 bits, including: when the second feature domain includes the second feature combination, the 1 symbol associated with the second feature combination and 1 symbol of the 7 symbols are mapped to a third group of 3 bits.

[0055] In another possible implementation, the feature combination of the 7 symbols and 1 symbol are mapped to a group of 3 bits, including: when the third feature domain includes the third feature combination, the 1 symbol associated with the third feature combination and 1 symbol of the 7 symbols are mapped to the third group of 3 bits.

[0056] In another possible implementation, ternary data combinations on 2 bit fields yield 9 symbol combinations, binary data combinations on 3 bit fields yield 8 bit combinations, 8 of the 9 symbol combinations are mapped one-to-one to 8 bit combinations, and the other symbol combination among the 9 symbol combinations is used as a feature combination; 2 symbols are mapped to 3 bits, including: when the data pattern of 2 symbols is one of the 8 symbol combinations, 2 symbols are mapped to one of the 8 bit combinations corresponding to the 8 symbol combinations.

[0057] In another possible implementation, binary data combinations on two bit fields yield four bit combinations, and three symbols on one bit field are mapped one-to-one to three of the four bit combinations; non-specific bit combinations include three bit combinations, and specific bit combinations include one bit combination other than the three bit combinations among the four bit combinations; one symbol is mapped to two bits, including: when the data pattern of one symbol is one of the three symbols, one symbol is mapped to one of the three bit combinations corresponding to the three symbols.

[0058] Fifthly, an encoder is provided, the encoder comprising at least one processor and a memory, wherein the memory is used to store a computer program such that when the computer program is executed by at least one processor, it implements the method described in the first aspect or any possible design of the first aspect.

[0059] A sixth aspect provides a decoder comprising at least one processor and a memory, wherein the memory is used to store a computer program such that when the computer program is executed by at least one processor, it implements the method described in the second aspect or any possible design of the second aspect.

[0060] In a seventh aspect, a coding and decoding system is provided, the coding and decoding system comprising an encoder as described in the fifth aspect and a decoder as described in the sixth aspect.

[0061] Eighthly, a chip is provided, comprising: a processor and a power supply circuit; wherein the power supply circuit is used to supply power to the processor; the processor is used to perform operational steps of the method in the first aspect or any possible implementation of the first aspect, and to perform operational steps of the method in the second aspect or any possible implementation of the second aspect.

[0062] Ninth aspect, a computer program product is provided, the computer program product including a computer program or instructions, which, when the computer program product is run on a processor, causes the processor to perform the operation steps of the method in the first aspect or any possible implementation of the first aspect, or to perform the operation steps of the method in the second aspect or any possible implementation of the second aspect.

[0063] A tenth aspect provides a computer-readable storage medium comprising: computer software instructions; which, when executed in a computing device, cause the computing device to perform operational steps of the method in the first aspect or any possible implementation thereof, or to perform operational steps of the method in the second aspect or any possible implementation thereof.

[0064] The computer-readable storage medium includes an encoded or decoded sequence obtained when executing the method described in the first aspect or any possible design of the first aspect.

[0065] Eleventhly, a sequence is provided, the sequence being an encoded sequence obtained by the first aspect or any possible implementation of the first aspect, or the sequence being a decoded sequence obtained by the second aspect or any possible implementation of the second aspect.

[0066] In a twelfth aspect, a method for storing a sequence is provided, the method comprising: receiving an encoded sequence generated according to the first aspect or any possible implementation thereof; and storing the encoded sequence in a storage medium.

[0067] In a thirteenth aspect, an apparatus for storing sequences is provided, the apparatus being used to store an encoded sequence generated according to the first aspect or any possible implementation thereof, or the apparatus being used to store a decoded sequence generated according to the second aspect or any possible implementation thereof. Exemplarily, the apparatus may be a computer-readable storage medium.

[0068] In a fourteenth aspect, a method for transmitting an encoded sequence is provided, the method comprising: acquiring the encoded sequence, the encoded sequence being generated by the first aspect or any possible implementation thereof; and sending the encoded sequence.

[0069] In a fifteenth aspect, there is provided an apparatus for transmitting an encoded sequence, the apparatus being used to acquire and transmit an encoded sequence generated by the first aspect or any possible implementation thereof.

[0070] The technical effects of any of the implementation methods in aspects three through fifteen can be found in the technical effects of the corresponding implementation methods in aspects one or two, and will not be repeated here.

[0071] Among these, any possible implementation methods of any one of the above aspects can be combined, provided that the solutions do not contradict each other. Attached Figure Description

[0072] Figure 1 A schematic diagram of an OSI reference model provided in this application;

[0073] Figure 2 A schematic diagram of the level states of a PAM3 provided in this application;

[0074] Figure 3 This application provides a schematic diagram of a GPMI interface link;

[0075] Figure 4 A schematic diagram of the structure of a data transmission system provided in this application;

[0076] Figure 5 A schematic diagram of the structure of an encoding / decoding system provided in this application;

[0077] Figure 6 A flowchart illustrating an encoding / decoding method provided in this application;

[0078] Figure 7 A schematic diagram of a 2B1T mapping relationship provided for this application;

[0079] Figure 8 A schematic diagram of a 3B2T mapping relationship provided for this application;

[0080] Figure 9 This application provides an example diagram illustrating an encoding / decoding process.

[0081] Figure 10 A schematic diagram of the encoding process provided in this application;

[0082] Figure 11 A schematic diagram of a decoding process provided in this application;

[0083] Figure 12 A schematic diagram illustrating another 3B2T mapping relationship provided for this application;

[0084] Figure 13 A schematic diagram illustrating another 3B2T mapping relationship provided for this application;

[0085] Figure 14 A schematic diagram of six signal levels for a PAM6 provided in this application;

[0086] Figure 15 A schematic diagram of the structure of an encoding / decoding device provided in this application;

[0087] Figure 16 A schematic diagram of an encoder provided in this application;

[0088] Figure 17 This is a schematic diagram of the structure of a decoder provided in this application. Detailed Implementation

[0089] The following is a brief introduction to some concepts that may be involved in this application.

[0090] Open Systems Interconnection (OSI) is a network architecture framework proposed by an international standards organization, also known as the OSI reference model. OSI aims to provide a universal, standardized communication environment that enables different computer systems to communicate and exchange information. Figure 1 As shown, the OSI reference model defines a seven-layer framework for network interconnection, including the Physical Layer, Data Link Layer, Network Layer, Transport Layer, Session Layer, Presentation Layer, and Application Layer.

[0091] The physical layer is located at the bottom of the OSI reference model. It deals with the transmission characteristics of the physical transmission medium, such as voltage, physical data rate, maximum transmission distance, physical connectors, and other similar characteristics. Transmission media include optical fiber, twisted pair, and radio waves. Its main functions include providing physical connections to the data link layer using the transmission medium and defining the electrical, mechanical, functional, and procedural characteristics of the data bit stream.

[0092] For different interface types or application scenarios, the seven-layer functionality defined by the OSI reference model can be selected.

[0093] This application provides a General Purpose Multimedia Interface (GPMI) for data transmission. The GPMI interface is suitable for transmitting high-speed signals from audio / video devices and third-party protocol devices (such as Universal Serial Bus (USB) devices). Devices using the GPMI interface are called GPMI devices. A system consisting of multiple GPMI devices connected together is called a GPMI system. In some embodiments, multiple GPMI devices are directly connected to each other, or they are directly connected through other devices (such as routers). The capabilities provided by the GPMI interface include meeting the bidirectional audio / video transmission needs of devices such as televisions, personal computers (PCs), and mobile phones, and supporting audio / video content transmission protection and lossless compression; interaction between GPMI devices and third-party protocol devices (such as Universal Serial Bus (USB), Ethernet, and Peripheral Component Interconnect Express (PCIe)); and meeting the bidirectional power supply needs of electronic devices with a power consumption not exceeding 480W.

[0094] The GPMI 1.0 standard supports a transmission rate of 20Gbps per channel and uses non-return-to-zero (NRZ) coding to modulate the signal.

[0095] NRZ, also known as PAM2, is a binary encoding method that uses two different voltage levels to represent binary data. Binary is a widely used number system in computing technology, specifically a base-2 number system. Binary uses 0 and 1 to represent data. The carry rule is "carry one when reaching two," and the borrow rule is "borrow one as two." In binary, each digit is called a bit, and the bit is the smallest unit of data in a computer. Binary is widely used in computer science, digital circuits, and communications.

[0096] In NRZ encoding, a high level represents binary data "1", and a low level represents binary data "0".

[0097] The GPMI 1.1 / 2.0 standard supports higher transmission rates, such as 40Gbps / lane and above. It also reuses USB standard cables and cables already widely used in the industry at the physical layer. When supporting transmission rates above 40Gbps, these cables use PAM3 encoding to modulate the signal to meet the required transmission distance and bit error rate of the interface.

[0098] PAM3 is a ternary encoding method that uses three different voltage levels to represent ternary data. Ternary is a base-3 number system. Ternary generally has two representations: one uses 0, 1, 2 to represent ternary data, and the other uses -1, 0, +1 to represent numerical values; this latter representation is also called symmetrical ternary or balanced ternary. The carry rule is "carry one when reaching three," and the borrow rule is "borrow one and return three." For example, ... Figure 2 As shown, PAM3 uses three levels to represent the ternary data to be transmitted. For example, 0 / 1 / 2 is used to represent a certain level state of a PAM3 symbol (Trit), or -1 / 0 / +1 is used to represent a certain level state of a symbol.

[0099] This application does not limit the equivalence relationship between the two ternary representations. For example, ternary data 0, 1, 2 are equivalent to ternary data 0, +1, -1. Similarly, ternary data 0, 1, 2 are equivalent to ternary data -1, 0, +1.

[0100] For ease of description, the following text will use ternary data including 0, 1, and 2 as an example.

[0101] Figure 3This application provides a schematic diagram of a GPMI interface link. The transmitting end includes a Reed-Solomon Forward Error Correction (RS FEC) coding unit, a PAM3 modulation unit, and a transmitting unit. The RS FEC coding unit is used to perform error correction coding on the signal. The PAM3 modulation unit is used to perform PAM3 modulation on the signal output by the RS FEC coding unit. The transmitting unit is used to transmit the signal output by the PAM3 modulation unit. The receiving end includes a receiving unit, a PAM3 demodulation unit, and an RS FEC decoding unit. The PAM3 demodulation unit is used to perform PAM3 demodulation on the signal received by the receiving unit. The RS FEC decoding unit is used to perform RS FEC decoding on the signal output by the PAM3 demodulation unit. Alternatively, the system may not include an RS FEC coding unit and an RS FEC decoding unit. RS FEC is an error correction coding technology widely used in data transmission and storage.

[0102] Compared to NRZ, which uses two voltage levels to represent binary data, PAM3 uses more voltage levels to represent ternary data, thus enabling the transmission of more information per symbol period. For example, the amount of information each symbol can carry is obtained from logarithmic operations, i.e., log2. 3 ≈1.585 bits. That is, the number of bits represented by one symbol is log(3) / log(2)≈1.58 bits. PAM3 is more suitable for application scenarios with high bandwidth efficiency requirements.

[0103] If one symbol corresponds to one bit for PAM3 modulation, only one bit can be transmitted, wasting the symbol state and corresponding transmission bandwidth, and failing to fully utilize the advantages of PAM3 multi-level transmission. Therefore, a binary sequence is generally mapped to a ternary sequence, meaning multiple symbols are combined to represent a data pattern of multiple bits. The ternary sequence must have more or more symbol combinations than the binary sequence to be transmitted, maximizing the efficiency of PAM3 encoding. The mapping relationship between the two sequences indicates the PAM3 encoding / decoding method. Table 1 shows the #B#T combinations for PAM3 encoding / decoding.

[0104] Table 1

[0105] Mapping relationship Bit (#of Binary Symbol) Symbol (# of Ternary Symbol) Capacity Efficiency 3B2T 3 2 3.169925 94.6395％ 4B3T 4 3 4.754888 84.1240％ 6B4T 6 4 6.339850 94.6395％ 7B5T 7 5 7.924813 88.3302％ 8B6T 8 6 9.509775 84.1240％ 11B7T 11 7 11.09474 99.1461％ 12B8T 12 8 12.6797 94.6395％ 14B9T 14 9 14.26466 98.1446％ 15B10T 15 10 15.849625 94.6395％ 17B11T 17 11 17.43459 97.5073％ 19B12T 19 12 19.01955 99.8972％

[0106] Table 1 provides different PAM3 encoding / decoding schemes, i.e., the mapping relationships between different binary sequences and ternary sequences. It can be seen that the more bits a binary sequence contains, the more symbols the resulting ternary sequence contains. Different mapping relationships between binary and ternary sequences achieve PAM3 encoding / decoding schemes with different efficiencies. Compared to the 3-bit-2-symbol encoding / decoding (3B2T) scheme, the 11-bit-7-symbol encoding / decoding (11B7T) scheme achieves a higher efficiency of 99.1461%. Different encoding / decoding schemes strike a balance between efficiency (effective bandwidth) and Hamming distance (code pattern fault tolerance). For example, the 11B7T encoding / decoding scheme is comparable to that based on a Galois field of 2... 11 When used in conjunction with RS FEC error correction codes, it offers a comprehensive advantage in terms of performance in terms of latency, area power consumption, and bit error rate.

[0107] 11B7T means mapping 11 bits to 7 symbols. 3B2T means mapping 3 bits to 2 symbols.

[0108] Binary-Ternary encoding and decoding schemes include lookup table (LUT), number system conversion, and encoding.

[0109] The lookup table method refers to determining the ternary sequence corresponding to a binary sequence by looking up a table. When the number of bits in the binary sequence and the number of symbols in the ternary sequence are large, the table capacity is large and the lookup efficiency is low. For example, 11B7T requires 2048 entries, making encoding and decoding complex and resulting in significant latency.

[0110] Number system conversion refers to deriving the formulas for converting bits / symbols in each bit field from binary to decimal to ternary. However, binary (0 / 1) to ternary (0 / 1 / 2) addition and subtraction is complex to implement and involves consecutive 0s or 1s equal to the code length.

[0111] Encoding methods refer to analyzing the patterns and combinations of bit data patterns and symbol data patterns, but finding the code pattern is very difficult.

[0112] In practical applications, the PAM3 encoding and decoding scheme requires different specific designs to meet the requirements of simple implementation, low latency, and low bandwidth in the encoding and decoding circuit.

[0113] To address the issues of complex circuit implementation and low performance in encoding / decoding schemes, this application provides an encoding / decoding method involving the mapping of 11B7T binary sequences to ternary sequences, applied to PAM3 modulation and transmission at the physical layer interface. The method includes, at the encoding end, dividing 11B7T into four groups: 3B2T, 3B2T, 3B2T, and 2B1T. Using a 2-bit data pattern, feature combinations are set in specific regions of the 7 symbols mapped to the 11 bits, and these feature combinations serve as identifiers indicating the encoding method. At the decoding end, the 7 symbols are mapped to 11 bits according to the encoding method indicated by the feature combinations of the specific regions. Specifically, 11 bits are encoded into 7 symbols. The 11 bits are divided into four groups: the first group contains 3 bits, the second group contains 3 bits, the third group contains 3 bits, and the fourth group contains 2 bits. When the data pattern of the 2 bits in the fourth group is a specific bit combination, the 3 bits in the first group are mapped to 2 symbols, the 3 bits in the second group are mapped to 2 symbols, and the 3 bits in the third group are mapped to 2 symbols. The 7 symbols include one symbol from the 2 symbols mapped from any of the 3 bits in the first group, 2 symbols from the other two groups, and a feature combination of a specific positioning field. When the data pattern of the 2 bits in the fourth group is a non-specific bit combination, the 2 bits in the fourth group are mapped to 1 symbol, the 3 bits in the first group are mapped to 2 symbols, the 3 bits in the second group are mapped to 2 symbols, and the 3 bits in the third group are mapped to 2 symbols. The 7 symbols include one symbol mapped from the 2 bits in the fourth group, two symbols mapped from the 3 bits in the first group, two symbols mapped from the 3 bits in the second group, and two symbols mapped from the 3 bits in the third group. When decoding 7 symbols into 11 bits, if the 7 symbols include feature combinations located in a specific positioning domain, the 7 symbols are mapped to 11 bits according to the feature combinations in the specific positioning domain. The feature combinations and 1 symbol in the 7 symbols are mapped to a group of 3 bits, and the other two groups of 2 symbols in the 7 symbols are mapped to another two groups of 3 bits. The 2-bit data pattern is a specific bit combination, and the 11 bits include a group of 3 bits, the other two groups of 3 bits, and 2 bits. If the 7 symbols do not include feature combinations in the specific positioning domain, 1 symbol in the 7 symbols is mapped to 2 bits, a group of 2 symbols in the 7 symbols is mapped to a group of 3 bits, and the other two groups of 2 symbols in the 7 symbols are mapped to another two groups of 3 bits. The 2-bit data pattern is a non-specific bit combination, and the 11 bits include 2 bits, a group of 3 bits, and the other two groups of 3 bits.

[0114] Compared to lookup table methods and number system conversion methods, the encoding / decoding method provided in this application divides a long sequence into multiple short sequences, performs PAM3 encoding / decoding on these short sequences, and combines feature combinations of specific positioning fields to indicate the encoding method. This reduces the complexity of PAM3 encoding / decoding for long sequences, thereby reducing the circuit implementation complexity and improving PAM3 encoding / decoding performance. Since the encoding efficiency of long sequences is generally higher than that of short sequences (e.g., 3B2T, 4B3T, 8B6T), for example, 11B7T has a encoding efficiency of 99%. Therefore, by utilizing long sequences for PAM3 encoding / decoding, while ensuring encoding efficiency, a simpler circuit implementation for PAM3 encoding / decoding is achieved.

[0115] The implementation of the encoding / decoding method provided in this application will now be described in detail with reference to the accompanying drawings.

[0116] The encoding / decoding method provided in this application is one of the physical layer technologies of the OSI reference model. This method is applied to GPMI and integrated into consumer electronics products such as PCs, laptops, TVs, set-top boxes, and mobile phones to enable communication and information transmission between multiple devices. This method is also suitable for interconnection interfaces of various communication devices, such as Ethernet interfaces, Dynamic Random Access Memory (DRAM) interfaces, Chiplet interfaces, audio / video multimedia interfaces, and PCIe / USB.

[0117] Figure 4 This is a schematic diagram of a data transmission system provided in this application. The data transmission system includes multiple devices 210 and a router 220. The multiple devices 210 are connected to the router 220 via wired or wireless means. For example, all multiple devices 210 are connected to the router 220 via cables. Any two of the multiple devices 210 transmit signals, such as audio / video data or charging signals, through the router 220.

[0118] In one example, multiple devices 210 include a display 211, a set-top box 212, and an audio player (e.g., an MP3 player (Moving Picture Experts Group Audio Layer-3)) 213. The set-top box 212 transmits audio and video data to the display 211 via a router 220, and also transmits audio data to the audio player 213 via the router 220, etc.

[0119] Optionally, the multiple devices 210 may also include two interconnected devices. For example, the multiple devices 210 may also include a game controller 214, which is connected to the display 211 and transmits control information to the display 211.

[0120] Optionally, each of the multiple devices 210 includes an interface, and the router 220 includes multiple interfaces. The interface of each of the multiple devices 210 is connected to one of the multiple interfaces of the router 220. For example, the multiple interfaces of the router 220 include a first interface to a fourth interface. The interface of the monitor 211 is connected to the first interface of the router 220 via a cable, the interface of the set-top box 212 is connected to the second interface of the router 220 via a cable, the interface of the game controller 214 is connected to the third interface of the router 220 via a cable, and the interface of the audio player 213 is connected to the fourth interface of the router 220 via a cable.

[0121] The devices in the aforementioned system with data transmission capabilities are called communication devices. These communication devices are deployed on land, including indoors or outdoors, handheld or vehicle-mounted. They are also deployed on water (such as ships) and in the air (such as airplanes, balloons, and satellites), and are used in different scenarios. For example, the communication device includes, but is not limited to: mobile phone, tablet computer, laptop computer, PDA, mobile internet device (MID), camera, wearable device (e.g., smartwatch, smart bracelet, pedometer, etc.), audio equipment, audio and video player, set-top box, game console, printer, mouse, keyboard, in-vehicle equipment (e.g., equipment on vehicles such as cars, bicycles, electric vehicles, airplanes, ships, trains, and high-speed trains), virtual reality (VR) device, augmented reality (AR) device, wireless terminal in industrial control, smart home device (e.g., refrigerator, television, air conditioner, electricity meter, etc.), smart robot, workshop equipment, wireless terminal in self-driving, wireless terminal in remote medical surgery, wireless terminal in smart grid, wireless terminal in transportation safety, wireless terminal in smart city, or smart home. Wireless terminals and flying equipment (e.g., intelligent robots, hot air balloons, drones, airplanes) in the home. Optionally, the signals transmitted between the above-mentioned communication devices include, but are not limited to: audio and video signals, radio frequency signals, IoT data, and charging signals.

[0122] In this application, the interface specifications used for signal transmission between devices in the data transmission system include, but are not limited to: Universal Serial Bus (USB) interface specification, High Definition Multimedia Interface (HDMI) specification, DisplayPort (DP) specification, GPMI interface specification, and Peripheral Component Interconnect Express (PCI-Express) interface specification. Correspondingly, the interfaces are HDMI and Type-C interfaces, etc.

[0123] For example, in the above examples, the interface connection between the set-top box and the TV, or between the game console and the monitor, is via a USB cable, following the USB interface standard; or the connection is via an HDMI cable, following the HDMI interface standard.

[0124] It is understood that the interface specifications used for signal transmission between the above-mentioned devices are merely exemplary. In practical applications, these interface specifications may include other or any future interface specifications, such as GPMI as defined in the GPMI 1.1 / 2.0 standard. This application embodiment does not impose any specific limitations on these.

[0125] Figure 5 This is a schematic diagram of an encoding / decoding system provided in this application. The encoding / decoding system 500 includes a source device 510 and a destination device 520. The source device 510 encodes the sequence to be encoded to obtain an encoded sequence and transmits the encoded sequence to the destination device 520. The destination device 520 decodes the sequence to be decoded to obtain a decoded sequence. The sequence to be encoded is a binary sequence, and the encoded sequence is a ternary sequence. The sequence to be decoded is a ternary sequence, and the decoded sequence is a binary sequence.

[0126] Specifically, the source device 510 includes an image acquisition unit 511, a preprocessor 512, an encoder 513, and a communication interface 514.

[0127] Image acquisition device 511 is used to acquire raw images. Image acquisition device 511 includes or is any category of image capture device for, for example, capturing real-world images, and / or any category of image or commentary (for screen content encoding, some text on the screen is also considered as an image to be encoded or part of an image) generation device, such as a computer graphics processor for generating computer-animated images, or any category of device for acquiring and / or providing real-world images, computer-animated images (e.g., screen content, virtual reality (VR) images), and / or any combination thereof (e.g., augmented reality (AR) images). Image acquisition device 511 can be a camera for capturing images or a memory for storing images. Image acquisition device 511 may also include any category of (internal or external) interface for storing previously captured or generated images and / or acquiring or receiving images. When image acquisition device 511 is a camera, image acquisition device 511 may be, for example, a local or integrated camera integrated into a source device; when image acquisition device 511 is a memory, image acquisition device 511 may be a local or integrated memory integrated into a source device. When the image acquisition device 511 includes an interface, the interface is, for example, an external interface for receiving images from an external video source. The external video source is, for example, an external image capture device, such as a camera, external storage, or an external image generation device. The external image generation device is, for example, an external computer graphics processor, computer, or server. The interface is any type of interface according to any proprietary or standardized interface protocol, such as a wired or wireless interface, or an optical interface.

[0128] An image is viewed as a two-dimensional array or matrix of pixels (picture elements). Pixels in the array are also called sample points. The number of sample points in the array or image along the horizontal and vertical directions (or axes) defines the image's size and / or resolution. To represent color, three color components are typically used; that is, an image can be represented as or contain three sample arrays. For example, in RBG format or color space, an image includes corresponding red, green, and blue sample arrays. However, in video coding, each pixel is typically represented in a luma / chroma format or color space. For example, for a YUV format image, this includes a luma component indicated by Y (sometimes also indicated by L) and two chroma components indicated by U and V. The luma component Y represents the brightness or grayscale level intensity (e.g., both are the same in a grayscale image), while the two chroma components U and V represent chroma or color information components. Accordingly, a YUV format image includes a luma sample array of luma sample values ​​(Y) and two chroma sample arrays of chroma values ​​(U and V). The conversion or transformation of an RGB format image to YUV format, and vice versa, is also known as color transformation or conversion. If the image is black and white, it includes a luminance sampling array. In this application, the image transmitted from the image acquisition unit 511 to the encoder 513 is also referred to as raw image data.

[0129] The preprocessor 512 receives data acquired by the image acquisition unit 511 and preprocesses the data to obtain a preprocessed image. For example, the preprocessing performed by the preprocessor 512 includes retouching, color format conversion (e.g., from RGB format to YUV format), color adjustment, or noise reduction.

[0130] Optionally, the preprocessor 512 is also used to convert the preprocessed image into a binary sequence.

[0131] Encoder 513 receives preprocessed data generated by preprocessor 512 and encodes the preprocessed data to obtain a bitstream. For example, if the preprocessed data is a binary sequence, encoding the preprocessed data means mapping the binary sequence to a ternary sequence, and the bitstream is a ternary sequence. For example, mapping 11 bits in the binary sequence to 7 symbols. Encoder 513 includes a decision unit 5131 and an encoding unit 5132. Decision unit 5131 divides the 11 bits into four groups: a first group containing 3 bits, a second group containing 3 bits, a third group containing 3 bits, and a fourth group containing 2 bits. If the data pattern of the 2 bits in the fourth group is a specific bit combination, it instructs encoding unit 5132 to use a first encoding method; if the data pattern of the 2 bits in the fourth group is a non-specific bit combination, it instructs encoding unit 5132 to use a second encoding method.

[0132] The first encoding method refers to the encoding method that combines feature combinations with any group of 3 bits.

[0133] The second encoding method refers to encoding the first group containing 3 bits, the second group containing 3 bits, the third group containing 3 bits, and the fourth group containing 2 bits separately.

[0134] The communication interface 514 is used to receive the code stream generated by the encoder 513 and send the code stream to the destination device 520 through the communication channel 530 so that the destination device 520 can decode the code stream to obtain the decoded data.

[0135] The target device 520 includes a display 521, a post-processor 522, a decoder 523, and a communication interface 524.

[0136] Communication interface 524 is used to receive the bit stream sent by communication interface 514 and transmit the bit stream to decoder 523 so that decoder 523 can decode the bit stream to obtain decoded data.

[0137] Communication interfaces 514 and 524 can be used to send or receive video-related data through a direct communication link between the source device 510 and the destination device 520, such as a direct wired or wireless connection, or through any type of network, such as a wired network, a wireless network or any combination thereof, any type of private network and public network or any combination thereof.

[0138] Both communication interface 514 and communication interface 524 can be configured as follows: Figure 5 The arrow pointing from the source device 510 to the corresponding communication channel 530 of the destination device 520 indicates a one-way communication interface or a two-way communication interface, and can be used to send and receive messages, etc., to establish a connection, acknowledge and exchange any other information related to the communication link and / or data transmission such as encoded bit stream transmission, etc.

[0139] Decoder 523 is used to decode the bitstream to obtain decoded data. For example, the decoded data is a ternary sequence. Decoding the decoded data means mapping the ternary sequence to a binary sequence, and the bitstream is a ternary sequence. That is, mapping the 7 symbols contained in the ternary sequence to 11 bits. For example, decoder 523 includes decision unit 5231 and decoding unit 5232. For example, decision unit 5231 is used to decode the sequence according to the feature combination of the specific location domain when the 7 symbols include feature combinations of the specific location domain, and instruct decoding unit 5232 to adopt a first decoding method; when the 7 symbols do not include feature combinations located in the specific location domain, it instructs decoding unit 5232 to adopt a second decoding method.

[0140] The first decoding method refers to mapping the feature combination of 7 symbols and 1 symbol to a group of 3 bits, and mapping the other two groups of 2 symbols in the 7 symbols to another two groups of 3 bits. The 11 bits include the first group of 3 bits, the other two groups of 3 bits and 2 bits, and the 2-bit data pattern is a specific bit combination.

[0141] The second decoding method refers to mapping one symbol out of seven symbols to two bits, mapping a group of two symbols out of seven symbols to a group of three bits, and mapping two other groups of two symbols out of seven symbols to two other groups of three bits. The two-bit data pattern is a non-specific bit combination. The eleven bits include two bits, a group of three bits, and two other groups of three bits.

[0142] Optionally, decoder 523 is also used to reconstruct the video using the decoded data.

[0143] The post-processor 522 is used to receive the reconstructed video or image generated by the decoder 523 and perform post-processing on the reconstructed video or image. For example, the post-processing performed by the post-processor 522 includes color format conversion (e.g., from YUV format to RGB format), color correction, retouching or resampling, or any other processing.

[0144] Display 521 is used to display the reconstructed video or image. Display 521 can be or can include any class of display devices for presenting the reconstructed image, such as integrated or external displays or monitors. For example, the display can include a liquid crystal display (LCD), an organic light-emitting diode (OLED) display, a plasma display, a projector, a micro-LED display, liquid crystal on silicon (LCoS), a digital light processor (DLP), or any other class of display.

[0145] Both encoder 513 and decoder 523 can be implemented as any of a variety of suitable circuits, such as one or more microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), discrete logic, hardware, or any combination thereof. If the technology is implemented in part in software, the device can store software instructions in a suitable non-transitory computer-readable storage medium, and one or more processors can be used to execute the instructions in hardware to perform the technology of this disclosure. Any of the foregoing (including hardware, software, combinations of hardware and software, etc.) can be considered as one or more processors.

[0146] The image acquisition unit 511 and the encoder 513 can be integrated into a single physical device or located on different physical devices; this is not limited. For example, such as... Figure 5 The source device 510 shown includes an image acquisition unit 511 and an encoder 513, indicating that the image acquisition unit 511 and the encoder 513 are integrated into a single physical device. Therefore, the source device 510 can also be referred to as an acquisition device. The source device 510 can be, for example, a mobile phone, tablet computer, computer, laptop computer, camera, wearable device, in-vehicle device, terminal device, virtual reality (VR) device, augmented reality (AR) device, mixed reality (MR) device, extended reality (XR) device, or other image acquisition device. If the source device 510 does not include the image acquisition unit 511, it means that the image acquisition unit 511 and the encoder 513 are two different physical devices, and the source device 510 can acquire raw images from other devices (such as image acquisition devices or image storage devices).

[0147] In this application, the decision unit 5131 and the encoder 513 can be integrated into one physical device or set on different physical devices, without limitation. If the encoder 513 does not include the decision unit 5131, it means that the decision unit 5131 and the encoder 513 are two different physical devices.

[0148] Furthermore, the display 521 and the decoder 523 can be integrated into a single physical device or located on different physical devices; there is no limitation on this. For example, such as... Figure 5The destination device 520 shown includes a display 521 and a decoder 523, indicating that the display 521 and decoder 523 are integrated into a single physical device. Therefore, the destination device 520 can also be called a playback device. The destination device 520 has the functions of decrypting, decoding, and displaying the reconstructed video or image. The destination device 520 can be, for example, a monitor, television, digital media player, video game console, in-vehicle computer, or other image display device. If the destination device 520 does not include a display 521, it means that the display 521 and decoder 523 are two different physical devices. After decoding and reconstructing the video or image from the bitstream, the destination device 520 transmits the reconstructed video or image to other display devices (such as a television or digital media player) for display.

[0149] also, Figure 5 The source device 510 and destination device 520 can be integrated on a single physical device or located on different physical devices; there is no limitation on this. This application also does not limit the number of devices included in the encoding / decoding system. The encoding / decoding system includes multiple source devices and multiple destination devices.

[0150] In these embodiments, the source device 510 or its corresponding functions and the destination device 520 or its corresponding functions can be implemented using the same hardware and / or software or by separate hardware and / or software or any combination thereof. As described, Figure 5 The presence and division of different units or functions in the source device 510 and / or destination device 520 shown may vary depending on the actual device and application, which is obvious to those skilled in the art.

[0151] The structure of the above-described encoding / decoding system is only illustrative. In some possible implementations, the encoding / decoding system may also include other devices, such as end-side devices or cloud-side devices. After the source device 510 acquires the original image, it preprocesses the original image to obtain a preprocessed image; and then transmits the preprocessed image to the end-side device or cloud-side device, which performs encoding / decoding on the preprocessed image.

[0152] Next, the encoding and decoding process will be explained with reference to the accompanying diagrams. Figure 6 This is a flowchart illustrating an encoding / decoding method provided in this application. Figure 5 The encoding and decoding process performed by the source device 510 and the destination device 520 will be used as an example for illustration. Figure 6 As shown in (a) above, the encoding process includes the following steps.

[0153] Step 610: Obtain the sequence to be encoded, which contains 11 bits.

[0154] The sequence to be encoded refers to a binary sequence, that is, a sequence containing multiple bits. In this application, an example is given where the sequence to be encoded contains 11 bits. This application does not limit the method of obtaining the sequence to be encoded.

[0155] In some embodiments, the source device obtains the binary sequence from its memory or other memory. Optionally, if the binary sequence contains a large number of bits, the binary sequence is divided into multiple sequences to be encoded in units of 11 bits, and PAM3 encoding is performed on each of the multiple sequences to be encoded, that is, the binary sequence is mapped to a ternary sequence.

[0156] In other embodiments, the source device performs real-time format conversion on the acquired data to obtain a binary sequence. For example, if the source device 510 carries an image acquisition device 511, the source device 510 acquires video through the image acquisition device 511 and converts the video into a binary sequence. Optionally, the source device 510 may also receive video acquired by other devices; or obtain video from its own memory or other storage. The video includes at least one of real-time acquired real-world video, video stored in the device, and video synthesized from multiple videos. This embodiment does not limit the method of video acquisition or the type of video.

[0157] Step 620: Divide the 11 bits into four groups: the first group contains 3 bits, the second group contains 3 bits, the third group contains 3 bits, and the fourth group contains 2 bits.

[0158] This application does not limit the grouping method of the 11 bits. That is, it does not limit the bit fields of the first group of 3 bits, the second group of 3 bits, the third group of 3 bits, and the fourth group of 2 bits in the 11 bits.

[0159] The first group of 3 bits, the second group of 3 bits, the third group of 3 bits, and the fourth group of 2 bits are bits in any of the 11-bit bit fields. Within the 11-bit bit fields, the bit fields of the first group of 3 bits, the second group of 3 bits, the third group of 3 bits, and the fourth group of 2 bits are different. Alternatively, the bit fields of the first group of 3 bits, the second group of 3 bits, the third group of 3 bits, and the fourth group of 2 bits do not overlap.

[0160] For example, starting from the most significant bit of 11 bits, divide the 11 bits into four groups, each containing consecutive bits of a bit field. Assume Bit[10:0] represents an 11-bit bit field, and divide Bit[10:0] into B[10:8], B[7:5], B[4:2], and B[1:0]. B[10:8] represents three consecutive bits in the 11-bit bit field. B[7:5] represents three consecutive bits in the 11-bit bit field. B[4:2] represents three consecutive bits in the 11-bit bit field. B[1:0] represents two consecutive bits in the 11-bit bit field. The first group of three bits contains the three bits from bit field B[10:8]. The second group of three bits contains the three bits from bit field B[7:5]. The third group of three bits contains the three bits from bit field B[4:2]. The fourth group of 2 bits includes 2 bits in bit field B[1:0].

[0161] For example, starting from the least significant bit of the 11 bits, divide the 11 bits into four groups, each group containing consecutive bits of the bit field. Divide Bit[10:0] into Bit[2:0], Bit[5:3], Bit[8:6], and Bit[10:9]. Bit[2:0] represents 3 consecutive bits in the 11-bit bit field. Bit[5:3] represents 3 consecutive bits in the 11-bit bit field. Bit[8:6] represents 3 consecutive bits in the 11-bit bit field. Bit[10:9] represents 2 consecutive bits in the 11-bit bit field. The first group of 3 bits includes the 3 bits in the bit field Bit[2:0]. The second group of 3 bits includes the 3 bits in the bit field Bit[5:3]. The third group of 3 bits includes the 3 bits in the bit field Bit[8:6]. The fourth group of 2 bits includes the 2 bits in the bit field Bit[10:9].

[0162] The above example illustrates the grouping of 11 bits using consecutive bit fields. In some embodiments, the 11 bits are also grouped using non-consecutive bit fields.

[0163] For example, group 11 bits using cross-bit fields. Starting from the least significant bit, divide the 11 bits into four groups using the first, second, and third bits of each group. Divide Bit[10:0] into Bit[8,4,0], Bit[9,5,1], Bit[10,6,2], and Bit[7,3]. Bit[8,4,0] represents three discrete bit fields within the 11-bit field. Bit[9,5,1] represents three discrete bit fields within the 11-bit field. Bit[10,6,2] represents three discrete bit fields within the 11-bit field. Bit[7,3] represents two discrete bit fields within the 11-bit field. The first group of 3 bits includes the 3 bits in bit field Bit[8,4,0]. The second group of 3 bits includes the 3 bits in bit field Bit[9,5,1]. The third group of 3 bits includes 3 bits in the bit field [10, 6, 2]. The fourth group of 2 bits includes 2 bits in the bit field [7, 3].

[0164] For example, group 11 bits into equally spaced bit fields. Starting from the least significant bit of the 11 bits, select Bit[4,2,0] from the 11 bit field after skipping one bit field. Then, select Bit[7,5,1] from the remaining bit field Bit[10,9,8,7,6,5,3,1] after skipping one bit field again, leaving Bit[10,9,8,6,3]. Then, select Bit[10,8,3] from the remaining bit field Bit[10,9,8,6,3] after skipping one bit field again, leaving Bit[9,6]. Divide Bit[10:0] into Bit[4,2,0], Bit[7,5,1], Bit[10,8,3], and Bit[9,6]. The first group of 3 bits includes the 3 bits in bit field Bit[4,2,0]. The second group of 3 bits includes the 3 bits in bit field Bit[7,5,1]. The third group of 3 bits includes 3 bits in the bit field [10, 8, 3]. The fourth group of 2 bits includes 2 bits in the bit field [9, 6].

[0165] Next, it is determined whether the two bits in the fourth group constitute a specific bit combination, i.e., whether the data pattern of the two bits in the fourth group is a specific bit combination. A data pattern refers to the arrangement of binary data across multiple bit fields. If the data pattern of the two bits in the fourth group is a specific bit combination, the first encoding method is used to perform PAM3 encoding on the three bits in the first group, the three bits in the second group, and the three bits in the third group, mapping 11 bits to 7 symbols, resulting in the first encoded sequence, which includes 7 symbols. Step 630 is then executed. If the data pattern of the two bits in the fourth group is not a specific bit combination, the second encoding method is used to perform PAM3 encoding on the three bits in the first group, the three bits in the second group, the three bits in the third group, and the two bits in the fourth group, mapping 11 bits to 7 symbols, resulting in the second encoded sequence, which includes 7 symbols. Step 640 is then executed. Symbols are represented using ternary data. Bits are represented using binary data.

[0166] Step 630: If the two bits in the fourth group are a specific bit combination, send the first encoded sequence.

[0167] Step 640: If the two bits in the fourth group are a non-specific bit combination, send the second encoded sequence.

[0168] In binary, the binary data of a bit field is either 0 or 1; that is, a bit in a bit field is either 0 or 1. By setting the value of each bit in two bit fields, the binary data in the two bit fields can be combined to obtain four possible bit combinations. For example, ... Figure 7 As shown, the first column of bit combinations represents four possible bit combinations obtained by combining binary data from two bit fields. By setting the value of each bit field in the three bit fields, eight possible bit combinations can be obtained by combining binary data from the three bit fields. For example... Figure 8 As shown, the bit combinations in the first column represent eight possible bit combinations obtained by combining binary data in three bit fields.

[0169] In ternary number system, a bit field's ternary data is 0, 1, or 2; that is, the sign of a bit field is 0, 1, or 2. Setting the value of one bit field yields three possible signs. For example, ... Figure 7 As shown, the second and third columns represent ternary data in two ways. The symbols in the second column represent three different symbols in one bit field, and the symbols in the third column also represent three different symbols in one bit field. By setting the value of each bit field in the two bit fields, the ternary data in the two bit fields can be combined to obtain nine possible symbol combinations. For example... Figure 8 As shown, the symbol combinations in the second column represent 9 symbol combinations obtained by combining ternary data on 2 bit fields.

[0170] When a one-to-one mapping relationship is established between 4 bit combinations and 3 symbols, since ternary data in one bit field can have at most 3 symbols, there are bit combinations among the 4 bit combinations that have not established a mapping relationship with the 3 symbols.

[0171] One-to-one mapping refers to a combination of bits mapping to a combination of symbols. Different combinations of bits map to different combinations of symbols.

[0172] Non-specific bit combinations include bit combinations that have a mapping relationship with three of the four types of symbols.

[0173] A specific bit combination includes bit combinations that do not have a mapping relationship with three of the four types of symbols.

[0174] In some embodiments, three of the four bit combinations are mapped one-to-one with the three symbols. That is, one of the three bit combinations has a mapping relationship with one of the three symbols. Non-specific bit combinations include the three bit combinations. Specific bit combinations include the one bit combination other than the three bit combinations among the four bit combinations.

[0175] The regular mapping relationship between bit combinations and symbol combinations makes circuit implementation simple and provides advantages such as low latency. For example, ... Figure 7 As shown, based on the sequential increase of the binary data in the two bit fields, three of the four bit combinations are mapped one-to-one with three symbols. The three bit combinations 00, 01, and 10 are mapped one-to-one with the three symbols 0, 1, and 2. Non-specific bit combinations include 00, 01, and 10. Specific bit combinations include 11.

[0176] This application does not limit the specific mapping relationship between the four bit combinations and the three symbols. That is, it does not limit which bit combination among the four bit combinations has a mapping relationship with which symbol combination among the three symbols.

[0177] For example, the three bit combinations include 01, 10, and 11, and the three symbols include 1, 0, and 2. Bit combination 01 maps to symbol 1, bit combination 10 maps to symbol 0, and bit combination 11 maps to symbol 2.

[0178] Optionally, a specific bit combination can be any one of the four bit combinations. For example, a specific bit combination is a combination of consecutive identical symbols. A specific bit combination is 00 or 11. For example, non-specific bit combinations include 01, 10, and 11. A specific bit combination includes 00.

[0179] This reduces the run length of the circuit, reduces the occurrence of consecutive identical digits in the encoded sequence, reduces circuit drift, and makes the circuit work more stably.

[0180] In some embodiments, the eight bit combinations of binary data in three bit fields are mapped one-to-one with eight symbol combinations of nine symbol combinations of ternary data in two bit fields. That is, one bit combination from the eight bit combinations has a mapping relationship with one symbol combination from the eight symbol combinations. This application does not limit the specific mapping relationship between the eight bit combinations and the nine symbol combinations. In other words, it does not limit which bit combination from the eight bit combinations has a mapping relationship with which symbol combination from the nine symbol combinations.

[0181] The feature combination is one of the nine symbol combinations, excluding the eight. This application does not limit the feature combination; it can be any one of the nine symbol combinations. Optionally, the feature combination can be a combination of consecutive identical symbols from the nine symbol combinations. For example, the feature combination includes one or more of 00, 11, or 22.

[0182] For example, such as Figure 8 As shown in (a), a constellation diagram maps 3 bits to 2 symbols. The white dots represent the other symbol combination among the 9 possible combinations, i.e., the feature combination. For example... Figure 8 As shown in (b), a mapping table maps 3 bits to 2 symbols. Based on the sequential order of the binary data in the 3 bit fields, 8 bit combinations of the binary data in the 3 bit fields are mapped one-to-one to 8 symbol combinations out of 9 symbol combinations of the 2 bit fields. The 8 bit combinations, 000 to 111, are mapped one-to-one to the 8 symbol combinations out of 9, 22 to 01.

[0183] Optionally, the above-mentioned information such as non-specific bit combinations, specific bit combinations, feature combinations, 2B1T grouping methods, 2B1T mapping relationships, 3B2T mapping relationships, and 11-bit grouping methods can be pre-configured so that the above information can be used when mapping 11 bits into 7 symbols according to the encoding and decoding method provided in this application.

[0184] The first encoding method refers to encoding by combining feature combinations with any group of 3 bits. Encoding 11 bits into 7 symbols includes mapping the first group's 3 bits to 2 symbols, the second group's 3 bits to 2 symbols, and the third group's 3 bits to 2 symbols. The 7 symbols include one symbol from any group's 2-symbol mapping, two symbols from the other two groups, and a feature combination with a specific bit field. The specific bit field is any two bit fields from the 7 symbols. The feature combination is any one of 9 symbol combinations, obtained by combining ternary data from two bit fields.

[0185] The bit field arrangement of feature combinations provides multiple encoding methods. The feature combination of a specific bit field serves as an identifier, associating the feature combination of the specific bit field with two symbols mapped from any group of three bits, indicating the encoding method.

[0186] Associating a feature combination with two symbols of a 3-bit mapping of any group means that, when the data pattern of two bits in the fourth group is a specific bit combination, one of the two symbols of the 3-bit mapping of any group of three bits is used as one of the seven symbols, and the other symbol of the 2 symbols of the 3-bit mapping of any group of three bits is replaced with a feature combination of a specific positioning domain.

[0187] This application does not limit which specific bit field of the two symbols is used as one of the seven symbols or is replaced by a specific combination of bit fields. For example, the two symbols of any group of three-bit mappings include one symbol on bit field 0 (T[0]) and one symbol on bit field 1 (T[1]). If one symbol of the two symbols of any group of three-bit mappings is on bit field 0 (T[0]), then the other symbol of the two symbols of any group of three-bit mappings is on bit field 1 (T[1]). If one symbol of the two symbols of any group of three-bit mappings is on bit field 1 (T[1]), then the other symbol of the two symbols of any group of three-bit mappings is on bit field 0 (T[0]). That is, when one symbol in bit field 0 (T[0]) of two symbols is used as one of the seven symbols, one symbol in bit field 1 (T[1]) of two symbols is replaced with a feature combination of specific bit fields.

[0188] For example, if the two symbols of any group of three bits are mapped to 21, then the symbol 1 on T0 of the two symbols is taken as one of the seven symbols, and the symbol 2 on T1 of the two symbols is replaced with a feature combination of the localized domain. The seven symbols include the feature combination of the localized domain and the 1 on T0 of the two symbols.

[0189] For example, if any group of 3 bits maps to 2 symbols of 10, then the symbol 1 on T1 of the 2 symbols is taken as one of the 7 symbols, and the symbol on T0 of the 2 symbols is replaced with a feature combination of the specific localization domain. The 7 symbols include the feature combination of the specific localization domain and the 1 on T1 of the 2 symbols.

[0190] Understandably, the seven symbols include a feature combination of a specific location field, one of the two symbols in any group of three-bit mappings, and two symbols from the other two groups of three-bit mappings. The feature combination of the specific location field replaces the other symbol in any group of three-bit mappings. The seven symbols do not contain the other symbol in any group of three-bit mappings. The two symbols in any group of three-bit mappings include the other symbol associated with the feature combination of the specific location field and one of the two symbols in any group of three-bit mappings included in the seven symbols.

[0191] Optionally, the first feature combination of the first specific location field indicates the encoding method of combining the first feature combination of the first specific location field with two symbols of any group of three-bit mappings. The second feature combination of the second specific location field indicates the encoding method of combining the second feature combination of the second specific location field with two symbols of any group of three-bit mappings. The third feature combination of the third specific location field indicates the encoding method of combining the third feature combination of the third specific location field with two symbols of any group of three-bit mappings.

[0192] Optionally, the first feature combination of the first specific location domain corresponds to two symbols mapped from any group of three bits encoded by combining the first feature combination of the first specific location domain. The second feature combination of the second specific location domain corresponds to two symbols mapped from any group of three bits encoded by combining the second feature combination of the second specific location domain. The third feature combination of the third specific location domain corresponds to two symbols mapped from any group of three bits encoded by combining the third feature combination of the third specific location domain.

[0193] Optionally, the first feature combination indicator of the first specific location field is encoded by combining the first feature combination with the two symbols of the three-bit mapping of any group and the two symbols of the three-bit mapping of any group. The second feature combination indicator of the second specific location field is encoded by combining the second feature combination with the three bits of any group and the two symbols of the three-bit mapping of any group. The third feature combination indicator of the third specific location field is encoded by combining the third feature combination with the three bits of any group and the two symbols of the three-bit mapping of any group.

[0194] Optionally, the first feature combination of the first specific positioning field indicates the bit field of one of the two symbols obtained by combining the first feature combination with two symbols of any group of three-bit mappings. The second feature combination of the second specific positioning field indicates the bit field of one of the two symbols obtained by combining the second feature combination with two symbols of any group of three-bit mappings. The third feature combination of the third specific positioning field indicates the bit field of one of the two symbols obtained by combining the third feature combination with two symbols of any group of three-bit mappings.

[0195] It should be noted that if any group of 3 bits is the same as the first group of 3 bits, then the other two groups of 3 bits are the same as the second and third groups of 3 bits; if any group of 3 bits is the same as the second group of 3 bits, then the other two groups of 3 bits are the same as the first and third groups of 3 bits; if any group of 3 bits is the same as the third group of 3 bits, then the other two groups of 3 bits are the same as the first and second groups of 3 bits. Furthermore, the encoding and decoding of the other two groups of 3 bits remain unchanged; only the bit fields are adjusted.

[0196] In some embodiments, one of the two symbols in any set of three-bit mappings is associated with a characteristic combination of specific bit fields. The value of the other symbol is different, and the specific bit fields associated with the other symbol are different.

[0197] For example, one of the two symbols is the first value, the specific location domain is the first specific location domain, and the first feature combination is set in the first specific location domain.

[0198] For example, if one of the two symbols is the second value, the specific location domain is the second specific location domain, and the second feature combination is set in the second specific location domain.

[0199] For example, if one of the two symbols is the third value, the specific location domain is the third specific location domain, and a third feature combination is set in the third specific location domain.

[0200] For example, the value of the other symbol in the two symbols includes 0, 1, and 2. For instance, if the other symbol is 0, a first feature combination is set in the first specific location domain. If the other symbol is 1, a second feature combination is set in the second specific location domain. If the other symbol is 2, a third feature combination is set in the third specific location domain.

[0201] For example, if one of the two symbols is 1, a first feature combination is set in the first specific location domain. If the other of the two symbols is 2, a second feature combination is set in the second specific location domain. If the other of the two symbols is 0, a third feature combination is set in the third specific location domain.

[0202] The first, second, and third specific location domains are all different. In the bit fields of the seven symbols, the first, second, and third specific location domains are different and do not overlap.

[0203] The first, second, and third feature combinations are the same. Alternatively, the first, second, and third feature combinations are different.

[0204] Optionally, the first feature combination, the second feature combination, and the third feature combination are all the same. For example, the first feature combination, the second feature combination, and the third feature combination are all any one of 00, 11, or 22. Understandably, the value of the other symbol among the two symbols is different, and the specific bit fields associated with the other symbol among the two symbols are different. In the bit fields of the seven symbols, different specific bit fields are set with feature combinations. Different specific bit fields are set with the same feature combination, that is, the first feature combination, the second feature combination, and the third feature combination are all the same.

[0205] Optionally, the first feature combination, the second feature combination, and the third feature combination can all be different. For example, the first feature combination is 00, the second feature combination is 11, and the third feature combination is 22. Or, the first feature combination is 11, the second feature combination is 00, and the third feature combination is 22. Understandably, if the value of one of the two symbols is different, the specific bit field associated with that symbol will also be different. In the bit fields of the seven symbols, different specific bit fields are set with different feature combinations. That is, the first feature combination, the second feature combination, and the third feature combination are all different.

[0206] Optionally, two of the first, second, and third feature combinations may be the same, while the third feature combination may differ from the other two. Understandably, the value of one of the two symbols may differ, and the specific bit fields associated with the other symbol may differ. In the bit fields of the seven symbols, different specific bit fields are set with feature combinations. The feature combinations set for different specific bit fields may be the same or different. For example, the first and second feature combinations may be the same, but the third feature combination may differ from the first. The first feature combination of the first specific bit field is 00, the second feature combination of the second specific bit field is 00, and the third feature combination of the third specific bit field is 22. As another example, the second and third feature combinations may be the same, but the first and third feature combinations may differ. The first feature combination of the first specific bit field is 00, the second feature combination of the second specific bit field is 11, and the third feature combination of the third specific bit field is 11.

[0207] In some embodiments, the first feature combination is another symbol combination other than the eight symbol combinations among the nine symbol combinations of three bits in any group. The second feature combination is another symbol combination other than the eight symbol combinations among the nine symbol combinations of three bits in another group. The third feature combination is another symbol combination other than the eight symbol combinations among the nine symbol combinations of three bits in yet another group.

[0208] The following examples illustrate how feature combinations are encoded by combining 3 bits of any group, using Tables 2 to 9 as examples.

[0209] For example, suppose Bit[10:0] is divided into B[10:8], B[7:5], B[4:2], and B[1:0]. The 11 bits include 3 bits in B[10:8], 3 bits in B[7:5], 3 bits in B[4:2], and 2 bits in B[1:0]. The first group of 3 bits contains 3 bits in bit field B[10:8]. The second group of 3 bits contains 3 bits in bit field B[7:5]. The third group of 3 bits contains 3 bits in bit field B[4:2]. The fourth group of 2 bits contains 2 bits in bit field B[1:0]. The first feature combination is one of the 9 symbol combinations belonging to the 3 bits in the first group. The second feature combination is one of the 9 symbol combinations belonging to the 3 bits in the second group. The third feature combination is one of the 9 symbol combinations belonging to the 3 bits in the third group. The first, second, and third feature combinations are the same. The first, second, and third feature combinations are all 00. Specific bit combinations include 11.

[0210] As shown in Table 2, the feature combination 00 is combined with the 3 bits on B[4:2]. One of the 2 symbols mapped by the 3 bits on B[4:2] is used as one of the 7 symbols, and the other symbol is replaced by the feature combination of the specific positioning domain.

[0211] When the two bits in B[1:0] are a specific bit combination, the three bits in bit field B[10:8] are mapped to two symbols. The three bits in bit field B[7:5] are mapped to two symbols. The three bits in bit field B[4:2] are mapped to two symbols. In the bit field of the seven symbols, bit field 2 (T[2]) is set with one of the two symbols mapped from the three bits in B[4:2], and the specific bit field is determined according to the value of the other symbol mapped from the three bits in B[4:2]. The other symbol mapped from the three bits in B[4:2] is the first value, and the first specific bit field is bit field 6 and bit field 5 (T[6:5]) in the bit field of the seven symbols. The first feature combination is set in the first specific bit field. The two symbols mapped from the three bits in bit field B[10:8] are set in bit field 4 and bit field 3 (T[4:3]) in the bit field of the seven symbols. The two symbols of the three bits mapped on bit field B[7:5] are set in bit field 1 and bit field 0 (T[1:0]) in the bit field of the seven symbols.

[0212] The third symbol in the three-bit mapping of bit field B[4:2] is a second value. The second specific positioning field is bit field 4 and bit field 3 in the bit field of the seven symbols (T[4:3]). The second feature combination is set on the second specific positioning field. The second symbol in the three-bit mapping of bit field B[10:8] is set in bit field 6 and bit field 5 in the bit field of the seven symbols (T[6:5]). The second symbol in the three-bit mapping of bit field B[7:5] is set in bit field 1 and bit field 0 in the bit field of the seven symbols (T[1:0]).

[0213] The third value is one of the two symbols mapped from the three bits in bit field B[4:2]. The third specific positioning field is bit field 1 and bit field 0 (T[1:0]) in the bit field of the seven symbols. The third feature combination is set on the third specific positioning field. The two symbols mapped from the three bits in bit field B[10:8] are set in bit field 6 and bit field 5 (T[6:5]) in the bit field of the seven symbols. The two symbols mapped from the three bits in bit field B[7:5] are set in bit field 4 and bit field 3 (T[4:3]) in the bit field of the seven symbols.

[0214] When the two bits in B[1:0] are a non-specific bit combination, the three bits in bit field B[10:8] are mapped to two symbols. The three bits in bit field B[7:5] are mapped to two symbols. The three bits in bit field B[4:2] are mapped to two symbols. The two bits in bit field B[1:0] are mapped to one symbol.

[0215] Two symbols of the 3-bit mapping on bit field B[10:8] are set in bit fields 6 and 5 of the 7-symbol bit field (T[6:5]). Two symbols of the 3-bit mapping on bit field B[7:5] are set in bit fields 4 and 3 of the 7-symbol bit field (T[4:3]). Two symbols of the 3-bit mapping on bit field B[4:2] are set in bit fields 1 and 0 of the 7-symbol bit field (T[1:0]). One symbol of the 2-bit mapping on bit field B[1:0] is set in bit field 2 of the 7-symbol bit field (T[2]).

[0216] Table 2

[0217]

[0218] Table 2 above illustrates the encoding method of combining feature combinations with any group of 3 bits, using the example where the first, second, and third feature combinations are all the same. In other embodiments, the first, second, and third feature combinations are all different, as shown in Tables 3 to 5 below.

[0219] The difference between Table 3 and Table 2 is that the first, second, and third feature combinations are all different. The first feature combination is 00, the second feature combination is 11, and the third feature combination is 22.

[0220] Table 3

[0221]

[0222] The difference between Table 4 and Table 3 is that, in the case where the first special bit field is bit field 6 and bit field 5 in the bit field of 7 symbols (T[6:5]), the 2 symbols mapped by the 3 bits on B[10:8] are bit field 1 and bit field 0 in the bit field of 7 symbols (T[1:0]), and the 2 symbols mapped by the 3 bits on B[7:5] are bit field 4 and bit field 3 in the bit field of 7 symbols (T[4:3]).

[0223] Table 4

[0224]

[0225] The difference between Table 5 and Table 4 is that, in the case where the second special positioning field is bit field 4 and bit field 3 (T[4:3]) in the bit field of 7 symbols, the 2 symbols mapped by the 3 bits on B[10:8] are bit field 1 and bit field 0 (T[1:0]) in the bit field of 7 symbols, and the 2 symbols mapped by the 3 bits on B[7:5] are bit field 6 and bit field 5 (T[6:5]) in the bit field of 7 symbols.

[0226] Table 5

[0227]

[0228] In other embodiments, two feature combinations are the same in the first, second, and third feature combinations, while the third feature combination is different from the other two feature combinations. See Tables 6 to 5 below.

[0229] The difference between Table 6 and Table 2 is that the first and second feature combinations are the same, while the third feature combination is different from the first feature combination. For example, the first feature combination is 00, the second feature combination is 00, and the third feature combination is 22. When the first feature field is bit field 6 and bit field 5 in the bit field of 7 symbols (T[6:5]), the 2 symbols mapped by the 3 bits on B[10:8] are bit field 1 and bit field 0 in the bit field of 7 symbols (T[1:0]), and the 2 symbols mapped by the 3 bits on B[7:5] are bit field 4 and bit field 3 in the bit field of 7 symbols (T[4:3]).

[0230] Table 6

[0231]

[0232] The difference between Table 6 and Table 7 is that, in the case where the second special positioning field is bit field 4 and bit field 3 (T[4:3]) in the bit field of 7 symbols, the 2 symbols mapped by the 3 bits on B[10:8] are bit field 1 and bit field 0 (T[1:0]) in the bit field of 7 symbols, and the 2 symbols mapped by the 3 bits on B[7:5] are bit field 6 and bit field 5 (T[6:5]) in the bit field of 7 symbols.

[0233] Table 7

[0234]

[0235] The difference between Table 8 and Table 2 is that the second and third feature combinations are the same, while the first and second feature combinations are different. For example, the first feature combination is 00, the second feature combination is 11, and the third feature combination is 11.

[0236] Table 8

[0237]

[0238]

[0239] The difference between Table 9 and Table 8 is that, in the case where the first special positioning field is bit field 6 and bit field 5 in the bit field of 7 symbols (T[6:5]), the 3 bits on B[10:8] are mapped to 2 symbols in the bit field of 7 symbols (bit field 1 and bit field 0) (T[1:0]), and the 3 bits on B[7:5] are mapped to 2 symbols in the bit field of 7 symbols (bit field 4 and bit field 3) (T[4:3]).

[0240] Table 9

[0241]

[0242] Tables 2 to 9 above provide examples of the bit fields of the symbols mapped by the first feature combination, the second feature combination, and the third feature combination, as well as the three bits of the other two groups. There are other feasible options in practical applications.

[0243] Furthermore, when the first feature combination, the second feature combination, and the third feature combination are the same or different, the first specific bit field includes one of the eight symbol combinations other than the first feature combination among the nine symbol combinations to which the first feature combination belongs, and the first feature combination is associated with one of the three bits in the other two groups. For example, the first feature combination 00 is associated with the three bits on B[10:8]. In Tables 2, 3, 4, 6, 8, and 9, the first feature combination 00 is one of the nine symbol combinations to which the three bits on B[10:8] belong, and the bit field T[6:5] contains one of the other eight symbol combinations mapped by the first feature combination 00 or the three bits on B[10:8]. And / or, the second specific bit field includes one of the eight symbol combinations other than the second feature combination among the nine symbol combinations to which the second feature combination belongs, and the second feature combination is associated with another of the three bits in the other two groups. For example, the second feature combination 11 is associated with the 3 bits on B[7:5]. In Tables 4, 5 and 9, the second feature combination 11 is one of the 9 symbol combinations to which the 3 bits on B[7:5] belong, and the bit field T[4:3] contains one of the other 8 symbol combinations that the second feature combination 11 or the 3 bits on B[7:5] are mapped.

[0244] This allows the decoding end to accurately decode the received sequence based on the encoding method indicated by the feature combination of specific positioning fields.

[0245] It should be noted that since one of the three sets of three bits is used for encoding in combination with the feature combination, the two symbols mapped by the three bits of the set encoded in combination with the feature combination cannot be selected as the identical column. For example, in Tables 2 to 9, the third feature combination and one of the eight symbol combinations other than the third feature combination among the nine symbol combinations to which the third feature combination belongs do not appear in the same column. That is, the two bits mapped by the three bits of the third set on B[4:2] and the third feature combination do not appear in the same column.

[0246] In some embodiments, mapping 3 bits to 2 symbols includes mapping any group of 3 bits to 2 symbols in combination with a feature combination, and mapping two other groups of 3 bits to 2 symbols. When the 3-bit data pattern is one of eight bit combinations, the 3 bits are mapped to one of the eight symbol combinations corresponding to those eight bit combinations. For example, mapping 3 bits to 2 symbols in the first group means mapping one of the eight bit combinations to one of the eight symbol combinations. Another example is mapping 3 bits to 2 symbols in the second group. Yet another example is mapping 3 bits to 2 symbols in the third group. For example, such as... Figure 8As shown, 3 bits are 001, and the bit combination 001 has a mapping relationship with the symbol combination 02, so 3 bits 001 are mapped to 2 symbols 02. Alternatively, 3 bits are 001, and the bit combination 001 has a mapping relationship with the symbol combination {0, -1}, so 3 bits 001 are mapped to 2 symbols {0, -1}.

[0247] This application does not limit the specific implementation method of mapping 3 bits to 2 symbols. For example, the 3 bits can be mapped to 2 symbols by using a lookup table method, number system conversion or encoding method.

[0248] The second encoding method refers to mapping 2 bits from the fourth group to 1 symbol, 3 bits from the first group to 2 symbols, 3 bits from the second group to 2 symbols, and 3 bits from the third group to 2 symbols. The 7 symbols include 1 symbol from the 2-bit mapping of the fourth group, 2 symbols from the 3-bit mapping of the first group, 2 symbols from the 3-bit mapping of the second group, and 2 symbols from the 3-bit mapping of the third group.

[0249] In some embodiments, when the data pattern of the 2 bits in the fourth group is one of the three bit combinations, the 2 bits in the fourth group are mapped to one of the three symbols corresponding to the three bit combinations.

[0250] For example, such as Figure 7 As shown, the 2-bit data pattern is one of the 3 bit combinations, 01. The bit combination 01 has a mapping relationship with symbol 1 among the 3 symbols. The 2 bits 01 in the fourth group are mapped to symbol 1.

[0251] For example, such as Figure 7 As shown, the 2-bit data pattern is one of the 3 bit combinations, combination 10. Bit combination 10 has a mapping relationship with symbol 2 among the 3 symbols. The 2 bits of the fourth group, 10, are mapped to symbol 2.

[0252] The first group of 3 bits is mapped to 2 symbols, the second group of 3 bits is mapped to 2 symbols, and the third group of 3 bits is mapped to 2 symbols, as explained above.

[0253] Optionally, this application maps 11 bits to 7 symbols, and the correspondence between the bit fields of the 11 bits and the bit fields of the 7 symbols is not limited. The bit fields of the 11 bits correspond to any bit field of the 7 symbols. The symbols mapped by the first group of 3 bits, the second group of 3 bits, the third group of 3 bits, and the fourth group of 2 bits are respectively symbols on any bit field of the 7 symbols. The symbols obtained by mapping the first group of 3 bits, the second group of 3 bits, the third group of 3 bits, and the fourth group of 2 symbols are respectively set in different bit fields of the 7 bit fields. The bit fields of the symbols obtained by mapping the first group of 3 bits, the second group of 3 bits, the third group of 3 bits, and the fourth group of 2 symbols do not overlap in the 7 bit fields, thereby improving the flexibility of circuit implementation.

[0254] Optionally, the correspondence between the 11-bit bit field and the 7-symbol bit field is pre-configured so that the correspondence can be used when mapping the 11 bits to 7 symbols according to the encoding and decoding method provided in this application.

[0255] For example, as shown in Table 2, in the second encoding method, B[4:2] corresponds to T[1:0], that is, the two symbols obtained by mapping the three bits of B[4:2] are set in bit field 0 and bit field 1 of the seven-symbol bit field. B[7:5] corresponds to T[4:3], that is, the two symbols obtained by mapping the three bits of B[7:5] are set in bit field 4 and bit field 3 of the seven-symbol bit field. B[10:8] corresponds to T[6:5], that is, the two symbols obtained by mapping the three bits of B[10:8] are set in bit field 6 and bit field 5 of the seven-symbol bit field. B[1:0] corresponds to T[2], that is, the one symbol obtained by mapping the two bits of B[1:0] is set in bit field 2 of the seven-symbol bit field.

[0256] Optionally, in the second encoding method, B[10:8] corresponds to T[6:5], B[7:5] corresponds to T[4:3], B[4:2] corresponds to T[2:1], and B[1:0] corresponds to T[0].

[0257] As shown in Table 2, in the first encoding method, T[6:5] is a special bit field, and the two symbols obtained by mapping the three bits of B[10:8] are set in bit field 4 and bit field 3 of the bit field of the seven symbols (T[4:3]). The two symbols obtained by mapping the three bits of B[7:5] are set in bit field 1 and bit field 0 of the bit field of the seven symbols (T[1:0]). One of the two symbols obtained by mapping the three bits of the third group on B[4:2] is set in bit field 2 of the bit field of the seven symbols (T[2]).

[0258] As shown in Table 4, in the first encoding method, T[1:0] is a special bit field. The two symbols obtained by mapping the three bits of B[10:8] are set in bit field 6 and bit field 5 of the bit field of the seven symbols (T[6:5]). The two symbols obtained by mapping the three bits of B[7:5] are set in bit field 4 and bit field 3 of the bit field of the seven symbols (T[4:3]). One of the two symbols obtained by mapping the three bits of the third group on B[4:2] is set in bit field 2 of the bit field of the seven symbols (T[2]).

[0259] Optionally, the special bit field is a non-contiguous bit field among the 7 bit fields. For example, in the case of the first encoding method, T[6] and T[0] are special bit fields, the two symbols obtained by mapping the 3 bits of B[7:5] are set in bit field 2 and bit field 1 of the 7 symbol bit fields, and the two symbols obtained by mapping the 3 bits of B[10:8] are set in bit field 5 and bit field 4 of the 7 symbol bit fields. One of the two symbols of the 3 bit mapping of B[4:2] is set in bit field 3 (T[3]) of the 7 symbol bit fields.

[0260] like Figure 6 As shown in (b) of the diagram, the decoding process includes the following steps.

[0261] Step 650: Receive the sequence to be decoded, which includes 7 symbols.

[0262] Determine whether a specific bit field of the 7 symbols contains a feature combination. If the 7 symbols contain a feature combination of the specific bit field, it indicates that the first encoding method is used to encode the 11 bits, and step 660 is executed; if the 7 symbols do not contain a feature combination of the specific bit field, it indicates that the second encoding method is used to encode the 11 bits, and step 670 is executed.

[0263] Step 660: When the 7 symbols include feature combinations of specific positioning domains, the 7 symbols are decoded into 11 bits according to the feature combinations of specific positioning domains to obtain the first decoded sequence, which includes 11 bits.

[0264] The seven symbols include combinations of one symbol, two symbols, two symbols, and a specific positioning field. The eleven bits include three bits from the first group, three bits from the second group, three bits from the third group, and two bits from the third group, with the two bits being a specific bit combination.

[0265] The specific positioning field is any two of the seven symbol bit fields, and the feature combination is any one of the nine symbol combinations. The nine symbol combinations are obtained by combining ternary data on the two bit fields.

[0266] In the seven symbols, the feature combination and one symbol are mapped to a group of three bits, and the other two groups of two symbols in the seven symbols are mapped to another two groups of three bits.

[0267] The feature combination of a specific location field is used to indicate one of the seven symbols. The one symbol associated with the feature combination of the specific location field and the one symbol indicated by the feature combination of the specific location field result in two symbols, which are then mapped to any set of three bits.

[0268] Two of the seven symbols, excluding the feature combination, are mapped to another set of three bits. The other two symbols, excluding the feature combination and the two other symbols, are mapped to yet another set of three bits.

[0269] For example, a feature combination and one symbol are mapped to 3 bits in the third group, and the two symbols from the other two groups of 7 symbols are mapped to 3 bits in the second group and 3 bits in the first group. (This is repeated three times in the original text.)

[0270] In some embodiments, the feature combination includes one of a first feature combination, a second feature combination, or a third feature combination, wherein the first feature combination, the second feature combination, or the third feature combination may be the same or different, and the first feature domain of the first feature combination, the second feature domain of the second feature combination, and the third feature domain of the third feature combination are different.

[0271] In the first possible implementation, if the first feature combination, the second feature combination, and / or the third feature combination are all the same, or if the first feature combination and the second feature combination are the same, but the third feature combination and the first feature combination are different, then it is determined whether the first specific location field contains the first feature combination, or whether the second specific location field contains the second feature combination. If the first specific location field contains the first feature combination, or the second specific location field contains the second feature combination, then it can be determined that the first encoding method is used to encode the 11 bits.

[0272] When the first specific positioning domain includes the first feature combination, the first feature combination and one symbol in the seven symbols are mapped to a group of three bits, and the other two groups of two symbols in the seven symbols are mapped to another two groups of three bits.

[0273] For example, as shown in Table 2, the first characteristic positioning field includes bit field 6 and bit field 5, and the first characteristic combination is 00, that is, T[6:5] is 00. Assume that one of the two symbols obtained by mapping the three bits on B[4:2] in advance is set in bit field 2 of the seven-symbol bit field, and the other symbol is replaced by the first characteristic combination 00, set in bit fields 6 and 5 of the seven-symbol bit field. One of the two symbols obtained by mapping the three bits on B[10:8] is set in bit fields 4 and 3 of the seven-symbol bit field. One of the two symbols obtained by mapping the three bits on B[7:5] is set in bit fields 1 and 0 of the seven-symbol bit field.

[0274] The first symbol associated with the first feature combination on T[6:5] and the symbol on bit field T[2] are combined to form two symbols, which are mapped to a group of three bits. The two symbols on T[4:3] are mapped to another group of three bits. The two symbols on T[1:0] are mapped to yet another group of three bits. The 11 bits contain one group of three bits, another group of three bits, yet another group of three bits, and a specific bit combination.

[0275] When the second specific positioning domain includes the second feature combination, the second feature combination and 1 symbol in the 7 symbols are mapped to a group of 3 bits, and the other two groups of 2 symbols in the 7 symbols are mapped to another two groups of 3 bits.

[0276] For example, as shown in Table 2 or Table 6, the second feature field includes bit field 4 and bit field 3, and the second feature combination is 00, that is, T[4:3] is 00. The symbol associated with the second feature combination on T[4:3] and the symbol on bit field T[2] are combined to form two symbols, mapped to a group of three bits. The two symbols on T[6:5] are mapped to another group of three bits. The two symbols on T[1:0] are mapped to yet another group of three bits.

[0277] When the third feature domain includes the second feature combination, the third feature combination and one symbol in the seven symbols are mapped to a group of three bits, and the other two groups of two symbols in the seven symbols are mapped to another two groups of three bits.

[0278] For example, as shown in Table 2, the third feature field includes bit field 1 and bit field 0, and the second feature combination is 00, that is, T[1:0] is 00. The one symbol associated with the third feature combination on T[1:0] and the one symbol on bit field T[2] are combined to form two symbols, mapped to a group of three bits. The two symbols on T[6:5] are mapped to another group of three bits. The two symbols on T[4:3] are mapped to yet another group of three bits.

[0279] In the second possible implementation, if the first feature combination, the second feature combination, and the third feature combination are different, it is determined whether the first feature location field contains the first feature combination, and whether the second feature location field contains the second feature combination, and then it is determined whether the first encoding method is used to encode the 11 bits.

[0280] When the first specific location domain contains the first feature combination and the second specific location domain does not contain the second feature combination, the first feature combination and one symbol in the seven symbols are mapped to a group of three bits, and the other two groups of two symbols in the seven symbols are mapped to another two groups of three bits.

[0281] For example, as shown in Table 5 or Table 7, if the two symbols on T[6:5] are 00, it cannot be determined whether the two symbols 00 on T[6:5] are the first feature combination 00 of the first specific positioning field, or the two symbols 00 obtained by mapping the three bits on B[7:5]. In this case, it is also necessary to determine whether the two symbols on T[4:3] are 11. If the two symbols on T[4:3] are not 11, the two symbols 00 on T[6:5] are the first feature combination 00 of the first specific positioning field. The one symbol associated with the first feature combination on T[6:5] and the one symbol on the bit field T[2] are combined to form two symbols, which are mapped to a group of three bits. When the two symbols on T[4:3] are 11, the two symbols on T[6:5] are not the first feature combination 00 of the first special positioning field. The two symbols on T[6:5] are the two symbols 00 obtained by mapping the three bits on B[7:5]. The one symbol associated with the second feature combination on T[4:3] and the one symbol on the bit field T[2] are combined to form two symbols, which are mapped to a group of three bits.

[0282] In the third possible implementation, if the first feature combination, the second feature combination, and the third feature combination are different, it is determined whether the first feature location field contains the first feature combination, and whether the second feature location field contains the second feature combination, and whether the third feature location field contains the third feature combination, and then it is determined whether the first encoding method is used to encode the 11 bits.

[0283] In the case where the first specific location domain contains the first feature combination, the second specific location domain does not contain the second feature combination, and the third specific location domain does not contain the third feature combination, the first feature combination and one symbol in the seven symbols are mapped to a group of three bits, and the other two groups of two symbols in the seven symbols are mapped to another two groups of three bits.

[0284] For example, as shown in Table 4, the two symbols on T[1:0] are 22. It cannot be determined whether the two symbols 00 on T[1:0] are the third feature combination 22 of the third specific location domain, or the two symbols 22 obtained by mapping the three bits on B[10:8], or the two symbols 22 obtained by mapping the three bits on B[7:5]. At this time, it is also necessary to determine whether the two symbols on T[6:5] are 00, and whether the two symbols on T[4:3] are 11.

[0285] When the two symbols on T[6:5] are not 00 and the two symbols on T[4:3] are not 11, the two symbols on T[1:0] are the third feature combination 22 of the third feature field. The one symbol associated with the third feature combination on T[1:0] and the one symbol on the bit field T[2] are combined to form two symbols, which are mapped to a group of three bits.

[0286] When the two symbols on T[6:5] are 00, the two symbols on T[1:0] are not the third feature combination 22 of the third feature field. The two symbols on T[1:0] are the two symbols 22 obtained by mapping the three bits on B[10:8]. The one symbol associated with the first feature combination on T[6:5] and the one symbol on the bit field T[2] are combined to form two symbols, which are mapped to a group of three bits.

[0287] When the two symbols on T[4:3] are 11, the two symbols on T[1:0] are not the third feature combination 22 of the third special position field. The two symbols on T[1:0] are the two symbols 22 obtained by mapping the three bits on B[7:5]. The one symbol associated with the second feature combination on T[4:3] and the one symbol on the bit field T[2] are combined to form two symbols, which are mapped to a group of three bits.

[0288] Step 670: In the case that the 7 symbols do not include the feature combination of the specific positioning domain, the 7 symbols are decoded into 11 bits to obtain the second decoded sequence, which includes 11 bits.

[0289] Of the 7 symbols, one group of 2 symbols maps to a group of 3 bits; another two groups of 2 symbols map to another two groups of 3 bits; one symbol of the 7 symbols maps to 2 bits; and the 2-bit data pattern is a non-specific bit combination. The 11 bits include 2 bits, one group of 3 bits, and two other groups of 3 bits.

[0290] In some embodiments, ternary data combinations on two bit fields yield nine symbol combinations, and binary data combinations on three bit fields yield eight bit combinations. Eight of the nine symbol combinations are mapped one-to-one with the eight bit combinations. The remaining symbol combination, excluding the eight symbol combinations, is used as a feature combination.

[0291] Mapping 2 symbols to 3 bits includes cases where the data pattern of 2 symbols is one of 8 symbol combinations, and the 2 symbols are mapped to one of the 8 bit combinations corresponding to the 8 symbol combinations.

[0292] For example, such as Figure 8 As shown, there is a mapping relationship between two symbols 02 and the bit combination 001. Two symbols 02 are mapped to three bits 001.

[0293] In other embodiments, binary data on two bit fields are combined to obtain four bit combinations, and three symbols on one bit field are mapped one-to-one to three of the four bit combinations.

[0294] Mapping one symbol to two bits includes mapping one symbol to one of the three bit combinations corresponding to the three symbols when the data pattern of one symbol is one of the three symbols.

[0295] For example, such as Figure 7 As shown, one symbol is symbol 2 out of three symbols. Symbol 2 out of three symbols has a mapping relationship with one of the three bit combinations, 10. One symbol is mapped to two bits, and two bits are 10.

[0296] The encoding and decoding methods provided in this application are illustrated below with examples. Figures 9 to 11 As shown. Figure 7 and Figure 8 The mapping relationship shown is illustrated using the example of the correspondence between the 11-bit bit field and the 7-symbol bit field shown in Table 2. A specific bit combination is 11. A characteristic combination is 00. For example... Figure 9 The diagram shown is an example illustration of an encoding / decoding process provided in this application.

[0297] like Figure 9 As shown in (a) in the figure, this is an example of the encoding and decoding process of the first encoding method.

[0298] For example, 11 bits is 11101110111. Starting from the most significant bit of the 11 bits, Bit[10:0] is divided into B[10:8], B[7:5], B[4:2] and B[1:0]. That is, 11101110111 is divided into four groups. The first group contains 3 bits of B[10:8] which is 111, the second group contains 3 bits of B[7:5] which is 011, the third group contains 3 bits of B[4:2] which is 101, and the fourth group contains 2 bits of B[1:0] which is 11.

[0299] The fourth group contains two bits of 11, which are a specific bit combination, see reference. Figure 8 The first group contains 3 bits 111, which are mapped to 01; the second group contains 3 bits 011, which are mapped to 21; and the third group contains 3 bits 101, which are mapped to 12.

[0300] The three bits 101 on B[4:2] are mapped to T0 in 12, which is symbol 2. Symbol 2 is set in T[2]. The three bits 101 on B[4:2] are mapped to T1 in 12, which is symbol 1. The third feature combination 00 corresponding to symbol 1 is set in T[1:0]. The three bits 111 on B[10:8] are mapped to 01, which is set in T[6:5]. The three bits 011 on B[7:5] are mapped to 21, which is set in T[4:3]. Then there are 7 symbols 0121200, which means that 11 bits 111011110111 are encoded into 7 symbols 0121200.

[0301] Optional, such as Figure 10 As shown, T0 of the two symbols mapped by the three bits on B[4:2] is symbol 2, and the second feature combination 00 corresponding to symbol 2 is set in T[4:3]. The 01 mapped by the three bits 111 on B[10:8] is set in T[6:5], and the symbol 21 mapped by the three bits 011 on B[7:5] is set in T[1:0].

[0302] Optionally, T0 of the two symbols mapped by the three bits on B[4:2] is symbol 0, and the first feature combination 00 corresponding to symbol 0 is set in T[6:5]. The 01 mapped by the three bits 111 on B[10:8] is set in T[4:3], and the symbol 21 mapped by the three bits 011 on B[7:5] is set in T[1:0].

[0303] When decoding the 7 symbols 0121200, the third specific bit field T[1:0] is determined to be the third feature combination 00. The symbol 1 corresponding to the third feature combination 00 is combined with the symbol 2 on the bit field T[2] to obtain 2 symbols 12. The symbol 12 is mapped to 3 bits 101. The 2 symbols 01 on the bit field T[6:5] are mapped to 3 bits 111. The 2 symbols 21 on the bit field T[4:3] are mapped to 3 bits 011. Combined with the specific bit combination 11, 11 bits are obtained. The 11 bits are 11101110111, that is, the 7 symbols 0121200 are decoded into 11 bits 11101110111.

[0304] Optional, such as Figure 11 As shown, the second feature field T[4:3] is determined to be the second feature combination 00. The symbol 2 corresponding to the second feature combination 00 is combined with the symbol 2 on the field T[2] to obtain two symbols 22.

[0305] Optionally, the first feature field T[6:5] is determined as the first feature combination 00, and the symbol 0 corresponding to the first feature combination 00 is combined with the symbol 2 on the field T[2] to obtain two symbols 02.

[0306] like Figure 9 As shown in (b) in the figure, this is an example of the encoding and decoding process of the second encoding method.

[0307] For example, 11 bits is 11101110110. Starting from the most significant bit of the 11 bits, B[10:8], B[7:5], B[4:2] and B[1:0] are used to divide 11101110111 into four groups. The first group contains 3 bits of 111, the second group contains 3 bits of 011, the third group contains 3 bits of 101, and the fourth group contains 2 bits of 10.

[0308] The fourth group contains two non-specific bit combinations (10 bits), see reference. Figure 8 The first group of 3 bits (111) maps to 01, the second group of 3 bits (011) maps to 21, and the third group of 3 bits (101) maps to 12. (Reference) Figure 7 The fourth group contains two bits, 10, which are mapped to 2.

[0309] The 3 bits 111 on B[10:8] are mapped to 01 and set to T[6:5], the 3 bits 011 on B[7:5] are mapped to 21 and set to T[4:3], the 2 bits 10 on B[1:0] are mapped to 2 and set to T[2], and the 3 bits 101 on B[4:2] are mapped to 12 and set to T[1:0]. Thus, the 7 symbols 0121212 are encoded, that is, the 11 bits 11101110110 are encoded into the 7 symbols 0121212.

[0310] When decoding the 7 symbols 0121212, it is determined that the 7 symbols do not contain feature combinations. The symbol 01 on bit field T[6:5] is mapped to 3 bits 111, the symbol 21 on bit field T[4:3] is mapped to 3 bits 011, the symbol 2 on bit field T[2] is mapped to 2 bits 10, and the symbol 12 on bit field T[1:0] is mapped to 3 bits 101. Then the 11 bits are 11101110110, that is, the 7 symbols 0121212 are decoded into 11 bits 11101110110.

[0311] The 11B7T encoding / decoding method provided in this application can achieve 2048 combinations, as shown in Tables 10 and 11.

[0312] Table 10

[0313]

[0314] The bit field Bit[10:0] of 11B7T is grouped as follows: first group 3B3T(0), second group 3B3T(1), fourth group 2B1T, and third group 3B3T(2).

[0315] The fourth group, 2B1T, defines 2Bit = 00 / 01 / 10 as 0, 1, 2 of 1Trit.

[0316] In this embodiment, a 2Trit combination that is not used by convention during 3B2T encoding and decoding is set to 2Trit = T00 and is kept consistent across the three groups.

[0317] When the fourth group 2B1T is 2Bit=11, it is agreed that the third group 3B3T(2) needs to be based on the specific position information of 2Trit=T00 and the 1Trit state of the bit field where the fourth group 2B1T is located to form 3B2T, while the first, second and third groups are directly mapped and completed according to the 3B2T encoding and decoding and bit field mapping relationship.

[0318] The third group 3B3T(2) is a bit field combination encoding diagram in 2B1T when 2Bit=11.

[0319] The mapping relationship between a certain bit field 2Trit=00 and Trit at the three levels of -1 / 0 / +1 in Table 11 is not limited. It can be {-1,0,+1} as shown in the example in the table, or it can be changed to other specific one-to-one correspondences, such as {0,-1,+1}.

[0320] In addition, for the sake of circuit simplicity, it is generally required that the three 3B2T codecs use the same... Mapping relationship.

[0321] Table 11

[0322]

[0323] The bit field Bit[10:0] of 11B7T is grouped as follows: first group 3B3T(0), second group 3B3T(1), third group 3B3T(2), and fourth group 2B1T.

[0324] The fourth group, 2B1T, defines 2Bit = 00 / 01 / 11 as 0, 1, 2 of 1Trit.

[0325] In this embodiment, a combination that is not used during 3B2T encoding and decoding is set as 2Trit = T-1, -1, and is kept consistent across these three groups.

[0326] When the fourth group 2B1T is 2Bit=10, it is agreed that the first group 3B3T(0) needs to be formed by combining the specific bit field information of 2Trit=T-1,-1 and the 1Trit state of the bit field where the fourth group 2B1T is located. The first, second and third groups are directly mapped and completed according to the 3B2T encoding and decoding and bit field mapping relationship.

[0327] Table 12

[0328]

[0329]

[0330] Key points of the 11B7T encoding method provided in this application.

[0331] The encoding will be 11B7T The data is divided into four groups: the first group is 3B2T(0), the second group is 3B2T(1), the third group is 3B2T(2) and the fourth group is 2B1T.

[0332] Groups 1, 2, and 3 (3B2T) each contain a maximum of 2 data patterns. 3 =8 combinations, mapped to 3 of the 2TritPAM3 signal 2 =8 of the 9 combinations are mapped to each other in a one-to-one manner.

[0333] The eight combinations in the first, second, and third groups are each mapped to three different signal levels of PAM3's 2Trit (0 / 1 / 2 or -1 / 0 / +1).

[0334] In the first, second, and third groups, a combination that is not used in the PAM3 2Trit combination needs to be agreed upon (e.g., 2Trit = T00 / -1, -1) and kept consistent across these three groups.

[0335] The fourth group of 2B1T implements three arbitrary selections from 2-bit 00 / 01 / 10 / 11, which are mapped to three different signal levels (0 / 1 / 2 or -1 / 0 / +1) of PAM3 1Trit. For example, 00 / 01 / 11 corresponds to -1 / 0 / +1.

[0336] The 3B2T+3B2T+3B2T data combination according to the above rules, and then the selected code of the fourth group 2B1T, forms the 11B7T code, realizing 8X8X8X3=1536 data pattern combinations.

[0337] Further utilizing the different specific positioning domains of a feature combination (e.g., 2Trit = T11) not used in the 3B2T encoding of the first, second, and third groups, three different specific positioning domain information are formed, such as T[6:5], T[4:3], or T[2:1] = T11. These three specific positioning domain information can be virtually represented as three different signal levels of PAM3's 1Trit (0 / 1 / 2 or -1 / 0 / +1). This virtual signal level sequence, combined with the fourth group's 1Trit, realizes a certain 3B2T combination corresponding to the first, second, and third groups to complete the 3B2T encoding of that group in the case of a 2-bit combination (e.g., 2Bit = 11) not realized in the 2B1T bit field of the fourth group. The encoding and decoding of the other two groups of 3B2T remain unchanged, only the bit fields are adjusted, realizing 8X8X8X1 = 512 data pattern combinations, and finally realizing 2048 combination encodings.

[0338] The 11B7T can decode 2048 data patterns.

[0339] First, according to the fixed positions of the 2Trit combinations in the encoding convention, such as T[6:5], T[4:3] or T[2:1], identify whether it contains the 2Trit feature combination in the encoding convention (such as 2Trit = T11). If it does not contain it, then decode according to the encoding rule of the first group 3B2T(0) + the second group 3B2T(1) + the third group 3B2T(2) + the fourth group 2B1T.

[0340] If any set of 2Trit combination at a fixed position in the encoding convention is identified as having a 2Trit feature combination (e.g., 2Trit = T11), and combined with the position T[6:5], T[4:3], or T[2:1], and with the fourth set of 1Trit combination corresponding to the virtual signal in the encoding convention, a certain 3B2T combination corresponding to the first, second, and third sets in the encoding convention is realized to form a 3B2T group in the case where the 2B1T of the fourth set is not realized (e.g., 2Bit = 11), the 3B2T group is decoded according to the first, second, and third sets of 3B2T, and corresponds to one of the unused 2B1T, such as 2Bit = 11.

[0341] The above-mentioned 3B2T and 2B1T decoding can be performed by looking up the encoding table, or it can be directly implemented by the corresponding circuit according to the Bit-Trit mapping conversion rule of the encoding.

[0342] The 11B7T implementation includes encoding / decoding mapping and bit field description.

[0343] The four groups B[10:8], B[7:5], B[4:2], and B[1:0] in 11B7T are not restricted in order when converted to 7Trit mapping for transmission. For example, B[10:8], B[7:5], B[4:2], and B[1:0] can be mapped to 7Trit[6:0], or B[8:6], B[5:3], B[2:0], and B[10:9] can be mapped to 7Trit[6:0].

[0344] However, a specific 11B7T encoding embodiment based on this application is required to have a specific sequence so that decoding can find and identify conventional 2Trit feature combinations at specific locations.

[0345] 3B2T group encoding / decoding diagram.

[0346] 3B2T Encoding and decoding can be performed according to circuit conversion methods, such as... Figure 12 As shown, the definition is: Then the above The corresponding conversion relationship is

[0347] 3B2T The encoding and decoding do not restrict any sequence mapping relationship, such as Figure 13 As shown. Some of these can be implemented by directly looking up tables, while others can be implemented through circuit conversion.

[0348] Extended applications such as PAM6 / 9 encoding and decoding of 11B7T.

[0349] The 11B7T encoding / decoding method of this application can be applied to any modulation scheme based on an integer multiple of PAM3, such as PAM6 and PAM9. In specific implementation, it is only necessary to split the multilevel of similar modulation signals such as PAM6 and PAM9 into multiple PAM3 groups according to the equal level spacing required by PAM3 signals, and continue to use the 11B7T encoding / decoding method of this application in each PAM3 group.

[0350] Taking PAM6 as an example, assuming the six signal levels of PAM6 are as follows: Figure 14 As shown.

[0351] The three signal levels of the first PAM3 group are {-5d, -1d, +3d}, and the three signal levels of the second PAM3 group are {-3d, +1d, +5d}. During encoding, the 12-bit data pattern sequence Bit[11:0] is divided into two groups according to 1 Bit 11 = 0 / 1. Each group corresponds to a PAM3 group, and the 11-bit data pattern of each PAM3 group is encoded and decoded according to the 11B7T of this application. After encoding the two PAM3 groups, each 7Trit signal is interleaved and merged into a Trit data pattern data stream for transmission. Decoding is the reverse process of the above-determined encoding behavior.

[0352] Bit[11:0] can also be divided into two groups according to 1 Bit 0 = 0 / 1, or any method can be chosen to divide Bit[11:0] into two groups of equal number of combinations.

[0353] It is suitable for a variety of #×(PAM3) encoding and decoding applications, and can adopt the bit / trit / level interleaving mapping or partitioning method in the technical solution so that each group of PAM3 signals has the same signal-to-noise ratio and bit error rate performance.

[0354] This application is based on the GPMI scenario, but can also be applied to other physical layer interfaces.

[0355] To achieve the functions described in the above embodiments, the encoder and decoder include hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art should readily recognize that, based on the units and method steps of the examples described in conjunction with the embodiments disclosed in this application, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application scenario and design constraints of the technical solution.

[0356] The above text combines Figures 1 to 14 The encoding and decoding methods provided according to this embodiment are described in detail below. Figure 15 This describes the encoding / decoding apparatus provided according to this embodiment.

[0357] Figure 15 This is a schematic diagram of a possible encoding / decoding device provided in this embodiment. These encoding / decoding devices can be used to implement the encoding function in the above method embodiments, and therefore can also achieve the beneficial effects of the above method embodiments. In this embodiment, the encoding / decoding device can be as follows: Figure 5 The encoder shown can also be a module (such as a chip) applied to the front end.

[0358] like Figure 15 As shown in (a), the encoding / decoding device 1500 includes a communication module 1510, a decision module 1520, an encoding module 1530, and a storage module 1540.

[0359] The communication module 1510 is used to acquire a sequence to be encoded, the sequence containing 11 bits. For example, the communication module 1510 is used to perform... Figure 6 Step 610.

[0360] Decision module 1520 divides the 11 bits into four groups: the first group contains 3 bits, the second group contains 3 bits, the third group contains 3 bits, and the fourth group contains 2 bits. It then determines whether the data pattern in the fourth group (containing 2 bits) is a specific bit combination. For example, decision module 1520 is used to execute... Figure 6 Step 620.

[0361] The encoding module 1530 is used to map the 3 bits of the first group to 2 symbols, the 3 bits of the second group to 2 symbols, and the 3 bits of the third group to 2 symbols when the 2-bit data pattern of the fourth group is a specific bit combination. The 7 symbols include one symbol from the 2 symbols of any group's 3-bit mapping, the 2 symbols from the other two groups, and a feature combination of a specific bit field. The specific bit field is any 2 bit fields in the bit fields of the 7 symbols, and the feature combination is any one of the 9 symbol combinations. The 9 symbol combinations are obtained by combining ternary data on 2 bit fields.

[0362] The encoding module 1530 is used to map the 2 bits of the fourth group to 1 symbol when the data pattern of the 2 bits of the fourth group is a non-specific bit combination, the 3 bits of the first group to 2 symbols, the 3 bits of the second group to 2 symbols, the 3 bits of the third group to 2 symbols, and the 7 symbols include the 2 symbols of the 3 bits of the first group, the 2 symbols of the 3 bits of the second group, the 2 symbols of the 3 bits of the third group, and the 1 symbol of the 2 bits of the fourth group.

[0363] The communication module 1510 is used to transmit a first encoded sequence or a second encoded sequence. For example, the communication module 1510 is used to perform... Figure 6 Steps 630 and 640.

[0364] Storage module 1540 is used to store mapping tables and feature combinations, etc. The mapping table includes a mapping table that maps 3 bits to 2 symbols and a mapping table that maps 2 bits to 1 symbol.

[0365] The encoding / decoding device can be used to implement the decoding function in the above method embodiments, and therefore can also achieve the beneficial effects of the above method embodiments. In this embodiment, the encoding / decoding device can be as follows: Figure 5 The decoder shown can also be a module (such as a chip) applied to the backend.

[0366] like Figure 15 As shown in (b), the encoding / decoding device 1500 includes a communication module 1510, a decision module 1550, a decoding module 1560, and a storage module 1540.

[0367] The communication module 1510 is also used to receive a sequence to be decoded, the sequence comprising seven symbols. For example, the decision module 1520 is used to perform... Figure 6 Step 650.

[0368] Decision module 1550 is used to determine whether the seven symbols contain feature combinations of specific localization domains.

[0369] The decoding module 1560 is used to map the feature combination of the seven symbols, including a specific positioning domain, to a group of 3 bits for one symbol, and to map the other two groups of 2 symbols to another two groups of 3 bits. The 11 bits include one group of 3 bits, the other two groups of 3 bits, and 2 bits, with the 2-bit data pattern being a specific bit combination. For example, the decoding module 1560 is used to perform... Figure 6 Step 660.

[0370] The decoding module 1560 is used to decode a sequence of 7 symbols excluding feature combinations of specific positioning domains. One symbol out of the 7 symbols is mapped to 2 bits, a group of 2 symbols out of the 7 symbols is mapped to a group of 3 bits, and two other groups of 2 symbols out of the 7 symbols are mapped to two other groups of 3 bits. The 2-bit data pattern is a non-specific bit combination. The 11 bits include 2 bits, one group of 3 bits, and two other groups of 3 bits. For example, the decoding module 1560 is used to perform... Figure 6 Step 670.

[0371] The encoding / decoding device 1500 of this application embodiment can be implemented using an application-specific integrated circuit (ASIC) or a programmable logic device (PLD). The PLD can be a complex programmable logical device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof. It can also be implemented using software. Figure 6 In the encoding and decoding method shown, the encoding and decoding device 1500 and its various modules can also be software modules.

[0372] For a more detailed description of the communication module, encoding module, decoding module, and storage module mentioned above, please refer to [reference needed]. Figure 6 The relevant descriptions in the method embodiments shown are directly obtained and will not be repeated here.

[0373] Figure 16 This is a schematic diagram of the structure of an encoder 1600 provided in this embodiment. Figure 16 As shown, the encoder 1600 includes a processor 1610, a bus 1620, a memory 1630, and a communication interface 1640.

[0374] It should be understood that in this embodiment, the processor 1610 may be a central processing unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), ASICs, FPGAs, or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc.

[0375] The processor may also be a graphics processing unit (GPU), a neural network processing unit (NPU), a microprocessor, or one or more integrated circuits used to control the execution of the program in this application.

[0376] The communication interface 1640 is used to enable communication between the encoder 1600 and external devices or components. In this embodiment, the communication interface 1640 is used to acquire video.

[0377] Bus 1620 may include a pathway for transmitting information between the aforementioned components (such as processor 1610 and memory 1630). In addition to a data bus, bus 1620 may also include a power bus, a control bus, and a status signal bus. However, for clarity, all buses are labeled as bus 1620 in the figure.

[0378] As an example, encoder 1600 may include multiple processors. A processor may be a multi-CPU processor. Here, "processor" can refer to one or more devices, circuits, and / or computing units for processing data (e.g., computer program instructions). Processor 1610 samples and encodes using a first encoding scheme when the 2-bit data pattern of the fourth group is a specific bit combination; and samples and encodes using a second encoding scheme when the 2-bit data pattern of the fourth group is a non-specific bit combination.

[0379] It is worth noting that, Figure 16 Taking encoder 1600 as an example, which includes one processor 1610 and one memory 1630, the processor 1610 and the memory 1630 are used to indicate a type of device or equipment. In specific embodiments, the number of each type of device or equipment can be determined according to business needs.

[0380] The memory 1630 can correspond to the storage medium used in the above method embodiments for storing information such as mapping tables and feature combinations, for example, a disk, such as a mechanical hard disk or a solid-state hard disk.

[0381] The encoder 1600 described above can be a general-purpose device or a special-purpose device. For example, the encoder 1600 can be an x86 or ARM-based server, or other special-purpose servers. This application does not limit the type of encoder 1600.

[0382] It should be understood that the encoder 1600 in this embodiment can correspond to the encoding / decoding device 1500 in this embodiment, and can correspond to the execution according to Figure 6 The corresponding subject in any of the methods, and the above and other operations and / or functions of each module in the encoding / decoding device 1500 are respectively for implementing Figure 5 For the sake of brevity, the corresponding processes of each method in the code will not be elaborated here.

[0383] Figure 17 This is a schematic diagram of the structure of a decoder 1700 provided in this embodiment. Figure 17 As shown, the decoder 1700 includes a processor 1710, a bus 1720, a memory 1730, and a communication interface 1740.

[0384] It should be understood that in this embodiment, the processor 1710 may be a central processing unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), ASICs, FPGAs, or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc.

[0385] The processor may also be a graphics processing unit (GPU), a neural network processing unit (NPU), a microprocessor, or one or more integrated circuits used to control the execution of the program in this application.

[0386] The communication interface 1740 is used to enable communication between the decoder 1700 and external devices or components. In this embodiment, the communication interface 1740 is used to acquire video.

[0387] Bus 1720 may include a pathway for transmitting information between the aforementioned components (such as processor 1710 and memory 1730). In addition to a data bus, bus 1720 may also include a power bus, a control bus, and a status signal bus. However, for clarity, all buses are labeled as bus 1720 in the figure.

[0388] As an example, decoder 1700 may include multiple processors. A processor may be a multi-CPU processor. Here, "processor" can refer to one or more devices, circuits, and / or computing units for processing data (e.g., computer program instructions). Processor 1710 is used to sample and decode using a first encoding scheme when the seven symbols include feature combinations of specific location domains; and to sample and decode using a second encoding scheme when the seven symbols do not include feature combinations of specific location domains.

[0389] It is worth noting that, Figure 17 Taking the decoder 1700 as an example, which includes one processor 1710 and one memory 1730, the processor 1710 and the memory 1730 are used to indicate a type of device or equipment. In specific embodiments, the number of each type of device or equipment can be determined according to business requirements.

[0390] The memory 1730 can correspond to the storage medium used in the above method embodiments for storing information such as mapping tables and feature combinations, for example, a disk, such as a mechanical hard disk or a solid-state hard disk.

[0391] The decoder 1700 described above can be a general-purpose device or a special-purpose device. For example, the decoder 1700 can be an x86-based or ARM-based server, or other special-purpose servers. This application does not limit the type of decoder 1700.

[0392] It should be understood that the decoder 1700 according to this embodiment can correspond to the encoding / decoding device 1500 in this embodiment, and can correspond to the execution of the encoding / decoding device 1500 according to this embodiment. Figure 5 The corresponding subject in any of the methods, and the above and other operations and / or functions of each module in the encoding / decoding device 1500 are respectively for implementing Figure 5 For the sake of brevity, the corresponding processes of each method in the code will not be elaborated here.

[0393] Optionally, the decision module is located within the encoder 1600 and the decoder 1700. The encoder 1600 also includes a decision module for grouping the sequence. The decoder 1700 also includes a decision module for determining whether the sequence contains a feature combination of a specific localization domain.

[0394] The method steps in this embodiment can be implemented in hardware or by a processor executing software instructions. The software instructions can consist of corresponding software modules, which can be stored in random access memory (RAM), flash memory, read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, hard disks, portable hard disks, CD-ROMs, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and storage medium can reside in an ASIC. Alternatively, the ASIC can reside in a network device or terminal device. Of course, the processor and storage medium can also exist as discrete components in the network device or terminal device.

[0395] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented using software programs, implementation can be, in whole or in part, in the form of a computer program product. This computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the flow or function according to the embodiments of this application is generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions can be transmitted from one website, computer, server, or data center to another via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device containing one or more servers, data centers, etc., that can be integrated with the medium. The available media can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media (e.g., solid-state disks, SSDs).

[0396] Although this application has been described herein in conjunction with various embodiments, those skilled in the art, by reviewing the accompanying drawings, the disclosure, and the appended claims, will understand and implement other variations of the disclosed embodiments in carrying out the claimed application. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude multiple instances. A single processor or other unit can implement several functions listed in the claims. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.

[0397] Although this application has been described in conjunction with specific features and embodiments, it is obvious that various modifications and combinations can be made thereto without departing from the scope of this application. Accordingly, this specification and drawings are merely exemplary illustrations of this application as defined by the appended claims, and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of this application. Clearly, those skilled in the art can make various alterations and modifications to this application without departing from the spirit and scope of this application. Thus, if such modifications and modifications of this application fall within the scope of the claims of this application and their equivalents, this application is also intended to include such modifications and modifications.

[0398] In the description of this application, unless otherwise stated, " / " indicates that the objects before and after it are in an "or" relationship. For example, A / B can mean A or B. "And / or" in this application is merely a description of the relationship between the related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone, where A and B can be singular or plural. In the description of this application, unless otherwise stated, "multiple" means two or more. "At least one of the following or similar expressions" refers to any combination of these items, including any combination of singular or plural items. For example, at least one of a, b, and / or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0399] Furthermore, to facilitate a clear description of the technical solutions in the embodiments of this application, the terms "first" and "second" are used in the embodiments of this application to distinguish identical or similar items with substantially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and the terms "first" and "second" are not necessarily different.

[0400] In the embodiments of this application, the words "exemplarily" or "for example" are used to indicate examples, illustrations, or explanations. Any embodiment or design described as "exemplarily" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design solutions. Specifically, the use of the words "exemplarily" or "for example" is intended to present the relevant concepts in a specific manner to facilitate understanding.

[0401] It is understood that the term "embodiment" used throughout the specification means that a specific feature, structure, or characteristic related to an embodiment is included in at least one embodiment of this application. Therefore, throughout the specification, various embodiments do not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It is understood that in the various embodiments of this application, the sequence number of each process does not imply the order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0402] Some optional features in the embodiments of this application can be implemented independently in certain scenarios without relying on other features, such as the current underlying solution, to solve the corresponding technical problems and achieve the corresponding effects. Alternatively, they can be combined with other features as needed in other scenarios. Correspondingly, the apparatus given in the embodiments of this application can also implement these features or functions, which will not be elaborated upon here.

[0403] In this application, unless otherwise specified, the same or similar parts between the various embodiments can be referred to each other. In the various embodiments of this application, unless otherwise specified or logically conflicting, the terminology and / or descriptions between different embodiments are consistent and can be mutually referenced. Technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships. The following embodiments of this application do not constitute a limitation on the scope of protection of this application.

Claims

1. An encoding method, characterized in that, include: Obtain the sequence to be encoded, the sequence containing 11 bits; The 11 bits are divided into four groups: the first group contains 3 bits, the second group contains 3 bits, the third group contains 3 bits, and the fourth group contains 2 bits. When the two bits in the fourth group are a specific bit combination, the 11 bits are encoded into 7 symbols and a first encoded sequence is sent. The first encoded sequence includes the 7 symbols, which include one symbol from the two symbols mapped by the three bits in the third group, two symbols mapped by the three bits in the first group, two symbols mapped by the three bits in the second group, and a feature combination of a specific positioning field. The symbols are represented by ternary data, and the bits are represented by binary data. Wherein, the first group of 3 bits is mapped to the 2 symbols, the second group of 3 bits is mapped to the 2 symbols, the third group of 3 bits is mapped to the 2 symbols, the special bit field is any 2 bit fields among the bit fields of the 7 symbols, the feature combination is any one of the 9 symbol combinations, and the 9 symbol combinations are obtained by combining ternary data on 2 bit fields.

2. The method according to claim 1, characterized in that, The method further includes: When the two bits in the fourth group are a non-specific bit combination, the 11 bits are encoded into 7 symbols and a second encoded sequence is sent. The second encoded sequence includes the 7 symbols, which include 2 symbols mapped from the 3 bits in the first group, 2 symbols mapped from the 3 bits in the second group, 2 symbols mapped from the 3 bits in the third group, and 1 symbol mapped from the 2 bits in the fourth group. In this configuration, the 2 bits of the fourth group are mapped to 1 symbol, the 3 bits of the first group are mapped to 2 symbols, the 3 bits of the second group are mapped to 2 symbols, and the 3 bits of the third group are mapped to 2 symbols.

3. The method according to claim 1 or 2, characterized in that, The feature combination of the specific positioning domain is associated with the two symbols of the three-bit mapping of the third group.

4. The method according to claim 3, characterized in that, When one of the two symbols in the three-bit mapping of the third group is the first value, the feature combination is the first feature combination; When one of the two symbols in the three-bit mapping of the third group is a second value, the feature combination is the second feature combination; When one of the two symbols in the three-bit mapping of the third group is a third value, the feature combination is a third feature combination; Wherein, the first feature combination, the second feature combination, and the third feature combination are the same, or the first feature combination, the second feature combination, and the third feature combination are different, and the first feature domain of the first feature combination, the second feature domain of the second feature combination, and the third feature domain of the third feature combination are different.

5. The method according to claim 4, characterized in that, The first feature combination, the second feature combination, and the third feature combination may all be the same or all different.

6. The method according to claim 4, characterized in that, Two of the first, second, and third feature combinations are the same, and the third feature combination is different from the other two feature combinations.

7. The method according to any one of claims 4-6, characterized in that, The first specific positioning domain includes a first feature combination or one of eight symbol combinations other than the first feature combination among the nine symbol combinations to which the first feature combination belongs. The first feature combination is associated with three bits of the first group. And / or, The second specific positioning field includes the second feature combination or one of the eight symbol combinations other than the second feature combination among the nine symbol combinations to which the second feature combination belongs, and the second feature combination is associated with the three bits of the second group.

8. The method according to any one of claims 1-7, characterized in that, The combination of binary data in 3 bit fields yields 8 bit combinations, and the combination of ternary data in 2 bit fields yields 9 symbol combinations. The 8 bit combinations are mapped one-to-one with 8 of the 9 symbol combinations. The other symbol combination among the 9 symbol combinations is used as the feature combination. Three bits are mapped to two symbols, including: When the three bits are one of the eight bit combinations, the three bits are mapped to one of the eight symbol combinations corresponding to the eight bit combinations.

9. The method according to any one of claims 2-8, characterized in that, The binary data in two bit fields are combined to obtain four bit combinations. Three of the four bit combinations are mapped one-to-one to three symbols in one bit field. The non-specific bit combination includes the three bit combinations. The specific bit combination includes one bit combination other than the three bit combinations in the four bit combinations. Two bits are mapped to one symbol, including: When the two bits are one of the three bit combinations, the two bits are mapped to one of the three symbols corresponding to the three bit combinations.

10. The method according to any one of claims 1-9, characterized in that, The first group of 3 bits, the second group of 3 bits, the third group of 3 bits, and the fourth group of 2 bits are bits in any bit field of the 11 bits. Among the bit fields of the 11 bits, the bit fields of the first group of 3 bits, the second group of 3 bits, the third group of 3 bits, and the fourth group of 2 bits are different.

11. The method according to any one of claims 1-10, characterized in that, The 11 bit fields correspond to any bit fields of the 7 symbols.

12. A decoding method, characterized in that, include: Receive a sequence to be decoded, the sequence comprising 7 symbols, the 7 symbols including 1 symbol, 2 symbols, and 2 symbols; When the seven symbols also include feature combinations of specific bit fields, the seven symbols are decoded into 11 bits according to the feature combinations of the specific bit fields to obtain a first decoded sequence. The first decoded sequence includes the 11 bits, which include 3 bits from the first group, 3 bits from the second group, 3 bits from the third group, and 2 bits from the third group. The symbols are represented by ternary data, the bits are represented by binary data, the specific bit fields are any two bit fields in the bit fields of the seven symbols, and the feature combinations are any one of the nine symbol combinations. The nine symbol combinations are obtained by combining ternary data in two bit fields. Wherein, the feature combination and the one symbol are mapped to the three bits of the third group, and the two symbols of the other two groups of the seven symbols are mapped to the three bits of the second group and the three bits of the first group, and the two bits are a specific bit combination.

13. The method according to claim 12, characterized in that, The method further includes: In the case that the 7 symbols do not include the feature combination of the specific positioning domain, the 7 symbols are decoded into 11 bits to obtain a second decoded sequence. The second decoded sequence includes 11 bits, which includes 2 bits, a group of 3 bits, and two other groups of 3 bits. In this configuration, one of the seven symbols is mapped to the two bits, a group of two symbols is mapped to a group of three bits, and two other groups of two symbols are mapped to two other groups of three bits. The two bits are non-specific bit combinations.

14. The method according to claim 12 or 13, characterized in that, The feature combination includes one of a first feature combination, a second feature combination, or a third feature combination. The first feature combination, the second feature combination, or the third feature combination may be the same or different. The first feature domain of the first feature combination, the second feature domain of the second feature combination, and the third feature domain of the third feature combination are different.

15. The method according to claim 14, characterized in that, The feature combination and one symbol in the seven symbols are mapped to a set of three bits, including: When the first specific positioning domain includes the first feature combination, one symbol associated with the first feature combination and one symbol among the seven symbols are mapped to three bits of the third group.

16. The method according to claim 14, characterized in that, The first feature combination and the second feature combination are different; The feature combination and one symbol in the seven symbols are mapped to a set of three bits, including: When the first specific location domain contains the first feature combination and the second specific location domain does not contain the second feature combination, one symbol associated with the first feature combination and one symbol among the seven symbols are mapped to three bits of the third group.

17. The method according to claim 14, characterized in that, The first feature combination, the second feature combination, and the third feature combination are all different; The feature combination and one symbol in the seven symbols are mapped to a set of three bits, including: When the first specific location domain contains the first feature combination, the second specific location domain does not contain the second feature combination, and the third specific location domain does not contain the third feature combination, one symbol associated with the first feature combination and one symbol among the seven symbols are mapped to three bits of the third group.

18. The method according to any one of claims 14-16, characterized in that, The feature combination and one symbol in the seven symbols are mapped to a set of three bits, including: When the second specific positioning domain includes the second feature combination, one symbol associated with the second feature combination and one symbol among the seven symbols are mapped to three bits of the third group.

19. The method according to any one of claims 14-16, characterized in that, The feature combination and one symbol in the seven symbols are mapped to a set of three bits, including: When the third feature domain includes the third feature combination, one symbol associated with the third feature combination and one of the seven symbols are mapped to three bits of the third group.

20. The method according to any one of claims 12-19, characterized in that, Nine symbol combinations are obtained by combining ternary data in two bit fields, and eight bit combinations are obtained by combining binary data in three bit fields. Eight of the nine symbol combinations are mapped one-to-one with the eight bit combinations. The other symbol combination among the nine symbol combinations is used as the feature combination. Two symbols are mapped to three bits, including: When the two symbols are one of the eight symbol combinations, the two symbols are mapped to one of the eight bit combinations corresponding to the eight symbol combinations.

21. The method according to any one of claims 13-20, characterized in that, The binary data in two bit fields are combined to obtain four bit combinations. The three symbols in one bit field are mapped one-to-one to three of the four bit combinations. The non-specific bit combination includes the three bit combinations. The specific bit combination includes one bit combination other than the three bit combinations in the four bit combinations. One symbol is mapped to two bits, including: When the one symbol is one of the three types of symbols, the one symbol is mapped to one of the three bit combinations corresponding to the three types of symbols.

22. A codec device, characterized in that, The encoding / decoding apparatus includes at least one processor and a memory, wherein the memory is used to store a computer program such that when the computer program is executed by the at least one processor, it implements the method as described in any one of claims 1-11, or such that when the computer program is executed by the at least one processor, it implements the method as described in any one of claims 12-21.

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