Dithering synchronous ultra-wideband transmitter and driving method thereof

The dithering synchronous ultra-wideband transmitter addresses the issue of spectrum folding by generating random phase clock signals to shape pulse signals, enabling compact device implementation and compliance with spectrum regulations, thus reducing power consumption and improving usability.

WO2026101242A1PCT designated stage Publication Date: 2026-05-15DAEGU GYEONGBUK INSTITUTE OF SCIENCE AND TECHNOLOGY
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Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
DAEGU GYEONGBUK INSTITUTE OF SCIENCE AND TECHNOLOGY
Filing Date
2025-11-05
Publication Date
2026-05-15

AI Technical Summary

Technical Problem

Existing ultra-wideband transmitters require filters to suppress spectrum folding, which occupy a large area and consume excessive power, making them unsuitable for compact devices and violating spectrum regulations.

Method used

A dithering synchronous ultra-wideband transmitter that generates random phase clock signals to shape pulse signals, eliminating the need for separate filters by suppressing spectrum folding through dithering, allowing for smaller device implementation and compliance with spectrum regulations.

Benefits of technology

The solution effectively suppresses spectrum folding without filters, reducing device size and power consumption, enabling application in small devices while ensuring compliance with various spectrum regulations and improving resource efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

Provided are a dithering synchronous ultra-wideband transmitter and a driving method thereof according to an example of the present disclosure. Particularly, the ultra-wideband transmitter comprises: a clock generation unit for generating and outputting at least one random phase clock signal in which the phase of a clock changes on the basis of random data; a pulse shaping unit for receiving the at least one random phase clock signal generated by the clock generation unit, generating a pulse signal having a preset frequency band, and performing shaping on the pulse signal so as to correspond to a transmission method; a multiplexer for selecting one of one or more multi-phase clock signals on the basis of phase data and outputting a carrier wave; a power amplification unit for outputting each quantized pulse signal by mixing each pulse signal shaped by the pulse shaping unit with the carrier wave; and an antenna unit for transmitting each of the quantized pulse signals.
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Description

Dithering Synchronous Ultra-Wideband Transmitter and Driving Method Thereof

[0001] The present disclosure relates to a dithering synchronous ultra-wideband transmitter and a driving method thereof.

[0002] Ultra-wideband (UWB) is a wireless communication technology that enables the transmission of large amounts of information with low power by using a wide spectrum of frequencies over short distances compared to the conventional spectrum, and is also known as wireless digital pulse.

[0003] Generally, it is defined as a short-range wireless communication technology that enables ultra-high-speed communication at speeds of over 100 Mbps in the 3.1 to 10.6 GHz frequency band with low power consumption across a very wide bandwidth compared to existing spectrums. The most significant feature of UWB is that it utilizes an ultra-wideband while maintaining relatively low output power. Furthermore, ultra-wideband systems are constructed based on relatively lower spectral power densities compared to existing narrowband or broadband CDMA systems.

[0004] It is highly useful because it is significantly superior to existing wireless communication technologies in terms of speed and power consumption. In particular, it is emerging as a groundbreaking technology suitable for Personal Area Networks (PANs) that connect personal computers, peripherals, and / or home appliances located within a certain distance from offices and homes using a high-speed wireless interface.

[0005] The background art is provided to facilitate understanding of the present disclosure. It should not be understood as an acknowledgment that the matters described in the background art exist as prior art.

[0006] The frequency bandwidth for ultra-wideband transmission is set to enable the implementation of pulse-based transmission technology, which allows for the simplification of transmitter and receiver configurations. Unlike conventional wireless communication, this pulse-based transmission does not require frequency synthesis and signal mixing functions in terms of power consumption and integrated circuit area; however, constraints on Power Spectral Density (PSD) are imposed to avoid interference with other communication systems. In particular, national committees regarding spectrum regulation (transmission regulation) (FCC, ETSI, etc.) mandate the use of a Power Spectral Density mask for impulse-based ultra-wideband, making implementation difficult as it requires shaping the transmission pulse.

[0007] To this end, existing ultra-wideband transmitters are equipped with filters to suppress the size of the spectrum around the main lobe, thereby securing additional margin to satisfy this spectrum regulation.

[0008] Furthermore, since spectrum folding can cause violations of the spectrum mask, it was necessary to include at least one filter to suppress spectrum folding. Consequently, the filter occupied a large area of ​​the device, posing a problem that made it difficult to apply the ultra-wideband transmitter to compact devices.

[0009] Accordingly, the inventors of the present disclosure have invented an ultra-wideband transmitter and a driving method thereof, which can be applied to small devices and thus has improved utility.

[0010] Accordingly, the problem to be solved by the present disclosure is to provide a dithering synchronous ultra-wideband transmitter and a driving method thereof that can achieve the effect of suppressing spectrum folding without the need for a separate filter, thereby forming a spectrum that satisfies spectrum regulations of various countries, and can be implemented in a smaller area, making it applicable not only to large devices but also to small devices, thereby improving usability and reducing power consumption to improve resource efficiency.

[0011] The problems that this disclosure aims to solve are not limited to those mentioned above, and other unmentioned problems will be clearly understood by a person skilled in the art from the description below.

[0012] To solve the problem described above, a dithering synchronous ultra-wideband transmitter according to an example of the present disclosure is provided. This ultra-wideband transmitter may include: a clock generation unit that generates and outputs at least one random phase clock signal in which the phase of the clock is changed based on random data; a pulse shaping unit that receives the at least one random phase clock signal generated from the clock generation unit, generates a pulse signal having a preset frequency band, and shapes it to correspond to a transmission method; a multiplexer that selects one of at least one multi-phase clock signals generated by the clock generation unit based on phase data and outputs a carrier wave; a power amplifier that mixes the carrier wave with each pulse signal shaped by the pulse shaping unit and outputs each pulse signal quantized at a time interval to which dithering is applied; and an antenna unit that transmits each quantized pulse signal.

[0013] According to the features of the present disclosure, the clock generation unit may include: a multiphase generation unit that generates at least one multiphase clock signal for dithering; a random signal generation unit that generates random data; and a phase selection logic that receives the at least one multiphase clock signal generated by the multiphase generation unit and the random data generated by the random signal generation unit as inputs, and randomly selects and outputs one of the at least one multiphase clock signals.

[0014] According to the features of the present disclosure, the phase selection logic, when random data generated by the random signal generation unit is input, determines whether a defect has occurred by distinguishing the current phase and the next phase using a flip-flop and comparing the order, and if it is determined that a defect will occur, the output value at the corresponding timing is fixed to Low or High to eliminate the defect.

[0015] According to the features of the present disclosure, the multiphase generation unit can generate the at least one multiphase clock signal by equalizing the input clock signal to N based on a delay-locked loop (DLL).

[0016] According to the features of the present disclosure, the delay-locked loop is, in the negative feedback loop, the input phase (φ in ) is the output phase (φ out It can be forced to align with ).

[0017] According to the features of the present disclosure, the multiplexer can select a clock signal having a preset phase among the at least one multi-phase clock signal as the carrier.

[0018] According to the features of the present disclosure, the preset phase may be 0° or 180°.

[0019] According to the features of the present disclosure, the random signal generator can generate the random data based on a PRBS (Pseudo Random Binary Sequence).

[0020] According to the features of the present disclosure, the random data is used as a control signal to control a multiplexer within the phase selection logic and can change at preset periods.

[0021] According to the features of the present disclosure, the pulse shaping unit receives size data and at least one random phase clock signal and synchronizes the random phase clock signal to generate at least one pulse signal that forms the shape of a specific pulse.

[0022] To solve the problem described above, a driving method in a delay-based spectrum-forming ultra-wideband transmitter according to an example of the present disclosure is provided. The driving method may include: a step in which a clock generator generates and outputs at least one random phase clock signal in which the phase of the clock is changed based on random data; a step in which a pulse shaping unit receives the at least one random phase clock signal generated from the clock generator and generates a pulse signal having a preset frequency band to shape it to correspond to a transmission method; a step in which a multiplexer selects one of at least one multiple phase clock signals generated by the clock generator based on phase data and outputs a carrier wave; a step in which a power amplifier mixes the carrier wave with each pulse signal shaped by the pulse shaping unit and outputs each pulse signal quantized at a time interval to which dithering is applied; and a step in which an antenna unit transmits each quantized pulse signal.

[0023] According to the features of the present disclosure, the step of generating and outputting at least one random phase clock signal may include: a step in which a multiphase generator generates at least one multiphase clock signal for dithering; a step in which a random signal generator generates the random data; and a step in which a phase selection logic receives the at least one multiphase clock signal generated by the multiphase generator and the random data generated by the random signal generator as inputs, and randomly selects and outputs one of the at least one multiphase clock signals.

[0024] According to the features of the present disclosure, when the random data generated by the random signal generator is input, the method may further include a step of determining whether a defect has occurred by distinguishing the current phase and the next phase using a flip-flop and comparing the order; and a step of removing the defect by fixing the output value to Low or High at the corresponding timing if it is determined that a defect will occur.

[0025] According to the features of the present disclosure, the step of generating at least one multi-phase clock signal may be to generate the at least one multi-phase clock signal by equalizing an input clock signal to N based on a delay-locked loop (DLL).

[0026] According to the features of the present disclosure, the delay-locked loop is, in the negative feedback loop, the input phase (φ in ) is the output phase (φ out It can be forced to align with ).

[0027] According to the features of the present disclosure, the step of selecting one of the at least one multi-phase clock signal to output a carrier wave may be to select a clock signal having a preset phase among the at least one multi-phase clock signal as the carrier wave.

[0028] According to the features of the present disclosure, the preset phase may be 0° or 180°.

[0029] According to the features of the present disclosure, the random signal generating unit may further include the step of generating the random data based on a PRBS (Pseudo Random Binary Sequence).

[0030] According to the features of the present disclosure, the random data is used as a control signal to control a multiplexer within the phase selection logic and can change at preset periods.

[0031] According to the features of the present disclosure, the step of generating the pulse signal and shaping it to correspond to a transmission method may involve receiving size data and the at least one random phase clock signal, synchronizing the random phase clock signal to generate at least one pulse signal that forms the shape of a specific pulse.

[0032] Specific details of other embodiments are included in the detailed description and drawings.

[0033] According to one example of the present disclosure, the effect of suppressing spectrum folding can be obtained without providing a separate filter, thereby forming a spectrum that satisfies spectrum regulations of various countries, and by enabling implementation in a smaller area, it can be applied not only to large devices but also to small devices, thereby improving usability and reducing power consumption, which can improve resource efficiency.

[0034] The effects of the present disclosure are not limited to those mentioned above, and other unmentioned effects will be clearly understood by a person skilled in the art from the description below.

[0035] Figure 1 is a diagram schematically showing the configuration of an ultra-wideband transmitter according to a comparative example.

[0036] FIG. 2 is a diagram schematically showing the configuration of an ultra-wideband transmitter according to one embodiment of the present disclosure.

[0037] FIG. 3 is a diagram showing an example of a random phase clock signal generated according to one embodiment of the present disclosure.

[0038] FIG. 4 is a diagram schematically showing the configuration of a clock generation unit in an ultra-wideband transmitter according to one embodiment of the present disclosure.

[0039] FIG. 5 is a diagram showing an example of a multi-phase clock signal generated through a multi-phase generator provided in a clock generator according to one embodiment of the present disclosure.

[0040] FIG. 6 is a diagram showing an example of random data generated through a random signal generator provided in a clock generator according to one embodiment of the present disclosure.

[0041] FIGS. 7 to 12 are drawings for explaining the detailed configuration of a phase selection logic provided in a clock generation unit according to one embodiment of the present disclosure.

[0042] FIG. 13 is a flowchart schematically illustrating a driving method of an ultra-wideband transmitter according to one embodiment of the present disclosure.

[0043] FIG. 14 is a diagram showing an example of power spectral density before and after dithering application based on an ultra-wideband transmitter according to one embodiment of the present disclosure.

[0044] The advantages and features of the present disclosure and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present disclosure is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure is complete and to fully inform those skilled in the art of the scope of the invention, and the present disclosure is defined only by the scope of the claims. In connection with the description of the drawings, similar reference numerals may be used for similar components.

[0045] In this document, expressions such as "have," "can have," "include," or "can include" refer to the existence of the relevant feature (e.g., numerical values, functions, actions, or components, etc.) and do not exclude the existence of additional features.

[0046] In this document, expressions such as “A or B,” “at least one of A or / and B,” or “one or more of A or / and B” may include all possible combinations of items listed together. For example, “A or B,” “at least one of A and B,” or “at least one of A or B” may refer to cases including (1) at least one A, (2) at least one B, or (3) both at least one A and at least one B.

[0047] Expressions such as "first," "second," "first," or "second" used in this document may modify various components regardless of order and / or importance, and are used merely to distinguish one component from another without limiting such components. For example, the first user device and the second user device may represent different user devices regardless of order or importance. For example, without departing from the scope of rights set forth in this document, the first component may be named the second component, and similarly, the second component may be renamed the first component.

[0048] Where it is stated that a certain component (e.g., a first component) is "(operatively or communicatively) coupled with" or "connected to" another component (e.g., a second component), it should be understood that the said certain component may be directly connected to the said other component or connected through another component (e.g., a third component). On the other hand, where it is stated that a certain component (e.g., a first component) is "directly connected" or "directly connected" to another component (e.g., a second component), it may be understood that no other component (e.g., a third component) exists between the said certain component and the said other component.

[0049] As used in this document, the expression “configured to” may be replaced, depending on the context, with, for example, “suitable for,” “having the capacity to,” “designed to,” “adapted to,” “made to,” or “capable of.” The term “configured to” does not necessarily mean “specifically designed to” in hardware. Instead, in some situations, the expression “device configured to” may mean that the device is “capable of” in conjunction with other devices or components. For example, the phrase “processor configured to perform A, B, and C” may mean a dedicated processor for performing those operations (e.g., an embedded processor) or a generic-purpose processor (e.g., a CPU or application processor) capable of performing those operations by executing one or more software programs stored in a memory device.

[0050] The terms used in this document are used merely to describe specific embodiments and are not intended to limit the scope of other embodiments. Singular expressions may include plural expressions unless the context clearly indicates otherwise. Terms used herein, including technical or scientific terms, may have the same meaning as generally understood by those skilled in the art described in this document. Terms used in this document that are defined in general dictionaries may be interpreted as having the same or similar meaning as they have in the context of the relevant technology, and are not to be interpreted in an ideal or overly formal sense unless explicitly defined in this document. In some cases, even terms defined in this document may not be interpreted to exclude the embodiments of this document.

[0051] The features of each of the various embodiments of the present disclosure may be combined or combined with one another, either partially or wholly, and as will be fully understood by those skilled in the art, various technical interlocking and operation are possible, and each embodiment may be implemented independently of one another or together in an interlocking relationship.

[0052] For clarity in the interpretation of this specification, the terms used in this specification are defined below.

[0053] Hereinafter, the present disclosure will be described in detail by explaining preferred embodiments of the present disclosure with reference to the attached drawings.

[0054] Figure 1 is a diagram schematically showing the configuration of an ultra-wideband transmitter according to a comparative example.

[0055] Referring to FIG. 1, the ultra-wideband transmitter (100) according to the comparative example is an IR-UWB (Impulse Radio Ultra-Wide Band) synchronous transmitter for the IEEE 802.15.4 / 4z standard and is configured to include a 4-phase generator block, i.e., a 4-phase generator and an RFDAC (Radio-Frequency Digital-to-Analog Converter).

[0056] However, this configuration only shifts the offset of the spectrum folding, which is a problem of synchronous transmitters, to 2 GHz or 8 GHz, but it cannot reduce the size of the spectrum folding. Therefore, a separate filter must be provided at the output stage.

[0057] Therefore, the ultra-wideband transmitter (100) according to the comparison example is equipped with filters, so it not only takes up a large area within the device, but also has to consume more power than when it is not equipped with filters.

[0058] Moreover, due to spectrum folding, there is a high risk of violating spectrum mask restrictions under stringent spectrum regulations.

[0059] Accordingly, the present disclosure proposes an ultra-wideband transmitter capable of satisfying various spectrum regulations by effectively suppressing spectrum folding through the emission of pulse signals at dithered time intervals using a random phase clock signal.

[0060] FIG. 2 is a diagram schematically showing the configuration of an ultra-wideband transmitter according to one embodiment of the present disclosure.

[0061] Referring to FIG. 2, the ultra-wideband transmitter (1000) may include a clock generation unit (110), a pulse shaping unit (120), a multiplexer (130), a power amplifier (140), and an antenna unit (150).

[0062] First, the clock generation unit (110) generates and outputs at least one random phase clock signal in which the phase of the clock changes based on random data. Here, the random data may change at preset intervals (fixed intervals). Accordingly, the phase of the random phase clock signal output from the clock generation unit (110) also changes periodically.

[0063] As illustrated in FIG. 3, the clock generation unit (110) generates at least one multi-phase clock signal (v / IN) for dithering based on one clock signal (v / CLK). <0> inner v / IN <7> It generates ). In this case, the multi-phase clock signal can be generated by equalizing the input clock signal to exactly N.

[0064] Subsequently, the clock generation unit (110) uses a random selection signal to generate at least one multi-phase clock signal (v / IN <0> inner v / IN <7> A dithered random phase clock signal (v / CLK_R) can be output by randomly selecting one of the following.

[0065] The pulse shaping unit (120) receives at least one random phase clock signal generated from the clock generation unit (110), generates a pulse signal having a preset frequency band, and shapes the generated pulse signal to correspond to a transmission method.

[0066] At this time, the pulse shaping unit (120) receives size data and at least one random phase clock signal output from the clock generation unit (110), and synchronizes the random phase clock signal to generate at least one pulse signal that forms the shape of a specific pulse.

[0067] The multiplexer (130) selects one of at least one random phase clock signal output from the clock generation unit (110) based on phase data and outputs a carrier wave.

[0068] For example, the multiplexer (130) may select to use a clock signal having a preset phase among at least one multi-phase clock signal generated during the process in which the clock generator (110) generates a random phase clock signal as a carrier wave.

[0069] Here, the preset phase can be 0° or 180°.

[0070] The power amplifier (140) mixes (multiplies) the carrier wave output by the multiplexer (130) with each pulse signal formed by the pulse forming unit (120) and outputs each quantized pulse signal.

[0071] In this case, each quantized pulse signal may be a pulse signal quantized at a time interval to which dithering is applied.

[0072] The antenna unit (150) transmits each pulse signal quantized by the power amplifier unit (140) as a transmission signal.

[0073] FIG. 4 is a diagram schematically showing the configuration of a clock generation unit in an ultra-wideband transmitter according to one embodiment of the present disclosure.

[0074] Referring to FIG. 4, a clock generation unit (110) included in an ultra-wideband transmitter (1000) according to one embodiment of the present disclosure may include a multi-phase generation unit (1110), a random signal generation unit (1120), and a phase selection logic (1130).

[0075] First, the multi-phase generator (1110) generates at least one multi-phase clock signal for dithering.

[0076] For example, the multiphase generator (1110) may be a Delay Locked Loop (DLL). This delay locked loop equalizes the input clock signal to N to generate the at least one multiphase clock signal. However, configuring the delay locked loop as the multiphase generator (1110) is merely one example, and the multiphase generator (1110) may also be configured through other structures (configurations), and its form and method are not limited.

[0077] To this end, the delay-locked loop comprises a plurality of delay stages connected in series, each having delay components of a constant magnitude, for the received input clock signal, thereby generating a plurality of multi-phase clock signals.

[0078] At this time, the multi-phase generation unit (1110) can control the multi-phase clock signal output from the final delay stage to have a difference of one period compared to the input clock signal by decreasing or increasing the magnitude of the delay component included in each of the multiple delay stages.

[0079] As shown in FIG. 5, the input phase (φ) is generated through a multi-phase generator (1110). in The output phase (φ) with the delay component reflected for ) out Because it forces accurate alignment, the delay between each delay component is constant.

[0080] Meanwhile, the random signal generation unit (1120) generates random data. At this time, at least one of the multiple phase clock signals is selected by a multiplexer within the phase selection logic (1130), and for this purpose, the multiplexer uses the random data as a random selection signal.

[0081] Meanwhile, the random signal generation unit (1120) can generate random data based on PRBS (Pseudo Random Binary Sequence), etc.

[0082] As shown in FIG. 6, a bit sequence having a random pattern can be generated in the random signal generation unit (1120) using PRBS, etc.

[0083] FIGS. 7 to 12 are drawings for explaining the detailed configuration of a phase selection logic provided in a clock generation unit according to one embodiment of the present disclosure.

[0084] Referring to FIG. 7, the phase selection logic (1130) provided in the clock generation unit according to one embodiment of the present disclosure may include a first processing logic (1131), a second processing logic (1132), a third processing logic (1133), a fourth processing logic (1134), and a fifth processing logic (1135).

[0085] First, in the first processing logic (1131), at least one multi-phase clock signal output by the multi-phase generator (1110) and random data output by the random signal generator (1120), i.e., a random selection signal, are each input, and one of the multi-phase clock signals is randomly selected and output.

[0086] Meanwhile, as illustrated in FIG. 8, the first processing logic (1131) within the phase selection logic (1130) has N-to-2 N A multiplexer can be applied. Since the output waveform may be distorted by the propagation delay between each input, a transmission gate-based multiplexer is used. The N-bit random select signal is N-to-2 N One transmission gate is activated through the decoder. As a result, through the transmission gate, 2 NOne of the multiple phase clock signals can be selected, and it can operate as a multiplexer.

[0087] In addition, 2 that passed through the decoder N - The transmit gate select signal of the bit can be clocked by the final output of the corresponding multiplexer structure (Self-clocked).

[0088] Meanwhile, when an N-bit random selection signal selected and output by the random signal generator (1120) in the second processing logic (1132) is input, the current phase and the next phase are distinguished by clocking it twice using a flip-flop. At this time, the flip-flop distinguishing the current phase and the next phase can be clocked by the random phase clock (Dithered), which is the final output of the overall phase selection logic (Self-clocked).

[0089] Thus, if it is determined that a glitch will occur by comparing the current phase and the next phase in the fourth processing logic (1134), the output value can be fixed to Low / High at the corresponding timing to eliminate the glitch. At this time, the order of the current phase and the next phase can be compared through combination logic in which the DC selector performs a ternary operation.

[0090] In practice, if |current phase order - next phase order| < 4 (when the total number of phases is 8), a defect may occur.

[0091] Since the random phase clock signal is used for sampling the transmitter's output, metastasis issues caused by defects can distort the transmitter output. Therefore, logic is required to predict defects by comparing the current phase with the next phase.

[0092] For example, as shown in FIG. 9, by comparing the order of the current phase and the next phase through the flip-flop output of the second processing logic (1132) in the fourth processing logic (1134), if it is confirmed that a defect will occur, the defect can be eliminated as shown in FIG. 10 by fixing the output value to Low / High at the corresponding timing.

[0093] In addition, if the interval between the edge of the random selection signal and the clock edge (self-clocked) of the multiplexer in the third processing logic (1133) is too narrow, the logic cannot operate normally due to a setup time violation. Accordingly, as shown in FIG. 11, the random selection signal and N-to-2 N By inserting a buffer between decoders to intentionally add a delay, the interval between the edge of the random selection signal and the clock edge (self-clocked) of the multiplexer is adjusted.

[0094] Meanwhile, referring to FIG. 12, in the fifth processing logic (1135), the output selector detects the falling edge of the multiplexer output by the third processing logic (1133), and replaces the multiplexer output with High / Low for every falling edge to eliminate the defect. However, this is an example, and it is not necessary to replace the output with High / Low for every falling edge; the output of the internal multiplexer may be replaced with High / Low only when a defect occurs when comparing the current phase and the next phase sequence. In this case, since the output must be replaced exactly at the timing when the defect occurs, a TSPC flip-flop may be used to reduce the timing constraint.

[0095] Through the configuration of the clock generation unit (110) described above, a dithered clock signal can be generated, and through this dithered clock signal, unwanted periodicity of the synchronous transmitter can be effectively suppressed.

[0096] FIG. 13 is a flowchart schematically illustrating a driving method of an ultra-wideband transmitter according to one embodiment of the present disclosure.

[0097] Referring to FIG. 13, when an input signal to be transmitted is input, the clock generation unit (110) generates and outputs at least one random phase clock signal in which the phase of the clock is changed based on random data (S110).

[0098] At this time, at least one random phase clock signal can be generated through the dithering block in the clock generation unit (110) described above.

[0099] Specifically, when a multi-phase generator (1110) generates at least one multi-phase clock signal and a random signal generator (1120) generates random data, a phase selection logic (1130) receives at least one multi-phase clock signal generated by the multi-phase generator (110) and random data generated by the random signal generator (1120) as inputs, and randomly selects and outputs one of the at least one multi-phase clock signals.

[0100] Next, the pulse shaping unit (120) receives the at least one random phase clock signal generated from the clock generation unit (110), generates at least one pulse signal having a preset frequency band, and then shapes each of the generated at least one pulse signal to correspond to a transmission method (S120).

[0101] Next, the multiplexer (130) selects and outputs a carrier signal corresponding to a predetermined clock signal, i.e., a preset phase, among at least one multiphase signal generated by the multiphase generator (1110) (S130).

[0102] At this time, the multiplexer within the phase selection logic (1130) can be controlled by random data generated by the random signal generation unit (1120) based on a Pseudo Random Binary Sequence (PRBS). For example, this random data can be used as an N-bit control signal, i.e., a random selection signal, to select one of at least one phase signal among the multiple phase signals generated by the multiple phase generation unit (1110).

[0103] Thus, the multiplexer output in the phase selection logic (1130) becomes a dithered clock signal.

[0104] Next, the power amplifier (140) mixes the carrier wave output by step S130 with each pulse signal formed by the pulse forming unit (120) in step S120 and outputs each pulse signal quantized at a time interval with dithering applied (S140).

[0105] At this time, the carrier wave is selected by the multiplexer (130), and among at least one multi-phase signal generated by the multi-phase generator (1110), the multi-phase signal corresponding to a preset phase is selected to also be used as the carrier wave.

[0106] For example, the preset phase may be 0° or 180°, and the multiplexer (130) may select to use a clock signal having a phase of 0° or 180° as a carrier wave.

[0107] Next, the antenna unit (150) transmits (radiates) each pulse signal quantized by step S140 as a transmission signal (S150).

[0108] FIG. 14 is a diagram showing an example of power spectral density before and after dithering application based on an ultra-wideband transmitter according to one embodiment of the present disclosure.

[0109] Referring to FIG. 14, (a) shows the Power Spectral Density (PSD) before dithering is applied based on an ultra-wideband transmitter (1000) according to one embodiment of the present disclosure, and (b) shows the Power Spectral Density after dithering is applied based on an ultra-wideband transmitter (1000) according to one embodiment of the present disclosure.

[0110] As seen in Figure 14 (a), according to the power spectral density before dithering is applied, it can be confirmed that spectral folding occurs in a specific frequency band.

[0111] On the other hand, as seen in FIG. 14(b), it can be seen that the ultra-wideband transmitter (1000) according to one embodiment of the present disclosure suppresses the occurrence of spectrum folding in a specific frequency band by generating a quantized pulse signal at a dithered time interval, i.e., an irregular time interval, without having a filter. In other words, interference between different channels can be minimized. In addition, as the power spectrum density can more stably satisfy spectrum regulations of various countries, it is advantageous for improving communication quality.

[0112] Meanwhile, the ultra-wideband transmitter according to the present disclosure not only possesses superior characteristics in that it can significantly reduce circuit complexity, power consumption, and area compared to conventional filter-based spectral shapes, but also improves usability by allowing for useful application in small devices due to the reduced chip area. Furthermore, it can improve resource efficiency by reducing power consumption.

[0113] The examples of the present disclosure disclosed in this specification and drawings are provided merely to facilitate the explanation of the technical content of the present disclosure and to aid in understanding the present disclosure, and are not intended to limit the scope of the present name. It is obvious to those skilled in the art that other variations based on the technical concept of the invention are possible in addition to the examples disclosed herein.

[0114] This achievement is the result of research conducted with funding from the government (Ministry of Science and ICT) and supported by the National Research Foundation of Korea (No. RS-2024-00439307).

[0115] This achievement is the result of research conducted with funding from the government (Ministry of Science and ICT) in 2025 and supported by the Korea Institute of Information and Communications Technology Planning and Evaluation (No.RS-2025-02219277, AI Star Fellowship Support (Daegu Gyeongbuk Institute of Science and Technology)).

[0116] This achievement is the result of research conducted with funding from the government (Ministry of Science and ICT) in 2025 and supported by the National Research Foundation of Korea’s Bio-Medical Technology Development Project (RS-2025-02303581).

[0117] This achievement is the result of research conducted with funding from the government (Ministry of Science and ICT) and supported by the National Research Foundation of Korea (RS-2025-00519330).

Claims

1. A clock generation unit that generates and outputs at least one random phase clock signal in which the phase of the clock changes based on random data; A pulse shaping unit that receives at least one random phase clock signal generated from the clock generation unit, generates a pulse signal having a preset frequency band, and shapes it to correspond to a transmission method; A multiplexer that selects one of the at least one multi-phase clock signal based on phase data and outputs a carrier wave; A power amplifier that mixes the carrier wave with each pulse signal formed by the pulse forming unit and outputs each pulse signal quantized at a time interval with dithering applied; and An antenna unit that transmits the above-mentioned quantized pulse signal, Ultra-wideband transmitter.

2. In Paragraph 1, The above clock generation unit is, A multi-phase generator that generates at least one multi-phase clock signal for dithering; A random signal generation unit that generates the above random data; and A phase selection logic comprising receiving as input the at least one multi-phase clock signal generated by the multi-phase generator and the random data generated by the random signal generator, and randomly selecting and outputting one of the at least one multi-phase clock signals. Ultra-wideband transmitter.

3. In Paragraph 2, The above phase selection logic is, When the random data generated by the random signal generator is input, the current phase and the next phase are distinguished using a flip-flop and the order is compared to determine whether a defect has occurred, and if it is determined that a defect is likely to occur, the output value is fixed to Low or High at the corresponding timing to eliminate the defect. Ultra-wideband transmitter.

4. In Paragraph 2, The above multi-phase generation unit is, Generating at least one multi-phase clock signal by equalizing the input clock signal to N based on a delay-locked loop (DLL), Ultra-wideband transmitter.

5. In Paragraph 2, The above delay-locked loop is, In a negative feedback loop, the input phase (φ) in ) is the output phase (φ out Forcing alignment with ), Ultra-wideband transmitter.

6. In Paragraph 2, The above multiplexer is, Selecting a clock signal having a preset phase among the at least one multi-phase clock signal as the carrier signal. Ultra-wideband transmitter.

7. In Paragraph 6, The above preset phase is 0° or 180°, Ultra-wideband transmitter.

8. In Paragraph 2, The above random signal generation unit is, Generating the above random data based on PRBS (Pseudo Random Binary Sequence), Ultra-wideband transmitter.

9. In Paragraph 2, The above random data is, Used as a control signal to control the multiplexer within the above phase selection logic, and changing at preset periods, Ultra-wideband transmitter.

10. In Paragraph 1, The above pulse forming unit is, A device that receives size data and at least one random phase clock signal, synchronizes the random phase clock signal to generate at least one pulse signal that forms the shape of a specific pulse, Ultra-wideband transmitter.

11. In a method for driving an ultra-wideband transmitter, A step in which a clock generation unit generates and outputs at least one random phase clock signal in which the phase of the clock changes based on random data; A step in which a pulse shaping unit receives at least one random phase clock signal generated from the clock generation unit, generates a pulse signal having a preset frequency band, and shapes it to correspond to a transmission method; A step in which a multiplexer selects one of the at least one multiple phase clock signal based on phase data and outputs a carrier wave; A step in which a power amplifier mixes the carrier wave with each pulse signal formed by the pulse shaping unit and outputs each pulse signal quantized at a time interval to which dithering is applied; and The antenna unit includes the step of transmitting the quantized each pulse signal. Driving method of an ultra-wideband transmitter.

12. In Paragraph 11, The step of generating and outputting at least one random phase clock signal is, A multi-phase generation unit generates at least one multi-phase clock signal for dithering; A random signal generator generates the random data; and The phase selection logic receives as input the at least one multi-phase clock signal generated by the multi-phase generator and the random data generated by the random signal generator, and includes the step of randomly selecting and outputting one of the at least one multi-phase clock signals. Driving method of an ultra-wideband transmitter.

13. In Paragraph 12, When the random data generated by the random signal generator is input, a step of determining whether a defect has occurred by distinguishing the current phase and the next phase using a flip-flop and comparing the order; and If it is determined that a defect is likely to occur, the method further includes a step of fixing the output value to Low or High at the corresponding timing to eliminate the defect. Driving method of an ultra-wideband transmitter.

14. In Paragraph 12, The step of generating at least one multi-phase clock signal is, Generating at least one multi-phase clock signal by equalizing the input clock signal to N based on a delay-locked loop (DLL), Driving method of an ultra-wideband transmitter.

15. In Paragraph 12, The above delay-locked loop is, In a negative feedback loop, the input phase (φ) in ) is the output phase (φ out Forcing alignment with ), Driving method of an ultra-wideband transmitter.

16. In Paragraph 12, The step of selecting one of the above at least one multi-phase clock signal to output a carrier wave is: Selecting a clock signal having a preset phase among the at least one multi-phase clock signal as the carrier signal. Driving method of an ultra-wideband transmitter.

17. In Paragraph 16, The above preset phase is 0° or 180°, Driving method of an ultra-wideband transmitter.

18. In Paragraph 12, The above random signal generation unit further includes the step of generating the random data based on PRBS (Pseudo Random Binary Sequence), Driving method of an ultra-wideband transmitter.

19. In Paragraph 12, The above random data is, Used as a control signal to control the multiplexer within the above phase selection logic, and changing at preset periods, Driving method of an ultra-wideband transmitter.

20. In Paragraph 11, The step of generating the above pulse signal and shaping it to correspond to the transmission method is, The method of receiving size data and at least one random phase clock signal as input, synchronizing the random phase clock signal to generate at least one pulse signal that constitutes the shape of a specific pulse, Driving method of an ultra-wideband transmitter.