Pixel circuit, display panel and display device

Abstract

A pixel circuit (P), a display panel (1000) and a display device, relating to the technical field of display, which can mitigate a dark line defect caused by a local electrode short circuit, and improve the display effect and display yield. The pixel circuit (P) comprises: a first sub-circuit (100) electrically connected to a first node (N1), the first sub-circuit (100) being used for electrically connecting a data signal line (600); a second sub-circuit (200) electrically connected to a second node (N2), the second sub-circuit (200) being used for electrically connecting a first power supply line (700); a driving sub-circuit (300) separately electrically connected to the first node (N1), the second node (N2) and a third node (N3), the third node (N3) being used for electrically connecting a first electrode (510) of a light-emitting device (500), and a second electrode (520) of the light-emitting device (500) being used for electrically connecting a common electrode (800); and a reset sub-circuit (400) comprising a protection unit (410) and a reset unit (420), the protection unit (410) being electrically connected to the reset unit (420), the protection unit (410) being electrically connected to the third node (N3), and the reset unit (420) being used for electrically connecting a second power supply connection line (900), wherein the protection unit (410) comprises a resistor, and the resistivity of the protection unit (410) is less than the resistivity of the second power supply connection line (900).

Description

A pixel circuit, a display panel, and a display device Cross-references to related applications

[0001] This application claims priority to Chinese patent application No. 202411613036.7, filed on November 12, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This disclosure relates to the field of display technology, and more particularly to a pixel circuit, display panel, and display device. Background Technology

[0003] Currently, in the field of display technology, the pixel circuit, as the core circuit of the display driver backplane, together with the gate driver circuit and the data driver circuit, constitutes the basic display driver backplane. Under the control of the row scanning signal output by the gate driver circuit, the pixel circuit writes the display data signal output by the data driver circuit line by line into the storage capacitor of the pixel circuit through the switching transistor in the pixel circuit. The driving transistor in the pixel circuit, under the control of the voltage stored in the capacitor, accurately and continuously outputs voltage or current to the display optoelectronic device, such as the light-emitting device or the pixel electrode of the liquid crystal panel. Under the drive of current or voltage, the display device displays image information through active light emission or passive light emission.

[0004] However, in the existing pixel circuit structure, local electrode short circuits can easily lead to defects such as dark lines in entire rows, columns, or cross shapes, which seriously affect the display effect and yield of the display panel. Summary of the Invention

[0005] This disclosure provides a pixel circuit, a display panel, and a display device that can improve dark line defects caused by local electrode short circuits, thereby improving display effect and display yield.

[0006] A first aspect of this disclosure provides a pixel circuit, comprising:

[0007] The first sub-circuit is electrically connected to the first node, and the first sub-circuit is used to electrically connect the data signal line;

[0008] The second sub-circuit is electrically connected to the second node, and the second sub-circuit is used to electrically connect to the first power line;

[0009] A driving sub-circuit is electrically connected to the first node, the second node, and the third node, respectively. The third node is used to be electrically connected to the first electrode of the light-emitting device, and the second electrode of the light-emitting device is used to be electrically connected to the common electrode.

[0010] A reset sub-circuit, comprising a protection unit and a reset unit, wherein the protection unit is electrically connected to the reset unit and the third node is electrically connected to the third node, and the reset unit is used to electrically connect to a second power supply connection line, the second power supply connection line being used to transmit a second power supply signal;

[0011] The protection unit includes a resistor, and the resistivity of the protection unit is less than the resistivity of the second power connection line.

[0012] In some embodiments, when a short circuit exists between the first and second electrodes of the light-emitting device, the difference between the potential connected to the second power connection line and the potential connected to the common electrode is a first difference value. The first difference value is greater than or equal to the driving voltage difference of the light-emitting device. The protection unit is used to disconnect the circuit under the action of the current formed between the second power connection line and the third node, and the reset unit is disconnected from the third node.

[0013] In some embodiments, the first sub-circuit, the second sub-circuit, the driving sub-circuit, and the reset unit all include transistors. The second sub-circuit includes a capacitor unit, the first end of which is electrically connected to the first node, the second end of which is electrically connected to the second node, and the third end of which is electrically connected to a fourth node. The fourth node is used to be electrically connected to the first power line.

[0014] The driving sub-circuit includes a P-type transistor, and the reset unit includes an N-type transistor.

[0015] In some embodiments, the first sub-circuit includes a first transistor, the second sub-circuit includes a second transistor, the driving sub-circuit includes a driving transistor, the reset unit includes a third transistor, and the capacitor unit includes a first capacitor and a second capacitor.

[0016] The gate of the first transistor is used to receive a first control signal, the first electrode of the first transistor is used to electrically connect to a data signal line, the second electrode of the first transistor is electrically connected to the first node, the gate of the second transistor is used to receive a second control signal, the first electrode of the second transistor is electrically connected to the fourth node, the second electrode of the second transistor is electrically connected to the second node, the two ends of the first capacitor are electrically connected to the first node and the second node respectively, the two ends of the second capacitor are electrically connected to the second node and the fourth node respectively, the gate of the driving transistor is electrically connected to the first node, the first electrode of the driving transistor is electrically connected to the second node, the second electrode of the driving transistor is electrically connected to the third node, the gate of the third transistor is used to receive a third control signal, the first electrode of the third transistor is electrically connected to the protection unit, and the second electrode of the third transistor is used to electrically connect to the second power supply connection line.

[0017] In some embodiments, when a short circuit exists between the first and second electrodes of the light-emitting device, the first control signal is used to control the first transistor to turn off, thereby disconnecting the first sub-circuit; the second control signal is used to control the second transistor to turn off, thereby disconnecting the second sub-circuit; and the third control signal is used to control the third transistor to turn on, thereby turning on the reset unit; and / or,

[0018] In the event of a short circuit between the first and second electrodes of the light-emitting device, the potential of the second power supply signal is the ground potential, and the potential of the common electrode is the negative potential.

[0019] In some embodiments, the protection unit includes an electric fuse;

[0020] In the event of a short circuit between the first and second electrodes of the light-emitting device, the electric fuse is used to melt under the action of the flowing current, thereby disconnecting the reset unit from the third node.

[0021] In some embodiments, the protection unit includes an electric fuse;

[0022] The electric fuse is disposed in the same layer as at least one signal line, and the resistivity of the electric fuse is less than the resistivity of the signal line disposed in the same layer; and / or,

[0023] The electric fuse is disposed in the same layer as the transistor gate, and the resistivity of the electric fuse is less than the resistivity of the transistor gate; and / or,

[0024] The electric fuse is disposed in the same layer as the semiconductor layer, and the resistivity of the electric fuse is less than that of the semiconductor layer disposed in the same layer.

[0025] In some embodiments, the protection unit includes an electric fuse;

[0026] The electric fuse includes a first connecting end, a second connecting end, and a fuse segment. The fuse segment, the first connecting end, and the second connecting end are an integrated structure, and the fuse segment is connected between the first connecting end and the second connecting end.

[0027] The first connection terminal is electrically connected to the third node through a first via, and the second connection terminal is electrically connected to the reset unit through a second via.

[0028] The fuse segment has a smaller dimension in a first direction than the connecting end, and the first direction intersects with a second direction, which is the length direction of the fuse segment.

[0029] In some implementations, the pixel circuit further includes:

[0030] A process reference structure is provided in the same layer as the electrofused wire;

[0031] The process reference structure and the first and second connection ends are respectively disposed on different sides of the fuse section;

[0032] The orthographic projection of the process reference structure onto the substrate layer does not overlap with the orthographic projection of the electrofused wire onto the substrate layer.

[0033] In some embodiments, the second power connection line is used for electrical connection to a second power line, and the second power line is electrically connected to a plurality of second power connection lines;

[0034] The current density of the second power connection line is greater than the current density of the electric fuse;

[0035] The current density of the second power line is greater than the current density of the electric fuse.

[0036] In some embodiments, the connection distance between the electric fuse and the first electrode of the light-emitting device is greater than the connection distance between the electric fuse and the second power supply connection line; and / or,

[0037] The fuse has a breaking voltage range of 7.5V to 9V; and / or,

[0038] The linewidth of the fuse segment ranges from 0.02 μm to 0.2 μm, and the thickness of the fuse segment ranges from 200 nm to 500 nm; and / or,

[0039] The fuse section is arranged in a curved or broken line configuration.

[0040] In some embodiments, the protection unit includes an electric fuse that, in the event of a short circuit between the first and second electrodes of the light-emitting device, is used to melt under the action of a flowing current, thereby disconnecting the reset unit from the third node.

[0041] The sheet resistance of the fuse is in the range of 0.06 to 0.3 ohms / □; and / or,

[0042] The electric fuse at least partially surrounds the third transistor; and / or,

[0043] A shielding layer is spaced between the gate of the third transistor and the electric fuse.

[0044] A second aspect of this disclosure provides a display panel, including:

[0045] The pixel circuit as described in the first aspect;

[0046] A light-emitting device, wherein the first electrode of the light-emitting device is electrically connected to the third node of the pixel circuit;

[0047] The data signal line is electrically connected to the first sub-circuit of the pixel circuit.

[0048] The first power line is electrically connected to the second sub-circuit of the pixel circuit;

[0049] The second power supply line is electrically connected to the reset unit of the pixel circuit;

[0050] The second power line is electrically connected to the plurality of pixel circuits via the second power connection line;

[0051] The common electrode is electrically connected to the second electrode of the light-emitting device.

[0052] A third aspect of this disclosure provides a display device, comprising:

[0053] The display panel as described in the second aspect.

[0054] By incorporating a protection unit in the pixel circuit, which can include a resistor, the resistivity of the protection unit can be lower than that of the second power supply connection line. In the event of a short circuit between the two poles of the light-emitting device, the resistor in the protection unit can break under the influence of a large current, which has no effect on the second power supply connection line. The breaking of the protection unit allows the reset unit to disconnect from the third node. This disconnection prevents the potential of the second power supply connection line from being pulled to the short-circuit potential of the first pole in the event of a short circuit between the first and second poles, thus preventing the potential of the second power supply line from being pulled to the potential of the first pole. This avoids dark line defects (rows, columns, or cross-shaped defects) caused by localized short circuits in the light-emitting devices. Dark line defects in the display panel's display mode can be corrected to pixel defects. Attached Figure Description

[0055] The above and various other advantages and benefits of this disclosure will become clear to those skilled in the art upon reading the following detailed description of preferred embodiments.

[0056] Figure 1 is a schematic structural block diagram of a pixel circuit provided in an embodiment of this disclosure;

[0057] Figure 2 is a schematic structural diagram of a display panel provided in an embodiment of this disclosure;

[0058] Figure 3 is a schematic architecture block diagram of a display chip provided in an embodiment of this disclosure;

[0059] Figure 4 is a schematic architecture diagram of another display panel provided in an embodiment of this disclosure;

[0060] Figure 5 is a schematic structural diagram of a display module provided in an embodiment of this disclosure;

[0061] Figure 6 is a schematic circuit connection diagram of a display panel provided in an embodiment of this disclosure;

[0062] Figure 7 is a schematic block diagram of another pixel circuit provided in an embodiment of this disclosure;

[0063] Figure 8 is a schematic structural diagram of another pixel circuit provided in an embodiment of this disclosure;

[0064] Figure 9 is a schematic diagram of a pixel circuit driving timing provided in an embodiment of this disclosure;

[0065] Figure 10 is a schematic diagram of the first stage of operation of a pixel circuit according to an embodiment of the present disclosure;

[0066] Figure 11 is a schematic diagram of the second stage of operation of a pixel circuit according to an embodiment of the present disclosure;

[0067] Figure 12 is a schematic diagram of the third stage of operation of a pixel circuit according to an embodiment of the present disclosure;

[0068] Figure 13 is a schematic diagram of the fourth stage of operation of a pixel circuit according to an embodiment of this disclosure.

[0069] Figure 14 is a schematic diagram of the fourth stage of operation of another pixel circuit provided in an embodiment of this disclosure;

[0070] Figure 15 is a schematic diagram of the timing of some control signals in a repair drive mode provided in an embodiment of this disclosure;

[0071] Figure 16 is a schematic diagram of a working state of the pixel circuit in the repair driving mode provided in an embodiment of the present disclosure;

[0072] Figure 17 is a schematic diagram of another working state of the pixel circuit in the repair driving mode provided in the embodiment of this disclosure;

[0073] Figure 18 is a schematic diagram of another working state of the pixel circuit in the repair driving mode provided in the embodiment of this disclosure;

[0074] Figure 19 is a schematic structural diagram of an electric fuse provided in an embodiment of this disclosure;

[0075] Figure 20 is a schematic structural diagram of another type of electric fuse provided in an embodiment of this disclosure;

[0076] Figure 21 is a schematic structural diagram of another type of electric fuse provided in an embodiment of this disclosure;

[0077] Figure 22 is a schematic structural diagram of another type of electric fuse provided in an embodiment of this disclosure;

[0078] Figure 23 is a schematic structural diagram of an electric fuse provided in an embodiment of this disclosure;

[0079] Figure 24 is a schematic structural diagram of a display panel provided in an embodiment of this disclosure;

[0080] Figure 25 is a schematic structural diagram of a display device provided in an embodiment of this disclosure. Detailed Implementation

[0081] The present disclosure will now be further described with reference to the accompanying drawings and specific embodiments. The following description is merely illustrative of the basic principles of the present disclosure and is not intended to limit it.

[0082] To better understand the technical solutions provided in the embodiments of this specification, the technical solutions of the embodiments of this specification will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the embodiments of this specification and the specific features in the embodiments are detailed descriptions of the technical solutions of the embodiments of this specification, rather than limitations on the technical solutions of this specification. In the absence of conflict, the embodiments of this specification and the technical features in the embodiments can be combined with each other.

[0083] In this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, without necessarily requiring or implying any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element. The term "two or more" includes two or more cases.

[0084] Currently, in the field of display technology, the pixel circuit, as the core circuit of the display driver backplane, together with the gate driver circuit and the data driver circuit, constitutes the basic display driver backplane. Under the control of the row scanning signal output by the gate driver circuit, the pixel circuit uses switching transistors to write the display data signal output by the data driver circuit line by line into the storage capacitor of the pixel circuit. The driving transistors in the pixel circuit, controlled by the voltage stored in the capacitor, accurately and continuously output voltage or current to the display optoelectronic devices, such as light-emitting devices or pixel electrodes of the liquid crystal panel. Driven by current or voltage, the display devices display image information through active or passive light emission. However, in the existing pixel circuit structure, local electrode short circuits can easily lead to entire rows, columns, or cross-shaped dark lines, severely affecting the display effect and yield of the display panel.

[0085] In view of this, the present disclosure provides a pixel circuit, a display panel, and a display device that can improve the dark line defects caused by local electrode short circuits, thereby improving the display effect and display yield.

[0086] In a first aspect, this disclosure provides a pixel circuit. FIG1 is a schematic structural block diagram of a pixel circuit provided in this disclosure. Exemplarily, as shown in FIG1, a pixel circuit includes: a first sub-circuit 100, a second sub-circuit 200, a driving sub-circuit 300, and a reset sub-circuit 400. The first sub-circuit 100 is electrically connected to a first node N1 and is used to electrically connect to a data signal line 600, which can be used to transmit a data signal DATA. The second sub-circuit 200 is electrically connected to a second node N2 and is used to electrically connect to a first power line 700, which can be used to transmit a first power signal VDD. The driving sub-circuit 300 is connected to the first node N1, the second sub-circuit 200, the driving sub-circuit 300, and the reset sub-circuit 400. Node N2 and third node N3 are electrically connected. Third node N3 is used to electrically connect to the first electrode 510 of the light-emitting device 500. The second electrode 520 of the light-emitting device 500 is used to electrically connect to the common electrode 800, which can be used to transmit the common signal VCOM. The reset sub-circuit 400 includes a protection unit 410 and a reset unit 420. Protection unit 410 and reset unit 420 are electrically connected. Protection unit 410 is also electrically connected to third node N3. Reset unit 420 is used to electrically connect to the second power connection line 900, which can be used to transmit the second power signal VSS. The light-emitting device 500 can emit light under the voltage drive of the first electrode 510 and the second electrode 520. Protection unit 410 includes a resistor, and the resistivity of protection unit 410 is less than the resistivity of the second power connection line 900.

[0087] In some examples, the second power connection line 900 is connected to a second power line, which can be connected to an entire row of pixel circuits, an entire column of pixel circuits, or a cross-shaped arrangement of pixel circuits. The potential of the second power connection line 900 to which the current pixel circuit is connected will have a reverse effect on the potential of the second power line.

[0088] In the event of a short circuit between the two poles of the light-emitting device, the resistor in the protection unit can break under the influence of a large current. After the break, the protection unit is open-circuited, and the large current has no effect on the second power supply connection line. The open circuit of the protection unit allows the reset unit to disconnect from the third node. Disconnecting the reset unit from the third node prevents the potential of the second power supply connection line from being pulled to the short-circuit potential of the first pole when the first and second poles are short-circuited, thereby preventing the potential of the second power supply line from being pulled to the potential of the first pole. This avoids dark line defects in rows, columns, or cross shapes caused by local light-emitting device short circuits. Dark line defects in the display panel display mode can be corrected to spot defects.

[0089] For example, referring to Figure 1, a repair drive mode can be set. In the repair drive mode, the difference between the potential connected to the second power connection line 900 and the potential connected to the common electrode 800 is the first difference value. The first difference value can be the difference between the second power signal VSS and the common signal VCOM. The first difference value is greater than or equal to the driving voltage difference of the light-emitting device 500, that is, the magnitude of the first difference value can be used to drive the light-emitting device 500 to emit light. If there is a short circuit between the first electrode 510 and the second electrode 520 of the light-emitting device 500, the protection unit 410 can be used to disconnect the circuit under the action of the current formed between the second power connection line 900 and the third node N3, and the reset unit 420 is disconnected from the third node. The disconnection of the reset unit 420 from the third node can prevent the potential of the second power connection line 900 from being pulled to the short circuit potential of the first electrode 510 in the case of a short circuit between the first electrode 510 and the second electrode 520, thereby preventing the potential of the second power line from being pulled to the potential of the first electrode 510, and thus preventing the entire row, column or cross-shaped dark line defects caused by the local light-emitting device short circuit. The problem of a hidden line can be repaired into a problem of a dot.

[0090] For example, the driving control circuits for silicon-based OLED (organic light-emitting diode) microdisplays, silicon-based LED (light-emitting diode) microdisplays, and OLED displays may include gate driver circuits, source driver circuits, and pixel circuits. Silicon-based microdisplay architectures and manufacturing processes include dual-chip and single-chip display architectures. The pixel circuits provided in this disclosure are applicable to product types including, but not limited to, silicon-based OLED microdisplays, silicon-based LED microdisplays, and OLED displays. The display panels using the pixel circuits provided in this disclosure can be applied to fields including, but not limited to, smartphones, computers, televisions, tablets, or smart wearable devices. Smart wearable devices may include smartwatches or smart glasses, such as AR (augmented reality), VR (virtual reality), XR (extended reality), MR (mixed reality), sights, and rangefinders, among other consumer electronics products.

[0091] For example, silicon-based OLED is a novel display technology that combines semiconductor manufacturing processes and OLED display technology, using monocrystalline silicon driving circuit wafers as a substrate to fabricate OLED devices. Because it combines the advantages of both semiconductor manufacturing processes and OLED display technology, this technology can fabricate microdisplays with smaller display areas (typically 0.2-1.8 inches) while maintaining a certain resolution. This characteristic gives silicon-based OLEDs a very high pixel density (typically above 3000 PPI). In addition to high PPI, silicon-based OLEDs also have advantages such as high brightness, low power consumption, high response speed, wide color gamut, and high thermal stability.

[0092] Figure 2 is a schematic structural diagram of a display panel provided in an embodiment of this disclosure. Referring to Figure 2, the silicon-based OLED can be a single-chip driving architecture. The single-chip driving architecture integrates the display area (ACTIVE AREA) of the display panel and the complete display control and driving circuitry onto the same chip. The driving circuitry includes a row driving unit (GATEDRIVER), a column driving unit (SOURCE DRIVER_MUX), an image processing unit (IMAGE PROCESS BLOCK), a memory unit (RAM), a clock control unit (OTC), etc. The bonding pad area can be bonded to the display chip.

[0093] Figure 3 is a schematic architecture block diagram of a display chip provided in an embodiment of this disclosure. Referring to Figure 3, the display chip in the single-chip architecture can include both digital and analog parts, belonging to a mixed-signal chip. The display chip includes an ESD module, a SD data driver module, a GTON row clock control module, a RAM storage unit, a POWER power module, a MIPI processor interface, a TS clock generation module, and I / O pads. The image processing unit (IMAGE PROCESS BLOCK) and clock control unit (OTC) in the display control circuit are digital modules, requiring high-tech semiconductor processes (typically 55nm) for manufacturing. Furthermore, due to the complexity of the logic in digital modules, the number of metal layers used (typically at least 6 layers) is high, leading to excessively high production costs for single-crystal silicon driving substrates. In addition, the yield of silicon-based OLED microdisplays can be divided into the display area portion and the display control and driving portion. The yield of the display control and driving portion is determined solely by the semiconductor process, while the yield of the display area is determined jointly by the semiconductor process and the OLED device manufacturing process. In a single-chip architecture, a defect in any part will render the entire module defective, resulting in a significant loss in product yield and further increases in production costs.

[0094] With increasing demands for display size, the cost of single-chip architectures has become a concern. To reduce costs and further reduce power consumption, a dual-chip architecture has been proposed. Figure 4 is a schematic diagram of another display panel architecture provided by an embodiment of this disclosure. Exemplarily, as shown in Figure 4, the dual-chip architecture integrates the display area and part of the driving circuitry into the panel. The remaining driving circuitry and display control circuitry are separated into a DDIC. The panel portion includes the display area, the row driving unit GATEDRIVER, and the data driving module SD, while the DDIC portion includes a timing controller CT, a processor interface MIPI, and an image processing unit. The image processing unit may include a data signal unit DDIC_SOURCE, and scan signal units including DDIC_GOUT_L and DDIC_GOUT_R. A multiplexer circuit DeMUX<1:6> and a cathode signal loop Cathode Ring may also be integrated on the panel. After the panel and DDIC designs are completed, they will be manufactured using different process nodes. The DDIC portion uses a high process node process (generally below 28nm), and the panel portion uses a low process node process (generally 110nm). After the panel circuit is manufactured, the good panel products are put into the production of OLED devices. Finally, the manufactured good panel products and DDIC good products are bonded together through bonding process and bonding area DDIC_I / O Pd Area to form a complete display, or display module.

[0095] Figure 5 is a schematic structural diagram of a display module provided in an embodiment of this disclosure. Exemplarily, as shown in Figure 5, the display module includes a display panel, a driver chip DDIC, and a flexible circuit board FPC. The display panel is provided with a multiplexer circuit DeMUX<1:6>, a cathode signal loop, a line drive unit GATEDRIVER, and a timing controller CT.

[0096] Depending on the partitioning scheme, the panel has different components. The display area, gate driver circuit, and part of the source driver circuit can be integrated onto the panel. Figure 6 is a schematic circuit connection diagram of a display panel provided in an embodiment of this disclosure. For example, as shown in Figure 6, the display area is composed of a pixel circuit array, with each pixel circuit driving a sub-pixel to emit light, thus providing the current required for the OLED device to emit light; the row driving circuit provides the timing signals required to drive the row switching of the pixel circuits, realizing the row-by-row scanning function; the column driving circuit provides the column signals required by the pixel circuits, realizing the switching and control of the display screen.

[0097] In both single-chip and dual-chip architectures, the pixel circuitry, as a key component of the display driver backplane, directly affects the display's performance metrics such as PPI, maximum brightness, contrast ratio, crosstalk, and jitter.

[0098] Pixel circuits that output a stable voltage can be called voltage-type pixel circuits, while those that output a stable current can be called current-type pixel circuits. The type of pixel circuit can be determined based on the photoelectric characteristics of the display device. A pixel circuit can have a data writing stage and an output stage (or light-emitting stage). To ensure consistency between the on / off characteristics of the photoelectric device and the initial operating state of the pixel circuit, an initialization stage is required. Simultaneously, to improve the uniformity of the output current or voltage, compensation is needed for the threshold voltage uniformity and carrier mobility of the driving transistor, requiring an additional threshold compensation stage. Therefore, the operating state of a pixel driving circuit includes four stages: initialization, threshold compensation, data writing, and light-emitting drive. Depending on the application and circuit design, these four stages may be simplified or combined; for example, the threshold compensation stage and the data writing stage may be combined, with threshold compensation and data writing performed in the same stage.

[0099] The main performance indicators for pixel driver circuits are as follows: First, the range of stable output voltage and / or current. Generally, pixel circuits with a larger stable output current or voltage range have a wider range of applications. A larger output current or voltage range also results in higher brightness and contrast, and better circuit performance. Second, the uniformity of output voltage and / or current. Better uniformity of output current or voltage leads to better brightness uniformity. Third, the stability of output voltage and / or current. Because displays refresh images frame by frame, pixel circuits need to maintain stable output within one frame. In addition, because the displayed images are often complex, pixel driver circuits are required to maintain stable output when displaying complex or specific images. That is, the output of the pixel driver circuit should not be affected by other data on the data lines. The stability of the pixel driver circuit output is an important evaluation indicator for pixel circuits.

[0100] Figure 7 is a schematic block diagram of another pixel circuit provided in this embodiment. Referring to Figure 7, the third node N3 connected to the light-emitting device 500 is directly connected to the reset unit 420. When VCOM = -9V, after the electrodes of the light-emitting device 500 are short-circuited due to a foreign object, the potential of the first electrode 510 of the pixel circuit is pulled to the common signal VCOM, which is generally -9V. The potential of one end of the reset unit 420 connected to the third node N3 is pulled to -9V. When the reset unit 420 is turned on, the potential of one end of the reset unit 420 connected to the second power connection line 900 is pulled to -9V. The second power connection line 900 is connected to a second power line, which can be connected to the entire row of pixel circuits and the entire column of pixel circuits. When connecting or linking pixel circuits arranged in a cross pattern, the potential of the second power line will be pulled down to approximately -8V due to the voltage drop. This -8V potential of the second power signal line will then be transmitted to the reset units of other connected pixel circuits. With the reset units of these other pixel circuits conducting, the potential of the first electrode of the light-emitting device connected to those circuits is pulled down to -8V. Under the influence of a common signal of -9V, the 1V voltage difference across the light-emitting device is far lower than the lighting voltage, which is typically 3V or higher. The light-emitting devices in the other pixel circuits cannot emit light under this 1V voltage difference, resulting in rows, columns, or cross-shaped dark lines. This manifests as horizontal, vertical, or cross-shaped dark lines on the display panel. Furthermore, a short circuit at the electrodes of one or several light-emitting devices can cause even more extensive dark line defects, severely impacting the display panel's display quality, yield, and reliability.

[0101] Referring to Figure 1, a protection unit 410 is set in the pixel circuit. The protection unit 410 is located between the reset unit and the third node N3. A repair drive mode is set. In the repair drive mode, both the reset unit 420 and the protection unit 410 are turned on. The first electrode 510 and the second electrode 520 are not short-circuited. The potential of the second electrode 520 is consistent with the potential of the common electrode 800. Since there is no short circuit, the potentials of the first electrode 510 and the second electrode 520 are independent of each other. The potential of the first electrode 510 is consistent with the potential of the end of the protection unit 410 connected to the third node N3. The protection unit 410 can be regarded as a wire. The potentials at both ends of the protection unit 410 are almost consistent. When the reset unit 420 is turned on, it can be regarded as a wire. The potentials at both ends of the reset unit are consistent with the potential of the second power signal on the second power connection line. For example, in the repair drive mode, the common signal VCOM = -9V, the potential of the second power connection line is ground potential, that is, the second power signal VSS = 0V. Therefore, the potential of the first electrode 510 is 0V, the voltage difference across the light-emitting device 500 is 9V, and the potential of the first electrode 510 is higher than the potential of the second electrode 520. 9V meets the lighting voltage of the light-emitting device, so the light-emitting device 500 can be lit normally. Therefore, the repair drive mode will not affect normal light-emitting devices or connected pixel circuits.

[0102] Referring to Figure 1, in the repair drive mode, both the reset unit 420 and the protection unit 410 are turned on, and the first electrode 510 and the second electrode 520 are short-circuited. The potential of the second electrode 520 is the same as the potential of the common electrode 800. Due to the short circuit, the potentials of the first electrode 510 and the second electrode 520 are the same. The potential of the first electrode 510 is the same as the potential of the end of the protection unit 410 connected to the third node N3. When the reset unit 420 is turned on, it can be regarded as a wire. The potentials at both ends of the reset unit are the same as the potential of the second power signal on the second power connection line. For example, in the repair drive mode, the common signal VCOM = -9V, so the potential of the first pole 510 is -9V, and the potential of the second power connection line 900 is the ground potential, that is, the second power signal VSS = 0V. So the potential of the end of the reset unit 420 connected to the protection unit 410 is 0V, and the voltage difference between the two ends of the protection unit 410 is 9V. The current flowing through the protection unit 410 is large, which can cause the protection unit 410 to be open-circuited. The connection between the reset unit 420 and the third node N3 is cut off, that is, the connection between the second power connection line 900 and the first pole 510 is cut off. So the potential on the second power connection line 900 will not be affected, and the potential on the second power line will not be affected. After undergoing the repair drive mode, during the illumination drive of the pixel circuit of the display panel, the second power line is independent of the pixel circuit connected to the short-circuited light-emitting device, that is, there is no electrical connection. Therefore, the potential on the second power line will not be affected by the pixel circuit where the short-circuited light-emitting device is located. Dark spot defects will appear at the location of the short-circuited light-emitting device, but dark line defects will not appear. This can greatly reduce the defect range and improve the display effect, yield and reliability of the display panel.

[0103] It should be noted that the signal voltage values ​​mentioned in the above embodiments are only illustrative. The value of the common signal VCOM can also be -12V, -11V, -10V, -8V or -7V, etc. The value of the second power signal VSS can also be 0V, 1V or -1V, etc. The driving operation of the second power signal VSS being ground potential is relatively simple.

[0104] For example, the first electrode 510 of the light-emitting device 500 can be the anode of the light-emitting diode, and the second electrode 520 can be the cathode of the light-emitting diode.

[0105] For example, the repair drive mode can be an independent mode separate from the lighting mode. It can repair all pixel circuits of the display panel during the detection phase and isolate short-circuited light-emitting devices from the second power line. This prevents the pixel circuits connected to short-circuited light-emitting devices from interfering with the pixel circuits connected to the same second power line in the lighting mode.

[0106] In some implementations, the first sub-circuit, the second sub-circuit, the driving sub-circuit, and the reset unit all include transistors. The second sub-circuit includes a capacitor unit, with a first terminal electrically connected to a first node, a second terminal electrically connected to a second node, and a third terminal electrically connected to a fourth node. The fourth node is used to be electrically connected to a first power line. The capacitor unit can store and discharge charge.

[0107] In some examples, the driver sub-circuit includes a P-type transistor, and the reset unit includes an N-type transistor.

[0108] For example, the reset unit uses a P-type transistor for reset, which limits the reset voltage range, thus limiting the voltage range of the first electrode. However, in a circuit structure using a P-type transistor for reset, the same mechanism will not cause wire failure. Using an N-type transistor for reset allows for a wider reset voltage range, but due to the special structure of the N-type transistor, wire failure can occur due to the aforementioned mechanism. Therefore, a protection unit is introduced. The N-type transistor, in conjunction with the protection unit, can prevent wire failure. While the reset unit uses an N-type transistor, the drive sub-circuit can use a P-type transistor.

[0109] For example, the transistor can be a thin-film transistor (TFT), which can use a semiconductor material as the active layer and a metal as the transistor's electrodes. The transistor can also be a silicon-based transistor, using a single-crystal silicon wafer as the substrate. Source and drain electrodes are obtained by localized doping of the single-crystal silicon substrate, and the gate is obtained by doping polycrystalline silicon. The substrate of the silicon-based transistor can be connected to a power supply signal, such as a first power supply signal VDD, which can isolate the electrical connections between multiple transistors in the pixel circuit.

[0110] Figure 8 is a schematic structural diagram of another pixel circuit provided in an embodiment of this disclosure. In some embodiments, referring to Figure 8, the first sub-circuit includes a first transistor M1, the second sub-circuit includes a second transistor M2, the driving sub-circuit includes a driving transistor DMOS, the reset unit 420 includes a third transistor M3, and the capacitor unit includes a first capacitor C1 and a second capacitor C2. The gate of the first transistor M1 is used to receive the first control signal WS, which can control the on and off states of the first transistor M1. The first electrode of the first transistor M1 is used to electrically connect to the data signal line DATA and the data signal line 600. The second electrode of the first transistor M1 is electrically connected to the first node N1. The gate of the second transistor M2 is used to receive the second control signal DS, which can control the on and off states of the second transistor M2. The first electrode of the second transistor M2 is electrically connected to the fourth node N4, which is electrically connected to the first power line 700. The second electrode of the second transistor M2 is electrically connected to the second node N2. The first end of the capacitor unit is one end of the first capacitor C1. The second end of the capacitor unit is connected to the first capacitor C1 and the second capacitor C2. The third end of the capacitor unit is the other end of the second capacitor C2. The two ends of the first capacitor C1 are electrically connected to the first node N1 and the second node N2, respectively. The two ends of the second capacitor C2 are electrically connected to the second node N2 and the fourth node N4, respectively. The fourth node N4 is electrically connected to the first power line 700. The gate of the driving transistor DMOS is electrically connected to the first node N1. The first electrode of the driving transistor DMOS is electrically connected to the second node N2. The second electrode of the driving transistor DMOS is electrically connected to the third node N3. The gate of the third transistor M3 is used to receive the third control signal AZ. The third control signal AZ can control the conduction and cutoff of the third transistor M3. The first electrode of the third transistor M3 is electrically connected to the protection unit 410. The second electrode of the third transistor M3 is used to electrically connect to the second power connection line 900.

[0111] It should be noted that the first electrode of a transistor can be either the source or the drain, and the second electrode of a transistor can be either the source or the drain.

[0112] For example, referring to Figure 8, the protection unit may include an electric fuse 411, which can be used as a wire. The electric fuse 411 can melt under the action of a large current, thus acting as a fuse to cut off the path of a large current. The large current usually comes from the large voltage difference across the path, so cutting off the path with a large voltage difference can protect the potentials at both ends of the path from affecting each other due to the conduction of the path.

[0113] For example, the pixel circuit provided in this embodiment can be a silicon-based substrate, and the substrate of the transistor in the pixel circuit can be a single-crystal silicon substrate. To achieve electrical isolation between transistors, a power signal can be connected to the substrate of the transistor. For example, the substrates of the first transistor M1, the second transistor M2, and the driving transistor DMOS are all connected to the first power signal VDD, and the substrate of the third transistor M3 is connected to the second power signal VSS.

[0114] Typically, in silicon-based transistors, the source and substrate potentials are not the same. For NMOS transistors, the substrate is usually connected to the lowest potential of the circuit, VBS ≤ 0, where VBS is the voltage difference between the substrate and the source. For PMOS transistors, the substrate is usually connected to the highest potential of the circuit, VBS ≥ 0. In this case, the transistor's threshold voltage will change depending on the difference in potential between its source and substrate. This effect is called the "back-gate effect."

[0115] Taking an NMOS transistor as an example, when VBS < 0, the threshold voltage changes as follows: As Vgs increases (Vgs is the voltage difference between the gate and source of the transistor), the gate attracts electrons from the substrate to the substrate surface, creating a depletion layer. When Vgs rises to a certain voltage and reaches the threshold voltage, inversion occurs on the substrate surface under the gate, and the NMOS transistor begins to conduct between the source and drain. The magnitude of the threshold voltage is related to the charge in the depletion layer; the greater the charge in the depletion layer, the more difficult it is to turn on the NMOS transistor, and the higher the threshold voltage, i.e., the voltage required to turn on the NMOS. When VBS < 0, the potential difference between the gate and substrate increases, the thickness of the depletion layer also increases, and the charge in the depletion layer increases, thus causing the threshold voltage to increase. As VBS decreases, the threshold voltage increases, and with VGS and VDS remaining constant, the drain current decreases. Therefore, the substrate and gate have similar functions and can also control the change in drain current. This is why we call it the "back gate" effect. In circuit design, some measures can be taken to reduce or eliminate the substrate bias effect, such as shorting the source and the substrate. This can certainly eliminate the influence of the substrate bias effect, but it requires the support of circuit and device structure and manufacturing process.

[0116] Additionally, the circuit structure can be improved to reduce the substrate bias effect. Power signals can also be applied to the substrate.

[0117] In some examples, referring to Figure 8, in the repair drive mode, the first control signal WS is used to control the first transistor M1 to turn off so that the first sub-circuit is disconnected, the second control signal DS is used to control the second transistor M2 to turn off so that the second sub-circuit is disconnected, and the third control signal AZ is used to control the third transistor M3 to turn on so that the reset unit is turned on.

[0118] In some examples, in the repair drive mode, in the case of a short circuit between the first and second electrodes of the light-emitting device, an electric fuse is used to melt under the action of the flowing current, so as to disconnect the reset unit from the third node.

[0119] In some examples, referring to Figure 8, in the repair drive mode, the potential of the second power signal VSS is grounded, and the potential of the common electrode 900 is negative. The difference between the potential of the second power signal VSS and the potential of the common electrode 900 is a first difference value. The voltage value of the first difference value can be used to drive the light-emitting device 500 to light up. Therefore, if there is no short circuit between the two poles of the light-emitting device 500, the fuse 411 can conduct normally in the repair drive mode, and the light-emitting device can be lit up. If there is a short circuit between the two poles of the light-emitting device 500, the light-emitting device 500 will not light up in the repair drive mode, the fuse 411 will blow, and the reset sub-circuit will be open.

[0120] Figure 9 is a schematic diagram of the driving timing of a pixel circuit according to an embodiment of the present disclosure; Figure 10 is a schematic diagram of the first stage of operation of a pixel circuit according to an embodiment of the present disclosure; Figure 11 is a schematic diagram of the second stage of operation of a pixel circuit according to an embodiment of the present disclosure; Figure 12 is a schematic diagram of the third stage of operation of a pixel circuit according to an embodiment of the present disclosure; Figure 13 is a schematic diagram of the fourth stage of operation of a pixel circuit according to an embodiment of the present disclosure. For example, referring to Figures 8 to 13, the pixel circuit adopts a 4T2C current-type circuit, where 4T2C represents 4 transistors and 2 capacitors. The operation of the pixel circuit in the display stage can include four stages:

[0121] For example, referring to Figure 10, the first stage ① can be regarded as the initialization stage. At times t0 to t1, M1 is turned on, M2 is turned on, and M3 is turned on. The data signal DATA includes the initial data signal V. ofs and display data signal V data Initial data signal V ofs Voltage is written to the first capacitor C1 through M1, and the potential of the second node N2 connected to the source of the DMOS is V. s =VDD,V s This is also the source voltage of the DMOS. The potential of the first node N1 connected to the gate of the DMOS is V. g =V ofs V g It is also the voltage of the DMOS gate, and the potential V of the third node N3 connected to the drain of the DMOS. D =V g +V th V D It is also the drain voltage of the DMOS, V th Let VDD-V be the threshold voltage of the DMOS.ofs >|V th This prepares for the next discharge step. At this time, Vgs = V ini =VDD-V ofs C1 storage voltage V ini .

[0122] For example, referring to Figure 10, in the first stage, VSS = -5V, VCOM = -9V, M3 is on, the potential of the third node N3 is -5V, the potential of the first electrode 510 of the light-emitting device 500 is -5V, the potential of the second electrode 520 is -9V, the voltage difference between the two electrodes of the light-emitting device 500 is 4V, which is insufficient to light up the light-emitting device 500, the two electrodes of the light-emitting device 500 are not on, the current flowing through the fuse 411 is about pA (picoampere), and the fuse 411 will not melt.

[0123] For example, referring to Figure 11, the second stage 2, from time t1 to t2, can be considered as the self-discharge stage. M3 remains on, M1 is turned off first, the potential of the first node N1 is floating, then M2 is turned off, and the potential voltage of the second node N2 begins to discharge through the loop formed by the DMOS and M3, causing the potential of the second node N2 to decrease. Because the potential of the first node N1 is floating, the voltage difference across C1 remains unchanged, so the potential of the first node N1 decreases with the potential of the second node N2. Due to the back-gate effect of the DMOS, the equivalent threshold voltage |V th_EF |=a×(VDD-V s )+|V th |, where a is the back gate coefficient. Vgs remains constant, and Vgs is the voltage difference between the gate and source of the DMOS. As the potential of the second node N2 decreases, |V th_EF | Gradually increases, as |V th_EF When |Vgs is increased, the DMOS turns off, and the second node N2 stops discharging. At this time, |V th_EF |=a×(VDD-V s )+|V th |=V ini ,

[0124] For example, referring to Figure 12, the third stage ③, from time t2 to t3, can be considered as the grayscale voltage writing and threshold compensation stage. M3 remains on, M2 remains off, M1 is on, and V data Write to the first node N1, the voltage of the first node N1 is changed by V ofs The change is V data Because the second node N2 is floating, ΔV s = (1-b)ΔV g ,in The voltage at the second node N2 then becomes: at this time It should be noted that VDD in b×VDD can be a power signal connected to the transistor substrate. In this disclosure, the transistor silicon substrate is connected to the first power signal VDD, or it can be connected to a fixed potential separately. This disclosure does not make specific limitations.

[0125] For example, referring to Figures 11 and 12, in the second and third stages, M3 remains conductive, the states at both ends of the fuse 411 are consistent with those in the first stage, and the fuse will not melt.

[0126] For example, referring to Figure 13, in the fourth stage 4, after time t4, M1 is disconnected, M2 is turned on, M3 is turned off, and the light-emitting device 500 is lit. At this time, the current flowing through the light-emitting device 500... It can be seen that when At that time, I 500 With respect to the threshold voltage |V of the driving transistor DMOS th |Irrelevant, meaning threshold voltage compensation has been completed. W / L is the width-to-length ratio of the DMOS channel, μ p Where c is the dielectric constant. ox This refers to the gate oxide capacitance of a DMOS, i.e., the capacitance between the gate and the oxide layer.

[0127] For example, referring to Figure 13, in the fourth stage, M3 is disconnected, the fuse 411 and M3 cannot form a circuit, no current flows through the fuse 411, so the fuse 411 will not melt.

[0128] Figure 14 is a schematic diagram of the fourth stage of operation of another pixel circuit provided in an embodiment of this disclosure. Referring to Figure 14, taking the second power line 901 arranged horizontally as an example, in a row of pixel circuits, the pixel circuit includes a first pixel circuit P1, a second pixel circuit P2, etc. In the fourth stage (light-up stage) of the display mode, the first control signal WS = 3.3V, the second control signal DS = -2V, and the third control signal AZ = -5V. Therefore, the first transistor M1 is off, the second transistor M2 is on, and the third transistor M3 is off. Taking the second power line 901 laid out horizontally as an example, in a row of pixel circuits, the two poles of the light-emitting device 500 connected to the second pixel circuit P2 are short-circuited, and the potential of the second pole 520 of the light-emitting device 500 is pulled to -9V. The gate voltage of M3 V3g = AZ = -5V, and the source voltage of M3 is pulled to -9V, that is, the source voltage of M3 V3s = -9V. Therefore, the gate-source voltage difference of M3 V3gs = -5V - (-9V) = 4V > V3 When the gate-source voltage difference of M3 is greater than the threshold voltage V3th, M3 is turned on, and the drain voltage of M3 is V3d≈Vs=-9V. Due to the voltage drop, the potential of the second power supply line 901 connected to the drain of M3 is pulled to -8V. That is, when the two poles of the light-emitting device 500 are short-circuited, the common signal VCOM will be transmitted to the second power supply line 901 along the direction of the arrow. Due to the voltage drop, the potential of the second power supply line 901 is pulled to -8V. At this time, the gate potential of the third transistor M3 of the other normally operating light-emitting devices connected to the pixel circuits, such as the third transistor M3 of the first pixel circuit P1, is V3g = AZ = -5V, the drain potential of the third transistor M3 of the first pixel circuit P1 is V3d = -8V, and the voltage difference between the gate and drain of the third transistor M3 is V3gd = -5V - (-8V) = 3V > V3th. Therefore, M3 is turned on, V3s = -8V, the potential of the first electrode 510 of the light-emitting device of the first pixel circuit P1 is -8V, and the potential of the second electrode 520 of the light-emitting device is -9V. Therefore, the voltage difference between the two electrodes of the light-emitting device is 1V, which is insufficient to light up the light-emitting device. Therefore, when the two electrodes of the light-emitting device of the second pixel circuit P2 are short-circuited, the other light-emitting devices arranged in the same row as the second pixel circuit P2 cannot be lit up, which will form a horizontal dark line defect.

[0129] For example, if the second power line 901 is a vertical line, it forms a vertical dark line; if it is both horizontal and vertical, it forms a cross line.

[0130] Figure 15 is a schematic diagram of the timing of some control signals in a repair driving mode according to an embodiment of the present disclosure; Figure 16 is a schematic diagram of the working state of the pixel circuit in the repair driving mode according to an embodiment of the present disclosure. For example, referring to Figure 16, in the repair driving mode, the first control signal WS, the second control signal DS, and the first power signal VDD are floating, i.e., in a high-impedance state. That is, during the time period of Mode On and Mode OFF in the repair driving mode, the first control signal WS, the second control signal DS, and the first power signal VDD are in a high-impedance state or connected to a 3V voltage, but cannot be in a low-level state, to ensure that the current does not flow backward through the driving transistor and be shunted. The third control signal AZ is set to a constant potential of 3V, and the second power supply signal VSS is grounded, i.e., AZ = 3V, VSS = 0V. The common signal VCOM inputs a negative voltage of 12V (-12V). When the light-emitting device 500 is not short-circuited, AZ = 3V, VSS = 0V, the third transistor M3 is turned on, the potential of the first terminal 510 of the light-emitting device 500 is 0V, and the light-emitting device 500 conducts under a 12V voltage. The current in the circuit containing the fuse 411 is in the nA (nanoampere) range, and the fuse does not blow. Therefore, the circuit operation state of the repair drive mode will not affect the normal light-emitting device and the pixel circuit it is located in.

[0131] Figure 17 is a schematic diagram of another working state of the pixel circuit provided in the repair driving mode according to an embodiment of this disclosure. Referring to Figure 17, in the repair driving mode, the first control signal WS, the second control signal DS, and the first power signal VDD are floating (i.e., in a high-impedance state). The third control signal AZ is set to a constant potential of 3V, the second power signal VSS is grounded (i.e., AZ = 0V), and the common signal VCOM is input with a negative voltage of 12V (-12V). When the two poles of the light-emitting device 500 are short-circuited, the potential of the first pole 510 of the light-emitting device 500 is -12V, the potential of the end of the fuse 411 connected to the first node N3 is -12V, AZ = 3V, VSS = 0V, the third transistor M3 is turned on, the potential of the end of the fuse connected to M3 is 0V, and the voltage across the fuse 411 is -12V.

[0132] Figure 18 is a schematic diagram of another working state of the pixel circuit provided in the repair driving mode according to an embodiment of this disclosure. Referring to Figure 18, in the repair driving mode, when the two poles of the light-emitting device 500 are short-circuited, the fuse 411 generates a large instantaneous mA current under a -12V voltage difference. The fuse 411 melts, the third transistor M3 is disconnected from the light-emitting device, and the -12V potential is not transmitted to the second power line 901 through M3. Therefore, in the repair driving mode, the dark line defect becomes a dark spot defect. In the subsequent display mode, the short-circuited light-emitting device is not lit during the lighting stage. Since the second power line 901 is disconnected from the short-circuited light-emitting device, the short-circuited light-emitting device will not affect the potential of the second power line 901, and other normal light-emitting devices are lit normally. Therefore, only a dark spot defect occurs, and a dark line defect does not occur.

[0133] In a display panel, a short circuit between the anode and cathode of a single sub-pixel can lower the anode potential of an entire row or column of pixels through the second power line, causing the entire row or column of light-emitting devices to fail to emit light, forming a dark line. The pixel circuit provided in this embodiment adds a fuse to the drain of the third transistor and the anode of the light-emitting device. Then, in repair drive mode, the voltage difference between the second power signal and the common signal is increased, causing the pixel with a short circuit between its anode and cathode to generate a large current in the fuse, melting the fuse and forming a short circuit. This disconnects the second power line from the short-circuited pixel, preventing the second power line from being pulled low by the common electrode through the light-emitting device. This solution can repair dark lines without affecting the pixel dark spots caused by the anode-cathode short circuit. Since the display's tolerance for dark spots is much higher than for dark lines, repairing dark lines to dark spot defects can improve the display effect of the display panel and also increase its yield.

[0134] In some implementations, the material of the electric fuse may include semiconductor or metallic materials.

[0135] For example, in a silicon-based display panel, the gate of the silicon transistor is obtained by doping polycrystalline silicon, and the fuse can be disposed in the same layer as the gate in the silicon-based display panel. Depending on the resistivity requirements of the fuse, the doping concentration and other doping process parameters of the fuse can be differentiated from those of the gate; alternatively, the polycrystalline silicon material of the fuse may not be doped. The linewidths of the fuse and the gate can also be differentiated.

[0136] For example, the resistivity of the electric fuse can be less than that of the gate of the transistor arranged in the same layer. Under the same current, the electric fuse is more likely to break, while the gate will not break.

[0137] For example, in a thin-film display panel, the active layer of the thin-film transistor is a semiconductor material, and the fuse can be disposed on the same layer as the active layer. A portion of the active layer is doped to connect the source and drain electrodes. The doping of the fuse can be different from or the same as that of the active layer to obtain the required resistivity.

[0138] For example, the resistivity of the electric fuse can be less than that of the semiconductor layer disposed in the same layer. Under the same current, the electric fuse is more likely to break, while the semiconductor will not break.

[0139] For example, the pixel circuit is provided with multiple metal layers, and the display panel is provided with multiple signal lines, which are usually made of metal. The electric fuse can be provided in the same layer as at least one metal layer, and the electric fuse can be provided in the same layer as at least one signal line.

[0140] For example, the resistivity of the fuse can be less than that of the signal line on the same layer. Under the same current, the fuse is more likely to break, while the signal line will not break.

[0141] For example, the metal may include a stacked or monolayer structure of molybdenum, aluminum, or molybdenum; a stacked or monolayer structure of titanium, aluminum, or titanium; silver; or a conductive metal oxide, such as indium tin oxide.

[0142] It should be noted that "A" and "B" being set in the same layer means that "A" and "B" are prepared simultaneously through the same process, and film formation and patterning processes can be carried out at the same time.

[0143] In some embodiments, the electric fuse includes a first connecting end, a second connecting end, and a fuse segment. The fuse segment, the first connecting end, and the second connecting end are an integral structure, and the fuse segment is connected between the first connecting end and the second connecting end. The first connecting end is electrically connected to a third node through a first via, and the second connecting end is electrically connected to a reset unit through a second via. The size of the fuse segment in a first direction is smaller than the size of the connecting end. The first direction intersects with a second direction, and the second direction is the length direction of the fuse segment.

[0144] Figure 19 is a schematic structural diagram of an electric fuse provided in an embodiment of this disclosure. Exemplarily, as shown in Figure 19, the electric fuse includes a first connecting end 412, a second connecting end 413, and a fuse segment 414. The fuse segment 414 is connected between the first connecting end 412 and the second connecting end 413. The first connecting end 412, the second connecting end 413, and the fuse segment 414 can all be rectangular in shape. A first direction X intersects with a second direction Y, where the second direction Y can be the length direction of the fuse segment 414. The first connecting end 412 and the second connecting end 413 are the same size. The dimension of the second connecting end 413 along the first direction X can be a first dimension L1, and the dimension of the fuse segment 414 along the first direction X is a second dimension L2, where the first dimension L1 is greater than the second dimension L2. Since the fuse segment 414 is used to melt under high current, its width cannot be too wide. The connecting end is used to connect other circuit structures, requiring sufficient space to ensure the stability of the electrical connection; therefore, the width of the connecting end is greater than the width of the fuse segment.

[0145] In addition, a larger connection area can reduce the resistance of the fuse, ensuring that it melts under high current.

[0146] For example, referring to FIG19, the electric fuse also includes a process reference structure 415, which is disposed in the same layer as the electric fuse. The process reference structure 415, the first connection end 412, and the second connection end 413 are respectively disposed on different sides of the fuse segment 414, that is, the process reference structure 415 can be disposed on the left and right sides of the fuse segment 414, and the connection ends are disposed on the top and bottom sides of the fuse segment. The orthographic projection of the process reference structure 415 on the substrate layer does not overlap with the orthographic projection of the electric fuse on the substrate layer. The process reference structure 415 is spaced apart from the first connection end 412, the second connection end 413, and the fuse segment 414.

[0147] For example, the larger connecting section can also act as a heat sink, making the two ends of the fuse segment cooler than the middle area during the melting process. The middle part of the fuse should be the hottest part because it is farthest from the cooling endpoints. This explains why we always see the fuse break in the middle, rather than near either end.

[0148] For example, in order to ensure process accuracy and stability during the setting of the electric fuse, the area of ​​the pattern structure during the process can be guaranteed by setting a process reference structure 415.

[0149] Figure 20 is a schematic structural diagram of another electric fuse provided in an embodiment of this disclosure. Referring to Figure 20, for example, the first connection end 412 is electrically connected to the first node through a first via 416, and the second connection end 413 is electrically connected to the third transistor through a second via 417. Each connection end can be provided with four vias, or more, such as six or three. The more vias, the higher the electrical connection stability. Multiple vias can be provided within the limited area of ​​the connection end.

[0150] Figure 21 is a schematic structural diagram of another type of electric fuse provided in an embodiment of this disclosure. By way of example, referring to Figure 21, the fuse segment 414 is curved.

[0151] Figure 22 is a schematic structural diagram of another type of electric fuse provided in an embodiment of this disclosure. Referring, by way of example, the fuse segment 414 is zigzag-shaped.

[0152] Figure 23 is a schematic structural diagram of an electric fuse provided in an embodiment of this disclosure. Referring to Figure 23, the fuse segment 414 is serrated in shape, which can reduce the resistance of the fuse segment.

[0153] Due to the limitations of the pixel circuit placement, the size of the pixel circuit usually affects the resolution of the display panel. Therefore, it is necessary to avoid the pixel circuit occupying a large area. Within the limited area, the space for adding electric fuses is relatively limited. To ensure the relevant electrical parameters of the electric fuses, such as resistance value and fusing current, irregularly shaped fuse segments can be set.

[0154] In some embodiments, the second power connection line is used for electrical connection to the second power line, and the second power line is electrically connected to multiple second power connection lines; the current density of the second power connection line is greater than the current density of the fuse; the current density of the second power line is greater than the current density of the fuse. This ensures that in the event of fuse failure, the second power connection line and the second power line will not be melted by a large current, thus guaranteeing the stability of the second power line and the second power connection line.

[0155] In some implementations, the connection distance between the fuse and the first electrode of the light-emitting device is greater than the connection distance between the fuse and the second power supply connection line. By placing the fuse closer to the second power supply connection line relative to the light-emitting device, the connection between the second power supply line and the current pixel circuit can be ensured even if the fuse blows. Additionally, this avoids short-circuiting between the electrodes of the light-emitting device and the fuse.

[0156] In some implementations, the fuse breaking voltage range is 7.5V to 9V, meaning the voltage difference across the fuse terminals that causes it to break can be between 7.5V and 9V, for example, 8V or 8.5V. Additionally, the fuse breaking condition also depends on the resistance value of the sterilization fuse.

[0157] In some implementations, the linewidth of the fuse segment ranges from 0.02 μm to 0.2 μm, that is, the value of the second dimension L2 is between 0.1 μm and 0.2 μm, for example, it can be 0.15 μm, etc., the thickness of the fuse segment ranges from 200 nm to 500 nm, and the cross-sectional area of ​​the fuse segment can determine the resistance of the fuse segment.

[0158] For example, the linewidth of the fuse segment in a 0.11μm process precision process can range from 0.1μm to 0.2μm. In a 55nm process precision process, the linewidth of the fuse segment can range from 0.02μm to 0.2μm.

[0159] In some implementations, the sheet resistance of the electric fuse ranges from 0.06 to 0.3 ohms / □, where □ represents a single square in the sheet resistance test.

[0160] In some implementations, the fuse may at least partially surround the third transistor. This surrounding of the third transistor can save space for the fuse and also serve to shield the third transistor from signal interference.

[0161] In some embodiments, a shielding layer is provided between the gate of the third transistor and the electric fuse. The shielding layer is mainly used to shield the gate from interference caused by the signal flowing through the electric fuse. In particular, the electric fuse is arranged around the third transistor. The current on the electric fuse may affect the induced charge of the gate and the active layer, thereby affecting the threshold voltage of the third transistor.

[0162] A second aspect of this disclosure provides a display panel, and FIG24 is a schematic structural diagram of a display panel provided in an embodiment of this disclosure. As shown in FIG24, the display panel includes: a pixel circuit P as provided in the first aspect, wherein a plurality of pixel circuits are arranged in an array; a first electrode of a light-emitting device is electrically connected to a third node N3 of the pixel circuit P; a data signal line 600 is electrically connected to a first sub-circuit of the pixel circuit P; a first power supply line 700 is electrically connected to a second sub-circuit of the pixel circuit P; a second power supply connection line is electrically connected to a reset unit of the pixel circuit; a second power supply line 901 is electrically connected to a plurality of pixel circuits via the second power supply connection line; and a common electrode is electrically connected to the second electrode of the light-emitting device.

[0163] For example, the common electrode can be an electrode layer covering the entire surface. The second power line 901 can also be vertically arranged, or it can be arranged in a mesh pattern. Without repair, poor mesh quality may occur due to dark lines. The first power line 700 can also be horizontally arranged, and the second power line 901 can also be arranged in a mesh pattern.

[0164] In some implementations, the ratio of the line width of the second power line 901 to the line width of the fuse segment is greater than or equal to 2, that is, the line width of the second power line is much larger than the line width of the fuse segment, which can prevent the fusing current of the fuse segment from affecting the second power line.

[0165] In some examples, the ratio of the width of the second power connection line to the width of the fuse segment is greater than or equal to 1. The width of the second power connection line is also greater than the width of the fuse segment.

[0166] The display panel incorporates a protection unit within its pixel circuitry. This protection unit can include a resistor, whose resistivity can be lower than that of the second power supply connection line. In the event of a short circuit between the two terminals of the light-emitting device, the resistor in the protection unit can break under the influence of a large current, which has no effect on the second power supply connection line. This circuit breaking of the protection unit disconnects the reset unit from the third node. Even with a short circuit between the first and second terminals, this prevents the potential of the second power supply connection line from being pulled to the short-circuit potential of the first terminal, thus preventing the potential of the second power supply line from being pulled to the potential of the first terminal. This avoids dark line defects (rows, columns, or cross-shaped defects) caused by localized short circuits in the light-emitting devices. Dark line defects in the display panel's display mode can be corrected to pixel defects.

[0167] A third aspect of this disclosure is illustrated in FIG25, which is a schematic structural diagram of a display device provided in an embodiment of this disclosure. As shown in FIG25, a display device includes a display panel 1000 as provided in the second aspect.

[0168] The display panel used in the display device incorporates a protection unit within the pixel circuit. This protection unit can include a resistor, and its resistivity can be lower than that of the second power supply connection line. In the event of a short circuit between the two poles of the light-emitting device, the resistor in the protection unit can break under the influence of a large current, which has no effect on the second power supply connection line. The breaking of the protection unit disconnects the reset unit from the third node. This prevents the potential of the second power supply connection line from being pulled to the short-circuit potential of the first pole in the event of a short circuit between the first and second poles, thus preventing the potential of the second power supply line from being pulled to the potential of the first pole. This avoids dark line defects (rows, columns, or cross-shaped defects) caused by localized short circuits in the light-emitting devices. Dark line defects in the display panel's display mode can be corrected to pixel defects.

[0169] A fourth aspect of this disclosure provides a method for driving a pixel circuit, comprising:

[0170] Step 1,

[0171] A common signal, which is a negative voltage, is provided to the common electrode.

[0172] In addition, a grounding voltage is provided to the second power line, wherein the difference between the common signal and the grounding signal is the first difference, which is the voltage difference that can light up the light-emitting device;

[0173] In addition, the third transistor provides a third control signal, and the third transistor is turned on under the action of the third control signal; in order to repair the dark line defects of the display panel, that is, to perform the repair drive mode operation.

[0174] Step two,

[0175] After the driver mode repair is complete, proceed with the display mode driver for the display panel.

[0176] or,

[0177] After the driver mode repair is complete, proceed with the test mode driver for the display panel.

[0178] If there are hidden line defects in the test mode driver, the repair driver mode can be executed again.

[0179] In some examples, a test mode driver for the display panel can be performed before step one. If no dark line defects are found, the repair driver mode is not executed.

[0180] This disclosure also provides a controller, which may include a memory and a processor. The memory may store a computer program, and the processor may execute the steps of the pixel driving method according to the computer program.

[0181] The display device provided in this disclosure embodiment may include a controller and a display panel, wherein the controller is used to drive the display panel.

[0182] The above embodiments are only used to illustrate the technical solutions of this disclosure, and are not intended to limit it. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this disclosure.

[0183] Although preferred embodiments have been described in this specification, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this specification.

[0184] Obviously, those skilled in the art can make various modifications and variations to this specification without departing from its spirit and scope. Therefore, if such modifications and variations fall within the scope of the claims and their equivalents, this specification is also intended to include such modifications and variations.

Claims

1. A pixel circuit, comprising: The first sub-circuit is electrically connected to the first node, and the first sub-circuit is used to electrically connect the data signal line; The second sub-circuit is electrically connected to the second node, and the second sub-circuit is used to electrically connect to the first power line; A driving sub-circuit is electrically connected to the first node, the second node, and the third node, respectively. The third node is used to be electrically connected to the first electrode of the light-emitting device, and the second electrode of the light-emitting device is used to be electrically connected to the common electrode. A reset sub-circuit, comprising a protection unit and a reset unit, wherein the protection unit is electrically connected to the reset unit and the third node is electrically connected to the third node, and the reset unit is used to electrically connect to a second power supply connection line, the second power supply connection line being used to transmit a second power supply signal; The protection unit includes a resistor, and the resistivity of the protection unit is less than the resistivity of the second power connection line.

2. The pixel circuit according to claim 1, wherein, In the event of a short circuit between the first and second electrodes of the light-emitting device, the difference between the potential connected to the second power connection line and the potential connected to the common electrode is a first difference value. The first difference value is greater than or equal to the driving voltage difference of the light-emitting device. The resistor of the protection unit is used to break the circuit under the action of the current formed between the second power connection line and the third node, and the reset unit is disconnected from the third node.

3. The pixel circuit according to claim 1, wherein, The first sub-circuit, the second sub-circuit, the driving sub-circuit, and the reset unit all include transistors. The second sub-circuit includes a capacitor unit. The first end of the capacitor is electrically connected to the first node, the second end of the capacitor unit is electrically connected to the second node, and the third end of the capacitor unit is electrically connected to the fourth node. The fourth node is used to be electrically connected to the first power line. The driving sub-circuit includes a P-type transistor, and the reset unit includes an N-type transistor.

4. The pixel circuit according to claim 3, wherein, The first sub-circuit includes a first transistor, the second sub-circuit includes a second transistor, the driving sub-circuit includes a driving transistor, the reset unit includes a third transistor, and the capacitor unit includes a first capacitor and a second capacitor. The gate of the first transistor is used to receive a first control signal, the first electrode of the first transistor is used to electrically connect to a data signal line, the second electrode of the first transistor is electrically connected to the first node, the gate of the second transistor is used to receive a second control signal, the first electrode of the second transistor is electrically connected to the fourth node, the second electrode of the second transistor is electrically connected to the second node, the two ends of the first capacitor are electrically connected to the first node and the second node respectively, the two ends of the second capacitor are electrically connected to the second node and the fourth node respectively, the gate of the driving transistor is electrically connected to the first node, the first electrode of the driving transistor is electrically connected to the second node, the second electrode of the driving transistor is electrically connected to the third node, the gate of the third transistor is used to receive a third control signal, the first electrode of the third transistor is electrically connected to the protection unit, and the second electrode of the third transistor is used to electrically connect to the second power supply connection line.

5. The pixel circuit according to claim 4, wherein, In the event of a short circuit between the first and second electrodes of the light-emitting device, the first control signal is used to control the first transistor to turn off to disconnect the first sub-circuit, the second control signal is used to control the second transistor to turn off to disconnect the second sub-circuit, and the third control signal is used to control the third transistor to turn on to turn on the reset unit. And / or, In the event of a short circuit between the first and second electrodes of the light-emitting device, the potential of the second power supply signal is the ground potential, and the potential of the common electrode is the negative potential.

6. The pixel circuit according to any one of claims 1 to 5, wherein, The protection unit includes an electric fuse; In the event of a short circuit between the first and second electrodes of the light-emitting device, the electric fuse is used to melt under the action of the flowing current, thereby disconnecting the reset unit from the third node.

7. The pixel circuit according to any one of claims 1 to 5, wherein, The protection unit includes an electric fuse; The electric fuse is disposed in the same layer as at least one signal line, and the resistivity of the electric fuse is less than the resistivity of the signal line disposed in the same layer; and / or, The electric fuse is disposed in the same layer as the transistor gate, and the resistivity of the electric fuse is less than the resistivity of the transistor gate; and / or, The electric fuse is disposed in the same layer as the semiconductor layer, and the resistivity of the electric fuse is less than that of the semiconductor layer disposed in the same layer.

8. The pixel circuit according to any one of claims 1 to 5, wherein, The protection unit includes an electric fuse; The electric fuse includes a first connecting end, a second connecting end, and a fuse segment. The fuse segment, the first connecting end, and the second connecting end are an integrated structure, and the fuse segment is connected between the first connecting end and the second connecting end. The first connection terminal is electrically connected to the third node through a first via, and the second connection terminal is electrically connected to the reset unit through a second via. The fuse segment has a smaller dimension in a first direction than the connecting end, and the first direction intersects with a second direction, which is the length direction of the fuse segment.

9. The pixel circuit according to claim 8, further comprising: A process reference structure is provided in the same layer as the electrofused wire; The process reference structure and the first and second connection ends are respectively disposed on different sides of the fuse section; The orthographic projection of the process reference structure onto the substrate layer does not overlap with the orthographic projection of the electrofused wire onto the substrate layer.

10. The pixel circuit according to claim 9, wherein, The second power connection cable is used for electrical connection with the second power line, and the second power line is electrically connected to a plurality of second power connection cables; The current density of the second power connection line is greater than the current density of the electric fuse; The current density of the second power line is greater than the current density of the electric fuse.

11. The pixel circuit according to claim 9, wherein, The connection distance between the electric fuse and the first electrode of the light-emitting device is greater than the connection distance between the electric fuse and the second power supply connection line; and / or The fuse has a breaking voltage range of 7.5V to 9V; and / or, The linewidth of the fuse segment ranges from 0.02 μm to 0.2 μm, and the thickness of the fuse segment ranges from 200 nm to 500 nm; and / or, The fuse section is arranged in a curved or broken line configuration.

12. The pixel circuit according to claim 4, wherein, The protection unit includes an electric fuse, which is used to melt under the action of flowing current in the event of a short circuit between the first and second electrodes of the light-emitting device, thereby disconnecting the reset unit from the third node. The sheet resistance of the fuse is in the range of 0.06 to 0.3 ohms / □; and / or, The electric fuse at least partially surrounds the third transistor; and / or, A shielding layer is spaced between the gate of the third transistor and the electric fuse.

13. A display panel, comprising: Pixel circuit as described in any one of claims 1 to 12; A light-emitting device, wherein the first electrode of the light-emitting device is electrically connected to the third node of the pixel circuit; The data signal line is electrically connected to the first sub-circuit of the pixel circuit. The first power line is electrically connected to the second sub-circuit of the pixel circuit; The second power supply line is electrically connected to the reset unit of the pixel circuit; The second power line is electrically connected to the plurality of pixel circuits via the second power connection line; The common electrode is electrically connected to the second electrode of the light-emitting device.

14. A display device, comprising: The display panel as described in claim 13.

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