Amplifier with a harmonic reduction circuit

Abstract

In an example, an amplifier is provided. The amplifier comprises a first pair of transistors comprising a first transistor and a second transistor. The amplifier also comprises a first trace connected to a drain of the first transistor, and a second trace connected to a drain of the second transistor. The amplifier also comprises a harmonic reduction first circuit comprising at least one first inductor connected between a first node and a second node. The harmonic reduction first circuit further comprises a third trace connected to the first node, wherein at least part of the third trace is adjacent and substantially parallel to a first at least part of the first trace, and a fourth trace connected to the second node, wherein at least part of the fourth trace is adjacent and substantially parallel to a first at least part of the second trace.

Description

[0001] AMPLIFIER WITH A HARMONIC REDUCTION CIRCUIT

[0002] Technical Field

[0003] Example embodiments of this disclosure relate to an amplifier with improved harmonic rejection, for example including one or more harmonic reduction circuits.

[0004] Background

[0005] A power amplifier (PA) is a key building block in many transmitter chains, and usually consumes the majority of the power budget for the transmitter chain. For the PA, there is a trade-off between efficiency and linearity. Generally, the linearity of the PA can be enhanced and corrected by using Digital Pre-Distortion (DPD), but this is generally only feasible for PAs with large output power levels.

[0006] Large Antennas are antenna solutions which are gaining interest and considered to be one way forward to improve network performance. The antenna gain can also be used to reduce the output power per PA to enable use of technologies, such as CMOS, and a high-level of integration to reduce cost and give scalable solutions. When the PA output power becomes relatively low, such as in the order of a few hundred mW, the power consumption of DPD of around 0.5W becomes very costly. Consequently, CMOS may require solutions without DPD to reach an acceptable power consumption and cost budget and could be based on PA with an enhanced intrinsic level of linearity.

[0007] One way to improve linearity and efficiency is the dual-drive technique, as illustrated for example in Zhang et al, “A 20-GHz 1.9-mW LNA Using gm-Boost and Current-Reuse Techniques in 65-nm CMOS for Satellite Communications,” IEEE Journal of Solid-State Circuits, vol. 55, no. 10, October 2020, and Zhang et al, “Broadband Gm-Boosted Differential HBT Doublers with Transformer Balun,” IEEE Transactions on Microwave Theory and Techniques, vol. 59, no. 11 , November 2011. In these references, both the gate and source are driven in anti-phase and virtually lower the threshold voltage.

[0008] The derivative superposition (DS) technique, as illustrated for example in Martinez et al, “Linearity Performance of Derivative Superposition in GaN HEMTs: A Device-to-Circuit Perspective,” IEEE Transactions on Electron Devices, vol. 70, no. 5, May 2023, focuses on linearizing the transconductance (gm1) profile by employing third-order transconductance (gm3) cancellation via the derivative superposition of multi-transistor devices of varying threshold voltages at the device level (i.e., embedded within a single device footprint), since any reduction in gm3 will directly translate to an improvement in the output third-order intercept point (01 P3).

[0009] An additional improvement to PA performance is to use cancellation of the feedforward path in the active device, i.e. cancellation of the gate-drain parasitic capacitance (also referred to as cgd). To cancel the feedforward path cross coupled neutralization capacitors (Cn) are used, and these capacitors can either be implemented (in CMOS) by nMOS or MOM (metal-oxide-metal) capacitors.

[0010] Instead of using nMOS or MOS capacitors, pMOS devices may be used to improve Amplitude-to-Phase (AM-PM) linearity specifically. pMOS are complementary to nMOS and the input gate-source parasitic capacitance (cgs) changes inversely to how nMOS input capacitance changes. The difference between cgd and Cn dominates the imaginary part of the of vout / vin transfer function in a common source (CS) stage. Using a nMOS device as Cn would increase the cgd-Cn difference, while a pMOS device would limit the difference and limit the AM-PM distortion.

[0011] Another measure to achieve a good linearity is to use harmonic cancellation or suppression at the interstage and output stage matching networks. In Park et al, “Highly Linear CMOS Power Amplifier for mm-Wave Applications,” IEEE MTTS- International Microwave Symposium (IMS), 2017, and Park et al, “A High Efficiency 39GHz CMOS Cascode Power Amplifier for 5G Applications,” IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, pp. 179-182, 2019, a two-step (L-C and C-L) second harmonic termination scheme for CMOS cascode PAs suitable for cm-Wave / mm-Wave frequencies and crosscoupled capacitor neutralization is provided.

[0012] In this disclosure, the term “harmonic reduction” is used to describe reducing harmonic signals in a circuit, including for example harmonic cancellation, in which specific frequencies may be short-circuited to ground, and harmonic suppression, which provides high impedance for specific frequencies in the signal path.

[0013] While the cross-coupled neutralization capacitors referred to above may improve gain and stability, they cause more second harmonics to leak back to the PA input gates which creates distortion. To improve linearity and harmonic cancellation, traps can be placed at the drains of a common-source (CS) stage or in between CS and common-gate (CG) stages, for example in a cascode amplifier. To suppress the additional frequency components, the traps provide a low impedance towards ground for the unwanted signals, as illustrated in the Park et al reference, “A High Efficiency 39GHz CMOS Cascode Power Amplifier for 5G Applications,” referred to above.

[0014] In this reference, two harmonic cancellation / suppression networks are highlighted and both will consume physical space and impact the layout of the circuit, particularly the network based on Lp1 ,2 and Cs1 (capacitors at cm-Wave / mm-Wave, such as Cp1 ,2, are relatively small in size and a single inductance, such as Ls1 , can be routed to from a “distant” location to the connection point of Cp1 ,2). The layout of the interstage matching may separate the CS and CG stages physically and introduce parasitic inductance, which can have an impact on output power, bandwidth, and linearity.

[0015] Summary

[0016] One or more embodiments of this disclosure may have one or more advantages. For example, examples of this disclosure may mitigate problems referred to above regarding output power, bandwidth and / or linearity of amplifiers, such as for example those problems referred to above regarding output power, bandwidth and linearity of a multi-stage or cascode amplifier that includes one or more harmonic reduction circuits.

[0017] One aspect of the present disclosure provides an amplifier comprising a first pair of transistors comprising a first transistor and a second transistor. The amplifier also comprises a first trace connected to a drain of the first transistor, and a second trace connected to a drain of the second transistor. The amplifier also comprises a harmonic reduction first circuit comprising at least one first inductor connected between a first node and a second node. The harmonic reduction first circuit further comprises a third trace connected to the first node, wherein at least part of the third trace is adjacent and substantially parallel to a first at least part of the first trace, and a fourth trace connected to the second node, wherein at least part of the fourth trace is adjacent and substantially parallel to a first at least part of the second trace.

[0018] Other aspects of the present disclosure provide an integrated circuit comprising the amplifier of the above aspect, and an electronic apparatus comprising the amplifier of the above aspect.

[0019] Brief Description of the Drawings For a better understanding of examples of the present disclosure, and to show more clearly how the examples may be carried into effect, reference will now be made, by way of example only, to the following drawings in which:

[0020] Figure 1 is a circuit diagram of an amplifier according to an example of this disclosure;

[0021] Figure 2 is a circuit diagram of another amplifier according to an example of this disclosure;

[0022] Figure 3 is a circuit diagram of another amplifier according to an example of this disclosure;

[0023] Figure 4 is a circuit diagram of another amplifier according to an example of this disclosure;

[0024] Figure 5 is a circuit diagram of another amplifier according to an example of this disclosure;

[0025] Figure 6 is a circuit diagram of another amplifier according to an example of this disclosure;

[0026] Figure 7 illustrates an example of an integrated circuit according to an example of this disclosure; and

[0027] Figure 8 illustrates an example of an electronic apparatus according to an example of this disclosure.

[0028] Detailed Description

[0029] The following sets forth specific details, such as particular embodiments or examples for purposes of explanation and not limitation. It will be appreciated by one skilled in the art that other examples may be employed apart from these specific details.

[0030] Examples of this disclosure provide amplifiers including one or more harmonic reduction circuits. A harmonic reduction circuit may have traces at least part of which may be located adjacent and substantially parallel to at least part of traces in the amplifier, for example to at least partially mitigate negative effects of the traces in the amplifier.

[0031] Examples of this disclosure may provide one or more of the following advantages:

[0032] • Radio Frequency (RF) trace inductance is reduced or eliminated completely (if a perfect coupling factor can be provided) and RF performance can be enhanced. • Harmonic cancellation may be provided by the leakage inductance of secondary inductance or an additional inductance, introduced on purpose, together with a capacitance.

[0033] • Examples of this disclosure may not require any additional space on an integrated circuit (IC) but can be merged with existing RF traces or harmonic cancellation circuitry.

[0034] • The linear output power can be increased almost 1 dB.

[0035] • Harmonic suppression may be provided by two coupled inductors together with one or two capacitances.

[0036] • The harmonic cancellation and harmonic suppression techniques may be based on transformers (i.e. coupling of adjacent inductances) and can be combined to enhance the overall harmonic reduction, both within and between amplifier stages as well as part of load matching networks.

[0037] Examples of this disclosure may effectively create a transformer between parts of a harmonic reduction circuit and RF traces in an amplifier. The transformer may in some examples be routed in two different layers such that the traces have as large as possible coupling factor and the currents may have different directions. When the currents have different signs, the mutual inductance may reduce or cancel the electrical field and apparent inductances in both traces constituting the transformer.

[0038] In some examples, harmonic suppression circuitry can be combined with harmonic cancellation circuitry, i.e. combining a low impedance path together with a high impedance path, enhancing the total reduction of harmonics.

[0039] Figure 1 is a circuit diagram of an amplifier 100 according to an example of this disclosure. The amplifier 100 comprises a first pair of transistors comprising a first transistor 102 and a second transistor 104. The amplifier 100 also comprises a first trace connected to a drain of the first transistor 102, and a second trace connected to a drain of the second transistor 104. The gates of the first transistor 102 and the second transistor 104 may be connected to a bias voltage.

[0040] A harmonic reduction first circuit 110 of the amplifier 100 comprises at least one first inductor connected between a first node 112 and a second node 114. The harmonic reduction first circuit 110 further comprises a third trace connected to the first node 112, and a fourth trace connected to the second node 114. At least part of the third trace 116 is adjacent and substantially parallel to a first at least part of the first trace 118. Similarly, at least part of the fourth trace 120 is adjacent and substantially parallel to a first at least part of the second trace 122.

[0041] The at least parts of the first trace 118, second trace 122, third trace 116 and fourth trace 120 (and other traces and parts of traces) are shown in the Figures as being inductances. However, this does not mean that the traces or parts thereof are necessarily implemented as inductors, but instead to illustrate their inherent inductance, which (at least in the case of the first and second traces, and other traces outside of the harmonic reduction circuits described herein) is generally undesirable. This inductance may arise for example due to the separation of a pair of transistors from other components or nodes, such as for example separation from another pair of transistors or output nodes of an amplifier. The separation may arise in some examples as a result of inclusion of one or more harmonic reduction circuits.

[0042] The aim of having least part of the third trace 116 adjacent and substantially parallel to a first at least part of the first trace 118, and at least part of the fourth trace 120 adjacent and substantially parallel to a first at least part of the second trace 122, is to increase the inductive coupling between the at least part of the third trace 116 and the first at least part of the first trace 118, and between the at least part of the fourth trace 120 and the first at least part of the second trace 122.

[0043] In some examples, at least parts of the first trace 118 and third trace 116 are in different layers of an integrated circuit. For example, the at least part of the third trace 116 is in a different layer of an integrated circuit to the first at least part of the first trace 118, wherein the first at least part of the first trace 118 is positioned over the at least part of the third trace 116 or the at least part of the third trace 116 is positioned over the first at least part of the first trace 118. Similarly, in some examples, at least parts of the second trace 122 and fourth trace 120 are in different layers of an integrated circuit. For example, the at least part of the fourth trace 120 is in a different layer of an integrated circuit to the first at least part of the second trace 122, wherein the first at least part of the second trace 122 is positioned over the at least part of the fourth trace 120 or the at least part of the fourth trace 120 is positioned over the first at least part of the second trace 122. Having parts of traces in different layers of an integrated circuit may allow for example pairs of parts of traces to be closer together than if they are in the same layer, and thus increase the mutual inductance between them (e.g. between at least parts of the first trace 118 and third trace 116, and between at least parts of the second trace 122 and fourth trace 120). For example, the parts of traces may be in adjacent layers, with no other layers in between, though the parts of traces in different layers do not touch, except where they are connected electrically, for example as in the case of the first at least part of the first trace 118 and the at least part of the third trace 116, which are electrically connected at the drain of the transistor 102.

[0044] In some examples, a coupling factor between the first at least part of the first trace 118 and the at least part of the third trace 116 is in the range 0.5-1.0. Similarly, in some examples, a coupling factor between the first at least part of the second trace 122 and the at least part of the fourth trace 120 is in the range 0.5-1.0. Generally, in some examples, it is desirable to achieve a higher coupling factor so as to further reduce the effects of inductance in the first and second traces. Additionally or alternatively, in some examples, an inductance of the first at least part of the first trace 118 is substantially the same as an inductance of the at least part of the third trace 116, and an inductance of the first at least part of the second trace 122 is substantially the same as an inductance of the at least part of the fourth trace 120.

[0045] The first trace may be connected in some examples between the drain of the first transistor 102 and a first output node 154 of the amplifier 100, and second trace may be connected in some examples between the drain of the second transistor 104 and a second output node 156 of the amplifier 100. The output nodes 154 and 156 may thus in some examples provide a differential output signal from the amplifier 100. The output nodes may be connected in some examples to another amplifier, another amplifier stage or another pair of transistors, or alternatively to a load. In some examples, a differential input voltage may be provided to the gates of the first transistor 102 and the second transistor 104, suitably biased for example.

[0046] In the example shown in Figure 1 , the sources of the first transistor 102 and the second transistor 104 are connected to a first reference voltage, such as for example a first power supply voltage, Vss, ground, zero volts or any other suitable reference voltage. However, in other examples, the sources may be connected otherwise, such as for example to outputs of another pair of transistors, another amplifier, or another amplifier stage.

[0047] In some examples, for example as shown in Figure 1, the third trace is connected between the first node 112 and the drain of the first transistor 102, and the fourth trace is connected between the second node 114 and the drain of the second transistor 104. In some examples, the physical directions of at least the parts of the third trace 116 and the fourth trace 120 are chosen relative to the physical directions of at least the parts of the first trace 118 and second trace 122 respectively. For example, a physical direction of the first at least part of the first trace 118 away from the drain of the first transistor 102 is substantially the same physical direction as the physical direction of the at least part of the third trace 116 towards the first node 112. In addition, for example, a physical direction of the first at least part of the second trace 122 away from the drain of the second transistor 104 is substantially the same physical direction as the physical direction of the at least part of the fourth trace 120 towards the second node 114. The physical directions of at least the parts of the third trace 116 and the fourth trace 120 may be chosen for example to ensure that the currents of signals in the at least parts of the third trace 116 and the fourth trace 120 are in a direction to at least partially cancel the effects of inductance in at least the parts of the first trace 118 and second trace 122 respectively.

[0048] Figure 2 is a circuit diagram of another amplifier 200 according to an example of this disclosure. In the example shown in Figure 2, like components are given the same reference numerals as Figure 1 , and the components are generally connected in the same manner. However, in Figure 2, the first trace and the third trace are instead connected (e.g. end to end) between the first node 112 and the drain of the first transistor 102, and the second trace and the fourth trace are connected (e.g. end to end) between the second node 114 and the drain of the second transistor 104. Thus for example the first output node 154 may be a node between the first and third traces, and the second output node 156 may be a node between the first and fourth traces.

[0049] Figure 3 is a circuit diagram of another amplifier 300 according to an example of this disclosure. In the example shown in Figure 3, like components are given the same reference numerals as Figures 1 and 2, and the components are generally connected in the same manner. However, in Figure 3, the third trace is connected between the first node 112 and a first reference voltage (e.g. a first power supply voltage, Vss, ground, zero volts or any other suitable reference voltage), and the fourth trace is connected between the second node (114) and the first reference voltage.

[0050] In each of the example amplifiers 100, 200 and 300, the harmonic reduction first circuit 110 comprises a first inductor 124 and a second inductor 126 connected (e.g. end to end) between the first node 112 and second node 114, and a capacitor 128 connected between the first reference voltage and a node between the first inductor 124 and second inductor 126. However, the harmonic reduction first circuit 110 may be connected in a different manner and / or include other components. For example, the harmonic reduction first circuit 110 may comprise a first inductor and a capacitor connected in series between the first node 112 and the first reference voltage, and a second inductor and a capacitor connected in series between the second node 114 and the first reference voltage. Thus, in some examples, the first inductor and capacitor the second inductor and capacitor may be connected end to end between the first node 112 and the second node 114.

[0051] Figure 4 is a circuit diagram of another amplifier 400 according to an example of this disclosure. In the example shown in Figure 4, like components are given the same reference numerals as Figure 3, and the components are generally connected in the same manner. However, the amplifier 400 of Figure 3 comprises a second pair of transistors comprising a third transistor 106 and a fourth transistor 108. The drain of the first transistor 102 is connected to a source of the third transistor 106 via the first trace, and a drain of the second transistor 104 is connected to a source of the fourth transistor 108 via the second trace. The gates of the third transistor 106 and the fourth transistor 108 may be connected to a bias voltage.

[0052] As shown in Figure 4, the harmonic reduction first circuit 110 is the same as that shown in Figure 3, although in other examples the harmonic reduction first circuit 110 of Figure 4 may be the same as that shown in Figure 1 or 2. In the example shown in Figure 4, the drains of the third transistor 106 and fourth transistor 108 may be connected to the first output node 154 and second output node 156 respectively. The amplifier 400 may therefore in some examples comprise a cascode amplifier, where the first pair of transistors 102 and 104 comprise a common source (CS) stage, and the second pair of transistors 106 and 108 comprise a common gate (CG) stage.

[0053] Figure 5 is a circuit diagram of another amplifier 500 according to an example of this disclosure. In the example shown in Figure 5, like components are given the same reference numerals as Figure 1 , and the components are generally connected in the same manner. The amplifier 500 of Figure 5 comprises a harmonic reduction first circuit 110 that is connected in the same manner as the harmonic reduction first circuit 110 shown in Figure 1 , that is, the third trace is connected between the first node 112 and the drain of the first transistor 102, and the fourth trace is connected between the second node 114 and the drain of the second transistor 104. In other examples, however, the harmonic reduction first circuit 110 may be identical to that shown in Figure 2, i.e. connected in the manner shown in Figure 2. The amplifier 500 additionally comprises a harmonic reduction second circuit 130 comprising at least one inductor connected between a third node 132 and a fourth node 134. The harmonic reduction second circuit 130 further comprises a fifth trace connected between the third node 132 and the first reference voltage, a sixth trace connected between the fourth node 134 and the first reference voltage. At least part of the fifth trace 136 is adjacent and substantially parallel to a second part of the first trace 138, and at least part of the sixth trace 140 is adjacent and substantially parallel to a second part of the second trace 142. The first at least part of the first trace 118 and the second part of the first trace 138 comprise different parts of the first trace, and the first at least part of the second trace 122 and the second part of the second trace 142 comprise different parts of the second trace.

[0054] As shown in Figure 5, the harmonic reduction second circuit 130 comprises a third inductor 144 and a fourth inductor 146 connected between the third node 132 and the fourth node 134, and a capacitor 148 connected between a first reference voltage and a node between the third inductor and the fourth inductor. However, as for the harmonic reduction first circuit 110, other components and / or connections are possible. For example, the harmonic reduction second circuit 130 may alternatively comprise a third inductor and a capacitor connected in series between the third node 132 and the first reference voltage, and a fourth inductor and a capacitor connected in series between the fourth node 134 and the first reference voltage. Thus, in some examples, the third inductor and capacitor the fourth inductor and capacitor may be connected end to end between the third node 132 and the fourth node 134.

[0055] As for the first at least part of the first trace 118, the first at least part of the second trace 122, the at least part of the third trace 116 and the at least part of the fourth trace 120, in some examples, a physical direction of the second part of the first trace 138 away from the drain of the first transistor 102 is substantially the same physical direction as the physical direction of the at least part of the fifth trace 136 towards the third node 132. A physical direction of the second part of the second trace 142 away from the drain of the second transistor 104 may in some examples be substantially the same physical direction as the physical direction of the at least part of the sixth trace 140 towards the fourth node 134. The at least part of the fifth trace 136 may in some examples be in a different layer of an integrated circuit to the second part of the first trace 138, wherein the second part of the first trace 138 is positioned over the at least part of the fifth trace 136 or the at least part of the fifth trace 136 is positioned over the second part of the first trace 138. The at least part of the sixth trace 140 may in some examples be in a different layer of an integrated circuit to the second part of the second trace 142, wherein the second part of the second trace 142 is positioned over the at least part of the sixth trace 140 or the at least part of the sixth trace 140 is positioned over the second part of the second trace 142. A coupling factor between the second part of the first trace 138 and the at least part of the fifth trace 136 may in some examples be in the range 0.5-1.0. A coupling factor between the second part of the second trace 142 and the at least part of the sixth trace 140 may in some examples be in the range 0.5-1.0. In some examples, an inductance of the second part of the first trace 138 is substantially the same as an inductance of the at least part of the fifth trace 136, and an inductance of the second part of the second trace 142 is substantially the same as an inductance of the at least part of the sixth trace 140.

[0056] In some examples, the harmonic reduction first circuit 110 is closer to the first pair of transistors than the harmonic reduction second circuit 130.

[0057] Figure 6 is a circuit diagram of another amplifier 600 according to an example of this disclosure. In the example shown in Figure 6, like components are given the same reference numerals as Figure 5, and the components are generally connected in the same manner. As such, the amplifier 600 includes a first pair of transistors comprising a first transistor 102 and a second transistor 104, a second pair of transistors comprising a third transistor 106 and a fourth transistor 108, harmonic reduction first circuit 110 and harmonic reduction second circuit 130. The harmonic reduction first circuit 110 and harmonic reduction second circuit 130 are the same as those shown in Figure 5, that is, the harmonic reduction first circuit 110 is the same as that shown in Figure 1 and the harmonic reduction second circuit 130 is the same as that shown in Figures 3 and 4. However, in other examples, each of these harmonic reduction circuits may be the same as any of those described herein, e.g. any of those shown in Figures 1 to 3.

[0058] The amplifier 600 includes a harmonic reduction third circuit 158 connected as follows. A seventh trace is connected between a drain of the third transistor 106 and the first output node 154 of the amplifier, and an eighth trace is connected between a drain of the fourth transistor 108 and a second output node 156 of the amplifier. The harmonic reduction third circuit 158 comprises at least one inductor connected between a fifth node 160 and a sixth node 162. The harmonic reduction third circuit 158 further comprises a ninth trace connected to the fifth node 160 and a tenth trace connected to the sixth node 162. At least part of the ninth trace 164 is adjacent and substantially parallel to a first at least part of the seventh trace 166, and at least part of the tenth trace 168 is adjacent and substantially parallel to a first at least part of the eighth trace 170. In the example shown, the harmonic reduction third circuit 158 is identical to the harmonic reduction first circuit 110 shown in Figures 1 , 5 and 6, for example the ninth trace is connected between the fifth node 160 and the drain of the third transistor 106, and the tenth trace is connected between the sixth node 162 and the drain of the fourth transistor 108. In other examples the harmonic reduction third circuit 158 may be identical to the harmonic reduction first circuit 110 shown in Figure 2, and thus for example the ninth trace is connected between the fifth node 160 and the first output node 154, and the tenth trace is connected between the sixth node 162 and the second output node 156. In other examples the harmonic reduction third circuit 158 may be identical to the harmonic reduction first circuit 110 shown in Figure 3 or 4, and thus for example the ninth trace is connected between the fifth node 160 and a first reference voltage, and the tenth trace is connected between the sixth node 162 and the first reference voltage.

[0059] In some examples, a physical direction of the first at least part of the seventh trace 166 from the drain of the third transistor 106 to the first output node 154 is substantially the same physical direction as the physical direction of the at least part of the ninth trace 164 towards the fifth node 160. Similarly, in some examples, a physical direction of the first at least part of the eighth trace 170 from the drain of the second transistor 104 to the source of the fourth transistor 108 is substantially the same physical direction as the physical direction of the at least part of the tenth trace 168 towards the sixth node 162. The at least part of the ninth trace 164 may in some examples be in a different layer of an integrated circuit to the first at least part of the seventh trace 166, wherein the first at least part of the seventh trace 166 is positioned over the at least part of the ninth trace 164 or the at least part of the ninth trace 164 is positioned over the first at least part of the seventh trace 166. The at least part of the tenth trace 168 may in some examples be in a different layer of an integrated circuit to the first at least part of the eighth trace 170, wherein the first at least part of the eighth trace 170 is positioned over the at least part of the tenth trace 168 or the at least part of the tenth trace 168 is positioned over the first at least part of the eighth trace 170. In some examples, a coupling factor between the first at least part of the seventh trace 166 and the at least part of the ninth trace 164 is in the range 0.5-1.0. In some examples, a coupling factor between the first at least part of the eighth trace 170 and the at least part of the tenth trace 168 is in the range 0.5-1.0. An inductance of the first at least part of the seventh trace 166 may for example be substantially the same as an inductance of the at least part of the ninth trace 164. An inductance of the first at least part of the eighth trace 170 may for example be substantially the same as an inductance of the at least part of the tenth trace 168. The harmonic reduction third circuit 158 may in some examples comprises a fifth inductor 172 and a sixth inductor 174 connected between the fifth node 160 and the sixth node 162, and a capacitor 176 connected between a first reference voltage and a node between the fifth inductor and the sixth inductor. In other examples, the harmonic reduction third circuit 158 may comprise a fifth inductor and a capacitor connected in series between the fifth node 160 and a first reference voltage, and a sixth inductor and a capacitor connected in series between the sixth node 162 and the first reference voltage. In other examples, the harmonic reduction third circuit 158 may comprise other connections and / or components.

[0060] The amplifier 600 further comprises a harmonic reduction fourth circuit 178 comprising at least one inductor connected between a seventh node 180 and an eighth node 182.

[0061] The harmonic reduction fourth circuit 178 further comprises an eleventh trace connected between the seventh node 180 and a first reference voltage. At least part of the eleventh trace 184 is adjacent and substantially parallel to a second part of the seventh trace 186. The harmonic reduction fourth circuit 178 further comprises a twelfth trace connected between the eighth node 182 and the first reference voltage. At least part of the twelfth trace 188 is adjacent and substantially parallel to a second part of the eighth trace 190. The first at least part of the seventh trace 166 and the second part of the seventh trace 186 may comprise different parts of the seventh trace. Similarly, the first at least part of the eighth trace 170 and the second part of the eighth trace 190 may comprise different parts of the eighth trace.

[0062] A physical direction of the second part of the seventh trace 186 from the drain of the third transistor 106 to the first output node 154 may in some examples be substantially the same physical direction as the physical direction of the at least part of the eleventh trace 184 towards the seventh node 180. Similarly, a physical direction of the second part of the eighth trace 190 from the drain of the fourth transistor 108 to the second output node 156 may in some examples be substantially the same physical direction as the physical direction of the at least part of the twelfth trace 188 towards the eighth node 182. In some examples, the at least part of the eleventh trace 184 is in a different layer of an integrated circuit to the second part of the seventh trace 186, wherein the second part of the seventh trace 186 is positioned over the at least part of the eleventh trace 184 or the at least part of the eleventh trace 184 is positioned over the second part of the seventh trace 186. In some examples, the at least part of the twelfth trace 188 is in a different layer of an integrated circuit to the second part of the eighth trace 190, wherein the second part of the eighth trace 190 is positioned over the at least part of the twelfth trace 188 or the at least part of the twelfth trace 188 is positioned over the second part of the eighth trace 190. A coupling factor between the second part of the seventh trace 186 and the at least part of the eleventh trace 184 may be for example in the range 0.5-1.0. A coupling factor between the second part of the eighth trace 190 and the at least part of the twelfth trace 188 may be for example in the range 0.5-1.0. An inductance of the second part of the seventh trace 186 may in some examples substantially the same as an inductance of the at least part of the eleventh trace 184; and an inductance of the second part of the eighth trace 190 may be substantially the same as an inductance of the at least part of the twelfth trace 188. In some examples, the harmonic reduction third circuit 158 is closer to the second pair of transistors than the harmonic reduction fourth circuit 178.

[0063] In the example shown in Figure 6, the harmonic reduction fourth circuit 178 comprises a seventh inductor 192 and an eighth inductor 194 connected between the seventh node 180 and the eighth node 182, and a capacitor 196 connected between a first reference voltage and a node between the seventh inductor and the eighth inductor. However, in other examples, the harmonic reduction fourth circuit 178 comprises other connections and / or components. For example, the harmonic reduction fourth circuit 178 may alternatively comprise a seventh inductor and a capacitor connected in series between the seventh node 180 and a first reference voltage, and an eighth inductor and a capacitor connected in series between the eighth node 182 and the first reference voltage.

[0064] The amplifier 600 of Figure 6 is shown with four harmonic reduction circuits. However, an amplifier according to examples of this disclosure may include any one or more of the harmonic reduction first circuit 110, harmonic reduction second circuit 130, harmonic reduction third circuit 158 and / or harmonic reduction fourth circuit 178.

[0065] In the amplifiers described herein, the sources of the first transistor 102 and second transistor 104 are shown as being connected to the first reference voltage. However, in other examples, the sources may instead be connected to another amplifier or amplifier stage. Therefore, in some examples, any of the amplifiers described herein (including any of the amplifiers shown in Figures 1 to 6) may include a third pair of transistors comprising a fifth transistor and a sixth transistor. A source of the fifth transistor and a drain of the sixth transistor may be connected to the first reference voltage. The source of the first transistor 102 may be connected to the drain of the fifth transistor instead of the first reference voltage, and the source of the second transistor 104 may be connected to the drain of the sixth transistor instead of the first reference voltage. In some examples, the sources of the fifth and sixth transistors may be connected to the first reference voltage. A gate of the fifth transistor and a gate of the sixth transistor may in some examples comprise differential voltage input nodes of the amplifier.

[0066] Some examples of this disclosure may include cross-coupled capacitors. For example, an amplifier as disclosed herein may in some examples include a first capacitor connected between the gate of the first transistor 102 and the drain of the second transistor 104, and a second capacitor 152 connected between the gate of the second transistor 104 and the drain of the first transistor 102.

[0067] In examples of this disclosure, NMOS transistors are used for the first, second, third and fourth transistors. However, in other examples, a PMOS transistor may instead be used for each of one or more of these transistors. This also applies to the fifth and sixth transistors referred to above.

[0068] In examples of this disclosure, input voltages comprising a differential input voltage signal may be provided to the gates of the first and second transistors. However, in other examples, current input signals may be provided instead, for example to the drains of the first transistor 102 and second transistor 104. In such examples, a bias voltage may be provided to the gates of the first transistor 102 and second transistor 104, or the first transistor 102 and second transistor 104 may be configured as current sources.

[0069] In some examples, the amplifier according to any of the examples described herein may include or be connected to a load. For example, a load may be connected across output nodes 154 and 156. Therefore, in some examples, a load may be connected across the drains of the first transistor 102 and second transistor 104 via the first and second traces (in the case of the amplifiers 100, 200, 300, 400 and 500 shown in Figures 1-5) or across the drains of the third transistor 106 and fourth transistor 108 via the fifth and sixth traces (in the case of the amplifier 600 shown in Figure 6).

[0070] Figure 7 illustrates an example of an integrated circuit 700 comprising an amplifier 702 according to examples of this disclosure, such as for example the amplifier 100, 200, 300, 400, 500 or 600 shown in Figures 1 to 6. Figure 8 illustrates an example of an electronic apparatus 800 comprising an amplifier 802 according to examples of this disclosure, such as for example the amplifier 100, 200, 300, 400, 500 or 600 shown in Figures 1 to 6. The electronic apparatus may in some examples be a communication apparatus. For example, the communication apparatus may be a wireless communication device for a cellular communications system. Alternatively, for example, the communication apparatus may be a base station for a cellular communications system.

[0071] In the examples described herein, “connected to” may mean connected directly, with no additional components in between, or alternatively may mean connected via one or more additional components not shown in the Figures, such as for example cascode transistors, other transistors, resistors, capacitors, inductors and / or other electronic components.

[0072] It should be noted that the above-mentioned examples illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative examples without departing from the scope of the appended statements. The word “comprising” does not exclude the presence of elements or steps other than those listed in a claim, “a” or “an” does not exclude a plurality, and a single processor or other unit may fulfil the functions of several units recited in the statements below. Where the terms, “first”, “second” etc. are used they are to be understood merely as labels for the convenient identification of a particular feature. In particular, they are not to be interpreted as describing the first or the second feature of a plurality of such features (i.e. , the first or second of such features to occur in time or space) unless explicitly stated otherwise. Steps in the methods disclosed herein may be carried out in any order unless expressly otherwise stated. Any reference signs in the statements shall not be construed so as to limit their scope.

Claims

Claims1. An amplifier (100) comprising:a first pair of transistors comprising a first transistor (102) and a second transistor (104);a first trace connected to a drain of the first transistor (102);a second trace connected to a drain of the second transistor (104);a harmonic reduction first circuit (110) comprising at least one first inductor connected between a first node (112) and a second node (114);wherein the harmonic reduction first circuit (110) further comprises:a third trace connected to the first node (112), wherein at least part of the third trace (116) is adjacent and substantially parallel to a first at least part of the first trace (118); and a fourth trace connected to the second node (114), wherein at least part of the fourth trace (120) is adjacent and substantially parallel to a first at least part of the second trace (122).

2. The amplifier of claim 1 , wherein:the third trace is connected between the first node (112) and the drain of the first transistor (102), and the fourth trace is connected between the second node (114) and the drain of the second transistor (104); orthe first trace and the third trace are connected between the first node (112) and the drain of the first transistor (102), and the second trace and the fourth trace are connected between the second node (114) and the drain of the second transistor (104).

3. The amplifier of claim 1 , wherein:the third trace is connected between the first node (112) and a first reference voltage; andthe fourth trace is connected between the second node (114) and the first reference voltage.

4. The amplifier of any of claims 1 to 3, wherein:a physical direction of the first at least part of the first trace (118) away from the drain of the first transistor (102) is substantially the same physical direction as the physical direction of the at least part of the third trace (116) towards the first node (112); and / or a physical direction of the first at least part of the second trace (122) away from the drain of the second transistor (104) is substantially the same physical direction as the physical direction of the at least part of the fourth trace (120) towards the second node (114).

5. The amplifier of any of claims 1 to 4, wherein:the at least part of the third trace (116) is in a different layer of an integrated circuit to the first at least part of the first trace (118), wherein the first at least part of the first trace (118) is positioned over the at least part of the third trace (116) or the at least part of the third trace (116) is positioned over the first at least part of the first trace (118); and / orthe at least part of the fourth trace (120) is in a different layer of an integrated circuit to the first at least part of the second trace (122), wherein the first at least part of the second trace (122) is positioned over the at least part of the fourth trace (120) or the at least part of the fourth trace (120) is positioned over the first at least part of the second trace (122).

6. The amplifier of any of claims 1 to 5, wherein:a coupling factor between the first at least part of the first trace (118) and the at least art of the third trace (116) is in the range 0.5-1.0; and / ora coupling factor between the first at least part of the second trace (122) and the at least part of the fourth trace (120) is in the range 0.5-1.0.

7. The amplifier of any of claims 1 to 6, wherein the harmonic reduction first circuit (110) comprises:the first inductor (124) and a second inductor (126) connected between the first node (112) and the second node (114), and a capacitor (128) connected between a first reference voltage and a node between the first inductor and the second inductor; orthe first inductor and a capacitor connected in series between the first node (112) and a first reference voltage, and a second inductor and a capacitor connected in series between the second node (114) and the first reference voltage.

8. The amplifier of any of claims 1 to 7, wherein:an inductance of the first at least part of the first trace (118) is substantially the same as an inductance of the at least part of the third trace (116); and / oran inductance of the first at least part of the second trace (122) is substantially the same as an inductance of the at least part of the fourth trace (120).

9. The amplifier of claim 2, or any of claims 4 to 8 when dependent on claim 2, comprising a harmonic reduction second circuit (130) comprising at least one inductor connected between a third node (132) and a fourth node (134);wherein the harmonic reduction second circuit (130) further comprises:19a fifth trace connected between the third node (132) and a first reference voltage, wherein at least part of the fifth trace (136) is adjacent and substantially parallel to a second part of the first trace (138); anda sixth trace connected between the fourth node (134) and the first reference voltage, wherein at least part of the sixth trace (140) is adjacent and substantially parallel to a second part of the second trace (142).

10. The amplifier of claim 9, wherein:the first at least part of the first trace (118) and the second part of the first trace (138) comprise different parts of the first trace; and / orthe first at least part of the second trace (122) and the second part of the second trace (142) comprise different parts of the second trace.

11. The amplifier of claim 9 or 10, wherein:a physical direction of the second part of the first trace (138) away from the drain of the first transistor (102) is substantially the same physical direction as the physical direction of the at least part of the fifth trace (136) towards the third node (132); and / ora physical direction of the second part of the second trace (142) away from the drain of the second transistor (104) is substantially the same physical direction as the physical direction of the at least part of the sixth trace (140) towards the fourth node (134).

12. The amplifier of any of claims 9 to 11 , wherein:the at least part of the fifth trace (136) is in a different layer of an integrated circuit to the second part of the first trace (138), wherein the second part of the first trace (138) is positioned over the at least part of the fifth trace (136) or the at least part of the fifth trace (136) is positioned over the second part of the first trace (138); and / orthe at least part of the sixth trace (140) is in a different layer of an integrated circuit to the second part of the second trace (142), wherein the second part of the second trace (142) is positioned over the at least part of the sixth trace (140) or the at least part of the sixth trace (140) is positioned over the second part of the second trace (142).

13. The amplifier of any of claims 9 to 12, wherein:a coupling factor between the second part of the first trace (138) and the at least part of the fifth trace (136) is in the range 0.5-1.0; and / ora coupling factor between the second part of the second trace (142) and the at least part of the sixth trace (140) is in the range 0.5-1.0.2014. The amplifier of any of claims 9 to 13, wherein the harmonic reduction second circuit (130) comprises:a third inductor (144) and a fourth inductor (146) connected between the third node (132) and the fourth node (134), and a capacitor (148) connected between a first reference voltage and a node between the third inductor and the fourth inductor; ora third inductor and a capacitor connected in series between the third node (132) and a first reference voltage, and a fourth inductor and a capacitor connected in series between the fourth node (134) and the first reference voltage.

15. The amplifier of any of claims 9 to 14, wherein:an inductance of the second part of the first trace (138) is substantially the same as an inductance of the at least part of the fifth trace (136); and / oran inductance of the second part of the second trace (142) is substantially the same as an inductance of the at least part of the sixth trace (140).

16. The amplifier of any of claims 9 to 15, wherein:the harmonic reduction first circuit (110) is closer to the first pair of transistors than the harmonic reduction second circuit (130).

17. The amplifier of any of claims 1 to 16, comprising a load connected between a first load node and a second load node, wherein the first trace is connected between a drain of the third transistor (106) and the first load node, and the second trace is connected between a drain of the fourth transistor (108) and the second load node.

18. The amplifier of any of claims 1 to 17, wherein the first trace is connected between a drain of the first transistor (102) and a first output node of the amplifier, and the second trace is connected between a drain of the second transistor (104) and a second output node of the amplifier.

19. The amplifier of any of claims 1 to 18, further comprising a second pair of transistors comprising a third transistor (106) and a fourth transistor (108), wherein the drain of the first transistor (102) is connected to a source of the third transistor (106) via the first trace, and a drain of the second transistor (104) is connected to a source of the fourth transistor (108) via the second trace.

20. The amplifier of claim 19, comprising a load connected between a drain of the third transistor (106) and a drain of the fourth transistor (108).2121. The amplifier of claim 19 or 20, wherein a drain of the third transistor (106) and a drain of the fourth transistor (108) comprise differential output nodes of the amplifier.

22. The amplifier of any of claims 19 to 21, comprising:a seventh trace connected between a drain of the third transistor (106) and a first output node (154) of the amplifier; andan eighth trace connected between a drain of the fourth transistor (108) and a second output node (156) of the amplifier;a harmonic reduction third circuit (158) comprising at least one inductor connected between a fifth node (160) and a sixth node (162);wherein the harmonic reduction third circuit (158) further comprises:a ninth trace connected to the fifth node (160), wherein at least part of the ninth trace (164) is adjacent and substantially parallel to a first at least part of the seventh trace (166); anda tenth trace connected to the sixth node (162), wherein at least part of the tenth trace (168) is adjacent and substantially parallel to a first at least part of the eighth trace (170).

23. The amplifier of claim 22, wherein:the ninth trace is connected between the fifth node (160) and the drain of the third transistor (106), and the tenth trace is connected between the sixth node (162) and the drain of the fourth transistor (108); orthe ninth trace is connected between the fifth node (160) and the first output node (154), and the tenth trace is connected between the sixth node (162) and the second output node (156).

24. The amplifier of claim 22, wherein:the ninth trace is connected between the fifth node (160) and a first reference voltage; and / orthe tenth trace is connected between the sixth node (162) and the first reference voltage.

25. The amplifier of any of claims 22 to 24, wherein:a physical direction of the first at least part of the seventh trace (166) from the drain of the third transistor (106) to the first output node (154) is substantially the same physical22direction as the physical direction of the at least part of the ninth trace (164) towards the fifth node (160); and / ora physical direction of the first at least part of the eighth trace (170) from the drain of the second transistor (104) to the source of the fourth transistor (108) is substantially the same physical direction as the physical direction of the at least part of the tenth trace (168) towards the sixth node (162).

26. The amplifier of any of claims 22 to 25, wherein:the at least part of the ninth trace (164) is in a different layer of an integrated circuit to the first at least part of the seventh trace (166), wherein the first at least part of the seventh trace (166) is positioned over the at least part of the ninth trace (164) or the at least part of the ninth trace (164) is positioned over the first at least part of the seventh trace (166); and / orthe at least part of the tenth trace (168) is in a different layer of an integrated circuit to the first at least part of the eighth trace (170), wherein the first at least part of the eighth trace (170) is positioned over the at least part of the tenth trace (168) or the at least part of the tenth trace (168) is positioned over the first at least part of the eighth trace (170).

27. The amplifier of any of claims 22 to 26, wherein:a coupling factor between the first at least part of the seventh trace (166) and the at least part of the ninth trace (164) is in the range 0.5-1.0; and / ora coupling factor between the first at least part of the eighth trace (170) and the at least part of the tenth trace (168) is in the range 0.5-1.0.M28. The amplifier of any of claims 22 to 27, wherein the harmonic reduction third circuit (158) comprises:a fifth inductor (172) and a sixth inductor (174) connected between the fifth node (160) and the sixth node (162), and a capacitor (176) connected between a first reference voltage and a node between the fifth inductor and the sixth inductor; ora fifth inductor and a capacitor connected in series between the fifth node (160) and a first reference voltage, and a sixth inductor and a capacitor connected in series between the sixth node (162) and the first reference voltage.

29. The amplifier of any of claims 22 to 28, wherein:an inductance of the first at least part of the seventh trace (166) is substantially the same as an inductance of the at least part of the ninth trace (164); and / or23an inductance of the first at least part of the eighth trace (170) is substantially the same as an inductance of the at least part of the tenth trace (168).

30. The amplifier of claim 23, or any of claims 25 to 29 when dependent on claim 23, comprising a harmonic reduction fourth circuit (178) comprising at least one inductor connected between a seventh node (180) and an eighth node (182);wherein the harmonic reduction fourth circuit (178) further comprises:a eleventh trace connected between the seventh node (180) and a first reference voltage, wherein at least part of the eleventh trace (184) is adjacent and substantially parallel to a second part of the seventh trace (186); anda twelfth trace connected between the eighth node (182) and the first reference voltage, wherein at least part of the twelfth trace (188) is adjacent and substantially parallel to a second part of the eighth trace (190).

31. The amplifier of claim 30, wherein:the first at least part of the seventh trace (166) and the second part of the seventh trace (186) comprise different parts of the seventh trace; and / orthe first at least part of the eighth trace (170) and the second part of the eighth trace (190) comprise different parts of the eighth trace.

32. The amplifier of claim 30 or 31 , wherein:a physical direction of the second part of the seventh trace (186) from the drain of the third transistor (106) to the first output node (154) is substantially the same physical direction as the physical direction of the at least part of the eleventh trace (184) towards the seventh node (180); and / ora physical direction of the second part of the eighth trace (190) from the drain of the fourth transistor (108) to the second output node (156) is substantially the same physical direction as the physical direction of the at least part of the twelfth trace (188) towards the eighth node (182).

33. The amplifier of any of claims 30 to 32, wherein:the at least part of the eleventh trace (184) is in a different layer of an integrated circuit to the second part of the seventh trace (186), wherein the second part of the seventh trace (186) is positioned over the at least part of the eleventh trace (184) or the at least part of the eleventh trace (184) is positioned over the second part of the seventh trace (186); and / or24the at least part of the twelfth trace (188) is in a different layer of an integrated circuit to the second part of the eighth trace (190), wherein the second part of the eighth trace (190) is positioned over the at least part of the twelfth trace (188) or the at least part of the twelfth trace (188) is positioned over the second part of the eighth trace (190).

34. The amplifier of any of claims 30 to 33, wherein:a coupling factor between the second part of the seventh trace (186) and the at least part of the eleventh trace (184) is in the range 0.5-1.0; and / ora coupling factor between the second part of the eighth trace (190) and the at least part of the twelfth trace (188) is in the range 0.5-1.0.

35. The amplifier of any of claims 30 to 34, wherein the harmonic reduction fourth circuit (178) comprises:a seventh inductor (192) and an eighth inductor (194) connected between the seventh node (180) and the eighth node (182), and a capacitor (196) connected between a first reference voltage and a node between the seventh inductor and the eighth inductor; or a seventh inductor and a capacitor connected in series between the seventh node (180) and a first reference voltage, and an eighth inductor and a capacitor connected in series between the eighth node (182) and the first reference voltage.

36. The amplifier of any of claims 30 to 35, wherein:an inductance of the second part of the seventh trace (186) is substantially the same as an inductance of the at least part of the eleventh trace (184); and / oran inductance of the second part of the eighth trace (190) is substantially the same as an inductance of the at least part of the twelfth trace (188).

37. The amplifier of any of claims 30 to 36, wherein:the harmonic reduction third circuit (158) is closer to the second pair of transistors than the harmonic reduction fourth circuit (178).

38. The amplifier of any of claims 1 to 37, wherein a source of the first transistor (102) and a source of the second transistor (104) are connected to a first reference voltage.

39. The amplifier of any of claims 1 to 38, wherein a gate of the first transistor (102) and a gate of the second transistor (104) comprise differential voltage input nodes of the amplifier.2540. The amplifier of any of claims 1 to 37, comprising a third pair of transistors comprising a fifth transistor and a sixth transistor, wherein a source of the fifth transistor and a drain of the sixth transistor are connected to a first reference voltage, a drain of the fifth transistor is connected to a source of the first transistor (102), and a drain of the sixth transistor is connected to a source of the second transistor (104).

41. The amplifier of claim 40, wherein a gate of the fifth transistor and a gate of the sixth transistor comprise differential voltage input nodes of the amplifier.

42. An integrated circuit comprising the amplifier of any one of claims 1 to 41.

43. An electronic apparatus comprising the amplifier of any one of claims 1 to 41.

44. A wireless communication device adapted for use in a cellular communications system comprising the electronic apparatus of claim 43.

45. A base station adapted for use in a cellular communications system comprising the electronic apparatus of claim 43.

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