Photodetection element, and method for producing photodetection element

Abstract

A photodetection element (1) comprises a substrate (2), an insulating layer (3), and a semiconductor layer (4) having a first main surface (4a) and a second main surface (4b). The semiconductor layer (4) has: a first semiconductor region (41); a second semiconductor region (42) that surrounds the first semiconductor region (41); a third semiconductor region (43) that is positioned closer to the second main surface (4b), as compared with the first semiconductor region (41) and the second semiconductor region (42), and that overlaps the first semiconductor region (41); and a fourth semiconductor region (44) that electrically connects the second semiconductor region (42) and the third semiconductor region (43). A hole (46) extending from the first main surface (4a) to reach the third semiconductor region (43) is formed in the semiconductor layer (4). The hole (46) has a truncated quadrangular pyramid shape or a quadrangular pyramid shape. The fourth semiconductor region (44) is formed along the lateral surface of the hole (46).

Description

Photodetector element and method for manufacturing a photodetector element

[0001] This disclosure relates to a photodetector and a method for manufacturing a photodetector.

[0002] Patent Document 1 discloses a photodetector element comprising a substrate in which a support substrate, a first insulating layer, a first semiconductor layer, and a second semiconductor layer are sequentially stacked, as an example of a photodetector element. In this photodetector element, trench grooves are formed in the second semiconductor layer. The trench grooves extend so as to surround the photodetector surface on the surface of the second semiconductor layer. Semiconductor regions are formed on the side walls of the trench grooves for electrically connecting the cathode electrode formed on the second semiconductor layer to the first semiconductor layer.

[0003] Japanese Patent Publication No. 2005-45125

[0004] When forming trench grooves in the semiconductor layer of a photodetector as described above, the trench grooves need to be formed at a certain distance from the outer edge of the photodetector to suppress damage to the photodetector. Furthermore, from the viewpoint of suppressing noise generation, the trench grooves need to be formed at a certain distance from the semiconductor region constituting the photodetector surface. In addition, since the occupancy rate of the trench grooves in the semiconductor layer becomes relatively large, when trench grooves are formed in the semiconductor layer under the above conditions, the layout constraints on the semiconductor region constituting the photodetector surface and electrodes including terminals for external connections become significant. For this reason, it is difficult to improve detection performance while miniaturizing the photodetector.

[0005] The purpose of this disclosure is to provide a photodetector that can improve detection performance while miniaturizing, and a method for manufacturing such a photodetector.

[0006] One aspect of the present disclosure is a photodetector comprising: [1] "a substrate; a first insulating layer formed on the substrate; and a semiconductor layer formed on the first insulating layer, having a first main surface and a second main surface located closer to the first insulating layer than the first main surface, wherein the semiconductor layer has a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type surrounding the first semiconductor region when viewed from the thickness direction of the substrate; a third semiconductor region of a second conductivity type located closer to the second main surface than the first and second semiconductor regions and overlapping with the first semiconductor region in the thickness direction of the substrate; and a fourth semiconductor region of a second conductivity type electrically connecting the second semiconductor region and the third semiconductor region, wherein a hole is formed in the semiconductor layer extending from the first main surface to the third semiconductor region, the hole has a truncated square pyramidal shape or a square pyramidal shape that widens from the third semiconductor region toward the first main surface, and the fourth semiconductor region is formed along the side surface of the hole."

[0007] In the above-described photodetector, a hole is formed in the semiconductor layer extending from the first main surface to the third semiconductor region. For example, compared to the case where a trench groove is formed in the semiconductor layer so as to surround the first semiconductor region when viewed from the thickness direction of the substrate, the hole can be formed smaller (the occupancy rate in the semiconductor layer can be kept low). This makes it possible to miniaturize the photodetector. Furthermore, since the degree of freedom in the layout of each component of the photodetector, such as the first semiconductor region and electrodes, is improved, it is possible to enlarge the photodetector region (light incident aperture) and reduce electrical resistance in the photodetector, thereby improving detection performance. Moreover, in the above-described photodetector, the hole has a truncated square pyramidal shape or a square pyramidal shape that widens from the third semiconductor region toward the first main surface, and the fourth semiconductor region is formed along the side surface of the hole. As a result, the side surface of the hole is inclined with respect to the first main surface so as to be exposed from the opening of the hole in the first main surface (located inside the opening when viewed from the thickness direction of the substrate). Therefore, the fourth semiconductor region can be formed stably and uniformly on the side surface of the hole. For similar reasons, when various layers such as insulating layers, passivation layers, and light-shielding layers are formed inside the hole, these layers can be formed stably and uniformly on the side surface of the hole. Furthermore, compared to the case where a vertical hole or trench groove is formed with a side surface extending perpendicular to the first main surface, a larger area of ​​the side surface of the hole can be secured, allowing the fourth semiconductor region to be formed over a wider area. As a result, the connection resistance between the second semiconductor region and the third semiconductor region is reduced, and high-speed response can be improved. Therefore, the above-described photodetector element can be miniaturized while improving detection performance.

[0008] One aspect of the present disclosure is a photodetector, which may be [2] "the photodetector described in [1] above, wherein the fourth semiconductor region is formed over the entire surface." In this case, the connection resistance between the second semiconductor region and the third semiconductor region is further reduced, and the high-speed response can be further improved.

[0009] One aspect of the present disclosure is a photodetector according to [1] or [2] above, wherein the semiconductor layer has a plurality of fourth semiconductor regions, each of which is the fourth semiconductor region, and the semiconductor layer has a plurality of holes, each of which is the hole, and each of the plurality of fourth semiconductor regions is formed along the side surface of the corresponding hole among the plurality of holes. In this case, the connection resistance between the second semiconductor region and the third semiconductor region is further reduced, and the high-speed response can be further improved.

[0010] One aspect of the present disclosure is a photodetector element described in [4] "the photodetector element described in [3] above, wherein the plurality of fourth semiconductor regions include a pair of fourth semiconductor regions, and the pair of fourth semiconductor regions are arranged to sandwich the first semiconductor region when viewed from the thickness direction of the substrate." In this case, even if the first semiconductor region is enlarged, the in-plane bias of the bias voltage applied to the semiconductor layer can be reduced.

[0011] One aspect of the present disclosure of the photodetector element may be [5] "a photodetector element according to any one of [1] to [4] above, further comprising a second insulating layer covering the side surface, wherein the surface of the second insulating layer opposite to the side surface is recessed toward the substrate inside the hole." In this case, since it is not necessary to fill the inside of the hole with the material of the second insulating layer, the manufacturing cost and manufacturing time of the photodetector element can be reduced.

[0012] One aspect of the present disclosure is a photodetector element, [6] "The second insulating layer is SiO ２The photodetector may be the one described in [5] above, having a first layer formed by and a second layer formed of SiN on the first layer, wherein each of the first and second layers includes a portion formed on the first main surface, an opening is formed in the portion of the first layer formed on the first main surface, and at least a part of the portion of the second layer formed on the first main surface is located within the opening. In this case, since the first and second layers are formed inside the hole, the filling rate of the hole is improved, and the strength of the photodetector can be improved. Furthermore, an opening is formed in the portion of the first layer formed on the first main surface, and at least a part of the portion of the second layer formed of SiN formed on the first main surface is located within the opening. This allows light to be detected to be efficiently incident into the semiconductor layer through the opening in the first layer, and the detection sensitivity of the photodetector can be improved.

[0013] One aspect of the present disclosure is a photodetector according to [7] "a photodetector according to [5] or [6], further comprising a light-shielding layer covering the surface, wherein the surface of the light-shielding layer opposite to the second insulating layer is recessed toward the substrate within the hole." In this case, the light-shielding layer can suppress stray light from entering the semiconductor layer, thereby reducing the generation of noise carriers caused by the incidence of stray light.

[0014] One aspect of the present disclosure is a photodetector element, which may be [8] "a photodetector element according to any one of [1] to [7] above, wherein the thickness of the first insulating layer is 200 nm or more and 500 nm or less." In this case, for example, the substrate is Si and the first insulating layer is SiO ２ By forming a semiconductor layer with Si and utilizing the etalon effect, light in the wavelength range of approximately 800 nm to 900 nm can be reflected at the interface between the first insulating layer and the substrate, and at the interface between the first insulating layer and the semiconductor layer. Therefore, if the light to be detected has a wavelength in the above wavelength range, even if the light to be detected passes through the semiconductor layer without being photoelectrically converted, the light can be reflected at the interface and re-entered into the semiconductor layer. This improves the detection sensitivity of the photodetector.

[0015] One aspect of the present disclosure is a photodetector element, which may be described in [9] "the photodetector element according to any one of [1] to [8] above, wherein the substrate is a semiconductor substrate of the second conductivity type." In this case, the polarity of the third semiconductor region and the polarity of the substrate match, which prevents the first insulating layer from forming a capacitor.

[0016] One aspect of the present disclosure is a photodetector element, which may be

[10] "a photodetector element according to any one of [1] to [9] above, wherein the resistivity of the semiconductor layer is 300 Ω·cm or more and 2000 Ω·cm or less, and the thickness of the semiconductor layer is 5 μm or more and 30 μm or less." In this case, the resistivity and thickness of the semiconductor layer can be set to an appropriate size, and the high-speed response of the photodetector element can be further improved.

[0017] One aspect of the present disclosure is a photodetector, which may be

[11] "a photodetector according to any one of [1] to

[10] above, wherein the angle between the side surface and the second main surface is 60 degrees or less." In this case, the fourth semiconductor region can be formed more stably and uniformly on the side surface of the hole. In addition, various layers such as an insulating layer, a passivation layer, and a light-shielding layer can be formed more stably and uniformly on the side surface of the hole.

[0018] One aspect of the present disclosure is a photodetector element, which may be

[12] "a photodetector element according to any one of [1] to

[11] above, wherein the entire first semiconductor region overlaps with the third semiconductor region in the thickness direction of the substrate." In this case, charge carriers generated in the semiconductor layer can be efficiently extracted through the first semiconductor region and the third semiconductor region.

[0019] One aspect of the present disclosure is a photodetector according to any one of [1] to

[12] above, further comprising an electrode physically connected to the second semiconductor region and electrically connected to the fourth semiconductor region, wherein the electrode includes a terminal portion, and when the semiconductor layer is divided into four regions by two mutually orthogonal lines at the center of the first semiconductor region when viewed from the thickness direction of the substrate, the portion of the electrode physically connected to the second semiconductor region, the fourth semiconductor region, and the terminal portion are located within the same region among the four regions. In this case, when the photodetector is electrically connected to the outside by connecting wiring such as bonding wires to the terminal portion, the connection resistance between the wiring and the third semiconductor region is reduced, and the photodetection characteristics of the photodetector can be stabilized.

[0020] One aspect of the present disclosure of a method for manufacturing a photodetector is

[14] "A method for manufacturing a photodetector according to any one of [1] to

[13] above, comprising the steps of: forming the holes by wet etching in a layer corresponding to the semiconductor layer on which the second semiconductor region and the third semiconductor region are formed; and forming the fourth semiconductor region by doping the side surface of the holes with impurities." In this case, the holes can be stably formed by wet etching. Therefore, the fourth semiconductor region that electrically connects the second semiconductor region and the third semiconductor region can be appropriately formed on the side surface of the holes, and the detection performance of the photodetector can be improved.

[0021] This disclosure makes it possible to provide a photodetector that can be miniaturized while improving detection performance, and a method for manufacturing such a photodetector.

[0022] Figure 1 is a cross-sectional view of a photodetector according to an embodiment. Figure 2 is a cross-sectional view of a photodetector according to an embodiment. Figure 3 is a plan view of the photodetector shown in Figure 1. Figure 4 is an enlarged cross-sectional view of the photodetector shown in Figure 1. Figure 5 is an enlarged view of the region enclosed by the dashed line A shown in Figure 3. Figure 6 is a diagram illustrating a method for manufacturing a photodetector according to an embodiment. Figure 7 is a diagram illustrating a method for manufacturing a photodetector according to an embodiment. Figure 8 is a diagram illustrating a method for manufacturing a photodetector according to an embodiment. Figure 9 is a diagram illustrating a method for manufacturing a photodetector according to an embodiment.

[0023] An example of this disclosure will be described in detail below with reference to the drawings. In each drawing, the same or corresponding parts are denoted by the same reference numerals, and redundant explanations are omitted. [Configuration and Operation of the Photodetector]

[0024] The configuration of the photodetector 1 according to this embodiment will be described with reference to Figures 1, 2, and 3. Figures 1 and 2 are cross-sectional views of the photodetector 1 according to this embodiment. In Figure 2, for the sake of explanation, the shapes of each component of the photodetector 1 are simplified compared to the cross-sectional view in Figure 1, and the dimensional relationships of each component are also modified from those of an actual photodetector. Figure 3 is a plan view of the photodetector 1 shown in Figure 1.

[0025] The photodetector element 1 is a semiconductor element that detects incident light as an electric current signal. The photodetector element 1 comprises a substrate 2, an insulating layer (first insulating layer) 3, a semiconductor layer 4, an insulating layer (second insulating layer) 5, an electrode (light-shielding layer) 6, and an electrode 7. In the following description, the thickness direction of the substrate 2 is referred to as the Z-axis direction, one direction perpendicular to the Z-axis direction is referred to as the X-axis direction, and the direction perpendicular to both the Z-axis direction and the X-axis direction is referred to as the Y-axis direction.

[0026] The substrate 2 is a support substrate for supporting the semiconductor layer 4. In this example, the substrate 2 is formed in the shape of a rectangular plate. The substrate 2 has a main surface 2a and a main surface 2b. The main surfaces 2a and 2b extend perpendicularly in the Z-axis direction. The main surface 2b is located on the opposite side from the main surface 2a. In this example, no electrodes are placed on the main surface 2b. In this example, the substrate 2 is made of Si. The substrate 2 is a second-conductivity type (N-type in this example) semiconductor substrate doped with impurities. The resistivity of the substrate 2 is, for example, 0.01 Ω·cm or more and 0.02 Ω·cm or less. The thickness of the substrate 2 is, for example, about 625 μm.

[0027] The insulating layer 3 is formed on the substrate 2. The insulating layer 3 is formed directly on the main surface 2a of the substrate 2. In this example, the insulating layer 3 is SiO ２ This is a BOX layer (embedded oxide layer) formed by [the specified method]. In this example, the thickness of the insulating layer 3 is between 200 nm and 500 nm. Here, the thickness of the insulating layer 3 is the average value of the thickness of the insulating layer 3.

[0028] The semiconductor layer 4 is formed on the insulating layer 3. The semiconductor layer 4 is positioned on the main surface 2a of the substrate 2 via the insulating layer 3. The semiconductor layer 4 has a main surface (first main surface) 4a and a main surface (second main surface) 4b. The main surfaces 4a and 4b extend perpendicularly in the Z-axis direction. The main surface 4b is the surface opposite to the main surface 4a and is located closer to the insulating layer 3 than the main surface 4a. The main surface 4b is in contact with the insulating layer 3. In this example, the semiconductor layer 4 is made of Si.

[0029] The semiconductor layer 4 has a semiconductor region (first semiconductor region) 41, a semiconductor region (second semiconductor region) 42, a semiconductor region (third semiconductor region) 43, and a plurality of semiconductor regions (a plurality of fourth semiconductor regions) 44. In this example, the resistivity of the semiconductor layer 4 is 300 Ω·cm or more and 2000 Ω·cm or less. In this example, the thickness of the semiconductor layer 4 is 5 μm or more and 30 μm or less. Here, the thickness of the semiconductor layer 4 is the average value of the thickness of the semiconductor layer 4.

[0030] The semiconductor region 41 is a semiconductor region doped with impurities and has a first conductivity type (P-type in this example). The first and second conductivity types are different from each other. The semiconductor region 41 is formed in the region of the semiconductor layer 4 on the main surface 4a side and constitutes a part of the main surface 4a. When viewed from the Z-axis direction, the semiconductor region 41 is formed in the center of the semiconductor layer 4.

[0031] The semiconductor region 42 is a semiconductor region doped with impurities and has a second conductivity type. The semiconductor region 42 is formed in the region of the semiconductor layer 4 on the main surface 4a side and constitutes a part of the main surface 4a. When viewed from the Z-axis direction, the semiconductor region 42 surrounds the semiconductor region 41. That is, when viewed from the Z-axis direction, the semiconductor region 42 is located outside the semiconductor region 41. The semiconductor region 42 is formed in a continuous ring shape.

[0032] The semiconductor region 43 is a semiconductor region doped with impurities and has a second conductivity type. The semiconductor region 43 is formed in the region of the semiconductor layer 4 on the main surface 4b side and constitutes the main surface 4b. The semiconductor region 43 is located closer to the main surface 4b than semiconductor regions 41 and 42. The semiconductor region 43 overlaps with semiconductor regions 41 and 42 in the Z-axis direction. In this example, the entirety of semiconductor region 41 and the entirety of semiconductor region 42 overlap with semiconductor region 43 in the Z-axis direction.

[0033] The multiple semiconductor regions 44 are impurity-doped semiconductor regions and have a second conductivity type. Each semiconductor region 44 is electrically connected to semiconductor region 42 and semiconductor region 43. Each semiconductor region 44 is physically continuous with semiconductor region 42 and semiconductor region 43, respectively. As a result, semiconductor region 42, semiconductor region 43, and the multiple semiconductor regions 44 constitute a continuous semiconductor region of the second conductivity type.

[0034] Each of the multiple semiconductor regions 44 is formed along the side surface 47 of the corresponding hole 46 among the multiple holes 46 formed in the semiconductor layer 4. The holes 46 will now be described with reference to Figures 4 and 5. In Figure 5, for the sake of explanation, the diagrams of components other than the semiconductor layer 4 are omitted.

[0035] Each hole 46 is formed to extend from the main surface 4a of the semiconductor layer 4 to the semiconductor region 43. In this example, each hole 46 opens on the main surface 4a and extends from the semiconductor region 42 to the semiconductor region 43. The hole 46 also opens on the main surface 4b. That is, the hole 46 is a through hole that penetrates the semiconductor layer 4 (semiconductor region 42 and semiconductor region 43) in the Z-axis direction. The hole 46 has a truncated square pyramid shape that widens as it moves from the semiconductor region 43 toward the main surface 4a. In this example, the shape of the hole 46 is a truncated square pyramid having a virtual lower base surface defined by the opening of the hole 46 on the main surface 4a (with the opening as the outer edge) and a virtual upper base surface defined by the opening of the hole 46 on the main surface 4b. The size of the inner edge of the hole 46 (cross section perpendicular to the Z-axis direction) increases as it moves from the main surface 4b toward the main surface 4a. In a cross-sectional view perpendicular to the Z-axis direction, the inner edge of the hole 46 has a rectangular shape.

[0036] The side surface 47 of the hole 46 is a surface corresponding to the side surface of a truncated square pyramid. In this example, the side surface 47 is a smooth slope inclined with respect to the Z-axis direction. The side surface 47 is a tapered surface whose shape in a cross-sectional view perpendicular to the Z-axis direction decreases as it moves from the main surface 4a toward the main surface 4b (semiconductor region 43). As shown in Figure 5, the side surface 47 contains four regions 47a, 47b, 47c, and 47d. Each of the regions 47a, 47b, 47c, and 47d has a trapezoidal shape that widens as it moves from the main surface 4b toward the main surface 4a. Each of the regions 47a and 47c extends along the X-axis direction. The ends of each region 47a and 47c in the X-axis direction are connected to the ends of the corresponding region 47b and 47d in the Y-axis direction. The regions 47a and 47c face each other in the Y-axis direction and are inclined with respect to the Z-axis direction so as they move away from each other as they move from the main surface 4b toward the main surface 4a.

[0037] Regions 47b and 47d each extend along the Y-axis direction. The Y-axis ends of each region 47b and 47d are connected to the X-axis ends of the corresponding regions 47a and 47c. Regions 47b and 47d face each other in the X-axis direction and are inclined with respect to the Z-axis direction so that they move away from each other as they move from the main surface 4b toward the main surface 4a. The width of the holes 46 on the main surface 4a (width along the X-axis direction and width along the Y-axis direction) is, for example, about 100 μm. The width of the holes 46 on the main surface 4b (width along the X-axis direction and width along the Y-axis direction) is, for example, about 55 μm. As shown in Figure 4, the side surface 47 of the holes 46 and the main surface 4b of the semiconductor layer 4 form an angle θ. In this example, the angle θ is 60 degrees or less. In other words, each region 47a, 47b, 47c, and 47d intersects the main surface 4b at an angle of 60 degrees or less.

[0038] Each semiconductor region 44 is formed along the side surface 47 of the corresponding hole 46. When viewed from the Z-axis direction, the semiconductor region 44 is formed in an annular shape surrounding the hole 46. The semiconductor region 44 is formed over the entire side surface 47. The semiconductor region 44 constitutes the side surface 47. That is, the surface of the semiconductor region 44 facing the internal space of the hole 46 corresponds to the side surface 47 of the hole 46.

[0039] In Figure 3, hatching is applied to the areas where the holes 46 and semiconductor regions 44 are formed. As shown in Figure 3, multiple (four in this example) holes 46 are formed in the semiconductor layer 4, and a semiconductor region 44 is formed on the side surface 47 of each hole 46. That is, the semiconductor layer 4 has multiple (four in this example) semiconductor regions 44.

[0040] The plurality of semiconductor regions 44 includes a pair of semiconductor regions 44A and 44C and a pair of semiconductor regions 44B and 44D. The pair of semiconductor regions 44A and 44C are arranged so as to sandwich the semiconductor region 41 when viewed from the Z-axis direction. "The pair of semiconductor regions 44 are arranged so as to sandwich the semiconductor region 41" means that at least a part of the semiconductor region 41 is arranged on the line segment connecting one semiconductor region 44 and the other semiconductor region 44. Similarly, the pair of semiconductor regions 44B and 44D are arranged so as to sandwich the semiconductor region 41 when viewed from the Z-axis direction.

[0041] When viewed from the Z-axis direction, the plurality of semiconductor regions 44 are arranged on the region surrounding the semiconductor region 41. In this example, when the semiconductor layer 4 is divided into four regions R1, R2, R3, and R4 by two straight lines L1 and L2 perpendicular to each other at the center C of the semiconductor region 41 when viewed from the Z-axis direction, one corresponding semiconductor region 44 is formed in each of the regions R1, R2, R3, and R4. The semiconductor region 44A is formed in the region R1, the semiconductor region 44B is formed in the region R2, the semiconductor region 44C is formed in the region R3, and the semiconductor region 44D is formed in the region R4. At least one or more semiconductor regions 44 and hole portions 46 are formed in all the regions R1, R2, R3, and R4.

[0042] The insulating layer 5 covers the side surface 47 of the hole portion 46. In this example, the insulating layer 5 is formed along the side surface 47 so as to cover the entire side surface 47. The insulating layer 5 has a surface 5a on the side opposite to the side surface 47. The surface 5a is recessed toward the substrate 2 inside the hole portion 46. That is, there is a space inside the hole portion 46 where the insulating layer 5 is not formed.

[0043] The insulating layer 5 has a first layer 51 and a second layer 52. The first layer 51 is an oxide film formed by SiO ２ As shown in FIG. 2, the first layer 51 includes a film 511 formed on the main surface 4a and a film 512 formed from the side surface 47 of the hole portion 46 across the main surface 4a of the semiconductor layer 4. Each of the film 511 and the film 512 is formed by SiO ２ ​

[0044] The first layer 51 is formed directly on the side surface 47 and the main surface 4a. More specifically, on the main surface 4a, the films 511 and 512 of the first layer 51 are formed directly. The film 512 is formed directly in the region on the main surface 4a where the film 511 is not formed, and is formed indirectly through the film 511 in the region where the film 511 is formed. On the side surface 47, the film 511 is not formed, and the film 512 is formed directly. The first layer 51 includes a portion 51b formed on the main surface 4a. An opening 51c is formed in the portion 51b. The opening 51c is formed at a position overlapping the semiconductor region 41 in the Z-axis direction.

[0045] The second layer 52 is a nitride film formed of SiN. The second layer 52 may function as, for example, a passivation layer. The second layer 52 is laminated on the first layer 51. The second layer 52 is formed from the side surface 47 of the hole portion 46 to the main surface 4a of the semiconductor layer 4. The second layer 52 includes a portion 52b formed on the main surface 4a. A part of the portion 52b is located within the opening 51c of the first layer 51 and is formed directly on the main surface 4a (semiconductor region 41). The portion of the second layer 52 located outside the opening 51c is formed indirectly on the side surface 47 and the main surface 4a through the first layer 51. The second layer 52 has a surface 52a on the side opposite to the side surface 47. The surface 52a constitutes the surface 5a of the insulating layer 5. That is, the surface 52a is recessed toward the substrate 2 inside the hole portion 46.

[0046] The electrode 6 covers the surface 5a of the insulating layer 5. The electrode 6 is made of, for example, aluminum. The electrode 6 also functions as a light-shielding film, suppressing stray light from entering the interior of the semiconductor layer 4. "Having light-shielding properties" means that the light transmittance to light having a wavelength similar to the light to be detected is 5% or less. The electrode 6 is formed along the side surface 47 so as to cover the entire side surface 47. In this example, the electrode 6 has a surface 6a opposite to the side surface 47. The surface 6a is recessed towards the substrate 2 inside the hole 46. That is, there is a space inside the hole 46 where the electrode 6 is not formed. The surface 6a is exposed to the space formed inside the hole 46.

[0047] Electrode 6 is formed extending from the side surface 47 of the hole 46 to the main surface 4a of the semiconductor layer 4. Electrode 6 is indirectly formed on the side surface 47 and the main surface 4a via the insulating layer 5. Electrode 6 includes a portion 6b formed on the main surface 4a. An opening 6c is formed in portion 6b. As shown in Figure 3, when viewed from the Z-axis direction, electrode 6 surrounds the semiconductor region 41. In Figure 3, for ease of explanation, electrodes 6 and 7 are hatched. When viewed from the Z-axis direction, the inner edge of the opening 6c is located outside the outer edge 41e of the semiconductor region 41.

[0048] When viewed from the Z-axis direction, the outer edge 5e of the insulating layer 5 is located inside the outer edge 4e of the semiconductor layer 4. As a result, the region 4f along the outer edge 4e on the main surface 4a is exposed from the insulating layer 5. The outer edge portion 6e of the electrode 6 is physically and electrically connected to the semiconductor region 42 of the semiconductor layer 4 in region 4f. The outer edge portion 6e constitutes the physical connection portion (contact point) with the semiconductor region 42. In this example, the outer edge portion 6e extends in an annular shape along the outer edge of the electrode 6 when viewed from the Z-axis direction, and is physically connected to the semiconductor region 42 around its entire circumference. Therefore, the physical connection portion (outer edge portion 6e) of the electrode 6 with the semiconductor region 42 is located in each of regions R1 to R4.

[0049] The electrode 6 has a terminal portion 61. The terminal portion 61 is a part for external connection. That is, the terminal portion 61 functions as a terminal for electrically connecting the photodetector 1 to external equipment, etc., and wiring such as bonding wires is connected to it. In this example, the terminal portion 61 is composed of a part of the portion 6b of the electrode 6. The terminal portion 61 is located within region R3. As described above, the physical connection portion of the electrode 6 with the semiconductor region 42 (the outer edge portion 6e) is also located in region R3. Therefore, the physical connection portion of the electrode 6 with the semiconductor region 42 (the portion of the outer edge portion 6e located in region R3), the terminal portion 61, and the semiconductor region 44C are all located within the same region R3.

[0050] The electrode 7 is formed on the main surface 4a of the semiconductor layer 4. The electrode 7 is made of, for example, aluminum. As shown in Figure 3, the electrode 7 includes a main body portion 71 and a terminal portion 72. The main body portion 71 is formed in an annular shape (circular in this example) when viewed from the Z-axis direction. The main body portion 71 extends along the outer edge 41e of the semiconductor region 41 when viewed from the Z-axis direction. The main body portion 71 is in contact with the semiconductor region 41 of the semiconductor layer 4 through through holes formed in the portion 51b of the first layer 51 and the portion 51b of the second layer 52. Thus, the electrode 7 is physically and electrically connected to the semiconductor region 41.

[0051] The terminal portion 72 is a part for external connection and is formed integrally with the main body portion 71. The terminal portion 72 functions as a terminal for electrically connecting the photodetector element 1 to external equipment, and wiring such as bonding wires is connected to it. When viewed from the Z-axis direction, the terminal portion 72 is formed outside the main body portion 71 so as to protrude from the main body portion 71. The terminal portion 72 is located within region R4. That is, the terminal portion 72 and the semiconductor region 44D are located within the same region R4.

[0052] The operation of the photodetector 1 described above will now be explained. First, with a reverse bias voltage applied to the semiconductor layer 4, the light to be detected is incident on the photodetector 1. The light passes inside the main body 71 of the annularly formed electrode 7 and enters the interior of the semiconductor layer 4. That is, when viewed from the Z-axis direction, the region inside the electrode 7 of the photodetector 1 corresponds to the light incident region. The incident light generates charge carriers (holes and electrons) in the semiconductor layer 4. The generated charge carriers are output to the outside as current signals via electrodes 6 and 7. Specifically, the generated holes move to the semiconductor region 41 and are extracted to the outside via electrode 7 (anode electrode) connected to the semiconductor region 41. In contrast, the generated charges first move to the semiconductor region 43. The semiconductor region 43 is electrically connected to the semiconductor region 42 via a plurality of semiconductor regions 44. As a result, the charges move in this order within the semiconductor region 43, semiconductor region 44, and semiconductor region 42, and are extracted to the outside via electrode 6 (cathode electrode) electrically connected to the semiconductor region 42. [Method for manufacturing a photodetector]

[0053] Next, the manufacturing method of the photodetector 1 will be explained with reference to Figures 6 to 9. First, as shown in Figure 6, a laminate is prepared in which a substrate 2, an insulating layer 3, and a semiconductor layer 40 are stacked in this order. The semiconductor layer 40 is the layer that becomes the semiconductor layer 4 through the manufacturing process of the photodetector 1 (the layer corresponding to the semiconductor layer 4). The semiconductor layer 40 has a main surface 40a and a main surface 40b. The main surface 40a is the surface of the semiconductor layer 40 opposite to the substrate 2, and the main surface 40b is the surface of the semiconductor layer 40 on the substrate 2 side. The main surface 40a is located on the opposite side of the main surface 40b in the Z-axis direction. The main surface 40a is the surface that becomes the main surface 4a through the manufacturing process of the photodetector 1, and the main surface 40b is the surface that becomes the main surface 4b. A semiconductor region 43 is formed in the region of the semiconductor layer 40 on the main surface 40b side.

[0054] Next, as shown in Figure 7, semiconductor regions 41 and 42 are formed by doping the region of the semiconductor layer 40 on the main surface 40a side with impurities. When viewed from the Z-axis direction, semiconductor region 41 is formed in the center of the semiconductor layer 40, and semiconductor region 42 is formed so as to surround semiconductor region 41. Next, a first layer 51 (films 511 and 512) is formed on the main surface 40a of the semiconductor layer 40. At this time, film 511 is formed in the region of the main surface 40a other than the region where semiconductor region 41 is formed. Next, film 512 is formed over the entire main surface 40a.

[0055] Next, as shown in Figure 8, a plurality of holes 46 are formed in the semiconductor layer 40 on which the semiconductor regions 42 and 43 are formed by wet etching. Specifically, first, the portion of the first layer 51 that overlaps with the area where the holes 46 are to be formed in the semiconductor layer 40 in the Z-axis direction is removed by etching, exposing the area where the holes are to be formed.

[0056] Next, multiple holes 46 are formed in the semiconductor layer 40 by wet etching from the main surface 40a side on the portion of the semiconductor layer 40 where the multiple holes 46 are to be formed. Each hole 46 is formed to have a truncated square pyramidal shape that widens from the semiconductor region 43 toward the main surface 40a. A semiconductor layer 40 having a predetermined surface orientation may be used so that the shape of the holes 46 is a truncated square pyramidal shape. Each hole 46 is formed so as to extend from the main surface 40a (semiconductor region 42) of the semiconductor layer 40 to the semiconductor region 43.

[0057] Next, as shown in Figure 9, multiple semiconductor regions 44 are formed by doping impurities into the side surfaces 47 of the multiple holes 46. Each semiconductor region 44 is formed over the entire corresponding side surface 47 so as to electrically connect semiconductor region 42 and semiconductor region 43. This gives rise to a semiconductor layer 4. Subsequently, a film 512 of the first layer 51 is formed on the side surfaces 47 of the holes 46, and then a second layer 52 is formed on the first layer 51. This gives rise to an insulating layer 5.

[0058] Next, electrodes 6 and 7 are formed as shown in Figure 2. When forming electrode 6, the outer edges of the first layer 51 and the second layer 52 are removed so that, when viewed from the Z-axis direction, the region 4f along the outer edge 4e of the main surface 4a is exposed. By bringing the outer edge portion 6e of electrode 6 into contact with the region 4f of the semiconductor layer 4, electrode 6 is physically and electrically connected to the semiconductor region 42. When forming electrode 7, through holes are formed in the portion 51b of the first layer 51 and the portion 52b of the second layer 52, respectively. By bringing electrode 7 into contact with the semiconductor region 41 of the semiconductor layer 4, electrode 7 is physically and electrically connected to the semiconductor region 41. Through these steps, the photodetector element 1 is obtained. [Operation and Effects]

[0059] In the photodetector 1, a hole 46 is formed in the semiconductor layer 4, extending from the main surface 4a of the semiconductor layer 4 to the semiconductor region 43. For example, compared to forming a trench groove in the semiconductor layer 4 that extends to surround the semiconductor region 41 when viewed from the Z-axis direction, the hole 46 can be formed smaller (the occupancy rate in the semiconductor layer 4 can be kept low). This makes it possible to miniaturize the photodetector 1. In addition, the degree of freedom in the layout of each component of the photodetector 1, such as the semiconductor region 41 and electrodes 6 and 7, is improved, which makes it possible to enlarge the photodetector region (light incident aperture) and reduce electrical resistance in the photodetector 1. More specifically, as an example, by making the inner edges of the semiconductor region 41 and electrode 7 larger, the photodetector region (light incident aperture) in the photodetector 1 can be enlarged. As another example, by providing a terminal portion 61 near the physical connection portion of electrode 6 with the semiconductor region 42, the electrical resistance between the wiring connected to the terminal portion 61 and the semiconductor layer 4 can be reduced. This makes it possible to improve the detection performance of the photodetector 1. Furthermore, in the photodetector element 1, the hole 46 has a truncated square pyramidal shape that widens from the semiconductor region 43 toward the main surface 4a, and the semiconductor region 44 is formed along the side surface 47 of the hole 46. As a result, the side surface 47 of the hole 46 is inclined with respect to the main surface 4a so as to be exposed from the opening of the hole 46 on the main surface 4a (so as to be located inside the opening when viewed from the Z-axis direction). Therefore, the semiconductor region 44 can be formed stably and uniformly on the side surface 47 of the hole 46. For the same reason, when various layers such as the first layer 51, the second layer 52, and the electrode 6 (light-shielding layer) are formed inside the hole 46, these layers can be formed stably and uniformly on the side surface 47 of the hole 46. Furthermore, compared to the case where a vertical hole or trench groove with a side surface extending perpendicular to the main surface 4a is formed, a larger area of ​​the side surface 47 of the hole 46 can be secured, so the semiconductor region 44 can be formed over a wider area. This reduces the connection resistance between semiconductor region 42 and semiconductor region 43, thereby improving high-speed response.For example, assuming that a frustoconical hole is formed with a maximum diameter equal to the maximum width (width on the main surface 4a) of the frustoconical hole 46, the area of ​​the side surface 47 of the hole 46 will be larger than that of the side surface of the frustoconical hole. Therefore, a wider area can be secured on the side surface of the hole 46 where the semiconductor region 44 can be formed with a smaller occupied area. Thus, the photodetector element 1 can improve detection performance while achieving miniaturization.

[0060] The semiconductor region 44 is formed across the entire side surface 47 of the hole 46. This further reduces the connection resistance between the semiconductor region 42 and the semiconductor region 43, thereby improving high-speed response.

[0061] The semiconductor layer 4 has a plurality of semiconductor regions 44. The semiconductor layer 4 has a plurality of holes 46 formed therein. Each of the plurality of semiconductor regions 44 is formed along the side surface 47 of the corresponding hole 46 among the plurality of holes 46. This further reduces the connection resistance between the semiconductor region 42 and the semiconductor region 43, and further improves the high-speed response.

[0062] The multiple semiconductor regions 44 include a pair of semiconductor regions 44A, 44C and a pair of semiconductor regions 44B, 44D. The pair of semiconductor regions 44A, 44C are arranged to sandwich the semiconductor region 41 when viewed from the Z-axis direction. The pair of semiconductor regions 44B, 44D are also arranged to sandwich the semiconductor region 41 when viewed from the Z-axis direction. This makes it possible to reduce the in-plane bias of the bias voltage applied to the semiconductor layer 4, even when the semiconductor region 41 is enlarged.

[0063] The photodetector 1 is equipped with an insulating layer 5 that covers the side surface 47 of the hole 46. The surface 5a of the insulating layer 5 is recessed toward the substrate 2 inside the hole 46. As a result, it is not necessary to fill the inside of the hole 46 with the material of the insulating layer 5, which reduces the manufacturing cost and shortens the manufacturing time of the photodetector 1.

[0064] The insulating layer 5 is SiO ２The photodetector 1 has a first layer 51 formed by [material name missing] and a second layer 52 formed of SiN on the first layer 51. As a result, the first layer 51 and the second layer 52 are formed inside the hole 46, improving the filling rate of the hole 46 and improving the strength of the photodetector 1. The first layer 51 includes a portion 51b formed on the main surface 4a, and the second layer 52 includes a portion 52b formed on the main surface 4a. An opening 51c is formed in the portion 51b. A part of the portion 52b is located within the opening 51c. As a result, the light to be detected can be efficiently incident into the semiconductor layer 4 through the opening 51c of the first layer 51, improving the detection sensitivity of the photodetector 1. Generally, the refractive index difference between SiN, the material of the second layer 52, and Si, the material of the semiconductor layer 4, is [value missing]. ２ This becomes smaller than the refractive index difference with Si, the material of the semiconductor layer 4. Therefore, by positioning the portion 52b of the second layer 52, which is made of SiN, within the aperture 51c, reflection of light on the main surface 4a of the light incident on the semiconductor layer 4 through the aperture 51c is suppressed, and light can be efficiently incident into the semiconductor layer 4.

[0065] The photodetector 1 is equipped with an electrode 6 (light-shielding layer) that covers the surface 5a of the insulating layer 5. The surface 6a of the electrode 6 is recessed toward the substrate 2 within the hole 46. This allows the electrode 6 to suppress stray light from entering the semiconductor layer 4, thereby reducing the generation of noise carriers caused by the incidence of stray light.

[0066] The thickness of the insulating layer 3 is between 200 nm and 500 nm. This allows the substrate 2 to be made of Si and the insulating layer 3 to be made of SiO ２ By forming the semiconductor layer 4 with Si and utilizing the etalon effect, light in the wavelength range of approximately 800 nm to 900 nm can be reflected at the interface between the insulating layer 3 and the substrate 2, and at the interface between the insulating layer 3 and the semiconductor layer 4. Therefore, if the light to be detected has a wavelength in the above wavelength range, even if the light to be detected passes through the semiconductor layer 4 without being photoelectrically converted, the light can be reflected at the interface and re-entered into the semiconductor layer 4. This improves the detection sensitivity of the photodetector element 1.

[0067] The substrate 2 is a second-conductivity semiconductor substrate. As a result, the polarity of the semiconductor region 43 and the polarity of the substrate 2 match, which prevents the insulating layer 3 from forming a capacitor.

[0068] The resistivity of the semiconductor layer 4 is between 300 Ω·cm and 2000 Ω·cm, and the thickness of the semiconductor layer 4 is between 5 μm and 30 μm. This allows the resistivity and thickness of the semiconductor layer 4 to be set to an appropriate size, further improving the high-speed response of the photodetector element 1.

[0069] The angle θ between the side surface 47 of the hole 46 and the main surface 4b of the semiconductor layer 4 is 60 degrees or less. This allows for the more stable and uniform formation of the semiconductor region 44 on the side surface 47 of the hole 46. Furthermore, various layers such as the first layer 51, the second layer 52, and the electrode 6 (light-shielding layer) can be formed more stably and uniformly on the side surface 47 of the hole 46.

[0070] In the Z-axis direction, the entire semiconductor region 41 overlaps with the semiconductor region 43. This allows charge carriers generated within the semiconductor layer 4 to be efficiently extracted through the semiconductor regions 41 and 43.

[0071] The photodetector 1 includes an electrode 6 that is physically connected to a semiconductor region 42 and electrically connected to a semiconductor region 44. The electrode 6 includes a terminal portion 61. When the semiconductor layer 4 is divided into four regions R1, R2, R3, and R4 by two mutually orthogonal lines L1 and L2 at the center C of the semiconductor region 41 when viewed from the Z-axis direction, the portion of the electrode 6 that is physically connected to the semiconductor region 42, the semiconductor region 44C, and the terminal portion 61 are located within the same region R3. As a result, when wiring such as bonding wires is connected to the terminal portion 61 and the photodetector 1 is electrically connected to the outside, the connection resistance between the wiring and the semiconductor region 43 is reduced, and the photodetection characteristics of the photodetector 1 can be stabilized.

[0072] The manufacturing method for the photodetector 1 includes the steps of forming holes 46 by wet etching in a semiconductor layer 40 on which semiconductor regions 42 and 43 are formed, and forming semiconductor regions 44 by doping impurities on the side surfaces 47 of the holes 46. This allows for the stable formation of holes 46 by wet etching. As a result, semiconductor regions 44 that electrically connect semiconductor regions 42 and 43 can be appropriately formed on the side surfaces 47 of the holes 46, thereby improving the detection performance of the photodetector 1.

[0073] This disclosure is not limited to the embodiments described above. Modifications of the embodiments described above are described below. The following description will primarily focus on the differences from the embodiments described above, and may omit explanations of commonalities.

[0074] The shape of the hole 46 may be a square pyramidal shape that widens as it moves from the semiconductor region 43 toward the main surface 4a. In this case, each of the regions 47a, 47b, 47c, and 47d of the side surface 47 may have a triangular shape that widens as it moves from the main surface 4b toward the main surface 4a. The hole 46 only needs to extend from the main surface 4a of the semiconductor layer 4 to the semiconductor region 43, and does not need to be open on the main surface 4b. That is, the hole 46 does not need to penetrate the semiconductor region 43, and may be a bottomed hole with a bottom surface within the semiconductor region 43. The hole 46 does not need to extend to the semiconductor region 42. That is, when viewed from the Z-axis direction, the hole 46 may be formed away from the semiconductor region 42. For example, when viewed from the Z-axis direction, the hole 46 may be formed such that its outer edge is spaced apart from the inner edge of the semiconductor region 42 (inside the semiconductor region 42). In this case, semiconductor region 44 and semiconductor region 42 may be electrically connected to each other via metal wiring or the like. That is, the electrical connection of semiconductor region 44 to semiconductor region 42 and semiconductor region 43 is not limited to a configuration in which semiconductor region 42 and semiconductor region 43 are connected only via semiconductor region 44, but also includes a configuration in which semiconductor region 42 and semiconductor region 43 are connected via semiconductor region 44 and other components (for example, metal wiring).

[0075] The semiconductor region 44 only needs to electrically connect the semiconductor region 42 and the semiconductor region 43, and does not have to be formed over the entire side surface 47. The angle θ formed by the side surface 47 and the main surface 4b of the semiconductor layer 4 may be greater than 60 degrees. The number of holes 46 formed in the semiconductor layer 4 may be one or more and is not limited.

[0076] The first layer 51 may be formed of a material other than SiO ２ . The second layer 52 may be formed of a material other than SiN. The thickness of the insulating layer 3 may be less than 200 nm or may be greater than 500 nm. The substrate 2 may be a semiconductor substrate of the first conductivity type.

[0077] The resistivity of the semiconductor layer 4 may be less than 300 Ω·cm or may be greater than 2000 Ω·cm. The thickness of the semiconductor layer 4 may be less than 5 μm or may be greater than 30 μm.

[0078] Among the electrodes 6, the physical connection portion with the semiconductor region 42, the semiconductor region 44, and the terminal portion 61 may be located in different regions among the four regions R1, R2, R3, and R4. For example, the terminal portion 61 does not have to be located in the same region as the semiconductor region 44 among the four regions R1, R2, R3, and R4. That is, the semiconductor region 44 does not have to be formed in the region where the terminal portion 61 is located. Also, the physical connection portion of the electrode 6 with the semiconductor region 42 does not have to be located in the same region as the semiconductor region 44 among the four regions R1, R2, R3, and R4. That is, the semiconductor region 44 does not have to be formed in the region where the physical connection portion of the electrode 6 with the semiconductor region 42 is located. The electrode 7 does not have to have the terminal portion 72. In this case, wiring for external connection or the like may be connected to the main body portion 71.

[0079] The first conductivity type and the second conductivity type may have conductivity types opposite to each other. That is, the first conductivity type may be N-type and the second conductivity type may be P-type. In the manufacturing process of the photodetector 1, the holes 46 may be formed by a method other than wet etching (for example, dry etching).

[0080] 1...Photodetector element, 2...Substrate, 3...Insulating layer (first insulating layer), 4...Semiconductor layer, 4a...Main surface (first main surface), 4b...Main surface (second main surface), R1, R2, R3, R4...Regions, 5...Insulating layer (second insulating layer), 5a, 6a...Surface, 6...Electrode (light-shielding layer), 51b, 52b...Part, 51c...Opening, 7...Electrode, 40...Semiconductor layer (Layer corresponding to semiconductor layer 4), 41...Semiconductor region (first semiconductor region), 42...Semiconductor region (second semiconductor region), 43...Semiconductor region (third semiconductor region), 44, 44A, 44B, 44C, 44D...Semiconductor region (fourth semiconductor region), 46...Hole, 47...Side, 51...First layer, 52...Second layer, 72...Terminal part, C...Center, L1, L2...Linear, θ...Angle.

Claims

1. A photodetector comprising: a substrate; a first insulating layer formed on the substrate; and a semiconductor layer formed on the first insulating layer, having a first main surface and a second main surface located closer to the first insulating layer than the first main surface, wherein the semiconductor layer has: a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type surrounding the first semiconductor region when viewed from the thickness direction of the substrate; a third semiconductor region of a second conductivity type located closer to the second main surface than the first and second semiconductor regions and overlapping with the first semiconductor region in the thickness direction of the substrate; and a fourth semiconductor region of a second conductivity type electrically connecting the second semiconductor region and the third semiconductor region, wherein a hole is formed in the semiconductor layer extending from the first main surface to the third semiconductor region, the hole has a truncated square pyramidal shape or a square pyramidal shape that widens from the third semiconductor region toward the first main surface, and the fourth semiconductor region is formed along the side surface of the hole.

2. The photodetector element according to claim 1, wherein the fourth semiconductor region is formed over the entire surface.

3. The photodetector element according to claim 1 or 2, wherein the semiconductor layer has a plurality of fourth semiconductor regions, each of which is the fourth semiconductor region, and the semiconductor layer has a plurality of holes, each of which is the hole, and each of the plurality of fourth semiconductor regions is formed along the side surface of a corresponding hole among the plurality of holes.

4. The photodetector element according to claim 3, wherein the plurality of fourth semiconductor regions include a pair of fourth semiconductor regions, and the pair of fourth semiconductor regions are arranged to sandwich the first semiconductor region when viewed from the thickness direction of the substrate.

5. The photodetector according to any one of claims 1 to 4, further comprising a second insulating layer covering the side surface, wherein the surface of the second insulating layer opposite to the side surface is recessed toward the substrate within the hole.

6. The second insulating layer is SiO ２ The photodetector according to claim 5, comprising a first layer formed by and a second layer formed of SiN on the first layer, wherein each of the first and second layers includes a portion formed on the first main surface, an opening is formed in the portion of the first layer formed on the first main surface, and at least a portion of the portion of the second layer formed on the first main surface is located within the opening.

7. The photodetector according to claim 5 or 6, further comprising a light-shielding layer covering the surface, wherein the surface of the light-shielding layer opposite to the second insulating layer is recessed toward the substrate within the hole.

8. The photodetector element according to any one of claims 1 to 7, wherein the thickness of the first insulating layer is 200 nm or more and 500 nm or less.

9. The photodetector element according to any one of claims 1 to 8, wherein the substrate is the second conductive semiconductor substrate.

10. The photodetector according to any one of claims 1 to 9, wherein the resistivity of the semiconductor layer is 300 Ω·cm or more and 2000 Ω·cm or less, and the thickness of the semiconductor layer is 5 μm or more and 30 μm or less.

11. The photodetector according to any one of claims 1 to 10, wherein the angle between the side surface and the second main surface is 60 degrees or less.

12. The photodetector according to any one of claims 1 to 11, wherein the entire first semiconductor region overlaps with the third semiconductor region in the thickness direction of the substrate.

13. The photodetector according to any one of claims 1 to 12, further comprising an electrode that is physically connected to the second semiconductor region and electrically connected to the fourth semiconductor region, wherein the electrode includes a terminal portion, and when the semiconductor layer is divided into four regions by two mutually orthogonal lines at the center of the first semiconductor region when viewed from the thickness direction of the substrate, the portion of the electrode that is physically connected to the second semiconductor region, the fourth semiconductor region, and the terminal portion are located within the same region among the four regions.

14. A method for manufacturing a photodetector according to any one of claims 1 to 13, comprising the steps of: forming the holes by wet etching in a layer corresponding to the semiconductor layer on which the second semiconductor region and the third semiconductor region are formed; and forming the fourth semiconductor region by doping the side surface of the holes with impurities.

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