Light detection device

Abstract

[PROBLEM] To provide a light detection device with which it is possible to reduce the thickness of said device even if a bonding pad is provided on the light receiving surface side of a semiconductor layer. [SOLUTION] A light detection device according to an embodiment of the present invention comprises: a semiconductor layer including a first surface serving as a light receiving surface and a second surface located opposite the first surface; a light receiving unit disposed on the first surface side of the semiconductor layer and including a plurality of photoelectric conversion units that photoelectrically convert incident light; a first wiring layer disposed on the first surface side; a second wiring layer disposed on the second surface side; a through electrode that penetrates the semiconductor layer and that electrically connects the first wiring layer and the second wiring layer; a pad at least a section of which is embedded in the semiconductor layer on the first surface side and which is electrically connected to the first wiring layer, the second wiring layer, and the through electrode; and a first insulating film which is disposed on the first surface side and which causes a section of a surface of the pad to be exposed.

Description

Optical detection device

[0001] The present disclosure relates to an optical detection device.

[0002] An optical detection device such as a back-illuminated CIS (CMOS (Complementary Metal Oxide Semiconductor) Image Sensor) may have bonding pads on the light-receiving surface (back surface) side of the semiconductor layer. The bonding pads are electrically connected to wiring or semiconductor elements formed on the front surface side of the semiconductor layer through through vias formed in the semiconductor layer.

[0003] Japanese Patent Application Laid-Open No. 2020-080363

[0004] The above bonding pads are provided on an interlayer insulating film provided on the back surface of the semiconductor layer, which has hindered the thinning of the overall thickness of the optical detection device.

[0005] Therefore, even if bonding pads are provided on the light-receiving surface side of the semiconductor layer, an optical detection device capable of thinning the device thickness is provided.

[0006] The optical detection device according to one aspect of the present disclosure includes a semiconductor layer including a first surface serving as a light-receiving surface and a second surface on the opposite side of the first surface, a light-receiving portion provided on the first surface side of the semiconductor layer and having a plurality of photoelectric conversion portions that photoelectrically convert incident light, a first wiring layer provided on the first surface side, a second wiring layer provided on the second surface side, a through electrode that penetrates the semiconductor layer and electrically connects between the first wiring layer and the second wiring layer, a pad at least partially embedded in the semiconductor layer on the first surface side and electrically connected to the first wiring layer, the second wiring layer, and the through electrode, and a first insulating film provided on the first surface side and exposing a part of the surface of the pad.

[0007] The bottom surface of the first wiring layer is at a position that is the same as or higher than the surface of the pad at the height from the first surface of the semiconductor layer.

[0008] The optical detection device further includes a first contact provided between the first wiring layer and the pad and electrically connecting the first wiring layer and the pad.

[0009] The photodetector further includes a second contact provided between the first wiring layer and the through electrode, which electrically connects the first wiring layer and the through electrode.

[0010] The photodetector further includes a spacer provided between the through-electrode and the semiconductor layer to electrically isolate the through-electrode and the semiconductor layer.

[0011] The top surface of the through-electrode or the bottom surface of the second contact is at the same height as or higher than the surface of the pad in relation to the first surface of the semiconductor layer.

[0012] The diameter of the bottom surface of the second contact is less than or equal to the diameter of the top surface of the through electrode.

[0013] When viewed from a direction perpendicular to the first surface, the first wiring layer overlaps with the pads.

[0014] The first wiring layer and pads are electrically isolated from the semiconductor layer.

[0015] The light detection device further comprises a first lens provided above the light-receiving section on the first surface of the semiconductor layer, a color filter provided between the light-receiving section and the first lens, and a second lens provided between the light-receiving section and the color filter.

[0016] The light detection device is provided on the first surface of the semiconductor layer around the light-receiving section, is smaller than the semiconductor layer, and further comprises at least one semiconductor chip.

[0017] A second semiconductor chip bonded to a second insulating film on the second surface side of a semiconductor layer, the second semiconductor chip comprising: a second semiconductor layer; a first logic circuit provided on the third surface of the second semiconductor layer; a third insulating film covering the first logic circuit on the third surface and bonded to the second insulating film; and a third wiring layer provided within the third insulating film and electrically connected to the second wiring layer.

[0018] A third semiconductor chip bonded to a fourth insulating film provided on the fourth surface of a second semiconductor layer located on the opposite side of the third surface, the third semiconductor chip comprising: a third semiconductor layer; a second logic circuit provided on the fifth surface of the third semiconductor layer; a fifth insulating film covering the second logic circuit on the fifth surface and bonded to the fourth insulating film; and a fifth wiring layer provided within the fifth insulating film and electrically connected to a fourth wiring layer provided within the fourth insulating film.

[0019] The second semiconductor chip is smaller than the first semiconductor chip, which includes the semiconductor layer.

[0020] The third semiconductor chip is smaller than the first semiconductor chip, which includes the semiconductor layer.

[0021] The third semiconductor chip is smaller than the second semiconductor chip.

[0022] A plan view showing an example configuration of a photodetector according to the first embodiment. A cross-sectional view showing an example configuration of a photodetector according to the first embodiment. A cross-sectional view showing the configuration of a photodetector according to a comparative example. A cross-sectional view showing an example configuration of a photodetector according to the second embodiment. A cross-sectional view showing an example configuration of a photodetector according to the third embodiment. A cross-sectional view showing an example configuration of a photodetector according to the fourth embodiment. A cross-sectional view showing an example configuration of a photodetector according to the fifth embodiment. A cross-sectional view showing an example configuration combining the fifth embodiment and the second embodiment. A cross-sectional view showing an example configuration combining the fifth embodiment and the third embodiment. A cross-sectional view showing an example configuration combining the fifth embodiment and the fourth embodiment. A cross-sectional view showing an example configuration of a photodetector according to the sixth embodiment. A cross-sectional view showing an example configuration of a photodetector according to the seventh embodiment. A cross-sectional view showing an example configuration of a photodetector according to the eighth embodiment. A cross-sectional view showing an example configuration of a photodetector according to the ninth embodiment. A cross-sectional view showing an example configuration of a photodetector according to the tenth embodiment. A cross-sectional view showing an example of the manufacturing method according to the first embodiment. A cross-sectional view showing the manufacturing method, following Figure 16. A cross-sectional view showing the manufacturing method, following Figure 17. A cross-sectional view showing the manufacturing method, following Figure 18. A cross-sectional view showing the manufacturing method, following Figure 19. A cross-sectional view showing the manufacturing method, following Figure 20. A cross-sectional view showing the manufacturing method, following Figure 21. A cross-sectional view showing the manufacturing method, following Figure 22. A cross-sectional view showing an example of the configuration of a modified optical detection device. A block diagram showing an example of the general configuration of a vehicle control system. An explanatory diagram showing an example of the installation position of the external information detection unit and the imaging unit.

[0023] The following describes specific embodiments of this technology with reference to the drawings. The drawings are schematic or conceptual, and the proportions of each part may not necessarily be the same as those of actual objects. In the specification and drawings, elements similar to those described above are denoted by the same reference numerals with respect to previously shown drawings, and detailed explanations are omitted as appropriate.

[0024] (First Embodiment) Figure 1 is a plan view showing an example of the configuration of a light detection device according to the first embodiment. Figure 2 is a cross-sectional view showing an example of the configuration of a light detection device according to the first embodiment. Figure 2 shows a cross-section along the line A-A in Figure 1.

[0025] The light detection device 1 is, for example, a back-illuminated CIS. The light detection device 1 captures an image by, for example, receiving light from a subject, converting it into photoelectric light, and generating an image signal. The light detection device 1 may be a device (see Figure 5) in which a circuit chip containing various signal processing circuits for signal processing is flip-chip mounted on the same semiconductor layer as the light receiving unit. Alternatively, the light detection device 1 may be a stacked device constructed by bonding a sensor chip containing a light receiving unit and a circuit chip together and connecting them via wiring (Cu-Cu junction).

[0026] The photodetector 1 comprises a semiconductor layer 10, interlayer insulating films 20 and 70, a light-shielding portion 30, a color filter 40, an on-chip lens 60, a support substrate 80, a first wiring layer INC1, a second wiring layer INC2, a through-electrode TSV, a first via contact V1, a second via contact V2, a bonding pad PAD, and a spacer 90.

[0027] (Configuration of pixel region Rpx) The semiconductor layer 10 includes a first surface F1 which is a light-receiving surface and a second surface F2 which is opposite to the first surface F1. The semiconductor layer 10 is made of silicon, for example. The Z direction is the thickness direction of the semiconductor layer 10 (perpendicular to the first and second surfaces F1 and F2). The X direction is an in-plane direction perpendicular to the Z direction. The Y direction is a direction perpendicular to the Z and X directions.

[0028] As shown in Figure 1, the light-receiving unit 2 is provided with a plurality of pixels PX arranged in a matrix. As shown in Figure 2, each pixel PX is composed of an on-chip lens 60, a color filter 40, a photoelectric conversion unit PD, and a pixel circuit 11, etc. The light-receiving unit 2 is provided in the pixel region Rpx on the first surface (back surface) F1 side of the semiconductor layer 10.

[0029] Multiple photoelectric conversion units (photodiodes) PD are provided within the semiconductor layer 10 for each pixel PX. Each photoelectric conversion unit PD is composed of, for example, a pn junction photodiode consisting of an n-type semiconductor layer and a p-type semiconductor layer provided in the semiconductor layer 10. The photoelectric conversion unit PD converts incident light into signal charge (pixel signal).

[0030] The pixel circuit 11 is provided on the second surface (front) F2 of the semiconductor layer 10. The pixel circuit 11 includes a charge storage unit (floating diffusion) that stores signal charge generated by the photoelectric conversion unit PD, a transfer transistor that transfers signal charge to the charge storage unit, an amplifying transistor that amplifies the signal charge, a selection transistor that outputs the amplified pixel signal to the outside of the pixel PX, a reset transistor that discards the charge of the photoelectric conversion unit PD, and the like. These transistors are made up of, for example, MOSEFTs (Metal Oxide Semiconductor Field Effect Transistors). Although the pixel circuit 11 is shown collectively in Figure 2, it is provided for each pixel PX. In some cases, one pixel circuit 11 may be shared by multiple pixel PXs.

[0031] The light-shielding portion 30 is provided on the first surface F1 of the semiconductor layer 10. The light-shielding portion 30 is provided between adjacent pixels PX and blocks light from other pixels PX. The light-shielding portion 30 is made of a light-shielding material such as tungsten.

[0032] The interlayer insulating film 20 is provided on the first surface F1 of the semiconductor layer 10 and covers the light-shielding portion 30. The interlayer insulating film 20 is made of a transparent insulating material such as a silicon oxide film.

[0033] The color filter 40 is provided on the interlayer insulating film 20 on the first surface F1 side of the semiconductor layer 10. The color filter 40 is provided between the photoelectric conversion unit PD and the on-chip lens 60. The color filter 40 selectively transmits light of different wavelength ranges to the photoelectric conversion unit PD for each pixel PX. The color filter 40 is made of a material such as resin.

[0034] The on-chip lens 60 is provided on the interlayer insulating film 20 above the photoelectric conversion unit PD (+Z direction) and covers the color filter 40. The on-chip lens 60 is made of, for example, transparent resin. The on-chip lens 60 focuses light for each pixel PX.

[0035] The interlayer insulating film 70 covers the second surface F2 of the semiconductor layer 10 and the pixel circuit 11. The interlayer insulating film 70 is made of an insulating material such as a silicon oxide film.

[0036] Although not shown in the diagram, a multilayer wiring layer connected to the pixel circuit 11 is formed within the interlayer insulating film 70. The multilayer wiring layer is connected to the multilayer wiring layer on the pad region Rpad side as needed.

[0037] (Configuration of pad region Rpad) The light detection device 1 according to the first embodiment includes a pad region Rpad around the pixel region Rpx. The pad region Rpad is provided on the same support substrate 80 as the pixel region Rpx, and the semiconductor layer 10 is also shared with the pixel PX.

[0038] In the pad region Rpad, the first wiring layer INC1 is provided on the first surface F1 side of the semiconductor layer 10. The first wiring layer INC1 is provided above (in the +Z direction) the first surface F1 of the semiconductor layer 10 and is electrically insulated from the semiconductor layer 10 by the interlayer insulating film 20. The first wiring layer INC1 is made of a conductive material such as copper or tungsten.

[0039] The second wiring layer INC2 is provided on the second surface F2 side of the semiconductor layer 10. The second wiring layer INC2 is provided below the second surface F2 of the semiconductor layer 10 (in the -Z direction) and is electrically insulated from the semiconductor layer 10 by the interlayer insulating film 70. The second wiring layer INC2 is made of a conductive material such as copper or tungsten. The second wiring layer INC2 is part of the multilayer wiring layer provided within the interlayer insulating film 70 on the second surface F2 side of the semiconductor layer 10. The second wiring layer INC2 may be electrically connected to the multilayer wiring layer or pixel circuit 11 on the pixel region Rpx side.

[0040] The through-electrode TSV penetrates the semiconductor layer 10 in the Z direction and electrically connects the first wiring layer INC1 and the second wiring layer INC2. The through-electrode TSV is made of a conductive material such as copper or tungsten. The through-electrode TSV is provided in a hole (Htsv2 in Figure 18) that penetrates the semiconductor layer 10 in the Z direction. Within the hole (Htsv2), a spacer 90 is provided between the through-electrode TSV and the semiconductor layer 10. The spacer 90 is made of an insulating material such as a silicon oxide film and electrically isolates the through-electrode TSV from the semiconductor layer 10. Therefore, the through-electrode TSV is electrically insulated from the semiconductor layer 10.

[0041] The first via contact V1 is provided between the first wiring layer INC1 and the bonding pad PAD, and electrically connects the first wiring layer INC1 and the bonding pad PAD. The first via contact V1 is made of a conductive material such as copper or tungsten.

[0042] The second via contact V2 is provided between the first wiring layer INC1 and the through electrode TSV, and electrically connects the first wiring layer INC1 and the through electrode TSV. The second via contact V2 is made of a conductive material such as copper or tungsten.

[0043] The bonding pad PAD is embedded in the semiconductor layer 10. The bonding pad PAD has a part of its surface exposed on the first surface F1 side. A bonding wire BW is bonded to a part of the exposed surface of the bonding pad PAD. The bonding pad PAD is electrically connected to the first wiring layer INC1, the second wiring layer INC2, and the through electrode TSV via the first and second via contacts V1 and V2. Also, a spacer 90 is provided between the bonding pad PAD and the semiconductor layer 10, and the spacer 90 electrically separates the bonding pad PAD and the semiconductor layer 10. Therefore, the bonding pad PAD is electrically connected to the first wiring layer INC1, the through electrode TSV, and the second wiring layer INC2 while being electrically insulated from the semiconductor layer 10. The bonding pad PAD is made of a conductive material such as aluminum, copper, tungsten, etc. Also, a barrier film (e.g., titanium, titanium nitride, tantalum, tantalum nitride) may be provided around the bonding pad PAD.

[0044] Since the bonding pad PAD is embedded in the semiconductor layer 10, the bottom surface Finc1 of the first wiring layer INC1 on the first surface F1 of the semiconductor layer 10 is at a position higher than the surface Fpad1 of the bonding pad PAD at the height from the first surface F1 of the semiconductor layer 10. Similarly, the upper surfaces of the first and second via contacts V1 and V2 that contact the bottom surface Finc1 of the first wiring layer INC1 are also at positions higher than the surface Fpad1 of the bonding pad PAD.

[0045] Also, the upper surface Ftsv1 of the through electrode TSV is at a position higher than the surface Fpad1 of the bonding pad PAD at the height from the first surface F1 of the semiconductor layer 10. Similarly, the bottom surface of the second via contact V2 that contacts the upper surface Ftsv1 of the through electrode TSV is also at a position higher than the surface Fpad1 of the bonding pad PAD.

[0046] The interlayer insulating film 20 and the spacer 90 provided on the first surface F1 of the semiconductor layer 10 are removed at a part of the surface Fpad1 of the bonding pad PAD, and a part of the surface Fpad1 of the bonding pad PAD is exposed. A bonding wire BW is bonded to a part of the exposed surface Fpad1 of the bonding pad PAD.

[0047] An interlayer insulating film 70 is provided on the second surface F2 side of the semiconductor layer 10. A multilayer wiring layer including a second wiring layer INC2 is provided in the interlayer insulating film 70.

[0048] As shown in FIG. 1, in a plan view seen from the Z direction, the first wiring layer INC1 overlaps with a part of the bonding pad PAD. The first wiring layer INC1 overlaps with the through electrode TSV. The diameter of the bottom surface of the second via contact V2 is smaller than the diameter of the upper surface Ftsv1 of the through electrode TSV. Therefore, in a plan view seen from the Z direction, the first wiring layer INC1 is inside the through electrode TSV.

[0049] According to the present embodiment, the bonding pad PAD is embedded in the semiconductor layer 10 on the first surface F1 side of the semiconductor layer 10.

[0050] For example, FIG. 3 is a cross-sectional view showing the configuration of a photodetection device according to a comparative example. As shown in FIG. 3, when the bonding pad PAD is provided on the first surface F1 of the semiconductor layer 10, the bonding pad PAD needs to be provided on the interlayer insulating film 20 on the first surface F1 of the semiconductor layer 10. In this case, an interlayer insulating film 21 that covers the surface of the bonding pad PAD and exposes a part thereof is further required, and the total thickness of the interlayer insulating films 20 and 21 increases. This increases the thickness of the entire photodetection device 1 and hinders the thinning of the photodetection device 1. When the photodetection device 1 is thick, the light collection characteristics deteriorate as the pixel PX is miniaturized. Therefore, it is preferable that the photodetection device 1 is thinned.

[0051] In contrast to the above comparative example, in the photodetector 1 according to this embodiment, the bonding pad PAD is embedded in the semiconductor layer 10 from the first surface F1 side of the semiconductor layer 10. A portion of the surface of the bonding pad PAD is exposed from the semiconductor layer 10, the interlayer insulating film 20, and the spacer 90 on the first surface F1 side. As a result, the bonding pad PAD is positioned lower than the first wiring layer INC1 and the interlayer insulating film 20 on the first surface F1 of the semiconductor layer 10 (inside the semiconductor layer 10 in the -Z direction). Therefore, the interlayer insulating film 20 can be made thinner, and the thickness of the photodetector 1 in the pixel region Rpx can also be made thinner than in the comparative example. As a result, the pixel PX can be miniaturized, and the size of the photodetector 1 can be reduced.

[0052] (Second Embodiment) Figure 4 is a cross-sectional view showing an example of the configuration of a photodetector according to the second embodiment. The second embodiment further includes an inner lens 65 as a second lens. The inner lens 65 is provided between the photoelectric conversion unit PD and the color filter 40. The inner lens 65 focuses the light that has been focused by the on-chip lens 60 and passed through the color filter 40, further focusing it towards the photoelectric conversion unit PD. The inner lens 65 is provided within the interlayer insulating film 20. The inner lens 65 is composed of, for example, a silicon nitride film and a silicon oxynitride film covering this silicon nitride film.

[0053] To optically separate the interlayer insulating film 20 and inner lens 65 for each pixel PX, light-shielding portions 31 are provided within the interlayer insulating film 20 and inner lens 65 between adjacent pixels PX.

[0054] The other components of the second embodiment may be the same as those of the first embodiment. Therefore, the second embodiment can obtain the same effects as the first embodiment.

[0055] (Third Embodiment) Figure 5 is a cross-sectional view showing an example of the configuration of a light detection device according to the third embodiment. The third embodiment further includes a companion chip CMPC as a semiconductor chip provided around the light receiving unit 2 on the first surface F1 of the semiconductor layer 10. The companion chip CMPC includes, for example, a logic circuit that processes pixel signals from pixels PX.

[0056] A companion chip CMPC is a semiconductor chip of at least one layer, including, for example, bump BMPs connected to electrodes 91 provided on a first wiring layer INC1. The electrodes 91 are provided within an interlayer insulating film 20 and are made of a conductive material such as copper or tungsten. The bump BMPs are made of a conductive material such as solder. A companion chip CMPC may have multiple bump BMPs. Multiple electrodes 91 may be provided within the interlayer insulating film 20, corresponding to the multiple bump BMPs. The companion chip CMPC is smaller than the support substrate 80 and is flip-chip connected so that it is electrically connected to multiple electrodes 91 by multiple bump BMPs.

[0057] The other configurations of the third embodiment may be the same as those of the second embodiment. Therefore, the third embodiment can obtain the same effects as the second embodiment. Furthermore, the third embodiment may be combined with the first embodiment.

[0058] (Fourth Embodiment) Figure 6 is a cross-sectional view showing an example of the configuration of a light detection device according to the fourth embodiment. Figure 6 shows only the configuration of one pixel PX. In the fourth embodiment, the thickness of the semiconductor layer 10 is relatively thick. In addition, the light-shielding portions 30 and 32 provided within the semiconductor layer 10 include not only a vertical light-shielding portion 30 extending in the Z direction, but also a horizontal light-shielding portion 32 extending in the X-Y plane. This blocks the light reaching the pixel circuit 11, thereby suppressing degradation of the pixel signal and malfunction of the pixel circuit 11.

[0059] As the thickness of the semiconductor layer 10 increases, the length (depth) of the through-electrode TSV in the Z direction also increases.

[0060] The other configurations of the fourth embodiment may be the same as those of the first embodiment. Therefore, the fourth embodiment can obtain the same effects as the first embodiment. Furthermore, the fourth embodiment may be combined with the second or third embodiment.

[0061] (Fifth Embodiment) Figure 7 is a cross-sectional view showing an example of the configuration of a photodetector according to the fifth embodiment. In the fifth embodiment, the bonding pad PAD is not completely embedded in the semiconductor layer 10, and a part of it (the upper part) protrudes above the first surface F1 of the semiconductor layer 10. The lower part of the bonding pad PAD is embedded below the first surface F1 of the semiconductor layer 10. That is, the surface Fpad1 of the bonding pad PAD is located higher than the first surface F1 of the semiconductor layer 10 in the +Z direction from the first surface F1 of the semiconductor layer 10. In addition, a part of the surface Fpad1 of the bonding pad PAD is exposed from the interlayer insulating film 20, and the rest is covered by the interlayer insulating film 20.

[0062] The surface Fpad1 of the bonding pad is at approximately the same height in the +Z direction from the first surface F1 of the semiconductor layer 10 as the upper surface Ftsv1 of the through-electrode TSV and the bottom surface Finc1 of the first wiring layer INC1. Therefore, the surface Fpad1 of the bonding pad is in contact with the bottom surface Finc1 of the first wiring layer INC1. Furthermore, the upper surface Ftsv1 of the through-electrode TSV is at approximately the same height as the surface Fpad1 of the bonding pad in the +Z direction from the first surface F1 of the semiconductor layer 10 and is in contact with the bottom surface Finc1 of the first wiring layer INC1.

[0063] Since the bonding pad PAD protrudes from the first surface F1 and the surface Fpad1 of the bonding pad PAD is at approximately the same height as the bottom surface Finc1 of the first wiring layer INC1, the first via contact V1 between the first wiring layer INC1 and the bonding pad PAD is omitted. Furthermore, since the upper surface Ftsv1 of the through electrode TSV is at approximately the same height as the bottom surface Finc1 of the first wiring layer INC1, the second via contact V2 between the first wiring layer INC1 and the through electrode TSV is also omitted.

[0064] The other configurations of the fifth embodiment may be the same as those of the first embodiment. Therefore, the fifth embodiment can obtain the same effects as the first embodiment. Furthermore, the fifth embodiment may be combined with any of the second to fourth embodiments.

[0065] For example, Figure 8 is a cross-sectional view showing a configuration example combining the fifth embodiment and the second embodiment. Figure 9 is a cross-sectional view showing a configuration example combining the fifth embodiment and the third embodiment. Figure 10 is a cross-sectional view showing a configuration example combining the fifth embodiment and the fourth embodiment.

[0066] In both configurations, the surface Fpad1 of the bonding pad is located higher than the first surface F1 of the semiconductor layer 10 in the +Z direction. The first via contact V1 is omitted because the surface Fpad1 of the bonding pad is located at approximately the same height as the bottom surface Finc1 of the first wiring layer INC1. The second via contact V2 is also omitted because the top surface Ftsv1 of the through electrode TSV is located at approximately the same height as the bottom surface Finc1 of the first wiring layer INC1.

[0067] (Sixth Embodiment) Figure 11 is a cross-sectional view showing an example of the configuration of a photodetector according to the sixth embodiment. In the sixth embodiment, the logic chip LGC1 is bonded to the bottom surface (the surface facing the -Z direction) of the interlayer insulating film 70 on the second surface F2 side of the semiconductor layer 10. That is, the logic chip LGC1 is stacked on the pixel chip. The interlayer insulating film 70 is provided on the second surface F2 side of the semiconductor layer 10 and covers the pixel circuit 11. The second wiring layer INC2 is provided within the interlayer insulating film 70.

[0068] A portion of the third wiring layer INC3 is exposed on the surface of the logic chip LGC1, and a portion of the second wiring layer INC2 is exposed on the bottom surface of the interlayer insulating film 70. The exposed portions of the third wiring layer INC3 and the second wiring layer INC2 are joined at the interface INTa (Cu-Cu junction).

[0069] The logic chip LGC1 comprises a semiconductor layer 180, a logic circuit 181, an interlayer insulating film 182, and a third wiring layer INC3. The semiconductor layer 180 is, for example, a silicon substrate. The logic circuit 181 is, for example, a CMOS circuit provided on the third surface F3 of the semiconductor layer 180. The interlayer insulating film 182 is provided on the third surface F3 of the semiconductor layer 180 and covers the logic circuit 181. The interlayer insulating film 182 is also bonded to the interlayer insulating film 70 at interface INTa. The third wiring layer INC3 is provided within the interlayer insulating film 182 and is electrically connected to the logic circuit 181 and the second wiring layer INC2 within the interlayer insulating film 70. The third wiring layer INC3 may be a multilayer wiring layer provided within the interlayer insulating film 182. A portion of the third wiring layer INC3 is exposed from the surface of the interlayer insulating film 182 and is bonded to the second wiring layer INC2 at interface INTa. As a result, the bonding pad PAD is electrically connected to the logic circuit 181 of the logic chip LGC1.

[0070] Thus, the logic chip LGC1 may be provided on a semiconductor layer 180 separate from the semiconductor layer 10, electrically bonded at the interface INTa, and stacked on the pixel chip.

[0071] The other configurations of the sixth embodiment may be the same as those of the first embodiment. Therefore, the sixth embodiment can obtain the same effects as the first embodiment. The sixth embodiment may be combined with any of the second to fifth embodiments.

[0072] (Seventh Embodiment) Figure 12 is a cross-sectional view showing an example of the configuration of a photodetector according to the seventh embodiment. In the seventh embodiment, the logic chip LGC2 is bonded to the bottom surface (the surface facing the -Z direction) of the interlayer insulating film 183 on the fourth surface F4 side of the semiconductor layer 180 of the logic chip LGC1, which is opposite to the third surface F3. That is, the logic chip LGC2 is further laminated on the stacked pixel chip and logic chip LGC1. The interlayer insulating film 183 is provided on the fourth surface F4 side of the semiconductor layer 180. The fourth wiring layer INC4 on the fourth surface F4 side is provided within the interlayer insulating film 183.

[0073] A portion of the fifth wiring layer INC5 is exposed on the surface of the logic chip LGC2, and a portion of the fourth wiring layer INC4 is exposed on the bottom surface of the interlayer insulating film 183. The exposed portions of the fifth wiring layer INC5 and the fourth wiring layer INC4 are joined at the interface INTb (Cu-Cu junction).

[0074] The logic chip LGC2 comprises a semiconductor layer 280, a logic circuit 281, an interlayer insulating film 282, and a fifth wiring layer INC5. The semiconductor layer 280 is, for example, a silicon substrate. The logic circuit 281 is, for example, a CMOS circuit provided on the fifth surface F5 of the semiconductor layer 280. The interlayer insulating film 282 is provided on the fifth surface F5 of the semiconductor layer 280 and covers the logic circuit 281. The interlayer insulating film 282 is also bonded to the interlayer insulating film 183 at interface INTb. The fifth wiring layer INC5 is provided within the interlayer insulating film 282 and is electrically connected to the logic circuit 281 and the fourth wiring layer INC4 within the interlayer insulating film 183. The fifth wiring layer INC5 may be a multilayer wiring layer provided within the interlayer insulating film 282. A portion of the fifth wiring layer INC5 is exposed from the surface of the interlayer insulating film 282 and is bonded to the fourth wiring layer INC4 at interface INTb. As a result, the bonding pad PAD is electrically connected to the logic circuit 181 of logic chip LGC1 and / or the logic circuit 281 of logic chip LGC2.

[0075] Thus, the logic chip LGC2 may be further stacked on the pixel chip and the logic chip LGC1.

[0076] The other configurations of the seventh embodiment may be the same as those of the sixth embodiment. Therefore, the seventh embodiment can obtain the same effects as the sixth embodiment.

[0077] (Eighth Embodiment) Figure 13 is a cross-sectional view showing an example of the configuration of a light detection device according to the eighth embodiment. In the eighth embodiment, the logic chip LGC2 is fixed on the support substrate 80 via an insulating film 370. The logic chip LGC2 is smaller than the pixel chip and logic chip LGC1, but it can be stacked on the pixel chip and logic chip LGC1 by the support substrate 80.

[0078] The other configurations of the eighth embodiment may be the same as those of the seventh embodiment. Therefore, the eighth embodiment can obtain the same effects as the seventh embodiment.

[0079] (Ninth Embodiment) Figure 14 is a cross-sectional view showing an example of the configuration of a light detection device according to the ninth embodiment. In the ninth embodiment, the logic chip LGC1 of the seventh embodiment is inverted vertically in the Z direction. The other configurations of the ninth embodiment may be the same as those of the seventh embodiment.

[0080] (Tenth Embodiment) Figure 15 is a cross-sectional view showing an example of the configuration of a light detection device according to the tenth embodiment. In the tenth embodiment, the logic chip LGC1 of the eighth embodiment is inverted vertically in the Z direction. The other configurations of the tenth embodiment may be the same as those of the eighth embodiment.

[0081] (Manufacturing Method) Figures 16 to 23 are cross-sectional views showing an example of the manufacturing method of the first embodiment. Here, the process of forming the through-electrode TSV and bonding pad PAD will be mainly described. In the figures, the pixel region Rpx and the pad region Rpad are shown side by side. In the pad region Rpad, the region Rpad(TSV) of the through-electrode TSV and the region Rpad(PAD) of the bonding pad PAD are shown side by side.

[0082] Although not shown in the diagram, a photoelectric conversion unit PD is formed on the second surface F2 of the semiconductor layer 10, and a pixel circuit 11, a second wiring layer INC2, and an interlayer insulating film 70 are formed on the second surface F2. Furthermore, in order to process the first surface F1 (back side) of the semiconductor layer 10, the interlayer insulating film 70 is attached to the support substrate 80.

[0083] Next, as shown in Figure 16, a pinning layer 101, an insulating film 102, and a hard mask 103 are formed on the first surface F1 of the semiconductor layer 10 in this order. The pinning layer 101 is, for example, a p+ semiconductor layer. The insulating film 102 is, for example, a silicon oxide film. The hard mask 103 is, for example, a silicon nitride film.

[0084] Next, using lithography and etching techniques, holes Htsv for through-electrode TSVs are formed in region Rpad (TSV), and holes Hpad for bonding pads PADs are formed in region Rpad (PAD).

[0085] Next, as shown in Figure 17, a spacer 90 is formed in the holes Htsv and Hpad. Then, bonding pad material (e.g., aluminum) is deposited in the holes Hpad, and this material is processed using lithography and etching techniques. As a result, a bonding pad PAD is formed in the holes Hpad, as shown in Figure 17. Next, an insulating film (e.g., silicon oxide film) is embedded in the holes Htsv and Hpad. Then, by planarization using the CMP (Chemical Mechanical Polishing) method, a bonding pad PAD embedded in the semiconductor layer 10 is formed, as shown in Figure 17. The bonding pad PAD is electrically insulated from the semiconductor layer 10 by the spacer 90.

[0086] Next, using lithography and etching techniques, a through-hole Htsv2 is formed inside the hole Htsv of region Rpad (TSV), as shown in Figure 18. A spacer 90 is left on the inner wall of hole Htsv2. The through-hole Htsv2 penetrates to the second surface F2 of the semiconductor layer 10.

[0087] Next, a spacer 90 is formed inside the through-hole Htsv2, and the material for the through-electrode TSV (e.g., copper) is embedded inside the spacer 90. This forms the through-electrode TSV as shown in Figure 19. An insulating film 104 (e.g., silicon oxide film) is formed on the hard mask 103, and a block film 105 (e.g., silicon carbonitride film SiCN) is formed on the insulating film 104. The block film 105 suppresses the diffusion of the metal material (e.g., copper) of the through-electrode TSV.

[0088] Next, the block film 105, insulating film 104, and hard mask 103 of the pixel region Rpx are selectively removed using lithography and etching techniques. Then, the material for the light-shielding portion 30 (for example, tungsten) is deposited on the insulating film 102 of the pixel region Rpx. Next, as shown in Figure 20, the light-shielding portion 30 is processed on the insulating film 102 of the pixel region Rpx using lithography and etching techniques with the hard mask 106 as a mask.

[0089] Next, as shown in Figure 21, an interlayer insulating film 20 (for example, a silicon oxide film) is deposited on the block film 105 and the light-shielding portion 30.

[0090] Next, using lithography and etching techniques, grooves TRinc1 of the first wiring layer INC1 are formed as shown in Figure 22. Furthermore, contact holes Hv1 and Hv2, which will be used for via contacts V1 and V2, are formed. Contact hole Hv1 is provided from groove TRinc1 to the bonding pad PAD. Contact hole Hv2 is provided from groove TRinc1 to the through electrode TSV.

[0091] Next, as shown in Figure 23, the material (for example, copper) for the via contacts V1, V2 and the first wiring layer INC1 is embedded in the groove TRinc1 and the contact holes Hv1, Hv2. This forms the via contacts V1, V2 and the first wiring layer INC1.

[0092] Subsequently, the bonding pad PAD is exposed using lithography and etching techniques. A color filter 40 and an on-chip lens 60 are then formed in the pixel region Rpx. This completes the photodetector 1 shown in Figure 2.

[0093] Thus, according to this embodiment, a bonding pad PAD embedded in the semiconductor layer 10 can be formed.

[0094] Figure 24 is a cross-sectional view showing an example of the configuration of a modified photodetector. In this modified configuration, the logic chip LGC1 shown in Figure 13 is omitted, and the logic chip LGC2 is stacked on the pixel chip. The logic chip LGC2 is fixed on the support substrate 80 via an insulating film 370. Although the logic chip LGC2 is smaller than the pixel chip, it can be stacked on the pixel chip by the support substrate 80. The other configurations of this modified configuration may be the same as those of the eighth embodiment.

[0095] (Examples of application to mobile devices) The technology disclosed herein (the technology) can be applied to various products. For example, the technology disclosed herein may be implemented as a device mounted on any type of mobile device such as automobiles, electric vehicles, hybrid electric vehicles, motorcycles, bicycles, personal mobility devices, airplanes, drones, ships, and robots.

[0096] Figure 25 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technology described herein may be applied.

[0097] The vehicle control system 12000 comprises a plurality of electronic control units connected via a communication network 12001. In the example shown in Figure 25, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. The functional configuration of the integrated control unit 12050 is shown in the figure, which includes a microcomputer 12051, an audio / image output unit 12052, and an in-vehicle network interface 12053.

[0098] The drivetrain control unit 12010 controls the operation of devices related to the vehicle's drivetrain according to various programs. For example, the drivetrain control unit 12010 functions as a control device for a drivetrain generating device that generates driving force for the vehicle, such as an internal combustion engine or a drive motor; a drivetrain transmission mechanism that transmits driving force to the wheels; a steering mechanism that adjusts the steering angle of the vehicle; and a braking device that generates braking force for the vehicle.

[0099] The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window system, or various lamps such as headlights, reverse lights, brake lights, turn signals, or fog lights. In this case, the body system control unit 12020 may receive radio waves transmitted from a portable device that replaces a key or signals from various switches. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock system, power window system, lamps, etc.

[0100] The external information detection unit 12030 detects information from outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the external information detection unit 12030. The external information detection unit 12030 causes the imaging unit 12031 to capture images of the outside of the vehicle and receives the captured images. Based on the received images, the external information detection unit 12030 may perform object detection processing such as detecting people, cars, obstacles, signs, or characters on the road surface, or distance detection processing.

[0101] The imaging unit 12031 is a light sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0102] The in-vehicle information detection unit 12040 detects information inside the vehicle. The in-vehicle information detection unit 12040 is connected to, for example, a driver status detection unit 12041 that detects the driver's state. The driver status detection unit 12041 includes, for example, a camera that captures images of the driver, and the in-vehicle information detection unit 12040 may calculate the driver's level of fatigue or concentration, or determine whether the driver is drowsy, based on the detection information input from the driver status detection unit 12041.

[0103] The microcomputer 12051 can calculate control target values ​​for the drive force generator, steering mechanism, or braking device based on information inside and outside the vehicle acquired by the external information detection unit 12030 or the internal information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing ADAS (Advanced Driver Assistance System) functions, including collision avoidance or impact mitigation, following driving based on distance between vehicles, maintaining vehicle speed, vehicle collision warning, or vehicle lane departure warning.

[0104] Furthermore, the microcomputer 12051 can perform cooperative control for purposes such as autonomous driving, where the vehicle drives autonomously without driver intervention, by controlling the drive force generating device, steering mechanism, or braking device, etc., based on information about the vehicle's surroundings acquired by the external information detection unit 12030 or the internal information detection unit 12040.

[0105] Furthermore, the microcomputer 12051 can output control commands to the body system control unit 12020 based on external information acquired by the external information detection unit 12030. For example, the microcomputer 12051 can control the headlights according to the position of a preceding or oncoming vehicle detected by the external information detection unit 12030, and perform coordinated control aimed at reducing glare, such as switching from high beams to low beams.

[0106] The audio-image output unit 12052 transmits at least one of audio and image output signals to an output device capable of visually or audibly notifying information to the vehicle's occupants or to those outside the vehicle. In the example shown in Figure 25, the output devices include an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an onboard display and a head-up display.

[0107] Figure 26 shows an example of the installation position of the imaging unit 12031.

[0108] In Figure 26, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0109] The imaging units 12101, 12102, 12103, 12104, and 12105 are installed, for example, on the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield inside the vehicle 12100. The imaging unit 12101 installed on the front nose and the imaging unit 12105 installed on the upper part of the windshield inside the vehicle mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 installed on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 installed on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 installed on the upper part of the windshield inside the vehicle is mainly used for detecting preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, or lanes.

[0110] Figure 26 shows an example of the imaging range of imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of imaging unit 12101 located on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of imaging units 12102 and 12103 located on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of imaging unit 12104 located on the rear bumper or back door. For example, by superimposing the image data captured by imaging units 12101 to 12104, an overhead view image of the vehicle 12100 can be obtained.

[0111] At least one of the imaging units 12101 to 12104 may have a function for acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera consisting of multiple image sensors, or an image sensor having pixels for phase difference detection.

[0112] For example, the microcomputer 12051, based on distance information obtained from the imaging units 12101 to 12104, can determine the distance to each object within the imaging range 12111 to 12114 and the temporal change of this distance (relative speed to the vehicle 12100). In particular, it can extract the closest object on the vehicle 12100's path that is traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or more) as the preceding vehicle. Furthermore, the microcomputer 12051 can set a predetermined distance to be maintained before the preceding vehicle and perform automatic braking control (including follow-and-stop control) and automatic acceleration control (including follow-and-start control), etc. In this way, cooperative control aimed at autonomous driving, where the vehicle drives autonomously without driver intervention, can be performed.

[0113] For example, the microcomputer 12051 can use distance information obtained from imaging units 12101 to 12104 to classify and extract three-dimensional object data related to three-dimensional objects, such as motorcycles, passenger cars, large vehicles, pedestrians, utility poles, and other three-dimensional objects, and use this data for automatic obstacle avoidance. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines the collision risk, which indicates the degree of risk of collision with each obstacle. If the collision risk is above a set value and there is a possibility of collision, the microcomputer 12051 can provide driving assistance to avoid collisions by outputting a warning to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or evasive steering via the drive system control unit 12010.

[0114] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared light. For example, the microcomputer 12051 can recognize pedestrians by determining whether or not pedestrians are present in the images captured by the imaging units 12101 to 12104. Such pedestrian recognition is performed, for example, by a procedure to extract feature points from the images captured by the imaging units 12101 to 12104 as infrared cameras, and a procedure to perform pattern matching on a series of feature points that indicate the contour of an object to determine whether or not it is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the imaging units 12101 to 12104 and recognizes a pedestrian, the audio-image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio-image output unit 12052 may also control the display unit 12062 to display an icon indicating a pedestrian at a desired position.

[0115] The above describes an example of a vehicle control system to which the technology described herein may be applied. The technology described herein can be applied to, for example, the imaging unit 12031, among the configurations described above.

[0116] Furthermore, this technology can be configured as follows:

[0117] (1) A light detection device comprising: a semiconductor layer including a first surface which serves as a light-receiving surface and a second surface on the opposite side of the first surface; a light-receiving section provided on the first surface side of the semiconductor layer and having a plurality of photoelectric conversion units that convert incident light into photoelectrics; a first wiring layer provided on the first surface side; a second wiring layer provided on the second surface side; a through electrode that penetrates the semiconductor layer and electrically connects the first wiring layer and the second wiring layer; a pad that is at least partially embedded in the semiconductor layer on the first surface side and electrically connected to the first wiring layer, the second wiring layer and the through electrode; and a first insulating film provided on the first surface side that exposes a part of the surface of the pad.

[0118] (2) The photodetector according to (1), wherein the bottom surface of the first wiring layer is at the same height as or higher than the surface of the pad in relation to the first surface of the semiconductor layer.

[0119] (3) The photodetector according to (1) or (2), further comprising a first contact provided between the first wiring layer and the pad, which electrically connects the first wiring layer and the pad.

[0120] (4) The photodetector according to any one of (1) to (3), further comprising a second contact provided between the first wiring layer and the through electrode, which electrically connects the first wiring layer and the through electrode.

[0121] (5) The photodetector according to any one of (1) to (4), further comprising a spacer provided between the through electrode and the semiconductor layer to electrically separate the through electrode and the semiconductor layer.

[0122] (6) The photodetector according to (4), wherein the upper surface of the through electrode or the bottom surface of the second contact is at the same height as or higher than the surface of the pad in relation to the first surface of the semiconductor layer.

[0123] (7) The photodetector according to (4), wherein the diameter of the bottom surface of the second contact is less than or equal to the diameter of the top surface of the through electrode.

[0124] (8) The light detection device according to any one of (1) to (7), wherein the first wiring layer overlaps with the pad when viewed from a direction perpendicular to the first surface.

[0125] (9) The photodetector according to any one of (1) to (8), wherein the first wiring layer and the pad are electrically isolated from the semiconductor layer.

[0126] (10) The light detection device according to any one of (1) to (9), further comprising: a first lens provided above the light receiving portion on the first surface of the semiconductor layer; a color filter provided between the light receiving portion and the first lens; and a second lens provided between the light receiving portion and the color filter.

[0127] (11) The light detection device according to any one of (1) to (10), further comprising a semiconductor chip smaller than the semiconductor layer and provided on the first surface of the semiconductor layer around the light receiving portion, with at least one semiconductor chip layer.

[0128] (12) A photodetector according to any one of (1) to (11), comprising: a second semiconductor chip bonded to a second insulating film on the second surface side of the semiconductor layer, the second semiconductor chip comprising: a second semiconductor layer; a first logic circuit provided on the third surface of the second semiconductor layer; a third insulating film covering the first logic circuit on the third surface and bonded to the second insulating film; and a third wiring layer provided within the third insulating film and electrically connected to the second wiring layer.

[0129] (13) The photodetector according to (12), wherein the third semiconductor chip is bonded to a fourth insulating film provided on the fourth surface of the second semiconductor layer opposite to the third surface, the third semiconductor chip comprising: a third semiconductor layer; a second logic circuit provided on the fifth surface of the third semiconductor layer; a fifth insulating film covering the second logic circuit on the fifth surface and bonded to the fourth insulating film; and a fifth wiring layer provided within the fifth insulating film and electrically connected to a fourth wiring layer provided within the fourth insulating film.

[0130] (14) The photodetector according to (12), wherein the second semiconductor chip is smaller than the first semiconductor chip including the semiconductor layer.

[0131] (15) The photodetector according to (13), wherein the third semiconductor chip is smaller than the first semiconductor chip including the semiconductor layer.

[0132] (16) The photodetector according to (15), wherein the third semiconductor chip is smaller than the second semiconductor chip.

[0133] Furthermore, this disclosure is not limited to the embodiments described above, and various modifications are possible without departing from the gist of this disclosure. Also, the effects described herein are merely illustrative and not limiting, and other effects may exist.

[0134] 1. Photodetector 10. Semiconductor layer 20, 70. Interlayer insulating film 30. Light-shielding section 40. Color filter 60. On-chip lens 80. Support substrate INC1. First wiring layer INC2. Second wiring layer TSV. Through-hole electrode V1. First via contact V2. Second via contact PAD. Bonding pad 90. Spacer

Claims

A semiconductor layer including a first surface that serves as a light-receiving surface and a second surface located opposite the first surface, A light receiving unit provided on the first surface side of the semiconductor layer and having a plurality of photoelectric conversion units that convert incident light into photoelectric light, The first wiring layer provided on the first surface, The second wiring layer provided on the second side, A through electrode penetrates the semiconductor layer and electrically connects the first wiring layer and the second wiring layer, On the first surface side, at least a portion of the semiconductor layer is embedded, and a pad is electrically connected to the first wiring layer, the second wiring layer, and the through electrode, A first insulating film is provided on the first surface side, exposing a part of the surface of the pad, A light detection device equipped with the following features. 　 The photodetector according to claim 1, wherein the bottom surface of the first wiring layer is at the same height as or higher than the surface of the pad in relation to the first surface of the semiconductor layer. 　 The photodetector according to claim 1, further comprising a first contact provided between the first wiring layer and the pad, which electrically connects the first wiring layer and the pad. 　 The photodetector according to claim 1, further comprising a second contact provided between the first wiring layer and the through electrode, which electrically connects the first wiring layer and the through electrode. 　 The photodetector according to claim 1, further comprising a spacer provided between the through electrode and the semiconductor layer to electrically separate the through electrode and the semiconductor layer. 　 The photodetector according to claim 4, wherein the upper surface of the through electrode or the bottom surface of the second contact is at the same height as or higher than the surface of the pad in relation to the height from the first surface of the semiconductor layer. 　 The photodetector according to claim 4, wherein the diameter of the bottom surface of the second contact is less than or equal to the diameter of the top surface of the through electrode. 　 The light detection device according to claim 1, wherein the first wiring layer overlaps with the pad when viewed from a direction perpendicular to the first surface. 　 The photodetector according to claim 1, wherein the first wiring layer and the pad are electrically isolated from the semiconductor layer. 　 On the first surface of the semiconductor layer, a first lens is provided above the light-receiving portion, A color filter is provided between the light-receiving unit and the first lens, The light detection device according to claim 1, further comprising a second lens provided between the light receiving unit and the color filter. 　 The light detection device according to claim 1, further comprising at least one semiconductor chip smaller than the semiconductor layer, provided on the first surface of the semiconductor layer around the light receiving portion. 　 A second semiconductor chip bonded to a second insulating film on the second surface side of the semiconductor layer, The second semiconductor chip is The second semiconductor layer, A first logic circuit provided on the third surface of the second semiconductor layer, A third insulating film covers the first logic circuit on the third surface and is bonded to the second insulating film, The photodetector according to claim 1, further comprising: a third wiring layer provided in the third insulating film and electrically connected to the second wiring layer. 　 A third semiconductor chip bonded to a fourth insulating film provided on the fourth surface of the second semiconductor layer, which is on the opposite side of the third surface, The third semiconductor chip is The third semiconductor layer, A second logic circuit provided on the fifth surface of the third semiconductor layer, A fifth insulating film covers the second logic circuit on the fifth surface and is bonded to the fourth insulating film, The photodetector according to claim 12, further comprising: a fifth wiring layer provided within the fifth insulating film and electrically connected to a fourth wiring layer provided within the fourth insulating film. 　 The photodetector according to claim 12, wherein the second semiconductor chip is smaller than the first semiconductor chip including the semiconductor layer. 　 The photodetector according to claim 13, wherein the third semiconductor chip is smaller than the first semiconductor chip including the semiconductor layer. 　 The photodetector according to claim 15, wherein the third semiconductor chip is smaller than the second semiconductor chip.

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