Operating system and method for inter-core synchronization of multi-core software emulator

Abstract

Disclosed are an operating system and method for inter-core synchronization of a multi-core software emulator. The system according to a disclosed embodiment is an operating system of a multi-core software emulator including a plurality of emulators and a synchronization module. Each emulator counts the number of performed instructions while sequentially performing instructions and transmits the accumulated number of the performed instructions to the synchronization module through a packet. The synchronization module compares the accumulated numbers of the performed instructions collected from the respective emulators and controls the operations of the respective emulators according to the comparison result.

Description

Operating system and method for inter-core synchronization of a multicore software emulator

[0001] Embodiments of the present invention relate to an operating system and method for synchronizing between cores of a multicore software emulator.

[0002] Software emulators are utilized in various fields, such as software development and verification, because they can execute the same binaries running on hardware. Recently, with the increase in multi-core systems, the demand for software emulators suitable for multi-core systems is also rising. Multi-core systems are systems composed of a mix of identical or heterogeneous cores, and they generally use synchronization to communicate between cores to exchange data or to check for system operational anomalies.

[0003] For emulators for multi-core systems, it is very important to simulate the parallel execution of multiple cores exactly as it does in hardware. Software emulators typically run on x86-based operating systems such as Windows or Linux, but since these general-purpose operating systems are unsuitable for parallel execution, they are implemented by modifying the operating system kernel or by adjusting the execution speed between each core during multi-core emulation.

[0004] In other words, in general-purpose operating systems such as Windows or Linux, when simulating multi-core, each core runs as an individual instance, and it is difficult for the operating system scheduler to synchronize between instances due to the influence of other programs. In addition, unlike embedded operating systems, general-purpose operating systems do not guarantee execution time, so there is a problem in that synchronized parallel execution in multi-core emulators is not accurately guaranteed.

[0005] Embodiments of the present invention are intended to provide an operating system and method for synchronizing between cores of a multicore software emulator.

[0006] A system according to one disclosed embodiment is an operating system for a multicore software emulator comprising a plurality of emulators and a synchronization module, wherein each emulator sequentially executes instructions, counts the number of executed instructions, and transmits the accumulated number of executed instructions to the synchronization module via a packet, and the synchronization module compares the accumulated number of executed instructions collected from each emulator and controls the operation of each emulator according to the comparison result.

[0007] The above synchronization module can update the execution cycle of an emulator with a smaller number of accumulated execution instructions than another emulator based on the difference between the accumulated number of execution instructions collected from each emulator when the accumulated number of execution instructions collected from each emulator is not the same.

[0008] A method according to one disclosed embodiment is a method performed in an operating system of a multicore software emulator comprising a plurality of emulators and a synchronization module, comprising: a step of sequentially executing instructions in each emulator, counting the number of executed instructions, and transmitting the accumulated number of executed instructions to the synchronization module via a packet; and a step of comparing the accumulated number of executed instructions collected from each emulator in the synchronization module and controlling the operation of each emulator according to the comparison result.

[0009] The step of controlling the above operation may include: updating the execution cycle of an emulator whose accumulated number of execution commands is smaller than that of another emulator based on the difference between the accumulated number of execution commands when the accumulated number of execution commands collected from each emulator is not the same; and transmitting the updated execution cycle to the emulator.

[0010] According to the disclosed embodiment, the efficiency of parallel execution between cores in a multicore software emulator can be maximized, and performance degradation can be minimized by performing synchronization only when necessary. In addition, the accuracy of the simulation can be improved by implementing synchronization based on the number of instructions to maintain the execution state of each core consistently. In particular, it becomes possible to effectively simulate multicore parallel processing in systems or test environments that require high-performance computing.

[0011] FIG. 1 is a diagram showing an operating system of a multicore emulator according to one embodiment of the present invention.

[0012] FIG. 2 is a block diagram showing the configuration of a command counter transmitter according to one embodiment of the present invention.

[0013] FIG. 3 is a diagram showing the state of increasing the execution command count in one embodiment of the present invention.

[0014] FIG. 4 is a diagram showing a state in which count weights are assigned to each instruction in one embodiment of the present invention.

[0015] FIG. 5 is a flowchart illustrating a synchronization method of a multicore emulator according to an embodiment of the present invention.

[0016] FIG. 6 is a block diagram illustrating a computing environment including a computing device suitable for use in exemplary embodiments.

[0017] Hereinafter, specific embodiments of the present invention will be described with reference to the drawings. The following detailed description is provided to facilitate a comprehensive understanding of the methods, apparatuses, and / or systems described herein. However, this is merely illustrative and the present invention is not limited thereto.

[0018] In describing the embodiments of the present invention, detailed descriptions of known technologies related to the present invention are omitted if it is determined that such detailed descriptions may unnecessarily obscure the essence of the present invention. Furthermore, the terms described below are defined in consideration of their functions within the present invention, and these may vary depending on the intentions or practices of the user or operator. Therefore, such definitions should be based on the content throughout this specification. Terms used in the detailed description are intended merely to describe the embodiments of the present invention and should not be limiting in any way. Unless explicitly stated otherwise, expressions in the singular form include the meaning of the plural form. In this description, expressions such as "include" or "comprise" are intended to refer to certain characteristics, numbers, steps, actions, elements, parts thereof, or combinations thereof, and should not be interpreted to exclude the existence or possibility of one or more other characteristics, numbers, steps, actions, elements, parts thereof, or combinations thereof other than those described.

[0019] An embodiment of the present invention proposes a method for synchronizing between cores of a multicore software emulator. Specifically, when running an emulator with multiple cores, the number of instructions executed in each core is measured as the execution time of each core, and by synchronizing between cores based on the measured execution time of the cores, the execution speed during parallel execution can be matched in the same way as when operating on actual hardware.

[0020] FIG. 1 is a diagram showing an operating system of a multicore emulator according to one embodiment of the present invention.

[0021] Referring to FIG. 1, the operating system (100) may include a plurality of emulators (102) and a synchronization module (104). In FIG. 1, three emulators (Emulator A, Emulator B, and Emulator C) are shown for convenience of explanation.

[0022] A software emulator composed of two or more cores can be operated by executing binaries equal to the number of cores. Each emulator A, B, and C can execute binaries sequentially in instruction units. Each emulator (102) is a software program that executes binaries and may include an emulator engine (111) and an instruction counter transmitter (113).

[0023] Here, the emulator engine (111) can control binary execution, suspension, and resumption of execution in the emulator. The instruction counter transmitter (113) can count the number of instructions executed in the emulator and transmit them to the synchronization module.

[0024] FIG. 2 is a block diagram showing the configuration of an instruction counter transmitter (113) according to an embodiment of the present invention. Referring to FIG. 2, the instruction counter transmitter (113) may include an instruction executer (121), an instruction accumulator (123), and a counter transmitter (125).

[0025] The instruction executor (121) can execute instructions of a binary running on the emulator (102). The instruction executor (121) can execute instructions for a period of time and stop. The instruction execution accumulator (123) can count the instructions executed by the instruction executor (121). The counter transmitter (125) can transmit the total number of accumulated instructions received from the instruction execution accumulator (123) to the synchronization module (104).

[0026] Each emulator (102) can execute instructions by fetching and decoding them one by one while running the binary. The execution instruction accumulator (123) can increase the execution instruction count while executing each instruction sequentially as shown in FIG. 3.

[0027] The system time of the operating system continues to flow, but the time of the binary on the emulator flows only as much as the number of instructions executed. Not all instructions are executed at the same time in the actual hardware core. Simple instructions are executed in one clock cycle, but complex instructions may be executed in two or more cycles. The instruction accumulator (123) can assign count weights to each instruction to operate similarly to actual hardware. FIG. 4 is a diagram showing the state in which count weights are assigned to each instruction in an embodiment of the present invention.

[0028] The command counter transmitter (113) can transmit the number of accumulated execution commands to the synchronization module (104) in accordance with a preset execution cycle. At this time, the transmission protocol can use TCP / IP to transmit and stop operation. Also, the transmission cycle can be set based on the number of commands.

[0029] The command counter transmitter (113) can transmit the number of accumulated execution commands to the synchronization module (104) via a TCP / IP packet. The TCP / IP packet may include an emulator ID, an execution cycle (or collection cycle), and the number of accumulated execution commands. The emulator ID is an identifier for identifying each emulator. The execution cycle is the number of commands executed by the emulator, and the number of accumulated execution commands indicates the number of accumulated commands executed by the emulator after booting.

[0030] The synchronization module (104) can synchronize the execution time of individual emulators in emulators running in parallel. The synchronization module (104) may include an instruction counter collector (131), an instruction counter comparator (133), and an emulator controller (135).

[0031] The instruction counter collector (131) can collect instruction counters from the emulator. The instruction counter collector (131) can receive TCP / IP packets from each emulator, store them in internal memory, and transmit the storage location to the instruction counter comparator (133).

[0032] The instruction counter comparator (133) can read TCP / IP packets from the memory address received from the instruction counter collector (131) and record the execution cycle and the cumulative number of instructions executed in the memory allocated to the emulator ID.

[0033] The instruction counter comparator (133) can update the execution cycle of each emulator according to the cumulative number of executed instructions. Specifically, for an emulator with a small cumulative number of executed instructions, the instruction counter comparator (133) can reset the execution cycle to the value obtained by subtracting the cumulative number of executed instructions of that emulator from the cumulative number of executed instructions of the emulator with the largest cumulative number of executed instructions, and transmit this value to that emulator. That is, the execution cycle can be reset by the following mathematical formula 1.

[0034] (Mathematical Formula 1)

[0035] Execution Cycle = Maximum Cumulative Number of Executed Instructions - Cumulative Number of Executed Instructions for the Emulator

[0036] The instruction counter comparator (133) can transmit the reset execution cycle to the corresponding emulator and transmit a command to resume execution to the emulator engine (113) of the corresponding emulator. At this time, the emulator engine (113) that receives the command to resume execution can resume the execution of the emulator and count the executed instructions, and stop the emulator when the number of instructions reaches the execution cycle. After that, TCP / IP packets can be transmitted to the instruction counter collector (131). Here, synchronization between cores can be performed by comparing the cumulative number of instructions between emulators and controlling the execution of individual cores by the difference in execution time.

[0037] In the disclosed embodiment, the execution speed of each core during multi-core parallel execution can be adjusted based on the number of instructions executed in each emulator. In this case, the time of the emulator can be calculated based on the number of executed instructions. That is, if one emulator executes n instructions and stops, and another emulator executes n instructions and stops, the two emulators can be considered to have the same time based on the number of executed instructions, and the two emulators can be considered synchronized based on the execution of n instructions. In this way, parallel execution in the emulators can be synchronized by comparing the number of executed instructions.

[0038] FIG. 5 is a flowchart illustrating a synchronization method for a multicore emulator according to an embodiment of the present invention. Although the method is described in the illustrated flowchart by dividing it into a plurality of steps, at least some of the steps may be performed in a different order, combined with other steps and performed together, omitted, divided into detailed steps, or performed with one or more steps not illustrated added.

[0039] Referring to FIG. 5, each emulator (102) can transmit the number of accumulated commands executed according to the execution cycle to the synchronization module (104) and stop execution (S 101).

[0040] Next, the synchronization module (104) can check whether the number of accumulated commands executed by each emulator (102) is the same (S 103).

[0041] If, upon verification of S 103, the number of accumulated commands executed by each emulator (102) is the same, the synchronization module (104) can transmit a command to resume execution to each emulator (102) (S 105).

[0042] If, upon verification of S 103, the number of accumulated commands executed by each emulator (102) is not the same, the synchronization module (104) can reset the execution cycle of the emulator (102) with the fewer accumulated commands executed (S 107). The synchronization module (104) can transmit the reset execution cycle to the corresponding emulator (102).

[0043] FIG. 6 is a block diagram illustrating a computing environment (10) including a computing device suitable for use in exemplary embodiments. In the illustrated embodiments, each component may have different functions and capabilities in addition to those described below, and may include additional components in addition to those described below.

[0044] The illustrated computing environment (10) includes a computing device (12). In one embodiment, the computing device (12) may be an operating system (100).

[0045] The computing device (12) includes at least one processor (14), a computer-readable storage medium (16), and a communication bus (18). The processor (14) can cause the computing device (12) to operate according to the exemplary embodiment described above. For example, the processor (14) can execute one or more programs stored in the computer-readable storage medium (16). The one or more programs may include one or more computer-executable instructions, and the computer-executable instructions may be configured to cause the computing device (12) to perform operations according to the exemplary embodiment when executed by the processor (14).

[0046] A computer-readable storage medium (16) is configured to store computer-executable instructions or program code, program data and / or other suitable forms of information. A program (20) stored in the computer-readable storage medium (16) includes a set of instructions executable by a processor (14). In one embodiment, the computer-readable storage medium (16) may be memory (volatile memory such as random access memory, non-volatile memory, or a suitable combination thereof), one or more magnetic disk storage devices, optical disk storage devices, flash memory devices, or other forms of storage media that are accessed by a computing device (12) and capable of storing desired information, or a suitable combination thereof.

[0047] The communication bus (18) interconnects various other components of the computing device (12), including the processor (14) and the computer-readable storage medium (16).

[0048] The computing device (12) may also include one or more input / output interfaces (22) and one or more network communication interfaces (26) that provide interfaces for one or more input / output devices (24). The input / output interfaces (22) and network communication interfaces (26) are connected to a communication bus (18). The input / output devices (24) may be connected to other components of the computing device (12) through the input / output interfaces (22). An exemplary input / output device (24) may include an input device such as a pointing device (such as a mouse or trackpad), a keyboard, a touch input device (such as a touchpad or touchscreen), a voice or sound input device, various types of sensor devices and / or imaging devices, and / or an output device such as a display device, a printer, a speaker and / or a network card. An exemplary input / output device (24) may be included inside the computing device (12) as a component constituting the computing device (12), or it may be connected to the computing device (12) as a separate device distinct from the computing device (12).

[0049] Although representative embodiments of the present invention have been described in detail above, those skilled in the art will understand that various modifications can be made to the above-described embodiments without departing from the scope of the present invention. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be defined by the claims set forth below as well as equivalents thereof.

Claims

1. An operating system for a multicore software emulator comprising multiple emulators and synchronization modules, Each emulator sequentially executes instructions, counts the number of executed instructions, and transmits the accumulated number of executed instructions to the synchronization module via a packet, and The above synchronization module is an operating system that compares the number of accumulated execution commands collected from each emulator and controls the operation of each emulator according to the comparison result.

2. In Claim 1, The above synchronization module is, An operating system that, when the number of accumulated execution instructions collected from each emulator is not the same, updates the execution cycle of an emulator whose number of accumulated execution instructions is smaller than that of another emulator based on the difference between the number of accumulated execution instructions.

3. A method performed in an operating system of a multicore software emulator comprising a plurality of emulators and synchronization modules, wherein A step of sequentially executing commands in each emulator, counting the number of executed commands, and transmitting the accumulated number of executed commands to a synchronization module via a packet; and A method comprising the step of comparing the number of accumulated execution commands collected from each emulator in the synchronization module above and controlling the operation of each emulator according to the comparison result.

4. In Claim 3, The step of controlling the above operation is, If the accumulated number of execution instructions collected from each emulator is not the same, a step of updating the execution cycle of an emulator whose accumulated number of execution instructions is smaller than that of another emulator based on the difference between the accumulated number of execution instructions; and A method comprising the step of transmitting the above-mentioned updated execution cycle to the corresponding emulator.

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