RF self phase and amplitude alignment technique for transmit path in phased array multi-channels beamforming transceiver

Abstract

Method and apparatus are provided for self-phase and self-amplitude alignment for RF transmission. In one novel aspect, the apparatus directly compares the phase and amplitude at RF frequency and then adjusts the phase and amplitude as needed at RF frequency. In one embodiment, the apparatus includes a plurality of detectors, each being coupled between radio frequency (RF) signals of two channels. The detector is switchable between a phase-detection mode that detects and outputs a phase direct current (DC) value indicating a phase difference, and an amplitude-detection mode that detects and outputs an amplitude DC value indicating an amplitude difference between. In one embodiment, each detector comprises a twin double-balanced mixers (TDBMs) with identical topology. A controller with a comparator and calibration circuit being configured to adjust phase shifter and / or VGA based on corresponding phase or amplitude offset value.

Description

KI I-008-PCT PATENTRF SELF PHASE AND AMPLITUDE ALIGNMENT TECHNIQUE FOR TRANSMIT PATH IN PHASED ARRAY MULT I -CHANNELS BEAMFORMING TRANSCEIVERCROSS REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority under 35 U. S. C.§119 from U. S. Provisional Application Number 63 / 719, 248 entitled " RF Self Phase and Amplitude Alignment Technique for Transmit Path in Phased Array Multi-channels Beamforming Transceiver, filed on Nov. 12, 2024, the subject matter of which is incorporated herein by reference.TECHNICAL FIELD

[0002] The disclosed embodiments relate generally to transceivers, and, more particularly, to radio frequency (RF) self-phase and self-amplitude alignment.BACKGROUND

[0003] Phase and amplitude alignment of the transmit and receive channels are critical to ensure performance of an electronically steerable phased array antenna. The traditional alignment methods rely upon expensive and time- consuming over-the-air measurements. Therefore, there is a need to develop more cost-effect ive methods of reducing the: channel phase variation along with over-the-air calibration costs.

[0004] FIG. 1A (prior art ) illustrates a conventional phase alignment. The conventional method for phase alignment utilizes additional source signal to down-convert from radio frequency (RF ) 116 to IF (intermediate frequency)KI I-008-PCT PATENT115. RF signal at RF FREQ. 116 is translated to IF FREQ. 115 by frequency down-conversion 113. The IF signals 115 are compared in an IF phase comparison block 111, and the resulting DC voltage control 117 feeds into RF phase adjustment 112. The same loop is replicated for N identical loops for N channels ( 118 ). It may also use a high resolution analog to digital converter (ADC) in order to distinguish the difference in phases and then adjust the phase. Furthermore, because the channels ' output is mixed with the LO, there is finite phase error contributed by the network mismatch and LO j itter.

[0005] FIG. 1B (Prior Art) illustrates a conventional alignment. RF signal at RF FREQ. 126 is translated to IF FREQ. 125 by power detector 123. The IF signals 125 are compared in an IF amplitude comparison block 121, and the resulting DC voltage control 127 feeds into RF amplitude adjustment 122. The same loop is replicated for N identical loops for N channels ( 128 ). Similar to conventional phase alignment, conventional amplitude alignment has finite amplitude error because of the network mismatch and DC reference noise. Furthermore, the conventional approach for both phase and amplitude alignment requires that phase and amplitude be measured for every single channel.

[0006] Improvements are needed to reduce the channel phase and amplitude variation and the over-the-air calibration cost.SUMMARY

[0007] Method and apparatus are provided for self-phase and self-amplitude alignment for RF transmission. In one novel aspect, the apparatus directly compares the phase andKI I-008-PCT PATENTamplitude at RF frequency and then adjusts the phase and amplitude as needed at RF frequency. In one embodiment, an apparatus with a plurality of antenna elements comprises a plurality of channels, and a plurality of detectors, each being coupled between radio frequency (RF ) signals of two channels. The detector is switchable between a phasedetection mode that detects and outputs a phase direct current (DC) value indicating a phase difference between its coupled two channels, and an amplitude-detection mode that detects and outputs an amplitude DC value indicating an amplitude difference between its coupled two channels. The apparatus further includes a plurality of controllers, each controller is coupled to a corresponding detector comprising a comparator being configured to output at least one offset value comprising a phase offset value based on the phase DC value of the corresponding detector and an amplitude offset value based on the amplitude DC value from the corresponding detector. In one embodiment, each detector is a twin double balanced mixer (TDBM) comprises a pair of double-balanced mixers (DBMs ) with identical topology. In one embodiment, each controller further comprises a calibration circuit being configured to adjust at least one corresponding phase shifter based on corresponding phase offset value and to adjust at least one VGA based on corresponding amplitude offset value.

[0008] Other embodiments and advantages are described in the detailed description below. This summary does not purport to define the invention. The invention is defined by the claims.KI I-008-PCT PATENTBRIEF DESCRIPTION OF THE DRAWINGS

[0009] FIG. 1A (prior art ) illustrates a conventional phase alignment.

[0010] FIG. 1B (Prior Art) illustrates a conventional amplitude alignment.

[0011] FIG. 1C illustrates a method for directly comparing the phase and amplitude at RF frequency.

[0012] FIG. 2 illustrates exemplary diagrams showing the self-phase and self-amplitude architecture for a transceiver.

[0013] FIG. 3A illustrates an exemplary diagram for a phase and amplitude detector that uses two identical mixers to perform phase and amplitude detection.

[0014] FIG. 3B illustrates a circuit diagram for a phase and amplitude detector that uses two identical mixers to perform phase and amplitude detection.

[0015] FIG. 4A illustrates the PDout DC value over the phase difference sweeping from 0-degrees to 360-degrees.

[0016] FIG. 4B illustrates the ADout1 and ADout2 DC value over amplitude sweeping from -20dBm to 10dBm.

[0017] FIG. 5A illustrates a block diagram depicting phase and amplitude calibration.

[0018] FIG. 5B is an exemplary process for performing transmit path phase alignment operations between the transceiver channels, according to one embodiment

[0019] FIG. 5C is an exemplary process for performing transmit path amplitude alignment operations between the transceiver channels, according to one embodiment.

[0020] FIG. 6 is an exemplary process for performing transmit path phase alignment operations between two transceiver channels, according to an embodiment.KI I-008-PCT PATENT

[0021] FIG. 7 is an exemplary process for performing transmit path amplitude alignment operations between two transceiver channels, according to an embodiment.

[0022] FIG. 8 is an exemplary process for performing transmit path amplitude and / or path alighmnet operations between two transceiver channels, according to an embodiment.DETAILED DESCRIPTION

[0023] Reference will now be made in detail to some embodiments of the invention, examples of which are illustrated in the accompanying drawings.

[0024] FIG. 1C illustrates a method for directly comparing the phase and amplitude at RF frequency. In one novel aspect, phase differences and / or amplitude differences are directly compared at RF frequency. Both the phase and amplitude of corresponding transceivers are then adjusted as needed at RF frequency. There is no need for the LO signal to go to the channel' s output, and therefore no LO distribution issues for the calibration circuit.Furthermore, LO j itter can be removed by channel-to-channel frequency mixing to DC.

[0025] A reference channel is chosen to start the calibration, and then its phase and amplitude is compared to the phase and amplitude of another channel. As an exemplary illustration, a pair of channels Channel#! of RF frequency 181 and channel#2 of RF frequency 182 are compared at RF phase & amplitude comparison module 161 and 162. DC voltage control 167a are generated based on the comparison and the phase and amplitude of channel#1 181 and / or channel#2 are adjusted. The second exemplary pair of channel#2 182 and channel#3 183 are compared at RF phaseKI I-008-PCT PATENT& amplitude comparison module 163 and 164. DC voltage control 167b are generated based on the comparison and the phase and amplitude of channel#3 183 are adjusted. The same loop continues until comparing and adjusting channels n-1 and n for n channels. The reference channel in the example above is channel#1, but any channel can be chosen as the reference channel.

[0026] FIG. 2 illustrates exemplary diagrams showing the self-phase and self-amplitude architecture for a transceiver. The transceiver has n channels and n-1 phase and amplitude detectors. A detector is placed between each pair of adjacent channels so that calibration proceeds pairwise along the transmit chain. Self-calibration begins at reference Channel#1 201, proceeds to Channel#2 202, then Channel#3 203, and continues through Channel#N 205. Each pairwise detector compares either phase or amplitude of the two channels at RF, low-pass filters the product to DC, and supplies a digital decision to a local calibrationfinite-state machine (FSM) that steers the downstream phase shifter (PS ) and variable gain amplifier (VGA) of the channel being trimmed.

[0027] Within each channel block (Channel#1 201; Channel#2 202; Channel#3 203; Channel#N 205 ), the transmit path includes a phase shifter labeled PS and a variable-gain amplifier labeled VGA, followed by a power amplifier (PA). Sampling after the PA, such as 212, 222, 232, 252, ensures the calibration includes the full transmit path and thus captures all variations across PS, VGA, and PA. Each path also may include low-noise amplifier (LNA), such as 211, 221, 231, and 251. The sampled PA outputs of adjacent channels feed the corresponding interposed mixer. MIXER1 210 is between Channels #1 and #2; MIXER2 220 is betweenKII-008-PCT PATENTChannel s #2 and # 3; and MIXER (N- l ) 250 i s between Channel s # (N-1 ) and #N. For each channel, the baseband path includes a low pass filter (LPF) (LPF 215, 225, 235, 255) that removes high-frequency mixing products and passes the DC component, a DC MUX (216, 226, 236, 256) that selects the desired detector output (phase or amplitude), and a comparator (217, 227, 237, 257). The digital output of the comparator is consumed by a per-channel calibration finite-state machine (FSM) (218, 228, 238, 258), which orchestrates the calibration sequence and feeds to the PS and VGA via PS OFFSET 282a / 282b / 282c / 282d and VGA OFFSET 281a / 281b / 281c / 281d.

[0028] For example, Self-calibration for the transceiver starts at the reference channel #1 201. Channel #1 201 and channel #2 202 transmit RF signals, which go through a power amplifier (PA) 212 and 222, respectively, and then to the phase and amplitude detector. By sampling after the PA, it is possible to include the entire transmit path and address all variations. The mixer will compare the phase or amplitude of the two channels and then output the DC value to the comparator, such comparator 217 and 227, respectively. The low pass filter (LPF), such as 215 and 225, filters out unwanted high frequency harmonics. The comparator, such as 217, and 227, will output the results as a digital signal to a finite state machine (FSM), such as FSM 218 and FSM 228. If phase and amplitude are different between the two channels (channel #1 201 and channel #2 202), then the FSM 218 and 228 will adjust the phase shifter (PS) 223, and variable gain amplifier (VGA) 224 to sweep the phase and amplitude in channel #2. The FSM 214 and 224 will output a phase offset value to a phaseKI I-008-PCT PATENTshifter 213 and 223 and output an amplitude offset value to the VGA 214 and 224.

[0029] Calibration starts by enabling the detector between the first channel pair and selecting that path (EN SELECT 261 for MIXER1 210 ). Channel#1 201 acts as the reference; Channel#1 and Channel#2 transmit RF signals, which are sampled at PAout from PA ( 212 and 222 ) and mixed in MIXER1 210. The LPF 215 / 225 filters the product to DC and the DC MUX 216 / 226 forwards the appropriate DC term to the comparator 217 / 227. If the comparator indicates that phase and / or amplitude between the two channels differ, the FSM 218 / 228 adjusts PS 223 and VGA 224 in Channel#2 202, sweeping phase and amplitude until the threshold criterion is met. The FSM then stores the resulting PS OFFSET 282b and VGA OFFSET 281b for Channel#2 and disables the detector path for this pair.

[0030] Calibration between the two channels will stop, and both the phase and amplitude detector and comparator will be disabled once a threshold is reached. For example, the threshold may be that there is zero difference in phase and amplitude in an analog phase shifter and VGA, or the threshold may be that the phase and amplitude difference is below one least significant bit (LSB) in a digital phase shifter and VGA between the channels.

[0031] After calibration has been completed between channel#! 201 and channel#! 202, calibration then starts between channel#2 202 and channel#3 203. Calibration proceeds in a similar manner as described between channel#1 201 and channel#2 202. The process repeats for Channel#2 and Channel#3 using MIXER2 220 (enabled by EN SELECT 262 ). I f a difference is detected, FSM 228 / 238 adjusts PS 233 and VGA 234 of Channel#3 203, sweeps to convergence, and storesKI I-008-PCT PATENTPS OFFSET 282c and VGA OFFSET 281c. The same procedure continues pairwise down the array until calibration between Channel# (N-l ) and Channel#N 205 (via MIXER (N-l ) 250 enabled by EN SELECT 265 ) is completed and PS OFFSET 282d and VGA OFFSET 281d are stored for Channel #N. Once all pairs are calibrated, the required per-channel phase offsets are known. The offset phase shift for each channel is retained in a register as offset bits; during operation, the channel ' s effective phase shift equals the originally assigned beamforming phase plus the stored PS OFFSET value. Likewise, the VGA OFFSET value is applied to realize the intended amplitude while preserving the calibrated balance. The offset phase shift register may be stored in the register as the offset bits, and therefore the new phase shift will be the original assigned phase shift plus the offset.

[0032] FIG. 3A illustrates an exemplary diagram for a phase and amplitude detector that uses two identical mixers to perform phase and amplitude detection. In one novel aspect, a detector compares two RF channels using a TDBM that is comprised of two identical mixers DBM 301 and DBM 302 arranged in parallel branches. The inputs to be compared are RF signal from channel#1 305 and RF signal from channel#2 306. Each branch produces a baseband DC output that can be used for amplitude readout, such as ADout1 307 and ADout2 308, and the two branches together provide a differential phase readout Pout 309. In one embodiment, the same twin-mixer structure can be used to read either phase or amplitude directly at RF, producing a DC value that is then low-pass filtered and evaluated by a simple comparator and a calibration finite-state machine. In phase mode, the phase path is enabled while amplitudeKI I-008-PCT PATENTsensing is disabled. In amplitude mode, the opposite holds. Because adjacent channels are upconverted, their LO j itter is coherent and cancels after mixing down to DC. In one embodiment, the TDBM detector is placed between two adjacent channels. ADout1 307 and ADout2 308 provide per-branch amplitude indications, and PDout 309 supplies a signed measure of phase difference.

[0033] FIG. 3B illustrates a circuit diagram for a phase and amplitude detector that uses two identical mixers to perform phase and amplitude detection. The design of double-balanced mixer (DBM) 1 320 is identical to DBM2 330. The Ch1 RF signal 311a will go to the MN1 381a, MN2 382a transconductance stage of the DBM1 320 and the MB1 351b, MB2 352b, MB3 353b, MB4 354b switching stage of the DBM2 330. Similarly, the Ch2 RF signal 312a will go to the MN1 381b, MN2 382b transconductance stage of the DBM2 330 and the MB1 351a, MB2 352a, MB3 353a, MB4 354a switching stage of the DBM1 320. By using complementary routing channels to DBMs 320 and 330, the output signal of channels 1 experiences the combined loading of Zmn_DBMl in parallel with Zmb_DBM2, while the output signal of channel 2 experiences the combined loading of Zmn_DBM2 in parallel with Zmb_DBMl. Here, Zmn_DBMl and Zmn_DBM2 refer to the input impedances of the transconductance stages of DBM1 and DBM2, respectively, while Zmb_DBMl and Zmb_DBM2 refer to the input impedances of the switching stages of DBM1 and DBM2, respectively. Since DBM1 320 and DBM2 330 are identical, we have Zmn_DBMl = Zmn_DBM2 and Zmb_DBMl = Zmb_DBM2. As a result, the mixer input loading seen from both channels will be identical, which helps reduce the phase error of the mixer.KI I-008-PCT PATENT

[0034] By utilizing twin double-balanced mixers (TDMBs ), it is possible to have the same impedance presented to both channels over process, voltage, and temperature (PVT ) variation. In other words, consistent impedance is maintained across all the channels, which is crucial for phase detectors operating at radio frequency and beyond.

[0035] Another advantage of complimentary routing channels to the DBMs is that it is easier to implement the amplitude detector in the mixers for each channel. I f the Chi represents the transmit RF signal of the channel#! where the a) is the frequency, the Al is the amplitude, the 9 is the phase, and the L0:itter is the LO jitter. The Ch2 represents the transmit RF signal of channel#! where the co is the frequency, the A2 is the amplitude, the 0 is the phase, and L0:itter is the LO j itter.

[0036] Since RF signals of channel#! and channel#2 are upconverted using the same LO signal, the LO j itter on channel#! and on channel#! is coherent, therefore, the LO j itter can be removed after the RF signals are down-converted to DC.Chi = Al * COS (cot + 01 + LOjitter )Ch! = A! * COS (cot + 02 + L0: 1tter )

[0037] When phase calibration is to be performed, the phase detector is enabled by setting the Phase_EN ( 301 ) =1, and the amplitude detector will be disabled by making Amp_EN ( 313a and 313b) =0. The bias of the MN1 and MN! is optimized for the best transconductance. The output loading of the mixer is designed to have maximum output full swing range to increase the output DC resolution of the mixer. The mixer output DC resolution is defined as: mismatch error of the mixer / output full swing rangeKII-008-PCT PATENT

[0038] MP 4 304 and MP T 307 are the negat ive 1 / gml loading, and the gml i s the transconductance o f the MP 4 304 and MP T 307. The MP5 305 and MP 8 308 are pos itive l / gm2 loading, the gm2 i s the transconductance of the MP5 305 and MP 8 308. The pos it ive l / gm2 i s des igned to be equal to negat ive 1 / gml, so that the output loading wi l l have inf inite impedance for DC and there fore wil l have the maximum DC gain. The MP 6 30 6 and MP 9 30 9 are the switch to di sable the phase detector. The output DC, PDout 317, after mixing Chi and Ch2 RF signal wi l l be:PDout | DC = | 2 * A1 *A2 * cos ( 0i - 02) l

[0039] The low pass f i lter C_LPF 303 and 304 wil l f ilter out the unwanted high frequency harmonics.

[0040] When doing the ampl itude calibrat ion, the ampl itude detector is enabled by setting the Amp_EN ( 313a and 313b ) =1, and the phase detector wi l l be di sabled by making Phase_EN ( 301 and 302 ) =0. The bias o f the MN1 ( 381 a, 381b ) and the MN2 ( 382a and 382b ) are opt imi zed for the maximum output common mode current, usually a Clas s-B biasing. The MN1 381 a, MN2 382 a, MP 1 371a, MP2 372 a, MP 3 373a of DBM1 320 is the ampl itude detector o f the Chi RF s ignal. It wi l l rect i fy the Chi RF s ignal and output the ADout l DC s ignal 315. MN1 381 a, MN2 382 a act s as the rect i fier circuit, and the MP 1 371 a, MP 2 372 a, MP3 373a sense the common mode current of the MN1 381 a, MN2 382a. The MP 3 373a convert s the current signal to voltage s ignal and output s the ADout l DC s ignal 315.

[0041] S imi larly, for DBM2 330, MN1 381b, MN2 382b, MP 1 371b, MP 2 372b, MP 3 373b o f DBM2 330 is the ampl itude detector of the Ch2 RF s ignal. It wi ll recti fy the Ch2 RF s ignal and output the ADout l DC signal 31 6. The MN1 381b, MN2 382b act s as the rect i fier circuit, and the MP 1 371b,KI I-008-PCT PATENTMP2 372b, MP3 373b sense the common mode current of the MN1 381b, MN2 382b. The MP3 373b converts the current signal to voltage signal and outputs the ADoutl DC signal 316.

[0042] There will be two DC signal outputs:2 * AlADoutl | DC — - IT2 * A2ADout2|DC=-nThe low pass filter C_LPF will filter out the unwanted high frequency harmonics.

[0043] FIG. 4A shows the PDout DC value over the phase difference sweeping from 0-degrees to 360-degrees. The slope in the curve is the phase gain of the mixer, and it should be larger than mismatch error of the mixer / phase resolution of the phase shifter as following:V mismatch error of the mixerPhase gain (Slope, - ) > - degree phase resolution of the phase shifter output DC resolution of the mixer= - x output full swing range phase resolution of the phase shifter

[0044] In order to have the highest phase gain to tolerate a higher mismatch error of the mixer and be capable of having a higher phase resolution of the phase shifter, the preferred phase acquisition will be at around +90 or -90 degrees. In other words, the two channels phase difference will be +90 or -90 degrees after the sweeping of the phase shifter is stopped; therefore, another code shift vector of -90 degrees or +90 degrees will be applied to the phase shifter so that the two channels' phases will be equal to each other, and then the phase calibration is done. Range 411 denotes digital=l; range 412 denotes digital=l and range 413 denotes digital=0.KI I-008-PCT PATENT

[0045] FIG. 4B shows the ADoutl and ADout2 DC value over amplitude sweeping from Piowto Phigh - In one exemplary setting as shown in FIG. 4B, the sweeping is from -20dBm to l OdBm, the Piowbeing -20dBm and Phigh being l OdBm. The slope in the curve is the amplitude gain of the mixer, and it should be larger than mismatch error of the mixer / amplitude resolution of the VGA as following:VAmplitude sain (Slope, - ) >degreemismatch error of the mixeramplitude resolution of the VGA

[0046] In order to have the highest amplitude gain so that we can tolerate a higher mismatch error of the mixer and be capable of having a higher amplitude resolution of the VGA, the preferred amplitude acquisition will be at larger than -l OdBm region 431. In other words, the two channels amplitude will be larger than -lOdBm in this case. Once amplitude acquisition occurs, it stops sweeping the VGA amplitude and the amplitude calibration is done.

[0047] FIG. 5A illustrates a block diagram depicting phase and amplitude calibration. A first channel input 501 and a second channel input 502 are applied to a phase & amplitude detector 511. The detector produces phase or amplitude indicative outputs shown as PDout or (ADout1 - ADout2) 512. PDout 512 signal is filtered by an LPF to suppress high-frequency components and then provided to a comparator 513, which outputs a digital indication of the sign to Calibration FSM 517.

[0048] In one embodiment, after phase / amplitude calibration is done, the FSM will stop sweeping the phase shifter andKI I-008-PCT PATENTVGA and generate a phase and amplitude offset vector for the phase shifter and VGA. The final phase and amplitude setting for a particular beamforming setting for the phase shifter and VGA will be the sum of phase vector 505 and phase offset vector 508 and the sum of amplitude vector 506 and amplitude offset 507, respectively. Phase offset vector 508 and amplitude offset 507, in turn are derived from the calibration FSM 517. The calibration loop with FSM can be a foreground or background loop. RFin 503 is applied in to PS 516 and VGA 515.

[0049] FIG. 5B is an exemplary process for performing transmit path phase alignment operations between the transceiver channels, according to one embodiment. Steps described in connection with the process of FIG. 5B may be implemented by or performed in conjunction with alignment orchestration circuitry that controls the various components as described by the process. In a preferred embodiment, FIG. 5B commences with step 531, where a controller for alignment operations initiates transmit (TX) phase alignment of channels #1 through #M (where M is the total number of transceiver channels to be calibrated). At step 531, an index N for identifying TX channels undergoing phase alignment operations may be set to two.

[0050] Following step 531, the method may proceed to step 532, where a controller for alignment operations may align a phase of TX (N) of TRX (N) to TX (N-1) of TRX (N-l ). For example, when N=2, the phase of TX2 in TRX2 is aligned to the phase of TX1 in TRX1. In such an example, the phase of TX1 may be considered a reference channel to which all the remaining TX channels are effectively aligned ( i. e., by the transitive property of the transmit phase alignment operations ). In other examples, any TX channel may be usedKII-008-PCT PATENTas a re ference channel to which al l the remaining TX channel s are e f fect ively aligned.

[0051] Step 532 may compri se a component step 533.General ly, step 533 involves determining a cal ibrat ion phase o f f set for TX (N ), which i s TX2 when N=2, based on the phase o f a re ference channel TX (N- l ), which i s TX1 when N=2. Speci f ic operat ions of step 533 are described by component steps 534 - 1, 534 -2, 534-3, and 534- 4. At step 534 -1, a detector coupled between an output o f TX (N- l ) and an output TX (N ) may be configured to detect phase, speci f ically to detect a phase di f ference ( i. e., PDout of F IG. 5A). When N=2, the detector configured at step 534 - 1 may correspond to MIXER1 210. In some embodiment s, step 534 -1 may correspond to sett ing Phase_EN to 1, and sett ing Amp_EN to zero. At step 534 -2, transmit paths TX (N- l ) and TX (N ) o f the respect ive transceiver channel s TRX (N- l ) and TRX (N) are enabled. At step 534-3, a control ler coupled to the detector conf igured at step 534 - 1 may determine a phase o f f set for a variable phase shi ft element within TX (N ) that i s required to al ign the phase o f TX (N ) to TX (N- l ) based on an output of the detector conf igured at step 534 - 1.Speci f ic operat ions of step 534 -3 may be described by steps o f FIG. 6, and are not repeated in the descript ion o f FIG.5B. At step 534- 4, a control ler may conf igure a phase shi ft element within TX (N ) us ing the phase of f set determined at step 534-3.

[0052] Proceeding to step 536, al ignment orchestrat ion circuitry may determine i f any transceiver channel transmit paths remain that have not yet been included in phase al ignment operations such as those described by step 532. I f there are indeed any remaining transceiver channel s that have not yet been included in phase alignment operat ions,KI I-008-PCT PATENTthen the value of N may be incremented by one, and the method may proceed to step 532 and repeat the phase alignment operations for TX (N) relative to TX (N-1) for the new value of N. The method of FIG. 5B may conclude with the performance of phase alignment operations for TX (N) and TX (N-1) where N is equal to M, and M is the total number of transceiver channels.

[0053] In some embodiments, the transmit phase alignment operations of FIG. 5B align every TX path within the transceiver (TRX) channels with reference to a single TX path, such as the TX path of a first TRX, sometimes referred to as TX1 of TRX1. TX1 and TRX1 may be used as the reference transmit path to which the phases of other TX paths in other TRXs are effectively calibrated, although any TX of any TRX may be used as the reference transmit path to which phases of other TX paths in other TRXs are calibrated. Following the completion of transmit phase alignment operations of FIG. 5B, the phase offset configuration values for configurable phase shift elements within TX paths of the transceiver channels, determined by performance of the transmit phase alignment operations, may be applied to the configurable phase shift elements within TX paths of the transceiver paths. Following the application of the determined phase offset configuration values for phase shift elements within TX paths of the transceiver channels, all of the TX path phase angles are set to be the same angle, and additional alignment operations such as RX phase alignment operations may be performed. Due to variation in components of the individual TX paths, setting all of the TX path phase values to be the same angle, e. g. 0 ° or 100 °, may be achieved by applying different respective phase offsetKI I-008-PCT PATENTconfiguration values as determined during transmit phase alignment operations to each configurable phase shift element within the TX paths.

[0054] FIG. 5C is an exemplary process for performing transmit path amplitude alignment operations between the transceiver channels, according to one embodiment. Steps described in connection with the process of FIG. 5C may be implemented by or performed in conjunction with alignment orchestration circuitry that controls the various components as described by the process. In a preferred embodiment, FIG. 5C commences with step 581, where a controller for alignment operations initiates transmit (TX) amplitude alignment of channels #1 through #M (where M is the total number of transceiver channels to be calibrated). At step 581, an index N for identifying TX channels undergoing amplitude alignment operations may be set to two.

[0055] Following step 581, the method may proceed to step 582, where a controller for alignment operations may align an amplitude of TX (N) of TRX (N) to an amplitude of TX (N-1) of TRX (N-l ). For example, when N=2, the amplitude of TX2 in TRX2 is aligned to the amplitude of TX1 in TRX1. In such an example, the amplitude of TX1 may be considered a reference channel amplitude to which all the remaining TX channels are effectively aligned ( i. e., by the transitive property of the transmit amplitude alignment operations ). In other examples, any TX channel may be used as a reference channel to which all the remaining TX channels are effectively aligned.

[0056] Step 582 may comprise a component step 583.Generally, step 583 involves determining a calibration amplitude offset for TX (N), which is TX2 when N=2, based onKII-008-PCT PATENTthe ampl itude o f a reference channel TX (N- l ), which i s TX1 when N=2. Speci f ic operat ions o f step 583 are described by component steps 584 - 1, 584 -2, 584-3, and 584- 4. At step 584 -1, a detector coupled between an output o f TX (N- l ) and an output TX (N ) may be configured to detect ampl itude, speci f ically to detect an ampl itude di f ference ( i. e., ADout l - Adout 2 o f F IG. 5A). When N=2, the detector conf igured at step 584- 1 may correspond to MIXER1 210. In some embodiment s, step 584 -1 may correspond to sett ing Amp_ EN to " 1", and sett ing Phase_ EN to " 0". At step 584 -2, transmit paths TX (N- l ) and TX (N ) o f the respect ive transceiver channel s TRX (N-l ) and TRX (N) are enabled. At step 584 -3, a controller coupled to the detector conf igured at step 584 - 1 may determine an ampl itude o f fset for a variable gain ampl i f ier (VGA) within TX (N ) that is required to align the ampl itude o f TX (N ) to TX (N- l ) based on an output o f the detector configured at step 584 - 1. Speci fic operat ions o f step 584-3 may be described by steps o f FIG.7, and are not repeated in the description of F IG. 5C. At step 584 - 4, a controller may configure a VGA within TX (N) us ing the ampl itude of f set determined at step 584-3.

[0057] Proceeding to step 536, a controller may determine i f any transceiver channel t ransmit paths remain that have not yet been included in ampl itude al ignment operat ions such as those described by step 532. I f there are indeed some remaining transceiver channel s that have not yet been included in amplitude al ignment operations, then the value o f N may be incremented by one, and the method may proceed to step 532 and repeat the ampl itude alignment operat ions for TX (N ) relat ive to TX (N-1) for the new value o f N.

[0058] In some embodiment s, the transmit ampl itude al ignment operat ions of F IG. 5C al ign every TX pathKI I-008-PCT PATENTamplitude within the TRX channels with reference to a single TX path amplitude, such as the TX path amplitude of a first TRX, sometimes referred to as TX1 of TRX1. TX1 and TRX1 may be used as the reference transmit path to which the amplitudes of other TX paths in other TRXs are effectively calibrated, although any TX of any TRX may be used as the reference transmit path to which phases of other TX paths in other TRXs are calibrated. Following the completion of transmit amplitude alignment operations of FIG. 5C, the phase offset configuration values for configurable phase shift elements within TX paths of the transceiver channels, determined by performance of the transmit amplitude alignment operations, may be applied to the VGAs within TX paths of the transceiver paths.Following the application of the determined amplitude offset configuration values for VGAs within TX paths of the transceiver channels, all of the TX path amplitudes are set to be the same value. Due to variation in components of the individual TX paths, setting all of the TX path amplitude values to be the same value may be achieved by applying different respective amplitude offset configuration values as determined during transmit amplitude alignment operations to each VGA within the TX paths.

[0059] Notably, although the phase alignment and amplitude alignment processes of FIGS. 5B and 5C are presented as separate, distinct, and non-overlapping processes, such a presentation is merely illustrative and should not limit the scope of these processes. Ordinarily skilled artisans will appreciate that some embodiments may involve interleaving the processes of FIGS. 5B and 5C so that TX phase alignment and TX amplitude alignment are performedKI I-008-PCT PATENTfor a given pair of TRX channels before proceeding to perform TX phase alignment and TX amplitude alignment for a subsequent pair of TRX channels. As an example, in some embodiments the process of FIG. 5B performed by alignment orchestration circuitry may proceed to step 582 of FIG. 5C after performing step 532, rather than proceeding directly to step 536 of FIG. 5B. In such an example, after performing step 582 of FIG. 5C, a value of N may be incremented ( for the indices used by both FIGS. 5B and 50) before proceeding to step 532 of FIG. 5B. As another example, alignment orchestration circuitry in some embodiments may first perform step 582 of FIG. 50 for a given pair of TRX channels before proceeding to perform step 532 of FIG. 5B for the given pair, and then incrementing N ( for the indices used by both FIGS. 50 and 5B).

[0060] FIG. 6 is an exemplary process for performing transmit path phase alignment operations between two transceiver channels, according to an embodiment. The process of FIG. 6 may refer to operations performed using the TDBMs coupled between output terminals of the TX channels, specifically the operations associated with determining a phase offset of a variable phase shift element within a TX path whose calibration phase offset is being determined. The process of FIG. 6 may refer to operations performed at step 534-3 of FIG. 5B. At step 601, first and second signals are received at a phase detector. The first and second signals correspond to respective TX output signals of first and second TRXs, where a first TRX is adjacent to the second TRX. As an example, the first signals may correspond to the TX (N-1) output and the second signals may correspond to the TX (N)KI I-008-PCT PATENToutput for any given value of N from 2 to M, where M is the total number of TRXs to perform phase alignment operations on. As an example, step 601 may correspond to signals 501 and 502 being received at detector 511 of FIG. 5A. At step 602, a low pass filter such as LPF 512 receives an output of the phase detector.

[0061] At step 603, an output of the low pass filter corresponding to a DC value that is proportional to a phase difference between the adjacent channels is received at a comparator such as comparator 513 of FIG. 5A. Notably, the DC value received at the comparator is proportional to the phase difference between the respective entireties of components of the adjacent channels, not just the phase difference between the configurable phase shift elements within said adjacent channels. At step 604, a digital output of the comparator, indicative of whether the phase difference between the signals for two adjacent channels is equal to a predetermined amount, is received at a calibration FSM. In some examples, a first input terminal of the comparator may receive the LPF output signal, and a second input terminal of the comparator may receive a fixed reference voltage value corresponding to phase detector output when a phase difference between the signals for two adjacent channels is equal to the predetermined amount.The predetermined amount may correspond to ±90 °. In some embodiments, a single fixed reference voltage provided to the second input terminal of the comparator may correspond to the predetermined amount of ±90 °, due to the shape of the DC output of the phase detector over the phase differences of signals at its inputs. As an example, the DC output of the phase detector (shown by FIG. 4A) may have an equivalent level when a phase difference of its inputKI I-008-PCT PATENTsignals is +90 ° and when a phase difference of input signals is -90 °, or equivalently, 270 °.

[0062] The process then proceeds to step 605, where the calibration FSM iteratively adjusts a phase shift configuration value for a phase shift element that provides the second signals to the phase detector. Step 605 may also be referred to as sweeping the phase shift configuration value of the phase shift element in a transmit path being phase aligned to a reference transmit path. In some embodiments, the iterative adjustment of the phase shift configuration value may be performed using a binary search or by iteratively decrementing or incrementing a phase shift configuration value by a fixed step size. As an example, the sweep or iterative adjustment of the phase offset configuration value may begin by setting the transmit path phase shift configuration value of the phase shift element in the transmit path being aligned to a respective transmit path to a value of 0 ° and then modifying the phase offset configuration value according to a binary search method, a positive ramp method, or a negative ramp method, until the DC output of the phase detector indicates a phase difference between its input signals corresponds to the predetermined amounts of ±90 °, corresponding to phase differences of 90 ° or 270 °.

[0063] At step 606, the calibration FSM halts further adjustment or sweeping of the phase offset configuration value provided to the phase shift element that provides signals to the second input of the phase detector, in response to determining that the digital output of the comparator indicates the phase difference between the signals for two adjacent channels is equal to theKI I-008-PCT PATENTpredetermined amounts of ±90 °. Calibration FSM may determine that further adjustment or sweeping of the phase offset configuration value can be halted in response to a change in the output of the comparator, in embodiments where the adjustment or sweeping of the phase offset configuration value occurs by a positive ramp method ( incrementing the phase offset configuration value) or a negative ramp method (decrementing the phase offset configuration value ). Such a change in the comparator output may indicate that the phase offset configuration value has caused the DC output of the phase detector to cross the reference voltage, indicating that the phase difference between the signals for two adjacent channels is egual to the predetermined amounts of ±90 °. In embodiments where the adjustment or sweeping of the phase offset configuration occurs by a binary search method, determination of the highest resolution phase offset configuration values associated with changes to the comparator output may indicate that further adjustment or sweeping the phase offset configuration value can be halted. The two channels phase difference will be +90 ° or -90 ° after the adjustment of the of the phase offset configuration value is halted

[0064] The process then proceeds to step 607, where the system applies a code shift vector corresponding to a negative phase shift with a magnitude equal to the predetermined amount to the phase shift element that provides the second signals to the phase detector. An intermediate calibration value, corresponding to the value of the phase offset vector or configuration value at the time the adjustment was halted, may be modified by adding a predetermined offset value corresponding to theKI I-008-PCT PATENTpredetermined amount of phase offset from the intermediate calibration value to generate a final calibration value. As an example, if the two channels ' phase difference is +90 ° when the sweeping of the phase shifter is stopped, then a final calibration value may be determined by applying a code shift vector or phase offset corresponding to a -90 ° (negative 90 ° ) offset to the intermediate calibration value. As another example, if the two channels ' phase difference is -90 ° (negative 90 ° ) when the sweeping of the phase shifter is stopped, then a final calibration value may be determined by applying a code shift vector or phase offset corresponding to a +90 ° (positive 90 ° ) offset to the intermediate calibration value. Code shift vectors or phase offsets corresponding to negative 90 ° and positive 90 ° may be determined by a processor (not illustrated), stored in a memory (not illustrated), and applied to the configurable phase shift element by the calibration FSM. The phase shift element of each transmit path may be configured using the final calibration value during normal operations. By the process of step 607, the phases of the two transmit paths input to the phase detector may be phase aligned.

[0065] At step 607, the calibration vector that aligns the phases of the first and second signals may be saved in a calibration table. In some embodiments, a configuration value during normal operations, for a configurable phase shift element within the TX channel that provides the second signals to the detector, may be based on a combination of a phase value derived from or otherwise required by a particular beamforming setting and the calibration vector that aligns the phases of the first and second signals.KI I-008-PCT PATENT

[0066] FIG. 7 is an exemplary process for performing transmit path amplitude alignment operations between two transceiver channels, according to an embodiment. The process of FIG. 7 may refer to operations performed using the TDBMs coupled between output terminals of the TX channels, specifically the operations associated with determining an amplitude offset of a VGA within a TX path whose calibration amplitude offset is being determined.The process of FIG. 7 may refer to operations performed at step 584-3 of FIG. 5C. At step 701, first and second signals are received at an amplitude detector. The first and second signals correspond to respective TX output signals of first and second TRXs, where a first TRX is adjacent to the second TRX. As an example, the first signals may correspond to the TX (N-1) output and the second signals may correspond to the TX (N) output for any given value of N from 2 to M, where M is the total number of TRXs to perform amplitude alignment operations on. As an example, step 701 may correspond to signals 501 and 502 being received at detector 511 of FIG. 5A. At step 702, a low pass filter such as LPF 512 receives an output of the amplitude detector.

[0067] At step 703, an output of the low pass filter corresponding to a DC value that is proportional to an amplitude difference between the adjacent channels is received at a comparator such as comparator 513 of FIG. 5A. Notably, the DC value received at the comparator is proportional to the amplitude difference between the respective entireties of components of the adjacent channels, not just the amplitude difference between the configurable VGAs within said adjacent channels. At step 704, a digital output of the comparator, indicative ofKI I-008-PCT PATENTwhether the amplitude difference between the signals for two adjacent channels is equal to a predetermined amount, is received at a calibration FSM. In some examples, a first input terminal of the comparator may receive the LPF output signal, and a second input terminal of the comparator may receive a fixed reference voltage value corresponding to amplitude detector output when a amplitude difference between the signals for two adjacent channels is equal to zero.

[0068] The process then proceeds to step 705, where the calibration FSM iteratively adjusts an amplitude shift configuration value for a VGA that provides the second signals to the amplitude detector. Step 705 may also be referred to as sweeping the amplitude shift configuration value of the VGA in a transmit path being amplitude aligned to a reference transmit path. In some embodiments, the iterative adjustment of the amplitude shift configuration value may be performed using a binary search or by iteratively decrementing or incrementing an amplitude shift configuration value by a fixed step size. As an example, the sweep or iterative adjustment of the amplitude offset configuration value may begin by setting the transmit path amplitude shift configuration value of the VGA in the transmit path being aligned to a respective transmit path to a particular value and then modifying the amplitude offset configuration value according to a binary search method, a positive ramp method, or a negative ramp method, until the DC output of the amplitude detector indicates a amplitude difference between its input signals corresponds to zero amplitude difference (or a difference within 1 least significant bit (LSB) of a digital VGA configuration value).KI I-008-PCT PATENT

[0069] At step 706, the calibration FSM halts further adjustment or sweeping of the amplitude offset configuration value provided to the VGA that provides signals to the second input of the amplitude detector, in response to determining that the digital output of the comparator indicates the amplitude difference between the signals for two adjacent channels is equal to zero (or is within 1 LSB of a digital VGA configuration value ).Calibration FSM may determine that further adjustment or sweeping of the amplitude offset configuration value can be halted in response to a change in the output of the comparator, in embodiments where the adjustment or sweeping of the amplitude offset configuration value occurs by a positive ramp method (incrementing the amplitude offset configuration value ) or a negative ramp method (decrementing the amplitude offset configuration value ). Such a change in the comparator output may indicate that the amplitude offset configuration value has caused the DC output of the amplitude detector to cross the reference voltage, indicating that the amplitude difference between the signals for two adjacent channels is equal to zero. In embodiments where the adjustment or sweeping of the amplitude offset configuration occurs by a binary search method, determination of the highest resolution amplitude offset configuration values associated with changes to the comparator output may indicate that further adjustment or sweeping the amplitude offset configuration value can be halted. The two channels ' amplitude difference will be zero or within one LSB of a digital VGA configuration value after the adjustment of the of the amplitude offset configuration value is halted.KI I-008-PCT PATENT

[0070] The process then proceeds to step 707, where the system saves the calibration vector that aligns the amplitudes of the first and second signals in a calibration table. In some embodiments, a configuration value during normal operations, for a VGA within the TX channel that provides the second signals to the detector, may be based on a combination of an amplitude value derived from or otherwise reguired by a particular beamforming setting and the calibration vector that aligns the amplitudes of the first and second signals.

[0071] FIG. 8 is an exemplary process for performing transmit path amplitude and / or path alignment operations between two transceiver channels, according to an embodiment. The process of FIG. 8 may refer to operations performed using the TDBMs coupled between output terminals of the TX channels, specifically the operations associated with determining a phase offset of a variable phase shift element within a TX path whose calibration phase offset is being determined and / or determining an amplitude offset of a VGA within a TX path whose calibration amplitude offset is being determined. At step 801, the process configures a first detector coupled between first and second channels of the transceiver channels to operate in a phase detection mode. At step 802, in response to configuring the first detector in the phase detection mode, the process performs phase alignment operations for the first and the second channels based on outputs of the first detector. At step 803, the process configures the first detector coupled between the first and the second channels to operate in an amplitude detection mode. At step 803, the process configures the first detector coupled between the first and the second channels to operate in an amplitude detectionKI I-008-PCT PATENTmode. At step 804, in response to configuring the first detector in the amplitude detection mode, the process performs amplitude alignment operations for the first and the second channels based on the outputs of the first detector. At step 805, in response to performing the phase alignment operations and the amplitude alignment operations for the first and the second channels, the process configures a second detector coupled between the second channel and a third channel of the transceiver channels in the phase detection mode or the amplitude detection mode. At step 806, in response to configuring the second detector in the phase detection mode or the amplitude detection mode, the process performs the phase alignment operations or the amplitude alignment operations for the second and the third channels based on outputs of the second detector

[0072] Although the present invention has been described in connection with certain specific embodiments for instructional purposes, the present invention is not limited thereto. Accordingly, various modifications, adaptations, and combinations of various features of the described embodiments can be practiced without departing from the scope of the invention as set forth in the claims.

Claims

KI I-008-PCT PATENTCLAIMSWhat is claimed is:

1. An apparatus with a phased array transceiver, the apparatus comprising:a plurality of channels, wherein each channel includes a phase shifter and a variable gain amplifier (VGA) for a corresponding antenna element;a plurality of detectors, each detector being coupled between radio frequency (RF) signals of two channels, wherein each detector is switchable between:a phase-detection mode that detects and outputs a phase value indicating a phase difference between its coupled two channels; andan amplitude-detection mode that detects and outputs an amplitude value indicating an amplitude difference between its coupled two channels.

2. The apparatus of claim 1, wherein each detector comprises a first double-balanced mixer (DBM) and a second DBM, and wherein the first DBM and the second DBM are identical.

3. The apparatus of claim 2, wherein the first DBM and the second DBM are driven with complementary routing in which a first channel RF signal is applied to a transconductance stage of the first DBM and to a switching stage of the second DBM, and a second channel RF signal is applied to a transconductance stage of the second DBM and to a switching stage of the first DBM.KI I-008-PCT PATENT4. The apparatus of claim 1, wherein each phase value is proportional to a phase difference between two corresponding channels, and each amplitude value is proportional to an amplitude difference between two corresponding channels.

5. The apparatus of claim 1, further comprising:a plurality of controllers, each coupled to a corresponding detector, comprising a comparator, and being configured to output at least one offset value selected from the group consisting of: a phase offset value based on the phase value of the corresponding detector, and an amplitude offset value based on the amplitude value from the corresponding detector.

6. The apparatus of claim 5, wherein each of the plurality of controllers further comprises a calibration circuit being configured to adjust at least one corresponding phase shifter based on a corresponding phase offset value and to adjust at least one VGA based on a corresponding amplitude offset value.

7. The apparatus of claim 6, wherein the calibration circuit is a Finite-State-Machine (FSM).

8. The apparatus of claim 7, wherein the FSM stops sweeping the phase shifter and the VGA when acquisition criteria are met.

9. The apparatus of claim 8, wherein the FSM generates a phase offset vector for a corresponding phase shifter and an amplitude offset vector for a corresponding VGA.KII-008-PCT PATENT10. The apparatus o f claim 8, wherein a calibrat ion loop with the FSM i s a foreground loop or a background loop.

11. The apparatus o f claim 10, wherein the foreground loop i s event trigger us ing binary search.

12. The apparatus o f claim 10, wherein the background loop i s a least mean sguares ( LMS ) loop with s low t ime response13. The apparatus o f claim 1, further compri s ing:a plurality o f power ampli f iers (PAs ), wherein each PA i s coupled to a corresponding channel and ampl i f ies corresponding RF s ignal from corresponding phase shi fter.

14. The apparatus o f claim 1, wherein each phase shi fter i s conf igured to adjust a phase of a subsequent input s ignal based on a corresponding phase of f set value as sociated with a beamforming sett ing.

15. The apparatus o f claim 1, the plural ity o f transmit channel s compri ses N channel s and the plurality o f RF detectors comprises N-l detectors.1 6. The apparatus o f claim 15, wherein each o f the plural ity of detectors i s coupled between two channel s.

17. The apparatus o f claim 1, further compri s ing a low-pass f i lter between each detector and it s corresponding comparator to suppress higher-frequency mixer product s.KI I-008-PCT PATENT18. A method for aligning transceiver channels, comprising:configuring a first detector coupled between first and second channels of the transceiver channels to operate in a phase detection mode;in response to configuring the first detector in the phase detection mode, performing phase alignment operations for the first and the second channels based on outputs of the first detector;configuring the first detector coupled between the first and the second channels to operate in an amplitude detection mode;in response to configuring the first detector in the amplitude detection mode, performing amplitude alignment operations for the first and the second channels based on the outputs of the first detector;in response to performing the phase alignment operations and the amplitude alignment operations for the first and the second channels, configuring a second detector coupled between the second channel and a third channel of the transceiver channels in the phase detection mode or the amplitude detection mode; andin response to configuring the second detector in the phase detection mode or the amplitude detection mode, performing the phase alignment operations or the amplitude alignment operations for the second and the third channels based on outputs of the second detector.

19. The method of claim 18, wherein performing the phase alignment operations for the first and the second channels comprises:KI I-008-PCT PATENTiteratively adjusting a phase offset associated with the second channel;monitoring the outputs of the first detector in response to the iterative adjustment of the phase offset; andhalting the iterative adjustment of the phase offset in response to determining the outputs of the first detector indicate that a phase difference between the first and the second channels is equal to a predetermined amount.

20. The method of claim 18, wherein performing the amplitude alignment operations for the first and the second channels comprises:iteratively adjusting an amplitude offset associated with the second channel;monitoring the outputs of the first detector in response to the iterative adjustment of the amplitude offset; andhalting the iterative adjustment of the amplitude offset in response to determining the outputs of the first detector indicate that an amplitude difference between the first and the second channels is equal to zero.

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