Wafer measurement method and apparatus, electronic device and storage medium

Abstract

A wafer measurement method and apparatus, an electronic device and a storage medium. The method comprises: acquiring a reference image obtained by scanning a reference wafer; on the basis of the reference image, acquiring positional information of reference dies in the reference wafer, so as to obtain a die distribution map; and, on the basis of the die distribution map, performing morphology measurement on dies to be measured in a wafer to be measured, so as to acquire morphology measurement data of the dies to be measured. The solution helps to improve the measurement efficiency of wafers, and reduce the occupation of computer resources by a large amount of measurement data.

Description

Wafer measurement methods, apparatus, electronic devices and storage media

[0001] This application claims priority to Chinese Patent Application No. 202411662841.9, filed on November 20, 2024, entitled "Wafer Measurement Method, Apparatus, Electronic Device and Storage Medium", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of wafer measurement, and more specifically, to a wafer measurement method, apparatus, electronic device, storage medium, and computer program product. Background Technology

[0003] Modern chips typically contain three-dimensional structures, such as transistor stacks, micro-circuit layers, and multi-layered metal interconnects. The characteristics of these structures have a significant impact on chip performance and power consumption, thus requiring accurate measurement of their three-dimensional properties. Wafer 3D measurement technology is a key technology in the semiconductor manufacturing field, used to evaluate and measure various characteristics and parameters on integrated circuits (chips) to ensure their performance and quality.

[0004] Three-dimensional measurement of wafers typically requires the use of measuring tools such as atomic force microscopy (AFM), transmission electron microscopy (TEM), and ion beam cutting (FIB) to obtain three-dimensional information at different levels on the wafer, including height, depth, volume, and contour. In related technologies, acquiring three-dimensional data of the wafer requires scanning the entire wafer to obtain a large amount of 3D data, followed by identification, segmentation, and measurement operations. This approach is time-consuming and has low measurement efficiency. Summary of the Invention

[0005] This application is made in consideration of the above-mentioned problems. This application provides a wafer measurement method, apparatus, electronic device, storage medium, and computer program product. This solution enables real-time measurement of the wafer based on the three-dimensional data obtained during wafer scanning, which helps to improve wafer measurement efficiency.

[0006] According to a first aspect of this application, a wafer measurement method is provided. The method includes: acquiring a reference image obtained by scanning a reference wafer; acquiring the position information of reference grains within the reference wafer based on the reference image to obtain a grain distribution map; and performing morphology measurement on the grains to be measured within the wafer to be measured based on the grain distribution map to obtain morphology measurement data of the grains to be measured.

[0007] In one optional implementation, the reference image is obtained by scanning the reference wafer using a first image acquisition module along a first preset scanning path; wherein the first preset scanning path is zigzag or bow-shaped.

[0008] In one optional implementation, obtaining the position information of a reference grain within a reference wafer based on a reference image includes: identifying dicing channels in the reference image to obtain the position information of each dicing channel in the reference wafer; determining the position of each lattice segmented by the dicing channels based on the position information of each dicing channel in the reference wafer to obtain the position information of the lattice, wherein at least a portion of the lattices within the reference wafer include the reference grain; and performing template matching in the reference image based on a preset grain template image and the position of the lattice to obtain the position information of the reference grain.

[0009] In one optional embodiment, the grain distribution map includes the position information of the dicing channels, which are used to segment each reference grain within the reference image. After obtaining the position information of the reference grains within the reference wafer based on the reference image to obtain the grain distribution map, the method further includes: adjusting the orientation of the wafer under test according to the position information of the dicing channels so that the orientation of the wafer under test meets a preset orientation requirement, the adjustment including rotation and / or translation; wherein the wafer under test has the same structure as the reference wafer, and the preset orientation requirement satisfies that the dicing channels of the wafer under test are parallel or perpendicular to a preset direction.

[0010] In one optional implementation, the morphology measurement of the grains to be measured within the wafer under test according to the grain distribution map includes: determining the region to be measured in the grain distribution map, the region to be measured including the grain region where the target reference grain is located, the position of the target reference grain in the reference wafer being consistent with the position of the grain to be measured in the wafer under test; determining a second preset scanning path for the second image acquisition module to scan the wafer under test based on the region to be measured, the scanning area covered by the second preset scanning path including the region to be measured; and acquiring the morphology measurement data obtained by the second image acquisition module scanning the wafer under test according to the second preset scanning path.

[0011] In one optional implementation, the reference image is obtained by scanning the reference wafer using a first image acquisition module while the reference wafer is placed on the motion control platform and the platform is moving. The grain distribution map includes motion control position information corresponding to the reference grains, which is the position information of the motion control platform when the first image acquisition module scans the reference grains. The morphology measurement data is obtained by scanning the wafer under test using a second image acquisition module while the wafer under test is placed on the motion control platform and the platform is moving. The data obtained by scanning the wafer under test using the second image acquisition module according to a second preset scanning path is also considered. The morphology measurement data includes: acquiring the current motion control position information of the motion control platform during its movement along the reverse path of the second preset scanning path; when the current motion control position information matches the motion control position information corresponding to any reference grain, determining the grain region where the target grain to be tested is located according to the grain distribution map, and acquiring the regional morphology measurement data within the grain region where the target grain to be tested is located, including the regional morphology measurement data corresponding to each grain to be tested in the wafer to be tested; wherein the position of the target grain to be tested in the wafer to be tested is consistent with the position of the reference grain in the reference wafer.

[0012] In one optional implementation, the reference image is obtained by scanning the reference wafer using a first image acquisition module according to a first preset scanning path; the scanning area covered by the second preset scanning path is smaller than the scanning area corresponding to the first preset scanning path.

[0013] In one optional implementation, the grain distribution map includes the location information of a reference grain; the location information of the reference grain includes: the length and width of the reference grain, and includes: the coordinates and / or row and column information of the center point of the reference grain, the row and column information including the number of rows and the number of columns to which it belongs.

[0014] According to a second aspect of this application, a wafer measurement apparatus is also provided, comprising: a first acquisition module for acquiring a reference image obtained by scanning a reference wafer; a second acquisition module for acquiring the position information of reference grains within the reference wafer based on the reference image to obtain a grain distribution map; and a morphology measurement module for performing morphology measurement on the grains to be measured within the wafer to be measured based on the grain distribution map to obtain morphology measurement data of the grains to be measured.

[0015] According to a third aspect of this application, an electronic device is also provided, comprising: a processor and a memory, wherein the memory stores computer program instructions, which are executed by the processor to perform the wafer measurement method described above.

[0016] According to a fourth aspect of this application, a storage medium is also provided, on which program instructions are stored, which are used to execute the wafer measurement method described above when the program instructions are executed.

[0017] According to a fifth aspect of this application, a computer program product is also provided, including computer program instructions that, when run, are used to perform the wafer measurement method as described above.

[0018] The aforementioned technical solution measures the morphology of the test grains on a wafer of the same type using a grain distribution map that includes the location information of a reference grain. This allows for rapid and accurate determination of the test grain to which the obtained morphology measurement data belongs, as well as the grain's position within the wafer. This saves time spent identifying and segmenting the morphology measurement data of all grains, thus improving wafer measurement efficiency. Furthermore, the morphology measurement data obtained through this method can be stored as individual test grains using a data-based discrete memory storage method. This avoids centrally storing the measured morphology measurement data in a single computer storage space, reducing the resource consumption of large amounts of measurement data.

[0019] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0020] The above and other objects, features, and advantages of this application will become more apparent from the more detailed description of the embodiments of this application in conjunction with the accompanying drawings. The accompanying drawings are used to provide a further understanding of the embodiments of this application and form part of the specification. They are used together with the embodiments of this application to explain this application and do not constitute a limitation thereof. In the accompanying drawings, the same reference numerals generally represent the same components or steps.

[0021] Figure 1 shows a schematic flowchart of a wafer measurement method according to an embodiment of this application;

[0022] Figure 2 shows a schematic diagram of the surface structure of a reference wafer according to an embodiment of this application;

[0023] Figure 3 shows a schematic structural block diagram of a wafer measurement apparatus according to an embodiment of this application;

[0024] Figure 4 shows a schematic block diagram of an electronic device according to an embodiment of the present application. Detailed Implementation

[0025] To make the objectives, technical solutions, and advantages of this application more apparent, exemplary embodiments according to this application will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are merely some embodiments of this application, and not all embodiments of this application. It should be understood that this application is not limited to the exemplary embodiments described herein. Based on the embodiments of this application described herein, all other embodiments obtained by those skilled in the art without inventive effort should fall within the protection scope of this application.

[0026] As mentioned above, in related technologies, when performing 3D measurement on a wafer, the entire wafer needs to be scanned to obtain a large amount of 3D wafer data. Identifying, segmenting, and measuring all of this 3D wafer data is time-consuming. This application provides a wafer measurement method, apparatus, electronic device, storage medium, and computer program product. This solution allows for real-time measurement of the wafer based on the obtained 3D wafer data during the wafer scanning process, which helps improve wafer measurement efficiency.

[0027] Please refer to Figure 1, which is a schematic flowchart of a wafer measurement method according to an embodiment of this application. According to a first aspect of this application, a wafer measurement method is provided, the method comprising: steps S110, S120, and S130.

[0028] In step S110, a reference image obtained by scanning the reference wafer is acquired.

[0029] For example, the reference wafer can be any one of multiple wafers of the same model as the wafer to be measured (i.e., the wafer under test), or it can be a non-wafer of the same model as the wafer under test. After determining the reference wafer, an image acquisition module can be used to scan the reference wafer. The image acquisition module can be a two-dimensional image acquisition module for acquiring two-dimensional information of the target object's surface, or a three-dimensional image acquisition module for acquiring three-dimensional information of the target object. More specifically, the image acquisition module can be, for example, an industrial camera, a CCD camera, a CMOS camera, a laser confocal microscope (CLSM), a scanning probe microscope (SPM), a white light interferometer (WLI), etc. In some embodiments, the scanning area of ​​the image acquisition module can cover the entire surface area of ​​the reference wafer or at least the surface area where all reference grains are located. In this case, the scanning of the reference wafer can be completed while the image acquisition module and the reference wafer are relatively stationary, obtaining a reference image containing the entire surface area of ​​the reference wafer or the surface area where all reference grains are located. In other embodiments, the scanning area of ​​the image acquisition module may cover only a portion of the surface area of ​​the reference wafer or specifically only the surface area where a portion of the reference dies are located. In this case, the reference wafer can be fixedly placed on a motion control platform, the image acquisition module can be positioned at a specific location, and the motion control platform can be controlled to move along a preset path. During the movement of the motion control platform, the image acquisition module scans the reference wafer, and image processing algorithms such as image correction and stitching are used to obtain a reference image that can include the entire surface area of ​​the reference wafer or the surface area where all the reference dies are located. Image correction algorithms may include, for example, gamma correction and histogram equalization, and image stitching algorithms may include, for example, Laplacian pyramid fusion and weighted fusion. The specific location of the image acquisition module and the preset path of the motion control platform can satisfy the following: during the movement of the motion control platform, the union of the scanning areas of the image acquisition module can cover the entire surface area of ​​the reference wafer or the surface area where all the reference dies are located. Alternatively, the reference wafer can also be positioned at a specific location, and the image acquisition module can be controlled to move along a preset path, with the image acquisition module scanning the reference wafer during the movement. Similarly, image processing algorithms can be used to obtain a reference image that includes the entire surface area of ​​the reference wafer or the surface area containing all the reference dies. The specific location of the reference wafer and the preset path of the image acquisition module can satisfy the following condition: during the movement of the image acquisition module, the union of the scanning areas of the image acquisition module can cover the entire surface area of ​​the reference wafer or the surface area containing all the reference dies. It can be understood that the obtained reference image can be a grayscale image or an RGB image, etc.

[0030] In step S120, the position information of the reference grains in the reference wafer is obtained based on the reference image to obtain a grain distribution map.

[0031] Please refer to Figure 2, which is a schematic diagram of the surface structure of a reference wafer according to an embodiment of this application. The surface of the reference wafer may have multiple mutually perpendicular dicing lines. In Figure 2, the multiple mutually perpendicular horizontal lines and multiple vertical lines represent multiple dicing lines, and each square divided by the multiple dicing lines can represent a lattice. For any lattice, it may include a reference die, or it may not include a reference die. That is, all lattices divided by the dicing lines on the reference wafer may include reference dies, or they may only partially include reference dies. Exemplarily, the reference wafer in the reference image may contain multiple reference dies, and each reference die may have position information. The position information may include relative position information used to indicate the relative position of the reference die in the reference wafer. For example, the position information of the reference die may include the row and column information of the reference die in the reference wafer (including the number of rows and the number of columns). As another example, a coordinate system can be established in the reference wafer, and the position information of the reference die may include the coordinate information of the center point of the reference die in the established coordinate system. In some embodiments, the reference image is an image acquired by the image acquisition module during the movement of a motion control platform on which the reference wafer is placed. The motion control platform may have a motion control coordinate system. In this case, the position information of the reference die may also include the coordinate information of the motion control platform when it scans the corresponding reference die in the motion control coordinate system. In other embodiments, the reference image is an image acquired by the image acquisition module during its movement. Similarly, the image acquisition module may have a module coordinate system. In this case, the position information of the reference die may also include the coordinate information of the image acquisition module when it scans the corresponding reference die in the module coordinate system. After acquiring the position information of the reference die, a diemap can be generated based on the position information of the reference die. The diemap can represent the distribution of the reference die within the reference wafer.

[0032] In step S130, the morphology of the grains to be tested in the wafer to be tested is measured according to the grain distribution map to obtain the morphology measurement data of the grains to be tested.

[0033] For example, the wafer under test can be a wafer of the same model as the reference wafer, meaning that the distribution of each die within the wafer under test is consistent with the distribution of each die within the reference wafer. When measuring the morphology of each die under test within each wafer under test, an image acquisition module can be used to scan the die under test. This image acquisition module can be a 3D image acquisition module used to acquire 3D information of the target object, and it can be the same as or different from the image acquisition module used when acquiring the reference image. When scanning the die under test within the wafer under test, the position information of the reference die in the die distribution map can be matched with the position of the die under test. Specifically, for each reference die of the reference wafer, there can be a die under test in the wafer under test that satisfies the following condition: the relative position of this die under test on the wafer under test is consistent with the relative position of the reference die on the reference wafer. When performing morphology measurements on each die to be tested, the location information of the die can be determined based on the die distribution map. The resulting morphology measurement data can be identified as the morphology measurement data of the die in the wafer to be tested corresponding to that location information. The morphology measurement data may include, for example, the height, number, and spacing of the spherical solder bumps in the die to be tested, as well as the height and width of the traces laid out.

[0034] The aforementioned technical solution measures the morphology of the grains to be measured on the wafer under test using a grain distribution map that includes the location information of reference grains. This allows for rapid and accurate determination of the grain to which the obtained morphology measurement data belongs and its position within the wafer during measurement. This saves time spent identifying and segmenting the morphology measurement data of all grains, thus improving wafer measurement efficiency. Furthermore, the morphology measurement data obtained through this method can be stored as individual grains, employing a data-based discrete memory storage method. This avoids centrally storing the measured morphology measurement data in a single computer storage space, reducing the resource consumption of large amounts of measurement data.

[0035] Optionally, the reference image is obtained by scanning the reference wafer using a first image acquisition module along a first preset scanning path; wherein the first preset scanning path is zigzag or bow-shaped.

[0036] For example, the image acquisition module used to scan the reference wafer can be referred to as the first image acquisition module. The scanning area of ​​the first image acquisition module can cover a portion of the surface area of ​​the reference wafer or specifically cover a portion of the surface area where the reference dies are located. Before scanning the reference wafer, a first preset scan path can be set. For example, the first preset scan path can include multiple scan lines, each of which can be a straight line and parallel to each other. Each scan line can have a scan start point and a scan end point. The first preset scan path can be zigzag-shaped. When the first preset scan path is zigzag-shaped, the direction from the scan start point to the scan end point of each scan line can be the same. For ease of description, the scan lines are arranged in a direction perpendicular to each other, and each scan line is sequentially referred to as the first scan line, the second scan line, ..., the Nth scan line (N is greater than 1). The first image acquisition module scans the reference wafer in a zigzag pattern. Specifically, this can include: sequentially scanning from the starting point of each scan line to the ending point of that scan line, following the order from the first scan line to the Nth scan line (or from the Nth scan line to the first scan line); or, sequentially scanning from the starting point of each scan line to the ending point of that scan line, and then scanning from the ending point of that scan line to the starting point of the next scan line adjacent to it, following a straight line direction pointing from the ending point of that scan line to the starting point of the next scan line adjacent to it. The spacing between two adjacent scan lines can be the same or different. The spacing between two adjacent scan lines can satisfy the following: the union of the scan areas scanned by the first image acquisition module along one scan line intersects with the union of the scan areas scanned along the other scan line, or, in either union, there is an edge line that coincides with the edge line in the other union. Referring to Figure 2, several exemplary scan lines L1 are shown during zigzag scanning.

[0037] In some embodiments, the reference wafer can be fixedly mounted on a motion control platform, which can move according to a first preset motion path. This first preset motion path can be the same trajectory as, but in the opposite direction to, a first preset scanning path. The first preset motion path can include movement lines corresponding one-to-one with each scanning line, and the length of each movement line can be equal to the length of its corresponding scanning line. Each movement line can have a starting point and a ending point. The direction from the starting point to the ending point of each movement line can be the same, and opposite to the direction from the starting point to the ending point of any scanning line. Accordingly, the arrangement direction of each movement line is the same as the arrangement direction of the corresponding scanning lines. Arranging the movement lines according to their arrangement direction allows them to be denoted as the first movement line, the second movement line, ..., the Nth movement line (N is greater than 1). It can be understood that when the motion control platform moves according to the first preset motion path, the first image acquisition module can scan the reference wafer according to the first preset scanning path. Specifically, during the scanning process, the motion trajectory of the motion control platform is as follows: the starting point of the first motion line—the ending point of the first motion line—the starting point of the second motion line—the ending point of the second motion line—the starting point of the third motion line—…—the ending point of the Nth motion line. Furthermore, the motion control platform moves in a straight line throughout the entire process. During the motion of the motion control platform, the first image acquisition module can scan the reference wafer when the motion control platform moves from the starting point of the current motion line to the ending point of that motion line; or it can scan the reference wafer when the motion control platform moves from the starting point of the current motion line to the ending point of that motion line, and then scan the reference wafer when the ending point of the current motion line moves to the starting point of the next motion line adjacent to the current motion line.

[0038] In other embodiments, when scanning the reference wafer, the reference wafer can remain stationary while the first image acquisition module moves along a second preset motion path. Similarly, the second preset motion path can have the same trajectory and direction as the first preset scanning path. The second preset motion path can include moving lines corresponding one-to-one with each scan line, and the length of each moving line can be equal to the length of its corresponding scan line. Each moving line can have a starting point and a ending point, and the direction from the starting point to the ending point of each moving line can be the same, and is also the same as the direction from the starting point to the ending point of any scan line. Accordingly, the arrangement direction of each moving line is the same as the arrangement direction of the scan lines corresponding to each moving line. By arranging each moving line according to its arrangement direction, each moving line can be denoted as the first moving line, the second moving line, ..., the Nth moving line (N is greater than 1). Specifically, during the scanning process, the movement trajectory of the first image acquisition module is as follows: starting point of the first moving line—ending point of the first moving line—starting point of the second moving line—ending point of the second moving line—starting point of the third moving line—…—ending point of the Nth moving line. Furthermore, the first image acquisition module moves in a straight line throughout its movement. During the movement of the first image acquisition module, it can scan the reference wafer when it moves from the starting point of the current moving line to the ending point of that moving line; or it can scan the reference wafer when it moves from the starting point of the current moving line to the ending point of that moving line, and then scan the reference wafer when it moves from the ending point of the current moving line to the starting point of the next moving line adjacent to the current moving line.

[0039] In one specific embodiment, the first preset scanning path is zigzag-shaped, and the scanning area of ​​the first image acquisition module is rectangular. In this embodiment, the scan lines contained in the first preset scanning path are of equal length and equal spacing, and the line connecting the scanning start points (or scanning end points) of each scan line is a straight line, and this line is perpendicular to the scan line. The spacing between any two adjacent scan lines can satisfy the following: the union of the scanning areas scanned by the first image acquisition module along one scan line and the union of the scanning areas scanned along another scan line share a common edge line. More specifically, the scanning start point and scanning end point of the first scan line, and the scanning start point and scanning end point of the Nth scan line, each correspond to a scanning area within the outer rectangle of the reference wafer, sharing vertices with the outer rectangle, and each of the four scanning areas shares a different common vertex with the outer rectangle.

[0040] For example, the first preset scan path can also be bow-shaped, and its configuration is similar to that of a bow-shaped first preset scan path. For a bow-shaped first preset scan path, the scan lines are of equal length, and the line connecting the endpoints of each scan line at either end is a straight line perpendicular to any scan line. Furthermore, for any two adjacent scan lines, the direction from the scanning start point of one scan line to the scanning end point is opposite to the direction from the scanning start point of the other scan line to the scanning end point. When the reference wafer and the first image acquisition module move relative to each other, the first preset motion path and trajectory of the motion control platform, or the second preset motion path and trajectory of the first image acquisition module, are similar to the above scheme and will not be elaborated further. Referring to Figure 2, several exemplary scan lines L2 are shown during bow-shaped scanning.

[0041] The above technical solution sets the first preset scanning path to a zigzag or bow shape, which enables scanning of the reference wafer to be completed in a short time along a shorter scanning path. It also helps to reduce the area of ​​repeated scanning and makes it less likely to miss the area of ​​the reference wafer that needs to be scanned, thus saving scanning time and improving measurement efficiency.

[0042] Optionally, obtaining the position information of the reference grain within the reference wafer based on the reference image includes: identifying the dicing channels in the reference image to obtain the position information of each dicing channel in the reference wafer; determining the position of each lattice segmented by the dicing channels based on the position information of each dicing channel in the reference wafer to obtain the position information of the lattice, wherein at least some lattices within the reference wafer include the reference grain; and performing template matching in the reference image based on a preset grain template image and the position of the lattice to obtain the position information of the reference grain.

[0043] For example, after acquiring a reference image, the cutting paths in the reference image can be identified. Specifically, the reference image can be binarized, subjected to morphological processing (e.g., opening, closing, dilation, and erosion), and line fitting (e.g., Hough transform) to extract straight lines from the reference image as cutting paths. The reference image may include multiple cutting paths, wherein for each cutting path, some cutting paths within the reference image are parallel to that cutting path, and the remaining cutting paths (excluding that cutting path) are perpendicular to it. Each cutting path may have positional information; specifically, a coordinate system can be established within the acquired reference image, and the positional information of each cutting path may include the coordinates of points on each cutting path. Alternatively, the arrangement directions of the cutting paths within the reference image can be denoted as the first direction and the second direction. Cutting paths arranged along the first direction can be denoted as the first column cutting path, the second column cutting path, ..., the Kth column cutting path (K is an integer and K > 1). Cutting paths arranged along the second direction can be denoted as the first row cutting path, the second row cutting path, ..., the Mth row cutting path (M is an integer and K > 1). Then, the position information of each cutting path can include the row number or column number to which it belongs. It can be understood that the first direction and the second direction are perpendicular to each other; cutting paths arranged along the first direction are parallel to each other, and their respective lines are parallel to the second direction; cutting paths arranged along the second direction are parallel to each other, and their respective lines are parallel to the first direction.

[0044] For example, in a reference image, a rectangle formed by two adjacent and parallel dices and two other adjacent, parallel, and perpendicular dices can represent a lattice. For each lattice, the position information of the lattice can be determined based on the position information of the four dices that make up the lattice. Specifically, the coordinates of the center point of the lattice can be determined based on the coordinates of each point that makes up the lattice in the four dices, or the row and column information of the lattice can be determined based on the row and column numbers of each of the four dices. For example, if a lattice is enclosed by the fifth column, sixth column, second row, and third row of dices, then the row and column information of the lattice can be that it is located in the second row and fifth column of all lattices. Accordingly, the position information of the lattice can include the coordinates of the center point of the lattice, and can also include the row and column information of the lattice. After obtaining the position information of the lattice, a preset grain template image can be used to perform template matching with the reference image. Specifically, the preset grain template image may include lattices and feature information that correspond one-to-one with the positions of each lattice of the reference wafer. The feature information of each lattice in the grain template image can be used to indicate whether the lattice contains a reference grain. Based on the preset grain template image and the positions of each lattice within the reference wafer, the reference lattice and its position information within the reference wafer can be determined. The reference lattice may include a reference grain, and the position information of the included reference grain can be determined based on the position information of the reference lattice. In some embodiments, the position information of the reference grain can be represented by the position information of its corresponding reference lattice.

[0045] The above technical solution can quickly and accurately obtain the position of each lattice segmented by the cutting channel based on the position of the cutting channel by identifying the cutting channel in the reference image. By matching it with the preset grain template image, the position information of the effective reference lattice can be determined in the reference image, and then the position information of the reference grain can be determined, thus achieving accurate positioning of the reference grain.

[0046] Optionally, the grain distribution map includes the position information of the dicing channels, which are used to segment each reference grain within the reference image. After obtaining the position information of the reference grains within the reference wafer based on the reference image to obtain the grain distribution map, the method further includes: adjusting the orientation of the wafer under test according to the position information of the dicing channels so that the orientation of the wafer under test meets the preset orientation requirements. The adjustment includes rotation and / or translation. The wafer under test has the same structure as the reference wafer, and the preset orientation requirements satisfy that the dicing channels of the wafer under test are parallel or perpendicular to the preset direction.

[0047] For example, the dicing position information can be used to predict the orientation of the wafer under test (WAT) so as to adjust the orientation of the WAT. For wafers in the same batch (including a reference wafer and a WAT ​​with the same structure as the reference wafer), it can be assumed that the orientation of each wafer is the same during loading. Based on the dicing position information corresponding to the reference wafer, the orientation of the reference wafer and the WAT can be determined. When scanning the wafer using an image acquisition module, the wafer can be fixedly placed on the scanning platform. In some embodiments, the scanning platform can be a motion control platform for moving the wafer during the wafer scanning process; in other embodiments, the scanning platform can remain stationary during wafer scanning. When the wafer is loaded onto the scanning platform, the wafers in the same batch are in the same orientation on the scanning platform. When it is determined that there is an offset in the WAT based on the dicing position information, the dicing of the WAT can be controlled to be parallel or perpendicular to a preset direction when the WAT is located on the scanning platform by rotation and / or translation operations. Specifically, the preset direction can be, for example, the extension direction of the processing line used to process each wafer (including the reference wafer and the target wafer). Before the wafer to be tested, a dicing track parallel to a specific direction can be used as a reference dicing track. The rotated reference dicing track can be parallel to the preset direction, and other dicing tracks besides the reference dicing track can be perpendicular to the preset direction.

[0048] The above technical solution adjusts the orientation of the wafer under test based on the position information of the dicing track, which can more accurately determine the deviation of the physical position of the wafers in the current batch. By adjusting the orientation of the wafer under test, the dicing track of the wafer can be made parallel to the extension direction of the processing line, which is beneficial to the subsequent precise processing of the wafer.

[0049] Optionally, the morphology measurement of the grains to be measured within the wafer under test is performed according to the grain distribution map, including: determining the region to be measured in the grain distribution map, the region to be measured including the grain region where the target reference grain is located, the position of the target reference grain in the reference wafer being consistent with the position of the grain to be measured in the wafer under test; determining a second preset scanning path for the second image acquisition module when scanning the wafer under test based on the region to be measured, the scanning area covered by the second preset scanning path including the region to be measured; and acquiring the morphology measurement data obtained by the second image acquisition module scanning the wafer under test according to the second preset scanning path.

[0050] For example, the grain to be tested in the grain distribution map may include the region containing all the grains in the grain distribution map, or it may include a portion of all the grains. This portion of grains can be selected by the user according to actual needs, serving as the target reference grain. The grain region containing the target reference grain is the region to be tested in the grain distribution map. For each wafer to be tested, the position of the grain to be tested within that wafer is consistent with the position of the target reference grain within the reference wafer. The region to be tested can be used to determine a second preset scanning path, such as a zigzag or bow-shaped path. When the second image acquisition module scans the wafer to be tested according to the second preset scanning path, the union of the scanning regions of the second image acquisition module at each position can at least cover the region to be tested. The second image acquisition module can be a three-dimensional image acquisition module used to acquire three-dimensional information of the target object. It may be the same as or different from the first image acquisition module used when acquiring the reference image. During the scanning process of the wafer under test by the second image acquisition module, the morphology measurement data of the grains under test within the current scanning area can be acquired in real time. Specifically, when the second image acquisition module acquires the morphology measurement data, the position information of the grains within the current scanning area can be determined based on the relative position of the second image acquisition module and the wafer under test, so as to match it with the position information of the target reference grain in the grain distribution map, and then the obtained morphology measurement data is determined as the morphology measurement data of the reference grain at the corresponding position within the reference wafer.

[0051] The above technical solution determines the area to be measured in the grain distribution map, and can reset the second preset scanning path according to the determined area to be measured. In particular, when the area to be measured is only a part of the surface area of ​​the wafer, the second preset scanning path can be shortened to reduce scanning time and improve measurement efficiency.

[0052] Optionally, the reference image is obtained by scanning the reference wafer using a first image acquisition module while the reference wafer is placed on the motion control platform and the platform is moving. The grain distribution map includes motion control position information corresponding to the reference grains, which is the position information of the motion control platform when the first image acquisition module scans the reference grains. The morphology measurement data is obtained by scanning the wafer under test using a second image acquisition module while the wafer under test is placed on the motion control platform and the platform is moving. The morphology measurement data obtained by scanning the wafer under test using the second image acquisition module according to a second preset scanning path is also considered. The data includes: acquiring the current motion control position information of the motion control platform during its movement along the reverse path of the second preset scanning path; when the current motion control position information matches the motion control position information corresponding to any reference die, determining the die region where the target die to be tested is located according to the die distribution map, and acquiring the regional morphology measurement data within the die region where the target die to be tested is located, including the regional morphology measurement data corresponding to each die to be tested in the wafer under test; wherein the position of the target die to be tested in the wafer under test is consistent with the position of the reference die in the reference wafer.

[0053] For example, when acquiring a reference image, a reference wafer can be placed on a motion control platform, which moves to drive the reference wafer. During this movement, the first image acquisition module can scan the reference wafer. Furthermore, for each reference die scanned during the scanning process, the position information of the motion control platform can be acquired as the motion control position information of that reference die. The die distribution map can include the motion control position information of each reference die. Within the movement range of the motion control platform, two mutually perpendicular grating rulers can be set. For example, when the movable stage is stationary at a predetermined initial physical position, the reading of the grating rulers can be set to 0, and this physical position can be defined as the origin O of the world coordinate system. A first grating ruler can be set along a first direction through the origin O, and the axis of the first grating ruler can be used as the X-axis of the world coordinate system. A second grating ruler is set perpendicular to the X-axis and through the origin O. The axis of the second grating ruler can be used as the Y-axis of the world coordinate system. After establishing the aforementioned world coordinate system, each time the motion control platform and the wafer on the platform move, the corresponding X-axis and Y-axis coordinates can be read from the first and second grating rulers. These (X, Y) coordinates can represent the motion control position information of each reference die within the reference wafer. It can be understood that (X, Y) can be coordinate data used to represent the displacement of the reference die.

[0054] In some embodiments, after acquiring the grain distribution map, the orientation of the wafer under test can be adjusted according to the position information of the dicing traces in the grain distribution map to control the dicing traces of the wafer under test to be parallel or perpendicular to a preset direction. Adjusting the orientation of the wafer under test can be achieved by adjusting the orientation of the motion control platform. Similarly, the adjustment can include translation and / or rotation. The second image acquisition module is positioned the same as the first image acquisition module, and the physical positions of the centers (i.e., the centers of the fields of view) of their respective corresponding scanning areas are the same. In this case, after adjusting the orientation of the motion control platform, the relative positions of the first image acquisition module and the motion control platform are different from those of the second image acquisition module and the motion control platform. Taking any point on the surface of the motion control platform as an example, before adjusting the motion control platform, its coordinates are denoted as (x, y). Then, the motion control position information of the reference grain at the corresponding position within the reference wafer is (x, y). After adjusting the motion control platform, the motion control coordinates of this point within the motion control platform are acquired and denoted as (X, Y). Correspondingly, the motion control position information of the test grain at the corresponding position within the wafer under test is (X, Y). It is understandable that for each point on the surface of the motion control platform, there is a one-to-one mapping relationship between its coordinates before and after adjustment. When determining the grain region of the currently scanned grain to be tested relative to the current wafer to be tested based on the grain distribution map, the reference grain in the grain distribution map corresponding to the currently scanned grain to be tested can be determined based on the mapping relationship between the motion control coordinates of the motion control platform before and after adjustment. Specifically, still taking the motion control coordinates of the motion control platform before and after adjustment as (x, y) and (X, Y) respectively as an example, when the second image acquisition module scans the current grain to be tested and obtains the motion control coordinates of the grain to be tested as (X, Y), the current grain to be tested can be matched with the reference grain with motion control coordinates of (x, y) in the grain distribution map based on the mapping relationship. The grain region where the reference grain with control coordinates (x, y) is located in the reference wafer can be determined as the grain region where the grain to be tested with control coordinates (X, Y) is located in the wafer under test. The region topography measurement data obtained by the second image acquisition module is then determined as the region topography measurement data of the grain (i.e., the target grain to be tested) within that grain region in the wafer under test. It can be understood that the target grain to be tested in the wafer under test corresponds to a reference grain in the reference wafer whose control position information is mapped to that of the target grain to be tested. The position of the target grain to be tested in the wafer under test is consistent with the position of the corresponding reference grain in the reference wafer. The topography measurement data of the wafer under test can include the region topography measurement data corresponding to the grains in each grain region (and the region where each grain to be tested is located) within the wafer under test.

[0055] For example, the test area of ​​the wafer under test can be determined in a reference image, and a second preset scanning path of the second image acquisition module can be determined based on the test area. The motion control platform can move along a path opposite to the second preset scanning path (the trajectory is the same as the second preset scanning path but in the opposite direction). During the movement of the motion control platform, the current motion control position information (e.g., motion control coordinates) of the motion control platform can be acquired. It can be understood that the motion control position information of some points on the surface of the motion control platform can be used as the motion control position information of the die under test within the wafer under test at the corresponding position.

[0056] The above technical solution can match the motion control position information of the die under test with the motion control position information of the reference die, determine the relative position of the die under test in the wafer under test based on the matching result, and match the obtained morphology measurement data with the die at the corresponding position in the wafer under test based on the matching result. In this way, the morphology measurement data obtained by the second image acquisition module at different positions on the motion control platform can be accurately matched with the die at the corresponding position in the wafer under test.

[0057] Optionally, the reference image is obtained by scanning the reference wafer using a first image acquisition module according to a first preset scanning path; the scanning area covered by the second preset scanning path is smaller than the scanning area corresponding to the first preset scanning path.

[0058] For example, when the first image acquisition module scans the reference wafer according to the first preset scanning path, the scanning area can cover all reference dies within the reference wafer. The resulting reference image can include the entire surface area of ​​the reference wafer or at least cover the surface area where all reference dies are located. The grain distribution map generated based on the reference image can include the grain area where all dies of the reference wafer are located. The test area determined in the grain distribution map can be the grain area where some reference dies are located on the reference wafer. In other words, the test area can be smaller than the scanning area of ​​the reference wafer scanned by the first image acquisition module. In this case, the scanning area covered by the second preset scanning path can be smaller than the scanning area corresponding to the first preset scanning path.

[0059] The above technical solution can effectively save the scanning time of the die to be tested and improve the measurement efficiency of each wafer to be tested.

[0060] Optionally, the grain distribution map includes the location information of a reference grain; the location information of the reference grain includes: the length and width of the reference grain, and includes: the coordinates and / or row and column information of the center point of the reference grain, the row and column information including the number of rows and columns to which it belongs.

[0061] For example, the grain distribution map may record the position information of each reference grain. The position information of the reference grain may include the length and width of the reference grain and the coordinates of the center point of the reference grain (these coordinates are within the coordinate system established in the grain distribution map). Alternatively, the position information of the reference grain may include the length and width of the reference grain, and the row and column number of the reference grain in the grain distribution map. Or, the position information of the reference grain may include the length and width of the reference grain, the coordinates of the center point of the reference grain, and the row and column number of the reference grain in the grain distribution map.

[0062] The above technical solution can accurately and intuitively indicate the position of the reference grain in the reference wafer by setting the length, width, center point coordinates and / or row and column information of the reference grain in the grain distribution map. This is beneficial for the grain to be tested to be accurately located in the wafer to be tested when the corresponding position information is obtained during the scanning of the wafer to be tested.

[0063] Please refer to Figure 3, which is a schematic structural block diagram of a wafer measurement apparatus according to one embodiment of this application. According to a second aspect of this application, a wafer measurement apparatus 300 is also provided, comprising:

[0064] The first acquisition module 310 is used to acquire a reference image obtained by scanning a reference wafer.

[0065] The second acquisition module 320 is used to acquire the position information of the reference grains in the reference wafer based on the reference image, so as to obtain a grain distribution map;

[0066] The morphology measurement module 330 is used to perform morphology measurement on the grains to be measured in the wafer to be measured according to the grain distribution map, so as to obtain the morphology measurement data of the grains to be measured.

[0067] Please refer to Figure 4, which is a schematic block diagram of an electronic device according to an embodiment of this application. According to a third aspect of this application, an electronic device 400 is also provided, including: a processor 410 and a memory 420, wherein the memory 410 stores computer program instructions, which are executed by the processor 410 to perform the above-described wafer measurement method.

[0068] According to a fourth aspect of this application, a storage medium is also provided, on which program instructions are stored. When the program instructions are executed by a computer or processor, the computer or processor performs corresponding steps of the wafer measurement method described in the embodiments of this application, and is used to implement corresponding modules in the wafer measurement apparatus described in the embodiments of this application or corresponding modules in the wafer measurement apparatus described above. The storage medium may, for example, include a memory card of a smartphone, a storage component of a tablet computer, a hard disk of a personal computer, a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a portable compact disc read-only memory (CD-ROM), a USB memory, or any combination of the above storage media. A computer-readable storage medium may be any combination of one or more computer-readable storage media.

[0069] According to a fifth aspect of this application, a computer program product is also provided, including computer program instructions that, when run, are used to perform the wafer measurement method as described above.

[0070] Those skilled in the art can understand the specific implementation and beneficial effects of the above-described wafer measurement device by reading the detailed description of the wafer measurement method above, and for the sake of brevity, they will not be described in detail here.

[0071] Although exemplary embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above exemplary embodiments are merely illustrative and are not intended to limit the scope of this application. Various changes and modifications can be made therein by those skilled in the art without departing from the scope and spirit of this application. All such changes and modifications are intended to be included within the scope of this application as claimed in the appended claims.

[0072] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0073] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed.

[0074] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of this application may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.

[0075] Similarly, it should be understood that, in order to streamline this application and aid in understanding one or more of the various inventive aspects, features of this application may sometimes be grouped together in a single embodiment, figure, or description thereof in the description of exemplary embodiments of this application. However, this approach should not be construed as reflecting an intention that the claimed application requires more features than are expressly recited in each claim. Rather, as reflected in the corresponding claims, its inventive point lies in solving the corresponding technical problem with features fewer than all features of a single disclosed embodiment. Therefore, the claims following the detailed description are hereby expressly incorporated into that detailed description, wherein each claim itself is a separate embodiment of this application.

[0076] Those skilled in the art will understand that, apart from the mutual exclusion of features, all features disclosed in this specification (including the accompanying claims, abstract, and drawings) and all processes or units of any method or apparatus so disclosed can be combined in any combination. Unless otherwise expressly stated, each feature disclosed in this specification (including the accompanying claims, abstract, and drawings) may be replaced by an alternative feature that serves the same, equivalent, or similar purpose.

[0077] Furthermore, those skilled in the art will understand that although some embodiments herein include certain features included in other embodiments but not others, combinations of features from different embodiments are intended to be within the scope of this application and form different embodiments. For example, in the claims, any of the claimed embodiments can be used in any combination.

[0078] The various component embodiments of this application can be implemented in hardware, or as software modules running on one or more processors, or a combination thereof. Those skilled in the art will understand that microprocessors or digital signal processors (DSPs) can be used in practice to implement some or all of the functions of some modules in a wafer measurement apparatus according to embodiments of this application. This application can also be implemented as an apparatus program (e.g., a computer program and computer program product) for performing part or all of the methods described herein. Such an implementation of this application can be stored on a computer-readable medium, or can be in the form of one or more signals. Such signals can be downloaded from an Internet website, provided on a carrier signal, or provided in any other form.

[0079] It should be noted that the above embodiments are illustrative of this application and not restrictive, and that those skilled in the art can devise alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses should not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. This application can be implemented by means of hardware comprising several different elements and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by the same item of hardware. The use of the words first, second, and third, etc., does not indicate any order. These words can be interpreted as names.

[0080] The above are merely specific embodiments or descriptions of specific embodiments of this application. The scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. The scope of protection of this application shall be determined by the scope of the claims.

Claims

1. A wafer measurement method, characterized in that, include: Obtain a reference image obtained by scanning a reference wafer; The location information of the reference grains within the reference wafer is obtained based on the reference image to obtain a grain distribution map; Based on the grain distribution map, the morphology of the grains to be tested within the wafer under test is measured to obtain the morphology measurement data of the grains to be tested.

2. The method according to claim 1, characterized in that, The reference image is obtained by scanning the reference wafer using a first image acquisition module according to a first preset scanning path; The first preset scanning path is either zigzag or bow-shaped.

3. The method according to claim 1 or 2, characterized in that, The step of obtaining the position information of the reference grain within the reference wafer based on the reference image includes: The reference image is subjected to cut line identification to obtain the position information of each cut line in the reference wafer; Based on the position information of each dicing track in the reference wafer, the position of each lattice segmented by the dicing track is determined to obtain the position information of the lattice. At least a portion of the lattices in the reference wafer include the reference grain. Based on a preset grain template image and the position of the lattice, template matching is performed in the reference image to obtain the position information of the reference grain.

4. The method according to claim 1 or 2, characterized in that, The grain distribution map includes the location information of the cutting channels, which are used to segment each of the reference grains within the reference image; After obtaining the position information of the reference grains within the reference wafer based on the reference image to obtain a grain distribution map, the method further includes: The orientation of the wafer under test is adjusted according to the position information of the dicing channel so that the orientation of the wafer under test meets the preset orientation requirements. The adjustment includes rotation and / or translation. The wafer under test has the same structure as the reference wafer, and the preset orientation requirement satisfies that the dicing path of the wafer under test is parallel or perpendicular to the preset direction.

5. The method according to claim 1 or 2, characterized in that, The step of measuring the morphology of the grains to be tested within the wafer to be tested based on the grain distribution map includes: The test area is determined in the grain distribution map. The test area includes the grain region where the target reference grain is located. The position of the target reference grain in the reference wafer is consistent with the position of the test grain in the test wafer. Based on the area to be tested, a second preset scanning path is determined for the second image acquisition module when scanning the wafer to be tested, and the scanning area covered by the second preset scanning path includes the area to be tested; The topography measurement data is obtained by the second image acquisition module scanning the wafer under test according to the second preset scanning path.

6. The method according to claim 5, characterized in that, The reference image is obtained by scanning the reference wafer with a first image acquisition module during the process of the reference wafer being placed on the motion control platform and the motion control platform moving. The die distribution map includes motion control position information corresponding to the reference die, and the motion control position information is the position information of the motion control platform when the first image acquisition module scans the reference die. The morphology measurement data is obtained by scanning the wafer under test using the second image acquisition module during the process of the wafer under test being placed on the motion control platform and the motion control platform moving. The acquisition of the morphology measurement data obtained by the second image acquisition module scanning the wafer under test according to the second preset scanning path includes: During the movement of the operation control platform along the reverse path of the second preset scanning path, the current operation control position information of the operation control platform is obtained; When the current motion control position information matches the motion control position information corresponding to any reference grain, the grain region where the target grain to be tested is located is determined according to the grain distribution map, and the regional topography measurement data of the grain region where the target grain to be tested is located is obtained. The topography measurement data includes the regional topography measurement data corresponding to each grain to be tested in the wafer to be tested. The position of the target test grain in the test wafer is consistent with the position of the reference grain in the reference wafer.

7. The method according to claim 5, characterized in that, The reference image is obtained by scanning the reference wafer using a first image acquisition module according to a first preset scanning path; The scanning area covered by the second preset scanning path is smaller than the scanning area corresponding to the first preset scanning path.

8. The method according to claim 1, characterized in that, The grain distribution map includes the location information of the reference grain; The position information of the reference grain includes: the length and width of the reference grain, and includes: the coordinates of the center point of the reference grain and / or row and column information, wherein the row and column information includes the number of rows and the number of columns to which it belongs.

9. A wafer measuring device, characterized in that, include: The first acquisition module is used to acquire a reference image obtained by scanning a reference wafer; The second acquisition module is used to acquire the position information of the reference grains in the reference wafer based on the reference image, so as to obtain a grain distribution map; The morphology measurement module is used to perform morphology measurement on the grains to be measured in the wafer to be measured according to the grain distribution map, so as to obtain the morphology measurement data of the grains to be measured.

10. An electronic device comprising a processor and a memory, characterized in that, The memory stores computer program instructions, which, when executed by the processor, are used to perform the wafer measurement method as described in any one of claims 1-8.

11. A storage medium on which program instructions are stored, characterized in that, The program instructions are used to execute the wafer measurement method as described in any one of claims 1-8 when the program is run.

12. A computer program product comprising computer program instructions, characterized in that, The computer program instructions, when executed, are used to perform the wafer measurement method as described in any one of claims 1-8.

Images