Integrated circuit device, production method for integrated circuit device, and electromechanical instrument operated by integrated circuit device

Abstract

An integrated circuit device according to the present invention includes: a substrate that has at least a principal surface; a diamond layer that is provided so as to contact the principal surface of the substrate; an electrical input unit, an electrical output unit, and a plurality of electrical elements that are provided on the surface of the diamond layer on the opposite side from the substrate; and an electrical circuit that electrically connects the electrical input unit, the electrical output unit, and the plurality of electrical elements. At least a portion of the plurality of electrical elements includes an isolated electrical element that is isolated from the plurality of electrical elements. The isolated electrical element is an element that is electrically cut off from the plurality of electrical elements or an element that is isolated by having a different function from the plurality of electrical elements.

Description

Integrated circuit device, method for manufacturing an integrated circuit device, and electrical machinery and equipment operating with an integrated circuit device

[0001] This disclosure relates to an integrated circuit device, a method for manufacturing an integrated circuit device, and an electromechanical device operating with an integrated circuit device.

[0002] Patent Document 1 describes an integrated circuit that includes one diamond semiconductor element and other microwave irradiation systems, detection units, etc., on the same silicon substrate.

[0003] WO2020 / 054860

[0004] Integrated circuit devices are being considered that combine active elements such as transistors and passive elements such as resistors and capacitors on a single substrate made of stacked diamonds. However, in the case of integrated circuit devices fabricated on a single diamond substrate, the various properties of the diamond substrate vary greatly, making it difficult to obtain integrated circuit devices with characteristics that match the desired design in a high yield.

[0005] Therefore, the purpose of this disclosure is to obtain integrated circuit devices with desired design performance, fabricated on a diamond-layered substrate, with high yield.

[0006] The integrated circuit device according to this disclosure comprises a substrate having at least a main surface, a diamond layer provided in contact with the main surface of the substrate, an electrical input section, an electrical output section, and a plurality of electrical elements on the surface of the diamond layer opposite to the substrate, and further comprises an electrical circuit electrically connecting the electrical input section, the electrical output section, and the plurality of electrical elements, wherein at least a portion of these plurality of electrical elements are isolated electrical elements separated from these plurality of electrical elements. Here, an isolated electrical element refers to an element that is electrically disconnected from the plurality of electrical elements, or an element that is separated because it has a different function from the plurality of electrical elements.

[0007] The manufacturing method for an integrated circuit device according to this disclosure comprises the steps of: preparing a substrate; creating a diamond layer in contact with the substrate; creating an electrical input section, an electrical output section, and a plurality of electrical elements on the surface of the diamond layer opposite to the substrate; creating an electrical circuit that electrically connects these electrical input section, the electrical output section, and the plurality of electrical elements; and evaluating the characteristics of these plurality of electrical elements, and further comprising a separation step of separating at least some of these plurality of electrical elements from the plurality of electrical elements. Here, the separation step is a step of electrically disconnecting the separated electrical elements from the electrical circuit network formed by the plurality of electrical elements, or a step of functionally separating the separated electrical elements that have a function different from the function of the plurality of electrical elements.

[0008] The electrical machinery and equipment relating to this disclosure are electrical machinery and equipment that operate using the integrated circuit device relating to this disclosure.

[0009] According to this disclosure, it is possible to provide an integrated circuit device that satisfies desired design performance by being fabricated with good yield on the same substrate on which diamonds are stacked, a method for manufacturing an integrated circuit device, and an electromechanical device equipped with this integrated circuit device.

[0010] Figure 1 is a schematic diagram showing a state in which field-effect transistors are fabricated in a horizontal row on the same substrate with stacked diamonds. Figure 2 is a bar graph showing the variation in the transconductance characteristics of the field-effect transistors in Figure 1. Figure 3 is a schematic perspective view of a field-effect transistor using a hydrogen-terminated structure of diamond semiconductors. Figure 4 is a schematic cross-sectional diagram (1) showing the manufacturing method of an integrated circuit device according to the first embodiment. Figure 5 is a schematic cross-sectional diagram (2) showing the manufacturing method of an integrated circuit device according to the first embodiment. Figure 6 is a schematic cross-sectional diagram (3) showing the manufacturing method of an integrated circuit device according to the first embodiment. Figure 7 is a schematic cross-sectional diagram (4) showing the manufacturing method of an integrated circuit device according to the first embodiment. Figure 8 is a schematic cross-sectional diagram (5) showing the manufacturing method of an integrated circuit device according to the first embodiment. Figure 9 is a schematic cross-sectional diagram (6) showing the manufacturing method of an integrated circuit device according to the first embodiment. Figure 10 is a schematic cross-sectional diagram (7) showing the manufacturing method of an integrated circuit device according to the first embodiment. Figure 11 is a conceptual diagram showing the electrical connection status between multiple electrical elements in an integrated circuit device. Figure 12 is a conceptual diagram showing a situation in which at least some of the multiple electrical elements are electrically isolated based on the evaluation results of all the elements of the multiple electrical elements. Figure 13 is a schematic cross-sectional diagram (part 8) showing the manufacturing method of the integrated circuit device according to the first embodiment. Figure 14 is a schematic cross-sectional diagram (part 1) showing the manufacturing method of the integrated circuit device according to the second embodiment. Figure 15 is a schematic cross-sectional diagram (part 2) showing the manufacturing method of the integrated circuit device according to the second embodiment. Figure 16 is a schematic cross-sectional diagram (part 3) showing the manufacturing method of the integrated circuit device according to the second embodiment.

[0011] The forms for implementing this disclosure are described below. [Inventor's Knowledge] First, the inventor's knowledge of this disclosure will be explained. Diamond semiconductors have the potential to surpass other semiconductor materials such as silicon (Si), silicon carbide (SiC), and gallium nitride (GaN) as device materials. High-temperature operation due to a large band gap, high-voltage operation due to excellent dielectric breakdown strength, and stable temperature characteristics due to thermal conductivity an order of magnitude higher than these materials can be expected.

[0012] By leveraging these excellent properties of diamond semiconductors, progress is being made in the development of devices for even higher frequency and higher power applications, as well as integrated circuit elements that incorporate multiple such devices on the same substrate.

[0013] Furthermore, it possesses high mechanical strength and excellent resistance to gamma rays and neutron radiation, making it a promising device for use in harsh environments with high radiation concentrations.

[0014] On the other hand, currently, diamond semiconductors have the problem of not being able to stably produce crystals with n-type electrical conductivity where electrons are the majority carriers, and therefore, at present, it is difficult to fabricate devices containing pn junctions.

[0015] Therefore, a state in which hydrogen atoms (H) are directly bonded to the dangling bonds of carbon atoms (C) on the outermost surface of a diamond crystal to form a C-H bond (this is called a hydrogen termination) is more stable than a C-C bond, which is a junction between carbon atoms. Field-effect transistors using a p-type electrical conductive layer that uses the free holes generated directly beneath this state as carriers, i.e., hydrogen-terminated diamond field-effect transistors, are being actively developed.

[0016] This hydrogen-terminated diamond field-effect transistor has high potential as a semiconductor device.

[0017] Figure 3 is a schematic perspective view of a field-effect transistor 51 equipped with a hydrogen-terminated channel region 511. As shown in Figure 3, the area between the high-concentration p-type source region 512 and the high-concentration p-type drain region 513 is a hydrogen-terminated channel region 511, and the holes traveling through this hydrogen-terminated channel region 511 are controlled by the gate electrode 514.

[0018] Figure 3 shows an example of an MIS-type field-effect transistor 51B in which an insulating film 517 is provided between the gate electrode 514 and the hydrogen-terminated channel region 511. However, if the insulating film 517 is not provided, it becomes an MES-type field-effect transistor 51A.

[0019] Hydrogen-terminated diamond field-effect transistors (HMTs) have approximately 10,000 times the transconductance of conventional p-type diamond layers, which are formed by doping bulk crystalline diamond with boron (B). They also exhibit high-frequency characteristics, such as a maximum gain of 120 GHz (fmax). Therefore, it is possible to realize MMICs (mechanical microphones) for amplification that operate in high-frequency regions such as the millimeter-wave band.

[0020] For applications in power devices, it has a high dielectric breakdown field strength of 10 MV / cm and a high sheet carrier density (>10E13 / cm). ２ This gives it an advantage. On the other hand, for applications in high-frequency devices, it has advantages such as a low relative permittivity of 5.7, the presence of a channel layer near the surface (<10 nm), and a high thermal conductivity of 22 / cm·K, which reduces the burden on the cooling system.

[0021] Furthermore, there are high expectations for the integration of diamond semiconductor devices. This is because, in addition to the advantages expected from general integrated devices, there are expectations that diamond semiconductor devices can solve problems specific to them.

[0022] First, diamond substrates themselves are extremely expensive. Therefore, it is necessary to integrate the required elements into the smallest possible area, and to minimize the area taken up by wiring between elements and external connections where wire bonding is performed.

[0023] Other general advantages of integrated circuits include improved performance such as lower power consumption due to miniaturization, and improved reliability by enabling the construction of circuits using transistors on the same board, such as in the fabrication of differential amplifiers.

[0024] However, due to the inherent challenges of synthetic diamond crystals, developing an integrated circuit device 1 that stably exhibits sufficient properties for practical use is difficult.

[0025] The reason for this lies largely in the synthesis method of synthetic diamond crystals. As mentioned earlier, firstly, they are inherently expensive. Secondly, because they are manufactured over a long period of time using vapor phase growth, the resulting crystal substrate is small, making it difficult to place many integrated elements within the substrate, thus limiting the number of elements that can be obtained. Thirdly, the variability in crystal properties such as the number of crystal defects within the substrate is very large, resulting in variability in the properties of the obtained elements and a low yield.

[0026] Figure 1 shows a conceptual diagram of a case where, as an example, 10 field-effect transistors 51 for an amplification circuit are fabricated in a row parallel to one side of a substrate 10 having a size of 4 mm square. Figure 2 is an example of a bar graph showing the transconductance values ​​of each element of the field-effect transistors 51 fabricated as shown in Figure 1. As shown in Figure 2, it can be seen that even elements fabricated continuously from a small area show large variations in characteristics. Thus, even within a narrow area, there are large variations in characteristics, making it difficult to create a device as designed.

[0027] Semiconductor devices made from diamond are still in the early stages of development. As mentioned above, while there are high expectations, the technical difficulties are on a completely different level compared to other conventional semiconductor materials. At this stage, before full-scale commercialization and mass production have been achieved, the knowledge presented above is itself extremely advanced.

[0028] Based on the knowledge regarding the development status of diamond semiconductor devices as described above, the inventors of this disclosure have made various efforts to create a novel structure and method for obtaining an integrated circuit device 1 using diamond semiconductors with a high yield.

[0029] [Description of Embodiments of the Disclosure] Embodiments of the Disclosure are first listed and described. In the following description, the same or corresponding elements are denoted by the same reference numerals, and the same description of them is not repeated.

[0030] (1) An integrated circuit device 1 according to one aspect of the present disclosure comprises a substrate 10 having at least a main surface 11, and a diamond layer 20 is provided in contact with the main surface 11 of the substrate 10. On a first surface 21 of the diamond layer 20 opposite to the substrate 10, there are an electrical input section 30, an electrical output section 40, and a plurality of electrical elements 50. Furthermore, a first electrical circuit 60 is provided that electrically connects the electrical input section 30, the electrical output section 40, and the plurality of electrical elements 50. At least a portion of the plurality of electrical elements 50 includes isolated electrical elements 55 that are separated from these plurality of electrical elements 50.

[0031] (2) An integrated circuit device 1 according to another aspect of the present disclosure comprises a substrate 10 having at least a main surface 11, and a diamond layer 20 is provided in contact with the main surface 11 of the substrate 10. On the first surface 21 of the diamond layer 20 opposite to the substrate 10, there are an electrical input section 30, an electrical output section 40, and a plurality of electrical elements 50. Furthermore, a protective film 70 is provided on the first surface 21, covering all of the plurality of electrical elements 50 and at least a portion of the first surface 21. On the upper part of the protective film 70, i.e., on the second surface 71 side opposite to the first surface 21, a second electrical circuit 80 is provided that electrically connects the electrical input section 30, the electrical output section 40, and the plurality of electrical elements 50. The second electrical circuit 80 and each of the plurality of electrical elements 50 are connected by a third electrical circuit 100 via contact holes 90. At least a portion of the plurality of electrical elements 50 include isolated electrical elements 55 that are separated from these plurality of electrical elements 50.

[0032] In (1) and (2) above, the substrate 10 includes at least a main surface 11. In this case, the diamond layer 20 can be grown on this main surface 11, and a flat and good epitaxial layer can be easily fabricated, so a crystallinely high-quality diamond layer 20 can be obtained. However, even if the diamond layer 20 has an irregular shape that does not take the shape of a flat plate, which is a so-called general concept, the effects of this disclosure can be obtained.

[0033] (3) In the integrated circuit device 1 according to (1) or (2) above, the discrete electrical element 55 is separated from the electrical circuit network formed by the plurality of electrical elements 50, or is separated from the plurality of electrical elements 50 in order to have a function different from the functions of the plurality of electrical elements 50.

[0034] The discrete electrical element 55, as a first aspect, is an element that is electrically disconnected from the plurality of electrical elements 50. Specifically, it corresponds to a field effect transistor determined to exhibit defective characteristics or characteristics outside the design specifications based on the evaluation results, a passive element having an abnormal leakage current, or an element that is separated as a target for separation from the perspective of optimizing the characteristics of the entire circuit although its operating function itself is maintained. In practice, the electrical wiring is cut from the electrical circuit network constituted by the plurality of electrical elements 50 and is in an electrically isolated state.

[0035] The second aspect of the discrete electrical element 55 refers to an element that has a function different from that of the plurality of electrical elements 50 and is thus separated from the functions performed by the plurality of electrical elements 50 and performs another function. Specifically, it also includes cases where circuit blocks or element groups that independently perform functions such as control, assistance, monitoring, or compensation different from the function of the main circuit are configured as the discrete electrical element 55 within the same integrated circuit.

[0036] (4) In the integrated circuit device 1 according to (1) or (2) above, the substrate 10 may be a diamond substrate. In this case, the diamond layer 20 can be fabricated by homoepitaxial growth, and it is easy to obtain a diamond layer 20 that is of good quality crystallographically.

[0037] (5) In the integrated circuit device 1 according to (1) or (2) above, the plurality of electrical elements 50 may include at least one active element or passive element 52 including a field effect transistor 51. An integrated circuit device 1 with advanced functions can be obtained.

[0038] (6) In the integrated circuit device 1 according to (5) above, the field effect transistor 51 may be a field effect transistor 51 including a hydrogen-terminated channel region 511 in which hydrogen is bonded at least to the surface of the channel region. It can be configured as a hydrogen-terminated diamond field effect transistor.

[0039] (7) In the integrated circuit device 1 according to (1) above, the first electric circuit 60 may be gold or a metal containing gold. Gold or a metal containing gold has high electrical conductivity and is also easy to process such as etching.

[0040] (8) In the integrated circuit device 1 according to (2) above, the second electric circuit 80 and the third electric circuit 100 may be gold or a metal containing gold. Gold or a metal containing gold has high electrical conductivity and is also easy to process such as etching.

[0041] (9) A method for manufacturing the integrated circuit device 1 according to one aspect of the present disclosure includes a step of preparing a substrate 10 having at least a main surface 11, and a step of forming a diamond layer 20 in contact with the main surface 11 of the substrate 10. Next, there is a step of forming an electrical input portion 30, an electrical output portion 40, and a plurality of electrical elements 50 on a first surface 21 opposite to the substrate 10 in the diamond layer 20. Further, there is a step of forming a first electric circuit 60 that electrically connects between the electrical input portion 30, the electrical output portion 40, and the plurality of electrical elements 50. After this, there are a step of evaluating the characteristics of the plurality of electrical elements 50, and a separating step of separating at least a part of the plurality of electrical elements 50 from the plurality of electrical elements 50 to obtain separated electrical elements 55.

[0042] (10) A method for manufacturing an integrated circuit device 1 according to another aspect of the present disclosure includes the steps of preparing a substrate 10 having at least a main surface 11, and manufacturing a diamond layer 20 in contact with the main surface 11 of the substrate 10. Next, the method includes the steps of manufacturing an electrical input section 30, an electrical output section 40, and a plurality of electrical elements 50 on a first surface 21 of the diamond layer 20 opposite to the substrate 10. Furthermore, the method includes the step of manufacturing a protective film 70 that is present on the first surface 21 and covers all of the plurality of electrical elements 50 and at least a part of the first surface 21. Subsequently, the method includes the steps of forming contact holes 90 in a part of the region where the plurality of electrical elements 50 are located in the protective film 70, forming a third electrical circuit 100 inside the contact holes 90, and manufacturing a second electrical circuit 80 on the upper part of the protective film 70, i.e., on the second surface 71 side opposite to the first surface 21, which electrically connects the electrical input section 30, the electrical output section 40, and the plurality of electrical elements 50 via the third electrical circuit 100. Finally, the process includes a step of evaluating the characteristics of the multiple electrical elements 50, and a separation step of separating at least a portion of these multiple electrical elements 50 from the multiple electrical elements 50 to form separated electrical elements 55.

[0043] (11) In the method for manufacturing the integrated circuit device 1 according to (9) or (10) above, the separation step is a step of separating a separate electrical element 55 from an electrical circuit network formed by a plurality of electrical elements 50, and also includes a step of separating a separate electrical element 55 having a different function from the functions of the plurality of electrical elements 50 from the plurality of electrical elements 50.

[0044] In practice, one method for separating an isolated electrical element 55 from an electrical circuit network composed of multiple electrical elements 50 is to remove a portion of the conductive material constituting the electrical circuit, such as electrical wiring, by etching or the like. Specifically, if the conductive material is gold or a gold-containing metal, for example, potassium iodide (KI) and iodine (I) can be used. ２ Etching solution containing ) ferric chloride (FeCl ２ ) aqueous solution, or hydrogen peroxide solution (H ２ O ２ A chemical wet etching method using ) can be applied.

[0045] Furthermore, for metallic materials such as aluminum, copper, titanium, chromium, and molybdenum, reactive ion etching (RIE) methods using phosphoric acid-based, ammonium persulfate-based, or fluoride-based etching solutions, or chlorine-based or fluorine-based gases, can be used. In addition, if the conductive material includes polycrystalline silicon, diamond, or carbon-based materials (graphene, carbon nanotubes, etc.), dry etching with oxygen plasma or focused ion beam (FIB) processing methods can be applied.

[0046] In any of these cases, it is sufficient that the isolation electrical element 55 is electrically isolated, and the means for removal are not particularly limited.

[0047] (12) In the method for manufacturing the integrated circuit device 1 according to (9) or (10) above, the substrate 10 may be a diamond substrate. In this case, the diamond layer 20 can be produced by homoepitaxial growth.

[0048] (13) In the method for manufacturing the integrated circuit device 1 according to (9) or (10) above, the plurality of electrical elements 50 may include at least one active element or passive element 52, which includes a field-effect transistor 51. An integrated circuit device 1 with advanced functions can be manufactured.

[0049] (14) In the manufacturing method of the integrated circuit device 1 according to (13) above, the field-effect transistor 51 may be a field-effect transistor 51 having a hydrogen-terminated channel region 511 on which hydrogen is bonded to at least the surface of the hydrogen-terminated channel region 511. A hydrogen-terminated diamond field-effect transistor can be manufactured.

[0050] (15) In the manufacturing method of the integrated circuit device 1 according to (9) above, the first electrical circuit 60 may be made of gold or a metal containing gold. Gold or a metal containing gold is easy to process, such as etching, and allows for the creation of an electrical circuit with high electrical conductivity.

[0051] (16) In the manufacturing method of the integrated circuit device 1 according to (10) above, the second electrical circuit 80 and the third electrical circuit 100 may be made of gold or a metal containing gold. Gold or a metal containing gold is easy to process, such as etching, and allows for the creation of electrical circuits with high electrical conductivity.

[0052] (17) An electrical appliance according to one aspect of the present disclosure is a compact, high-performance electrical appliance that operates using the integrated circuit device 1 according to (1) or (2) above.

[0053] [Details of Embodiments of the Disclosure] Details of embodiments of the disclosure are described below.

[0054] (First Embodiment) First, the first embodiment will be described in detail. [Selection of Substrate] Figure 4 is a schematic cross-sectional view showing a state in which a diamond layer 20 has been epitaxially grown on a substrate 10. The procedure for fabricating the cross-sectional structure shown in Figure 4 will be described below.

[0055] In this disclosure, the material of the substrate 10 is not particularly limited to diamond. As long as the material of the substrate 10 is such that when a diamond layer 20 is deposited on the substrate 10, the crystal quality of the diamond layer 20 is such that it is possible to fabricate elements that have characteristics, including reliability, that are practically usable when multiple electrical elements 50 are manufactured.

[0056] However, generally speaking, it is easier to obtain a high-quality epitaxial layer from a homoepitaxial growth layer on a homoepitaxial growth layer on a heteroepitaxial growth layer using a different type of substrate. Therefore, the choice of using diamond as the material for the substrate 10 is quite possible in this embodiment.

[0057] Therefore, this disclosure describes a diamond substrate cut from a synthetic diamond crystal. However, this does not mean that the substrate 10 is limited to diamond.

[0058] As an example of using a material other than diamond for the substrate 10, a known method involves depositing an iridium thin film on a sapphire substrate and then epitaxially growing diamond on top of it. This method has the advantage of using an existing substrate, such as a sapphire substrate, to obtain large-diameter diamond epitaxial crystals. Although obtaining high-quality epitaxial crystals is relatively difficult, the integrated circuit device 1 of this disclosure can be fabricated using this method.

[0059] [Synthetic Diamond Substrate] When using diamond as the substrate 10, synthetic diamond substrates are often used, which are cut from diamond crystals (not shown) that have been artificially synthesized by the high-temperature and high-pressure method (HPHT method).

[0060] Synthetic diamond crystals are grown in a chamber where a carbon source dissolves into molten metal, and carbon atoms migrate through the metal to grow into a small seed crystal. Parallel plate-shaped diamond crystals are cut from this bulk synthetic diamond crystal, and the surface is polished flat to produce a synthetic diamond substrate.

[0061] Therefore, the manufacturing of diamond substrates is time-consuming, expensive, and commercially available substrate sizes are often small. Furthermore, type Ib synthetic diamond substrates are typically used.

[0062] [Diamond Epitaxial Layer] As shown in Figure 4, a diamond layer 20 is epitaxially grown on the substrate 10 prepared above. For growth, for example, microwave plasma chemical deposition (MPCVD) can be used. Hydrogen (H2) diluted methane (CH4) gas can be used as the raw material gas, with a concentration of, for example, CH4 / H2 = 0.5%. According to this method, carbon decomposed in a plasma generated by applying microwaves to this raw material gas can be epitaxially grown on the substrate 10.

[0063] If impurities are intentionally omitted during this epitaxial growth process, resulting in an undoped layer, a high-resistance, insulating epitaxial layer can be created. However, the important thing is that the resistance of this layer is sufficiently high to electrically isolate the multiple electrical elements 50 that will be created later; it is not particularly essential to perform epitaxial growth using an undoped layer.

[0064] As a first embodiment, for example, the above-mentioned Ib-type synthetic diamond substrate may be used as the substrate 10, and a diamond layer 20 of several nanometers to several micrometers in thickness may be grown at a growth temperature of about 900°C.

[0065] By growing the diamond layer 20, the crystal quality near the surface of the first surface 21 can be improved. This is preferable because it results in better performance in subsequent manufacturing processes and in the characteristics of the multiple electrical elements 50 ultimately obtained. However, if the quality of the substrate 10 improves in the future, it may be possible to make the thickness of the diamond layer 20 even thinner, or it may even become an unnecessary layer.

[0066] [Fabrication of MES-type field-effect transistors] [Selective growth of high-concentration p-type diamond layer] Figure 5 is a schematic cross-sectional view showing a state in which a layer of diamond with a high concentration of p-type impurities, i.e., a high-concentration p-type diamond layer 25, is selectively grown on a diamond layer 20. As shown in Figure 5, the high-concentration p-type diamond layer 25 is selectively epitaxially grown only in the first surface 21 of the diamond layer 20 opposite to the substrate 10, in the region where the source electrode 515 and drain electrode 516 are formed. This creates a high-concentration p-type source region 512 and a high-concentration p-type drain region 513.

[0067] Specifically, first, a film (not shown) such as a metal or oxide film is deposited over the entire surface, and then desired areas, such as the gate electrode 514 and drain electrode 516, are removed using photolithography and etching techniques.

[0068] The photolithography method referred to here involves, for example, first coating a target surface with photoresist, and then selectively exposing the photoresist to form a pattern using selective exposure with a photomask or other exposure methods. There are two types of pattern formation: leaving areas other than the exposed areas (positive type) and leaving only the exposed areas (negative type). Furthermore, this photoresist pattern is used as a mask to perform etching or other processes on a symmetrical surface to transfer the pattern. Hereafter, in this disclosure, this entire method, including the final etching process, will be collectively referred to as the photolithography method.

[0069] A high-concentration p-type diamond layer 25 is grown only in the areas removed as described above. For epitaxial growth, for example, hot filament chemical deposition (HFCVD) can be used. The thickness of the selectively grown epitaxial layer may be, for example, about 300 nm to 1,000 nm.

[0070] For the high-concentration p-type diamond layer 25, for example, the boron concentration in the film is adjusted to be 5E19 / cm³ or higher and 1E22 / cm³ or lower.

[0071] Furthermore, providing a high-concentration p-type diamond layer 25 is an effective means of reducing the contact resistance with the metal material electrode. However, if it is possible to directly form a low-resistance, ohmic-contact source electrode 515 or drain electrode 516 on the diamond layer 20, it is not necessarily required to form a high-concentration p-type diamond layer 25. For example, gold-containing materials are metal materials that can relatively easily achieve ohmic contact.

[0072] [Fabrication of Passive Element Part] As shown in Figure 5, at this time, a high-concentration p-type diamond layer 25 may be used to fabricate a part that will ultimately become a passive element 52, such as a resistive element. For example, a linear resistive element may be fabricated by adjusting the length and width of the high-concentration p-type diamond layer 25 to achieve a predetermined resistance value and forming a two-dimensional pattern (not shown). This is merely one example of how to fabricate a passive element 52, but a schematic cross-sectional view thereof is shown in the first embodiment of this disclosure.

[0073] [Fabrication of Hydrogen-Terminated Channel Region] Fig. 6 is a schematic cross-sectional view showing a state where a hydrogen-terminated channel region 511 is fabricated between a high-concentration p-type diamond layer 25(512) in the source region and a high-concentration p-type diamond layer 25(513) in the drain region. First, by exposing the entire first surface 21 on the side opposite to the substrate 10 in the diamond layer 20 to hydrogen plasma, hydrogen atoms are bonded to the dangling bonds of carbon on the first surface 21, and the entire first surface is made hydrogen-terminated (hereinafter referred to as hydrogen plasma treatment).

[0074] Then, for example, using a photolithography method, with the hydrogen-terminated channel region 511 masked, the portions other than the hydrogen-terminated channel region 511 are exposed to oxygen plasma, and the hydrogen atoms in the hydrogen-terminated structure are replaced with oxygen atoms to change to an oxygen-terminated structure. Since the surface of the hydrogen-terminated structure shows conductivity while the surface of the oxygen-terminated structure shows insulation, the electrical separation between elements is maintained.

[0075] Note that after the formation of the high-concentration p-type diamond layer 25, if the hydrogen-terminated structure of the hydrogen-terminated channel region 511 has already been realized and the hydrogen-terminated structure can be maintained in the subsequent fabrication process, it is not always necessary to perform hydrogen plasma treatment repeatedly.

[0076] [Fabrication of MIS-Type Field-Effect Transistor] Fig. 7 is a schematic cross-sectional view showing a state where an insulating film 517 is fabricated on top of the hydrogen-terminated channel region 511, and an MIS-type field-effect transistor 51B having a three-layer structure of gate electrode 514 / insulating film 517 / hydrogen-terminated channel region 511 is fabricated. As shown in Fig. 7, both a MES-type field-effect transistor 51A having a two-layer structure of gate electrode 514 / hydrogen-terminated channel region 511 and an MIS-type field-effect transistor 51B can be fabricated. Note that to form the insulating film 517 only on a part of the channel region, a photolithography method may be used.

[0077] The material of the insulating film 517 is, for example, Al ２ O ３ 、SiO ２ 、CaF ２ ,HfO ２ 、AlN, BN、 Si ３N ４ , SION, Ta ２ O ５ , TiO ２ WO ３ LaF ３ MgF ２ YF ３ LiF, LiF ３ Any of these materials can be used, or they can be combined in any way. Furthermore, the air layer and vacuum layer can also be considered as part of the insulating layer.

[0078] [Source and Drain Electrode Formation, Passive Element Electrode Formation] Figure 8 is a schematic cross-sectional view showing the state in which the source electrode 515, the drain electrode 516, and, as an example, the passive element electrode 521 have been fabricated. As shown in Figure 8, the source electrode 515 and the drain electrode 516, which are electrodes exhibiting ohmic characteristics, are fabricated on the upper part of the high-concentration p-type source region 512 and the high-concentration p-type drain region 513, respectively. The stacked structure of these ohmic electrodes may be a single layer of gold (Au), but for example, it may be Au layer 200 nm / Pt (platinum) layer 30 nm / Ti (titanium) layer 30 nm from the top layer toward the substrate side.

[0079] In addition to the above, electrode materials may include, for example, Ru, Al, Mo, Cu, Cr, Pb, and Zn. Furthermore, these metallic materials may be arranged in a laminated structure as described above. The film thickness of each layer may be in the range of 10 nm to 500 nm, but the final electrode thickness may be several microns (μm), for example, after plating treatment. For film formation, physical deposition methods such as sputtering and vapor deposition can be used, or chemical deposition methods such as chemical vapor deposition (CVD) and metal-organic vapor deposition (MOCVD) can be used.

[0080] Furthermore, as shown in Figure 8, the passive element electrode 521 of the passive element 52 may be fabricated at this stage. If the ohmic electrode of the passive element 52 is fabricated in the same process as the source electrode 515 and drain electrode 516 of the field-effect transistor 51, the manufacturing process can be simplified.

[0081] However, depending on the type of passive element 52, such as a capacitor, the manufacturing process may involve multiple steps. In such cases, a different manufacturing process may be used, but in this case, attention may need to be paid to the temperature rise during the photolithography process. This is because if the temperature rises (for example, to 100°C), the hydrogen-terminated channel region 511 under the photoresist may deteriorate, potentially worsening its electrical properties.

[0082] [Gate Electrode Formation] Figure 9 is a schematic cross-sectional view showing the state in which the gate electrode 514 of the transistor has been fabricated. As shown in Figure 9, the gate electrode 514 is fabricated in the surface region of the hydrogen-terminated channel region 511 using photolithography. For example, an aluminum layer of about 200 nm may be fabricated as the gate electrode 514.

[0083] In Figure 9, the transistor on the left is an MES-type field-effect transistor 51A, and the transistor on the right is an MIS-type field-effect transistor 51B. In the case of the MIS-type field-effect transistor 51B, for example, an aluminum oxide (Al2O3) layer of about 50 nm may be deposited as the insulating film 517.

[0084] [Fabrication of Passive Element 52 (Part 2)] In the first embodiment, although not specifically shown in the diagram, after the steps that have been completed so far, a passive element 52 such as a capacitor may be fabricated separately.

[0085] [Formation of the First Electrical Circuit] Figure 10 is a schematic cross-sectional view showing the fabricated first electrical circuit 60 that electrically connects these multiple electrical elements 50. As shown in Figure 10, the first electrical circuit 60 is fabricated to electrically connect the MES type field-effect transistor 51A, the MIS type field-effect transistor 51B, and the passive element 52 created above. In Figure 10, the fabricated first electrical circuit 60 may appear not to be connected to the electrodes of each element, but this is merely a cross-sectional view from one direction, and it is electrically connected to each element.

[0086] One example of the fabrication method is to first create a pattern for the first electrical circuit 60 using photolithography and then deposit a gold layer of approximately 300 nm. For depositing the gold layer, for example, electron beam evaporation or sputtering can be used. Next, the pattern is removed to fabricate the wiring portion that will become the first electrical circuit 60.

[0087] However, even in this case, care may be needed to prevent the temperature from rising during the manufacturing process. This is because the hydrogen-terminated channel region 511 may be altered, potentially leading to a deterioration of the electrical properties.

[0088] [Evaluation of elements] Each element of the multiple electrical elements 50 is evaluated according to the desired criteria, and the element to be used in the end (not shown) is selected. This evaluation determines the electrically isolated elements 55, which are at least some of the multiple electrical elements 50 that will be electrically disconnected.

[0089] As for the actual evaluation method of the element, for example, the required performance of a field-effect transistor 51 incorporated into an integrated circuit device 1 is predetermined. Therefore, DC measurements are performed on each of the fabricated field-effect transistors 51. Specifically, these include drain voltage (Vd)-drain current (Id) characteristics and gate voltage (Vg)-drain current (Id) characteristics.

[0090] From these measurement results, important parameters for constructing an integrated circuit can be extracted. For example, a decision can be made to select those where the measured threshold voltage, maximum drain current, and transconductance meet the required specifications, and discard those that do not. For example, the determination of whether or not a value meets the specifications can be made by considering it to be within ±20% of the optimal value of the required specifications.

[0091] [When selecting elements without evaluating them] However, the process of selecting and deciding which elements to electrically isolate does not necessarily include the step of evaluating multiple electrical elements 50. For example, there are cases where elements that should be electrically isolated appear at the same location each time. In such cases, the isolated electrical elements 55 are provided in an electrically isolated state without any special evaluation.

[0092] Alternatively, in order to improve heat dissipation efficiency or to enhance mechanical strength, an electrically isolated electrical element 55 may be intentionally provided in a portion of the structure.

[0093] In addition, in some cases, electrically isolated electrical elements 55 may be created in advance for specific purposes or functions. For example, a dummy element may be provided for the purpose of evaluating the temperature resistance of the element.

[0094] Furthermore, even if all fabricated elements meet the required specifications, it is acceptable to select the element with characteristics closer to the optimal value and isolate the other elements.

[0095] [Disconnection of some elements] Figure 11 is a conceptual diagram showing the electrical connection status of multiple electrical elements 50 in the integrated circuit device 1 after the above process has been completed. As shown in Figure 11, all elements of the multiple electrical elements 50 are electrically connected by the first electrical circuit 60.

[0096] Figure 12 is a conceptual diagram showing a situation in which all elements of the multiple electrical elements 50 have been evaluated, and based on the evaluation results, at least a portion of the multiple electrical elements 50 have been electrically isolated to form isolated electrical elements 55. As shown in Figure 12, the isolated electrical elements 55, which are at least a portion of the multiple electrical elements 50 that have been electrically isolated, have the first electrical circuit 60 cut off in the middle by the electrical circuit cutting portion 110.

[0097] Figure 13 is a schematic cross-sectional view showing the completed state of the integrated circuit device 1. As shown in Figure 13, at least some of the electrically isolated isolated electrical elements 55 among the plurality of electrical elements 50 have the first electrical circuit 60 disconnected. The first electrical circuit 60 is disconnected, for example, by etching.

[0098] (Second Embodiment) Next, the integrated circuit device 1 according to the second embodiment will be described in detail.

[0099] [Steps overlapping with the first embodiment] In the second embodiment, the explanation from Figures 4 to 9 of the first embodiment overlaps, so the explanation is omitted here.

[0100] [Protective Film Formation] Figure 14 is a schematic cross-sectional view showing the state in the first embodiment after the process has progressed to the point before the creation of the first electrical circuit 60, and a protective film 70 covering the entire surface of the diamond layer 20 has been formed. As shown in Figure 14, the protective film 70 also protects the field-effect transistor 51 and passive elements 52 provided on the first surface 21 of the diamond layer 20 opposite to the substrate 10. The material of this protective film 70 is, for example, aluminum oxide (Al2O3).

[0101] For the preparation of the protective film 70, for example, an atomic layer deposition system [FlexAL] (manufactured by Oxford Instruments Ltd.) may be used. The deposition temperature may be, for example, 300°C, and the deposition thickness may be, for example, about 100 nm on a plane. The raw materials that can be used are trimethylaluminum (TMA) and water vapor (H2O).

[0102] The protective film 70 can be made from any of the following materials: Al2O3, SiO2, CaF2, HfO2, AlN, BN, Si3N4, SiO2, MgF2, YF3, polyimide, epoxy resin, or acrylic resin. Generally, any material with a dielectric constant less than 15 can be used. Alternatively, any combination of these materials may be used.

[0103] [Contact Hole Formation] Figure 15 is a schematic cross-sectional view showing that after the protective film 70 has been fabricated, contact holes 90 have been created for the electrical connection between each element of the multiple electrical elements 50 and the second electrical circuit 80 to be created later. As shown in Figure 15, contact holes 90 are fabricated using, for example, photolithography, so that the electrode portions of each element of the multiple electrical elements 50 are exposed. For fabricating the contact holes 90, for example, a multi-purpose etching apparatus (ICP-RIE, Samco) can be used.

[0104] [Creation of the second electrical circuit] Figure 16 is a schematic cross-sectional view in which each element of the multiple electrical elements 50 on the protective film 70 is electrically connected by a second electrical circuit 80 and a third electrical circuit 100 provided in the contact hole 90. As shown in Figure 16, on the protective film 70, a second electrical circuit 80 is created on the second surface 71 side opposite to the first surface 21, which electrically connects the electrical input section 30, the electrical output section 40, and the multiple electrical elements 50 via the third electrical circuit 100.

[0105] In practice, a metal layer, such as gold, is deposited over the entire surface 71 of the protective film 70, and the second electrical circuit 80 is patterned using photolithography to fabricate the second electrical circuit 80. The thickness of the metal layer may be, for example, about 300 nm. The film deposition method can be the same as in the first embodiment, for example, a physical deposition method such as sputtering or vapor deposition, or a chemical deposition method such as chemical vapor deposition (CVD) or metal-organic vapor deposition (MOCVD) can be used.

[0106] Furthermore, a passive element 52 can be formed on the second surface 71 side of the protective film 70 after this.

[0107] [Evaluation of elements] Each of the multiple electrical elements 50 is evaluated according to the desired criteria, and the element to be used in the end (not shown) is selected. This evaluation determines the electrically isolated electrical elements 55, which are at least some of the multiple electrical elements 50 that will be electrically disconnected.

[0108] [Disconnection of some elements] This step, as well as the subsequent steps, are the same as in the first embodiment, so the explanation will be omitted.

[0109] The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. The scope of the invention is indicated by the claims rather than by the foregoing description and is intended to include all modifications within the meaning and scope of the claims.

[0110] 1 Integrated Circuit Device 10 Substrate 11 Main Surface 20 Diamond Layer 21 First Surface 25 High-Concentration p-Type Diamond Layer 30 Electrical Input Section 40 Electrical Output Section 50 Multiple Electrical Elements 51 Field-Effect Transistor 51A MES-Type Field-Effect Transistor 51B MIS-Type Field-Effect Transistor 511 Hydrogen-Terminated Channel Region 512 High-Concentration p-Type Source Region 513 High-Concentration p-Type Drain Region 514 Grid Socket 515 Source Electrode 516 Drain Electrode 517 Insulating Film 52 Passive Element 521 Passive Element Electrode 55 Isolating Electrical Element 60 First Electrical Circuit 70 Protective Film 71 Second Surface 80 Second Electrical Circuit 90 Contact Hole 100 Third Electrical Circuit 110 Electrical Circuit Disconnection Section

Claims

1. An integrated circuit device comprising: a substrate having at least a main surface; a diamond layer provided in contact with the main surface of the substrate; an electrical input section, an electrical output section, and a plurality of electrical elements provided on a first surface of the diamond layer opposite to the substrate; and a first electrical circuit electrically connecting the electrical input section, the electrical output section, and the plurality of electrical elements, wherein at least a portion of the plurality of electrical elements includes isolated electrical elements separated from the plurality of electrical elements.

2. An integrated circuit device comprising: a substrate having at least a main surface; a diamond layer provided in contact with the main surface of the substrate; an electrical input section, an electrical output section, and a plurality of electrical elements provided on a first surface of the diamond layer opposite to the substrate; a protective film located on the first surface and covering all of the plurality of electrical elements and at least a portion of the first surface; a second electrical circuit on the second surface side of the protective film opposite to the first surface, electrically connecting the electrical input section, the electrical output section, and the plurality of electrical elements; and a third electrical circuit individually electrically connecting each of the plurality of electrical elements to the second electrical circuit via contact holes, wherein at least a portion of the plurality of electrical elements includes isolated electrical elements separated from the plurality of electrical elements.

3. The integrated circuit apparatus according to claim 1 or claim 2, wherein the isolated electrical element is an electrical element that is separated from the electrical circuit network formed by the plurality of electrical elements, or an electrical element that is separated from the plurality of electrical elements in order to have a function different from the function that the plurality of electrical elements have.

4. The integrated circuit apparatus according to either claim 1 or claim 2, wherein the substrate is a diamond substrate.

5. The integrated circuit apparatus according to either claim 1 or claim 2, wherein the plurality of electrical elements include at least one active element including a transistor or a passive element.

6. The integrated circuit device according to claim 5, wherein the transistor is a hydrogen-terminated diamond field-effect transistor.

7. The integrated circuit apparatus according to claim 1, wherein the first electrical circuit is gold or a gold-containing metal.

8. The integrated circuit apparatus according to claim 2, wherein the second electrical circuit and the third electrical circuit are made of gold or a gold-containing metal.

9. A method for manufacturing an integrated circuit device, comprising the steps of: preparing a substrate having at least a main surface; creating a diamond layer in contact with the main surface of the substrate; creating an electrical input section, an electrical output section, and a plurality of electrical elements on a first surface of the diamond layer opposite to the substrate; creating a first electrical circuit that electrically connects the electrical input section, the electrical output section, and the plurality of electrical elements; evaluating the characteristics of the plurality of electrical elements; and separating at least some of the plurality of electrical elements to form isolated electrical elements.

10. A method for manufacturing an integrated circuit device, comprising: a step of preparing a substrate having at least a main surface; a step of creating a diamond layer in contact with the main surface of the substrate; a step of creating an electrical input section, an electrical output section, and a plurality of electrical elements on a first surface of the diamond layer opposite to the substrate; a step of creating a protective film that exists on the first surface and covers all of the plurality of electrical elements and at least a part of the first surface; a step of forming contact holes in a part of the region of the protective film where the plurality of electrical elements are located; a step of forming a third electrical circuit inside the contact holes; a step of creating a second electrical circuit on the second surface side of the protective film opposite to the first surface, which electrically connects the electrical input section, the electrical output section, and the plurality of electrical elements via the third electrical circuit; a step of evaluating the characteristics of the plurality of electrical elements; and a separation step of separating at least a portion of the plurality of electrical elements from the plurality of electrical elements to form separated electrical elements.

11. The method for manufacturing an integrated circuit apparatus according to claim 9 or claim 10, wherein the separation step is a step of separating the isolated electrical element from the electrical network formed by the plurality of electrical elements, or a step of separating the isolated electrical element having a function different from the functions of the plurality of electrical elements from the plurality of electrical elements.

12. The method for manufacturing an integrated circuit apparatus according to either claim 9 or claim 10, wherein the substrate is a diamond substrate.

13. The method for manufacturing an integrated circuit apparatus according to either claim 9 or claim 10, wherein the plurality of electrical elements include at least one active element including a transistor or a passive element.

14. The method for manufacturing an integrated circuit device according to claim 13, wherein the transistor is a hydrogen-terminated diamond field-effect transistor.

15. The method for manufacturing an integrated circuit apparatus according to claim 9, wherein the first electrical circuit is gold or a gold-containing metal.

16. The method for manufacturing an integrated circuit apparatus according to claim 10, wherein the second electrical circuit and the third electrical circuit are made of gold or a gold-containing metal.

17. An electromechanical device that operates using an integrated circuit device according to either claim 1 or claim 2.

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