Ceramic electronic component

The ceramic electronic component design addresses parasitic L component issues by shortening wiring distances through a laminate structure with a GND terminal covering side surfaces and internal conductors, enhancing GND properties and reducing waveform distortion.

WO2026121150A1PCT designated stage Publication Date: 2026-06-11MURATA MFG CO LTD

Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
MURATA MFG CO LTD
Filing Date
2025-11-28
Publication Date
2026-06-11

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Abstract

A ceramic electronic component (101) comprises a laminate (1) that is formed by laminating a plurality of ceramic layers and has a bottom surface (3) and a plurality of lateral surfaces. A GND terminal (16) and an IO terminal (17) are disposed on the bottom surface. Eighty percent or more of the total area of the plurality of lateral surfaces is covered by a shield film (8) electrically connected to the GND terminal (16). The bottom surface (3) includes a flat plane. The GND terminal (16) is disposed to reach the outer periphery of the flat plane. The IO terminal (17) is disposed separately from the outer periphery of the flat plane.
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Description

Ceramic Electronic Component

[0001] The present invention relates to a ceramic electronic component.

[0002] An example of an electronic component having a main body with a bottom surface and four side surfaces is described in Japanese Patent No. 6972530 (Patent Document 1). This main body is formed by laminating a plurality of insulator layers. One or more external electrodes are provided on the bottom surface of the main body. A shield film is provided so as to form a cylindrical shape by covering the four side surfaces of the main body.

[0003] Japanese Patent No. 6972530

[0004] In the above-described electronic component, in order to avoid the risk of short circuit between the shield film covering the four side surfaces and the external electrode provided on the bottom surface, it is necessary to ensure a distance of a certain length or more between the external electrode and the side surface. Here, by increasing the distance, the routing distance of the wiring from the external electrode to the shield film is increased, and an undesired L component as a parasitic component increases. As a result, there is a problem that the GND property of the shield film becomes weak and waveform distortion due to resonance occurs in the high-frequency region.

[0005] Therefore, an object of the present invention is to provide a ceramic electronic component capable of reducing an undesired L component.

[0006] To achieve the above object, a ceramic electronic component according to the present invention is formed by laminating a plurality of ceramic layers, and includes a laminate having a bottom surface and a plurality of side surfaces. A GND terminal and an IO terminal are arranged on the bottom surface. 80% or more of the total area of the plurality of side surfaces is covered by a shield film electrically connected to the GND terminal. The bottom surface includes a flat surface. The GND terminal is arranged so as to reach the outer periphery of the flat surface. The IO terminal is arranged at a distance from the outer periphery of the flat surface.

[0007] According to the present invention, since the distance as the wiring from the GND terminal to the shield film on the side surface is shortened, an undesired L component can be reduced. Therefore, waveform distortion due to resonance in the high-frequency region can be suppressed.

[0008] This is a perspective view of a ceramic electronic component in Embodiment 1 according to the present invention. This is a cross-sectional view of a ceramic electronic component in Embodiment 1 according to the present invention. This is a rear view of a ceramic electronic component in Embodiment 1 according to the present invention. This is a cross-sectional view taken along the line IV-IV in Figure 3. This is a cross-sectional view of a ceramic electronic component in Embodiment 2 according to the present invention. This is a cross-sectional view of a modified example of a ceramic electronic component in Embodiment 2 according to the present invention. This is a cross-sectional view of a ceramic electronic component in Embodiment 3 according to the present invention. This is a rear view of a ceramic electronic component in Embodiment 4 according to the present invention. This is a cross-sectional view taken along the line IX-IX in Figure 8. This is a partially enlarged cross-sectional view of the bottom surface and its vicinity of the laminate included in the ceramic electronic component in Embodiment 4 according to the present invention. This is a cross-sectional view of a modified example of a ceramic electronic component in Embodiment 4 according to the present invention. This is a diagram showing a first example of the arrangement of terminals on the bottom surface of a ceramic electronic component according to the present invention. This is a diagram showing a second example of the arrangement of terminals on the bottom surface of a ceramic electronic component according to the present invention.

[0009] The dimensional ratios shown in the drawings do not necessarily accurately reflect reality, and may be exaggerated for illustrative purposes. In the following explanation, the concepts of "up" or "down" do not necessarily refer to absolute up or down, but rather to relative up or down within the illustrated orientation.

[0010] (Embodiment 1) A ceramic electronic component in Embodiment 1 according to the present invention will be described with reference to Figures 1 to 4. A perspective view of the ceramic electronic component 101 in this embodiment is shown in Figure 1. A cross-sectional view of the ceramic electronic component 101 is shown in Figure 2. Multiple external terminals 15 are arranged on the bottom surface of the ceramic electronic component 101. The external terminals 15 include at least two types: a GND terminal 16 and an IO terminal 17. A view of the ceramic electronic component 101 from directly below is shown in Figure 3. A cross-sectional view along the IV-IV line in Figure 3 is shown in Figure 4.

[0011] As shown in Figure 2, the ceramic electronic component 101 comprises a laminate 1. The laminate 1 is formed by stacking a plurality of ceramic layers 2 and has a bottom surface 3 and a plurality of sides. A GND terminal 16 and an I / O terminal 17 are located on the bottom surface 3 of the laminate 1. More than 80% of the total area of ​​the plurality of sides is covered by a shielding film 8 that is electrically connected to the GND terminal 16.

[0012] The base surface 3 includes a flat surface. In the example shown in this embodiment, the entire base surface 3 is a flat surface. The entire base surface 3 may be a flat surface, or only a part of the base surface 3 may be a flat surface. The GND terminal 16 is positioned so as to be in contact with the outer periphery of the flat surface. In this embodiment, since the entire base surface 3 is a flat surface, as shown in Figure 3, the GND terminal 16 is positioned so as to reach the outer periphery of the flat surface, i.e., the outer periphery of the base surface 3. The IO terminal 17 is positioned away from the outer periphery of the flat surface, i.e., the outer periphery of the base surface 3.

[0013] As shown in Figure 4, internal electrodes 7 are arranged inside the laminate 1, electrically connected to the IO terminals 17 by IO terminal connecting conductors 27. In Figure 4, the side surface of the GND terminal 16 is depicted as being connected to the shield film 8, but this is merely a schematic representation. In reality, the GND terminal 16 is thin and is not connected only by its side surface. Plating growth is performed to form the GND terminal 16, and during this process, the GND terminal 16 is formed to protrude onto the side surface of the laminate 1. The shield film 8 is formed to cover the portion of the GND terminal 16 that protrudes onto the side surface of the laminate 1. As a result, near the lower end of the side surface of the laminate 1, there is a portion where the shield film 8 overlaps with the protruding GND terminal 16, and electrical connection between the GND terminal 16 and the shield film 8 is ensured at this overlapping portion.

[0014] In this embodiment, the wiring distance from the GND terminal 16 to the side shield film 8 is shortened, which reduces unwanted L components. Therefore, waveform distortion due to resonance in the high-frequency range can be suppressed.

[0015] As shown in Figure 4, if one of the multiple sides is designated as the first side 21, the shield film 8 on the first side 21 is electrically connected to the GND terminal 16 via the ridge line 31 where the first side 21 and the bottom surface 3 meet on the outer surface of the laminate 1. This configuration is preferable.

[0016] As shown in Figure 4, it is preferable that the shield film 8 is positioned to reach the ridge where the first side surface 21 and the bottom surface meet. By adopting this configuration, the wiring distance from the GND terminal 16 to the shield film 8 on the first side surface 21 is shortened, thereby reducing the L component.

[0017] (Embodiment 2) A ceramic electronic component in Embodiment 2 according to the present invention will be described with reference to Figure 5. A cross-sectional view of the ceramic electronic component 102 in this embodiment is shown in Figure 5.

[0018] In the ceramic electronic component 102, the shielding film 8 does not reach the lower end of the first side surface 21. The GND terminal 16 is positioned to be in contact with the outer circumference of the flat surface of the bottom surface 3. In the ceramic electronic component 102, a GND terminal connecting conductor 26 is arranged inside the laminate 1 to electrically connect the GND terminal 16 and the shielding film 8 via the inside of the laminate 1. The GND terminal 16 is connected to the shielding film 8 via the GND terminal connecting conductor 26. The GND terminal connecting conductor 26 includes a portion 26a and a portion 26b. Portion 26a extends in the thickness direction. The lower end of portion 26a is connected to the GND terminal 16. Portion 26b is connected to the upper end of portion 26a and extends in a direction parallel to the bottom surface 3. Portion 26b is connected to the shielding film 8. The shape, number, and positional relationship of portions 26a and 26b shown here are merely examples.

[0019] In the ceramic electronic component 102, the distance from the IO terminal 17 to the nearest edge of the bottom surface 3 is longer than the distance from the GND terminal 16 to the nearest edge of the bottom surface 3. By adopting this configuration, the wiring distance from the GND terminal 16 to the side shield film 8 is shortened, thereby reducing the unwanted L component.

[0020] In this embodiment as well, the same configuration as in Embodiment 1 can be obtained. As a variation of the ceramic electronic component 102, a ceramic electronic component 103 as shown in Figure 6 can also be considered.

[0021] In the ceramic electronic component 103, a GND terminal connecting conductor 26 is arranged inside the laminate 1 to electrically connect the GND terminal 16 and the shield film 8 via the inside of the laminate 1. Inside the laminate 1, an internal electrode 7 is arranged which is electrically connected to the IO terminal 17 by an IO terminal connecting conductor 27.

[0022] The GND terminal connecting conductor 26 is connected to the GND terminal 16 and includes a columnar portion of the GND terminal connecting conductor that extends in the thickness direction. The IO terminal connecting conductor 27 is connected to the IO terminal 17 and includes a columnar portion of the IO terminal connecting conductor that extends in the thickness direction. The distance B from the columnar portion of the IO terminal connecting conductor to the nearest point of the shield film 8 is longer than the distance A from the columnar portion of the GND terminal connecting conductor to the nearest point of the shield film 8.

[0023] The same configuration as in Embodiment 1 can be obtained for the ceramic electronic component 103 as well.

[0024] (Embodiment 3) A ceramic electronic component in Embodiment 3 according to the present invention will be described with reference to Figure 7. A cross-sectional view of the ceramic electronic component 104 in this embodiment is shown in Figure 7. In the ceramic electronic component 104, the shield film 8 on the side surface is electrically connected to the GND terminal 16 via a ridge line 31 on the outer surface of the laminate 1 where the side surface and the bottom surface 3 are in contact, and is also electrically connected to the GND terminal 16 via a GND terminal connecting conductor 26 arranged inside the laminate 1.

[0025] In this embodiment as well, the same configuration as in Embodiment 1 can be obtained. Furthermore, in this embodiment, since the electrical connection between the shield film 8 and the GND terminal 16 is made via two different routes, the GND properties of the shield film 8 can be enhanced.

[0026] (Embodiment 4) A ceramic electronic component in Embodiment 4 according to the present invention will be described with reference to Figures 8 to 10. Figure 8 shows the ceramic electronic component 105 in this embodiment as seen from directly below. Figure 9 shows a cross-sectional view taken along the IX-IX line in Figure 8.

[0027] The laminate 1 contained in the ceramic electronic component 105 has been processed to round its corners. Rounding the corners is done by, for example, barrel polishing. Because the corners have been rounded, the edges 31 are rounded. Figure 10 shows a partially enlarged cross-sectional view of the bottom surface 3 of the laminate 1 and its vicinity. In Figure 10, the GND terminal 16 and the IO terminal 17 are omitted from the illustration. The ceramic electronic component 105 has a bottom surface 3. As shown in Figure 10, the bottom surface 3 includes a flat surface 35. In this embodiment, the entire bottom surface 3 is not a flat surface 35; the bottom surface 3 includes a flat surface 35 and a non-flat surface 36. The non-flat surface 36 surrounds the flat surface 35. The GND terminal 16 is not positioned to be in contact with the outer circumference of the bottom surface 3, but as shown in Figure 9, the GND terminal 16 is positioned to be in contact with the outer circumference of the flat surface 35. In other words, the GND terminal 16 is positioned at the edge of the flat surface 35. In this case, as shown in Figure 8, when viewed from a direction perpendicular to the bottom surface 3, the GND terminal 16 appears to be positioned away from the shielding film 8 covering the side surface.

[0028] In this embodiment, the concept that the GND terminal 16 is "arranged to reach the outer periphery of the flat surface 35" is not limited to a configuration where the GND terminal 16 reaches the outline of the flat surface 35 and ends there, but also includes a configuration where the GND terminal 16 extends beyond the outline of the flat surface 35 to some extent and enters the non-flat surface 36. In other words, the end of the GND terminal 16 may overlap with the outline of the flat surface 35, or it may be located beyond the outline of the flat surface 35.

[0029] In this embodiment as well, the same configuration as in Embodiment 1 can be obtained. As a variation of the ceramic electronic component 105, a ceramic electronic component 106 as shown in Figure 11 can also be considered. In the ceramic electronic component 106, the shielding film 8 reaches the lower end of the laminate 1 and extends beyond the ridge line 31. The shielding film 8 is in contact with the GND terminal 16. The shielding film 8 may also extend into the bottom surface 3. In the ceramic electronic component 106 as well, the GND terminal 16 is positioned to be in contact with the outer circumference of the flat surface 35, which is part of the bottom surface 3. In Figure 11, it is schematically shown that the shielding film 8 and the GND terminal 16 are of the same thickness and are adjacent to each other, in contact with each other on their sides, but in reality, they are not necessarily connected in this manner. For example, the GND terminal 16 may be embedded in the laminate 1 as a result of pressing, in which case the shielding film 8 may cover a part of the lower surface of the GND terminal 16 embedded in the laminate 1. Furthermore, even if the GND terminal 16 is not embedded in the laminate 1, the shield film 8 may cover a portion of the lower surface of the GND terminal 16.

[0030] It should be noted that, as is common to all embodiments to date, the arrangement of the GND terminal 16 and IO terminal 17 on the bottom surface 3 may be other than the arrangement shown in Figure 8, for example, as shown in Figure 12 or Figure 13. In Figures 12 and 13, the GND terminal 16 is arranged along the two long sides of the outer shape of the bottom surface 3. The GND terminal 16 is located near the edge of the bottom surface 3, while the IO terminal 17 is located away from the edge of the bottom surface 3. The number, shape, size, and arrangement of the GND terminal 16 and IO terminal 17 are not limited to those shown herein.

[0031] Furthermore, multiple embodiments of the above-described embodiments may be used in appropriate combinations. The embodiments disclosed herein are illustrative in all respects and are not restrictive. The scope of the present invention is defined by the claims, including all modifications within the meaning and scope of the claims.

[0032] 1 Laminate, 2 Ceramic layer, 3 Bottom surface, 7 Internal electrode, 8 Shielding film, 15 External terminal, 16 GND terminal, 17 IO terminal, 17a Input terminal, 17b Output terminal, 21 First side surface, 26 GND terminal connecting conductor, 26a, 26b parts, 27 IO terminal connecting conductor, 31 Edge, 35 Flat surface, 36 Non-flat surface, 101, 102, 103, 104, 105, 106 Ceramic electronic component.

Claims

1. A ceramic electronic component comprising a laminate formed by stacking multiple ceramic layers, having a bottom surface and multiple sides, wherein a GND terminal and an IO terminal are arranged on the bottom surface, more than 80% of the total area of ​​the multiple sides is covered by a shielding film electrically connected to the GND terminal, the bottom surface includes a flat surface, the GND terminal is arranged to reach the outer periphery of the flat surface, and the IO terminal is arranged at a distance from the outer periphery of the flat surface.

2. The ceramic electronic component according to claim 1, wherein, if any one of the plurality of sides is designated as the first side, the shield film on the first side is electrically connected to the GND terminal via a ridge where the first side and the bottom surface are in contact on the outer surface of the laminate.

3. The ceramic electronic component according to claim 2, wherein the shielding film is arranged to reach the ridge where the first side surface and the bottom surface meet.

4. The ceramic electronic component according to any one of claims 1 to 3, wherein the distance from the I / O terminal to the nearest edge of the bottom surface is longer than the distance from the GND terminal to the nearest edge of the bottom surface.

5. A ceramic electronic component according to any one of claims 1 to 4, wherein a GND terminal connecting conductor is disposed inside the laminate to electrically connect the GND terminal and the shield film via the inside of the laminate, an internal electrode is disposed inside the laminate to electrically connect to the IO terminal by an IO terminal connecting conductor, the GND terminal connecting conductor includes a columnar portion of the GND terminal connecting conductor that is connected to the GND terminal and extends in the thickness direction, the IO terminal connecting conductor includes a columnar portion of the IO terminal connecting conductor that is connected to the IO terminal and extends in the thickness direction, and the distance from the columnar portion of the IO terminal connecting conductor to the nearest point of the shield film is longer than the distance from the columnar portion of the GND terminal connecting conductor to the nearest point of the shield film.