Communication circuit comprising power supply modulator and multiple amplifiers, and electronic device comprising same

Abstract

Disclosed are a communication circuit comprising a power supply modulator and multiple amplifiers, and an electronic device comprising same. An embodiment of the present disclosure relates to an electronic device including a communication circuit. The communication circuit may comprise: a signal processor for generating an input radio frequency (RF) signal, a control signal, and an envelope voltage; an amplifier including a power supply modulator for generating multiple modulation voltages on the basis of the control signal and the envelope voltage, and an amplification circuit for amplifying the input RF signal on the basis of the multiple modulation voltages; and one or more antennas connected to the output terminal of the amplifier (104). The level of at least one of the multiple modulation voltages may be adjusted within a range equal to or greater than the ground voltage and equal to or less than the maximum modulation voltage.

Description

A communication circuit including a power modulator and a plurality of amplifiers and an electronic device including the same

[0001] The present disclosure relates to a communication circuit for wireless communication and an electronic device including the same, and more specifically, to a communication circuit including a power modulator and a plurality of amplifiers and an electronic device including the same.

[0002] 5G wireless communication technology defines a wide frequency band to enable fast transmission speeds and new services, and can be implemented not only in frequency bands below 6 GHz ('Sub 6 GHz'), such as 3.5 gigahertz (3.5 GHz), but also in ultra-high frequency bands called millimeter waves (mmWave), such as 28 GHz and 39 GHz ('Above 6 GHz'). In addition, for 6G wireless communication technology, which is referred to as a system beyond 5G communication, implementation in the terahertz band (e.g., the 3 terahertz (3 THz) band at 95 GHz) is being considered to achieve transmission speeds 50 times faster and ultra-low latency reduced to one-tenth compared to 5G wireless communication technology.

[0003] In the early stages of 5G wireless communication technology, aiming to satisfy service support and performance requirements for enhanced Mobile BroadBand (eMBB), Ultra-Reliable Low-Latency Communications (URLLC), and Massive Machine-Type Communications (mMTC), technologies included beamforming and Massive MIMO to mitigate path loss and increase transmission distance in ultra-high frequency bands; support for various numerologies (such as operating multiple subcarrier spacings) and dynamic operation of slot formats for the efficient utilization of ultra-high frequency resources; initial access techniques to support multi-beam transmission and broadband; the definition and operation of Band-Width Parts (BWP); Low Density Parity Check (LDPC) codes for high-volume data transmission; new channel coding methods such as Polar Codes for the reliable transmission of control information; and L2 pre-processing (L2 Standardization has been carried out for pre-processing, network slicing which provides a dedicated network specialized for specific services, and other methods.

[0004] Currently, discussions are underway to improve and enhance the performance of the initial 5G wireless communication technology, taking into account the services that the 5G wireless communication technology was intended to support. Additionally, standardization of the physical layer is in progress for technologies such as V2X (Vehicle-to-Everything), which helps autonomous vehicles make driving decisions and enhance user convenience based on their own location and status information transmitted by the vehicle; NR-U (New Radio Unlicensed), which aims for system operation in unlicensed bands that meets various regulatory requirements; NR terminal low power consumption technology (UE Power Saving); Non-Terrestrial Network (NTN), which is direct terminal-satellite communication for securing coverage in areas where communication with the terrestrial network is impossible; and positioning.

[0005] In addition, standardization is underway in the field of wireless interface architecture / protocols for technologies such as the Industrial Internet of Things (IIoT) for supporting new services through linkage and convergence with other industries, Integrated Access and Backhaul (IAB) which provides nodes for expanding network service areas by integrating wireless backhaul links and access links, Mobility Enhancement including Conditional Handover and Dual Active Protocol Stack (DAPS) Handover, and 2-step Random Access (2-step RACH for NR) which simplifies random access procedures. Standardization is also underway in the field of system architecture / services for 5G baseline architectures (e.g., Service based Architecture, Service based Interface) for incorporating Network Functions Virtualization (NFV) and Software-Defined Networking (SDN) technologies, and Mobile Edge Computing (MEC), which provides services based on the location of the terminal.

[0006] When such 5G wireless communication systems are commercialized, connected devices, which are increasing explosively, will be connected to communication networks. Accordingly, it is expected that there will be a need to enhance the functionality and performance of 5G wireless communication systems and to integrate the operation of connected devices. To this end, new research is planned to be conducted on 5G performance improvement and complexity reduction, support for AI services, support for metaverse services, and drone communication using eXtended Reality (XR), Artificial Intelligence (AI), and Machine Learning (ML) to efficiently support Augmented Reality (AR), Virtual Reality (VR), and Mixed Reality (MR).

[0007] Furthermore, the advancement of these 5G wireless communication systems encompasses multi-antenna transmission technologies such as new waveforms, Full Dimensional MIMO (FD-MIMO), array antennas, and large-scale antennas to guarantee coverage in the terahertz band of 6G wireless communication technology; metamaterial-based lenses and antennas; high-dimensional spatial multiplexing technology using Orbital Angular Momentum (OAM); and Reconfigurable Intelligent Surface (RIS) technology to improve terahertz band signal coverage; as well as full-duplex technology for enhancing frequency efficiency and system networks; AI-based communication technologies that realize system optimization by utilizing satellites and Artificial Intelligence (AI) from the design stage and internalizing end-to-end AI support functions; and the realization of services of complexity exceeding the limits of terminal computing capabilities by utilizing ultra-high-performance communication and computing resources. It could serve as a foundation for the development of next-generation distributed computing technologies.

[0008] An electronic device comprising a communication circuit according to one embodiment of the present disclosure, wherein the communication circuit may include: a signal processor that generates an input RF (Radio Frequency) signal, a control signal, and an envelope voltage; a power modulator that generates a plurality of modulation voltages based on the control signal and the envelope voltage; an amplifier unit comprising an amplifier circuit that amplifies the input RF signal based on the plurality of modulation voltages; and one or more antennas connected to the output terminal of the amplifier unit. The level of at least one of the plurality of modulation voltages may be adjusted within a range equal to or greater than the ground voltage and equal to or less than the maximum modulation voltage.

[0009] A method performed by an electronic device comprising one or more antennas according to one embodiment of the present disclosure may include: generating an input RF signal, a control signal, and an envelope voltage; generating a plurality of modulation voltages based on the control signal and the envelope voltage; amplifying the input RF signal based on the plurality of modulation voltages; and applying the amplified input RF signal to the one or more antennas. The level of at least one of the plurality of modulation voltages may be adjusted within a range equal to or greater than a ground voltage and equal to or less than a maximum modulation voltage.

[0010] A communication circuit for processing an RF signal and transmitting it to an external device according to one embodiment of the present disclosure may include: a signal processor that generates an input RF signal, a control signal, and an envelope voltage; an amplifier comprising a power modulator that generates a plurality of modulation voltages based on the control signal and the envelope voltage, and an amplifier circuit that amplifies the input RF signal based on the plurality of modulation voltages; and one or more antennas connected to the output terminal of the amplifier. The level of at least one of the plurality of modulation voltages may be adjusted within a range equal to or greater than a ground voltage and equal to or less than a maximum modulation voltage.

[0011] FIG. 1 illustrates an exemplary block diagram of a communication circuit according to one embodiment of the present disclosure.

[0012] FIG. 2 illustrates an exemplary block diagram of an amplification circuit according to one embodiment of the present disclosure.

[0013] FIG. 3a illustrates, in accordance with one embodiment of the present disclosure, a graph of the second amplified voltage output from the second amplifier as the second modulation voltage changes.

[0014] FIG. 3b illustrates, exemplarily, graphs of impedances according to modulation voltages according to one embodiment of the present disclosure.

[0015] FIG. 3c exemplarily illustrates graphs of the efficiency of an amplifier according to a second modulation voltage in accordance with one embodiment of the present disclosure.

[0016] FIG. 3d illustrates graphs of the efficiency of an amplifier according to one embodiment of the present disclosure.

[0017] FIG. 4 illustrates an exemplary block diagram of a power modulator according to one embodiment of the present disclosure.

[0018] FIG. 5a illustrates, exemplarily, graphs of modulation voltages and output power when the load is 100% according to one embodiment of the present disclosure.

[0019] FIG. 5b exemplarily illustrates graphs of modulation voltages and output power when the load is less than 100% according to one embodiment of the present disclosure.

[0020] FIG. 5c exemplarily illustrates graphs of output power and efficiency according to load in accordance with one embodiment of the present disclosure.

[0021] FIG. 6 illustrates an exemplary block diagram of a communication circuit according to one embodiment of the present disclosure.

[0022] FIG. 7 illustrates an exemplary block diagram of an amplification circuit according to one embodiment of the present disclosure.

[0023] FIG. 8a illustrates an exemplary circuit diagram of an RF splitter in High Power (HP) mode according to one embodiment of the present disclosure.

[0024] FIG. 8b illustrates an exemplary circuit diagram of an RF splitter in a Low Power (LP) mode according to one embodiment of the present disclosure.

[0025] FIG. 9a illustrates, exemplarily, graphs of modulation voltages and output power in LP mode and HP mode according to one embodiment of the present disclosure.

[0026] FIG. 9b exemplarily illustrates graphs of efficiency according to output power in LP mode and HP mode according to one embodiment of the present disclosure.

[0027] FIG. 10 illustrates an exemplary block diagram of an amplification circuit according to one embodiment of the present disclosure.

[0028] FIG. 11a illustrates an exemplary circuit diagram of an amplification circuit according to one embodiment of the present disclosure.

[0029] FIG. 11b illustrates an exemplary circuit diagram of an amplification circuit according to one embodiment of the present disclosure.

[0030] FIG. 11c illustrates an exemplary circuit diagram of an amplification circuit according to one embodiment of the present disclosure.

[0031] FIG. 11d illustrates an exemplary circuit diagram of an amplification circuit according to one embodiment of the present disclosure.

[0032] FIG. 11e illustrates an exemplary circuit diagram of a first transmission line according to one embodiment of the present disclosure.

[0033] FIG. 11f illustrates an exemplary circuit diagram of a first transmission line according to one embodiment of the present disclosure.

[0034] FIG. 12 illustrates an exemplary block diagram of an electronic device according to one embodiment of the present disclosure.

[0035] FIG. 13 illustrates an exemplary flowchart of a method for wireless communication according to one embodiment of the present disclosure.

[0036] The terms used in the embodiments of this specification have been selected to be as widely used as possible, taking into account the functions of the present disclosure; however, these terms may vary depending on the intent of those skilled in the art, case law, the emergence of new technologies, etc. Additionally, in specific cases, terms have been arbitrarily selected by the applicant, and in such cases, their meanings will be described in detail in the description section of the relevant embodiments. Therefore, terms used in this specification should be defined not merely by their names, but based on their meanings and the overall content of the present disclosure.

[0037] The terms used in this disclosure are used merely to describe specific embodiments and are not intended to limit the scope of other embodiments. A singular expression may include a plural expression unless the context clearly indicates otherwise. Terms used herein, including technical or scientific terms, may have the same meaning as generally understood by those skilled in the art described in this disclosure. Terms used in this disclosure that are defined in a general dictionary may be interpreted as having the same or similar meaning as they have in the context of the relevant technology, and are not to be interpreted in an ideal or overly formal sense unless explicitly defined in this disclosure. In some cases, even terms defined in this disclosure are not to be interpreted to exclude the embodiments of this disclosure.

[0038] In the various embodiments of the present disclosure described below, a hardware-based approach is described as an example. However, since the various embodiments of the present disclosure include techniques using both hardware and software, the various embodiments of the present disclosure do not exclude a software-based approach.

[0039] Terms referring to signals used in the following description (e.g., message, information, preamble, signal, signaling, sequence, stream), terms referring to resources (e.g., symbol, slot, subframe, radio frame, subcarrier, RE (resource element), RB (resource block), BWP (bandwidth part), occasion), terms for operation states (e.g., step, operation, procedure), terms referring to data (e.g., packet, user stream, information, bit, symbol, codeword), terms referring to channels, terms referring to control information (e.g., DCI (downlink control information), MAC CE (medium access control element), RRC (radio resource control) signaling), terms referring to network entities, terms referring to device components, etc. are examples provided for the convenience of explanation. Accordingly, the present disclosure is not limited to the terms described below, and other terms having equivalent technical meanings may be used.

[0040] Singular expressions may include plural expressions unless the context clearly indicates otherwise. Terms used herein, including technical or scientific terms, may have the same meaning as generally understood by those skilled in the art as described in this specification.

[0041] Throughout this disclosure, when a part is described as "comprising" a certain component, this means that, unless specifically stated otherwise, it does not exclude other components but may include additional components. Furthermore, terms such as "part," "module," etc., as used in this specification refer to a unit that processes at least one function or operation, and this may be implemented in hardware or software, or as a combination of hardware and software.

[0042] As used in this disclosure, the expression “configured to” may be replaced, depending on the context, with, for example, “suitable for,” “having the capacity to,” “designed to,” “adapted to,” “made to,” or “capable of.” The term “configured to” may not necessarily mean only “specifically designed to” in hardware. Instead, in some situations, the expression “system configured to” may mean that the system is “capable of” in conjunction with other devices or components. For example, the phrase “processor configured to perform A, B, and C” may mean a dedicated processor for performing the said operations (e.g., an embedded processor), or a generic-purpose processor (e.g., a CPU or an application processor) capable of performing said operations by executing one or more software programs stored in memory.

[0043] In addition, when a component is described in the present disclosure as being "connected" or "connected" to another component, it should be understood that the component may be directly connected to or directly connected to the other component, but unless otherwise specifically stated, it may also be connected or connected through another component in between.

[0044] Additionally, in this disclosure, expressions such as "greater than" or "less than" may be used to determine whether a specific condition is satisfied or fulfilled; however, this is merely for the purpose of expressing an example and does not exclude descriptions such as "greater than" or "less than." Conditions described as "greater than" may be replaced with "greater than," conditions described as "less than" may be replaced with "less than," and conditions described as "greater than and less than" may be replaced with "greater than and less than."

[0045] FIG. 1 illustrates an exemplary block diagram of a communication circuit (100) according to one embodiment of the present disclosure.

[0046] Referring to FIG. 1, the communication circuit (100) may include a signal processor (102), an amplifier (104), and one or more antennas (106). The communication circuit (100) may be included in any electronic device. The communication circuit (100) may transmit data by transmitting an RF (Radio Frequency) signal to an external device of the electronic device.

[0047] The signal processor (102) can generate various signals used within the communication circuit (100). The signal processor (102) can process a baseband signal containing information to be transmitted to an external device according to various communication methods. For example, the signal processor (102) can process the baseband signal according to communication methods such as DM (Orthogonal Frequency Division Multiplexing), OFDMA (Orthogonal Frequency Division Multiple Access), WCDMA (Wideband Code Multiple Access), HSPA+ (High Speed ​​Packet Access+), etc. The present disclosure is not limited thereto, and the signal processor (102) can process the signal according to various communication methods to which a technique for modulating the amplitude and frequency of an RF signal is applied. By processing the baseband signal containing information to be transmitted to an external device, the signal processor (102) can generate an input RF signal (RF) from the baseband signal. in Can generate ).

[0048] The signal processor (102) can generate one or more control signals to control the operation of the amplifier (104). For example, the signal processor (102) can generate a power modulator control signal (C) to control the operation of the power modulator (108) of the amplifier (104). SM It can generate ). Power modulator control signal (C SM ) may include information for controlling the operation of at least some of one or more components included in the power modulator (108). Power modulator control signal (C SM The operations of the power modulator (108) according to ) will be described in detail later.

[0049] The signal processor (102) detects the envelope of the baseband signal and, based on the detected envelope, the envelope voltage (V env It can generate the envelope voltage (V env ) is the input RF signal (RF in It can correspond to the amplitude component of ). The input RF signal (RF) output from the signal processor (102) can correspond to the amplitude component of ). in ) and envelope voltage (V env ) may be an analog signal. The signal processor (102) may include a Digital to Analog Converter (DAC). The signal processor (102) uses the DAC to convert a digital envelope signal detected from digital baseband signals into an analog envelope voltage (V env It can be converted to ).

[0050] The amplifier (104) receives a power modulator control signal (C) from the signal processor (102). SM ) and envelope voltage (V env Based on ), the input RF signal (RF in The power of ) can be amplified. The amplification unit (104) may include a power modulator (108) and an amplification circuit (110). In one embodiment, the amplification unit (104) may be referred to as a power amplifier (PA) circuit.

[0051] The power modulator (108) has a plurality of modulation voltages (V) to be applied to the amplification circuit (110) based on the power modulator control signal (CSM) and the envelope voltage (Venv). SM1 , V SM2 , … , V SMN ) can be generated. In one embodiment, a plurality of modulation voltages (V SM1 , V SM2 , … , V SMN) can be discretely distributed. The power modulator (108) receives the envelope voltage (V) provided by the signal processor (102). env Based on ), a bias voltage can be provided to the amplifier circuit (110) by modulating the power supply (e.g., a DC power supply such as a battery power supply). Accordingly, the power supply applied to the amplifier circuit (110) (e.g., the power supply voltage of each amplifier included in the amplifier circuit (110)) is not fixed to a specific level of voltage, and the envelope voltage (V env It can be dynamically adjusted according to ). Accordingly, the power level of the amplification circuit (110) and the envelope voltage (V env Power loss based on the gap between ) can be reduced.

[0052] The amplification circuit (110) receives a plurality of modulation voltages (V) from the power modulator (108). SM1 , V SM2 , … , V SMN Based on at least a portion of ) input RF signal (RF in The power of ) can be amplified. The amplification circuit (110) amplifies the amplified input RF signal (RF in Output RF signal (RF) corresponding to ) out The signal can be transmitted to one or more antennas (106). In a wireless communication system, the transmission signal of a base station or terminal may be attenuated while being transmitted through a wireless channel. Accordingly, the power of the transmission signal needs to be amplified before transmission. To amplify a signal transmitted through air, the amplification circuit (110) may include a plurality of power amplifiers. Each of the plurality of power amplifiers may be connected to at least some of one or more antennas (106). Each power amplifier may transmit an amplified output RF signal to the connected antenna(s).

[0053] In one embodiment, the communication circuit (100) can transmit data using multiple frequency bands based on Carrier Aggregation (CA). The communication circuit (100) can amplify multiple input RF signals corresponding to multiple carriers using an amplifier (104). The output RF signals output from the amplifier (104) can be transmitted to an external device through one or more antennas (106).

[0054] One or more antennas (106) receive an output RF signal (RF) from an amplifier (104). out It can radiate ). Beamforming technology is used as one of the techniques to mitigate propagation path loss and increase the transmission distance of radio waves. Beamforming generally uses multiple antennas to concentrate the reach area of ​​radio waves or to increase the directivity of reception sensitivity for a specific direction. In one embodiment, to form beamforming coverage instead of forming a signal in an isotropic pattern using a single antenna, the communication circuit (100) may be equipped with multiple antennas. For example, one or more antennas (106) may be implemented as a Massive MIMO Unit (MMU). A form in which multiple antennas are gathered may be referred to as an antenna array. Each antenna included in the antenna array may be referred to as an array element or an antenna element. An antenna array may be configured in various forms, such as a linear array or a planar array. An antenna array may be referred to as a massive antenna array.

[0055] To achieve higher data capacity, the number of RF paths or the power per RF path must be increased. Increasing the number of RF paths leads to a larger product size and creates spatial constraints for installing actual base station equipment. To increase antenna gain through high output without increasing the number of RF paths, dividers (or splitters) can be used to connect multiple antenna elements to a single RF path. As signals are radiated through multiple antenna elements, antenna gain can be increased. The antenna elements corresponding to an RF path can be referred to as a sub-array.

[0056] In base stations or terminals of wireless communication systems, power amplifiers can be components with relatively high power consumption; therefore, the efficiency of the power amplifier can be a critical factor in the operation of the base station or terminal. Modulated signals used for data transmission in wireless communication systems may have a high Peak to Average Power Ratio (PAPR). For example, a time-domain OFDM signal may consist of multiple independently modulated subcarriers, and the output signal may be radiated in the form of the sum of the modulation symbols carried on each subcarrier. Accordingly, the maximum power of the output signal may increase proportionally to the number of subcarriers, and consequently, the PAPR may increase. As the PAPR increases, the efficiency of the power amplifier may decrease.

[0057] Meanwhile, at base stations, power amplifiers operate at lower output power when there are fewer users (e.g., when the load is lower), which can lead to a decrease in amplifier efficiency. Additionally, with the recent advancements in mobile communication, operating frequencies are increasing to support wider bandwidths. This increase in operating frequency can cause the gain of the transistors included in the power amplifier to degrade. To compensate for insufficient gain, more current may be used or the number of amplifier stages may be increased; this increases power consumption, which can consequently reduce system efficiency.

[0058] The amplifier section (104) of the communication circuit (100) can improve the efficiency of the power amplifier by taking into account high signal PAPR, a low number of users, and degraded transistor gain. The power modulator (108) of the amplifier section (104) can provide discrete modulation voltages to a plurality of amplifiers included in the amplifier circuit (110), thereby supporting a wide bandwidth modulation signal. The amplifier circuit (110) may include a plurality of amplifiers having the same bias conditions, and each amplifier may receive the same or different modulation voltage from the power modulator (108). Accordingly, the load impedance of each amplifier can be modulated, and thus the efficiency degradation caused by the PAPR of the modulation signal can be improved.

[0059] FIG. 2 illustrates an exemplary block diagram of an amplification circuit (110) according to one embodiment of the present disclosure.

[0060] Referring to FIG. 2, the amplification circuit (110) may include a first amplifier (202), a second amplifier (204), a coupler (206), and an impedance (208). The coupler (206) may include a first transmission line (210) and a second transmission line (212). An output RF signal (RF) connected to the coupler (206) and the impedance (208). outThe node where ) is output may be referred to as the output terminal of the amplifier (104). Z1 may be an impedance looking into the first amplifier (202) from the output terminal of the first amplifier (202). Z1' may be an impedance looking into the first transmission line (210) from the output terminal of the amplifier (104). Z2 may be an impedance looking into the second amplifier (204) from the output terminal of the second amplifier (204). Z2' may be an impedance looking into the second transmission line (212) from the output terminal of the amplifier (104). The impedance (208) may be connected between the output terminal of the amplifier (104) and the ground terminal. The value R of the impedance (208). opt may be the output impedance of the amplifier circuit (110) when the amplifier circuit (110) outputs maximum power. In one embodiment, the value R of the impedance (208) opt It can be 45Ω.

[0061] The signal processor (102) uses the power modulator (108) to control the envelope voltage (V env ) and power modulator control signal (C SM Can transmit ). Envelope voltage (V env ) and power modulator control signal (C SM Based on ), the power modulator (108) has a first modulation voltage (V SM1 ) and the second modulation voltage (V SM2 It can generate the first modulation voltage (V SM1 ) can be applied to the first amplifier (202), and the second modulation voltage (V SM2 ) can be applied to the second amplifier (204). The first modulation voltage (V SM1 ) can correspond to the power supply voltage of the first amplifier (202), and the second modulation voltage (V SM2 ) can correspond to the power supply voltage of the second amplifier (204).

[0062] The signal processor (102) inputs the RF signal (RF) to the amplification circuit (110). inIt can transmit the input RF signal (RF). in ) can be input to the first amplifier (202) and the second amplifier (204) of the amplification circuit (110). Input RF signal (RF in ) may be the driving voltage of the first amplifier (202) and the second amplifier (204). In the embodiment illustrated in FIG. 2, the input RF signal (RF) is used as the driving voltage for both the first amplifier (202) and the second amplifier (204). in ) may be applied. The amplifier circuit (110) may not include a circuit for adjusting the driving voltage of the first amplifier (202) and the second amplifier (204) (e.g., a phase compensation circuit, etc.), and thus the occurrence of loss due to additional components may be prevented.

[0063] The first amplifier (202) has a first modulation voltage (V SM1 Based on ), the input RF signal (RF in ) can be amplified. The first amplifier (202) can amplify the first amplified voltage (V a1 It can output ). Amplified voltage (V a1 ) is an input RF signal (RF) amplified by the first amplifier (202). in It can correspond to ). The second amplifier (204) can correspond to the second modulation voltage (V SM2 Based on ), the input RF signal (RF in ) can be amplified. The second amplifier (204) can amplify the second amplified voltage (V a2 It can output ). The second amplified voltage (V a2 ) is an input RF signal (RF) amplified by the second amplifier (204). in It can correspond to ). In the embodiment of FIG. 2, the first amplifier (202) and the second amplifier (204) are shown with the same size, but the embodiments of the present disclosure are not limited thereto. The size of the first amplifier (202) and the size of the second amplifier (204) may be the same or different.

[0064] The first amplifier (202) and the second amplifier (204) may have the same bias conditions. For example, the operating point of the first amplifier (202) and the operating point of the second amplifier (204) may be the same. Additionally or alternatively, the operating class of the first amplifier (202) and the operating class of the second amplifier (204) may be the same. In one embodiment, both the first amplifier (202) and the second amplifier (204) may operate as a Class A amplifier, a Class B amplifier, a Class AB amplifier, or a Class C amplifier. Since the first amplifier (202) and the second amplifier (204) have the same bias conditions, a reduction in the output power of the entire amplifier circuit (e.g., a reduction in maximum power, a reduction in maximum efficiency, and / or a reduction in back-off power) resulting from either amplifier operating under a relatively low bias condition can be prevented.

[0065] The combiner (206) may include a first transmission line (210) and a second transmission line (212). The first transmission line (210) may be connected between the output terminal of the first amplifier (202) and the output terminal of the amplifier (104). The second transmission line (212) may be connected between the output terminal of the second amplifier (204) and the output terminal of the amplifier (104). There may be no phase difference between the transmission lines (210, 212) included in the combiner (206). The first transmission line (210) and the second transmission line (212) may have a length of 90°. The first transmission line (210) and the second transmission line (212) may be implemented as a λ / 4 transformer or a quarter wavelength transformer. The characteristic impedance of the first transmission line (210) can be determined based on the output impedance and impedance (208) of the first amplifier (202). The characteristic impedance of the second transmission line (212) can be determined based on the output impedance and impedance (208) of the second amplifier (204).

[0066] FIG. 3a shows a second modulation voltage (V) according to one embodiment of the present disclosure. SM2 As ) changes, the second amplified voltage (V) output from the second amplifier (204) a2 The graph of ) is illustrated as an example.

[0067] Referring to FIG. 3a, a second modulated voltage (V) is obtained using the power modulator (108) in FIG. 2. SM2 The level of the power supply voltage of the second amplifier (204) can be adjusted by adjusting the level of ). The power modulator (108) is envelope voltage (V env Based on ), power supply voltage can be provided individually to the first amplifier (202) and the second amplifier (204). The second modulation voltage (V SM2 By adjusting the level of ), the output power of the amplification circuit (110) can be back-off.

[0068] Second modulation voltage (VSM2 As the level of ) decreases, the second amplified voltage (V) output from the second amplifier (204) a2 The level of ) can be reduced. For example, the second modulation voltage (V SM2 The second amplified voltage (V) when the level of ) is 5V a2 The level of ) is the second modulation voltage (V SM2 The second amplified voltage (V) when the level of ) is 2.5V a2 It can be greater than the level of ). The second modulation voltage (V SM2 The second amplified voltage (V) when the level of ) is 2.5V a2 The level of ) is the second modulation voltage (V SM2 The second amplified voltage (V) when the level of ) is 0V a2 It can be greater than the level of ). In one embodiment, the second modulation voltage (V SM2 The level of ) can be 0V. Therefore, a ground voltage can be applied as the power supply voltage of the second amplifier (204), and consequently, the second amplifier (204) can be turned off. In this embodiment, the voltage output from the second amplifier (204) is the driving voltage input to the second amplifier (204), i.e., the input RF signal (RF in It can be substantially the same as ).

[0069] Referring again to FIG. 2, since resistance corresponds to the ratio of voltage to current, the second amplified voltage (V a2As the level of ) decreases, the magnitude of impedance Z2 viewed toward the output terminal of the second amplifier (204) may decrease. As the magnitude of impedance Z2 decreases, the magnitude of impedance Z2' may increase by the 90° second transmission line (212). As the magnitude of impedance Z2' increases, the magnitude of impedance Z1' connected in parallel with impedance Z2' may decrease. As the magnitude of impedance Z1' decreases, the magnitude of impedance Z1 may increase by the 90° first transmission line (210). Consequently, as the power supply voltage of the amplifiers (202, 204) is modulated, the load impedances Z1 of the amplifier, Z2 can be modulated together, and the back-off output power can be varied. In other words, in the amplifier circuit (110) of FIG. 2, supply modulation and load impedance modulation can be applied simultaneously.

[0070] FIG. 3b shows modulation voltages (V) according to one embodiment of the present disclosure. SM1 , V SM2 Graphs of impedances (Z1, Z2) according to ) are illustrated as examples.

[0071] Referring to FIG. 3b, the second modulation voltage (V) for the second amplifier (204) SM2 The level of ) is V at 0V (i.e., the origin). SM1 It can be adjusted within a range between the same levels. In the embodiment of FIG. 3b, the size of the first amplifier (202) and the size of the second amplifier (204) are assumed to be the same. In this embodiment, the amplifier circuit (110) can be understood to have a symmetric structure.

[0072] When the size of the first amplifier (202) and the size of the second amplifier (204) are the same, the first optimal output impedance Z, which is the impedance at the point when the first amplifier (202) outputs maximum output power.1opt is the second optimal output impedance Z, which is the impedance at the point when the second amplifier (204) outputs maximum output power. 2opt It can be the same as. For example, the first modulation voltage (V), which is the power supply voltage of the first amplifier (202). SM1 The level of ) and the second modulation voltage (V), which is the power supply voltage of the second amplifier (204). SM2 At the point where the levels of ) are equal to each other at the maximum modulation voltage (e.g., the largest voltage among the voltages that can be output from the power modulator (108)), the load impedance Z1 of the first amplifier (202) and the load impedance Z2 of the second amplifier (204) are Z 1opt It can be the same as.

[0073] As described above with reference to FIG. 3a, the second modulation voltage (V SM2 As the level of ) decreases, the magnitude of the impedance Z2 viewed from the output terminal of the second amplifier (204) can also decrease. The second modulation voltage (V SM2 At the point where the level of ) is 0V (origin in FIG. 3b), the magnitude of the impedance Z2 can converge to 0, and accordingly, the load impedance Z1 of the first amplifier (202) is Z 1opt from 2Z 1opt It can increase up to.

[0074] Unlike the embodiment of FIG. 3b, the size of the first amplifier (202) and the size of the second amplifier (204) may differ from each other. In this embodiment, the amplifier circuit (110) may be understood to have an asymmetric structure. The size of the back-off power of the amplifier circuit (110) may vary depending on the size ratio between the first amplifier (202) and the second amplifier (204). In one embodiment, the size ratio between the first amplifier (202) and the second amplifier (204) may be adjusted by taking into account the PAPR of the modulation signal.

[0075] FIG. 3c is a second modulation voltage (V) according to one embodiment of the present disclosure. SM2Graphs of the efficiency of the amplification section (104) according to ) are illustrated as examples.

[0076] Referring to FIG. 3c, the efficiency of the amplifier (104) can increase as the output power increases, and the second modulation voltage (V SM2 It can vary depending on the level of ). The maximum efficiency of the amplifier (104) may be the efficiency when the amplifier (104) has maximum output power. When other conditions are the same, the second modulation voltage (V SM2 As the level of ) decreases, the output power of the amplifier (104) may decrease. Assuming that the size of the first amplifier (202) and the size of the second amplifier (204) are the same, the maximum output power P of the amplifier (104) Sat is the first modulation voltage (V SM1 ) and the second modulation voltage (V SM2 ) can be the output power when the maximum modulation voltage is the same.

[0077] The second modulation voltage (V) applied to the second amplifier (204) SM2 At the point where the level of ) decreases to 0V, the second amplifier (204) is turned off and only the first amplifier (202) can operate. As the second amplifier (204) is turned off, the output power of the amplifier section (104) becomes half, so the output power can be back-off by 3 dB. Also, as described above with reference to FIG. 3b, the second modulation voltage (V SM2 At the point where the level of ) decreases to 0V, the load impedance Z1 of the first amplifier (202) is Z 1opt from 2Z 1opt The size can be doubled, and thus the output power is halved, and can be back-off by 3 dB. Consequently, the second modulation voltage (V) applied to the second amplifier (204) SM2 At the point where the level of ) decreases to 0V, the output power is the maximum output power P of the amplifier (104). Sat It can be back-off by 6dB. Maximum output power PSat The power back-off by 6dB at is P 6dBBO It could be.

[0078] FIG. 3d illustrates graphs of the efficiency of the amplification unit (104) according to one embodiment of the present disclosure.

[0079] Referring to FIG. 3d, the graph drawn with a solid line can represent the efficiency according to the output power of the amplifier (104) of FIG. 2. The second modulation voltage (V) applied to the second amplifier (204) SM2 ) can vary discretely. The envelope voltage (V) input to the power modulator (108) env Based on the magnitude of ), the second modulation voltage (V SM2 The level of ) can be adjusted discretely. For example, the power modulator (108) can adjust the envelope voltage (V) using a Discrete Envelope Tracking (EDT) method. env Based on the magnitude of ), the second modulation voltage (V SM2 The level of ) can be adjusted. The graph shown by the solid line is the second modulation voltage (V SM2 It may be a graph expressing the efficiency of the amplifier (104) as the level of ) is adjusted from 0V to the maximum modulation voltage. The graph drawn with a solid line in FIG. 3d may correspond to the sum of the graphs shown in FIG. 3c. As described above with reference to FIG. 3c, the output power is P 6dBBO The point is the second modulation voltage (V SM2 The level of ) is 0V, and the first modulation voltage (V SM1 The level of ) can be the point where the maximum modulation voltage is.

[0080] The graph drawn with a dotted line can represent the efficiency of an amplifier (104) that does not include a power modulator (108). In an embodiment where the power modulator (108) is not included in the amplifier (104), a fixed power voltage may be applied to the first amplifier (202) and the second amplifier (204). Accordingly, the efficiency of the amplifier (104) can increase linearly as the output power increases. Comparing the graph drawn with a solid line and the graph drawn with a dotted line, the amplifier (104) of FIG. 2, which includes the power modulator (108) and the amplifier circuit (110), has a maximum output power P sat Power P back-off by 3dB from 3dBBO and 6dB back-off power P 6dBBO In this case, higher efficiency can be provided compared to an embodiment that does not include a power modulator (108).

[0081] The graph illustrated by the dotted line can represent the efficiency of the amplifier section (104) with the second amplifier (204) turned off. For example, the second modulation voltage (V) provided to the second amplifier (204). SM2 The level of ) may be equal to the level of the ground voltage, and accordingly, the second amplifier (204) may be turned off. As the second amplifier (204) is turned off, only half of the plurality of amplifiers (202, 204) (i.e., the first amplifier (202)) may be operated. As either of the plurality of amplifiers (202, 204) is turned off, the amplifier circuit (110) may be understood to include a half-sized amplifier. While the second amplifier (204) is turned off, the maximum output power output from the amplifier circuit (110) is P sat Power P back-off by 3dB from 3dBBO It could be.

[0082] The number of discrete modulation voltages provided by the power modulator (108) may be limited in consideration of design requirements such as power consumption and circuit size. Additionally, as the level of the modulation voltage is reduced to improve efficiency at relatively low output power, efficiency may degrade or the amplifier may turn off. The amplifier (104) of FIG. 2, comprising the power modulator (108) and the amplifier circuit (110), may include a plurality of amplifiers (202, 204). Through the plurality of amplifiers (202, 204) and the power modulator (108), the amplifier (104) of FIG. 2 can support a larger back-off magnitude. Comparing the graph shown as a solid line with the graph shown as a dashed line, the amplifier (104) of FIG. 2, comprising the power modulator (108) and the amplifier circuit (110), has a maximum output power P sat Power P back-off by 6dB from 6dBBO In this case, higher efficiency can be supported compared to an embodiment including a power modulator (108) and a single amplifier. Additionally, the amplifier (104) of FIG. 2, which includes a plurality of amplifiers (202, 204), can improve efficiency more finely than an embodiment including a single amplifier within the same modulation voltage range.

[0083] FIG. 4 illustrates an exemplary block diagram of a power modulator (108) according to one embodiment of the present disclosure.

[0084] Referring to FIG. 4, the power modulator (108) may include a power supply (402), a switch controller (404), a first switch circuit (408), and a second switch circuit (410). An envelope voltage (V) from the signal processor (102) of FIG. 1 to the input terminal of the power modulator (108) env ) and power modulator control signal (C SM ) can be applied. The first output terminal of the power modulator (108) can be connected to the first amplifier (202) of FIG. 2. The voltage of the first output terminal of the power modulator (108) is the first modulation voltage (VSM1 ) may be. The second output terminal of the power modulator (108) may be connected to the second amplifier (204) of FIG. 2. The voltage of the second output terminal of the power modulator (108) is the second modulation voltage (V SM2 It can be.

[0085] The power source (402) consists of one or more voltages (V1, …, V) each having a different level. N It can generate ) (N is a natural number). The power source (402) can generate voltages (V1, …, V N It may include one or more voltage generating circuits for generating ). The level of each voltage generated by the power supply (402) may be predefined. The level of each voltage generated by the power supply (402) is a power modulator control signal (C SM It can be adjusted by ). Voltages (V1, …, V) generated by the power supply (402) N ) can be applied to the first switch circuit (408) and the second switch circuit (410).

[0086] The power source (402) is the envelope voltage (V env ) and / or power modulator control signal (C SM A switch controller control signal (C) for controlling the switch controller (404) based on ) SC Can generate ). Switch controller control signal (C SC In response to ), the first modulation voltage (V SM1 ) and the second modulation voltage (V SM2 These voltages (V1, …, V N It can be selected from either )(and ground voltage). In the embodiment shown in FIG. 4, the first modulation voltage (V SM1 The levels of ) are the voltages (V1, …, V N It can be adjusted between the maximum and minimum levels among the levels of ). The second modulation voltage (V SM2 The levels of ) are the voltages (V1, …, V NIt can be adjusted between the maximum level and the level equal to the ground voltage among the levels of ).

[0087] In one embodiment, the power source (402) is an envelope voltage (V env Tracks ) and, based on the tracked envelope voltage, the switch controller control signal (C SC ) can be generated. In one embodiment, a power modulator control signal (C SM ) is the first modulation voltage (V) for the first amplifier (202). SM1 The level of ) and / or the second modulation voltage (V) for the second amplifier (204) SM2 Maintaining the level of ) to a specific value, or the first modulation voltage (V SM1 The level of ) and / or the second modulation voltage (V SM2 It may include a signal indicating to limit the range of the level of ). The power supply (402) is a power modulator control signal (C SM Based on ), the switch controller control signal (C SC Can generate ).

[0088] Switch controller control signal (C SC ) is one or more switch control signals (SW) generated by the switch controller (404). 11 , … , SW 1N , SW 21 , … , SW 2N , SW 2G It may include a signal indicating at least one level of ). Switch controller control signal (C SC ) is the first modulation voltage (V SM1 It may include a signal indicating the level of a signal indicating the level of ). The power supply (402) is a switch controller control signal (C SC ) can be transmitted to the switch controller (404).

[0089] The switch controller (404) is a switch controller control signal (C SCThe first switch circuit (408) and the second switch circuit (410) can be controlled based on ). The switch controller (404) can control the switch controller control signal (C SC A first set of switch control signals (SW) for opening (or enabling) or closing (or disabling) N switches (408-1, …, 408-N) included in the first switch circuit (408) based on ). 11 , … , SW 1N ) can be generated. The switch controller (404) can generate a switch controller control signal (C SC A second set of switch control signals (SW) for opening or closing N+1 switches (410-1, …, 410-N, 410-G) included in the second switch circuit (410) based on ). 21 , … , SW 2N , SW 2G ) can be generated. The switch controller (404) generates a first set of switch control signals (SW) to the switches (408-1, …, 408-N) of the first switch circuit (408). 11 , … , SW 1N ) can be provided respectively. The switch controller (404) provides a second set of switch control signals (SW) to the switches (410-1, …, 410-N, 410-G) of the second switch circuit (410). 21 , … , SW 2N , SW 2G Each can provide ).

[0090] The first switch circuit (408) may include N switches (408-1, …, 408-N). Each of the switches (408-1, …, 408-N) has voltages (V1, …, V NIt can be connected to any one of the output terminals of the power supply (402) to which the voltage (V1) is applied and to the first output terminal of the power modulator (108). For example, the first switch (408-1) of the first switch circuit (408) can be connected between the output terminal of the power supply (402) to which the voltage (V1) is applied and the first output terminal of the power modulator (108). The Nth switch (408-N) of the first switch circuit (408) is connected to the voltage (V N ) can be connected between the output terminal of the power supply (402) to which it is applied and the first output terminal of the power modulator (108).

[0091] First set of switch control signals (SW 11 , … , SW 1N Based on ), the first switch circuit (408) is voltages (V1, …, V N Select one of the following, and the selected voltage is the first modulation voltage (V SM1 It can be provided as the first amplifier (202). Each of the switches (408-1, …, 408-N) can be provided with the first set of switch control signals (SW 11 , … , SW 1N ) may be applied. The operation of N switches (408-1, …, 408-N) is each controlled by the first set of switch control signals (SW 11 , … , SW 1N It can be controlled by the first set of switch control signals (SW 11 , … , SW 1N In response to a corresponding switch control signal among ), each of the switches (408-1, …, 408-N) can be opened or closed.

[0092] For example, switch controller control signal (C SC Based on ), the switch controller (404) uses a first set of switch control signals (SW 11 , … , SW 1NThe level of any one of the signals can be adjusted from a low level to a high level, and the level of the remaining signals can be maintained (or adjusted) at a low level. The first set of switch control signals (SW 11 , … , SW 1N In response to ), only one of the switches (408-1, …, 408-N) of the first switch circuit (408) (e.g., the switch to which a high-level switch control signal is applied) may be closed, and the remaining switches (e.g., the switches to which a low-level switch control signal is applied) may be opened. Accordingly, the voltages (V1, …, V N One of the voltages ) passes through a closed switch and through the first output terminal of the power modulator (108) to the first amplifier (202) to the first modulation voltage (V SM1 It can be provided as ). For example, in response to the first switch (408-1) among the switches (408-1, …, 408-N) being closed and the remaining switches being opened, the output terminal of the power supply (402) to which the voltage (V1) is applied is connected to the first output terminal of the power modulator (108), and the remaining output terminals of the power supply (402) and the first output terminal of the power modulator (108) can be disconnected. Accordingly, the voltage (V1) passes through the switch (408-1) and through the first output terminal of the power modulator (108) to the first amplifier (202) as the first modulated voltage (V SM1 It can be provided as ).

[0093] The second switch circuit (410) may include N+1 switches (410-1, …, 410-N, 410-G). Each of the switches (410-1, …, 410-N, 410-G) is voltages (V1, …, V NIt can be connected to any one of the output terminals of the power supply (402) to which the voltage (V1) is applied and to the second output terminal of the power modulator (108). For example, the first switch (410-1) of the second switch circuit (410) can be connected between the output terminal of the power supply (402) to which the voltage (V1) is applied and the second output terminal of the power modulator (108). The Nth switch (410-N) of the second switch circuit (410) is connected to the voltage (V N ) can be connected between the output terminal of the power supply (402) to which it is applied and the second output terminal of the power modulator (108). The N+1 switch (401-G) of the second switch circuit (410) can be connected between the ground terminal and the second output terminal of the power modulator (108).

[0094] Second set of switch control signals (SW 21 , … , SW 2N , SW 2G Based on ), the second switch circuit (410) is voltages (V1, …, V N Select either ) and ground voltage, and set the selected voltage to the second modulation voltage (V SM2 It can be provided as a second amplifier (204). Each of the switches (410-1, …, 410-N, 410-G) can be provided with a second set of switch control signals (SW 21 , … , SW 2N , SW 2G ) may be applied. The operation of N switches (410-1, …, 410-N, 410-G) is each controlled by a second set of switch control signals (SW 21 , … , SW 2N , SW 2G It can be controlled by ). A second set of switch control signals (SW 21 , … , SW 2N , SW 2G In response to a corresponding switch control signal among ), each of the switches (410-1, …, 410-N, 410-G) can be opened or closed.

[0095] For example, switch controller control signal (C SC Based on ), the switch controller (404) uses a second set of switch control signals ((SW 21 , … , SW 2N , SW 2G The level of any one of the signals can be adjusted from a low level to a high level, and the level of the remaining signals can be maintained (or adjusted) at a low level. The second set of switch control signals (SW 21 , … , SW 2N , SW 2G In response to ), only one of the switches (410-1, …, 410-N, 410-G) of the second switch circuit (410) (e.g., the switch to which a high-level switch control signal is applied) may be closed, and the remaining switches (e.g., the switches to which a low-level switch control signal is applied) may be opened. Accordingly, the voltages (V1, …, V N Either one of the ) and ground voltages is transmitted to the second amplifier (204) through the second output terminal of the power modulator (108) via a closed switch as a second modulation voltage (V SM1 It can be provided as ). For example, in response to the second switch (410-1) among the switches (410-1, …, 410-N, 410-G) being closed and the remaining switches being opened, the output terminal of the power supply (402) to which the voltage (V1) is applied is connected to the second output terminal of the power modulator (108), and the remaining output terminals of the power supply (402) and the second output terminal of the power modulator (108) can be disconnected. Accordingly, the voltage (V1) passes through the switch (410-1) and through the second output terminal of the power modulator (108) to the second amplifier (204) as a second modulated voltage (V SM1 It can be provided as ).

[0096] The level of at least one modulation voltage among the modulation voltages output from the power modulator (108) is equal to or greater than the ground voltage and the maximum modulation voltage (e.g., voltage (V NIt can be adjusted within a range equal to or smaller than )). During a first time interval in which the level of the at least one modulation voltage is equal to the ground voltage, the amplifier to which the at least one modulation voltage is applied can be turned off. For example, in response to the N+1 switch (410-G) among the switches (410-1, …, 410-N, 410-G) being closed and the remaining switches being opened, the ground voltage passes through the N+1 switch (410-G) and through the second output terminal of the power modulator (108) to the second amplifier (204) to the second modulation voltage (V SM2 It can be provided as ). The ground voltage is the second modulation voltage (V SM2 During the time interval applied to the second amplifier (204) as ), the second amplifier (204) can be turned off.

[0097] In one embodiment, the number of switches included in the first switch circuit (408) may be equal to the number of different levels of voltages generated by the power supply (402). In one embodiment, the number of switches included in the second switch circuit (410) may be one greater than the number of different levels of voltages generated by the power supply (402).

[0098] FIG. 5a shows modulation voltages (V) when the load is 100% according to one embodiment of the present disclosure. SM1 , V SM2 Graphs of ) and output power are illustrated as examples.

[0099] Referring to FIG. 5a, the first modulation voltage (V SM1 ) and the second modulation voltage (V SM2 The output power can be back-off as the level of ) is adjusted. The first modulation voltage (V SM1 The level of ) can be adjusted based on the loading. The second modulation voltage (V SM2 The level of ) can be adjusted considering the PAPR of the signal. For example, the second modulation voltage (V SM2The level of ) is the envelope voltage (V env It can be adjusted by a power modulator (108) to be aligned with the envelope detected from ).

[0100] In the embodiment illustrated in FIG. 5a, the electronic device including the communication circuit (100) may experience a maximum load. For example, the number of external terminals (e.g., user terminals or user equipment) connected to the electronic device including the communication circuit (100) may reach the maximum number of terminals supported by the electronic device. Accordingly, the first modulation voltage (V SM1 The level of ) can be maintained at the maximum modulation voltage, which is voltage (V1).

[0101] Second modulation voltage (V SM2 The level of ) can be adjusted between the ground voltage and the voltage (V1) in consideration of PAPR. For example, the second modulation voltage (V SM2 The level of ) can be adjusted to any one of the voltages (V1, V2, V3, V4) and the ground voltage. For example, the level of the second modulation voltage (VSM2) is the envelope voltage (V env It can be periodically adjusted to follow the envelope detected from ). The maximum output power P of the amplifier (104) sat is the first modulation voltage (V SM1 The level of ) and the second modulation voltage (V SM2 The level of ) can be achieved based on the maximum modulation voltage, i.e., voltage (V1).

[0102] FIG. 5b shows modulation voltages (V) when the load is less than 100% according to one embodiment of the present disclosure. SM1 , V SM2 Graphs of ) and output power are illustrated as examples.

[0103] Referring to FIG. 5b, in contrast to the embodiment illustrated in FIG. 5a, the first modulation voltage (V SM1 The level of ) can be reduced based on the load. As described above with reference to FIG. 5a, the first modulation voltage (VSM1 The level of ) can be adjusted based on the load of the electronic device including the communication circuit (100). In the embodiment illustrated in FIG. 5b, the electronic device including the communication circuit (100) may experience a load less than the maximum load. For example, the number of external terminals (e.g., user terminals or user equipment) connected to the electronic device including the communication circuit (100) may be less than the maximum number of terminals supported by the electronic device. Accordingly, the first modulation voltage (V SM1 The level of ) can be reduced to a voltage (V2) smaller than the voltage (V1).

[0104] Second modulation voltage (V SM2 The level of ) can be adjusted between the ground voltage and the voltage (V2) considering the PAPR of the signal. For example, the second modulation voltage (V SM2 The level of ) is the envelope voltage (V env It can be adjusted by a power modulator (108) to be aligned with the envelope detected from ). For example, a second modulation voltage (V SM2 The level of ) is the envelope voltage (V env It can be periodically adjusted to either the voltages (V1, V2, V3, V4) or the ground voltage to follow the envelope detected from ). In the embodiment shown in FIG. 5b, the maximum output power P sat2 is the first modulation voltage (V SM1 The level of ) and the second modulation voltage (V SM2 The level of ) can be achieved based on the maximum modulation voltage, i.e., voltage (V2). Since voltage (V2) is smaller than voltage (V1), power P sat2 is the first modulation voltage (V SM1 The level of ) and the second modulation voltage (V SM2 P, the output power when the level of ) is voltage (V1). sat It can be smaller.

[0105] Comparing the embodiment of FIG. 5a and the embodiment of FIG. 5b, the power efficiency that decreases with decreasing load of the electronic device including the communication circuit (100) is the first modulation voltage (V SM1 It can be improved by adjusting ). For example, as the load of the electronic device decreases, the first modulation voltage (V SM1 The level of ) can be reduced. The first modulation voltage (V SM1 Efficiency at low output power can be improved by reducing ). The efficiency that decreases according to the signal's PAPR is the second modulation voltage (V SM2 It can be improved by adjusting the ). For example, to track the signal envelope, the second modulation voltage (V SM2 The level of ) is the ground voltage and the first modulation voltage (V SM1 It can be periodically adjusted between the levels of the second modulation voltage (VSM2). Accordingly, high efficiency can be maintained over a wide output range by adjusting the level of the second modulation voltage (VSM2).

[0106] In one embodiment, the power modulator (108) can obtain information indicating the load of an electronic device including a communication circuit (100). For example, a power modulator control signal (C SM ) is a first modulation voltage (V) based on a signal indicating a load of an electronic device including a communication circuit (100) or a load of an electronic device. SM1 It may include a signal instructing to increase or decrease ). Power modulator control signal (C SM In response to ), the power modulator (108) has a first modulation voltage (V SM1 A switch controller control signal (C) that determines the level of ) and instructs the selection of the determined level SC Generate ) and switch controller control signal (C SC ) can be transmitted to the switch controller (404). Switch controller control signal (C SC Based on ), the switch controller (404) determines the first modulation voltage (V) of a determined level.SM1 The first switch circuit (408) can be controlled so that ) is output. For example, the switch controller (404) can generate a switch control signal that instructs to close the switch connected to the output terminal of the power supply (402) which outputs a voltage of a determined level, and to open the remaining switches.

[0107] FIG. 5c exemplarily illustrates graphs of output power and efficiency according to load in accordance with one embodiment of the present disclosure.

[0108] Referring to FIG. 5c, the graph of efficiency according to the embodiment of FIG. 5a is shown as a solid line ('100% load'), and the graph of efficiency according to the embodiment of FIG. 5b is shown as a dotted line ('<100% load'). The graph shown as a dotted line can represent the efficiency of the amplifier (104) that does not include a power modulator (108). As described above with reference to FIG. 3d, in the embodiment where the power modulator (108) is not included in the amplifier (104), a fixed power voltage may be applied to the first amplifier (202) and the second amplifier (204). Therefore, at low output power, the efficiency of the amplifier (104) may deteriorate.

[0109] As the load decreases, higher efficiency at lower output power is required, and therefore, the first modulation voltage (V SM1 The magnitude of ) can be reduced. When comparing the graph of efficiency according to the embodiment of FIG. 5a with the graph of efficiency according to the embodiment of FIG. 5b, the first modulation voltage (V SM1 The embodiment of FIG. 5a, in which the level of ) is higher, can support high efficiency in a higher output power range. Accordingly, the first modulation voltage (V SM1 By adjusting the level of ), the efficiency of the amplifier (104) can be improved by taking into account the load of the electronic device including the communication circuit (100).

[0110] Depending on the PAPR range of the signal, in the embodiment of FIG. 5a and the embodiment of FIG. 5b, the second modulation voltage (VSM2 The level of ) can be adjusted. In the embodiment of FIG. 5a and the embodiment of FIG. 5b, at the point when minimum output power is provided, the second modulation voltage (V SM2 The level of ) can be equal to the ground voltage, and accordingly, the second amplifier (204) can be turned off. Based on the envelope signal, the second modulation voltage (V SM2 By adjusting the level of ), high efficiency of the amplifier (104) can be provided within the PAPR range of the signal.

[0111] FIG. 6 illustrates an exemplary block diagram of a communication circuit (600) according to one embodiment of the present disclosure.

[0112] Referring to FIG. 6, the communication circuit (600) may include a signal processor (602), an amplifier (604), and one or more antennas (606). The communication circuit (600) may be included in any electronic device. The communication circuit (600) may transmit data by transmitting an RF signal to an external device of the electronic device. The signal processor (602) may be implemented in a manner similar to the signal processor (102) of FIG. 1 and may operate in a similar manner. The one or more antennas (606) may be implemented in a manner similar to the one or more antennas (106) of FIG. 1 and may operate in a similar manner.

[0113] The amplifier (604) may include a power modulator (608), an amplifier circuit (610), and an RF divider (612). The amplifier (604) receives a power modulator control signal (C) received from the signal processor (102). SM ) and envelope voltage (V env Based on ), the input RF signal (RF in The power of ) can be amplified. In one embodiment, the amplification unit (604) may be referred to as a power amplifier (PA) circuit. The power modulator (608) is a power modulator control signal (C SM ) and envelope voltage (Venv A plurality of modulation voltages (V) to be applied to an amplification circuit (110) based on ) SM1 , … , V SMN It can generate ). The power modulator (608) of FIG. 6 can be implemented in a manner similar to the power modulator (108) of FIG. 1 and can operate in a similar manner. The amplification circuit (610) can generate an input RF signal (RF in ) can be amplified. The amplification circuit (610) can amplify a plurality of modulation voltages (V) received from the power modulator (608). SM1 , … , V SMN Based on at least a portion of ) input RF signal (RF in Amplifies the power of ) and outputs the RF signal (RF out ) can be provided to one or more antennas (606). The amplification circuit (610) is implemented in a manner similar to the amplification circuit (110) of FIG. 1 and can operate in a similar manner.

[0114] Additionally or alternatively, the power modulator (608) of FIG. 6 has a power modulator control signal (C SM Based on ), the mode control signal (C MODE Can generate ). Mode control signal (C MODE ) may include a signal for adjusting the operating mode of the amplification circuit (610). In one embodiment, the amplification circuit (610) may support a plurality of operating modes. Mode control signal (C MODE ) may include a signal for adjusting the mode of the amplifier circuit (610) to any one of the multiple operating modes supported by the amplifier circuit (610). The power modulator (608) of FIG. 6 sends a mode control signal (C) to the RF splitter (612). MODE Can transmit ).

[0115] The RF splitter (612) receives the input RF signal (RF) from the signal processor (102). in) can receive. The RF splitter (612) receives a mode control signal (C) from the power modulator (608). MODE ) can be received. Mode control signal (C) from power modulator (608) MODE Based on ), the RF splitter (612) inputs an RF signal (RF) to a plurality of amplifiers included in the amplification circuit (610). in ) can be distributed. For example, the RF splitter (612) can distribute the mode control signal (C MODE Based on the operating mode of the amplification circuit (610) indicated by ), the input RF signal (RF in ) provided to only one amplifier, or input RF signal (RF in The input RF signal (RF) can be divided and provided by multiple amplifiers. in The distribution ratio of ) is the mode control signal (C MODE It can be determined based on the operating mode of the amplification circuit (610) indicated by the mode control signal (C). MODE Based on ), an input RF signal (RF) provided to each of the plurality of amplifiers of the amplification circuit (610) by the RF splitter (612). in The level (or magnitude of power) of ) can be adjusted.

[0116] In the embodiment illustrated in FIG. 6, the amplification circuit (610) may operate according to any one of a plurality of operating modes. Depending on the operating mode of the amplification circuit (610), an input RF signal (RF) is sent to each of the plurality of amplifiers included in the amplification circuit (610) by the RF splitter (612). in ) can be distributed. For example, any amplifier included in the amplification circuit (610) may, depending on the operating mode of the amplification circuit (610), receive an input RF signal (RF in ) receiving part or all of the power, or input RF signal (RF in You may not be provided with ).

[0117] FIG. 7 illustrates an exemplary block diagram of an amplification circuit (610) according to one embodiment of the present disclosure.

[0118] Referring to FIG. 7, the amplification circuit (610) may include a first amplifier (702), a second amplifier (704), a coupler (706), and an impedance (708). The coupler (706) may include a first transmission line (710) and a second transmission line (712). An output RF signal (RF) to which the coupler (706) and the impedance (708) are connected out The node where ) is output may be referred to as the output terminal of the amplifier (604). The impedance (708) may be connected between the output terminal of the amplifier (604) and the ground terminal. The value R of the impedance (708). opt may be the output impedance of the amplifier circuit (610) when the amplifier circuit (610) outputs maximum power.

[0119] The signal processor (602) uses the power modulator (608) to control the envelope voltage (V env ) and power modulator control signal (C SM Can transmit ). Envelope voltage (V env ) and power modulator control signal (C SM Based on ), the power modulator (608) has a first modulation voltage (V SM1 ), second modulation voltage (V SM2 ), and mode control signal (C MODE It can generate the first modulation voltage (V SM1 ) can be applied to the first amplifier (702). The second modulation voltage (V SM2 ) can be applied to the second amplifier (704). Mode control signal (C MODE ) can be applied to the RF splitter (612). The first modulation voltage (V SM1 ) can correspond to the power supply voltage of the first amplifier (702), and the second modulation voltage (V SM2 ) can correspond to the power supply voltage of the second amplifier (704).

[0120] The signal processor (602) inputs the RF signal (RF) to the amplification circuit (610). in Can transmit ). Mode control signal (C MODE Based on ), the RF splitter (612) inputs the RF signal (RF in ) can be distributed to the first amplifier (702) and the second amplifier (704). For example, the RF splitter (612) can distribute the input RF signal (RF) based on the operating mode of the amplification circuit (610). in ) can be distributed to the first amplifier (702) and the second amplifier (704). The RF splitter (612) distributes the first input signal (V) to the first amplifier (702). in1 ) can be provided. The RF splitter (612) can provide the second input signal (V) to the second amplifier (704). in2 It can provide ). The first input signal (V in1 ) and the second input signal (V in2 The sum of ) is the input RF signal (RF in It can correspond to ). The operation of the RF splitter (612) will be described in detail later with reference to FIGS. 8a and 8b.

[0121] The first amplifier (702) has a first modulation voltage (V SM1 ) to the first input signal (V in1 ) can be amplified. The first amplifier (702) can amplify the first amplified voltage (V a1 ) can output. The second amplifier (704) can output the second modulation voltage (V SM2 Based on ), the second input signal (V in2 ) can be amplified. The second amplifier (704) can amplify the second amplified voltage (V a2 It can output ). In the embodiment of FIG. 7, the first amplifier (702) and the second amplifier (704) are shown as having the same size, but the embodiments of the present disclosure are not limited thereto. The size of the first amplifier (702) and the size of the second amplifier (704) may be the same or different.

[0122] The first amplifier (702) and the second amplifier (704) may have the same bias conditions. For example, the operating point of the first amplifier (702) and the operating point of the second amplifier (704) may be the same. Additionally or alternatively, the operating class of the first amplifier (702) and the operating class of the second amplifier (704) may be the same. In one embodiment, both the first amplifier (702) and the second amplifier (704) may operate as a Class A amplifier, a Class B amplifier, a Class AB amplifier, or a Class C amplifier. Since the first amplifier (702) and the second amplifier (704) have the same bias conditions, a reduction in the output power of the entire amplifier circuit (e.g., a reduction in maximum power, a reduction in maximum efficiency, and / or a reduction in back-off power) resulting from either amplifier operating under a relatively low bias condition can be prevented.

[0123] The coupler (706) is a first amplified voltage (V) output from the first amplifier (702). a1 ) and the second amplified voltage (V) output from the second amplifier (704) a2...can be combined. The combiner (706) may include a first transmission line (710) and a second transmission line (712). The first transmission line (710) may be connected between the output terminal of the first amplifier (702) and the output terminal of the amplifier (604). The second transmission line (712) may be connected between the output terminal of the second amplifier (704) and the output terminal of the amplifier (604). There may be no phase difference between the transmission lines (710, 212) included in the combiner (706). The first transmission line (710) and the second transmission line (712) may have a length of 90°. The first transmission line (710) and the second transmission line (712) may be implemented as a λ / 4 converter or a 1 / 4 wavelength converter. The characteristic impedance of the first transmission line (710) can be determined based on the output impedance and impedance (708) of the first amplifier (702). The characteristic impedance of the second transmission line (712) can be determined based on the output impedance and impedance (708) of the second amplifier (704).

[0124] FIG. 8a illustrates an exemplary circuit diagram of an RF splitter (612) in a High Power (HP) mode according to one embodiment of the present disclosure. FIG. 8b illustrates an exemplary circuit diagram of an RF splitter (612) in a Low Power (LP) mode according to one embodiment of the present disclosure.

[0125] Referring to FIGS. 8a and 8b, the RF splitter (612) may include a first RF transmission line (802), a second RF transmission line (804), and a mode switch (806). The first RF transmission line (802) is an input terminal of the RF splitter (612) (e.g., an input RF signal (RF inA second RF transmission line (804) can be connected between the input terminal of the RF splitter (612) and the second output terminal of the RF splitter (612) (e.g., the output node of the RF splitter (612) connected to the first amplifier (702). A second RF transmission line (804) can be connected between the input terminal of the RF splitter (612) and the second output terminal of the RF splitter (612) (e.g., the output node of the RF splitter (612) connected to the second amplifier (704). A mode switch (806) can be connected between the second output terminal of the RF splitter (612) and the ground terminal.

[0126] There may be no phase difference between the RF transmission lines (802, 804) included in the RF splitter (612). The first RF transmission line (802) and the second RF transmission line (804) may have a length of 90°. The first RF transmission line (802) and the second RF transmission line (804) may be implemented as a λ / 4 converter or a 1 / 4 wavelength converter. The characteristic impedance of the first RF transmission line (802) may be determined based on the output impedance and impedance (708) of the first amplifier (702). The characteristic impedance of the second RF transmission line (712) may be determined based on the output impedance and impedance (708) of the second amplifier (704).

[0127] The mode switch (806) is a mode control signal (C MODE It can be opened or closed based on ). Mode control signal (C MODE Based on ), the input RF signal (RF) between the first amplifier (702) and the second amplifier (704) in The distribution ratio of ) can be controlled, and accordingly, the operating mode of the amplification circuit (610) can be controlled. In one embodiment, the amplification circuit (610) can operate in either a high power (HP) mode or a low power (LP) mode. Mode control signal (C MODE ) may include a signal (or value) for adjusting the operating mode of the amplification circuit (610).

[0128] In the embodiment illustrated in FIG. 8a, the amplification circuit (610) can operate in high-power mode. Mode control signal (C MODE ) may include a signal for adjusting the operating mode of the amplifier circuit (610) to a high-power mode. Mode control signal (C MODE In response to ), the RF switch (806) may be opened. The RF switch (806) may disconnect the second output terminal and the ground terminal of the RF splitter (612). Accordingly, the input RF signal (RF in ) can be distributed to the first amplifier (702) and the second amplifier (704). In the embodiment shown in FIG. 8a, the input RF signal (RF in ) can be evenly distributed to the first amplifier (702) and the second amplifier (704). For example, input RF signal (RF) to the first amplifier (702) and the second amplifier (704). in Half of the power of ) (RF in / 2) can be provided.

[0129] In the embodiment of FIG. 8b, the amplifier circuit (610) can operate in a low-power mode. Mode control signal (C MODE ) may include a signal for adjusting the operating mode of the amplifier circuit (610) to a low-power mode. Mode control signal (C MODE In response to ), the RF switch (806) may be closed. The RF switch (806) may connect the second output terminal and the ground terminal of the RF splitter (612). Due to the 90° second transmission line (804), the impedance viewed from the input terminal of the RF splitter (612) toward the second output terminal of the RF splitter (612) connected to the ground terminal may be infinite. Accordingly, the input RF signal (RF in ) may be provided only to the first amplifier (702) and may not be provided to the second amplifier (704).

[0130] FIG. 9a illustrates, exemplarily, graphs of modulation voltages and output power in LP mode and HP mode according to one embodiment of the present disclosure.

[0131] Referring to FIG. 9a, while the amplifier circuit (610) is operating in LP mode, the output power of the amplifier circuit (610) is P mode It may be equal to or smaller than. While the amplifier circuit (610) is operating in HP mode, the output power of the amplifier circuit (610) is such that the output power is P mode It can exceed. In LP mode, the first modulation voltage (V SM1 The level of ) can be adjusted within the range of voltages generated from the power supply of the power modulator (608) in consideration of the PAPR of the signal. For example, the first modulation voltage (V SM1 The level of ) is the envelope voltage (V env It can be adjusted to any one of the voltages (V1, V2, V3, V4) by the power modulator (608) so as to be aligned with the envelope detected from ). As in the embodiment shown in FIG. 8b, in LP mode, the amplifier (702) receives the input RF signal (RF in ) may not be provided, and at the same time, the second modulation voltage (V SM2 The level of ) can be fixed to the ground voltage.

[0132] In HP mode, the first modulation voltage (V SM1 The level of ) can be fixed to the highest level voltage (e.g., voltage (V1)) among the voltages generated by the power modulator (608). The second modulation voltage (V SM2 The level of ) can be adjusted between the ground voltage and the voltage (V1) in consideration of PAPR. For example, the second modulation voltage (V SM2 The level of ) can be adjusted to any one of the voltages (V1, V2, V3, V4) and the ground voltage. The second modulation voltage (V SM2 The level of ) is the envelope voltage (V envIt can be periodically adjusted to follow the envelope detected from ). The maximum output power Psat of the amplifier (604) can be adjusted to follow the first modulation voltage (V SM1 The level of ) and the second modulation voltage (V SM2 The level of ) can be achieved based on the maximum modulation voltage, i.e., voltage (V1).

[0133] In LP mode, either of the amplifiers (702, 704) may be turned off. For example, as described above with reference to FIG. 8b, in LP mode, the signal input to the second amplifier (704) by the RF splitter (612) may be blocked. Since only the first amplifier (702) among the amplifiers (702, 704) is operating, a gain of 3 dB can be obtained. Additionally, the first modulation voltage (V SM1 As the level of ) is adjusted, efficiency at low output power can be improved.

[0134] FIG. 9b exemplarily illustrates graphs of efficiency according to output power in LP mode and HP mode according to one embodiment of the present disclosure.

[0135] Referring to FIG. 9b, the graph of efficiency in LP mode is shown as a dotted line, and the graph of efficiency in HP mode is shown as a solid line. The graph shown as a dotted line can represent the efficiency of the amplifier (604) that does not include the RF divider (612) and the power modulator (608). As described above with reference to FIG. 3d, in an embodiment where the power modulator (608) is not included in the amplifier (604), a fixed power voltage may be applied to the first amplifier (702) and the second amplifier (704). Therefore, at low output power, the efficiency of the amplifier (604) may deteriorate.

[0136] As described above with reference to FIG. 9a, in LP mode, the switch (806) of the RF splitter (612) can be closed, and the second modulation voltage (V SM2The level of ) can be equal to the ground voltage. Therefore, the second amplifier (704) can be turned off. Accordingly, in LP mode, a 3dB power gain resulting from the turned-off second amplifier (704) can be obtained. Depending on the PAPR range of the signal, the first modulated signal (V SM1 The level of ) can be dynamically changed to any one of the voltages (V1, V2, V3, V4). Accordingly, the efficiency of the amplifier (604) can be improved even at low output power.

[0137] In HP mode, the first modulation voltage (V SM1 The level of ) can be fixed at the level of the maximum modulation voltage. Depending on the PAPR range of the signal, the second modulation voltage (V SM2 The level of ) can dynamically change to any one of the voltages (V1, V2, V3, V4) and the ground voltage. Based on the envelope signal, the second modulation voltage (V SM2 By adjusting the level of ), high efficiency of the amplifier (604) can be provided within the PAPR range of the signal.

[0138] FIG. 10 illustrates an exemplary block diagram of an amplification circuit (1000) according to one embodiment of the present disclosure.

[0139] Referring to FIG. 10, the communication circuit (100) of FIG. 1 may include a signal processor (102) and an amplifier (104). The amplifier (104) may include a power modulator (108) and an amplifier circuit (1000). The amplifier circuit (1000) may include N amplifiers (1002, 1004, …, 100N), a combiner (1006), and an impedance (1008) (N is a natural number greater than 2). The combiner (1006) may include N transmission lines (1010, 1012, …, 101N). An output RF signal (RF) connected to the combiner (1006) and the impedance (1008). outThe node where ) is output may be referred to as the output terminal of the amplifier (104). The impedance (1008) may be connected between the output terminal of the amplifier (104) and the ground terminal. The value R of the impedance (1008). opt may be the output impedance of the amplifier circuit (1000) when the amplifier circuit (1000) outputs maximum power.

[0140] The signal processor (102) uses the power modulator (108) to control the envelope voltage (V env ) and power modulator control signal (C SM Can transmit ). Envelope voltage (V env ) and power modulator control signal (C SM Based on ), the power modulator (108) has N modulation voltages (V SM1 , V SM2 , … , V SMN It can generate ). N modulation voltages (V SM1 , V SM2 , … , V SMN ) can be applied to N amplifiers (1002, 1004, …, 100N), respectively. For example, the first modulation voltage (V SM1 ) can be applied to the first amplifier (1002), and the second modulation voltage (V SM2 ) can be applied to the second amplifier (1004), and the Nth modulation voltage (V SMN ) can be applied to the Nth amplifier (100N). The first modulation voltage (V SM1 ) can correspond to the power supply voltage of the first amplifier (1002), and the second modulation voltage (V SM2 ) can correspond to the power supply voltage of the second amplifier (1004), and the Nth modulation voltage (V SMN ) can correspond to the power supply voltage of the Nth amplifier (100N).

[0141] The signal processor (102) inputs the RF signal (RF) to the amplification circuit (1000). in It can transmit the input RF signal (RF). in) can be input to the first amplifier (1002) and the second amplifier (1004) of the amplification circuit (1000). Input RF signal (RF in ) may be the driving voltage of the first amplifier (1002) to the Nth amplifier (100N). In the embodiment illustrated in FIG. 10, the input RF signal (RF) is used as the driving voltage for all of the first amplifier (1002) to the Nth amplifier (100N). in ) may be applied. The amplifier circuit (1000) may not include a circuit (e.g., a phase compensation circuit, etc.) for adjusting the driving voltage of the first amplifier (1002) to the Nth amplifier (100N), and thus the occurrence of loss due to additional components may be prevented.

[0142] N amplifiers (1002, 1004, …, 100N) each input RF signal (RF) based on a corresponding modulation voltage. in ) can be amplified. For example, the first amplifier (1002) can amplify the first modulation voltage (V SM1 Based on ), the input RF signal (RF in ) can be amplified. The first amplifier (1002) can amplify the first amplified voltage (V a1 It can output ). Amplified voltage (V a1 ) is an input RF signal (RF) amplified by the first amplifier (1002). in It can correspond to ). The second amplifier (1004) can correspond to the second modulation voltage (V SM2 Based on ), the input RF signal (RF in ) can be amplified. The second amplifier (1004) can amplify the second amplified voltage (V a2 It can output ). The second amplified voltage (V a2 ) is an input RF signal (RF) amplified by the second amplifier (1004). in It can correspond to ). The Nth amplifier (100N) corresponds to the Nth modulation voltage (V SMN Based on ), the input RF signal (RF in) can be amplified. The Nth amplifier (100N) can amplify the Nth amplified voltage (V aN It can output the Nth amplified voltage (V aN ) is an input RF signal (RF) amplified by the Nth amplifier (100N). in It can correspond to ). In the embodiment of FIG. 10, the first amplifier (1002) to the Nth amplifier (100N) are shown with the same size, but the embodiments of the present disclosure are not limited thereto. The sizes of at least two of the first amplifier (1002) to the Nth amplifier (100N) may be different.

[0143] The first amplifier (1002) through the Nth amplifier (100N) may have the same bias conditions. For example, the operating points of the first amplifier (1002) through the Nth amplifier (100N) may be the same. Additionally or alternatively, the operating classes of the first amplifier (1002) through the Nth amplifier (100N) may be the same. In one embodiment, the first amplifier (1002) through the Nth amplifier (100N) may operate as a Class A amplifier, a Class B amplifier, a Class AB amplifier, or a Class C amplifier. Since the first amplifier (1002) through the Nth amplifier (100N) have the same bias conditions, a reduction in the output power of the entire amplifier circuit (e.g., a reduction in maximum power, a reduction in maximum efficiency, and / or a reduction in back-off power) resulting from any one amplifier operating under a relatively low bias condition may be prevented.

[0144] The combiner (1006) may include N transmission lines (1010, 1012, …, 101N). Each transmission line may be connected between the output terminal of a corresponding amplifier and the output terminal of an amplifier (104). For example, the first transmission line (1010) may be connected between the output terminal of the first amplifier (1002) and the output terminal of the amplifier (104). The second transmission line (1012) may be connected between the output terminal of the second amplifier (1004) and the output terminal of the amplifier (104). The Nth transmission line (101N) may be connected between the output terminal of the Nth amplifier (100N) and the output terminal of the amplifier (104). There may be no phase difference between the transmission lines (1010, 1012, …, 101N) included in the combiner (1006). The transmission lines (1010, 1012, …, 101N) may have a length of 90°. The transmission lines (1010, 1012, …, 101N) may be implemented as λ / 4 converters or 1 / 4 wavelength converters. The characteristic impedance of each of the transmission lines (1010, 1012, …, 101N) may be determined based on the output impedance and impedance (1008) of the corresponding amplifier. For example, the characteristic impedance of the first transmission line (1010) may be determined based on the output impedance and impedance (1008) of the first amplifier (1002). The characteristic impedance of the second transmission line (1012) may be determined based on the output impedance and impedance (1008) of the second amplifier (1004). The characteristic impedance of the Nth transmission line (101N) can be determined based on the output impedance and impedance (1008) of the Nth amplifier (100N).

[0145] In contrast to the amplifier circuit (1000) of FIG. 2, the amplifier circuit (1000) of FIG. 10 may include more than two amplifiers. In the amplifier circuit (1000) including N amplifiers (1002, 1004, …, 100N), modulation voltages (V) depending on the output power SM1 , … , VSMN ) can be adjusted. Modulation voltages (V SM1 , … , V SMN When the levels of ) are all at the maximum modulation voltage (e.g., the highest level voltage among the voltages generated from the power supply (402) of the power modulator (108)), the amplifier circuit (1000) can output maximum output power. As the output power decreases, the modulation voltages (V SM1 , … , V SMN ) can be adjusted.

[0146] In one embodiment, to reduce output power, the Nth modulation voltage (V SMN The level of the modulation voltage can be adjusted inversely from ). For example, to adjust the output power, the Nth modulation voltage (V SMN ) can decrease from the level of the maximum modulation voltage to the level of the ground voltage. The Nth modulation voltage (V SMN After the level of ) reaches the ground voltage, the level of the N-1st modulation voltage can be adjusted to further reduce the output power. As the output power decreases, the levels of the modulation voltages can be adjusted sequentially, and finally, the first modulation voltage (V SM1 The level of ) can be adjusted.

[0147] In one embodiment, modulation voltages (V SM1 , … , V SMN The level of at least one of the modulation voltages ) can be adjusted between the level of the maximum modulation voltage and the level of the ground voltage. Additionally or alternatively, the modulation voltages (V SM1 , … , V SMN ) among the first modulation voltage (V SM1 One or more voltages, including ) can be adjusted between the level of the maximum modulation voltage and the level of the minimum modulation voltage (e.g., the lowest level of voltage among the voltages generated from the power supply (402) of the power modulator (108).

[0148] In one embodiment, a first modulation voltage (V) supplied to the first amplifier (1002) to the Mth amplifier among N amplifiers (1002, 1004, …, 100N). SM1 The level of the modulation voltages from ) to the M can be adjusted considering the load (M is a natural number equal to or greater than 2 and equal to or less than N). The M+1 modulation voltage to the N modulation voltage (V) supplied to the M+1 amplifier to the N amplifier (100N) among the N amplifiers (1002, 1004, …, 100N). SMN The level of ) can be adjusted considering the PAPR of the signal. For example, the first modulation voltage (V SM1 The levels of the ) to the Mth modulation voltages can be determined as specific levels of voltage based on the load of an electronic device including an amplification circuit (1000), in a manner similar to the manner described above with reference to FIGS. 5a and 5b. The M+1th modulation voltage to the Nth modulation voltage (V SMN The level of ) is the envelope voltage (V) in a manner similar to the method described above with reference to FIGS. 5a and 5b. env It can be adjusted to track the envelope signal detected from ).

[0149] Additionally or alternatively, the amplifier circuit (1000) of FIG. 10 may include the RF splitter (612) of FIG. 6. The RF splitter (612) receives an input RF signal (RF) from the signal processor (102). in ) can receive. The RF splitter (612) receives a mode control signal (e.g., the mode control signal (C) of FIG. 6) from the power modulator (108). MODE It can receive )). Based on a mode control signal from the power modulator (108), the RF splitter (612) inputs an RF signal (RF) to N amplifiers (1002, 1004, …, 100N) included in the amplification circuit (1000). in) can be distributed. The input RF signal (RF) input to each of the N amplifiers (1002, 1004, …, 100N) can be distributed. in The power ratio of ) can be adjusted based on the mode control signal.

[0150] FIG. 11a illustrates an exemplary circuit diagram of an amplification circuit (1100a) according to one embodiment of the present disclosure.

[0151] Referring to FIG. 11a, the amplifier circuit (1100a) may include a first amplifier (202), a second amplifier (204), a coupler (1102a), and an impedance (208). The coupler (1102a) may include a first transmission line (1104a) and a second transmission line (1106a). The first transmission line (1104a) may be connected between the output terminal of the first amplifier (202) and the output terminal of the amplifier (104). The second transmission line (1106a) may be connected between the output terminal of the second amplifier (204) and the output terminal of the amplifier (104). There may be no phase difference between the transmission lines (1104a, 1106a) included in the coupler (1102a). The first transmission line (1104a) and the second transmission line (1106a) may have a length of 90°. The first transmission line (1104a) and the second transmission line (1106a) may be implemented as a λ / 4 converter or a 1 / 4 wavelength converter. The characteristic impedance of the first transmission line (1104a) may be determined based on the output impedance and impedance (208) of the first amplifier (202). The characteristic impedance of the second transmission line (1106a) may be determined based on the output impedance and impedance (208) of the second amplifier (204).

[0152] In one embodiment, the coupler (206) of the amplifier circuit (110) of FIG. 2 may be implemented as the coupler (1102a) of FIG. 11a. For example, the first transmission line (210) of FIG. 2 may be implemented as the first transmission line (1104a) of FIG. 11a. The second transmission line (212) of FIG. 2 may be implemented as the second transmission line (1106a) of FIG. 11a.

[0153] The first transmission line (1104a) and the second transmission line (1106a) can each be implemented as a low-pass Pi-type equivalent circuit. For example, the first transmission line (1104a) comprises two capacitors (C p1 , C p2 ) and inductor (L s) It may include the first capacitor (C) of the first transmission line (1104a). p1 ) can be connected between the output terminal and the ground terminal of the first amplifier (202). The inductor (L) of the first transmission line (1104a) s ) can be connected between the output terminal of the first amplifier (202) and the output terminal of the amplification section (104). The second capacitor (C) of the first transmission line (1104a) p2 ) can be connected between the ground terminal and the output terminal of the amplifier (104). Two capacitors (C) of the first transmission line (1104a) p1 , C p2 The capacitances of ) can be the same as each other. The inductor (L) of the first transmission line (1104a) s The inductance of ) can be determined based on Equation 1. The capacitor (C) of the first transmission line (1104a) p1 The capacitance of ) can be determined based on Equation 2.

[0154]

[0155]

[0156] In mathematical formulas 1 and 2, Z0 may be the characteristic impedance of the first transmission line (1104a). φ may be the angle of the first transmission line (1104a). For example, since the first transmission line (1104a) has a length of 90°, φ may be π / 2.

[0157] The second transmission line (1106b) can be implemented in a manner similar to the first transmission line (1104a). For example, the second transmission line (1106a) can be implemented with two capacitors (C p1 , C p2 ) and inductor (L s) It may include the first capacitor (C) of the second transmission line (1106a). p1 ) can be connected between the output terminal and the ground terminal of the second amplifier (204). The inductor (L) of the second transmission line (1106a) s ) can be connected between the output terminal of the second amplifier (204) and the output terminal of the amplification section (104). The second capacitor (C) of the second transmission line (1106a) p2 ) can be connected between the ground terminal and the output terminal of the amplifier (104). Two capacitors (C) of the second transmission line (1106a) p1 , C p2 The capacitances of ) can be the same as each other. The inductor (L) of the second transmission line (1106a) s The inductance of ) can be determined based on Equation 1. The capacitor (C) of the second transmission line (1106a) p1 The capacitance of ) can be determined based on Equation 2.

[0158] FIG. 11b illustrates an exemplary circuit diagram of an amplification circuit (1100b) according to one embodiment of the present disclosure.

[0159] Referring to FIG. 11b, the amplifier circuit (1100b) may include a first amplifier (202), a second amplifier (204), a coupler (1102b), and an impedance (208). The coupler (1102b) may include a first transmission line (1104b) and a second transmission line (1106b). The first transmission line (1104b) may be connected between the output terminal of the first amplifier (202) and the output terminal of the amplifier (104). The second transmission line (1106b) may be connected between the output terminal of the second amplifier (204) and the output terminal of the amplifier (104). There may be no phase difference between the transmission lines (1104b, 1106b) included in the coupler (1102b). The first transmission line (1104b) and the second transmission line (1106b) may have a length of 90°. The first transmission line (1104b) and the second transmission line (1106b) may be implemented as a λ / 4 converter or a 1 / 4 wavelength converter. The characteristic impedance of the first transmission line (1104b) may be determined based on the output impedance and impedance (208) of the first amplifier (202). The characteristic impedance of the second transmission line (1106b) may be determined based on the output impedance and impedance (208) of the second amplifier (204).

[0160] In one embodiment, the coupler (206) of the amplifier circuit (110) of FIG. 2 may be implemented as the coupler (1102b) of FIG. 11b. For example, the first transmission line (210) of FIG. 2 may be implemented as the first transmission line (1104b) of FIG. 11b. The second transmission line (212) of FIG. 2 may be implemented as the second transmission line (1106b) of FIG. 11b.

[0161] The first transmission line (1104b) and the second transmission line (1106b) can each be implemented as a high-pass ð-type equivalent circuit. For example, the first transmission line (1104b) consists of two inductors (L p1 , L p2 ) and capacitor(Cs) It may include the first inductor (L) of the first transmission line (1104b). p1 ) can be connected between the output terminal and the ground terminal of the first amplifier (202). The capacitor (C) of the first transmission line (1104b) s ) can be connected between the output terminal of the first amplifier (202) and the output terminal of the amplification section (104). The second inductor (L) of the first transmission line (1104b) p2 ) can be connected between the ground terminal and the output terminal of the amplifier (104). The two inductors (L) of the first transmission line (1104b) p1 , L p2 The inductances of ) can be the same as each other. The inductor (L) of the first transmission line (1104b) p1 The inductance of ) can be determined based on Equation 3. The capacitor (C) of the first transmission line (1104b) s The capacitance of ) can be determined based on Equation 4.

[0162]

[0163]

[0164] In mathematical formulas 3 and 4, Z0 may be the characteristic impedance of the first transmission line (1104b). φ may be the angle of the first transmission line (1104b). For example, since the first transmission line (1104b) has a length of 90°, φ may be π / 2.

[0165] The second transmission line (1106b) can be implemented in a manner similar to the first transmission line (1104b). For example, the second transmission line (1106b) can be implemented with two inductors (L p1 , L p2 ) and capacitor(C s) It may include the first inductor (L) of the second transmission line (1106b). p1 ) can be connected between the output terminal and the ground terminal of the second amplifier (204). The capacitor (C) of the second transmission line (1106b) s) can be connected between the output terminal of the second amplifier (204) and the output terminal of the amplification section (104). The second inductor (L) of the second transmission line (1106b) p2 ) can be connected between the ground terminal and the output terminal of the amplifier (104). The two inductors (L) of the second transmission line (1106b) p1 , L p2 The inductances of ) can be the same as each other. The inductor (L) of the second transmission line (1106b) p1 The inductance of ) can be determined based on Equation 3. The capacitor (C) of the second transmission line (1106b) s The capacitance of ) can be determined based on Equation 4.

[0166] FIG. 11c illustrates an exemplary circuit diagram of an amplification circuit (1100c) according to one embodiment of the present disclosure.

[0167] Referring to FIG. 11c, the amplifier circuit (1100c) may include a first amplifier (202), a second amplifier (204), a coupler (1102c), and an impedance (208). The coupler (1102c) may include a first transmission line (1104c) and a second transmission line (1106c). The first transmission line (1104c) may be connected between the output terminal of the first amplifier (202) and the output terminal of the amplifier (104). The second transmission line (1106c) may be connected between the output terminal of the second amplifier (204) and the output terminal of the amplifier (104). There may be no phase difference between the transmission lines (1104c, 1106c) included in the coupler (1102c). The first transmission line (1104c) and the second transmission line (1106c) may have a length of 90°. The first transmission line (1104c) and the second transmission line (1106c) may be implemented as a λ / 4 converter or a 1 / 4 wavelength converter. The characteristic impedance of the first transmission line (1104c) may be determined based on the output impedance and impedance (208) of the first amplifier (202). The characteristic impedance of the second transmission line (1106c) may be determined based on the output impedance and impedance (208) of the second amplifier (204).

[0168] In one embodiment, the coupler (206) of the amplification circuit (110) of FIG. 2 may be implemented as the coupler (1102c) of FIG. 11c. For example, the first transmission line (210) of FIG. 2 may be implemented as the first transmission line (1104c) of FIG. 11c. The second transmission line (212) of FIG. 2 may be implemented as the second transmission line (1106c) of FIG. 11c.

[0169] Comparing FIG. 11a and FIG. 11c, the three inductors (L) of the first transmission line (1104c) s1 , L s2 , L s3 The T-type circuit composed of ) is the inductor (L) of the first transmission line (1104a). sIt is equivalent to ). For example, three inductors (L s1 , L s2 , L s3 The output impedance of the T-type circuit composed of ) is the inductor (L) of the first transmission line (1104a). s It can be the same as the impedance of ). Inductors (L s1 , L s2 , L s3 ) The inductance of each is the three inductors (L s1 , L s2 , L s3 The output impedance of a T-type circuit composed of ) is an inductor (L) determined according to Equation 1 s It can be determined to satisfy the same condition as the impedance of ). The capacitor (C) of the first transmission line (1104c) p1 , C p2 ) is the capacitor (C) of the first transmission line (1104a). p1 , C p2 It may be identical to ). The second transmission line (1106c) may be implemented in a manner similar to the first transmission line (1104c).

[0170] FIG. 11d illustrates an exemplary circuit diagram of an amplification circuit (1100d) according to one embodiment of the present disclosure.

[0171] Referring to FIG. 11d, the amplifier circuit (1100d) may include a first amplifier (202), a second amplifier (204), a coupler (1102d), and an impedance (208). The coupler (1102d) may include a first transmission line (1104d) and a second transmission line (1106d). The first transmission line (1104d) may be connected between the output terminal of the first amplifier (202) and the output terminal of the amplifier (104). The second transmission line (1106d) may be connected between the output terminal of the second amplifier (204) and the output terminal of the amplifier (104). There may be no phase difference between the transmission lines (1104d, 1106d) included in the coupler (1102d). The first transmission line (1104d) and the second transmission line (1106d) may have a length of 90°. The first transmission line (1104d) and the second transmission line (1106d) may be implemented as a λ / 4 converter or a 1 / 4 wavelength converter. The characteristic impedance of the first transmission line (1104d) may be determined based on the output impedance and impedance (208) of the first amplifier (202). The characteristic impedance of the second transmission line (1106d) may be determined based on the output impedance and impedance (208) of the second amplifier (204).

[0172] In one embodiment, the coupler (206) of the amplification circuit (110) of FIG. 2 may be implemented as the coupler (1102d) of FIG. 11d. For example, the first transmission line (210) of FIG. 2 may be implemented as the first transmission line (1104d) of FIG. 11d. The second transmission line (212) of FIG. 2 may be implemented as the second transmission line (1106d) of FIG. 11d.

[0173] In the embodiment of FIG. 11d, the first transmission line (1104d) may include a first transformer (TF1). The second transmission line (1106d) may include a second transformer (TF2). In the first transmission line (1104d) of 90° length, the characteristic impedance Z0 of the first transmission line (1104d) may correspond to the geometric mean of the input impedance of the first transmission line (1104d) (e.g., the impedance viewed from the first transmission line (1104d) toward the output terminal of the first amplifier (202)) and the output impedance of the first transmission line (1104d) (e.g., the impedance viewed from the output terminal of the amplifier (104) toward the first transmission line (1104d)). Accordingly, the winding ratio of the first transformer (TF1) can be designed to correspond to the square root of the ratio of the output impedance of the first transmission line to the input impedance of the first transmission line. The second transformer (TF2) can be implemented in a manner similar to the first transformer (TF1).

[0174] FIG. 11e illustrates an exemplary circuit diagram of a first transmission line (1104e) according to one embodiment of the present disclosure.

[0175] Referring to FIG. 11e, the first transmission line (210) of the coupler (206) of FIG. 2 can be implemented as the first transmission line (1104e) of FIG. 11e. The first transmission line (1104e) can have a length of 90°. The first transmission line (1104e) can be implemented as a λ / 4 converter or a 1 / 4 wavelength converter. The characteristic impedance of the first transmission line (1104e) can be determined based on the output impedance and impedance (208) of the first amplifier (202).

[0176] The first transmission line (1104e) can be implemented as a low-pass Tee-type equivalent circuit. For example, the first transmission line (1104e) can be implemented with two inductors (L s1 , L s2 ) and capacitor(C p)It may include two inductors (L) of the first transmission line (1104e). s1 , L s2 ) can be connected in series between the output terminal of the first amplifier (202) and the output terminal of the amplification section (104). The capacitor (C) of the first transmission line (1104e) p) is two inductors (L s1 , L s2 The node connected to ) (two inductors (L s1 , L s2 It can be connected between the node between ) and the ground terminal. The two inductors (L of the first transmission line (1104e) s1 , L s2 The inductances of ) can be the same as each other. The inductor (L) of the first transmission line (1104e) s1 The inductance of ) can be determined based on Equation 5. The capacitor (C) of the first transmission line (1104e) p The capacitance of ) can be determined based on Equation 6.

[0177]

[0178]

[0179] In mathematical formulas 5 and 6, Z0 may be the characteristic impedance of the first transmission line (1104e). φ may be the angle of the first transmission line (1104e). For example, since the first transmission line (1104e) has a length of 90°, φ may be π / 2.

[0180] FIG. 11f illustrates an exemplary circuit diagram of a first transmission line (1104f) according to one embodiment of the present disclosure.

[0181] Referring to FIG. 11f, the first transmission line (210) of the coupler (206) of FIG. 2 can be implemented as the first transmission line (1104f) of FIG. 11f. The first transmission line (1104f) can have a length of 90°. The first transmission line (1104f) can be implemented as a λ / 4 converter or a 1 / 4 wavelength converter. The characteristic impedance of the first transmission line (1104f) can be determined based on the output impedance and impedance (208) of the first amplifier (202).

[0182] The first transmission line (1104f) can be implemented as a high-bandpass T-type equivalent circuit. For example, the first transmission line (1104f) can be implemented with two capacitors (C s1 , C s2 ) and inductor (L p) It may include two capacitors (C) of the first transmission line (1104f). s1 , C s2 ) can be connected in series between the output terminal of the first amplifier (202) and the output terminal of the amplification section (104). The inductor (L) of the first transmission line (1104f) p) is two capacitors (C s1 , C s2 The node connected to ) (two capacitors (C s1 , C s2 It can be connected between the node between ) and the ground terminal. Two capacitors (C) of the first transmission line (1104f) s1 , C s2 The capacitances of ) can be the same as each other. The inductor (L) of the first transmission line (1104f) p The inductance of ) can be determined based on Equation 7. The capacitor (C) of the first transmission line (1104f) s1 The capacitance of ) can be determined based on mathematical formula 8.

[0183]

[0184]

[0185] In mathematical formulas 7 and 8, Z0 may be the characteristic impedance of the first transmission line (1104f). φ may be the angle of the first transmission line (1104f). For example, since the first transmission line (1104f) has a length of 90°, φ may be π / 2.

[0186] With reference to FIGS. 11a through 11f, various equivalent circuits of a 90° transmission line have been described, but the present disclosure is not limited thereto. A 90° transmission line may be implemented in various ways to satisfy the design requirements of an electronic device including a communication circuit (100). Any 90° transmission line described in the present disclosure may be implemented as any one of the first transmission lines (1104a, 1104b, 1104c, 1104d, 1104e, 1104f) of FIGS. 11a through 11f.

[0187] Additionally or alternatively, multiple 90° transmission lines included in a single combiner may be implemented using different equivalent circuits. For example, the first transmission line (210) of the combiner (206) may be implemented in a manner similar to the first transmission line (1104a) of FIG. 11a, and at the same time, the second transmission line (212) may be implemented in a manner similar to the second transmission line (110b) of FIG. 11b. Additionally or alternatively, multiple 90° transmission RF lines included in a single RF splitter may be implemented using different equivalent circuits. For example, the first RF transmission line (802) of the RF splitter (612) of FIG. 8a may be implemented in a manner similar to the first transmission line (1104a) of FIG. 11a, and at the same time, the second RF transmission line (804) may be implemented in a manner similar to the second transmission line (110b) of FIG. 11b.

[0188] FIG. 12 illustrates an exemplary block diagram of an electronic device (1200) according to one embodiment of the present disclosure.

[0189] Referring to FIG. 12, the electronic device (1200) may include a processor (1202), memory (1204), and a transceiver (1206). The configuration of the electronic device (1200) shown in FIG. 2 is merely an example, and the example of the electronic device (1200) performing an embodiment of the present disclosure is not limited to the configuration shown in FIG. 12. Depending on the embodiment, some components may be added, deleted, or changed.

[0190] The processor (1202) controls the overall operations of the electronic device (1200). For example, the processor (1202) transmits and receives signals through the transceiver (1206). The processor (1202) can write data to the memory (1204) and read the data written to the memory (1204). The processor (1202) can perform the functions of the protocol stack required by the communication standard. In one embodiment, the processor (1202) may include at least one processor including processing circuitry. In one embodiment, the processor (1202) can generate control signals to at least partially control the operations of other components of the electronic device (1200), such as the memory (1204) and the transceiver (1206). In response to control signals generated by the processor (1202), the memory (1204) and transceiver (1206) can be controlled at least partially.

[0191] Additionally or alternatively, the processor (1202) may execute one or more instructions of a program stored in memory (1204). Although the processor (1202) is depicted as a single element in FIG. 3, it is not limited thereto. In one embodiment of the present disclosure, the processor (1202) may be composed of one or more elements. The processor (1202) may be implemented as a general-purpose processor such as a CPU (Central Processing Unit), AP (Application Processor), DSP (Digital Signal Processor), a graphics-dedicated processor such as a GPU (Graphic Processing Unit) or VPU (Vision Processing Unit), or an artificial intelligence-dedicated processor such as an NPU (Neural Processing Unit).

[0192] The processor (1202) may include various processing circuits and / or multiple processors. For example, the term 'processor' as used in the present disclosure, including in the claims, may include at least one processor and, additionally or alternatively, may include various processing circuits. One or more processors may be configured to perform the various functions described in the present disclosure in a distributed manner, individually and / or collectively. As used herein, 'processor', 'at least one processor', and 'one or more processors' may be configured to perform various functions. However, these terms cover, without limitation, situations where one processor performs some of the functions and other processor(s) perform other parts of the functions, and situations where a single processor can perform all functions. Additionally, at least one processor may include a combination of processors performing various functions of the disclosed functions in a distributed manner. At least one processor may execute program instructions individually or collectively to achieve or perform various functions.

[0193] The memory (1204) can store instructions, data structures, and program code that can be read by the processor (1202). For example, the memory (1204) can store data such as a basic program, application program, and configuration information for the operation of the electronic device (1200). In one embodiment, the memory (1204) can store instructions that can cause the electronic device (1200) to perform at least some of the operations of the electronic device (1200) described in this disclosure by being executed individually or in combination by the processor (1202).

[0194] The memory (1204) may include a flash memory type, a hard disk type, a multimedia card micro type, and a card type of memory, and may include a non-volatile memory including at least one of a ROM (Read-Only Memory), EEPROM (Electrically Erasable Programmable Read-Only Memory), PROM (Programmable Read-Only Memory), magnetic memory, a magnetic disk, and an optical disk, and / or a volatile memory such as a DRAM (Dynamic Random Access Memory) or SRAM (Static Random Access Memory).

[0195] The transceiver (1206) can perform functions for transmitting and receiving signals in a wired communication environment. The transceiver (1206) may include a wired interface for controlling a direct connection between devices through a transmission medium (e.g., copper wire or optical fiber). For example, the transceiver (1206) can transmit an electrical signal to another device through a copper wire or perform conversion between an electrical signal and an optical signal. The transceiver (1206) can be connected wiredly or wirelessly to an external device of the electronic device (1200).

[0196] The transceiver (1206) may perform functions for transmitting and receiving signals in a wireless communication environment. For example, the transceiver (1206) may perform a conversion function between a baseband signal and a bit sequence according to the physical layer specifications of the system. For example, when transmitting data, the transceiver (1206) generates complex symbols by encoding and modulating the transmitted bit sequence. Also, when receiving data, the transceiver (1206) restores the received bit sequence by demodulating and decoding the baseband signal. For example, the transceiver (1206) upconverts the baseband signal into an RF band signal and transmits it through an antenna, and downconverts the RF band signal received through the antenna into a baseband signal. For example, the transceiver (1206) may include a transmit filter, a receive filter, an amplifier, a mixer, an oscillator, a digital-to-analog converter (DAC), an analog-to-digital converter (ADC), etc. Additionally or alternatively, the transceiver (1206) may include a number of transmission and reception paths.

[0197] A transceiver (1206) may include the communication circuit (100) of FIG. 1. The communication circuit (100) may be implemented as a digital circuit and / or an analog circuit (e.g., a radio frequency integrated circuit (RFIC)). Here, the digital circuit and / or the analog circuit may be implemented as a single package. A signal processor (102) of the communication circuit (100) may up-convert a baseband signal into an RF band signal. An amplifier (104) of the communication circuit (100) may amplify the up-converted RF band signal. One or more antennas (106) of the communication circuit (100) may radiate the amplified RF band signal.

[0198] The transceiver (1206) transmits and receives signals as described above. Accordingly, all or part of the transceiver (1206) may be referred to as a 'transmitter', a 'receiver', or a 'transmitter / receiver'. Additionally, in the following description, transmission and reception performed via a wireless channel are used to mean that processing as described above is performed by the transceiver (1206).

[0199] In one embodiment of the present disclosure, a communication circuit (100) included in an electronic device (1200) may include a signal processor (102) that generates an input RF (Radio Frequency) signal, a control signal, and an envelope voltage. The communication circuit (100) may include an amplifier (104) comprising a power modulator (108) that generates a plurality of modulation voltages based on the control signal and the envelope voltage, and an amplifier circuit (110) that amplifies the input RF signal based on the plurality of modulation voltages. The communication circuit (100) may include one or more antennas (106) connected to the output terminal of the amplifier (104). Additionally or alternatively, the level of at least one of the plurality of modulation voltages may be adjusted within a range equal to or greater than the ground voltage and equal to or less than the maximum modulation voltage.

[0200] FIG. 13 illustrates an exemplary flowchart of a method (1300) for wireless communication according to one embodiment of the present disclosure.

[0201] Referring to FIG. 13, the method (1300) may include steps (S1302, S1304, S1306, S1308). In one embodiment, the method (1300) may be performed by an electronic device (1200) of FIG. 12 including the communication circuit (100) of FIG. 1. However, the present disclosure is not limited thereto, and steps (1302, 1304) may be performed individually or in combination by any electronic device. A method according to one embodiment of the present disclosure is not limited to that shown in FIG. 13, any one of the steps shown in FIG. 13 may be omitted, and additional steps not shown in FIG. 13 may be included. In some embodiments, the order of at least some of the steps (S1302, S1304, S1306, S1308) may be changed.

[0202] In step (S1302), the electronic device (1200) can generate an input RF signal, a control signal, and an envelope voltage. For example, a signal processor (102) of a communication circuit (100) included in the electronic device (1200) can generate an input RF signal, a control signal, and an envelope voltage. In step (S1304), the electronic device (1200) can generate a plurality of modulation voltages based on the control signal and the envelope voltage. For example, a power modulator (108) of a communication circuit (100) included in the electronic device (1200) can generate a plurality of modulation voltages based on the control signal and the envelope voltage. In step (S1306), the electronic device (1200) can amplify the input RF signal based on the plurality of modulation voltages. For example, an amplification circuit (110) of a communication circuit (100) included in the electronic device (1200) can generate a plurality of modulation voltages based on the control signal and the envelope voltage. In step (S1308), the electronic device (1200) may apply an amplified input RF signal to one or more antennas. One or more antennas (106) of the communication circuit (100) included in the electronic device (1200) may acquire the amplified input RF signal. Additionally or alternatively, the level of at least one of the modulation voltages may be adjusted within a range equal to or greater than the ground voltage and equal to or less than the maximum modulation voltage.

[0203] Additionally or alternatively, generating a plurality of modulation voltages may include generating a first modulation voltage applied to a first amplifier of the communication circuit (100) based on the control signal, and generating a second modulation voltage of the same level as the ground voltage applied to a first input terminal of a second amplifier of the communication circuit (100). Additionally or alternatively, generating a second modulation voltage of the same level as the ground voltage may include generating a switch control signal instructing to close a switch between the second input terminal of the second amplifier and the ground terminal.

[0204] A device-readable storage medium may be provided in the form of a non-transitory storage medium. Here, 'non-transitory storage medium' simply means that it is a tangible device and does not contain a signal (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently and cases where it is stored temporarily. For example, a 'non-transitory storage medium' may include a buffer in which data is stored temporarily.

[0205] According to one embodiment, the method according to the various embodiments disclosed herein may be provided by being included in a computer program product. The computer program product may be traded between a seller and a buyer as a product. The computer program product may be distributed in the form of a device-readable storage medium (e.g., compact disc read-only memory (CD-ROM)), or distributed online (e.g., download or upload) through an application store or directly between two user devices (e.g., smartphones). In the case of online distribution, at least a portion of the computer program product (e.g., downloadable app) may be temporarily stored or temporarily created on a device-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or a relay server.

[0206] Although the embodiments have been described above with reference to limited examples and drawings, those skilled in the art can make various changes and modifications from the description above. For example, appropriate results can be achieved even if the described techniques are performed in a different order than described, and / or components such as the described computer system or module are combined or assembled in a form different from described, or replaced or substituted by other components or equivalents.

Claims

1. In an electronic device (1200) including a communication circuit (100), The above communication circuit (100) is: A signal processor (102) that generates an input RF (Radio Frequency) signal, a control signal, and an envelope voltage; An amplification unit (104) comprising a power modulator (108) that generates a plurality of modulation voltages based on the control signal and the envelope voltage, and an amplification circuit (110) that amplifies the input RF signal based on the plurality of modulation voltages; and It includes one or more antennas (106) connected to the output terminal of the amplifier (104), and An electronic device in which the level of at least one of the plurality of modulation voltages is adjusted within a range equal to or greater than the ground voltage and equal to or less than the maximum modulation voltage.

2. In Paragraph 1, The above amplification circuit (110) is: A first amplifier (202) that receives a first modulation voltage among the plurality of modulation voltages and amplifies the input RF signal based on the first modulation voltage; A second amplifier (204) that receives a second modulation voltage among the plurality of modulation voltages and amplifies the input RF signal based on the first modulation voltage; A coupler (206) connected to the output terminal of the first amplifier, the output terminal of the second amplifier, and the output terminal of the amplifier section; and It includes an impedance (208) connected between the output terminal and the ground terminal of the above-mentioned amplifier, The level of the second modulation voltage is adjusted within a range equal to or greater than the ground voltage and equal to or less than the maximum modulation voltage, and An electronic device in which the second amplifier is turned off during a first time interval in which the level of the second modulation voltage is equal to the ground voltage.

3. In Paragraph 2, The above combiner (206) is: A first transmission line (210) connected between the output terminal of the first amplifier and the output terminal of the amplifier section; and It includes a second transmission line (212) connected between the output terminal of the second amplifier and the output terminal of the amplifier section, An electronic device in which the first transmission line and the second transmission line have a length of 90°.

4. In Paragraph 2 or 3, The amplification circuit (110) further includes a third amplifier (100N) that receives a third modulation voltage among the plurality of modulation voltages and amplifies the input RF signal based on the third modulation voltage. The above coupler is an electronic device additionally connected to the output terminal of the third amplifier (100N).

5. In any one of paragraphs 1 through 4, The above power modulator (108) is: A power supply (402) that generates a first level voltage, a second level voltage, and a switch controller control signal based on the above control signal and the above envelope voltage; A first switch circuit (408) including a plurality of switches connected between the first output terminal of the power modulator and the power supply; A second switch circuit (410) including a plurality of switches connected between the second output terminal of the power modulator and the power supply; and An electronic device comprising a switch controller (404) that generates a first set of switch control signals applied to the first switch circuit and a second set of switch control signals applied to the second switch circuit based on the above switch controller control signal.

6. In Paragraph 5, The above power source (402) generates N voltages of different levels, and The first switch circuit (408) includes N switches, and The second switch circuit (410) includes N switches and a switch connected between the second output terminal and the ground terminal of the power modulator, N is a natural number, an electronic device.

7. In Paragraph 1, The electronic device, wherein the amplifier (104) further comprises an RF splitter (612) that receives the input RF signal from the signal processor and applies a plurality of input voltages to the amplifier circuit (110) based on the input RF signal.

8. In Paragraph 7, The above amplification circuit (110) is: A first amplifier (702) that receives a first modulation voltage among the plurality of modulation voltages and amplifies a first input voltage among the plurality of input voltages based on the first modulation voltage; A second amplifier (702) that receives a second modulation voltage among the plurality of modulation voltages and amplifies a first input voltage among the plurality of input voltages based on the first modulation voltage; A coupler (706) connected to the output terminal of the first amplifier, the output terminal of the second amplifier, and the output terminal of the amplifier section; and It includes an impedance (708) connected between the output terminal and the ground terminal of the above-mentioned amplifier, The level of the second modulation voltage is adjusted within a range equal to or greater than the ground voltage and equal to or less than the maximum modulation voltage, and An electronic device in which the second amplifier is turned off during a first time interval in which the level of the second modulation voltage is equal to the ground voltage.

9. In either Paragraph 7 or Paragraph 8, The above RF splitter (612) is: A first RF transmission line (802) connected between the input terminal of the RF splitter to which the above input RF signal is applied and the first amplifier of the amplification circuit; A second RF transmission line (804) connected between the input terminal of the RF splitter and the second amplifier of the amplification circuit; and An electronic device comprising a switch (806) connected between a node connected to the second RF transmission line and the second amplifier of the amplification circuit and a ground terminal.

10. In Paragraph 9, The power modulator (108) generates a mode control signal associated with the current operating mode of the amplifier circuit based on the control signal, and The above switch (806) is an electronic device that is opened or closed based on the mode control signal.

11. In Paragraph 9 or 10, The first RF transmission line (802) of the RF splitter and the second RF transmission line (802) of the RF splitter have a length of 90°, in an electronic device.

12. A method performed by an electronic device (1200) comprising one or more antennas (106), A step of generating an input RF (Radio Frequency) signal, a control signal, and an envelope voltage; A step of generating a plurality of modulation voltages based on the above control signal and the above envelope voltage; A step of amplifying the input RF signal based on the plurality of modulation voltages; and The method includes the step of applying the amplified input RF signal to the one or more antennas mentioned above, and A method in which the level of at least one of the plurality of modulation voltages is adjusted within a range equal to or greater than the ground voltage and equal to or smaller than the maximum modulation voltage.

13. In Paragraph 12, The step of generating the plurality of modulated voltages above is based on the control signal: A step of generating a first modulation voltage applied to a first amplifier of the communication circuit; and A method comprising the step of generating a second modulation voltage of the same level as the ground voltage, which is applied to the first input terminal of the second amplifier of the communication circuit.

14. In Paragraph 13, A method comprising the step of generating a second modulation voltage of the same level as the ground voltage, the step of generating a switch control signal that instructs to close a switch between the second input terminal and the ground terminal of the second amplifier.

15. A communication circuit (100) for processing RF (Radio Frequency) signals and transmitting them to an external device, A signal processor (102) that generates an input RF signal, a control signal, and an envelope voltage; An amplification unit (104) comprising a power modulator (108) that generates a plurality of modulation voltages based on the control signal and the envelope voltage, and an amplification circuit (110) that amplifies the input RF signal based on the plurality of modulation voltages; and It includes one or more antennas (106) connected to the output terminal of the amplifier (104), and A communication circuit in which the level of at least one of the plurality of modulation voltages is adjusted within a range equal to or greater than the ground voltage and equal to or less than the maximum modulation voltage.

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