Switched-capacitor converters with a compact zero-voltage switching circuit

Abstract

The invention regards a switched-capacitor converter for converting an input voltage to an output voltage at respectively an input and an output of the switched-capacitor converter, wherein the switched-capacitor converter comprises: a plurality of switches, wherein the plurality of switches are arranged in at least two branches, wherein a first branch comprises a first part of the plurality of switches and a second branch comprises a second part of the plurality of switches; a plurality of capacitors, wherein the plurality of capacitors are configured to store a plurality of charges to be transferred between the input and the output via the plurality of switches; an auxiliary circuit, wherein the auxiliary circuit is configured to transfer an auxiliary charge, wherein the auxiliary charge is transferred during a deadtime of the switched-capacitor converter. A switched-capacitor converter control module and a method of controlling a switched- capacitor converter are also disclosed.

Description

[0001] P7522PC00

[0002] 1

[0003] Switched-Capacitor Converters with a compact zero-voltage switching circuit

[0004] The present disclosure relates to switched-capacitor converters for high-efficiency voltage conversion, with a focus on Zero-Voltage Switching techniques to minimize switching losses.

[0005] Background

[0006] Switched-capacitor converters (SCCs) have become a widely adopted technology for high-performance power conversion due to their inherent advantages in scalability, efficiency, and integration. These converters utilize capacitors and switches to transfer energy. SCCs are especially attractive in applications requiring compact and lightweight designs, such as Al data centers, automotive systems, and industrial electronics. As the demand for higher power densities and faster switching speeds increases, the limitations of conventional SCCs have become increasingly apparent.

[0007] One of the primary challenges in SCCs is the significant power loss associated with high switching frequencies. As the switching frequency increases, the parasitic capacitances of power transistors must charge and discharge more frequently, leading to substantial energy dissipation. This issue is particularly pronounced in high-density applications, where the need for compact designs often limits the size of the capacitors and transistors, exacerbating the losses. While Zero-Voltage Switching (ZVS) techniques have been developed to mitigate these losses, conventional ZVS implementations often rely on bulky and costly external components, such as large inductors, which conflict with the compact and integrated nature of SCC designs.

[0008] Another limitation of existing SCC designs is their inability to achieve efficient ZVS operation without compromising performance or integration. Traditional approaches often require continuous activation of ZVS circuits, which necessitates larger inductive components and increases overall system size and complexity. Additionally, these designs lack the flexibility to adapt to the stringent requirements of space-constrained environments, such as server racks in Al data centers, where power densities are rapidly increasing, and operational efficiencies are paramount. For instance, the reliance on bulky ZVS coils, as seen in some prior art, consumes valuable PCB space and adds to the overall height of the design, further limiting its applicability.

[0009] Moreover, current SCC designs often fail to address the growing need for efficient charge transfer during switching phases. In conventional systems, achieving optimal P7522PC00

[0010] 2 charge redistribution requires complex control mechanisms and large component footprints, making them less suitable for high-frequency applications. As a result, many existing designs are ill-suited for emerging applications demanding both high efficiency and compact form factors, such as automotive systems transitioning to 48V power architectures and data centers handling Al workloads with power demands exceeding 100 kW per rack.

[0011] It is therefore an objective of the present disclosure to provide a switched-capacitor converter that effectively addresses these challenges by minimizing switching losses, enabling high-frequency operation, and enhancing integration. The invention aims to overcome the limitations of conventional ZVS implementations, delivering a compact, efficient, and scalable solution tailored to the demands of modern power conversion applications.

[0012] Summary

[0013] The present disclosure relates to a switched-capacitor converter for converting an input voltage to an output voltage at respectively an input and an output of the switched- capacitor converter, wherein the switched-capacitor converter comprises a plurality of switches, wherein the plurality of switches are arranged in at least two branches, wherein a first branch comprises a first part of the plurality of switches and a second branch comprises a second part of the plurality of switches; a plurality of capacitors, wherein the plurality of capacitors are configured to store a plurality of charges to be transferred between the input and the output via the plurality of switches; an auxiliary circuit, wherein the auxiliary circuit is configured to transfer an auxiliary charge, wherein the auxiliary charge is transferred during a deadtime of the switched-capacitor converter.

[0014] This configuration offers several technical advantages that address the challenges of existing switched-capacitor converter designs. By incorporating an auxiliary circuit that operates during the deadtime, the converter achieves zero-voltage switching (ZVS), significantly reducing switching losses caused by the charging and discharging of parasitic capacitances in the power transistors. This reduction in losses enables higher operating frequencies without compromising efficiency, making the converter particularly suited for high-density applications such as Al data centers, automotive systems, and industrial electronics. The auxiliary circuit also minimizes the need for P7522PC00

[0015] 3 bulky external components, such as large inductors, which are typically required for conventional ZVS implementations, allowing for a compact and lightweight design.

[0016] The use of multiple branches for the switches and capacitors enhances the flexibility and scalability of the converter. By distributing the charge transfer process across these branches, the converter achieves a balanced operation that reduces stress on individual components, contributing to improved reliability and longer operational lifetimes. This design also enables efficient energy storage and transfer, which is particularly beneficial for applications requiring rapid response times and stable output under varying load conditions. The modular structure of the converter facilitates its integration into diverse system architectures, further broadening its applicability.

[0017] The auxiliary circuit provides additional advantages by leveraging inductive elements to facilitate ZVS operation. These inductive elements, which may include compact coils or distributed inductances, are integrated into the circuit in a manner that minimizes space requirements while optimizing magnetic field interactions. This approach reduces electromagnetic interference and improves the overall power conversion efficiency of the system. The auxiliary circuit’s ability to dynamically manage charge flow during the deadtime ensures smoother transitions between switching phases, reducing voltage and current spikes that can degrade performance.

[0018] The present disclosure also relates to a switched-capacitor converter control module for controlling and being connectable to a plurality of switches and a plurality of capacitors, wherein the switched-capacitor converter control module comprises a control unit configured to control and to be connectable to a plurality of switches, wherein the control unit and the plurality of switches are configured according to the switched-capacitor converter described above; an auxiliary circuit configured to transfer charges during deadtime; and a ZVS unit configured to detect and facilitate zerovoltage transitions during operation. The inclusion of a ZVS detection unit enhances precision by monitoring and optimizing the timing of switching events, enabling the converter to operate with minimal deadtime. This precision further enhances the efficiency and reliability of the system, making it ideal for applications requiring high power densities and compact form factors.

[0019] The present disclosure further relates to a method of controlling a switched-capacitor converter for converting an input voltage provided at an input of the switched-capacitor converter to an output voltage provided at an output of the switched-capacitor P7522PC00

[0020] 4 converter. The method includes providing a switched-capacitor converter with the described configuration, transferring charges between the input and output through the switches, and activating the auxiliary circuit during the deadtime to facilitate zerovoltage switching. This method ensures consistent high-frequency operation, reduces energy losses, and enhances the stability of the power conversion process. The integration of ZVS capabilities into the control method simplifies the design requirements for the system while improving its scalability and adaptability to various operational demands.

[0021] This disclosure relates to a significant advancement in switched-capacitor technology, addressing the limitations of conventional designs while opening new possibilities for efficient, compact, and high-performance power conversion solutions.

[0022] Description of the drawings

[0023] In the following embodiment and examples will be described in greater detail with reference to the accompanying drawings:

[0024] Fig. 1 shows a schematic view of an embodiment of the switched-capacitor converter as disclosed herein,

[0025] Fig. 2 shows a schematic view of an embodiment of the switched-capacitor converter as disclosed herein, comprising an embodiment of the auxiliary circuit,

[0026] Figs. 3A-B illustrate the control signals, drain-source voltages and auxiliary current during the operation of the switched-capacitor converter, as disclosed herein, showing the timing of the first period (PHASE1), the second period (PHASE2) and the deadtime, as well as the activation of the auxiliary circuit for zero-voltage switching,

[0027] Fig. 4 shows a schematic view of an embodiment of the resonant switched- capacitor converter as disclosed herein,

[0028] Fig. 5 shows a schematic view of an embodiment of the resonant switched- capacitor converter as disclosed herein, comprising an embodiment of the auxiliary circuit,

[0029] Fig. 6 shows a schematic view of an embodiment of the resonant switched- capacitor converter as disclosed herein, comprising another embodiment of the first and second capacitor branch arrangement, P7522PC00

[0030] 5

[0031] Fig. 7 shows a schematic view of an embodiment of the resonant switched- capacitor converter as disclosed herein, comprising a plurality of gate drivers, and the auxiliary switches, further comprised in the control module as disclosed herein,

[0032] Fig. 8 shows a schematic view of an embodiment of the resonant switched- capacitor converter as disclosed herein, comprising the ZVS unit, the control unit, the auxiliary switches and the gate drivers, further comprised in the control module, as disclosed herein,

[0033] Fig. 9 shows a schematic view of an embodiment of the resonant switched- capacitor converter as disclosed herein, wherein the control module comprises a first and a second control module.

[0034] Detailed description

[0035] The present disclosure relates to a switched-capacitor converter for converting an input voltage to an output voltage at respectively an input and an output of the switched- capacitor converter, wherein the switched-capacitor converter can comprise a plurality of switches, wherein the plurality of switches may be arranged in at least two branches, wherein a first branch can comprise a first part of the plurality of switches and a second branch may comprise a second part of the plurality of switches; a plurality of capacitors, wherein the plurality of capacitors can be configured to store a plurality of charges to be transferred between the input and the output; an auxiliary circuit, wherein the auxiliary circuit can be configured to transfer an auxiliary charge.

[0036] In one embodiment, the switched-capacitor converter is a symmetrical Dickson switched-capacitor converter. This configuration can provide a balanced topology where equal charge transfer occurs in complementary branches during each switching phase. The symmetry in the symmetrical Dickson architecture enables consistent voltage levels across the plurality of capacitors and minimizes imbalances in the circuit. Such a design can enhance efficiency by reducing energy losses due to charge redistribution and improve reliability by distributing stress evenly across the components. Variations of this embodiment could include modifications to the number of switches in the Dickson converter or adjustments to the plurality of capacitor values to accommodate different and / or specific input-output voltage ratios.

[0037] The first part of the plurality of switches and / or the second part of the plurality of switches can be connected in series, from the input or the output, to a ground of the P7522PC00

[0038] 6 switched-capacitor converter. The first part or the second part of the plurality of switches connected in series between the input and the output can enable voltage step-down by facilitating the periodic interconnection of the plurality of capacitors within the topology. These capacitors are charged and discharged at intermediate nodes distributed along the series connection, effectively creating a switched voltage division between the input and the output. Some variations of this embodiment can include adding protective elements, such as diodes or resistors, to safeguard the switches from transient spikes or adjusting the number of switches in each series connection to suit different power levels.

[0039] In one embodiment of the present disclosure, the output is comprised in the first branch and / or the second branch. This feature can allow for flexibility in the design of the switched-capacitor converter, enabling the output to be derived from either or both branches. Such flexibility can be beneficial in optimizing the converter for specific applications, such as step-up or step-down voltage conversion. By incorporating the output into one or both branches, the converter can achieve more efficient energy transfer and improved load balancing. For example, in a dual-branch configuration, the load current can be shared between the branches, reducing the stress on individual components and increasing the reliability of the switched-capacitor converter. Another embodiment can also comprise additional filtering elements at the output to improve voltage stability and minimize ripple. An output or input filtering could be implemented by adding filtering capacitors in parallel, wherein the filtering capacitors can be connected between the input and / or output node and a ground, preferably a local ground such as an input ground or an output ground, thereby ensuring an efficient filtering of the input or output signals, such as the input voltage or the output voltage of the switched-capacitor converter.

[0040] In another embodiment of the present disclosure, the plurality of capacitors are arranged in a first and a second capacitor branch, wherein the first capacitor branch is connected to the first branch and the second capacitor branch is connected to the second branch. This arrangement can allow for systematic charge storage and transfer between the input and output of the converter, ensuring efficient operation during each phase of the switching cycle. The division of the plurality of capacitors into two branches, such as a first and a second capacitor branch can enable balanced energy distribution, reducing the risk of overcharging or discharging individual capacitors. This configuration may be advantageous in high-frequency applications, where consistent P7522PC00

[0041] 7 charge distribution is critical for maintaining efficiency and stability. This embodiment may include the use of capacitors with different capacitance values in each branch to achieve specific voltage conversion ratios or the incorporation of additional capacitor branches, such as a third and a fourth capacitor branch, to handle higher power levels.

[0042] In one embodiment of the present disclosure, the switched-capacitor converter is configured such that the first branch and the second branch are interleaved, wherein the second capacitor branch is connected to the first branch and the first capacitor branch is connected to the second branch, thereby obtaining an interleaved switched- capacitor converter. The interleaving is implemented using switches in the plurality of switches. A first interleaved switch, preferably at least one first interleaved switch, located in the first branch enables the connection of a capacitor from the second capacitor branch to the first branch, while a second interleaved switch, preferably at least one second interleaved switch in the second branch enables the connection of a capacitor from the first capacitor branch to the second branch. These interleaving switches play a pivotal role in transferring charge between the capacitor branches and their respective main branches, ensuring balanced and efficient operation.

[0043] Interleaved switched-capacitor converters can offer several advantages compared to their non-interleaved counterparts. An interleaved topology is typically created by pairing two non-interleaved converters and removing components that become redundant in the combined configuration. For example, when pairing two ladder converters, the output decoupling capacitors in each rung of the ladder can often be eliminated because they receive equal and opposite charges from the two ladder converters. Similarly, some switches can be omitted as they effectively form series connections when the topologies are interleaved.

[0044] Another significant advantage of interleaved topologies is their improved input current profile. Interleaved designs typically have two connections to the input, with each connection conducting during alternating phases in a two-phase converter. This results in a continuous input current, which reduces the RMS value of the current and mitigates EMI issues compared to the pulsed current profile of non-interleaved designs. In summary, interleaved switched-capacitor topologies can generally achieve a lower component count than having two non-interleaved topologies in parallel, and improved EMI performance, preferably making them a more efficient and compact choice for power conversion applications. P7522PC00

[0045] 8

[0046] This interleaving configuration provides significant advantages, such as improved output voltage stability and reduced voltage ripple. By connecting the capacitor branches to opposite main branches through interleaving switches, the design ensures that charge is shared effectively, smoothing the voltage transitions and mitigating fluctuations. The interleaving makes better use of the plurality of capacitors and can further reduce the conduction loss from charge re-distribution between the plurality of capacitors and thereby leading to a better, higher efficiency.

[0047] In a preferred embodiment of the present disclosure, the plurality of switches in the switched-capacitor converter are a plurality of transistors, such as power transistors. These transistors may include MOSFETs, IGBTs, SiC and / or GaN-based transistors, preferably selected based on the operating voltage, current capacity, and switching frequency of the converter. Power transistors are particularly well-suited for this application due to their ability to handle high currents and voltages efficiently, as well as their fast switching capabilities. They also provide a low resistance when enabled, thereby limiting the losses and improving the efficiency of the switched-capacitor converter. The low resistance may also contribute in limiting the self-heating of the transistors, thereby limiting the self-heating of the switched-capacitor converter.

[0048] Fig. 1 shows a schematic view of an embodiment of the switched-capacitor converter 100 as disclosed herein. The switched-capacitor converter 100 comprises the first and the second branch and the first and the second capacitor branch. The first branch comprises S0A-S5A, and the second branch comprises S0B-S5B. The first capacitor branch comprises C1A-C3A, and the second capacitor branch comprises C1B-C3B. The switched-capacitor converter, as illustrated in Fig. 1 is an embodiment of the interleaved switched-capacitor converter, where the first capacitor branch is interleaved with the second capacitor branch, through the switches S3A, S4A and S3B, S4B. The output of the switched-capacitor converter, as illustrated in Fig. 1 is comprised between the switches S1 B-S2B and S1 A-S2A, while the input of the switched-capacitor converter is connected to both the switches S5A and S5B. As previously described, the first branch and the second branch are comprised between the input of the switched- capacitor converter and the ground. In this embodiment, the plurality of switches are MOSFETs.

[0049] In one embodiment of the present disclosure, the switched-capacitor converter is configured to activate a first portion of the plurality of switches and deactivate a second P7522PC00

[0050] 9 portion of the plurality of switches during a first period, and to activate the second portion of the plurality of switches and to deactivate the first portion of the plurality of switches during a second period. This alternating activation and deactivation scheme enables the converter to efficiently transfer charge between the input and output during each switching period, such as the first period and / or the second period. By dividing the plurality of switches into two portions, the system ensures that only one portion is active at a time, reducing overlapping conduction paths and minimizing potential energy losses caused by unintended current flow. The implementation of this embodiment may involve defining the first portion and the second portion based on the topology of the converter. For instance, in a symmetrical Dickson switched-capacitor topology, the first portion could include switches in the first branch, while the second portion could include switches in the second branch. The assignment of switches to the two portions can also be adjusted to optimize performance for specific voltage conversion ratios or load conditions. This flexibility in configuration allows the converter to adapt to a wide range of operational requirements.

[0051] In another embodiment of the present disclosure, the first portion and the second portion of the plurality of switches are the plurality of switches. This implies that all the plurality of switches in the converter are alternately activated and deactivated in two distinct groups during the first and second periods. This full utilization of the plurality of switches can ensure that the entire plurality of switches contributes to the charge transfer process, maximizing the efficiency of the converter. By alternating the active and inactive states of the plurality of switches, the switched-capacitor converter can achieve balanced operation, reducing stress on individual switches and enhancing the reliability of the system. The timing of the activation and deactivation of the switches in this embodiment can be optimized to achieve high switching frequencies while minimizing energy losses.

[0052] In one embodiment of the present disclosure, the deadtime is the period between the first and the second period. Preferably, the deadtime is the period of time where all switches are transitioning from an activated state to a deactivated state. More preferably, the deadtime prevents both the first portion of the plurality of switches and the second portion of the plurality of switches from conducting simultaneously, thereby leading to short circuits and potential damage to the switched-capacitor converter. The deadtime may allow the auxiliary circuit to operate and facilitate charge redistribution. The deadtime ensures that the transitions between the first and second periods occur P7522PC00

[0053] 10 without overlapping switching events, thereby minimizing losses and avoiding potential short circuits. The duration of the deadtime can be optimized based on a switching frequency of the switched-capacitor converter and the properties as well as the features of the auxiliary circuit, as described in the present disclosure. For instance, a shorter deadtime may be suitable for high-frequency operation, while a longer deadtime could be used to ensure complete charge redistribution in lower-frequency scenarios.

[0054] In another embodiment of the present disclosure, the switched-capacitor converter has a switching frequency or a switching period, wherein the switching period comprises the first period, the second period, and at least one deadtime, such as two deadtimes. The switching period defines the operational timing of the converter, ensuring that the first and second periods are separated by one or more deadtimes to enable effective charge redistribution and zero-voltage switching. The switching frequency determines the duration of the switching period, with higher frequencies enabling more compact designs by reducing the required capacitance for energy storage. The switching frequency or period may be dynamically adjusted based on load conditions to optimize efficiency and performance.

[0055] The switching frequency can be comprised between 100 kHz and 5 MHz, preferably from 250 kHz to 3 MHz, more preferably from 500 kHz to 2 MHz, even more preferably from 600 kHz to 1.5 MHz. Operating within this frequency range can allow the converter to achieve high power density while maintaining efficiency. Frequencies below 1 MHz may be suitable for applications requiring higher power levels and lower switching losses, whereas frequencies above 2 MHz are ideal for compact designs where minimizing the size of the plurality of capacitors is a priority. The selected switching frequency may also depend on the characteristics of the power transistors, as higher frequencies require transistors with faster switching speeds and lower switching losses. The ability to operate at such high frequencies is a key advantage of the design, enabling the converter to meet the demands of modern high-density applications.

[0056] In one embodiment of the present disclosure, the first period is separated from the second period by the deadtime, and the first period is substantially as long as the second period. Preferably, the first period is separated from the second period by a first deadtime, and the second period is separated from the first period by a second P7522PC00

[0057] 11 deadtime, such that a switching period can comprise the first period, the first deadtime, the second period and the second deadtime. Advantageously, the period of the first deadtime is substantially equivalent to the period of the second deadtime. Equal durations for the first and second periods ensure balanced charge transfer between the input and the output, contributing to the stability and efficiency of the converter. This symmetry minimizes imbalances in the circuit and reduces stress on individual components, particularly the capacitors and transistors. The equal length of the periods may also facilitate predictable and consistent operation, which is important for applications requiring precise voltage regulation and minimal output ripple.

[0058] In a preferred embodiment of the present disclosure, a first amount of charge is transferred from the input to the plurality of capacitors, and a second amount of charge is transferred from the plurality of capacitors to the output during the first period. During the second period, a third amount of charge is transferred from the input to the plurality of capacitors, and a fourth amount of charge is transferred from the plurality of capacitors to the output. This sequential charge transfer process ensures efficient and continuous energy delivery while maintaining symmetry between the two periods. For instance, the switched-capacitor converter may take a different amount of charge from the input than what it delivers to the output depending on its voltage conversion ratio. A 48 V to 12 V switched-capacitor converter would take one set of charge from the input and deliver four sets of charge to the output in a single switching period, thereby establishing a % ratio between the input voltage and the output voltage.

[0059] In another embodiment of the present disclosure, the auxiliary circuit is a Zero Voltage Switching (ZVS) circuit. The ZVS circuit is configured to facilitate zero-voltage switching by redistributing the charges stored in the parasitic capacitances of the switches during the deadtime. By ensuring that the drain-source voltage (VDS) of the switches is close to zero before they are turned on, the ZVS circuit minimizes switching losses and enables faster transitions. This configuration improves the overall efficiency of the switched-capacitor converter, particularly in high-frequency applications, where switching losses can significantly affect performance.

[0060] The auxiliary charge can be collected from at least one parasitic capacitance of the plurality of switches. The parasitic capacitances, such as the drain-source capacitances (CDS) or the channel capacitance inherent to the power transistors, act as charge reservoirs during the operation of the converter. The auxiliary circuit can be P7522PC00

[0061] 12 designed to harness this charge and redistribute it effectively, ensuring that it may not dissipate as heat. Advantageously, the auxiliary circuit can be designed to transfer the auxiliary charge collected from at least one parasitic capacitance of the plurality of switches from the second portion of the plurality of switches not operating during the first period to the first portion of the plurality of switches not operating during the second period. Conversely, the auxiliary circuit can be designed to transfer the auxiliary charge from the first portion of the plurality of switches not operating during the second period back to the second portion of the plurality of switches when transitioning into the first period, wherein the second portion of the plurality of switches are not operating. When in the non-operating state, the switches naturally collect charges in their parasitic capacitances due to their OFF condition. Instead of allowing these charges to dissipate, the auxiliary circuit enables their controlled transfer to the next non-operating switches. This transfer occurs during each deadtime interval, allowing the energy stored in the parasitic capacitances to be recycled rather than lost as heat. The bidirectional transfer of auxiliary charge between consecutive non-operating switches ensures efficient charge redistribution during each deadtime interval, whether it occurs between the first period and the second period, or between the second period and the subsequent first period. This bidirectional transfer of the auxiliary charge ensures efficient charge redistribution during each deadtime interval, whether it occurs between the first period and the second period, or between the second period and the subsequent first period. By recycling this charge, the converter reduces energy losses and enhances the operational efficiency of the switched-capacitor converter. This embodiment is particularly beneficial in high-power applications, where parasitic capacitances can store significant energy. By efficiently utilizing this stored energy, the converter reduces the overall energy loss associated with switching transitions and improves performance without the need for additional energy storage components. The controlled transfer of auxiliary charge further ensures balanced operation between the first portion and the second portion of the switches, contributing to the stability and reliability of the converter across varying load and voltage conditions.

[0062] In one embodiment of the present disclosure, the auxiliary circuit further comprises an inductive element. The inductive element facilitates the transfer of the auxiliary charge by creating a resonant circuit with the parasitic capacitances. This resonant behavior allows the charge to flow smoothly between the capacitors and the inductive element, ensuring efficient redistribution of energy during the deadtime. The use of an inductive element also mitigates voltage spikes that may occur during switching transitions, P7522PC00

[0063] 13 protecting the switches and enhancing the reliability of the system. The inductive element collaborates with parasitic capacitances to form a resonant circuit, allowing the voltage across the switching device to oscillate and reach zero before the switch transitions. By facilitating zero-voltage conditions during switching events, the inductive element significantly diminishes energy dissipation, leading to higher efficiency, particularly in high-frequency applications. Moreover, the smooth voltage transitions achieved through this resonance mitigate high-frequency noise, thereby simplifying EMI filtering requirements and enhancing overall system reliability.

[0064] In another embodiment of the present disclosure, the inductive element is an inductor, a coil, a distributed inductance, or any combinations thereof. Inductors and coils can be discrete components placed within the auxiliary circuit, while distributed inductances may arise naturally from PCB traces and connections. The choice of inductive element depends on the specific requirements of the converter, such as its operating frequency and power level. For instance, a discrete inductor may be used in low-frequency, high- power designs, whereas distributed inductances are more suitable for high-frequency, compact configurations.

[0065] In a preferred embodiment of the present disclosure, the auxiliary circuit further comprises at least one auxiliary switch, wherein the at least one auxiliary switch is configured to transfer the auxiliary charge. The auxiliary switch can operate or being activated / deactivated during the deadtime to facilitate the flow of charge between the inductive element and the parasitic capacitances. By controlling the timing and sequence of the auxiliary switch operation, the system can ensure efficient redistribution of energy and prevent losses due to charge leakage. Variations may include single auxiliary switches or multiple switches to handle higher power levels or to optimize charge transfer paths. Additional variations of this embodiment could be to include at least one diode such that the auxiliary circuit comprises at least one diode. The at least one diode may either serve as a clamping device to demagnetize residual energy in the inductive element after the ZVS operation, or can serve as part of a bidirectional switch. The bidirectional switch can block both positive and negative voltages. For example, this can be implemented using a half-bridge configuration of two NMOS devices. The midpoint of the half-bridge acts as the first terminal of the bidirectional switch, while the top and bottom terminals connect to diodes in opposing directions, meeting at the second terminal. This arrangement allows positive current to flow from the first to the second terminal via one NMOS device and one diode, while P7522PC00

[0066] 14 negative current flows through the other NMOS device and diode. Alternatively, the diode can also be used in a half-bridge configuration in combination with an NMOS, where the top switch of the half-bridge is an NMOS and the bottom part is a diode. The at least one diode may be at least one PN diode, at least one Schottky diode, at least one MOSFET body diode, or any combinations thereof.

[0067] The at least one auxiliary switch can allow the auxiliary charge to flow in the inductive element. This flow can create a resonant current that assists in the redistribution of the charge stored in the parasitic capacitances. The auxiliary switch may be configured to turn on and off or to be activated / deactivated at specific intervals, synchronized with the switched capacitor converter's switching phases, to ensure optimal operation of the ZVS circuit. This configuration reduces energy losses and minimizes the risk of voltage overshoot or undershoot during switching transitions.

[0068] In one embodiment of the present disclosure, the at least one auxiliary switch is at least one auxiliary transistor. Auxiliary transistors, such as MOSFETs, GaN MOSFETs, SiC MOSFETs, bipolar junction transistors (BJTs), junction field-effect transistors (JFETs) and / or IGBTs, are particularly suited for this application due to their fast switching capabilities and low conduction losses. The auxiliary transistors may be selected based on their voltage and current ratings to match the operating conditions of the auxiliary circuit. For example, transistors with lower on-resistance can be used to reduce conduction losses, while high-speed transistors enable efficient operation at higher frequencies.

[0069] Advantageously, the auxiliary transistors may differ from the plurality of transistors used for the main charge transfer in the switched-capacitor converter. Specifically, the auxiliary transistors do not require the same current handling capabilities as the plurality of transistors, as the auxiliary charge being redistributed by the auxiliary circuit is substantially smaller than the charge transferred by the main transistors between the capacitors. This allows the auxiliary transistors to have reduced size, or power ratings compared to the main transistors, enabling significant optimization in the overall footprint of the auxiliary circuit. By utilizing smaller auxiliary transistors, the design can achieve a more compact auxiliary circuit, which directly contributes to reducing the overall size of the switched-capacitor converter. This reduction in footprint is particularly advantageous in applications where space constraints are critical, such as in high-density power modules for Al data centers, automotive systems, or portable P7522PC00

[0070] 15 electronic devices. Additionally, smaller auxiliary transistors typically exhibit lower parasitic capacitances and faster switching times, further enhancing the efficiency of the auxiliary circuit while maintaining precise charge redistribution during the deadtime.

[0071] Moreover, the smaller size of the auxiliary transistors allows for greater flexibility in layout design. For instance, multiple auxiliary transistors could be included to provide redundancy or to handle higher switching frequencies without significantly impacting the space requirements of the converter. This flexibility in design contributes to the scalability of the system, enabling it to adapt to a wide range of power and voltage conversion requirements while maintaining a compact and efficient form factor.

[0072] In one embodiment of the present disclosure, the at least one auxiliary switch is a plurality of auxiliary switches, preferably at least three auxiliary switches, more preferably at least four auxiliary switches. Using multiple auxiliary switches provides greater flexibility in managing the charge redistribution process. For example, one auxiliary switch can be positioned on one side of the inductive element, while another auxiliary switch can be positioned on the opposite side of the inductive element. This configuration allows for precise control over the flow of the auxiliary charge through the inductive element, enabling efficient charge redistribution and facilitating the operation of the auxiliary circuit. The placement of auxiliary switches on either side of the inductive element enables bidirectional current flow, which is particularly advantageous for achieving smooth and balanced energy transfer during the deadtime. This arrangement also allows for more complex control strategies, such as selectively activating specific auxiliary switches based on the operating conditions of the converter or the auxiliary circuit. For instance, switches on either side of the inductive element can be activated sequentially or in pairs to optimize the resonant behavior of the circuit and to ensure that the charge redistribution process aligns with the switching phases of the converter. Additionally, this configuration can improve fault tolerance, as the use of multiple auxiliary switches provides redundancy. If one switch were to fail, the remaining switches could continue to facilitate the charge redistribution process, maintaining the functionality of the auxiliary circuit. The positioning of the auxiliary switches around the inductive element also enables a more compact and modular design, reducing the overall footprint of the auxiliary circuit and making it suitable for applications requiring high power density and space efficiency. Additionally, each of the at least one auxiliary switch can be implemented with two diodes and two auxiliary switches, one diode and one switch, and / or four auxiliary switches. P7522PC00

[0073] 16

[0074] In a preferred embodiment of the present disclosure, the plurality of auxiliary switches forms at least one half-bridge. A half-bridge configuration allows for efficient charge flow between the inductive element and the parasitic capacitances, as well as improved control over the switching process. This configuration is particularly beneficial in high- frequency applications, where precise timing of the auxiliary switch operation is critical.

[0075] A half-bridge configuration consists of two switches arranged in series between a high voltage rail (e.g., input voltage) and a low voltage rail (e.g., ground), with their midpoint acting as an output node. The need for two switches in a half-bridge arises primarily from the requirement to control the flow of current and voltage more effectively, particularly in systems where bidirectional operation, precise timing, or efficient switching is needed. In simpler systems, a single switch can control the connection of a voltage source to a load, but this approach has significant limitations. A single switch can only connect or disconnect the load to one potential, such as ground or the input voltage, and cannot alternate between multiple voltage levels. Additionally, singleswitch systems cannot easily accommodate bidirectional current flow without adding diodes or other external components. This limitation makes single switches less versatile for many practical applications. The introduction of a second switch in the halfbridge configuration enables much greater flexibility. By alternating the activation of the two switches — commonly referred to as the high-side switch and the low-side switch — the voltage at the midpoint can be toggled between the high voltage and the low voltage. This alternating behavior allows the half-bridge to manage current flow through inductive or capacitive components more efficiently. The two-switch setup also enables precise timing of switching events, which is critical for achieving high efficiency and reduced power losses in modern power electronics. One of the key advantages of the half-bridge configuration is its ability to support bidirectional current flow. When an inductive load, such as an inductor or transformer, is connected to the midpoint, current can flow in either direction through the two switches depending on their activation state.

[0076] In one embodiment of the present disclosure, the inductive element is comprised between two half-bridges. Placing the inductive element between two half-bridges enables symmetrical operation of the auxiliary circuit, ensuring balanced charge redistribution between the branches of the converter. This arrangement reduces stress on individual components and enhances the stability and efficiency of the ZVS circuit. P7522PC00

[0077] 17

[0078] Fig. 2 shows a schematic view of an embodiment of the switched-capacitor converter 100 as disclosed herein, comprising an embodiment of the auxiliary circuit. The switched-capacitor converter 100 includes two main branches, labelled as the first branch and the second branch, where the branches each comprise a plurality of switches (S0A-S5A in the first branch and S0B-S5B in the second branch) and a plurality of capacitors (C1A, C2A, C3A in the first branch and C1 B, C2B, C3B in the second branch). The capacitors are configured to store and transfer charges between the input and output of the converter via the plurality of switches. An output node VOIIT is illustrated as part of the converter. The auxiliary circuit is configured to facilitate zerovoltage switching (ZVS) during the deadtime, reducing switching losses and enhancing overall efficiency. The auxiliary circuit comprises an inductive element LZVS and two half-bridges, where the half-bridges are formed by auxiliary switches (SZ1A, SZ0A) on one side and (SZ1 B, SZ0B) on the other side of the inductive element. The auxiliary switches are configured to control the flow of auxiliary charge through the inductive element, ensuring that the main power switches operate under zero-voltage conditions. Specifically, during deadtime, some of the auxiliary switches of each half-bridge are activated, as described herein regarding the activation of half-bridges, in a controlled manner to allow current to flow through the inductive element, redistributing parasitic charges primarily stored in the plurality of switches' capacitances. For example, switches SZ1A and SZ0A are positioned on one side of the inductive element, while switches SZ1 B and SZ0B are on the opposite side, enabling bidirectional current flow across LZVS. The inclusion of the auxiliary circuit provides multiple benefits, such as reducing energy losses caused by switching transients and minimizing voltage stress across the main switches. By enabling zero-voltage switching, the converter achieves higher operational efficiency, particularly at high switching frequencies, while ensuring smooth transitions between the switching phases, such as the first and the second period. Fig. 2 further shows that the auxiliary circuit is connected to the lower part of the main branches, where the auxiliary switches form complementary half-bridge configurations. These half-bridges allow precise control over the auxiliary charge flow and ensure that the energy stored in the inductive element is transferred efficiently between the branches during deadtime. The operation of the auxiliary circuit is synchronized with the switching of the main branches to enable continuous and efficient energy redistribution. This embodiment highlights a compact and integrated auxiliary circuit design that improves the overall efficiency and performance of the P7522PC00

[0079] 18 switched-capacitor converter, making it suitable for high-frequency, high-density applications.

[0080] Figs. 3A-3B illustrate the operation of the switched-capacitor converter 100, including the control signals, the drain-source voltages of the plurality of switches, and the auxiliary current of the auxiliary circuit, as disclosed herein.

[0081] In Fig. 3A, the control signals for operating the plurality of switches in one embodiment are depicted over time, showing the timing of the first period (PHASE1), the second period (PHASE2), and the deadtime. The control signals for switches S5A, S4B, S3A, S2B, S1A, SOB are activated during PHASE1, whereas the control signals for switches S5B, S4A, S3B, S2A, S1 B, SOA are activated during PHASE2. As described herein, the switches S5A, S4B, S3A, S2B, S1 A, SOB are the switches of the first portion of the plurality of switches and the switches S5B, S4A, S3B, S2A, S1B, SOA are the switches of the second portion of the plurality of switches. The deadtime occurs between the first and second periods, during which all the main switches are turned off. Within the deadtime, the control signals for the auxiliary switches SZ1 A and SZ1 B are activated, facilitating the operation of the auxiliary circuit for zero-voltage switching (ZVS). The auxiliary circuit not only redistributes the auxiliary charge stored in the parasitic capacitances of the switches that were inactive in the preceding phase but also ensures the charging of the drain-source capacitances (CDS) of the switches in the other portion of switches that are to be turned OFF in the upcoming phase. By precharging the CDS of the switches that will remain OFF, the auxiliary circuit ensures that the energy stored in the preceding phase can be re-used, at least partially in the other portion of switches, thereby improving the efficiency of the switched-capacitor converter. The control signals are managed to ensure there is no overlap between the activation of switches during PHASE1 and PHASE2, thereby preventing short circuits or unnecessary energy losses. In Fig. 3B, the corresponding drain-source voltages of the switches are shown, reflecting the transitions between PHASE1, PHASE2, and the deadtime. The voltages VS5A, VS2B, VS1A, VSOB, and VS5B, VS4B, VS3A represent the drain-source voltages for the respective switches, demonstrating how the switching events cause voltage changes across the switches. During the deadtime, the auxiliary circuit redistributes the auxiliary charge stored, primarily in the parasitic capacitances of the switches. This redistribution can be seen in the voltage curves, where the drainsource voltages of some of the plurality of switches gradually transition toward zero, enabling zero-voltage switching before some of the plurality of switches are turned P7522PC00

[0082] 19 back on in the next phase. The redistribution of charge during the deadtime, such as the auxiliary charge, allows the voltages across the first portion of the plurality of switches to slowly ramp up to their blocking voltage in a controlled manner, ensuring that the voltage across each switch increases smoothly rather than abruptly, while the voltages across the second portion of the plurality of switches are slowly ramping down to allow zero-voltage switching. This gradual ramp-up minimizes voltage stress on the switches, preventing potential overvoltage conditions and reducing the risk of switching losses caused by high dv / dt transitions. The auxiliary current iZVS, also shown in Fig. 3B, represents the current flowing through the auxiliary circuit, including the inductive element and the auxiliary switches. The timing relationship between the control signals, the drain-source voltages, and the auxiliary current highlights the coordinated operation of the switched-capacitor converter and its auxiliary circuit. By activating the auxiliary circuit during the deadtime, the converter minimizes switching losses and improves overall efficiency, particularly in high-frequency applications. The auxiliary circuit further ensures that the CDS of the switches in the next OFF state are charged appropriately, reducing energy losses. The integration of the auxiliary circuit ensures smooth transitions between PHASE1 and PHASE2 while maintaining stable operation and protecting the main switches from voltage stress.

[0083] In another embodiment of the present disclosure, the switched-capacitor converter further comprises a control unit, wherein the control unit is configured to control a switching of the plurality of switches and / or the plurality of auxiliary switches. The control unit may ensure precise timing and coordination of switching events, enabling efficient energy transfer between the capacitors and the input or output. By managing the activation and deactivation of the switches, such as the plurality of switches and the at least one auxiliary switch, the control unit minimizes overlap between switching phases, thereby reducing switching losses and enhancing overall system efficiency. The control unit can be implemented using a microcontroller, an FPGA, or a custom ASIC, depending on the application's complexity and performance requirements.

[0084] The control unit can comprise at least one clock unit, and the at least one clock unit comprises a clock generator, wherein the clock generator is a voltage-controlled oscillator or a ring oscillator. The clock generator provides a stable and precise timing signal that drives the operation of the plurality of switches and auxiliary circuit. A voltage-controlled oscillator allows dynamic adjustment of the switching frequency based on operating conditions, such as load variations or input voltage changes, P7522PC00

[0085] 20 optimizing the converter's performance. A ring oscillator, on the other hand, offers a compact and efficient solution, particularly suited for integrated designs. The choice of clock generator depends on factors such as power consumption, precision requirements, and system integration needs.

[0086] In one embodiment of the present disclosure, the control unit is configured to activate the first portion of the plurality of switches during the first period and to activate the second portion of the plurality of switches during the second period. This sequential control ensures that charge transfer occurs efficiently between the capacitors and the input or output without overlap or interference. The control unit can generate signals that coordinate the activation of each portion of switches, such as the first portion or the second portion of the plurality of switches, ensuring smooth transitions between the first and second periods. This control strategy also aligns with the operation of the auxiliary circuit during the deadtime, facilitating effective auxiliary charge redistribution.

[0087] In a preferred embodiment of the present disclosure, the first portion of the plurality of switches is a first half of the first part of the plurality of switches and a second half of the second part of the plurality of switches, and the second portion of the plurality of switches is a second half of the first part of the plurality of switches and a first half of the second part of the plurality of switches. This configuration allows for balanced operation by alternating the switches within each branch, ensuring equal distribution of charge transfer responsibilities among the switches. The control unit coordinates the activation of these portions to maintain symmetry and reduce stress on individual switches, enhancing the converter’s durability and reliability.

[0088] The control unit can be configured to control the plurality of auxiliary switches during the deadtime. By managing the timing and sequence of the at least one auxiliary switch activation, the control unit ensures effective operation of the auxiliary circuit for zerovoltage switching. This control enables precise auxiliary charge redistribution, reducing energy losses and preventing voltage spikes during the transitions between the first and second periods. The control unit may employ feedback mechanisms to monitor the state of the auxiliary circuit and adjust the timing of the auxiliary switches dynamically, optimizing performance under varying load conditions.

[0089] In another embodiment of the present disclosure, the control unit comprises a plurality of gate drivers, wherein the gate drivers are configured to drive the plurality of switches and / or the plurality of auxiliary switches, such that each of the plurality of switches P7522PC00

[0090] 21 and / or the plurality of auxiliary switches are configured to be driven by at least one of the plurality of gate drivers. The gate drivers provide the necessary signals to turn the switches on and off, with the required impedance depending on the size of the plurality of switches and / or the size of the at least one auxiliary switch, ensuring precise timing and efficient operation. The gate drivers may be integrated into the control unit or implemented as separate modules, depending on the design requirements. High-speed gate drivers are particularly advantageous for achieving high switching frequencies while maintaining low switching losses. The choice of gate driver type and implementation can vary based on the specific application requirements, such as switching frequency, voltage levels, and power density.

[0091] Gate drivers can be implemented as integrated circuit (IC)-based drivers or discrete component drivers. IC-based gate drivers are compact and integrate several functionalities, such as under-voltage lockout (IIVLO), deadtime control, and protection mechanisms against overcurrent or thermal faults. They are particularly well-suited for applications with space constraints or where a high level of integration is desired. These drivers can be single-channel or multi-channel, depending on whether they are designed to control a single switch or multiple switches simultaneously. Multi-channel gate drivers are advantageous in switched-capacitor converters with multiple switches, as they simplify circuit layout and reduce interconnect complexity. Discrete component gate drivers, on the other hand, use separate transistors, resistors, and capacitors to implement the driving circuitry. These offer greater flexibility in customization and are often used in high-power applications where the driving requirements exceed the capabilities of standard IC-based gate drivers. For instance, discrete gate drivers can be tailored to provide higher drive currents or to operate at higher voltages, enabling the use of larger or faster power switches.

[0092] In one embodiment of the present disclosure, the plurality of switches and / or the plurality of auxiliary switches are configured to be independently controlled by the plurality of gate drivers. Independent control allows for greater flexibility in managing the operation of the switches, enabling advanced control strategies such as phase- shifted operation or dynamic timing adjustments. This feature is particularly beneficial in applications requiring fine-tuned performance, as it allows the system to adapt to changing operating conditions and optimize efficiency dynamically. The independent control of switches also facilitates fault-tolerant designs, as individual switches can be isolated or bypassed in case of failure, ensuring continued operation of the converter. P7522PC00

[0093] 22

[0094] In a preferred embodiment of the present disclosure, the plurality of gate drivers and the auxiliary switches are arranged on a control module, wherein the control module is configured to be connectable to the plurality of switches, the plurality of capacitors, and / or the inductive element. The plurality of switches are external to the control module, and the control module is designed to interface with them through the plurality of gate drivers. This modular design provides a compact and flexible solution, enabling the control circuitry and auxiliary switches to be integrated into a single unit that interfaces seamlessly with the other components of the switched-capacitor converter. By arranging the gate drivers and auxiliary switches on a dedicated control module, the design simplifies system assembly and reduces the complexity of wiring and interconnections. The control module may be implemented as a printed circuit board (PCB), monolithic microchip and / or integrated substrate, designed to minimize parasitic inductances and resistances, which is particularly beneficial for high-frequency operation. In some embodiments, co-location of the gate drivers and auxiliary switches within the control module can enable tighter control and matching of propagation delays of control signals and other signals. This precise timing may be particularly advantageous when the auxiliary inductance is selected to be small to permit short deadtime intervals. The required deadtime is set by the effective parasitic capacitances together with the auxiliary inductance, which define an LC resonance. Accurate timing can enable switching near, for example, approximately one half of the resonance period, which may promote reliable zero-voltage and zero-current transitions across component tolerances and operating conditions. Consolidating most control-signal routing and other sensitive nodes within the control module can reduce the number of external interconnections, which may simplify system integration and improve signal integrity by limiting signal routing loop area and susceptibility to noise. Integrating the auxiliary switches with the control module, rather than using discrete packaged devices, may allow the use of smaller device geometries for the auxiliary switches, such as auxiliary transistors, while meeting performance targets, which can reduce area and cost and may yield a more compact module footprint.

[0095] The modular approach defined by this control module also enhances scalability, allowing the control module to be easily adapted for different converter configurations by changing the number or type of switches, capacitors, or inductive elements it interfaces with. For instance, the control module could include additional gate drivers or auxiliary switches to accommodate converters with higher power levels or more complex architectures. The arrangement of the auxiliary switches on the control P7522PC00

[0096] 23 module can further improve the efficiency of the auxiliary circuit, as it minimizes the distance between the auxiliary switches and the inductive element, reducing signal propagation delays and losses.

[0097] In one embodiment of the present disclosure, the control module further comprises the control unit. Integrating the control unit with the gate drivers and auxiliary switches on the same module provides a fully unified control system for the switched-capacitor converter. This integration reduces the footprint of the control circuitry, which is critical in applications where space is limited, such as in automotive systems or compact power modules. It also enables tighter synchronization between the control unit and the gate drivers, improving the precision of switching events and the overall efficiency of the converter. The control module may also include additional features to enhance its functionality and reliability. For example, it may incorporate onboard sensors for monitoring voltage, current, or temperature, allowing the control unit to adaptively adjust the switching parameters based on real-time operating conditions. Furthermore, the control module could include protection circuits, such as overvoltage, overcurrent, or thermal shutdown mechanisms, to safeguard the converter and its components from fault conditions. By consolidating the control unit, gate drivers, and auxiliary switches on a single module, the design simplifies manufacturing and maintenance. For example, the module can be tested independently before being integrated into the full converter system, ensuring higher reliability and reducing assembly time. This modularity also facilitates easier upgrades or replacements, as the control module can be swapped out without requiring changes to the rest of the converter. This embodiment enables a high degree of flexibility, scalability, and integration, making the switched-capacitor converter suitable for a wide range of applications, from low-power, high-frequency designs to high-power industrial systems, while maintaining a compact and efficient architecture.

[0098] In another embodiment of the present disclosure, the control module can be at least one control module, such as two control modules, comprising a first control module and a second control module. Preferably, the first control module may be configured to be connectable to the first part of the plurality of switches and at least one first auxiliary switch, and the second control module may be configured to be connectable to the second part of the plurality of switches and at least one second auxiliary switch. More preferably, the at least one first auxiliary switch is configured to be connected to a first P7522PC00

[0099] 24 terminal of the inductive element, and the at least one second auxiliary switch is configured to be connected to a second terminal of the inductive element.

[0100] By splitting the control module into two control modules, the design provides a more modular and flexible architecture. This configuration enables the first control module to manage the operation of the first portion of the plurality of switches and the first auxiliary switch independently of the second control module, which manages the second portion of the plurality of switches and the second auxiliary switch. Such a distributed control structure reduces signal routing complexity and parasitic effects, particularly in large or high-density switched-capacitor converter implementations, where long interconnections can introduce delays or losses.

[0101] In addition, this modular design enhances scalability and maintainability. For instance, in applications requiring multiple converters operating in parallel, the control modules can be adapted or duplicated for each branch, reducing the complexity of integrating additional converters into the system. This flexibility makes the embodiment particularly advantageous in systems where modularity and ease of expansion are critical, such as in power distribution networks or scalable power systems.

[0102] This configuration also enables localized control logic within each control module, reducing the computational burden on a centralized controller. For example, each control module can independently monitor and adjust the operation of its associated switches and auxiliary circuit components, thereby improving responsiveness and reducing the risk of synchronization issues. Preferably, the first and the second control module can be programmed and controlled by a master microcontroller or a master microprocessor, which may be configured to receive feedback from the system, thereby ensuring proper control of the first and the second control module in order to achieve the required performance.

[0103] The physical separation of the control modules also contributes to improved thermal management. By distributing the control electronics, heat generated during operation can be spread across a larger area, reducing the likelihood of hot spots and allowing for more effective cooling solutions.

[0104] In a preferred embodiment of the present disclosure, the switched-capacitor converter further comprises at least one primary inductive element, wherein the at least one primary inductive element is arranged in the first branch, the second branch, and / or in P7522PC00

[0105] 25 series with the plurality of capacitors, such that the switched-capacitor converter is a resonant switched-capacitor converter. The inclusion of the primary inductive element introduces resonance into the charge transfer process, enabling smoother energy flow and reducing losses associated with abrupt switching. The at least one primary inductive element may take the form of a discrete inductor, a coil, or a distributed inductance arising naturally from PCB traces or wiring in the circuit. When arranged in series with the capacitors or branches, such as the first branch, the second branch, the first capacitor branch and / or the second capacitor branch, the at least one primary inductive element forms an LC resonant circuit that facilitates oscillatory charge transfer, enhancing the efficiency of the converter. This configuration is particularly advantageous in high-frequency applications, as it allows for compact designs by minimizing the capacitance and inductance values required for energy storage and transfer.

[0106] In another embodiment of the present disclosure, the plurality of charges are transferred with at least one resonant charge transfer. Resonant charge transfer occurs when the interaction between the inductive elements, such as the primary inductive elements and / or the inductive elements in the auxiliary circuit, and capacitors creates oscillations that facilitate the movement of charge with minimal energy loss. This process significantly reduces power dissipation compared to non-resonant charge transfer, as the energy is cyclically exchanged between the capacitors and inductive elements rather than being dissipated as heat. Resonant charge transfer enables higher switching frequencies, improving the power density and efficiency of the converter.

[0107] In one embodiment of the present disclosure, the at least one resonant charge transfer is underdamped. Underdamped resonance occurs when the resistance in the resonant circuit is low enough to allow sustained oscillations during the charge transfer process. This condition ensures that the energy transfer between the inductive elements and capacitors is efficient and smooth, avoiding sharp transitions that could cause voltage spikes or losses. An underdamped system provides a controlled oscillatory behavior that optimizes the charge redistribution process, particularly in high-frequency or high- power applications. The level of damping can be adjusted by modifying the equivalent resistance of the resonant circuit, which may involve selecting appropriate transistor characteristics, adding resistive elements, or tuning the circuit layout. P7522PC00

[0108] 26

[0109] In one embodiment of the present disclosure, the switched-capacitor converter operates as a resonant switched-capacitor converter, wherein at least one primary inductive element is comprised in at least one switching loop, enabling oscillatory charge transfer. Preferably, the at least one primary inductive element is arranged in series with each of the plurality of capacitors. Switching loops in the context of a switched-capacitor converter refer to the electrical paths or circuits formed by the combination of switches, capacitors, and any inductive elements during a specific switching phase, such as the first period, the second period and / or the deadtime. These switching loops represent the flow of current when particular switches are activated, enabling charge transfer between capacitors, input, and output nodes. Each switching loop corresponds to a unique configuration of active components at a given point in time within the switching cycle.

[0110] In general, a switching loop is defined by the conductive paths created when one or more switches in the converter are turned on, connecting specific capacitors or other energy storage elements to allow the transfer of charge or energy. The topology of these loops changes dynamically as the converter transitions between switching states, with switches opening and closing in a coordinated manner to facilitate charge redistribution. The specific arrangement of the active switches, capacitors, and any inductive components determines the behavior of the switching loop, including the direction of current flow, voltage levels, and resonant characteristics.

[0111] In resonant switched-capacitor converters, the switching loops may include inductive elements, either discrete or distributed, such as the at least one primary inductive element, along with capacitors. These inductive elements introduce oscillatory behavior, creating underdamped or resonant charge transfer within the loop. The Cofactor of the loop determines whether the resonance is underdamped, critically damped, or overdamped. Resonant switching loops allow the energy to oscillate between the inductive and capacitive elements, enabling smoother transitions and minimizing switching losses.

[0112] Resonant charge transfer occurs when the energy stored in inductive elements interacts with the capacitive elements, forming an LC resonant circuit. This oscillatory behavior facilitates efficient energy redistribution, minimizing switching losses and reducing the size of the capacitors required for energy transfer. Underdamped P7522PC00

[0113] 27 resonance is achieved when the Q-factor of the resonant loop is above a specific threshold, such as 0.5, ensuring smooth and controlled charge transfer.

[0114] In a further embodiment of the present disclosure, the resonant nature of the at least one resonant charge transfer can be characterized as follows: at least one resonant charge transfer occurs between at least two capacitors, wherein the at least one resonant charge transfer is underdamped and enables bidirectional charge flow between the capacitors when operated at a period above a resonant period or a frequency below a resonant frequency. This definition emphasizes that resonance enables charge to oscillate efficiently between components, such as switches and capacitors, supporting bidirectional flow when the switching frequency is sufficiently adjusted relative to the natural frequency of the LC circuit.

[0115] In another embodiment of the present disclosure, at least one frequency-dependent charge transfer between at least two capacitors is defined as an underdamped current waveform, wherein the current waveform can reverse polarity if the converter operates at a period longer than the resonant period. This description highlights that the charge transfer process depends on the resonant frequency and allows for current reversal when switching frequency is reduced. The underdamped current waveform ensures energy oscillates efficiently without significant dissipation in resistive components.

[0116] In another embodiment of the present disclosure, at least one natural mode of the switched-capacitor converter corresponds to a complex conjugate pair of poles, wherein an imaginary part of the poles sets the oscillation frequency, and natural mode is underdamped. This formal characterization of resonance is rooted in the dynamic analysis of the switched-capacitor converter, providing a robust and general approach applicable to complex, intertwined switching loops. By ensuring the system remains underdamped, the oscillatory mode facilitates smooth and efficient charge redistribution without introducing excessive losses.

[0117] The at least one resonant charge transfer can be performed by a resonant charge transfer loop, and the resonant charge transfer loop may have a Q-factor, wherein the Q-factor can be equal to or above 0.5. The Q-factor, or quality factor, is a dimensionless parameter that characterizes the damping of the resonant circuit. A Q- factor equal to 0.5 indicates a critically damped system, a Q-factor above 0.5 indicates an underdamped system, with both ensuring that oscillations decay at a controlled rate and do not persist excessively. This level of damping is particularly beneficial in P7522PC00

[0118] 28 switched-capacitor converters, as it balances the efficiency of the resonant charge transfer with the stability of the system. The Q-factor can be tuned by adjusting the values of the inductive and capacitive elements, as well as the resistance in the charge transfer loop. For example, distributed resistances in PCB traces or intentional damping resistors can be used to achieve the desired Q-factor, depending on the specific application requirements. Different switches with higher resistance can also be used to achieve the desired Q-factor. Indeed, switches with different properties exhibit different inherent or internal resistance. Preferably, an adjustment of the inductance, such as the at least one primary inductive element, and the plurality of capacitors capacitances would be preferable, since intentional damping resistors may reduce the efficiency of the switched-capacitor converter. The adjustment can be performed by adding or removing capacitors, and / or by changing the geometry of the PCB traces, thereby affecting the induced inductance and the induced capacitance of the PCB traces.

[0119] This resonant topology can offer several advantages, including reduced switching losses, improved energy efficiency, and enhanced stability under varying load conditions. By incorporating resonant charge transfer loops, the switched-capacitor converter can operate at higher frequencies with minimized energy dissipation, making it ideal for applications requiring compact and high-density designs. Some variations of this resonant topology may include multiple resonant loops operating in parallel or series, depending on the converter's architecture and power requirements, enabling further flexibility and scalability.

[0120] Fig. 4 shows a schematic view of an embodiment of the resonant switched-capacitor converter 200 as disclosed herein. It illustrates an embodiment of the resonant switched-capacitor converter 200, wherein at least one primary inductive element is present in the switching loops, enabling resonant charge transfer. Traditional switched- capacitor converters operate in a non-resonant manner, relying solely on capacitors and power transistors for energy transfer, with no significant inductive elements, such as the at least one primary inductive elements, as described herein. While this simplifies their implementation and analysis using fast-switching limit (FSL) and slow- switching limit (SSL) models, non-resonant converters require large capacitances to deliver high output currents. In contrast, the present embodiment introduces at least one primary inductive elements, either discrete or distributed, within the switching loops of the converter. These inductances, such as the at least one primary inductive P7522PC00

[0121] 29 element as described herein, can enable the converter to operate as a resonant switched-capacitor converter, where energy is transferred through oscillatory resonance, improving efficiency and reducing the size of the capacitors required for a given output current. The inductance in the switching loops can be implemented in different ways depending on the converter’s design and application constraints. In one implementation, the at least one primary inductive elements may be discrete inductors placed in series with the switches and capacitors, as depicted schematically in Fig. 4. These discrete inductors explicitly represent the at least one primary inductive elements introduced into the circuit to facilitate resonant charge transfer. Alternatively, in space-constrained systems or at high switching frequencies, the inductance can be distributed and inherently present in the printed circuit board (PCB) traces, as well as in the accompanying magnetic fields of the power switches, such as the plurality of switches. Such distributed inductances are particularly advantageous for achieving high power densities and compact designs without adding external components.

[0122] As shown in Fig. 4, the resonant switched-capacitor converter 200 comprises two main branches, such as the first and the second branch, wherein each branch includes a plurality of switches (S0A-S5A in the first branch and S0B-S5B in the second branch) and a plurality of capacitors (C1A-C3A in the first branch and C1 B-C3B in the second branch). The at least one primary inductive element is arranged in series with the switches and capacitors, which represent the inductance present in the circuit. These inductive elements allow the charge transfer within the converter to occur through resonant oscillations, creating an underdamped switching loop where the Q-factor of the loop is determined by the values of resistance, inductance, and capacitance.

[0123] The Q-factor of the resonant circuit may be calculated using the following equation: where L is the inductance, C is the capacitance, and R is the equivalent resistance of the loop. For the converter to operate in a resonant manner, the switching loops are configured such that the Q-factor is greater than or equal to a value that makes the system underdamped, preferably around 0.5 or higher. With the introduction of low- resistance switches, which can be necessary for handling high output currents, the Q- factor naturally increases, further enabling the resonant behavior of the converter. In P7522PC00

[0124] 30 this embodiment, the resonant operation significantly reduces the reliance on large capacitors for energy transfer, as the inductance facilitates smooth and efficient oscillatory charge movement. This improves the converter’s ability to support higher output currents while maintaining a compact form factor, making it particularly suitable for applications such as intermediate bus converters in data centers or other systems requiring high power densities. The use of resonant charge transfer in this converter also helps mitigate losses typically associated with abrupt switching events. By allowing the charge to flow through oscillatory behavior, voltage spikes and current transients are reduced, leading to improved efficiency and reduced electromagnetic interference (EMI). In addition, the resonant behavior allows the converter to operate at higher switching frequencies, further reducing the size of the capacitive and inductive components while maintaining the desired power output. This embodiment of the switched-capacitor converter therefore leverages the presence of inductive elements, whether discrete or distributed, to facilitate resonant charge transfer, improving the overall efficiency, size, and performance of the converter, particularly in applications requiring high output current and high-frequency operation.

[0125] Fig. 5 shows a schematic view of an embodiment of the resonant switched-capacitor converter 200 as disclosed herein, comprising an embodiment of the auxiliary circuit. Fig. 5 illustrates an embodiment of the resonant switched-capacitor converter 200, similar to the topology shown in Fig. 4, with the addition of an auxiliary circuit configured for zero-voltage switching (ZVS). The converter comprises two main branches, each including a plurality of switches (S0A-S5A in the first branch and S0B- S5B in the second branch) and a plurality of capacitors (C1A-C3A in the first capacitor branch and C1B-C3B in the second capacitor branch). The auxiliary circuit includes an inductive element LZVS and auxiliary switches (SZ1A, SZ0A on one side and SZ1 B, SZ0B on the other side of the inductive element). The auxiliary circuit operates during the deadtime to redistribute parasitic charges across the main switches, facilitating zero-voltage switching. By enabling resonant charge redistribution through LZVS and the auxiliary switches, the converter minimizes switching losses and improves efficiency during transitions between switching phases. This figure demonstrates the integration of the auxiliary circuit into the resonant switched-capacitor converter, highlighting its role in achieving efficient ZVS operation while maintaining the compact and high-performance design of the converter. P7522PC00

[0126] 31

[0127] Fig. 6 shows a schematic view of an embodiment of the resonant switched-capacitor converter 200 as disclosed herein, comprising another embodiment of the first and second capacitor branch arrangement. Fig. 6 illustrates an embodiment of a resonant switched-capacitor converter, wherein inductive elements are incorporated to facilitate resonant charge transfer and improve overall efficiency. The converter includes two main branches, each comprising a plurality of switches. The first branch includes switches SOA to S5A and a first capacitor branch comprises capacitors C1A, C2A, and C3A, while the second branch includes switches SOB to S5B and a second capacitor branch comprises capacitors C1B, C2B, and C3B. In this embodiment, the capacitors comprised in the first capacitor branch and the second capacitor branch are arranged or connected in series. The input capacitor CIN is provided at the top of the circuit, and connected to the input of the resonant switched-capacitor converter, ensuring energy is filtered before being supplied to the resonant switched-capacitor converter, while the output node VOIIT is located at the center, where charges are delivered to the load. Primary inductive elements are shown in series with each switch and capacitor. These primary inductive elements may enable resonant charge transfer by interacting with the capacitors to form LC resonant circuits. The presence of inductance introduces oscillatory behavior during charge transfer, which may reduce switching losses and facilitates soft switching. The primary inductive elements may be implemented as discrete inductors or as distributed inductances, for example, in the PCB traces or magnetic fields surrounding the circuit components. At the lower part of the figure, the auxiliary circuit is illustrated, comprising auxiliary switches SZ1A, SZOA and SZ1 B, SZOB, as well as an inductive element LZVS. The auxiliary circuit facilitates charge redistribution during the deadtime to enable ZVS for the plurality of switches. The auxiliary switches work in conjunction with the inductive element LZVS to temporarily store and transfer charge between the branches.

[0128] In switched-capacitor converter topologies, flying capacitors, such as the capacitors comprised in either the first or the second capacitor branch, can be arranged in various configurations to facilitate charge transfer between the input and output terminals. These configurations often differ in capacitor arrangement, affecting voltage levels, charge handling, and overall efficiency. Capacitors placed in series operate at lower voltages, reducing their required voltage rating. However, when capacitors are arranged in series, they must handle more charge, as the total charge from all capacitors in the series flows through each individual capacitor in addition to charge P7522PC00

[0129] 32 that comes from other capacitors in the topology. This tradeoff between voltage rating and charge handling is a key design consideration.

[0130] To achieve high efficiency, capacitors handling significant charge require higher capacitance to minimize charge redistribution losses. However, the capacitance of capacitors blocking higher voltages decreases due to non-linear capacitance derating, often by as much as 80-90%. This makes parallel configurations less efficient at higher voltages. Conversely, series-connected capacitors experience much lower capacitance derating at lower operating voltages, allowing for a higher effective capacitance per unit volume. Although series configurations require more capacitance overall, the reduced derating at lower voltages enables the use of fewer capacitors to achieve the same or better performance. As a result, series-connected capacitors, potentially with distributed inductances between them, are often preferred in switched-capacitor converters to balance performance, efficiency, and component count.

[0131] The switched-capacitor converter may further comprise a ZVS unit, wherein the ZVS unit can be configured to detect a transfer of the auxiliary charge. The ZVS unit can play a role in facilitating efficient zero-voltage switching by monitoring the flow of auxiliary charge within the auxiliary circuit. By detecting the transfer of the auxiliary charge, the ZVS unit ensures that the switching events occur at optimal times, minimizing switching losses and preventing voltage spikes. The detection mechanism may involve sensing voltage levels, current flow, or both within the auxiliary circuit, enabling precise control over the switching transitions. The ZVS unit’s integration into the converter improves efficiency and stability, particularly in high-frequency applications.

[0132] In one embodiment of the present disclosure, the transfer of the auxiliary charge forms an auxiliary current, and the ZVS unit is configured to detect transitions between positive and negative auxiliary current. This capability allows the ZVS unit to monitor the resonant behavior of the auxiliary circuit and identify when the auxiliary current reverses direction. Detecting these transitions is crucial for timing the operation of the auxiliary switches, ensuring that they are activated or deactivated at the appropriate moments to achieve the most efficient transfer of the auxiliary charge. The ability to sense current direction enhances the accuracy of the ZVS operation and reduces energy dissipation, as it ensures that charge redistribution occurs efficiently during the deadtime. The current sensing may be implemented using shunt resistors, Hall-effect P7522PC00

[0133] 33 sensors, or other current sensing technologies, depending on the design requirements of the converter. In some embodiments, the ZVS unit can comprise a detection mechanism which may comprise an indirect estimation of charge transfer based on time-integrated voltage measurements. For example, a sensed voltage proportional to the auxiliary current or to a node potential within the auxiliary circuit may be integrated over time to estimate transferred charge and its polarity, and the integrated signal may be compared to one or more thresholds to detect the onset or completion of charge transfer. Such implementations can be realized using analog integrator networks, transconductance-capacitor circuits, and / or sampled-data and digital accumulation with appropriate offset and drift compensation.

[0134] Measuring current polarity can be achieved by directly monitoring the inductive element of the auxiliary circuit, preferably at least one inductive element terminal voltage, more preferably both inductive element terminal voltages, and feeding these voltages into a high-speed comparator to detect polarity reversal. In the case where the inductive element is a PCB trace, two terminals can be created at both ends of the PCB trace that is used as an inductive element, thereby providing both inductive element terminal voltages when the system is used. A small external sense resistor integrated into the PCB copper layer at one end of the inductive element can provide a compact, low-cost voltage sense node for comparator input. Alternatively, modifying the gate driver, which is the one configured to drive the auxiliary switches, to sense conduction through the auxiliary switch by measuring the voltage drop across its on-state resistance is another option. If the switching elements of the auxiliary switch are integrated on-chip, internal metal routing can serve as a built-in sense resistor, with on-chip comparators detecting zero crossings. An on-chip current mirror that replicates the main current at a reduced scale can also enable polarity detection, reducing external components and simplifying integration.

[0135] Additional methods include using an analog-to-digital converter (ADC) to digitize the voltage across a dedicated on-chip sense resistor or the auxiliary switch(es) intrinsic conduction path resistance, with the data processed in a microcontroller or DSP to determine polarity changes. An external low-value sense resistor integrated into the PCB copper layer connecting the inductive element of the auxiliary circuit to the circuit can act as a compact, low-cost sensing node for a high-speed comparator or ADC. The person skilled in the art would use high-speed comparators that would be suitable for such applications. Direct monitoring of the inductive element terminal voltages by an P7522PC00

[0136] 34 on-chip comparator or ADC can also detect polarity reversal. Integrating a sense transistor or sense-FET structure within the chip or the auxiliary circuit to mirror a fraction of the inductor or inductive element current allows zero-cross detection through a comparator or ADC sampling. Additionally, the auxiliary switch, such as a MOSFET, can function as an internal current sense element, with its voltage drop monitored by auxiliary circuit sensing circuitry.

[0137] By accurately detecting the polarity reversal of the auxiliary current, the ZVS unit can ensure that deadtime ends exactly when zero-voltage conditions are met, with the timing desired to be relative to the LC resonance defined by the effective parasitic capacitances and the auxiliary inductance (for example, approximately one-half of the resonance period), which is particularly useful when the auxiliary inductance is small to permit short deadtime intervals. This may minimize unnecessary delay between switching phases and reducing losses due to residual charge in the parasitic capacitances, conduction losses due to long deadtime, limit circulating current and reverse-recovery effects, and promote reliable zero-voltage and zero-current transitions across component tolerances and operating conditions.

[0138] In a preferred embodiment of the present disclosure, the ZVS unit is configured to be connected to the control unit, wherein the ZVS unit is configured to deliver a status of the transfer of the auxiliary charge to the control unit. This connection enables the ZVS unit to provide real-time feedback to the control unit, allowing for dynamic adjustments to the switching sequence or timing, such as the first period, the second period and / or the deadtime, based on the auxiliary charge transfer status. For example, the ZVS unit may signal the control unit to adjust the deadtime duration or modify the switching frequency to optimize performance under varying load conditions. The feedback loop between the ZVS unit and the control unit enhances the responsiveness and adaptability of the switched-capacitor converter, ensuring efficient operation across a wide range of applications. In some embodiments, the feedback loop may allow the control unit to determine and apply an optimum deadtime based on the detected polarity reversal of the auxiliary current and the LC behavior defined by the effective parasitic capacitances and the auxiliary inductance. By accurately and dynamically adjusting the deadtime, conduction losses in the switched-capacitor converter may be minimized while maintaining zero-voltage and / or zero-current switching. This is particularly beneficial in high-performance systems where the auxiliary inductance is selected to be small and may vary due to layout-dependent parasitic inductances, and P7522PC00

[0139] 35 component tolerances. The feedback loop can enable the timing to track such variations in real time, reducing the need for conservative margins and preserving efficiency across operating conditions. This integration may involve digital communication interfaces or analog signal pathways, depending on the complexity and precision requirements of the system. The ZVS unit can be configured to provide control signals to the control unit. Consequently, the control signals can be configured to deliver switch control signals, being configured to drive at least one of the plurality of switches, or preferably the at least one corresponding gate driver.

[0140] In another embodiment of the present disclosure, the ZVS unit is comprised in the control module. Integrating the ZVS unit into the control module reduces the overall footprint of the switched-capacitor converter, making it more compact and suitable for space-constrained applications. This integration also minimizes signal propagation delays between the ZVS unit and the other components of the control module, such as the control unit and gate drivers, enhancing the precision of the ZVS operation. The ZVS unit may be implemented as part of an application-specific integrated circuit (ASIC), a microcontroller, or a field-programmable gate array (FPGA) within the control module, depending on the design and performance requirements of the converter. This embodiment also simplifies the assembly and maintenance of the converter, as the control module can be tested and calibrated as a standalone unit before integration into the full system. The modular design further facilitates upgrades or replacements, allowing the ZVS unit and other components of the control module to be updated independently of the rest of the converter. This flexibility ensures that the switched- capacitor converter can adapt to evolving performance demands while maintaining a compact and efficient design.

[0141] Fig. 7 shows a schematic view of an embodiment of the resonant switched-capacitor converter 200 as disclosed herein, comprising a plurality of gate drivers, and the auxiliary switches, further comprised in the control module 210 as disclosed herein. Fig. 7 illustrates an embodiment of the switched-capacitor converter, wherein the control module 210 is configured to drive the plurality of switches and includes a portion of the auxiliary circuit. The switched-capacitor converter comprises two main branches, with the first branch including the plurality of switches (S0A-S5A) and the second branch including the plurality of switches (S0B-S5B). The switched-capacitor converter also comprises the first capacitor branch (C1A-C3A) and the second capacitor branch (C1 B-C3B). The control module 210, comprised in the black box with P7522PC00

[0142] 36 thick lines in this figure, includes the plurality of gate drivers (GD), which are configured to drive the plurality of switches of the converter and the auxiliary switches. Each gate driver is associated with a specific switch, providing the necessary control signals to turn the switches on and off during the first period (PHASE1) and second period (PHASE2), as previously described. The gate drivers driving the auxiliary switches may preferably turn the auxiliary switches on and off during the deadtime period. The control module 210 further includes a portion of the auxiliary circuit, specifically the auxiliary switches (SZ1A, SZOA and SZ1 B, SZOB), which facilitate the operation of the auxiliary circuit during the deadtime of the converter. These auxiliary switches are integrated within the control module to ensure precise and synchronized control, reducing signal propagation delays and optimizing the operation of the auxiliary circuit. The auxiliary switches are configured to enable charge redistribution through the inductive element LZVS. Notably, the inductive element LZVS is not integrated into the control module but is connected to the control module and forms part of the auxiliary circuit. The inductive element LZVS can potentially be integrated or comprised into the control module. The control module’s integration of the gate drivers and auxiliary switches allows for a compact and modular design, simplifying the implementation of the switched-capacitor converter. This arrangement minimizes the overall footprint of the system while ensuring tight synchronization between the main switches, the auxiliary switches, and the auxiliary circuit. By consolidating the control unit, gate drivers, and auxiliary switches into a single module, the design reduces interconnect lengths and associated parasitic effects, improving efficiency, especially in high-frequency applications.

[0143] Fig. 8 shows a schematic view of an embodiment of the resonant switched-capacitor converter 200 as disclosed herein, comprising the ZVS unit, the control unit, the auxiliary switches and the gate drivers, further comprised in the control module 210, as disclosed herein. Fig. 8 illustrates an embodiment of the resonant switched-capacitor converter 200, wherein the control module 210 comprises the control unit ("CLK CNTRL"), the ZVS unit ("ZVS DETECT"), and the plurality of gate drivers ("GD") driving the plurality of switches and auxiliary switches. The switched-capacitor converter includes two main branches, each comprising a plurality of switches (S0A-S5A in the first branch and S0B-S5B in the second branch) and a plurality of capacitors (C1A- C3A in the first branch and C1 B-C3B in the second branch). The control module 210 is illustrated as integrating the control unit ("CLK CNTRL"), the ZVS unit ("ZVS DETECT"), and the plurality of gate drivers (GD). The control unit ("CLK CNTRL") is P7522PC00

[0144] 37 configured to manage the switching sequence and timing of the main switches during the first and second periods, ensuring proper operation of the converter while avoiding overlapping conduction. The ZVS unit ("ZVS DETECT") is part of the auxiliary circuit and is configured to monitor the transfer of the auxiliary charge, specifically detecting conditions for zero-voltage switching (ZVS). The ZVS unit enables detection of transitions in auxiliary current and provides real-time feedback to the control unit. This feedback ensures that the auxiliary switches (SZ1A, SZOA, SZ1 B, SZOB) are activated at the appropriate moments during the deadtime, facilitating charge redistribution via the inductive element LZVS. The inductive element remains external to the control module but is connected to it, allowing resonant charge transfer and enabling ZVS for the main switches. The inductive element LZVS can potentially be comprised in the control module 210. The plurality of gate drivers ("GD") are shown as part of the control module and are configured to drive both the main switches in the two branches and the auxiliary switches of the auxiliary circuit. The gate drivers ensure precise and synchronized control of the switches, minimizing delays and improving overall system performance. The modular integration of the gate drivers with the control unit and ZVS unit reduces interconnection lengths and parasitic effects, enhancing efficiency, particularly at high switching frequencies.

[0145] The deadtime can begin when the ZVS unit is instructed to enable the ZVS circuit to carry out the ZVS operation, which can be defined as transferring the auxiliary charge through the auxiliary circuit. During the ZVS operation, the ZVS unit can e.g. detect the zero-crossing of the current flow in the ZVS inductor, LZVS. At the beginning of the deadtime some of the auxiliary switches are turned on (e.g. SZ1A and SZ1B) to facilitate current flow through LZVS. The polarity of the initial current flow can be positive in the first deadtime and negative in the second deadtime. The ZVS unit can afterwards detect when there is a zero crossing. The zero crossing is the instance where the initially positive current flow becomes negative, or where the initially negative current flow becomes positive. At the zero crossing of the LZVS current, the maximum amount of charge has been transferred between the first and the second branch or between the second branch and the first branch, depending on the specific deadtime, i.e. the first deadtime or the second deadtime, and the relevant auxiliary switches (e.g. SZ1A and SZ1B) can be switched off to stop the current flow. Additionally, the “SZOA” and “SZOB” switches may be turned on to clamp any remaining residual current in the inductor LZVS effectively resetting the inductor LZVS before the next deadtime. The auxiliary switches can be driven by gate drivers and clock signals that are non- P7522PC00

[0146] 38 overlapping to avoid shoot-through through a pair of transistors such as SZ1A and SZOA. Once the zero-crossing of the LZVS current is detected, the ZVS unit can broadcast that the deadtime can be concluded and the next phase can begin by turning on the relevant portion of the switches. All the control or detection signals sent by the ZVS unit can be received by the control unit, and the control unit can enable the correct switch control signals that are configured to enable at least one of the plurality of switches, preferably through the corresponding gate driver.

[0147] The control unit ("CLK CNTRL") can detect the VGS signals of the power transistors from the gate drivers (“GD”) and initiate the ZVS operation once the VGS signals are low enough to have all the plurality of switches, such as all the plurality of transistors in a non-conducting OFF state. This can be detected either by measuring the VGS voltage or by waiting a predetermined amount of time from when the control signals are demanded LOW until the VGS signal is assumed low enough such that the power transistors are OFF. The control unit can then enable the ZVS operation once all the plurality of switches, such as all the plurality of transistors are OFF. The control unit can initiate the next phase by enabling the relevant portion, such as the first portion or the second portion of the plurality of switches once the ZVS unit has concluded the ZVS operations, e.g. once the LZVS current has been detected to have changed polarity and the auxiliary switches are in a state as to not connect the LZVS inductor to the branches, such as the first or the second branch.

[0148] Fig. 9 shows a schematic view of an embodiment of the resonant switched-capacitor converter 200 as disclosed herein, wherein the control module comprises a first 220 a and a second control module 230. The switched-capacitor converter comprises two branches of switches: the first branch includes switches S0A to S5A, with a first capacitor branch comprising capacitors C1A, C2A, and C3A, and associated gate drivers (GD) connected to CHIPA, while the second branch includes switches SOB to S5B, with a second capacitor branch comprising capacitors C1B, C2B, and C3B, and associated gate drivers (GD) connected to CHIPB. The first control module 220, CHIPA, is configured to control the first branch of the plurality of switches, as well as the auxiliary switches SZ1 A and SZOA, which are connected to the first terminal of the inductive element LZVS. Similarly, the second control module 230, CHIPB, is configured to control the second branch of the plurality of switches, as well as the auxiliary switches SZ1B and SZ0B, which are connected to the second terminal of the inductive element LZVS. This embodiment demonstrates a modular design where each P7522PC00

[0149] 39 control module independently manages its associated branch of the switched-capacitor converter. CHIPA controls all switches and auxiliary switches in the first branch, while CHIPB handles all switches and auxiliary switches in the second branch. This distributed configuration reduces the complexity of signal routing and minimizes parasitic effects, particularly in high-frequency operation, by shortening the connections between the control modules, gate drivers, and the switches they control. The splitting of the control module into CHIPA and CHIPB provides significant advantages, including improved scalability, as each module can operate autonomously. This modular approach allows for straightforward replication of the design for parallel operation or higher power applications. Additionally, this configuration improves thermal management by distributing the heat generated during operation across the two modules, thereby reducing hotspots and enabling more effective cooling. Each control module also incorporates the gate drivers (GD) required to drive its respective switches and auxiliary switches. By integrating these gate drivers directly into the modules, the design reduces delays and ensures precise synchronization between the main switching events and the operation of the auxiliary circuit. The auxiliary circuit in this embodiment facilitates zero-voltage switching (ZVS) by redistributing charge during the deadtime, with CHIPA managing the charge redistribution for the first terminal of the inductive element LZVS and CHIPB managing the redistribution for the second terminal. The physical separation of CHIPA and CHIPB ensures that the control logic for each branch is localized, enabling highly responsive control and reducing the likelihood of synchronization issues between branches.

[0150] The plurality of switches can be at least three switches, such as at least four switches, such as at least five switches, such as at least six switches, such as at least seven switches, such as at least eight switches, such as at least nine switches, such as at least ten switches, such as at least eleven switches, such as at least twelve switches. The number of switches in the switched-capacitor converter directly impacts its topology, scalability, and voltage conversion capabilities. A higher number of switches allows for more complex configurations, such as multi-stage voltage conversion or enhanced charge balancing between branches. For instance, in a step-up converter, increasing the number of switches enables finer granularity in voltage scaling, while in a step-down converter, additional switches can improve efficiency by distributing charge transfer responsibilities more evenly. Variations of this embodiment may involve arranging the switches in series, parallel, or interleaved configurations, depending on the application requirements of the switched-capacitor converter. P7522PC00

[0151] 40

[0152] In one embodiment of the present disclosure, the switched-capacitor converter further comprises an input filtering unit and / or an output filtering unit, wherein the input filtering unit and the output filtering unit are configured to filter the input and the output voltage, respectively, such as the input voltage is a direct current (DC) input voltage and the output voltage is a direct current (DC) output voltage. The input filtering unit smooths fluctuations in the input voltage, protecting the converter from external noise or variations that could impact its performance. Similarly, the output filtering unit reduces ripple and stabilizes the output voltage, ensuring consistent power delivery to the load. These filtering units may include filtering capacitors, filtering inductors, or combinations thereof, such as LC filters or RC filters, tailored to the specific voltage and frequency requirements of the system. Variations may include active filters for applications demanding precise voltage regulation or compact passive filters for space-constrained designs. An output or input filtering could be implemented by adding filtering capacitors in parallel, wherein the filtering capacitors can be connected between the input and / or output node and a ground, preferably a local ground such as an input ground or an output ground, thereby ensuring an efficient filtering of the input or output signals, such as the input voltage or the output voltage of the switched-capacitor converter. Preferably, the filtering capacitors can be multi-layer ceramic capacitors (MLCCs).

[0153] In a preferred embodiment of the present disclosure, the input voltage is higher or lower than the output voltage, such that the switched-capacitor converter is a step-up converter or a step-down converter. This versatility enables the converter to adapt to various applications, ranging from boosting low input voltages for high-power devices to stepping down high input voltages for low-power electronics. The step-up or stepdown functionality is determined by the arrangement of the capacitors and switches, as well as the control strategy employed by the control unit. For example, in a step-up configuration, charge is accumulated in the plurality of capacitors over multiple phases before being delivered at a higher voltage, while in a step-down configuration, the charge is distributed in smaller increments to achieve a lower voltage. In another embodiment of the present disclosure, the input voltage is substantially four times the output voltage. In one embodiment of the present disclosure, the input voltage is substantially five times the output voltage, such as substantially six times the output voltage, such as substantially seven times the output voltage. The previous ratios can be achieved by either adding additional switches to the plurality of switches and / or additional capacitors to the plurality of capacitors. P7522PC00

[0154] 41

[0155] The input voltage and / or the output voltage can be comprised between 12 and 400 V, and wherein the input voltage is preferably comprised between 36 and 400 V, more preferably comprised between 36 and 60 V, and wherein the output voltage is preferably comprised between 8 and 30 V, more preferably comprised between 1 and 30 V, even more preferably comprised between 2 and 3 V. This range of input and output voltages makes the converter suitable for a variety of applications, including automotive systems with 48V power architectures, industrial equipment operating at higher voltages, and portable electronics, high performance data centers, requiring lower output voltages. The flexibility in voltage handling ensures that the converter can meet the requirements of diverse systems while maintaining high efficiency and performance. Variations may include configurations optimized for specific voltage ranges, such as ultra-low-voltage designs for battery-powered devices or high-voltage designs for grid-tied systems.

[0156] In one embodiment of the present disclosure, the switched-capacitor converter is configured to deliver the output voltage to an output load. The output load may include resistive, inductive, or capacitive components, depending on the application. For example, the load could be a processor in a data center server, a motor in an automotive system, or a battery in an energy storage system. The converter is designed to provide a stable and reliable output voltage, ensuring optimal performance of the connected load. Many variations of this embodiment may involve additional monitoring and control mechanisms to dynamically adjust the output voltage based on load conditions, improving efficiency and extending the lifetime of both the switched- capacitor converter and the output load, preferably connected at the output of the switched-capacitor converter.

[0157] In another aspect of the present disclosure, a switched-capacitor converter control module for controlling and being connectable to a plurality of switches, a plurality of capacitors and / or an inductive element is disclosed. The switched-capacitor converter control module can comprise a control unit configured to control and to be connectable to a plurality of switches, wherein the control unit and the plurality of switches can be the control unit and the plurality of switches as disclosed and described herein; an auxiliary circuit, preferably the auxiliary circuit as disclosed herein; a ZVS unit configured to be connected to the control unit, and wherein the ZVS unit can be the ZVS unit as disclosed and described herein. P7522PC00

[0158] 42

[0159] The auxiliary circuit may comprise the inductive element, wherein the inductive element is the inductive element as disclosed and described herein. Integrating the inductive element into the switched-capacitor converter control module can simplify the overall design and further reduces the system's footprint, which is particularly advantageous in high-density applications where space is constrained. By incorporating the inductive element within the switched-capacitor control module, the layout of the auxiliary circuit becomes more compact, minimizing parasitic inductances and resistances associated with external connections and interconnect paths. This integration also enhances the performance of the auxiliary circuit by improving the resonant behavior and the timing accuracy of the charge redistribution facilitated by the inductive element during deadtime.

[0160] Furthermore, integrating the inductive element into the switched-capacitor control module allows for improved thermal management of the auxiliary circuit, as the control module can be designed to optimize the placement of components and dissipate heat effectively. For example, the inductive element can be co-located with the auxiliary switches and gate drivers, allowing for coordinated heat dissipation and reducing localized thermal stress. This co-integration simplifies the overall assembly and testing process, as the control module, comprising the auxiliary circuit and the inductive element, can be tested as a standalone unit before integration into the full switched- capacitor converter system.

[0161] In a further aspect of the present disclosure, a method of controlling a switched- capacitor converter for converting an input voltage provided at an input of the switched- capacitor converter to an output voltage provided at an output of the switched-capacitor converter may comprise the steps of providing a switched-capacitor converter comprising a plurality of switches, wherein the plurality of switches can be arranged in at least two branches, wherein a first branch comprises a first part of the plurality of switches and a second branch comprises a second part of the plurality of switches; a plurality of capacitors, wherein the plurality of capacitors are configured to store a plurality of charges to be transferred between the input and the output via the plurality of switches; an auxiliary circuit, wherein the auxiliary circuit is configured to transfer an auxiliary charge, wherein the auxiliary charge can be substantially transferred during a deadtime of the switched-capacitor converter; converting an input voltage to an output voltage by operating the plurality of switches, thereby transferring the plurality of charges between the input to the output, through the plurality of switches. P7522PC00

[0162] 43

[0163] This method can facilitate the efficient transfer of energy within the switched-capacitor converter by controlling the operation of the plurality of switches and the auxiliary circuit. The method can comprise any type of switches commonly used in the art or any topology of the switched-capacitor converter, allowing for flexibility in implementation across various switched-capacitor converter designs. The auxiliary circuit’s operation during the deadtime ensures efficient redistribution of the auxiliary charge, minimizing switching losses and improving overall energy efficiency.

[0164] The method can be adapted to operate with different configurations of the branches and capacitors, including symmetrical or asymmetrical topologies, depending on the voltage conversion ratio or power requirements of the application. Variations may include optimizing the timing of switch operation to accommodate specific capacitor values, inductive elements, or operating frequencies, thereby enhancing performance across diverse use cases. The auxiliary charge may be drawn from parasitic capacitances of the switches, which are inherent in most power transistor designs. The auxiliary circuit may also include inductive elements or additional switches to facilitate efficient charge redistribution, depending on the characteristics of the converter.

[0165] In one embodiment of the present disclosure, the method further comprises activating, during a first phase, a first portion of the plurality of switches, wherein the first portion of the plurality of switches transfers a first portion of the plurality of charges between the input to the plurality of capacitors to be stored, and transfers a second portion of the plurality of charges from the plurality of capacitors to the output. This step ensures that the charge flow during the first phase is directed effectively, facilitating the accumulation of energy in the plurality of capacitors and the subsequent transfer to the output load. The first portion of switches may be activated in a controlled sequence, ensuring that the charge transfer process aligns with the switched-capacitor converter's operational timing. This sequence minimizes switching losses and avoids unnecessary energy dissipation. Some other embodiments could comprise dynamic adjustment of the activation sequence based on load conditions or input voltage variations to optimize performance.

[0166] In another embodiment of the present disclosure, the method further comprises activating, during a second phase, a second portion of the plurality of switches, wherein the second portion of the plurality of switches transfers a third portion of the plurality of charges between the input to the plurality of capacitors to be stored, and transfers a P7522PC00

[0167] 44 fourth portion of the plurality of charges from the plurality of capacitors to the output. This step complements the first phase by alternating the operation of the switches, ensuring continuous energy transfer between the input and the output. The activation of the second portion of switches can be precisely timed to align with the deactivation of the first portion, maintaining a seamless charge flow while preventing overlapping switching events. This sequential activation of the first and second portions provides balanced operation, reducing stress on individual components and improving the reliability of the converter.

[0168] In a preferred embodiment of the present disclosure, the method further comprises activating the auxiliary circuit during the deadtime of the switched-capacitor converter, wherein the deadtime is between the first phase and the second phase. The auxiliary circuit can operate to redistribute the auxiliary charge stored in parasitic capacitances or other components of the switched-capacitor circuit during the deadtime, enabling zero-voltage switching for the plurality of switches. This reduces energy losses associated with the discharge of parasitic capacitances and minimizes stress on the switches, enhancing the efficiency and longevity of the switched-capacitor converter. The timing and control of the auxiliary circuit can be adjusted dynamically to align with the operating frequency and load conditions of the converter. For example, in high- frequency applications, the deadtime duration may be minimized to reduce switching delays while ensuring effective charge redistribution.

[0169] In one embodiment of the present disclosure, the switched-capacitor converter is the switched-capacitor converter as disclosed herein. This embodiment integrates the structural and operational features of the switched-capacitor converter described in the present disclosure. For example, the method can leverage the specific configurations of the plurality of switches, the plurality of capacitors, and the auxiliary circuit to optimize performance.

[0170] Embodiment List

[0171] Disclosed herein are the following embodiments

[0172] 1. A switched-capacitor converter for converting an input voltage to an output voltage at respectively an input and an output of the switched-capacitor converter, wherein the switched-capacitor converter comprises: P7522PC00

[0173] 45 a plurality of switches, wherein the plurality of switches are arranged in at least two branches, wherein a first branch comprises a first part of the plurality of switches and a second branch comprises a second part of the plurality of switches; a plurality of capacitors, wherein the plurality of capacitors are configured to store a plurality of charges to be transferred between the input and the output via the plurality of switches; an auxiliary circuit, wherein the auxiliary circuit is configured to transfer an auxiliary charge, wherein the auxiliary charge is transferred during a deadtime of the switched-capacitor converter.

[0174] 2. The switched-capacitor converter according to any one of the preceding items, wherein the switched-capacitor converter is a symmetrical Dickson switched- capacitor converter.

[0175] 3. The switched-capacitor converter according to any one of the preceding items, wherein the first part of the plurality of switches and / or the second part of the plurality of switches are connected in series, from the input or the output, to a ground of the switched-capacitor converter.

[0176] 4. The switched-capacitor converter according to any one of the preceding items, wherein the output is comprised in the first branch and / or the second branch.

[0177] 5. The switched-capacitor converter according to any one of the preceding items, wherein the plurality of capacitors are arranged in a first and a second capacitor branch, wherein the first capacitor branch is connected to the first branch and the second capacitor branch is connected to the second branch.

[0178] 6. The switched-capacitor converter according to any one of the preceding items, wherein the first branch and the second branch are interleaved, thereby wherein the second capacitor branch is connected to the first branch and the first capacitor branch is connected to the second branch. P7522PC00

[0179] 46

[0180] 7. The switched-capacitor converter according to any one of the preceding items, wherein the plurality of switches are a plurality of transistors, such as power transistors.

[0181] 8. The switched-capacitor converter according to any one of the preceding items, wherein the switched-capacitor converter is configured to activate a first portion of the plurality of switches and deactivate a second portion of the plurality of switches during a first period, and to activate the second portion of the plurality of switches and to deactivate the first portion of the plurality of switches during a second period.

[0182] 9. The switched-capacitor converter according to any one of the preceding items, wherein the first portion and the second portion of the plurality of switches are the plurality of switches.

[0183] 10. The switched-capacitor converter according to any one of the preceding items, wherein the deadtime is the period between the first and the second period.

[0184] 11. The switched-capacitor converter according to any one of the preceding items, wherein the switched-capacitor converter has a switching frequency or a switching period, wherein the switching period comprises the first period, the second period and at least one deadtime, such as two deadtimes.

[0185] 12. The switched-capacitor converter according to any one of the preceding items, wherein the switching frequency is comprised between 100 kHz and 5 MHz, preferably from 250 kHz to 3 MHz, more preferably from 500 kHz to 2 MHz, even more preferably from 600 kHz to 1.5 MHz.

[0186] 13. The switched-capacitor converter according to any one of the preceding items, wherein the first period is separated from the second period by the deadtime, and wherein the first period is substantially as long as the second period.

[0187] 14. The switched-capacitor converter according to any one of the preceding items, wherein a first amount of charge is transferred from the input to the plurality of capacitors and a second amount of charge is transferred from the plurality of P7522PC00

[0188] 47 capacitors to the output during the first period, and a third amount of charge is transferred from the input to the plurality of capacitors and a fourth amount of charge is transferred from the plurality of capacitors to the output during the second period.

[0189] 15. The switched-capacitor converter according to any one of the preceding items, wherein the auxiliary circuit is a Zero Voltage Switching (ZVS) circuit.

[0190] 16. The switched-capacitor converter according to any one of the preceding items, wherein the auxiliary charge is collected from at least one parasitic capacitance of the plurality of switches.

[0191] 17. The switched-capacitor converter according to any one of the preceding items, wherein the auxiliary circuit further comprises an inductive element.

[0192] 18. The switched-capacitor converter according to item 17, wherein the inductive element is an inductor, a coil, a distributed inductance or any combinations thereof.

[0193] 19. The switched-capacitor converter according to any one of the preceding items, wherein the auxiliary circuit further comprises at least one auxiliary switch, wherein the at least one auxiliary switch is configured to transfer the auxiliary charge.

[0194] 20. The switched-capacitor converter according to item 19, wherein the at least one auxiliary switch allows the auxiliary charge to flow in the inductive element.

[0195] 21. The switched-capacitor converter according to any one of the preceding items, wherein the at least one auxiliary switch is at least one auxiliary transistor.

[0196] 22. The switched-capacitor converter according to any one of the preceding items, wherein the at least one auxiliary switch is a plurality of auxiliary switches, preferably at least three auxiliary switches, more preferably at least four auxiliary switches. P7522PC00

[0197] 48

[0198] 23. The switched-capacitor converter according to any one of the preceding items, wherein the plurality of auxiliary switches forms at least one half-bridge.

[0199] 24. The switched-capacitor converter according to any one of the preceding items, wherein the inductive element is comprised between two half-bridges.

[0200] 25. The switched-capacitor converter according to any one of the preceding items, wherein the auxiliary circuit is configured, during the deadtime, to slowly ramp up the voltage across each of the plurality of switches in the first or second portion of the plurality of switches that were operating in the preceding period, while slowly ramping down the voltage across each of the plurality of switches in the second or first portion of the plurality of switches that will operate in the subsequent period.

[0201] 26. The switched-capacitor converter according to any one of the preceding items, wherein the switched-capacitor converter further comprises a control unit, wherein the control unit is configured to control a switching of the plurality of switches and / or the plurality of auxiliary switches.

[0202] 27. The switched-capacitor converter according to any one of the preceding items, wherein the control unit comprises at least one clock unit, and wherein the at least one clock unit comprises a clock generator, wherein the clock generator is a voltage controlled oscillator or a ring oscillator.

[0203] 28. The switched-capacitor converter according to any one of the preceding items, wherein the control unit is configured to activate the first portion of the plurality of switches during the first period and to activate the second portion of the plurality of switches during the second period.

[0204] 29. The switched-capacitor converter according to item 28, wherein the first portion of the plurality of switches is a first half of the first part of the plurality of switches and a second half of the second part of the plurality of switches, and the second portion of the plurality of switches is a second half of the first part of the plurality of switches and a first half of the second part of the plurality of switches. P7522PC00

[0205] 49

[0206] 30. The switched-capacitor converter according to any one of the preceding items, wherein the control unit is configured to control the plurality of auxiliary switches during the deadtime.

[0207] 31. The switched-capacitor converter according to any one of the preceding items, wherein the control unit comprises a plurality of gate drivers, wherein the gate drivers are configured to drive the plurality of switches and / or the plurality of auxiliary switches, such that each of the plurality of switches and / or the plurality of auxiliary switches are configured to be driven by at least one of the plurality of gate drivers.

[0208] 32. The switched-capacitor converter according to any one of the preceding items, wherein the plurality of switches and / or the plurality of auxiliary switches are configured to be independently controlled by the plurality of gate drivers.

[0209] 33. The switched-capacitor converter according to any one of the preceding items, wherein the plurality of gate drivers and the auxiliary switches are arranged on a control module, wherein the control module is configured to be connectable to the plurality of switches, the plurality of capacitors, and / or the inductive element.

[0210] 34. The switched-capacitor converter according to any one of the preceding items, wherein the control module further comprises the control unit.

[0211] 35. The switched-capacitor converter according to any one of the preceding items, wherein the switched capacitor further comprises at least one primary inductive element, wherein the at least one primary element is arranged in the first branch, the second branch and / or in series with the plurality of capacitors, such that the switched-capacitor converter is a resonant switched-capacitor converter.

[0212] 36. The switched-capacitor converter according to any one of the preceding items, wherein the plurality of charges are transferred with at least one resonant charge transfer. P7522PC00

[0213] 50

[0214] 37. The switched-capacitor converter according to any one of the preceding items, wherein the at least one resonant charge transfer is underdamped.

[0215] 38. The switched-capacitor converter according to any one of the preceding items, wherein the at least one resonant charge transfer is performed by a resonant charge transfer loop, and wherein the resonant charge transfer loop has a Cofactor, and wherein the Q-factor is equal or below 0.5.

[0216] 39. The switched-capacitor converter according to any one of the preceding items, wherein the switched-capacitor converter further comprises a ZVS unit, wherein the ZVS unit is configured to detect a transfer of the auxiliary charge.

[0217] 40. The switched-capacitor converter according to any one of the preceding items, wherein the transfer of the auxiliary charge forms an auxiliary current, and wherein the ZVS unit is configured to detect transitions between positive and negative auxiliary current.

[0218] 41. The switched-capacitor converter according to any one of the preceding items, wherein the ZVS unit is configured to be connected to the control unit, wherein the ZVS unit is configured to deliver a status of the transfer of the auxiliary charge to the control unit.

[0219] 42. The switched-capacitor converter according to any one of the preceding items, wherein the ZVS unit is comprised in the control module.

[0220] 43. The switched-capacitor converter according to any one of the preceding items, wherein the plurality of switches is at least three switches, such as at least four switches, such as at least five switches, such as at least six switches, such as at least seven switches, such as at least eight switches, such as at least nine switches, such as at least ten switches, such as at least eleven switches, such as at least twelve switches.

[0221] 44. The switched-capacitor converter according to any one of the preceding items, further comprising an input filtering unit and / or an output filtering unit, wherein the input filtering unit and the output filtering unit are configured to filter the input P7522PC00

[0222] 51 and the output voltage, respectively, such as the input voltage is a direct current (DC) input voltage and the output voltage is a direct current (DC) output voltage.

[0223] 45. The switched-capacitor converter according to any one of the preceding items, wherein the input voltage is higher or lower than the output voltage, such that the switched-capacitor converter is a step-up converter or a step-down converter.

[0224] 46. The switched-capacitor converter according to any one of the preceding items, wherein the input voltage is substantially four times the output voltage.

[0225] 47. The switched-capacitor converter according to any one of the preceding items, wherein the input voltage and / or the output voltage is comprised between 12 and 400 V, and wherein the input voltage is preferably comprised between 36 and 400 V, more preferably comprised between 36 and 60 V, and wherein the output voltage is preferably comprised between 8 and 30 V, more preferably comprised between 1 and 30 V.

[0226] 48. The switched-capacitor converter according to any one of the preceding items, wherein the switched-capacitor converter is configured to deliver the output voltage to an output load.

[0227] 49. A switched-capacitor converter control module for controlling and being connectable to a plurality of switches, a plurality of capacitors and / or an inductive element, wherein the switched-capacitor converter control module comprises: a control unit configured to control and to be connectable to a plurality of switches, wherein the control unit and the plurality of switches are as defined in any one of items 1-48; an auxiliary circuit as defined in any one of items 1-48; a ZVS unit configured to be connected to the control unit, and wherein the ZVS unit is as defined in any one of items 1-48. P7522PC00

[0228] 52

[0229] 50. A switched-capacitor converter control module according to item 49, wherein the auxiliary circuit comprises the inductive element, wherein the inductive element is according to any one of items 1-48, such that the inductive element is comprised in the switched-capacitor control module.

[0230] 51. A method of controlling a switched-capacitor converter for converting an input voltage provided at an input of the switched-capacitor converter to an output voltage provided at an output of the switched-capacitor converter, wherein the method comprises the steps of: providing a switched-capacitor converter comprising a plurality of switches, wherein the plurality of switches are arranged in at least two branches, wherein a first branch comprises a first part of the plurality of switches and a second branch comprises a second part of the plurality of switches; a plurality of capacitors, wherein the plurality of capacitors are configured to store a plurality of charges to be transferred between the input and the output via the plurality of switches; an auxiliary circuit, wherein the auxiliary circuit is configured to transfer an auxiliary charge, wherein the auxiliary charge is transferred during a deadtime of the switched-capacitor converter; converting an input voltage to an output voltage by operating the plurality of switches, thereby transferring the plurality of charges between the input to the output, through the plurality of switches.

[0231] 52. The method according to item 51, wherein the method further comprises activating, during a first phase, a first portion of the plurality of switches, wherein the first portion of the plurality of switches transfers a first portion of the plurality of charges between the input to the plurality of capacitors to be stored, and transfers a second portion of the plurality of charges from the plurality of capacitors to the output.

[0232] 53. The method according to any one of items 51-52, wherein the method further comprises activating, during a second phase, a second portion of the plurality of switches, wherein the second portion of the plurality of switches transfers a third portion of the plurality of charges between the input to the plurality of capacitors P7522PC00

[0233] 53 to be stored, and transfers a fourth portion of the plurality of charges from the plurality of capacitors to the output.

[0234] 54. The method according to any one of items 51-53, wherein the method further comprises activating the auxiliary circuit during the deadtime of the switched- capacitor converter, wherein the deadtime is between the first phase and the second phase.

[0235] 55. The method according to any one of items 51-54, wherein the switched- capacitor converter is the switched-capacitor converter according to any one of items 1-48.

Claims

P7522PC0054Claims1. A switched-capacitor converter for converting an input voltage to an output voltage at respectively an input and an output of the switched-capacitor converter, wherein the switched-capacitor converter comprises: a plurality of switches, wherein the plurality of switches are arranged in at least two branches, wherein a first branch comprises a first part of the plurality of switches and a second branch comprises a second part of the plurality of switches; a plurality of capacitors, wherein the plurality of capacitors are configured to store a plurality of charges to be transferred between the input and the output via the plurality of switches; an auxiliary circuit, wherein the auxiliary circuit is configured to transfer an auxiliary charge, wherein the auxiliary charge is transferred during a deadtime of the switched-capacitor converter.

2. The switched-capacitor converter according to any one of the preceding claims, wherein the auxiliary circuit is a Zero Voltage Switching (ZVS) circuit, and wherein the auxiliary charge is collected from at least one parasitic capacitance of the plurality of switches.

3. The switched-capacitor converter according to any one of the preceding claims, wherein the auxiliary circuit further comprises an inductive element, and wherein the inductive element is an inductor, a coil, a distributed inductance or any combinations thereof.

4. The switched-capacitor converter according to any one of the preceding claims, wherein the auxiliary circuit further comprises at least one auxiliary switch, wherein the at least one auxiliary switch is configured to transfer the auxiliary charge, and wherein the at least one auxiliary switch is at least one auxiliary transistor.

5. The switched-capacitor converter according to any one of the preceding claims, wherein the at least one auxiliary switch is a plurality of auxiliary switches, preferably at least three auxiliary switches, more preferably at least four auxiliary switches, wherein the plurality of auxiliary switches forms at least oneP7522PC0055 half-bridge, and wherein the inductive element is comprised between two halfbridges.

6. The switched-capacitor converter according to any one of the preceding claims, wherein the switched-capacitor converter further comprises a control unit, wherein the control unit is configured to control a switching of the plurality of switches and / or the plurality of auxiliary switches.

7. The switched-capacitor converter according to any one of the preceding claims, wherein the control unit comprises a plurality of gate drivers, wherein the gate drivers are configured to drive the plurality of switches and / or the plurality of auxiliary switches, such that each of the plurality of switches and / or the plurality of auxiliary switches are configured to be driven by at least one of the plurality of gate drivers, and wherein the plurality of switches and / or the plurality of auxiliary switches are configured to be independently controlled by the plurality of gate drivers.

8. The switched-capacitor converter according to any one of the preceding claims, wherein the switched capacitor further comprises at least one primary inductive element, wherein the at least one primary element is arranged in the first branch, the second branch and / or in series with the plurality of capacitors, such that the switched-capacitor converter is a resonant switched-capacitor converter.

9. The switched-capacitor converter according to any one of the preceding claims, wherein the plurality of charges are transferred with at least one resonant charge transfer, and wherein the at least one resonant charge transfer is underdamped.

10. The switched-capacitor converter according to any one of the preceding claims, wherein the at least one resonant charge transfer is performed by a resonant charge transfer loop, and wherein the resonant charge transfer loop have a Cofactor, and wherein the Q-factor is equal or below 0.5.P7522PC005611. The switched-capacitor converter according to any one of the preceding claims, wherein the switched-capacitor converter further comprises a ZVS unit, wherein the ZVS unit is configured to detect a transfer of the auxiliary charge, wherein the transfer of the auxiliary charge forms an auxiliary current, and wherein the ZVS unit is configured to detect transitions between positive and negative auxiliary current.

12. The switched-capacitor converter according to any one of the preceding claims, wherein the ZVS unit is configured to be connected to the control unit, wherein the ZVS unit is configured to deliver a status of the transfer of the auxiliary charge to the control unit.

13. A switched-capacitor converter control module for controlling and being connectable to a plurality of switches, a plurality of capacitors and / or an inductive element, wherein the switched-capacitor converter control module comprises: a control unit configured to control and to be connectable to a plurality of switches, wherein the control unit and the plurality of switches are as defined in any one of claims 1-12; an auxiliary circuit as defined in any one of claims 1-12; a ZVS unit configured to be connected to the control unit, and wherein the ZVS unit is as defined in any one of claims 1-12.

14. A method of controlling a switched-capacitor converter for converting an input voltage provided at an input of the switched-capacitor converter to an output voltage provided at an output of the switched-capacitor converter, wherein the method comprises the steps of: providing a switched-capacitor converter comprising a plurality of switches, wherein the plurality of switches are arranged in at least two branches, wherein a first branch comprises a first part of the plurality of switches and a second branch comprises a second part of the plurality of switches; a plurality of capacitors, wherein the plurality of capacitors are configured to store a plurality of charges to be transferred between the input and the output via the plurality of switches;P7522PC0057 an auxiliary circuit, wherein the auxiliary circuit is configured to transfer an auxiliary charge, wherein the auxiliary charge is transferred during a deadtime of the switched-capacitor converter; converting an input voltage to an output voltage by operating the plurality of switches, thereby transferring the plurality of charges between the input to the output, through the plurality of switches.

15. The method according to claim 14, wherein the switched-capacitor converter is the switched-capacitor converter according to any one of claims 1-12.

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