Hardware accelerator for supporting 2d convolution and 3D convolution operations of density tensor and sparse tensor
A versatile CNN computation accelerator supports 2D/3D convolutions and dense/sparse tensors, adapting to different applications without hardware changes, enhancing efficiency and flexibility in small embedded systems.
WO2026141739A1PCT designated stage Publication Date: 2026-07-02KOREA ELECTRONICS TECH INST
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- KOREA ELECTRONICS TECH INST
- Filing Date
- 2024-12-27
- Publication Date
- 2026-07-02
Smart Images
Figure KR2024021273_02072026_PF_FP_ABST
Abstract
A hardware accelerator for supporting 2D convolution and 3D convolution operations of a density tensor and a sparse tensor is provided. A CNN operation accelerator according to an embodiment of the present invention is versatile hardware that can support both 2D / 3D convolution and density / sparse tensor operations without hardware changes, and thus can be used for various purposes in small embedded systems. Therefore, a need for different network models according to applications can be prevented.
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